[Zrouter-src-freebsd] ZRouter.org: push to FreeBSD HEAD tree

zrouter-src-freebsd at zrouter.org zrouter-src-freebsd at zrouter.org
Mon May 14 11:18:31 UTC 2012


details:   http://zrouter.org/hg/FreeBSD/head//rev/7998cb88f484
changeset: 483:7998cb88f484
user:      Aleksandr Rybalko <ray at ddteam.net>
date:      Mon May 14 14:18:22 2012 +0300
description:
Missing bits.

diffstat:

 head/sys/mips/atheros/if_arge.c |  190 +++++++++++++++------------------------
 1 files changed, 73 insertions(+), 117 deletions(-)

diffs (410 lines):

diff -r 32f69009f3f9 -r 7998cb88f484 head/sys/mips/atheros/if_arge.c
--- a/head/sys/mips/atheros/if_arge.c	Sat May 12 00:57:52 2012 +0300
+++ b/head/sys/mips/atheros/if_arge.c	Mon May 14 14:18:22 2012 +0300
@@ -136,6 +136,12 @@
 static int arge_intr_filter(void *);
 static void arge_tick(void *);
 
+/*
+ * ifmedia callbacks for multiPHY MAC
+ */
+void arge_multiphy_mediastatus(struct ifnet *, struct ifmediareq *);
+int arge_multiphy_mediachange(struct ifnet *);
+
 static void arge_dmamap_cb(void *, bus_dma_segment_t *, int, int);
 static int arge_dma_alloc(struct arge_softc *);
 static void arge_dma_free(struct arge_softc *);
@@ -219,10 +225,6 @@
 		"tx_pkts_unaligned", CTLFLAG_RW, &sc->stats.tx_pkts_unaligned,
 		0, "number of TX unaligned packets");
 
-	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
-		"rx_pkts", CTLFLAG_RW, &sc->stats.rx_pkts, 0,
-		"number of RX packets");
-
 #ifdef	ARGE_DEBUG
 	SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "tx_prod",
 	    CTLFLAG_RW, &sc->arge_cdata.arge_tx_prod, 0, "");
@@ -236,7 +238,7 @@
 static int
 arge_attach(device_t dev)
 {
-	uint8_t			eaddr[ETHER_ADDR_LEN], mdio_clock_div;
+	uint8_t			eaddr[ETHER_ADDR_LEN];
 	struct ifnet		*ifp;
 	struct arge_softc	*sc;
 	int			error = 0, rid;
@@ -388,13 +390,11 @@
 	DELAY(20);
 
 	/* Step 2. Punt the MAC core from the central reset register */
-	ar71xx_device_stop(sc->arge_mac_unit == 0 ?
-	    (RST_RESET_GE0_MAC|RST_RESET_GE0_PHY|RST_RESET_GE1_MDIO) :
-	    (RST_RESET_GE1_MAC|RST_RESET_GE1_PHY|RST_RESET_GE1_MDIO));
+	ar71xx_device_stop(sc->arge_mac_unit == 0 ? RST_RESET_GE0_MAC :
+	    RST_RESET_GE1_MAC);
 	DELAY(100);
-	ar71xx_device_start(sc->arge_mac_unit == 0 ?
-	    (RST_RESET_GE0_MAC|RST_RESET_GE0_PHY|RST_RESET_GE1_MDIO) :
-	    (RST_RESET_GE1_MAC|RST_RESET_GE1_PHY|RST_RESET_GE1_MDIO));
+	ar71xx_device_start(sc->arge_mac_unit == 0 ? RST_RESET_GE0_MAC :
+	    RST_RESET_GE1_MAC);
 
 	/* Step 3. Reconfigure MAC block */
 	ARGE_WRITE(sc, AR71XX_MAC_CFG1,
@@ -408,24 +408,11 @@
 	ARGE_WRITE(sc, AR71XX_MAC_MAX_FRAME_LEN, 1536);
 
 	/* Reset MII bus */
-	switch (ar71xx_soc) {
-	case AR71XX_SOC_AR7242:
-		mdio_clock_div = MAC_MII_CFG_CLOCK_DIV_20;
-		break;
-	default:
-		mdio_clock_div = MAC_MII_CFG_CLOCK_DIV_28;
-		break;
-	}
-	ARGE_WRITE(sc, AR71XX_MAC_MII_CFG, MAC_MII_CFG_RESET | mdio_clock_div);
+	ARGE_WRITE(sc, AR71XX_MAC_MII_CFG, MAC_MII_CFG_RESET);
 	DELAY(100);
-	ARGE_WRITE(sc, AR71XX_MAC_MII_CFG, mdio_clock_div);
+	ARGE_WRITE(sc, AR71XX_MAC_MII_CFG, MAC_MII_CFG_CLOCK_DIV_28);
 	DELAY(100);
 
-	/* Scan bus */
-	ARGE_WRITE(sc, AR71XX_MAC_MII_CMD, MAC_MII_CMD_SCAN_CYCLE);
-	DELAY(100);
-	ARGE_WRITE(sc, AR71XX_MAC_MII_CMD, MAC_MII_CMD_READ);
-
 	/*
 	 * Set all Ethernet address registers to the same initial values
 	 * set all four addresses to 66-88-aa-cc-dd-ee
@@ -443,30 +430,29 @@
 		case AR71XX_SOC_AR7242:
 			ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG1, 0x0010ffff);
 			ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG2, 0x015500aa);
-			ARGE_WRITE(sc, AR71XX_MAC_FIFO_RX_FILTMATCH, 0x3ffff);
-			ARGE_WRITE(sc, AR71XX_MAC_FIFO_RX_FILTMASK, 0x3ffff |
-			    ((sc->arge_mac_unit == 1)?(1<<19):0));
 			break;
 		default:
 			ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG1, 0x0fff0000);
 			ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG2, 0x00001fff);
-			ARGE_WRITE(sc, AR71XX_MAC_FIFO_RX_FILTMATCH,
-			    FIFO_RX_FILTMATCH_DEFAULT);
-			ARGE_WRITE(sc, AR71XX_MAC_FIFO_RX_FILTMASK,
-			    FIFO_RX_FILTMASK_DEFAULT);
 	}
 
-	arge_set_pll(sc, sc->arge_media_type, sc->arge_media_duplex);
+	ARGE_WRITE(sc, AR71XX_MAC_FIFO_RX_FILTMATCH,
+	    FIFO_RX_FILTMATCH_DEFAULT);
 
-	error = mii_attach(dev, &sc->arge_miibus, ifp, arge_ifmedia_upd,
-	    arge_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY, MII_OFFSET_ANY,
-	    0);
+	ARGE_WRITE(sc, AR71XX_MAC_FIFO_RX_FILTMASK,
+	    FIFO_RX_FILTMASK_DEFAULT);
+
+
+	/* Do MII setup. */
+	error = mii_attach(dev, &sc->arge_miibus, ifp,
+	    arge_ifmedia_upd, arge_ifmedia_sts, BMSR_DEFCAPMASK,
+	    MII_PHY_ANY, MII_OFFSET_ANY, 0);
 	if (error != 0) {
 		device_printf(dev, "attaching PHYs failed\n");
 		goto fail;
 	}
 
-	/* Call MII attach routine. */
+	/* Call MI attach routine. */
 	ether_ifattach(ifp, eaddr);
 
 	/* Hook interrupt last to avoid having to lock softc */
@@ -482,17 +468,6 @@
 	/* setup sysctl variables */
 	arge_attach_sysctl(dev);
 
-	/* Init circular RX list. */
-	if (arge_rx_ring_init(sc) != 0) {
-		device_printf(dev,
-		    "initialization failed: no memory for rx buffers\n");
-		error = ENOMEM;
-		goto fail;
-	}
-
-	/* Init tx descriptors. */
-	arge_tx_ring_init(sc);
-
 fail:
 	if (error)
 		arge_detach(dev);
@@ -586,23 +561,24 @@
 	    | (reg & MAC_MII_REG_MASK);
 
 	mtx_lock(&miibus_mtx);
-	ARGE_MII_WRITE(sc, AR71XX_MAC_MII_CMD, MAC_MII_CMD_WRITE);
-	ARGE_MII_WRITE(sc, AR71XX_MAC_MII_ADDR, addr);
-	ARGE_MII_WRITE(sc, AR71XX_MAC_MII_CMD, MAC_MII_CMD_READ);
+	ARGE_WRITE(sc, AR71XX_MAC_MII_CMD, MAC_MII_CMD_WRITE);
+	ARGE_WRITE(sc, AR71XX_MAC_MII_ADDR, addr);
+	ARGE_WRITE(sc, AR71XX_MAC_MII_CMD, MAC_MII_CMD_READ);
 
 	i = ARGE_MII_TIMEOUT;
-	while ((ARGE_MII_READ(sc, AR71XX_MAC_MII_INDICATOR) &
+	while ((ARGE_READ(sc, AR71XX_MAC_MII_INDICATOR) &
 	    MAC_MII_INDICATOR_BUSY) && (i--))
 		DELAY(5);
 
 	if (i < 0) {
 		mtx_unlock(&miibus_mtx);
 		ARGEDEBUG(sc, ARGE_DBG_MII, "%s timedout\n", __func__);
-		return (-EIO);
+		/* XXX: return ERRNO istead? */
+		return (-1);
 	}
 
-	result = ARGE_MII_READ(sc, AR71XX_MAC_MII_STATUS) & MAC_MII_STATUS_MASK;
-	ARGE_MII_WRITE(sc, AR71XX_MAC_MII_CMD, MAC_MII_CMD_WRITE);
+	result = ARGE_READ(sc, AR71XX_MAC_MII_STATUS) & MAC_MII_STATUS_MASK;
+	ARGE_WRITE(sc, AR71XX_MAC_MII_CMD, MAC_MII_CMD_WRITE);
 	mtx_unlock(&miibus_mtx);
 
 	ARGEDEBUG(sc, ARGE_DBG_MII,
@@ -624,11 +600,11 @@
 	    __func__, phy, reg, data);
 
 	mtx_lock(&miibus_mtx);
-	ARGE_MII_WRITE(sc, AR71XX_MAC_MII_ADDR, addr);
-	ARGE_MII_WRITE(sc, AR71XX_MAC_MII_CONTROL, data);
+	ARGE_WRITE(sc, AR71XX_MAC_MII_ADDR, addr);
+	ARGE_WRITE(sc, AR71XX_MAC_MII_CONTROL, data);
 
 	i = ARGE_MII_TIMEOUT;
-	while ((ARGE_MII_READ(sc, AR71XX_MAC_MII_INDICATOR) &
+	while ((ARGE_READ(sc, AR71XX_MAC_MII_INDICATOR) &
 	    MAC_MII_INDICATOR_BUSY) && (i--))
 		DELAY(5);
 
@@ -636,7 +612,8 @@
 
 	if (i < 0) {
 		ARGEDEBUG(sc, ARGE_DBG_MII, "%s timedout\n", __func__);
-		return (-EIO);
+		/* XXX: return ERRNO istead? */
+		return (-1);
 	}
 
 	return (0);
@@ -667,6 +644,7 @@
 {
 	struct mii_data		*mii;
 	struct ifnet		*ifp;
+	uint32_t		media, duplex;
 
 	mii = device_get_softc(sc->arge_miibus);
 	ifp = sc->arge_ifp;
@@ -675,22 +653,14 @@
 		return;
 	}
 
-	if (sc->arge_media_speed) {
-		if (sc->arge_media_speed == 1000)
-			sc->arge_media_type = IFM_1000_T;
-		else
-			sc->arge_media_type = IFM_100_TX;
+	if (mii->mii_media_status & IFM_ACTIVE) {
 
-		arge_set_pll(sc, sc->arge_media_type, sc->arge_media_duplex);
-		ARGE_UNLOCK(sc);
-		return;
-	}
+		media = IFM_SUBTYPE(mii->mii_media_active);
 
-	if (mii->mii_media_status & IFM_ACTIVE) {
-		if (IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
+		if (media != IFM_NONE) {
 			sc->arge_link_status = 1;
-			arge_set_pll(sc, IFM_SUBTYPE(mii->mii_media_active),
-			    (mii->mii_media_active & IFM_GMASK));
+			duplex = mii->mii_media_active & IFM_GMASK;
+			arge_set_pll(sc, media, duplex);
 		}
 	} else {
 		sc->arge_link_status = 0;
@@ -702,7 +672,7 @@
 {
 	uint32_t		cfg, ifcontrol, rx_filtmask;
 	uint32_t		fifo_tx;
-	int 			if_speed;
+	int if_speed;
 
 	cfg = ARGE_READ(sc, AR71XX_MAC_CFG2);
 	cfg &= ~(MAC_CFG2_IFACE_MODE_1000
@@ -723,6 +693,11 @@
 		cfg |= MAC_CFG2_IFACE_MODE_10_100;
 		if_speed = 10;
 		break;
+	case IFM_100_TX:
+		cfg |= MAC_CFG2_IFACE_MODE_10_100;
+		ifcontrol |= MAC_IFCONTROL_SPEED;
+		if_speed = 100;
+		break;
 	case IFM_1000_T:
 	case IFM_1000_SX:
 		cfg |= MAC_CFG2_IFACE_MODE_1000;
@@ -730,13 +705,9 @@
 		if_speed = 1000;
 		break;
 	default:
+		if_speed = 100;
 		device_printf(sc->arge_dev,
 		    "Unknown media %d\n", media);
-	case IFM_100_TX:
-		cfg |= MAC_CFG2_IFACE_MODE_10_100;
-		ifcontrol |= MAC_IFCONTROL_SPEED;
-		if_speed = 100;
-		break;
 	}
 
 	switch (ar71xx_soc) {
@@ -819,28 +790,28 @@
 	ARGE_LOCK_ASSERT(sc);
 
 	arge_stop(sc);
-	/*
-	 * Reset ring consumer and producer values, etc.
-	 */
-	sc->arge_cdata.arge_rx_cons = 0;
 
-	sc->arge_cdata.arge_tx_prod = 0;
-	sc->arge_cdata.arge_tx_cons = 0;
-	sc->arge_cdata.arge_tx_cnt = 0;
+	/* Init circular RX list. */
+	if (arge_rx_ring_init(sc) != 0) {
+		device_printf(sc->arge_dev,
+		    "initialization failed: no memory for rx buffers\n");
+		arge_stop(sc);
+		return;
+	}
+
+	/* Init tx descriptors. */
+	arge_tx_ring_init(sc);
 
 	arge_reset_dma(sc);
 
-	sc->arge_link_status = 0;
 	mii = device_get_softc(sc->arge_miibus);
 	mii_mediachg(mii);
 
 	ifp->if_drv_flags |= IFF_DRV_RUNNING;
 	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 
-	if (sc->arge_miibus) {
-		callout_reset(&sc->arge_stat_callout, hz, arge_tick, sc);
-		arge_update_link_locked(sc);
-	}
+	callout_reset(&sc->arge_stat_callout, hz, arge_tick, sc);
+	arge_update_link_locked(sc);
 
 	ARGE_WRITE(sc, AR71XX_DMA_TX_DESC, ARGE_TX_RING_ADDR(sc, 0));
 	ARGE_WRITE(sc, AR71XX_DMA_RX_DESC, ARGE_RX_RING_ADDR(sc, 0));
@@ -1055,8 +1026,7 @@
 
 	ifp = sc->arge_ifp;
 	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
-	if (sc->arge_miibus)
-		callout_stop(&sc->arge_stat_callout);
+	callout_stop(&sc->arge_stat_callout);
 
 	/* mask out interrupts */
 	ARGE_WRITE(sc, AR71XX_DMA_INTR, 0);
@@ -1109,14 +1079,9 @@
 		break;
 	case SIOCGIFMEDIA:
 	case SIOCSIFMEDIA:
-		if (sc->arge_miibus) {
-			mii = device_get_softc(sc->arge_miibus);
-			error = ifmedia_ioctl(ifp, ifr, &mii->mii_media,
-			    command);
-		}
-		else
-			error = ifmedia_ioctl(ifp, ifr, &sc->arge_ifmedia,
-			    command);
+		mii = device_get_softc(sc->arge_miibus);
+		error = ifmedia_ioctl(ifp, ifr, &mii->mii_media,
+		    command);
 		break;
 	case SIOCSIFCAP:
 		/* XXX: Check other capabilities */
@@ -1282,8 +1247,7 @@
 	    NULL, NULL,			/* lockfunc, lockarg */
 	    &sc->arge_cdata.arge_tx_tag);
 	if (error != 0) {
-		device_printf(sc->arge_dev,
-		    "failed to create Tx DMA tag\n");
+		device_printf(sc->arge_dev, "failed to create Tx DMA tag\n");
 		goto fail;
 	}
 
@@ -1301,8 +1265,7 @@
 	    NULL, NULL,			/* lockfunc, lockarg */
 	    &sc->arge_cdata.arge_rx_tag);
 	if (error != 0) {
-		device_printf(sc->arge_dev,
-		    "failed to create Rx DMA tag\n");
+		device_printf(sc->arge_dev, "failed to create Rx DMA tag\n");
 		goto fail;
 	}
 
@@ -1579,18 +1542,15 @@
 	bus_dma_segment_t	segs[1];
 	bus_dmamap_t		map;
 	int			nsegs;
-	int err;
 
 	m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
 	if (m == NULL)
 		return (ENOBUFS);
-
 	m->m_len = m->m_pkthdr.len = MCLBYTES;
 	m_adj(m, sizeof(uint64_t));
 
-	err = bus_dmamap_load_mbuf_sg(sc->arge_cdata.arge_rx_tag,
-	    sc->arge_cdata.arge_rx_sparemap, m, segs, &nsegs, 0);
-	if (err != 0) {
+	if (bus_dmamap_load_mbuf_sg(sc->arge_cdata.arge_rx_tag,
+	    sc->arge_cdata.arge_rx_sparemap, m, segs, &nsegs, 0) != 0) {
 		m_freem(m);
 		return (ENOBUFS);
 	}
@@ -1746,7 +1706,6 @@
 
 		if ((cur_rx->packet_ctrl & ARGE_DESC_EMPTY) != 0)
 		       break;
-		sc->stats.rx_pkts++;
 
 		ARGE_WRITE(sc, AR71XX_DMA_RX_STATUS, DMA_RX_STATUS_PKT_RECVD);
 
@@ -1908,7 +1867,6 @@
 	 */
 	sc->arge_intr_status = 0;
 	ARGE_UNLOCK(sc);
-
 	/*
 	 * re-enable all interrupts
 	 */
@@ -1924,10 +1882,8 @@
 
 	ARGE_LOCK_ASSERT(sc);
 
-	if (sc->arge_miibus) {
-		mii = device_get_softc(sc->arge_miibus);
-		mii_tick(mii);
-		callout_reset(&sc->arge_stat_callout, hz, arge_tick, sc);
-	}
+	mii = device_get_softc(sc->arge_miibus);
+	mii_tick(mii);
+	callout_reset(&sc->arge_stat_callout, hz, arge_tick, sc);
 }
 


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