[Zrouter-src-freebsd] ZRouter.org: push to FreeBSD HEAD tree
zrouter-src-freebsd at zrouter.org
zrouter-src-freebsd at zrouter.org
Tue Apr 17 08:58:59 UTC 2012
details: http://zrouter.org/hg/FreeBSD/head//rev/f2935497fa04
changeset: 453:f2935497fa04
user: Aleksandr Rybalko <ray at ddteam.net>
date: Tue Apr 17 11:51:51 2012 +0300
description:
FreeBSD HEAD @svn 234370r.
diffstat:
head/Makefile =
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head/Makefile.inc1 =
| 63 +-
head/ObsoleteFiles.inc =
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| 2 +-
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| 7 +-
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| 2 +-
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| 2 +-
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| 2 +-
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| 10 +-
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| 2 +-
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| 230 +-
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| 183 +-
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| 125 +-
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| 340 +-
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| 28 -
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| 11 +-
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| 14 +-
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| 7 +-
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| 75 +-
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| 27 +-
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| 30 +-
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| 12 +
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| 52 +-
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| 50 +-
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| 15 +-
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| 95 +-
head/contrib/llvm/include/llvm/TableGen/Record.h =
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| 128 +-
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| 252 +-
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| 27 +-
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| 23 +-
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| 21 +-
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| 51 +-
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| 16 +-
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| 150 +-
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| 16 +
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| 6 +-
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| 4 -
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| 4 +-
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| 59 +-
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| 2 +-
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| 395 +-
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| 8 +-
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| 95 +-
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| 373 +-
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| 112 +-
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| 110 +-
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| 2 +
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| 13 +-
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| 6 +
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| 67 +-
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| 1557 +-
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| 1175 +-
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| 123 +-
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| 19 +-
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| 16 +-
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| 127 +-
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| 23 +-
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| 2 +-
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| 8 +-
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| 94 +-
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| 13 +-
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| 4 +-
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| 16 +-
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| 18 +-
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| 8 +-
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| 476 +-
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| 513 +-
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| 2 -
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| 8 +-
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| 985 +-
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| 31 +-
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| 6 +-
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| 62 +-
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| 127 +-
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| 15 +-
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| 4 +-
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| 680 +-
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| 40 +-
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| 320 +-
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| 44 +-
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| 29 +-
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| 73 +-
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| 19 +-
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| 304 +-
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| 45 +-
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| 42 +-
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| 87 +-
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| 299 +-
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| 68 +-
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| 427 +-
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| 56 +-
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| 46 +-
head/contrib/llvm/lib/CodeGen/BranchFolding.cpp =
| 129 +-
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| 2 +-
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| 17 +-
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| 9 +-
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| 72 +-
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| 31 +-
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| 701 +-
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| 2 +-
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| 524 +-
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| 14 +-
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| 12 +-
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| 6 +-
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| 160 +-
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| 132 +-
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| 191 +-
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| 35 +-
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| 15 +-
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| 5 -
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| 436 +-
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| 6 +-
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| 2 +
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| 23 +-
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| 36 +-
head/contrib/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp =
| 2144 +-
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| 2 +
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| 2 -
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| 4 +-
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| 110 +-
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| 114 +-
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| 10 +-
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| 221 +-
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| 65 +-
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| 108 +-
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| 91 +-
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| 5 +-
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| 252 +-
head/contrib/llvm/lib/CodeGen/MachineLICM.cpp =
| 616 +-
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| 18 +-
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| 1 +
head/contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp =
| 65 +-
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| 7 +-
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| 286 +-
head/contrib/llvm/lib/CodeGen/MachineVerifier.cpp =
| 468 +-
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| 9 +-
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| 13 +-
head/contrib/llvm/lib/CodeGen/Passes.cpp =
| 609 +-
head/contrib/llvm/lib/CodeGen/PeepholeOptimizer.cpp =
| 35 +-
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| 256 +-
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| 36 +-
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| 41 +-
head/contrib/llvm/lib/CodeGen/PrologEpilogInserter.h =
| 4 -
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| 2 -
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| 36 +-
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| 316 +-
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| 323 +-
head/contrib/llvm/lib/CodeGen/RegAllocGreedy.cpp =
| 110 +-
head/contrib/llvm/lib/CodeGen/RegAllocPBQP.cpp =
| 171 +-
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| 16 +-
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| 2 +-
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| 252 +-
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| 6 +-
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| 67 +-
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| 19 +-
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| 62 +-
head/contrib/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp =
| 654 +-
head/contrib/llvm/lib/CodeGen/ScheduleDAGPrinter.cpp =
| 24 +-
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head/contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp =
| 1128 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp =
| 215 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp =
| 67 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp =
| 117 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp =
| 1263 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp =
| 10 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp =
| 134 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp =
| 20 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h =
| 2 +
head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp =
| 13 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp =
| 140 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp =
| 163 +-
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| 30 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp =
| 656 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp =
| 130 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h =
| 40 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp =
| 1054 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp =
| 633 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h =
| 18 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp =
| 268 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp =
| 4 +-
head/contrib/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp =
| 215 +-
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| 775 +-
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| 12 +-
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| 81 +-
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| 85 +-
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| 15 +-
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| 7 +-
head/contrib/llvm/lib/CodeGen/StackSlotColoring.cpp =
| 358 +-
head/contrib/llvm/lib/CodeGen/StrongPHIElimination.cpp =
| 18 +-
head/contrib/llvm/lib/CodeGen/TailDuplication.cpp =
| 39 +-
head/contrib/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp =
| 106 +-
head/contrib/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp =
| 123 +-
head/contrib/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp =
| 525 +-
head/contrib/llvm/lib/CodeGen/VirtRegMap.cpp =
| 168 +-
head/contrib/llvm/lib/CodeGen/VirtRegMap.h =
| 335 +-
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| 2 +
head/contrib/llvm/lib/DebugInfo/DWARFContext.h =
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| 6 +-
head/contrib/llvm/lib/DebugInfo/DWARFDebugArangeSet.cpp =
| 5 +-
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| 7 +-
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| 4 +-
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| 4 +-
head/contrib/llvm/lib/DebugInfo/DWARFDebugLine.cpp =
| 7 +-
head/contrib/llvm/lib/DebugInfo/DWARFFormValue.cpp =
| 20 +-
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| 108 +-
head/contrib/llvm/lib/ExecutionEngine/ExecutionEngineBindings.cpp =
| 2 -
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| 29 +-
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| 31 +-
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| 7 +-
head/contrib/llvm/lib/ExecutionEngine/JIT/JIT.cpp =
| 45 +-
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| 11 +-
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| 2 +-
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| 43 +-
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| 194 +
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| 41 +-
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| 17 +-
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| 47 +-
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| 446 +-
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| 236 +-
head/contrib/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.cpp =
| 573 +-
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| 41 +-
head/contrib/llvm/lib/Linker/LinkArchives.cpp =
| 5 +-
head/contrib/llvm/lib/Linker/LinkModules.cpp =
| 513 +-
head/contrib/llvm/lib/Linker/Linker.cpp =
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| 935 +-
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| 21 +-
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| 4 +-
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| 15 +-
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| 7 +-
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| 106 +-
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| 124 +-
head/contrib/llvm/lib/MC/MCCodeGenInfo.cpp =
| 4 +-
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| 60 +-
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| 18 +-
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| 10 +
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| 116 +-
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| 23 +-
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| 20 +-
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| 29 +-
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| 158 +-
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| 42 +-
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| 2 +
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| 6 +-
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| 27 +-
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| 14 +-
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| 101 +-
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| 52 +-
head/contrib/llvm/lib/MC/MCObjectWriter.cpp =
| 14 +-
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| 279 +-
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| 17 +
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| 4 +
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| 4 +-
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| 15 +-
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| 109 +-
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| 7 +-
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| 24 +-
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| 89 +-
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| 20 +-
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| 142 +-
head/contrib/llvm/lib/Object/COFFObjectFile.cpp =
| 319 +-
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| 1415 +-
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| 35 +-
head/contrib/llvm/lib/Object/MachOObjectFile.cpp =
| 694 +-
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| 150 +
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| 127 +-
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| 12 +-
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| 13 +-
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| 26 +-
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| 100 +-
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| 26 +-
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| 77 +-
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| 13 +-
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| 8 +-
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| 38 +-
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| 109 +-
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| 36 +-
head/contrib/llvm/lib/Support/PathV2.cpp =
| 179 +-
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| 96 +-
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| 141 +-
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| 16 +-
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| 21 -
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| 61 +-
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| 168 +-
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| 8 +-
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| 16 +-
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| 12 +-
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| 20 +
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| 35 +-
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| 173 +-
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| 57 +-
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| 665 +-
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| 1317 +-
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| 539 +-
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| 1333 +-
head/contrib/llvm/lib/Target/ARM/ARMFrameLowering.cpp =
| 454 +-
head/contrib/llvm/lib/Target/ARM/ARMFrameLowering.h =
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| 28 +-
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| 8 +-
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| 284 +-
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| 1158 +-
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| 29 +-
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| 214 +-
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| 10 +-
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head/contrib/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp =
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| 116 +-
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| 22 +-
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| 21 +-
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| 31 +-
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| 141 +-
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| 140 +-
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head/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp =
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| 8 +-
head/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp =
| 11 +-
head/contrib/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h =
| 2 -
head/contrib/llvm/lib/Target/MSP430/MSP430.td =
| 2 +-
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| 2 +-
head/contrib/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp =
| 2 +-
head/contrib/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp =
| 6 +-
head/contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp =
| 40 +-
head/contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.h =
| 6 +-
head/contrib/llvm/lib/Target/MSP430/MSP430InstrFormats.td =
| 2 +-
head/contrib/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp =
| 32 +-
head/contrib/llvm/lib/Target/MSP430/MSP430InstrInfo.h =
| 4 +-
head/contrib/llvm/lib/Target/MSP430/MSP430InstrInfo.td =
| 2 +-
head/contrib/llvm/lib/Target/MSP430/MSP430MCInstLower.cpp =
| 11 +-
head/contrib/llvm/lib/Target/MSP430/MSP430MCInstLower.h =
| 3 +-
head/contrib/llvm/lib/Target/MSP430/MSP430MachineFunctionInfo.h =
| 2 +
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| 14 +-
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| 11 +-
head/contrib/llvm/lib/Target/MSP430/MSP430RegisterInfo.td =
| 2 +-
head/contrib/llvm/lib/Target/MSP430/MSP430Subtarget.cpp =
| 4 +-
head/contrib/llvm/lib/Target/MSP430/MSP430Subtarget.h =
| 6 +-
head/contrib/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp =
| 35 +-
head/contrib/llvm/lib/Target/MSP430/MSP430TargetMachine.h =
| 10 +-
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| 11 +-
head/contrib/llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp =
| 70 +-
head/contrib/llvm/lib/Target/Mips/InstPrinter/MipsInstPrinter.h =
| 16 +-
head/contrib/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp =
| 264 +-
head/contrib/llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h =
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head/contrib/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h =
| 122 +-
head/contrib/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp =
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head/contrib/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp =
| 256 +-
head/contrib/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp =
| 45 +-
head/contrib/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h =
| 25 +-
head/contrib/llvm/lib/Target/Mips/Mips.h =
| 2 -
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| 10 +-
head/contrib/llvm/lib/Target/Mips/Mips64InstrInfo.td =
| 241 +-
head/contrib/llvm/lib/Target/Mips/MipsAsmPrinter.cpp =
| 230 +-
head/contrib/llvm/lib/Target/Mips/MipsAsmPrinter.h =
| 20 +-
head/contrib/llvm/lib/Target/Mips/MipsCallingConv.td =
| 56 +-
head/contrib/llvm/lib/Target/Mips/MipsCodeEmitter.cpp =
| 223 +-
head/contrib/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp =
| 33 +-
head/contrib/llvm/lib/Target/Mips/MipsEmitGPRestore.cpp =
| 13 +-
head/contrib/llvm/lib/Target/Mips/MipsExpandPseudo.cpp =
| 20 +-
head/contrib/llvm/lib/Target/Mips/MipsFrameLowering.cpp =
| 200 +-
head/contrib/llvm/lib/Target/Mips/MipsFrameLowering.h =
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head/contrib/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp =
| 474 +-
head/contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp =
| 1323 +-
head/contrib/llvm/lib/Target/Mips/MipsISelLowering.h =
| 25 +-
head/contrib/llvm/lib/Target/Mips/MipsInstrFPU.td =
| 268 +-
head/contrib/llvm/lib/Target/Mips/MipsInstrFormats.td =
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head/contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp =
| 107 +-
head/contrib/llvm/lib/Target/Mips/MipsInstrInfo.h =
| 91 +-
head/contrib/llvm/lib/Target/Mips/MipsInstrInfo.td =
| 652 +-
head/contrib/llvm/lib/Target/Mips/MipsJITInfo.cpp =
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head/contrib/llvm/lib/Target/Mips/MipsJITInfo.h =
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head/contrib/llvm/lib/Target/Mips/MipsMCInstLower.cpp =
| 325 +-
head/contrib/llvm/lib/Target/Mips/MipsMCInstLower.h =
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head/contrib/llvm/lib/Target/Mips/MipsMachineFunction.h =
| 26 +-
head/contrib/llvm/lib/Target/Mips/MipsRegisterInfo.cpp =
| 256 +-
head/contrib/llvm/lib/Target/Mips/MipsRegisterInfo.h =
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head/contrib/llvm/lib/Target/Mips/MipsRegisterInfo.td =
| 136 +-
head/contrib/llvm/lib/Target/Mips/MipsRelocations.h =
| 10 +-
head/contrib/llvm/lib/Target/Mips/MipsSchedule.td =
| 2 +-
head/contrib/llvm/lib/Target/Mips/MipsSubtarget.cpp =
| 22 +-
head/contrib/llvm/lib/Target/Mips/MipsSubtarget.h =
| 8 +-
head/contrib/llvm/lib/Target/Mips/MipsTargetMachine.cpp =
| 120 +-
head/contrib/llvm/lib/Target/Mips/MipsTargetMachine.h =
| 42 +-
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head/contrib/llvm/lib/Target/PTX/InstPrinter/PTXInstPrinter.cpp =
| 77 +-
head/contrib/llvm/lib/Target/PTX/InstPrinter/PTXInstPrinter.h =
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head/contrib/llvm/lib/Target/PTX/MCTargetDesc/PTXBaseInfo.h =
| 71 +
head/contrib/llvm/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.cpp =
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head/contrib/llvm/lib/Target/PTX/PTXAsmPrinter.cpp =
| 348 +-
head/contrib/llvm/lib/Target/PTX/PTXAsmPrinter.h =
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head/contrib/llvm/lib/Target/PTX/PTXFPRoundingModePass.cpp =
| 6 +-
head/contrib/llvm/lib/Target/PTX/PTXFrameLowering.cpp =
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head/contrib/llvm/lib/Target/PTX/PTXFrameLowering.h =
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head/contrib/llvm/lib/Target/PTX/PTXISelLowering.cpp =
| 168 +-
head/contrib/llvm/lib/Target/PTX/PTXISelLowering.h =
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head/contrib/llvm/lib/Target/PTX/PTXInstrInfo.h =
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head/contrib/llvm/lib/Target/PTX/PTXIntrinsicInstrInfo.td =
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head/contrib/llvm/lib/Target/PTX/PTXMCAsmStreamer.cpp =
| 30 +-
head/contrib/llvm/lib/Target/PTX/PTXMFInfoExtract.cpp =
| 23 +-
head/contrib/llvm/lib/Target/PTX/PTXMachineFunctionInfo.h =
| 158 +-
head/contrib/llvm/lib/Target/PTX/PTXParamManager.cpp =
| 4 +-
head/contrib/llvm/lib/Target/PTX/PTXParamManager.h =
| 3 +-
head/contrib/llvm/lib/Target/PTX/PTXRegAlloc.cpp =
| 7 +-
head/contrib/llvm/lib/Target/PTX/PTXRegisterInfo.cpp =
| 46 +-
head/contrib/llvm/lib/Target/PTX/PTXRegisterInfo.h =
| 7 +-
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| 3 +-
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| 5 +-
head/contrib/llvm/lib/Target/PTX/PTXSubtarget.cpp =
| 6 +-
head/contrib/llvm/lib/Target/PTX/PTXSubtarget.h =
| 3 +-
head/contrib/llvm/lib/Target/PTX/PTXTargetMachine.cpp =
| 342 +-
head/contrib/llvm/lib/Target/PTX/PTXTargetMachine.h =
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head/contrib/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp =
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head/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp =
| 75 +-
head/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCBaseInfo.h =
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head/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h =
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head/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp =
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head/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp =
| 12 +-
head/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h =
| 10 +-
head/contrib/llvm/lib/Target/PowerPC/PPC.h =
| 5 +-
head/contrib/llvm/lib/Target/PowerPC/PPC.td =
| 16 +-
head/contrib/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp =
| 52 +-
head/contrib/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp =
| 2 +-
head/contrib/llvm/lib/Target/PowerPC/PPCCallingConv.td =
| 35 +-
head/contrib/llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp =
| 10 +-
head/contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp =
| 38 +-
head/contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.h =
| 2 +-
head/contrib/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp =
| 189 +-
head/contrib/llvm/lib/Target/PowerPC/PPCHazardRecognizers.h =
| 28 +-
head/contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp =
| 12 +-
head/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp =
| 256 +-
head/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.h =
| 36 +-
head/contrib/llvm/lib/Target/PowerPC/PPCInstr64Bit.td =
| 102 +-
head/contrib/llvm/lib/Target/PowerPC/PPCInstrAltivec.td =
| 54 +-
head/contrib/llvm/lib/Target/PowerPC/PPCInstrFormats.td =
| 63 +-
head/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp =
| 129 +-
head/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.h =
| 13 +-
head/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td =
| 97 +-
head/contrib/llvm/lib/Target/PowerPC/PPCJITInfo.cpp =
| 8 +-
head/contrib/llvm/lib/Target/PowerPC/PPCJITInfo.h =
| 2 +-
head/contrib/llvm/lib/Target/PowerPC/PPCMCInstLower.cpp =
| 4 +-
head/contrib/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h =
| 3 +-
head/contrib/llvm/lib/Target/PowerPC/PPCPerfectShuffle.h =
| 2 +-
head/contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp =
| 288 +-
head/contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.h =
| 10 +-
head/contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.td =
| 6 +-
head/contrib/llvm/lib/Target/PowerPC/PPCRelocations.h =
| 6 +-
head/contrib/llvm/lib/Target/PowerPC/PPCSchedule.td =
| 71 +-
head/contrib/llvm/lib/Target/PowerPC/PPCScheduleG3.td =
| 9 +-
head/contrib/llvm/lib/Target/PowerPC/PPCScheduleG4.td =
| 9 +-
head/contrib/llvm/lib/Target/PowerPC/PPCScheduleG4Plus.td =
| 9 +-
head/contrib/llvm/lib/Target/PowerPC/PPCScheduleG5.td =
| 9 +-
head/contrib/llvm/lib/Target/PowerPC/PPCSubtarget.cpp =
| 24 +-
head/contrib/llvm/lib/Target/PowerPC/PPCSubtarget.h =
| 12 +-
head/contrib/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp =
| 75 +-
head/contrib/llvm/lib/Target/PowerPC/PPCTargetMachine.h =
| 33 +-
head/contrib/llvm/lib/Target/Sparc/DelaySlotFiller.cpp =
| 18 +-
head/contrib/llvm/lib/Target/Sparc/FPMover.cpp =
| 8 +-
head/contrib/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp =
| 2 +
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head/contrib/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp =
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head/contrib/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h =
| 2 -
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| 5 +-
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| 6 +-
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| 22 +-
head/contrib/llvm/lib/Target/Sparc/SparcCallingConv.td =
| 6 +-
head/contrib/llvm/lib/Target/Sparc/SparcFrameLowering.cpp =
| 2 +-
head/contrib/llvm/lib/Target/Sparc/SparcFrameLowering.h =
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head/contrib/llvm/lib/Target/Sparc/SparcISelLowering.cpp =
| 50 +-
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| 8 +-
head/contrib/llvm/lib/Target/Sparc/SparcInstrFormats.td =
| 6 +-
head/contrib/llvm/lib/Target/Sparc/SparcInstrInfo.cpp =
| 19 +-
head/contrib/llvm/lib/Target/Sparc/SparcInstrInfo.h =
| 11 +-
head/contrib/llvm/lib/Target/Sparc/SparcInstrInfo.td =
| 6 +-
head/contrib/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.h =
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| 12 +-
head/contrib/llvm/lib/Target/Sparc/SparcRegisterInfo.h =
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head/contrib/llvm/lib/Target/Sparc/SparcRegisterInfo.td =
| 7 +-
head/contrib/llvm/lib/Target/Sparc/SparcSubtarget.cpp =
| 4 +-
head/contrib/llvm/lib/Target/Sparc/SparcSubtarget.h =
| 3 +-
head/contrib/llvm/lib/Target/Sparc/SparcTargetMachine.cpp =
| 65 +-
head/contrib/llvm/lib/Target/Sparc/SparcTargetMachine.h =
| 18 +-
head/contrib/llvm/lib/Target/TargetData.cpp =
| 123 +-
head/contrib/llvm/lib/Target/TargetInstrInfo.cpp =
| 42 -
head/contrib/llvm/lib/Target/TargetLibraryInfo.cpp =
| 112 +
head/contrib/llvm/lib/Target/TargetLoweringObjectFile.cpp =
| 38 +-
head/contrib/llvm/lib/Target/TargetMachine.cpp =
| 228 +-
head/contrib/llvm/lib/Target/TargetRegisterInfo.cpp =
| 4 +-
head/contrib/llvm/lib/Target/X86/AsmParser/X86AsmLexer.cpp =
| 7 +-
head/contrib/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp =
| 730 +-
head/contrib/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp =
| 239 +-
head/contrib/llvm/lib/Target/X86/Disassembler/X86Disassembler.h =
| 46 +-
head/contrib/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c =
| 80 +-
head/contrib/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h =
| 15 +-
head/contrib/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon=
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head/contrib/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp =
| 78 +-
head/contrib/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.h =
| 10 +-
head/contrib/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp =
| 329 +-
head/contrib/llvm/lib/Target/X86/InstPrinter/X86InstComments.h =
| 2 +-
head/contrib/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp =
| 72 +-
head/contrib/llvm/lib/Target/X86/InstPrinter/X86IntelInstPrinter.h =
| 9 +-
head/contrib/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp =
| 80 +-
head/contrib/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h =
| 111 +-
head/contrib/llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h =
| 2 +-
head/contrib/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp =
| 25 +-
head/contrib/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h =
| 22 +-
head/contrib/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp =
| 389 +-
head/contrib/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp =
| 105 +-
head/contrib/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h =
| 11 +
head/contrib/llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp =
| 193 +-
head/contrib/llvm/lib/Target/X86/Utils/X86ShuffleDecode.h =
| 84 +-
head/contrib/llvm/lib/Target/X86/X86.h =
| 2 -
head/contrib/llvm/lib/Target/X86/X86.td =
| 114 +-
head/contrib/llvm/lib/Target/X86/X86AsmPrinter.cpp =
| 48 +-
head/contrib/llvm/lib/Target/X86/X86AsmPrinter.h =
| 5 -
head/contrib/llvm/lib/Target/X86/X86COFFMachineModuleInfo.cpp =
| 2 +-
head/contrib/llvm/lib/Target/X86/X86COFFMachineModuleInfo.h =
| 4 +-
head/contrib/llvm/lib/Target/X86/X86CallingConv.td =
| 58 +-
head/contrib/llvm/lib/Target/X86/X86CodeEmitter.cpp =
| 18 +-
head/contrib/llvm/lib/Target/X86/X86ELFWriterInfo.cpp =
| 8 +-
head/contrib/llvm/lib/Target/X86/X86FastISel.cpp =
| 75 +-
head/contrib/llvm/lib/Target/X86/X86FloatingPoint.cpp =
| 33 +-
head/contrib/llvm/lib/Target/X86/X86FrameLowering.cpp =
| 384 +-
head/contrib/llvm/lib/Target/X86/X86FrameLowering.h =
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head/contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp =
| 548 +-
head/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp =
| 5585 +-
head/contrib/llvm/lib/Target/X86/X86ISelLowering.h =
| 202 +-
head/contrib/llvm/lib/Target/X86/X86Instr3DNow.td =
| 2 +-
head/contrib/llvm/lib/Target/X86/X86InstrArithmetic.td =
| 319 +-
head/contrib/llvm/lib/Target/X86/X86InstrBuilder.h =
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head/contrib/llvm/lib/Target/X86/X86InstrCMovSetCC.td =
| 28 +-
head/contrib/llvm/lib/Target/X86/X86InstrCompiler.td =
| 288 +-
head/contrib/llvm/lib/Target/X86/X86InstrControl.td =
| 196 +-
head/contrib/llvm/lib/Target/X86/X86InstrExtension.td =
| 84 +-
head/contrib/llvm/lib/Target/X86/X86InstrFMA.td =
| 204 +-
head/contrib/llvm/lib/Target/X86/X86InstrFPStack.td =
| 63 +-
head/contrib/llvm/lib/Target/X86/X86InstrFormats.td =
| 340 +-
head/contrib/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td =
| 215 +-
head/contrib/llvm/lib/Target/X86/X86InstrInfo.cpp =
| 441 +-
head/contrib/llvm/lib/Target/X86/X86InstrInfo.h =
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head/contrib/llvm/lib/Target/X86/X86InstrInfo.td =
| 221 +-
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| 30 +-
head/contrib/llvm/lib/Target/X86/X86InstrSSE.td =
| 6215 +-
head/contrib/llvm/lib/Target/X86/X86InstrShiftRotate.td =
| 548 +-
head/contrib/llvm/lib/Target/X86/X86InstrSystem.td =
| 72 +-
head/contrib/llvm/lib/Target/X86/X86InstrVMX.td =
| 38 +-
head/contrib/llvm/lib/Target/X86/X86JITInfo.cpp =
| 8 +-
head/contrib/llvm/lib/Target/X86/X86JITInfo.h =
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head/contrib/llvm/lib/Target/X86/X86MCInstLower.cpp =
| 45 +-
head/contrib/llvm/lib/Target/X86/X86MCInstLower.h =
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head/contrib/llvm/lib/Target/X86/X86MachineFunctionInfo.h =
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head/contrib/llvm/lib/Target/X86/X86RegisterInfo.cpp =
| 218 +-
head/contrib/llvm/lib/Target/X86/X86RegisterInfo.h =
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head/contrib/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp =
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head/contrib/llvm/lib/Target/X86/X86Subtarget.cpp =
| 131 +-
head/contrib/llvm/lib/Target/X86/X86Subtarget.h =
| 82 +-
head/contrib/llvm/lib/Target/X86/X86TargetMachine.cpp =
| 77 +-
head/contrib/llvm/lib/Target/X86/X86TargetMachine.h =
| 44 +-
head/contrib/llvm/lib/Target/X86/X86TargetObjectFile.cpp =
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head/contrib/llvm/lib/Target/X86/X86TargetObjectFile.h =
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head/contrib/llvm/lib/Target/X86/X86VZeroUpper.cpp =
| 234 +-
head/contrib/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp =
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head/contrib/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp =
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| 11 +-
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| 13 +-
head/contrib/llvm/lib/Target/XCore/XCoreISelLowering.cpp =
| 69 +-
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| 14 +-
head/contrib/llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp =
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| 227 +-
head/contrib/llvm/lib/Transforms/IPO/GlobalOpt.cpp =
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head/contrib/llvm/lib/Transforms/IPO/InlineAlways.cpp =
| 102 +-
head/contrib/llvm/lib/Transforms/IPO/InlineSimple.cpp =
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head/contrib/llvm/lib/Transforms/IPO/Inliner.cpp =
| 149 +-
head/contrib/llvm/lib/Transforms/IPO/Internalize.cpp =
| 7 +-
head/contrib/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp =
| 27 +-
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head/contrib/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp =
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head/contrib/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp =
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head/contrib/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cp=
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head/contrib/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp =
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head/contrib/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp =
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head/contrib/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.c=
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head/contrib/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp =
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head/contrib/llvm/lib/Transforms/InstCombine/InstCombineWorklist.h =
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head/contrib/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp =
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head/contrib/llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp =
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| 47 +-
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head/contrib/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp =
| 287 +-
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head/contrib/llvm/lib/Transforms/Scalar/GVN.cpp =
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head/contrib/llvm/lib/Transforms/Scalar/IndVarSimplify.cpp =
| 557 +-
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head/contrib/llvm/lib/Transforms/Scalar/LICM.cpp =
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| 166 +-
head/contrib/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp =
| 985 +-
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| 10 +-
head/contrib/llvm/lib/Transforms/Scalar/SCCP.cpp =
| 500 +-
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| 182 +-
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| 34 +-
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| 206 +-
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| 57 +-
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| 607 +-
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| 109 +-
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| 22 +-
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head/contrib/llvm/lib/VMCore/AsmWriter.cpp =
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head/contrib/llvm/lib/VMCore/AutoUpgrade.cpp =
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head/contrib/llvm/lib/VMCore/BasicBlock.cpp =
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head/contrib/llvm/lib/VMCore/Function.cpp =
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head/contrib/llvm/lib/VMCore/Instruction.cpp =
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head/contrib/llvm/lib/VMCore/Instructions.cpp =
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head/contrib/llvm/lib/VMCore/LLVMContext.cpp =
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head/contrib/llvm/lib/VMCore/LLVMContextImpl.cpp =
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head/contrib/llvm/lib/VMCore/LLVMContextImpl.h =
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head/contrib/llvm/lib/VMCore/Metadata.cpp =
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head/contrib/llvm/lib/VMCore/Module.cpp =
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head/contrib/llvm/lib/VMCore/PassManager.cpp =
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head/contrib/llvm/lib/VMCore/Type.cpp =
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head/contrib/llvm/lib/VMCore/Verifier.cpp =
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head/contrib/llvm/tools/clang/lib/ARCMigrate/TransARCAssign.cpp =
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head/contrib/llvm/tools/clang/lib/ARCMigrate/TransEmptyStatementsAndDeallo=
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head/contrib/llvm/tools/clang/lib/ARCMigrate/TransProperties.cpp =
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head/contrib/llvm/tools/clang/lib/ARCMigrate/TransRetainReleaseDealloc.cpp=
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head/contrib/llvm/tools/clang/lib/ARCMigrate/TransZeroOutPropsInDealloc.cp=
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head/contrib/llvm/tools/clang/lib/ARCMigrate/Transforms.cpp =
| 346 +-
head/contrib/llvm/tools/clang/lib/ARCMigrate/Transforms.h =
| 118 +-
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| 569 +-
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| 522 +-
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| 779 +-
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| 931 +-
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| 416 +-
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| 467 +-
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| 438 +-
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| 198 +-
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| 1009 +-
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| 538 +-
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| 90 +-
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| 5953 +-
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| 391 +-
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| 12 +-
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| 33 +-
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| 28 +-
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| 760 +-
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| 102 +-
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| 69 +-
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| 412 +-
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| 114 +-
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| 277 +-
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| 113 +-
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| 417 +-
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| 49 +-
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| 259 +-
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| 171 +-
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| 177 +-
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| 17 +-
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| 290 +-
head/contrib/llvm/tools/clang/lib/Analysis/ThreadSafety.cpp =
| 1531 +-
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| 10 +-
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| 143 +-
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| 126 +-
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| 231 +-
head/contrib/llvm/tools/clang/lib/Basic/FileManager.cpp =
| 27 +-
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| 43 +-
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| 144 +-
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| 962 +-
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| 143 +-
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| 387 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGBlocks.h =
| 47 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGBuiltin.cpp =
| 2692 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGCXX.cpp =
| 29 +-
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| 43 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGCXXABI.h =
| 34 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGCall.cpp =
| 627 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGCall.h =
| 154 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGClass.cpp =
| 362 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGCleanup.cpp =
| 74 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGDebugInfo.cpp =
| 956 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGDebugInfo.h =
| 42 +-
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| 243 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGDeclCXX.cpp =
| 222 +-
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| 145 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGExpr.cpp =
| 1023 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGExprAgg.cpp =
| 580 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGExprCXX.cpp =
| 296 +-
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| 66 +-
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| 923 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGExprScalar.cpp =
| 335 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGObjC.cpp =
| 842 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGObjCGNU.cpp =
| 296 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGObjCMac.cpp =
| 861 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGObjCRuntime.cpp =
| 74 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGObjCRuntime.h =
| 28 +-
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| 59 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CGRecordLayoutBuilder.cpp =
| 185 +-
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| 62 +-
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| 21 +-
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| 40 +-
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| 84 +-
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| 107 +-
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| 180 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CodeGenFunction.h =
| 407 +-
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| 619 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CodeGenModule.h =
| 115 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CodeGenTBAA.cpp =
| 6 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CodeGenTBAA.h =
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head/contrib/llvm/tools/clang/lib/CodeGen/CodeGenTypes.cpp =
| 44 +-
head/contrib/llvm/tools/clang/lib/CodeGen/CodeGenTypes.h =
| 97 +-
head/contrib/llvm/tools/clang/lib/CodeGen/ItaniumCXXABI.cpp =
| 328 +-
head/contrib/llvm/tools/clang/lib/CodeGen/MicrosoftCXXABI.cpp =
| 7 +
head/contrib/llvm/tools/clang/lib/CodeGen/ModuleBuilder.cpp =
| 17 +-
head/contrib/llvm/tools/clang/lib/CodeGen/TargetInfo.cpp =
| 1074 +-
head/contrib/llvm/tools/clang/lib/CodeGen/TargetInfo.h =
| 5 +-
head/contrib/llvm/tools/clang/lib/Driver/Action.cpp =
| 31 +
head/contrib/llvm/tools/clang/lib/Driver/Arg.cpp =
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| 30 +-
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| 2 +-
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| 2 +-
head/contrib/llvm/tools/clang/lib/Driver/Compilation.cpp =
| 8 +-
head/contrib/llvm/tools/clang/lib/Driver/Driver.cpp =
| 364 +-
head/contrib/llvm/tools/clang/lib/Driver/DriverOptions.cpp =
| 2 +-
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| 2 +
head/contrib/llvm/tools/clang/lib/Driver/Option.cpp =
| 2 -
head/contrib/llvm/tools/clang/lib/Driver/ToolChain.cpp =
| 187 +-
head/contrib/llvm/tools/clang/lib/Driver/ToolChains.cpp =
| 1513 +-
head/contrib/llvm/tools/clang/lib/Driver/ToolChains.h =
| 337 +-
head/contrib/llvm/tools/clang/lib/Driver/Tools.cpp =
| 1696 +-
head/contrib/llvm/tools/clang/lib/Driver/Tools.h =
| 97 +-
head/contrib/llvm/tools/clang/lib/Driver/Types.cpp =
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head/contrib/llvm/tools/clang/lib/Frontend/ASTConsumers.cpp =
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| 13 +-
head/contrib/llvm/tools/clang/lib/Frontend/ASTUnit.cpp =
| 746 +-
head/contrib/llvm/tools/clang/lib/Frontend/CacheTokens.cpp =
| 4 +-
head/contrib/llvm/tools/clang/lib/Frontend/CompilerInstance.cpp =
| 819 +-
head/contrib/llvm/tools/clang/lib/Frontend/CompilerInvocation.cpp =
| 816 +-
head/contrib/llvm/tools/clang/lib/Frontend/CreateInvocationFromCommandLine=
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head/contrib/llvm/tools/clang/lib/Frontend/DependencyFile.cpp =
| 64 +-
head/contrib/llvm/tools/clang/lib/Frontend/FrontendAction.cpp =
| 137 +-
head/contrib/llvm/tools/clang/lib/Frontend/FrontendActions.cpp =
| 314 +-
head/contrib/llvm/tools/clang/lib/Frontend/HeaderIncludeGen.cpp =
| 5 +-
head/contrib/llvm/tools/clang/lib/Frontend/InitHeaderSearch.cpp =
| 46 +-
head/contrib/llvm/tools/clang/lib/Frontend/InitPreprocessor.cpp =
| 128 +-
head/contrib/llvm/tools/clang/lib/Frontend/LangStandards.cpp =
| 3 +-
head/contrib/llvm/tools/clang/lib/Frontend/LogDiagnosticPrinter.cpp =
| 8 +-
head/contrib/llvm/tools/clang/lib/Frontend/MultiplexConsumer.cpp =
| 50 +-
head/contrib/llvm/tools/clang/lib/Frontend/PrintPreprocessedOutput.cpp =
| 8 +-
head/contrib/llvm/tools/clang/lib/Frontend/TextDiagnosticBuffer.cpp =
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head/contrib/llvm/tools/clang/lib/Frontend/TextDiagnosticPrinter.cpp =
| 1148 +-
head/contrib/llvm/tools/clang/lib/Frontend/VerifyDiagnosticConsumer.cpp =
| 38 +-
head/contrib/llvm/tools/clang/lib/Frontend/Warnings.cpp =
| 192 +-
head/contrib/llvm/tools/clang/lib/FrontendTool/ExecuteCompilerInvocation.c=
pp | 43 +-
head/contrib/llvm/tools/clang/lib/Headers/avxintrin.h =
| 319 +-
head/contrib/llvm/tools/clang/lib/Headers/emmintrin.h =
| 56 +-
head/contrib/llvm/tools/clang/lib/Headers/float.h =
| 11 +
head/contrib/llvm/tools/clang/lib/Headers/immintrin.h =
| 18 +-
head/contrib/llvm/tools/clang/lib/Headers/mm3dnow.h =
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head/contrib/llvm/tools/clang/lib/Headers/tgmath.h =
| 23 +-
head/contrib/llvm/tools/clang/lib/Headers/tmmintrin.h =
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head/contrib/llvm/tools/clang/lib/Headers/wmmintrin.h =
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head/contrib/llvm/tools/clang/lib/Headers/x86intrin.h =
| 26 +-
head/contrib/llvm/tools/clang/lib/Headers/xmmintrin.h =
| 21 +-
head/contrib/llvm/tools/clang/lib/Index/ASTLocation.cpp =
| 12 +-
head/contrib/llvm/tools/clang/lib/Index/Analyzer.cpp =
| 4 +-
head/contrib/llvm/tools/clang/lib/Lex/HeaderMap.cpp =
| 4 +-
head/contrib/llvm/tools/clang/lib/Lex/HeaderSearch.cpp =
| 520 +-
head/contrib/llvm/tools/clang/lib/Lex/Lexer.cpp =
| 442 +-
head/contrib/llvm/tools/clang/lib/Lex/LiteralSupport.cpp =
| 462 +-
head/contrib/llvm/tools/clang/lib/Lex/MacroArgs.cpp =
| 9 +-
head/contrib/llvm/tools/clang/lib/Lex/MacroInfo.cpp =
| 5 +-
head/contrib/llvm/tools/clang/lib/Lex/PPCaching.cpp =
| 22 +-
head/contrib/llvm/tools/clang/lib/Lex/PPDirectives.cpp =
| 354 +-
head/contrib/llvm/tools/clang/lib/Lex/PPExpressions.cpp =
| 22 +-
head/contrib/llvm/tools/clang/lib/Lex/PPLexerChange.cpp =
| 88 +-
head/contrib/llvm/tools/clang/lib/Lex/PPMacroExpansion.cpp =
| 134 +-
head/contrib/llvm/tools/clang/lib/Lex/PTHLexer.cpp =
| 6 +-
head/contrib/llvm/tools/clang/lib/Lex/Pragma.cpp =
| 211 +-
head/contrib/llvm/tools/clang/lib/Lex/PreprocessingRecord.cpp =
| 265 +-
head/contrib/llvm/tools/clang/lib/Lex/Preprocessor.cpp =
| 149 +-
head/contrib/llvm/tools/clang/lib/Lex/PreprocessorLexer.cpp =
| 2 +
head/contrib/llvm/tools/clang/lib/Lex/TokenConcatenation.cpp =
| 49 +-
head/contrib/llvm/tools/clang/lib/Lex/TokenLexer.cpp =
| 12 +-
head/contrib/llvm/tools/clang/lib/Parse/ParseAST.cpp =
| 35 +-
head/contrib/llvm/tools/clang/lib/Parse/ParseCXXInlineMethods.cpp =
| 118 +-
head/contrib/llvm/tools/clang/lib/Parse/ParseDecl.cpp =
| 1566 +-
head/contrib/llvm/tools/clang/lib/Parse/ParseDeclCXX.cpp =
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head/contrib/llvm/tools/clang/lib/Parse/ParseExpr.cpp =
| 365 +-
head/contrib/llvm/tools/clang/lib/Parse/ParseExprCXX.cpp =
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head/contrib/llvm/tools/clang/lib/Parse/ParseInit.cpp =
| 179 +-
head/contrib/llvm/tools/clang/lib/Parse/ParseObjc.cpp =
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| 118 +-
head/contrib/llvm/tools/clang/lib/Parse/ParsePragma.h =
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head/contrib/llvm/tools/clang/lib/Parse/ParseStmt.cpp =
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head/contrib/llvm/tools/clang/lib/Parse/ParseTemplate.cpp =
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head/contrib/llvm/tools/clang/lib/Parse/ParseTentative.cpp =
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head/contrib/llvm/tools/clang/lib/Parse/Parser.cpp =
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head/contrib/llvm/tools/clang/lib/Rewrite/FixItRewriter.cpp =
| 115 +-
head/contrib/llvm/tools/clang/lib/Rewrite/FrontendActions.cpp =
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head/contrib/llvm/tools/clang/lib/Rewrite/HTMLPrint.cpp =
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head/contrib/llvm/tools/clang/lib/Rewrite/HTMLRewrite.cpp =
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| 134 +-
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| 174 +-
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| 14 +-
head/usr.bin/tr/tr.1 =
| 50 +-
head/usr.bin/truss/Makefile =
| 4 +-
head/usr.bin/unifdef/unifdef.1 =
| 3 +-
head/usr.bin/units/units.1 =
| 36 +-
head/usr.bin/unzip/unzip.1 =
| 5 +-
head/usr.bin/unzip/unzip.c =
| 113 +-
head/usr.bin/vgrind/vgrindefs.5 =
| 5 +-
head/usr.bin/vmstat/vmstat.c =
| 24 +-
head/usr.bin/wall/wall.1 =
| 8 +-
head/usr.bin/wall/wall.c =
| 84 +-
head/usr.bin/xlint/Makefile.inc =
| 4 +-
head/usr.sbin/Makefile =
| 3 +-
head/usr.sbin/Makefile.mips =
| 6 +-
head/usr.sbin/ac/ac.8 =
| 4 +-
head/usr.sbin/acpi/iasl/Makefile =
| 15 +-
head/usr.sbin/adduser/adduser.conf.5 =
| 4 +-
head/usr.sbin/apmd/apmd.8 =
| 4 +-
head/usr.sbin/arp/arp.4 =
| 4 +-
head/usr.sbin/arp/arp.c =
| 6 +-
head/usr.sbin/bluetooth/ath3kfw/ath3kfw.8 =
| 6 +-
head/usr.sbin/boot0cfg/boot0cfg.8 =
| 3 +-
head/usr.sbin/bootparamd/bootparamd/bootparamd.8 =
| 4 +-
head/usr.sbin/bsdinstall/bsdinstall.8 =
| 6 +-
head/usr.sbin/bsdinstall/partedit/gpart_ops.c =
| 4 +-
head/usr.sbin/bsnmpd/modules/snmp_netgraph/snmp_netgraph.3 =
| 5 +-
head/usr.sbin/bsnmpd/modules/snmp_wlan/snmp_wlan.3 =
| 14 +-
head/usr.sbin/bsnmpd/tools/bsnmptools/bsnmpget.1 =
| 5 +-
head/usr.sbin/cdcontrol/cdcontrol.1 =
| 4 +-
head/usr.sbin/config/config.8 =
| 8 +-
head/usr.sbin/ctladm/ctladm.8 =
| 33 +-
head/usr.sbin/edquota/edquota.8 =
| 4 +-
head/usr.sbin/faithd/faithd.8 =
| 16 +-
head/usr.sbin/fdwrite/fdwrite.1 =
| 4 +-
head/usr.sbin/freebsd-update/freebsd-update.8 =
| 4 +-
head/usr.sbin/fwcontrol/fwcontrol.8 =
| 8 +-
head/usr.sbin/gpioctl/gpioctl.8 =
| 7 +-
head/usr.sbin/i2c/i2c.8 =
| 10 +-
head/usr.sbin/ifmcstat/ifmcstat.8 =
| 3 +-
head/usr.sbin/lmcconfig/lmcconfig.8 =
| 6 +-
head/usr.sbin/lpr/lpc/cmds.c =
| 10 +-
head/usr.sbin/lpr/lpr/printcap.5 =
| 4 +-
head/usr.sbin/makefs/cd9660/cd9660_eltorito.c =
| 38 +-
head/usr.sbin/mfiutil/mfi_config.c =
| 9 +-
head/usr.sbin/mfiutil/mfi_drive.c =
| 4 +-
head/usr.sbin/mfiutil/mfiutil.8 =
| 7 +-
head/usr.sbin/mountd/exports.5 =
| 6 +-
head/usr.sbin/mptutil/mptutil.8 =
| 7 +-
head/usr.sbin/mtest/mtest.8 =
| 3 +-
head/usr.sbin/mtree/mtree.5 =
| 3 +-
head/usr.sbin/newsyslog/newsyslog.c =
| 9 +-
head/usr.sbin/newsyslog/newsyslog.conf.5 =
| 8 +-
head/usr.sbin/nfsd/nfsv4.4 =
| 4 +-
head/usr.sbin/ntp/doc/ntp-keygen.8 =
| 3 +-
head/usr.sbin/ntp/doc/ntpdate.8 =
| 3 +-
head/usr.sbin/pciconf/pciconf.8 =
| 4 +-
head/usr.sbin/pkg_install/updating/pkg_updating.1 =
| 8 +-
head/usr.sbin/pmcstat/pmcpl_calltree.c =
| 626 +-
head/usr.sbin/pmcstat/pmcstat.8 =
| 4 +-
head/usr.sbin/pmcstat/pmcstat_log.c =
| 42 +-
head/usr.sbin/powerd/powerd.c =
| 5 +-
head/usr.sbin/rtadvd/rtadvd.8 =
| 4 +-
head/usr.sbin/rtadvd/rtadvd.conf.5 =
| 10 +-
head/usr.sbin/setfib/setfib.1 =
| 4 +-
head/usr.sbin/tcpdump/tcpdump/tcpdump.1 =
| 18 +-
head/usr.sbin/timed/timed/timed.8 =
| 8 +-
head/usr.sbin/utx/utx.8 =
| 3 +-
head/usr.sbin/wlandebug/wlandebug.8 =
| 4 +-
head/usr.sbin/wlconfig/wlconfig.8 =
| 10 +-
head/usr.sbin/ypserv/ypserv.8 =
| 4 +-
5218 files changed, 303068 insertions(+), 216015 deletions(-)
diffs (901657 lines):
diff -r 428842767fa6 -r f2935497fa04 head/Makefile
--- a/head/Makefile Tue Apr 17 11:36:47 2012 +0300
+++ b/head/Makefile Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
#
-# $FreeBSD: head/Makefile 232907 2012-03-13 00:38:49Z jmallett $
+# $FreeBSD: head/Makefile 233644 2012-03-29 02:54:35Z jmallett $
#
# The user-driven targets are:
#
@@ -132,20 +132,19 @@
=20
# Guess machine architecture from machine type, and vice versa.
.if !defined(TARGET_ARCH) && defined(TARGET)
-_TARGET_ARCH=3D ${TARGET:S/pc98/i386/:S/mips/mipsel/}
+_TARGET_ARCH=3D ${TARGET:S/pc98/i386/}
.elif !defined(TARGET) && defined(TARGET_ARCH) && \
${TARGET_ARCH} !=3D ${MACHINE_ARCH}
-_TARGET=3D ${TARGET_ARCH:C/mips.*e[lb]/mips/:C/armeb/arm/}
+_TARGET=3D ${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/armeb/arm/}
.endif
-# Legacy names, for a transition period mips:mips -> mipsel:mips
+# Legacy names, for another transition period mips:mips(n32|64)?eb -> mips=
:mips\1
.if defined(TARGET) && defined(TARGET_ARCH) && \
- ${TARGET_ARCH} =3D=3D "mips" && ${TARGET} =3D=3D "mips"
-.warning "TARGET_ARCH of mips is deprecated in favor of mipsel or mipseb"
-.if defined(TARGET_BIG_ENDIAN)
-_TARGET_ARCH=3Dmipseb
-.else
-_TARGET_ARCH=3Dmipsel
+ ${TARGET} =3D=3D "mips" && ${TARGET_ARCH:Mmips*eb}
+_TARGET_ARCH=3D ${TARGET_ARCH:C/eb$//}
+.warning "TARGET_ARCH of ${TARGET_ARCH} is deprecated in favor of ${_TARGE=
T_ARCH}"
.endif
+.if defined(TARGET) && ${TARGET} =3D=3D "mips" && defined(TARGET_BIG_ENDIA=
N)
+.warning "TARGET_BIG_ENDIAN is no longer necessary for MIPS. Big-endian i=
s not the default."
.endif
# arm with TARGET_BIG_ENDIAN -> armeb
.if defined(TARGET_ARCH) && ${TARGET_ARCH} =3D=3D "arm" && defined(TARGET_=
BIG_ENDIAN)
@@ -331,7 +330,7 @@
.if make(universe) || make(universe_kernels) || make(tinderbox) || make(ta=
rgets)
TARGETS?=3Damd64 arm i386 ia64 mips pc98 powerpc sparc64
TARGET_ARCHES_arm?=3D arm armeb
-TARGET_ARCHES_mips?=3D mipsel mipseb mips64el mips64eb mipsn32eb
+TARGET_ARCHES_mips?=3D mipsel mips mips64el mips64 mipsn32
TARGET_ARCHES_powerpc?=3D powerpc powerpc64
TARGET_ARCHES_pc98?=3D i386
.for target in ${TARGETS}
diff -r 428842767fa6 -r f2935497fa04 head/Makefile.inc1
--- a/head/Makefile.inc1 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/Makefile.inc1 Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
#
-# $FreeBSD: head/Makefile.inc1 233098 2012-03-17 22:12:09Z peter $
+# $FreeBSD: head/Makefile.inc1 233645 2012-03-29 03:04:59Z jmallett $
#
# Make command line options:
# -DNO_CLEANDIR run ${MAKE} clean, instead of ${MAKE} cleandir
@@ -137,7 +137,7 @@
VERSION+=3D ${OSRELDATE}
.endif
=20
-KNOWN_ARCHES?=3D amd64 arm armeb/arm i386 i386/pc98 ia64 mipsel/mips mipse=
b/mips mips64el/mips mips64eb/mips mipsn32el/mips mipsn32eb/mips powerpc po=
werpc64/powerpc sparc64
+KNOWN_ARCHES?=3D amd64 arm armeb/arm i386 i386/pc98 ia64 mips mipsel/mips =
mips64el/mips mips64/mips mipsn32el/mips mipsn32/mips powerpc powerpc64/pow=
erpc sparc64
.if ${TARGET} =3D=3D ${TARGET_ARCH}
_t=3D ${TARGET}
.else
@@ -471,13 +471,6 @@
-p ${LIB32TMP}/usr/include >/dev/null
mkdir -p ${WORLDTMP}
ln -sf ${.CURDIR}/sys ${WORLDTMP}
-.if ${MK_KERBEROS} !=3D "no"
-.for _t in obj depend all
- cd ${.CURDIR}/kerberos5/tools; \
- MAKEOBJDIRPREFIX=3D${OBJTREE}/lib32 ${MAKE} SSP_CFLAGS=3D DESTDIR=3D \
- DIRPRFX=3Dkerberos5/tools/ ${_t}
-.endfor
-.endif
.for _t in obj includes
cd ${.CURDIR}/include; ${LIB32WMAKE} DIRPRFX=3Dinclude/ ${_t}
cd ${.CURDIR}/lib; ${LIB32WMAKE} DIRPRFX=3Dlib/ ${_t}
@@ -1071,9 +1064,11 @@
usr.bin/clang/clang-tblgen
.endif
=20
+# dtrace tools are required for older bootstrap env and cross-build
.if ${MK_CDDL} !=3D "no" && \
- ${BOOTSTRAPPING} < 800038 && \
- !(${BOOTSTRAPPING} >=3D 700112 && ${BOOTSTRAPPING} < 799999)
+ ((${BOOTSTRAPPING} < 800038 && \
+ !(${BOOTSTRAPPING} >=3D 700112 && ${BOOTSTRAPPING} < 799999)) \
+ || (${MACHINE} !=3D ${TARGET} || ${MACHINE_ARCH} !=3D ${TARGET_ARCH}=
))
_dtrace_tools=3D cddl/usr.bin/sgsmsg cddl/lib/libctf lib/libelf \
lib/libdwarf cddl/usr.bin/ctfconvert cddl/usr.bin/ctfmerge
.endif
@@ -1082,12 +1077,22 @@
_dtc=3D gnu/usr.bin/dtc
.endif
=20
+.if ${MK_KERBEROS} !=3D "no"
+_kerberos5_bootstrap_tools=3D \
+ kerberos5/tools/make-roken \
+ kerberos5/lib/libroken \
+ kerberos5/lib/libvers \
+ kerberos5/tools/asn1_compile \
+ kerberos5/tools/slc
+.endif
+
# Please document (add comment) why something is in 'bootstrap-tools'.
# Try to bound the building of the bootstrap-tool to just the
# FreeBSD versions that need the tool built at this stage of the build.
bootstrap-tools:
.for _tool in \
${_clang_tblgen} \
+ ${_kerberos5_bootstrap_tools} \
${_dtrace_tools} \
${_strfile} \
${_gperf} \
@@ -1129,10 +1134,6 @@
_gcc_tools=3D gnu/usr.bin/cc/cc_tools
.endif
=20
-.if ${MK_KERBEROS} !=3D "no"
-_kerberos5_tools=3D kerberos5/tools
-.endif
-
.if ${MK_RESCUE} !=3D "no"
_rescue=3D rescue/rescue
.endif
@@ -1157,8 +1158,7 @@
${MAKE} DIRPRFX=3D${_tool}/ build-tools
.endfor
.for _tool in \
- ${_gcc_tools} \
- ${_kerberos5_tools}
+ ${_gcc_tools}
${_+_}@${ECHODIR} "=3D=3D=3D> ${_tool} (obj,depend,all)"; \
cd ${.CURDIR}/${_tool}; \
${MAKE} DIRPRFX=3D${_tool}/ obj; \
@@ -1264,11 +1264,16 @@
lib/libcxxrt__L: gnu/lib/libgcc__L
.endif
=20
-_prebuild_libs=3D ${_kerberos5_lib_libasn1} ${_kerberos5_lib_libhdb} \
+_prebuild_libs=3D ${_kerberos5_lib_libasn1} \
+ ${_kerberos5_lib_libhdb} \
+ ${_kerberos5_lib_libheimbase} \
${_kerberos5_lib_libheimntlm} \
+ ${_kerberos5_lib_libheimsqlite} \
+ ${_kerberos5_lib_libheimipcc} \
${_kerberos5_lib_libhx509} ${_kerberos5_lib_libkrb5} \
${_kerberos5_lib_libroken} \
- lib/libbz2 lib/libcom_err lib/libcrypt \
+ ${_kerberos5_lib_libwind} \
+ lib/libbz2 ${_libcom_err} lib/libcrypt \
lib/libexpat \
${_lib_libgssapi} ${_lib_libipx} \
lib/libkiconv lib/libkvm lib/liblzma lib/libmd \
@@ -1318,14 +1323,21 @@
.if ${MK_KERBEROS} !=3D "no"
kerberos5/lib/libasn1__L: lib/libcom_err__L kerberos5/lib/libroken__L
kerberos5/lib/libhdb__L: kerberos5/lib/libasn1__L lib/libcom_err__L \
- kerberos5/lib/libkrb5__L kerberos5/lib/libroken__L
-kerberos5/lib/libheimntlm__L: secure/lib/libcrypto__L kerberos5/lib/libkrb=
5__L
+ kerberos5/lib/libkrb5__L kerberos5/lib/libroken__L \
+ kerberos5/lib/libwind__L kerberos5/lib/libheimsqlite__L=20
+kerberos5/lib/libheimntlm__L: secure/lib/libcrypto__L kerberos5/lib/libkrb=
5__L \
+ kerberos5/lib/libroken__L lib/libcom_err__L
kerberos5/lib/libhx509__L: kerberos5/lib/libasn1__L lib/libcom_err__L \
- secure/lib/libcrypto__L kerberos5/lib/libroken__L
+ secure/lib/libcrypto__L kerberos5/lib/libroken__L kerberos5/lib/libwin=
d__L
kerberos5/lib/libkrb5__L: kerberos5/lib/libasn1__L lib/libcom_err__L \
lib/libcrypt__L secure/lib/libcrypto__L kerberos5/lib/libhx509__L \
- kerberos5/lib/libroken__L
+ kerberos5/lib/libroken__L kerberos5/lib/libwind__L \
+ kerberos5/lib/libheimbase__L kerberos5/lib/libheimipcc__L
kerberos5/lib/libroken__L: lib/libcrypt__L
+kerberos5/lib/libwind__L: kerberos5/lib/libroken__L lib/libcom_err__L
+kerberos5/lib/libheimbase__L: lib/libthr__L
+kerberos5/lib/libheimipcc__L: kerberos5/lib/libroken__L kerberos5/lib/libh=
eimbase__L lib/libthr__L
+kerberos5/lib/libheimsqlite__L: lib/libthr__L
.endif
=20
.if ${MK_GSSAPI} !=3D "no"
@@ -1340,10 +1352,15 @@
_kerberos5_lib=3D kerberos5/lib
_kerberos5_lib_libasn1=3D kerberos5/lib/libasn1
_kerberos5_lib_libhdb=3D kerberos5/lib/libhdb
+_kerberos5_lib_libheimbase=3D kerberos5/lib/libheimbase
_kerberos5_lib_libkrb5=3D kerberos5/lib/libkrb5
_kerberos5_lib_libhx509=3D kerberos5/lib/libhx509
_kerberos5_lib_libroken=3D kerberos5/lib/libroken
_kerberos5_lib_libheimntlm=3D kerberos5/lib/libheimntlm
+_kerberos5_lib_libheimsqlite=3D kerberos5/lib/libheimsqlite
+_kerberos5_lib_libheimipcc=3D kerberos5/lib/libheimipcc
+_kerberos5_lib_libwind=3D kerberos5/lib/libwind
+_libcom_err=3D lib/libcom_err
.endif
=20
.if ${MK_NIS} !=3D "no"
diff -r 428842767fa6 -r f2935497fa04 head/ObsoleteFiles.inc
--- a/head/ObsoleteFiles.inc Tue Apr 17 11:36:47 2012 +0300
+++ b/head/ObsoleteFiles.inc Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
#
-# $FreeBSD: head/ObsoleteFiles.inc 233010 2012-03-15 17:01:25Z pluknet $
+# $FreeBSD: head/ObsoleteFiles.inc 234353 2012-04-16 21:23:25Z dim $
#
# This file lists old files (OLD_FILES), libraries (OLD_LIBS) and
# directories (OLD_DIRS) which should get removed at an update. Recently
@@ -38,6 +38,63 @@
# xargs -n1 | sort | uniq -d;
# done
=20
+# 20120415: new clang import which bumps version from 3.0 to 3.1
+OLD_FILES+=3Dusr/include/clang/3.0/altivec.h
+OLD_FILES+=3Dusr/include/clang/3.0/avxintrin.h
+OLD_FILES+=3Dusr/include/clang/3.0/emmintrin.h
+OLD_FILES+=3Dusr/include/clang/3.0/immintrin.h
+OLD_FILES+=3Dusr/include/clang/3.0/mm3dnow.h
+OLD_FILES+=3Dusr/include/clang/3.0/mm_malloc.h
+OLD_FILES+=3Dusr/include/clang/3.0/mmintrin.h
+OLD_FILES+=3Dusr/include/clang/3.0/nmmintrin.h
+OLD_FILES+=3Dusr/include/clang/3.0/pmmintrin.h
+OLD_FILES+=3Dusr/include/clang/3.0/smmintrin.h
+OLD_FILES+=3Dusr/include/clang/3.0/tmmintrin.h
+OLD_FILES+=3Dusr/include/clang/3.0/wmmintrin.h
+OLD_FILES+=3Dusr/include/clang/3.0/x86intrin.h
+OLD_FILES+=3Dusr/include/clang/3.0/xmmintrin.h
+OLD_DIRS+=3Dusr/include/clang/3.0
+# 20120322: Update heimdal to 1.5.1.
+OLD_FILES+=3Dusr/include/krb5-v4compat.h \
+ usr/include/krb_err.h \
+ usr/include/hdb-private.h \
+ usr/share/man/man3/krb5_addresses.3.gz \
+ usr/share/man/man3/krb5_cc_cursor.3.gz \
+ usr/share/man/man3/krb5_cc_ops.3.gz \
+ usr/share/man/man3/krb5_config.3.gz \
+ usr/share/man/man3/krb5_config_get_int_default.3.gz \
+ usr/share/man/man3/krb5_context.3.gz \
+ usr/share/man/man3/krb5_data.3.gz \
+ usr/share/man/man3/krb5_err.3.gz \
+ usr/share/man/man3/krb5_errx.3.gz \
+ usr/share/man/man3/krb5_keyblock.3.gz \
+ usr/share/man/man3/krb5_keytab_entry.3.gz \
+ usr/share/man/man3/krb5_kt_cursor.3.gz \
+ usr/share/man/man3/krb5_kt_ops.3.gz \
+ usr/share/man/man3/krb5_set_warn_dest.3.gz \
+ usr/share/man/man3/krb5_verr.3.gz \
+ usr/share/man/man3/krb5_verrx.3.gz \
+ usr/share/man/man3/krb5_vwarnx.3.gz \
+ usr/share/man/man3/krb5_warn.3.gz \
+ usr/share/man/man3/krb5_warnx.3.gz
+OLD_LIBS+=3Dusr/lib/libasn1.so.10 \
+ usr/lib/libhdb.so.10 \
+ usr/lib/libheimntlm.so.10 \
+ usr/lib/libhx509.so.10 \
+ usr/lib/libkadm5clnt.so.10 \
+ usr/lib/libkadm5srv.so.10 \
+ usr/lib/libkafs5.so.10 \
+ usr/lib/libkrb5.so.10 \
+ usr/lib/libroken.so.10 \
+ usr/lib32/libasn1.so.10 \
+ usr/lib32/libhdb.so.10 \
+ usr/lib32/libheimntlm.so.10 \
+ usr/lib32/libhx509.so.10 \
+ usr/lib32/libkadm5clnt.so.10 \
+ usr/lib32/libkadm5srv.so.10 \
+ usr/lib32/libkafs5.so.10 \
+ usr/lib32/libkrb5.so.10 \
+ usr/lib32/libroken.so.10
# 20120309: Remove fifofs header files.
OLD_FILES+=3Dusr/include/fs/fifofs/fifo.h
OLD_DIRS+=3Dusr/include/fs/fifofs
@@ -4567,9 +4624,7 @@
OLD_FILES+=3Dusr/share/man/man3/SSL_COMP_add_compression_method.3.gz
OLD_FILES+=3Dusr/share/man/man3/SSL_CTX_get_ex_new_index.3.gz
OLD_FILES+=3Dusr/share/man/man3/archive_entry_dup.3.gz
-OLD_FILES+=3Dusr/share/man/man3/archive_entry_hardlink_w.3.gz
OLD_FILES+=3Dusr/share/man/man3/archive_entry_set_tartype.3.gz
-OLD_FILES+=3Dusr/share/man/man3/archive_entry_symlink_w.3.gz
OLD_FILES+=3Dusr/share/man/man3/archive_entry_tartype.3.gz
OLD_FILES+=3Dusr/share/man/man3/archive_read_data_into_file.3.gz
OLD_FILES+=3Dusr/share/man/man3/archive_read_open_tar.3.gz
diff -r 428842767fa6 -r f2935497fa04 head/UPDATING
--- a/head/UPDATING Tue Apr 17 11:36:47 2012 +0300
+++ b/head/UPDATING Tue Apr 17 11:51:51 2012 +0300
@@ -22,6 +22,13 @@
machines to maximize performance. (To disable malloc debugging, run
ln -s aj /etc/malloc.conf.)
=20
+20120328:
+ Big-endian MIPS TARGET_ARCH values no longer end in "eb". mips64eb
+ is now spelled mips64. mipsn32eb is now spelled mipsn32. mipseb is
+ now spelled mips. This is to aid compatibility with third-party
+ software that expects this naming scheme in uname(3). Little-endian
+ settings are unchanged.
+
20120306:
Disable by default the option VFS_ALLOW_NONMPSAFE for all supported
platforms.
@@ -1569,4 +1576,4 @@
Contact Warner Losh if you have any questions about your use of
this document.
=20
-$FreeBSD: head/UPDATING 232619 2012-03-06 20:01:25Z attilio $
+$FreeBSD: head/UPDATING 233644 2012-03-29 02:54:35Z jmallett $
diff -r 428842767fa6 -r f2935497fa04 head/bin/kenv/kenv.1
--- a/head/bin/kenv/kenv.1 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/bin/kenv/kenv.1 Tue Apr 17 11:51:51 2012 +0300
@@ -22,7 +22,7 @@
.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
.\" SUCH DAMAGE.
.\"
-.\" $FreeBSD$
+.\" $FreeBSD: head/bin/kenv/kenv.1 233457 2012-03-25 09:20:14Z joel $
.\"
.Dd January 13, 2009
.Dt KENV 1
@@ -84,7 +84,6 @@
character except '=3D' is acceptable as part of a name. Quotes
are optional and necessary only if the value contains
whitespace.
-.Pp
.Sh SEE ALSO
.Xr kenv 2 ,
.Xr config 5 ,
diff -r 428842767fa6 -r f2935497fa04 head/bin/ps/ps.1
--- a/head/bin/ps/ps.1 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/bin/ps/ps.1 Tue Apr 17 11:51:51 2012 +0300
@@ -27,7 +27,7 @@
.\" SUCH DAMAGE.
.\"
.\" @(#)ps.1 8.3 (Berkeley) 4/18/94
-.\" $FreeBSD: head/bin/ps/ps.1 232694 2012-03-08 13:00:49Z kib $
+.\" $FreeBSD: head/bin/ps/ps.1 233665 2012-03-29 16:02:40Z joel $
.\"
.Dd March 8, 2012
.Dt PS 1
@@ -292,37 +292,37 @@
the include file
.In sys/proc.h :
.Bl -column P_SINGLE_BOUNDARY 0x40000000
-.It Dv "P_ADVLOCK" Ta No "0x00001 Process may hold a POSIX advisory lock"
-.It Dv "P_CONTROLT" Ta No "0x00002 Has a controlling terminal"
-.It Dv "P_KTHREAD" Ta No "0x00004 Kernel thread"
-.It Dv "P_FOLLOWFORK" Ta No "0x00008 Attach debugger to new children"
-.It Dv "P_PPWAIT" Ta No "0x00010 Parent is waiting for child to exec/exit"
-.It Dv "P_PROFIL" Ta No "0x00020 Has started profiling"
-.It Dv "P_STOPPROF" Ta No "0x00040 Has thread in requesting to stop prof"
-.It Dv "P_HADTHREADS" Ta No "0x00080 Has had threads (no cleanup shortcuts=
)"
-.It Dv "P_SUGID" Ta No "0x00100 Had set id privileges since last exec"
-.It Dv "P_SYSTEM" Ta No "0x00200 System proc: no sigs, stats or swapping"
-.It Dv "P_SINGLE_EXIT" Ta No "0x00400 Threads suspending should exit, not =
wait"
-.It Dv "P_TRACED" Ta No "0x00800 Debugged process being traced"
-.It Dv "P_WAITED" Ta No "0x01000 Someone is waiting for us"
-.It Dv "P_WEXIT" Ta No "0x02000 Working on exiting"
-.It Dv "P_EXEC" Ta No "0x04000 Process called exec"
-.It Dv "P_WKILLED" Ta No "0x08000 Killed, shall go to kernel/user boundary=
ASAP"
-.It Dv "P_CONTINUED" Ta No "0x10000 Proc has continued from a stopped stat=
e"
-.It Dv "P_STOPPED_SIG" Ta No "0x20000 Stopped due to SIGSTOP/SIGTSTP"
-.It Dv "P_STOPPED_TRACE" Ta No "0x40000 Stopped because of tracing"
-.It Dv "P_STOPPED_SINGLE" Ta No "0x80000 Only one thread can continue"
-.It Dv "P_PROTECTED" Ta No "0x100000 Do not kill on memory overcommit"
-.It Dv "P_SIGEVENT" Ta No "0x200000 Process pending signals changed"
-.It Dv "P_SINGLE_BOUNDARY" Ta No "0x400000 Threads should suspend at user =
boundary"
-.It Dv "P_HWPMC" Ta No "0x800000 Process is using HWPMCs"
-.It Dv "P_JAILED" Ta No "0x1000000 Process is in jail"
-.It Dv "P_ORPHAN" Ta No "0x2000000 Orphaned by original parent, reparented=
to debugger"
-.It Dv "P_INEXEC" Ta No "0x4000000 Process is in execve()"
-.It Dv "P_STATCHILD" Ta No "0x8000000 Child process stopped or exited"
-.It Dv "P_INMEM" Ta No "0x10000000 Loaded into memory"
-.It Dv "P_SWAPPINGOUT" Ta No "0x20000000 Process is being swapped out"
-.It Dv "P_SWAPPINGIN" Ta No "0x40000000 Process is being swapped in"
+.It Dv "P_ADVLOCK" Ta No "0x00001" Ta "Process may hold a POSIX advisory l=
ock"
+.It Dv "P_CONTROLT" Ta No "0x00002" Ta "Has a controlling terminal"
+.It Dv "P_KTHREAD" Ta No "0x00004" Ta "Kernel thread"
+.It Dv "P_FOLLOWFORK" Ta No "0x00008" Ta "Attach debugger to new children"
+.It Dv "P_PPWAIT" Ta No "0x00010" Ta "Parent is waiting for child to exec/=
exit"
+.It Dv "P_PROFIL" Ta No "0x00020" Ta "Has started profiling"
+.It Dv "P_STOPPROF" Ta No "0x00040" Ta "Has thread in requesting to stop p=
rof"
+.It Dv "P_HADTHREADS" Ta No "0x00080" Ta "Has had threads (no cleanup shor=
tcuts)"
+.It Dv "P_SUGID" Ta No "0x00100" Ta "Had set id privileges since last exec"
+.It Dv "P_SYSTEM" Ta No "0x00200" Ta "System proc: no sigs, stats or swapp=
ing"
+.It Dv "P_SINGLE_EXIT" Ta No "0x00400" Ta "Threads suspending should exit,=
not wait"
+.It Dv "P_TRACED" Ta No "0x00800" Ta "Debugged process being traced"
+.It Dv "P_WAITED" Ta No "0x01000" Ta "Someone is waiting for us"
+.It Dv "P_WEXIT" Ta No "0x02000" Ta "Working on exiting"
+.It Dv "P_EXEC" Ta No "0x04000" Ta "Process called exec"
+.It Dv "P_WKILLED" Ta No "0x08000" Ta "Killed, shall go to kernel/user bou=
ndary ASAP"
+.It Dv "P_CONTINUED" Ta No "0x10000" Ta "Proc has continued from a stopped=
state"
+.It Dv "P_STOPPED_SIG" Ta No "0x20000" Ta "Stopped due to SIGSTOP/SIGTSTP"
+.It Dv "P_STOPPED_TRACE" Ta No "0x40000" Ta "Stopped because of tracing"
+.It Dv "P_STOPPED_SINGLE" Ta No "0x80000" Ta "Only one thread can continue"
+.It Dv "P_PROTECTED" Ta No "0x100000" Ta "Do not kill on memory overcommit"
+.It Dv "P_SIGEVENT" Ta No "0x200000" Ta "Process pending signals changed"
+.It Dv "P_SINGLE_BOUNDARY" Ta No "0x400000" Ta "Threads should suspend at =
user boundary"
+.It Dv "P_HWPMC" Ta No "0x800000" Ta "Process is using HWPMCs"
+.It Dv "P_JAILED" Ta No "0x1000000" Ta "Process is in jail"
+.It Dv "P_ORPHAN" Ta No "0x2000000" Ta "Orphaned by original parent, repar=
ented to debugger"
+.It Dv "P_INEXEC" Ta No "0x4000000" Ta "Process is in execve()"
+.It Dv "P_STATCHILD" Ta No "0x8000000" Ta "Child process stopped or exited"
+.It Dv "P_INMEM" Ta No "0x10000000" Ta "Loaded into memory"
+.It Dv "P_SWAPPINGOUT" Ta No "0x20000000" Ta "Process is being swapped out"
+.It Dv "P_SWAPPINGIN" Ta No "0x40000000" Ta "Process is being swapped in"
.El
.It Cm label
The MAC label of the process.
diff -r 428842767fa6 -r f2935497fa04 head/bin/pwait/pwait.1
--- a/head/bin/pwait/pwait.1 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/bin/pwait/pwait.1 Tue Apr 17 11:51:51 2012 +0300
@@ -30,7 +30,7 @@
.\" USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
.\" OF SUCH DAMAGE.
.\"
-.\" $FreeBSD$
+.\" $FreeBSD: head/bin/pwait/pwait.1 233648 2012-03-29 05:02:12Z eadler $
.\"
.Dd November 1, 2009
.Dt PWAIT 1
@@ -46,7 +46,7 @@
.Sh DESCRIPTION
The
.Nm
-utility will wait until each of the given processes has terminated.=20
+utility will wait until each of the given processes has terminated.
.Pp
The following option is available:
.Bl -tag -width indent
@@ -54,7 +54,6 @@
Print the exit status when each process terminates.
.El
.Sh DIAGNOSTICS
-.Pp
The
.Nm
utility returns 0 on success, and >0 if an error occurs.
diff -r 428842767fa6 -r f2935497fa04 head/bin/setfacl/setfacl.1
--- a/head/bin/setfacl/setfacl.1 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/bin/setfacl/setfacl.1 Tue Apr 17 11:51:51 2012 +0300
@@ -24,7 +24,7 @@
.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
.\" SUCH DAMAGE.
.\"
-.\" $FreeBSD: head/bin/setfacl/setfacl.1 220465 2011-04-09 07:42:25Z trasz=
$
+.\" $FreeBSD: head/bin/setfacl/setfacl.1 233648 2012-03-29 05:02:12Z eadle=
r $
.\"
.Dd April 9, 2011
.Dt SETFACL 1
@@ -295,7 +295,7 @@
the ACL entry.
It may consist of one of the following: uid or
user name, or gid or group name. In entries whose tag type is
-one of=20
+one of
.Dq Li owner@ ,
.Dq Li group@ ,
or
diff -r 428842767fa6 -r f2935497fa04 head/bin/sh/jobs.c
--- a/head/bin/sh/jobs.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/bin/sh/jobs.c Tue Apr 17 11:51:51 2012 +0300
@@ -36,7 +36,7 @@
#endif
#endif /* not lint */
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: head/bin/sh/jobs.c 230998 2012-02-04 23:12:14Z jilles =
$");
+__FBSDID("$FreeBSD: head/bin/sh/jobs.c 233792 2012-04-02 17:16:24Z jilles =
$");
=20
#include <sys/ioctl.h>
#include <sys/param.h>
@@ -893,8 +893,8 @@
struct jmploc jmploc;
struct jmploc *savehandler;
=20
- TRACE(("vforkexecshell(%%%td, %p, %d) called\n", jp - jobtab, (void *)n,
- mode));
+ TRACE(("vforkexecshell(%%%td, %s, %p) called\n", jp - jobtab, argv[0],
+ (void *)pip));
INTOFF;
flushall();
savehandler =3D handler;
diff -r 428842767fa6 -r f2935497fa04 head/bin/sh/sh.1
--- a/head/bin/sh/sh.1 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/bin/sh/sh.1 Tue Apr 17 11:51:51 2012 +0300
@@ -30,7 +30,7 @@
.\" SUCH DAMAGE.
.\"
.\" from: @(#)sh.1 8.6 (Berkeley) 5/4/95
-.\" $FreeBSD: head/bin/sh/sh.1 227122 2011-11-05 21:56:45Z jilles $
+.\" $FreeBSD: head/bin/sh/sh.1 233992 2012-04-07 09:05:30Z joel $
.\"
.Dd November 5, 2011
.Dt SH 1
@@ -381,7 +381,7 @@
.It Redirection operators:
.Bl -column "XXX" "XXX" "XXX" "XXX" "XXX" -offset center -compact
.It Li < Ta Li > Ta Li << Ta Li >> Ta Li <>
-.It Li <& Ta Li >& Ta Li <<- Ta Li >|
+.It Li <& Ta Li >& Ta Li <<- Ta Li >| Ta \&
.El
.El
.Pp
@@ -1027,7 +1027,6 @@
.Pp
The first form executes the commands in a subshell environment.
A subshell environment has its own copy of:
-.Pp
.Bl -enum
.It
The current working directory as set by
@@ -1632,7 +1631,7 @@
.It Constants
Decimal, octal (starting with
.Li 0 )
-and hexadecimal (starting with=20
+and hexadecimal (starting with
.Li 0x )
integer constants.
.It Variables
diff -r 428842767fa6 -r f2935497fa04 head/bin/stty/stty.1
--- a/head/bin/stty/stty.1 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/bin/stty/stty.1 Tue Apr 17 11:51:51 2012 +0300
@@ -30,7 +30,7 @@
.\" SUCH DAMAGE.
.\"
.\" @(#)stty.1 8.4 (Berkeley) 4/18/94
-.\" $FreeBSD$
+.\" $FreeBSD: head/bin/stty/stty.1 233992 2012-04-07 09:05:30Z joel $
.\"
.Dd August 23, 2008
.Dt STTY 1
@@ -90,7 +90,6 @@
The following arguments are available to set the terminal
characteristics:
.Ss Control Modes:
-.Pp
Control mode flags affect hardware characteristics associated with the
terminal.
This corresponds to the c_cflag in the termios structure.
@@ -256,7 +255,6 @@
On the terminal NL performs (does not perform) the CR function.
.El
.Ss Local Modes:
-.Pp
Local mode flags (lflags) affect various and sundry characteristics of ter=
minal
processing.
Historically the term "local" pertained to new job control features
@@ -386,7 +384,7 @@
Recognized control-characters:
.Bd -ragged -offset indent
.Bl -column character Subscript
-.It control-
+.It control- Ta \& Ta \&
.It character Ta Subscript Ta Description
.It _________ Ta _________ Ta _______________
.It eof Ta Tn VEOF Ta EOF No character
@@ -513,7 +511,6 @@
first rows, then columns.
.El
.Ss Compatibility Modes:
-.Pp
These modes remain for compatibility with the previous version of
the
.Nm
diff -r 428842767fa6 -r f2935497fa04 head/cddl/contrib/opensolaris/cmd/zpoo=
l/zpool.8
--- a/head/cddl/contrib/opensolaris/cmd/zpool/zpool.8 Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/cddl/contrib/opensolaris/cmd/zpool/zpool.8 Tue Apr 17 11:51:51 2=
012 +0300
@@ -21,7 +21,7 @@
.\" Copyright 2011, Nexenta Systems, Inc. All Rights Reserved.
.\" Copyright (c) 2011, Justin T. Gibbs <gibbs at FreeBSD.org>
.\"
-.\" $FreeBSD: head/cddl/contrib/opensolaris/cmd/zpool/zpool.8 228206 2011-=
12-02 19:56:46Z mm $
+.\" $FreeBSD: head/cddl/contrib/opensolaris/cmd/zpool/zpool.8 234336 2012-=
04-16 08:19:43Z mm $
.\"
.Dd November 28, 2011
.Dt ZPOOL 8
@@ -1779,7 +1779,7 @@
storage pool consisting of two, two-way
mirrors and mirrored log devices:
.Bd -literal -offset 2n
-.Li # Ic zpool create pool mirror da0 da1 mirror da2 da3 log miror da4 da5
+.Li # Ic zpool create pool mirror da0 da1 mirror da2 da3 log mirror da4 da5
.Ed
.It Sy Example 14 No Adding Cache Devices to a Tn ZFS No Pool
.Pp
diff -r 428842767fa6 -r f2935497fa04 head/cddl/contrib/opensolaris/lib/libd=
trace/common/dt_proc.c
--- a/head/cddl/contrib/opensolaris/lib/libdtrace/common/dt_proc.c Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/cddl/contrib/opensolaris/lib/libdtrace/common/dt_proc.c Tue Apr =
17 11:51:51 2012 +0300
@@ -811,7 +811,7 @@
#if defined(sun)
(void) _lwp_kill(dpr->dpr_tid, SIGCANCEL);
#else
- pthread_kill(dpr->dpr_tid, SIGUSR1);
+ pthread_kill(dpr->dpr_tid, SIGTHR);
#endif
=20
/*
diff -r 428842767fa6 -r f2935497fa04 head/cddl/contrib/opensolaris/tools/ct=
f/cvt/ctf.c
--- a/head/cddl/contrib/opensolaris/tools/ctf/cvt/ctf.c Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/cddl/contrib/opensolaris/tools/ctf/cvt/ctf.c Tue Apr 17 11:51:51=
2012 +0300
@@ -62,6 +62,18 @@
int ntholes; /* number of type holes */
};
=20
+/*
+ * Macros to reverse byte order
+ */
+#define BSWAP_8(x) ((x) & 0xff)
+#define BSWAP_16(x) ((BSWAP_8(x) << 8) | BSWAP_8((x) >> 8))
+#define BSWAP_32(x) ((BSWAP_16(x) << 16) | BSWAP_16((x) >> 16))
+
+#define SWAP_16(x) (x) =3D BSWAP_16(x)
+#define SWAP_32(x) (x) =3D BSWAP_32(x)
+
+static int target_requires_swap;
+
/*PRINTFLIKE1*/
static void
parseterminate(const char *fmt, ...)
@@ -140,6 +152,11 @@
ctl.ctl_label =3D strtab_insert(&b->ctb_strtab, le->le_name);
ctl.ctl_typeidx =3D le->le_idx;
=20
+ if (target_requires_swap) {
+ SWAP_32(ctl.ctl_label);
+ SWAP_32(ctl.ctl_typeidx);
+ }
+
ctf_buf_write(b, &ctl, sizeof (ctl));
=20
return (1);
@@ -152,6 +169,10 @@
=20
ctf_buf_write(b, &id, sizeof (id));
=20
+ if (target_requires_swap) {
+ SWAP_16(id);
+ }
+
debug(3, "Wrote object %s (%d)\n", (idp ? idp->ii_name : "(null)"), id);
}
=20
@@ -180,10 +201,21 @@
=20
fdata[0] =3D CTF_TYPE_INFO(CTF_K_FUNCTION, 1, nargs);
fdata[1] =3D idp->ii_dtype->t_id;
+
+ if (target_requires_swap) {
+ SWAP_16(fdata[0]);
+ SWAP_16(fdata[1]);
+ }
+
ctf_buf_write(b, fdata, sizeof (fdata));
=20
for (i =3D 0; i < idp->ii_nargs; i++) {
id =3D idp->ii_args[i]->t_id;
+
+ if (target_requires_swap) {
+ SWAP_16(id);
+ }
+
ctf_buf_write(b, &id, sizeof (id));
}
=20
@@ -208,11 +240,25 @@
ctt->ctt_size =3D CTF_LSIZE_SENT;
ctt->ctt_lsizehi =3D CTF_SIZE_TO_LSIZE_HI(size);
ctt->ctt_lsizelo =3D CTF_SIZE_TO_LSIZE_LO(size);
+ if (target_requires_swap) {
+ SWAP_32(ctt->ctt_name);
+ SWAP_16(ctt->ctt_info);
+ SWAP_16(ctt->ctt_size);
+ SWAP_32(ctt->ctt_lsizehi);
+ SWAP_32(ctt->ctt_lsizelo);
+ }
ctf_buf_write(b, ctt, sizeof (*ctt));
} else {
ctf_stype_t *cts =3D (ctf_stype_t *)ctt;
=20
cts->ctt_size =3D (ushort_t)size;
+
+ if (target_requires_swap) {
+ SWAP_32(cts->ctt_name);
+ SWAP_16(cts->ctt_info);
+ SWAP_16(cts->ctt_size);
+ }
+
ctf_buf_write(b, cts, sizeof (*cts));
}
}
@@ -222,6 +268,12 @@
{
ctf_stype_t *cts =3D (ctf_stype_t *)ctt;
=20
+ if (target_requires_swap) {
+ SWAP_32(cts->ctt_name);
+ SWAP_16(cts->ctt_info);
+ SWAP_16(cts->ctt_size);
+ }
+
ctf_buf_write(b, cts, sizeof (*cts));
}
=20
@@ -296,6 +348,9 @@
encoding =3D ip->intr_fformat;
=20
data =3D CTF_INT_DATA(encoding, ip->intr_offset, ip->intr_nbits);
+ if (target_requires_swap) {
+ SWAP_32(data);
+ }
ctf_buf_write(b, &data, sizeof (data));
break;
=20
@@ -312,6 +367,11 @@
cta.cta_contents =3D tp->t_ardef->ad_contents->t_id;
cta.cta_index =3D tp->t_ardef->ad_idxtype->t_id;
cta.cta_nelems =3D tp->t_ardef->ad_nelems;
+ if (target_requires_swap) {
+ SWAP_16(cta.cta_contents);
+ SWAP_16(cta.cta_index);
+ SWAP_32(cta.cta_nelems);
+ }
ctf_buf_write(b, &cta, sizeof (cta));
break;
=20
@@ -341,6 +401,11 @@
offset);
ctm.ctm_type =3D mp->ml_type->t_id;
ctm.ctm_offset =3D mp->ml_offset;
+ if (target_requires_swap) {
+ SWAP_32(ctm.ctm_name);
+ SWAP_16(ctm.ctm_type);
+ SWAP_16(ctm.ctm_offset);
+ }
ctf_buf_write(b, &ctm, sizeof (ctm));
}
} else {
@@ -355,6 +420,14 @@
CTF_OFFSET_TO_LMEMHI(mp->ml_offset);
ctlm.ctlm_offsetlo =3D
CTF_OFFSET_TO_LMEMLO(mp->ml_offset);
+
+ if (target_requires_swap) {
+ SWAP_32(ctlm.ctlm_name);
+ SWAP_16(ctlm.ctlm_type);
+ SWAP_32(ctlm.ctlm_offsethi);
+ SWAP_32(ctlm.ctlm_offsetlo);
+ }
+
ctf_buf_write(b, &ctlm, sizeof (ctlm));
}
}
@@ -377,6 +450,12 @@
offset =3D strtab_insert(&b->ctb_strtab, ep->el_name);
cte.cte_name =3D CTF_TYPE_NAME(CTF_STRTAB_0, offset);
cte.cte_value =3D ep->el_number;
+
+ if (target_requires_swap) {
+ SWAP_32(cte.cte_name);
+ SWAP_32(cte.cte_value);
+ }
+
ctf_buf_write(b, &cte, sizeof (cte));
i--;
}
@@ -420,6 +499,11 @@
=20
for (i =3D 0; i < (int) tp->t_fndef->fn_nargs; i++) {
id =3D tp->t_fndef->fn_args[i]->t_id;
+
+ if (target_requires_swap) {
+ SWAP_16(id);
+ }
+
ctf_buf_write(b, &id, sizeof (id));
}
=20
@@ -613,6 +697,9 @@
=20
int i;
=20
+ target_requires_swap =3D do_compress & CTF_SWAP_BYTES;
+ do_compress &=3D ~CTF_SWAP_BYTES;
+
/*
* Prepare the header, and create the CTF output buffers. The data
* object section and function section are both lists of 2-byte
@@ -649,6 +736,18 @@
h.cth_stroff =3D ctf_buf_cur(buf);
h.cth_strlen =3D strtab_size(&buf->ctb_strtab);
=20
+ if (target_requires_swap) {
+ SWAP_16(h.cth_preamble.ctp_magic);
+ SWAP_32(h.cth_parlabel);
+ SWAP_32(h.cth_parname);
+ SWAP_32(h.cth_lbloff);
+ SWAP_32(h.cth_objtoff);
+ SWAP_32(h.cth_funcoff);
+ SWAP_32(h.cth_typeoff);
+ SWAP_32(h.cth_stroff);
+ SWAP_32(h.cth_strlen);
+ }
+
/*
* We only do compression for ctfmerge, as ctfconvert is only
* supposed to be used on intermediary build objects. This is
diff -r 428842767fa6 -r f2935497fa04 head/cddl/contrib/opensolaris/tools/ct=
f/cvt/ctfmerge.c
--- a/head/cddl/contrib/opensolaris/tools/ctf/cvt/ctfmerge.c Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/cddl/contrib/opensolaris/tools/ctf/cvt/ctfmerge.c Tue Apr 17 11:=
51:51 2012 +0300
@@ -620,7 +620,7 @@
terminate("No CTF data found in source file %s\n", srcfile);
=20
tmpname =3D mktmpname(destfile, ".ctf");
- write_ctf(srctd, destfile, tmpname, CTF_COMPRESS | keep_stabs);
+ write_ctf(srctd, destfile, tmpname, CTF_COMPRESS | CTF_SWAP_BYTES | keep_=
stabs);
if (rename(tmpname, destfile) !=3D 0) {
terminate("Couldn't rename temp file %s to %s", tmpname,
destfile);
@@ -1015,7 +1015,7 @@
=20
tmpname =3D mktmpname(outfile, ".ctf");
write_ctf(savetd, outfile, tmpname,
- CTF_COMPRESS | write_fuzzy_match | dynsym | keep_stabs);
+ CTF_COMPRESS | CTF_SWAP_BYTES | write_fuzzy_match | dynsym | keep_sta=
bs);
if (rename(tmpname, outfile) !=3D 0)
terminate("Couldn't rename output temp file %s", tmpname);
free(tmpname);
diff -r 428842767fa6 -r f2935497fa04 head/cddl/contrib/opensolaris/tools/ct=
f/cvt/ctftools.h
--- a/head/cddl/contrib/opensolaris/tools/ctf/cvt/ctftools.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/cddl/contrib/opensolaris/tools/ctf/cvt/ctftools.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -391,6 +391,7 @@
#define CTF_USE_DYNSYM 0x2 /* use .dynsym not .symtab */
#define CTF_COMPRESS 0x4 /* compress CTF output */
#define CTF_KEEP_STABS 0x8 /* keep .stabs sections */
+#define CTF_SWAP_BYTES 0x10 /* target byte order is different from host */
=20
void write_ctf(tdata_t *, const char *, const char *, int);
=20
diff -r 428842767fa6 -r f2935497fa04 head/cddl/contrib/opensolaris/tools/ct=
f/cvt/output.c
--- a/head/cddl/contrib/opensolaris/tools/ctf/cvt/output.c Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/cddl/contrib/opensolaris/tools/ctf/cvt/output.c Tue Apr 17 11:51=
:51 2012 +0300
@@ -717,7 +717,7 @@
=20
iiburst =3D sort_iidescs(elf, file, td, flags & CTF_FUZZY_MATCH,
flags & CTF_USE_DYNSYM);
- data =3D ctf_gen(iiburst, lenp, flags & CTF_COMPRESS);
+ data =3D ctf_gen(iiburst, lenp, flags & (CTF_COMPRESS | CTF_SWAP_BYTES));
=20
iiburst_free(iiburst);
=20
@@ -730,10 +730,12 @@
struct stat st;
Elf *elf =3D NULL;
Elf *telf =3D NULL;
+ GElf_Ehdr ehdr;
caddr_t data;
size_t len;
int fd =3D -1;
int tfd =3D -1;
+ int byteorder;
=20
(void) elf_version(EV_CURRENT);
if ((fd =3D open(curname, O_RDONLY)) < 0 || fstat(fd, &st) < 0)
@@ -746,6 +748,22 @@
if ((telf =3D elf_begin(tfd, ELF_C_WRITE, NULL)) =3D=3D NULL)
elfterminate(curname, "Cannot write");
=20
+ if (gelf_getehdr(elf, &ehdr)) {
+#if BYTE_ORDER =3D=3D _BIG_ENDIAN
+ byteorder =3D ELFDATA2MSB;
+#else
+ byteorder =3D ELFDATA2LSB;
+#endif
+ /*
+ * If target and host has the same byte order
+ * clear byte swapping request
+ */
+ if (ehdr.e_ident[EI_DATA] =3D=3D byteorder)
+ flags &=3D ~CTF_SWAP_BYTES;
+ }
+ else=20
+ elfterminate(curname, "Failed to get EHDR");
+
data =3D make_ctf_data(td, elf, curname, &len, flags);
write_file(elf, curname, telf, newname, data, len, flags);
free(data);
diff -r 428842767fa6 -r f2935497fa04 head/cddl/lib/Makefile
--- a/head/cddl/lib/Makefile Tue Apr 17 11:36:47 2012 +0300
+++ b/head/cddl/lib/Makefile Tue Apr 17 11:51:51 2012 +0300
@@ -1,4 +1,4 @@
-# $FreeBSD$
+# $FreeBSD: head/cddl/lib/Makefile 233415 2012-03-24 05:29:07Z gonzo $
=20
.include <bsd.own.mk>
=20
@@ -19,7 +19,7 @@
.endif
.endif
=20
-.if ${MACHINE_ARCH} =3D=3D "amd64" || ${MACHINE_ARCH} =3D=3D "i386"
+.if ${MACHINE_ARCH} =3D=3D "amd64" || ${MACHINE_ARCH} =3D=3D "i386" || ${=
MACHINE_CPUARCH} =3D=3D "mips"
_drti=3D drti
_libdtrace=3D libdtrace
.endif
diff -r 428842767fa6 -r f2935497fa04 head/cddl/lib/libdtrace/Makefile
--- a/head/cddl/lib/libdtrace/Makefile Tue Apr 17 11:36:47 2012 +0300
+++ b/head/cddl/lib/libdtrace/Makefile Tue Apr 17 11:51:51 2012 +0300
@@ -1,4 +1,4 @@
-# $FreeBSD$
+# $FreeBSD: head/cddl/lib/libdtrace/Makefile 233415 2012-03-24 05:29:07Z g=
onzo $
=20
.PATH: ${.CURDIR}/../../../cddl/contrib/opensolaris/lib/libdtrace/common
.PATH: ${.CURDIR}/../../../cddl/contrib/opensolaris/lib/libgen/common
@@ -42,8 +42,7 @@
dt_subr.c \
dt_work.c \
dt_xlator.c \
- gmatch.c \
- dis_tables.c
+ gmatch.c
=20
DSRCS=3D errno.d \
psinfo.d \
@@ -70,12 +69,17 @@
.elif ${MACHINE_CPUARCH} =3D=3D "sparc64"
CFLAGS+=3D -I${OPENSOLARIS_SYS_DISTDIR}/uts/sparc
.PATH: ${.CURDIR}/../../../cddl/contrib/opensolaris/lib/libdtrace/sparc
+.elif ${MACHINE_CPUARCH} =3D=3D "mips"
+CFLAGS+=3D -I${OPENSOLARIS_SYS_DISTDIR}/uts/mips
+.PATH: ${.CURDIR}/../../../cddl/contrib/opensolaris/lib/libdtrace/mips
+.PATH: ${.CURDIR}/../../../sys/cddl/dev/dtrace/mips
.else
# temporary hack
CFLAGS+=3D -I${OPENSOLARIS_SYS_DISTDIR}/uts/intel
.endif
=20
.if ${MACHINE_ARCH} =3D=3D "i386" || ${MACHINE_ARCH} =3D=3D "amd64"
+SRCS+=3D dis_tables.c
DSRCS+=3D regs_x86.d
.endif
=20
diff -r 428842767fa6 -r f2935497fa04 head/cddl/usr.sbin/Makefile
--- a/head/cddl/usr.sbin/Makefile Tue Apr 17 11:36:47 2012 +0300
+++ b/head/cddl/usr.sbin/Makefile Tue Apr 17 11:51:51 2012 +0300
@@ -1,4 +1,4 @@
-# $FreeBSD$
+# $FreeBSD: head/cddl/usr.sbin/Makefile 233415 2012-03-24 05:29:07Z gonzo $
=20
.include <bsd.own.mk>
=20
@@ -19,4 +19,8 @@
_lockstat=3D lockstat
.endif
=20
+.if ${MACHINE_CPUARCH} =3D=3D "mips"
+_dtrace=3D dtrace
+.endif
+
.include <bsd.subdir.mk>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/CHANGES
--- a/head/contrib/bind9/CHANGES Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/CHANGES Tue Apr 17 11:51:51 2012 +0300
@@ -1,9 +1,309 @@
- --- 9.8.1-P1 released ---
+ --- 9.8.2 released ---
+
+3298. [bug] Named could dereference a NULL pointer in
+ zmgr_start_xfrin_ifquota if the zone was being removed.
+ [RT #28419]
+
+3297. [bug] Named could die on a malformed master file. [RT #28467]
+
+3295. [bug] Adjust isc_time_secondsastimet range check to be more
+ portable. [RT # 26542]
+
+3294. [bug] isccc/cc.c:table_fromwire failed to free alist on
+ error. [RT #28265]
+
+3291. [port] Fixed a build error on systems without ENOTSUP.
+ [RT #28200]
+
+3290. [bug] <isc/hmacsha.h> was not being installed. [RT #28169]
+
+3288. [bug] dlz_destroy() function wasn't correctly registered
+ by the DLZ dlopen driver. [RT #28056]
+
+3287. [port] Update ans.pl to work with Net::DNS 0.68. [RT #28028]
+
+3286. [bug] Managed key maintenance timer could fail to start
+ after 'rndc reconfig'. [RT #26786]
+
+ --- 9.8.2rc2 released ---
+
+3285. [bug] val-frdataset was incorrectly disassociated in
+ proveunsecure after calling startfinddlvsep.
+ [RT #27928]
+
+3284. [bug] Address race conditions with the handling of
+ rbtnode.deadlink. [RT #27738]
+
+3283. [bug] Raw zones with with more than 512 records in a RRset
+ failed to load. [RT #27863]
+
+3282. [bug] Restrict the TTL of NS RRset to no more than that
+ of the old NS RRset when replacing it.
+ [RT #27792] [RT #27884]
+
+3281. [bug] SOA refresh queries could be treated as cancelled
+ despite succeeding over the loopback interface.
+ [RT #27782]
+
+3280. [bug] Potential double free of a rdataset on out of memory
+ with DNS64. [RT #27762]
+
+3278. [bug] Make sure automatic key maintenance is started
+ when "auto-dnssec maintain" is turned on during
+ "rndc reconfig". [RT #26805]
+
+3276. [bug] win32: ns_os_openfile failed to return NULL on
+ safe_open failure. [RT #27696]
+
+3274. [bug] Log when a zone is not reusable. Only set loadtime
+ on successful loads. [RT #27650]
+
+3273. [bug] AAAA responses could be returned in the additional
+ section even when filter-aaaa-on-v4 was in use.
+ [RT #27292]
+
+3271. [port] darwin: mksymtbl is not always stable, loop several
+ times before giving up. mksymtbl was using non
+ portable perl to covert 64 bit hex strings. [RT #27653]
+
+3268. [bug] Convert RRSIG expiry times to 64 timestamps to work
+ out the earliest expiry time. [RT #23311]
+
+3267. [bug] Memory allocation failures could be mis-reported as
+ unexpected error. New ISC_R_UNSET result code.
+ [RT #27336]
+
+3266. [bug] The maximum number of NSEC3 iterations for a
+ DNSKEY RRset was not being properly computed.
+ [RT #26543]
+
+3262. [bug] Signed responses were handled incorrectly by RPZ.
+ [RT #27316]
+
+ --- 9.8.2rc1 released ---
+
+3260. [bug] "rrset-order cyclic" could appear not to rotate
+ for some query patterns. [RT #27170/27185]
+
+3259. [bug] named-compilezone: Suppress "dump zone to <file>"
+ message when writing to stdout. [RT #27109]
+
+3258. [test] Add "forcing full sign with unreadable keys" test.
+ [RT #27153]
+
+3257. [bug] Do not generate a error message when calling fsync()
+ in a pipe or socket. [RT #27109]
+
+3256. [bug] Disable empty zones for lwresd -C. [RT #27139]
+
+3254. [bug] Set isc_socket_ipv6only() on the IPv6 control channels.
+ [RT #22249]
+
+3253. [bug] Return DNS_R_SYNTAX when the input to a text field is
+ too long. [RT #26956]
+
+3251. [bug] Enforce a upper bound (65535 bytes) on the amount of
+ memory dns_sdlz_putrr() can allocate per record to
+ prevent run away memory consumption on ISC_R_NOSPACE.
+ [RT #26956]
+
+3250. [func] 'configure --enable-developer'; turn on various
+ configure options, normally off by default, that
+ we want developers to build and test with. [RT #27103]
+
+3249. [bug] Update log message when saving slave zones files for
+ analysis after load failures. [RT #27087]
+
+3248. [bug] Configure options --enable-fixed-rrset and
+ --enable-exportlib were incompatible with each
+ other. [RT #27087]
+
+3247. [bug] 'raw' format zones failed to preserve load order
+ breaking 'fixed' sort order. [RT #27087]
+
+3243. [port] netbsd,bsdi: the thread defaults were not being
+ properly set.
+
+3241. [bug] Address race conditions in the resolver code.
+ [RT #26889]
+
+3240. [bug] DNSKEY state change events could be missed. [RT #26874]
+
+3239. [bug] dns_dnssec_findmatchingkeys needs to use a consistent
+ timestamp. [RT #26883]
+
+3238. [bug] keyrdata was not being reinitialized in
+ lib/dns/rbtdb.c:iszonesecure. [RT#26913]
+
+3237. [bug] dig -6 didn't work with +trace. [RT #26906]
+
+ --- 9.8.2b1 released ---
+
+3234. [bug] 'make depend' produced invalid makefiles. [RT #26830]
+
+3231. [bug] named could fail to send a uncompressable zone.
+ [RT #26796]
+
+3230. [bug] 'dig axfr' failed to properly handle a multi-message
+ axfr with a serial of 0. [RT #26796]
+
+3229. [bug] Fix local variable to struct var assignment
+ found by CLANG warning.
+
+3228. [tuning] Dynamically grow symbol table to improve zone
+ loading performance. [RT #26523]
+
+3227. [bug] Interim fix to make WKS's use of getprotobyname()
+ and getservbyname() self thread safe. [RT #26232]
+
+3226. [bug] Address minor resource leakages. [RT #26624]
+
+3221. [bug] Fixed a potential coredump on shutdown due to
+ referencing fetch context after it's been freed.
+ [RT #26720]
+
+3220. [bug] Change #3186 was incomplete; dns_db_rpz_findips()
+ could fail to set the database version correctly,
+ causing an assertion failure. [RT #26180]
=20
3218. [security] Cache lookup could return RRSIG data associated with
nonexistent records, leading to an assertion
failure. [RT #26590]
=20
+3217. [cleanup] Fix build problem with --disable-static. [RT #26476]
+
+3216. [bug] resolver.c:validated() was not thread-safe. [RT #26478]
+
+3213. [doc] Clarify ixfr-from-differences behavior. [RT #25188]
+
+3212. [bug] rbtdb.c: failed to remove a node from the deadnodes
+ list prior to adding a reference to it leading a
+ possible assertion failure. [RT #23219]
+
+3209. [func] Add "dnssec-lookaside 'no'". [RT #24858]
+
+3208. [bug] 'dig -y' handle unknown tsig alorithm better.
+ [RT #25522]
+
+3207. [contrib] Fixed build error in Berkeley DB DLZ module. [RT #26444]
+
+3206. [cleanup] Add ISC information to log at start time. [RT #25484]
+
+3204. [bug] When a master server that has been marked as
+ unreachable sends a NOTIFY, mark it reachable
+ again. [RT #25960]
+
+3203. [bug] Increase log level to 'info' for validation failures
+ from expired or not-yet-valid RRSIGs. [RT #21796]
+
+3200. [doc] Some rndc functions were undocumented or were
+ missing from 'rndc -h' output. [RT #25555]
+
+3198. [doc] Clarified that dnssec-settime can alter keyfile
+ permissions. [RT #24866]
+
+3196. [bug] nsupdate: return nonzero exit code when target zone
+ doesn't exist. [RT #25783]
+
+3195. [cleanup] Silence "file not found" warnings when loading
+ managed-keys zone. [RT #26340]
+
+3194. [doc] Updated RFC references in the 'empty-zones-enable'
+ documentation. [RT #25203]
+
+3193. [cleanup] Changed MAXZONEKEYS to DNS_MAXZONEKEYS, moved to
+ dnssec.h. [RT #26415]
+
+3192. [bug] A query structure could be used after being freed.
+ [RT #22208]
+
+3191. [bug] Print NULL records using "unknown" format. [RT #26392]
+
+3190. [bug] Underflow in error handling in isc_mutexblock_init.
+ [RT #26397]
+
+3189. [test] Added a summary report after system tests. [RT #25517]
+
+3188. [bug] zone.c:zone_refreshkeys() could fail to detach
+ references correctly when errors occurred, causing
+ a hang on shutdown. [RT #26372]
+
+3187. [port] win32: support for Visual Studio 2008. [RT #26356]
+
+3186. [bug] Version/db mis-match in rpz code. [RT #26180]
+
+3179. [port] kfreebsd: build issues. [RT #26273]
+
+3175. [bug] Fix how DNSSEC positive wildcard responses from a
+ NSEC3 signed zone are validated. Stop sending a
+ unnecessary NSEC3 record when generating such
+ responses. [RT #26200]
+
+3174. [bug] Always compute to revoked key tag from scratch.
+ [RT #26186]
+
+3173. [port] Correctly validate root DS responses. [RT #25726]
+
+3171. [bug] Exclusively lock the task when adding a zone using
+ 'rndc addzone'. [RT #25600]
+
+3170. [func] RPZ update:
+ - fix precedence among competing rules
+ - improve ARM text including documenting rule precedence
+ - try to rewrite CNAME chains until first hit
+ - new "rpz" logging channel
+ - RDATA for CNAME rules can include wildcards
+ - replace "NO-OP" named.conf policy override with
+ "PASSTHRU" and add "DISABLED" override ("NO-OP"
+ is still recognized)
+ [RT #25172]
+
+3169. [func] Catch db/version mis-matches when calling dns_db_*().
+ [RT #26017]
+
+3167. [bug] Negative answers from forwarders were not being
+ correctly tagged making them appear to not be cached.
+ [RT #25380]
+
+3162. [test] start.pl: modified to allow for "named.args" in
+ ns*/ subdirectory to override stock arguments to
+ named. Largely from RT#26044, but no separate ticket.
+
+3161. [bug] zone.c:del_sigs failed to always reset rdata leading
+ assertion failures. [RT #25880]
+
+3157. [tuning] Reduce the time spent in "rndc reconfig" by parsing
+ the config file before pausing the server. [RT #21373]
+
+3155. [bug] Fixed a build failure when using contrib DLZ
+ drivers (e.g., mysql, postgresql, etc). [RT #25710]
+
+3154. [bug] Attempting to print an empty rdataset could trigger
+ an assert. [RT #25452]
+
+3152. [cleanup] Some versions of gcc and clang failed due to
+ incorrect use of __builtin_expect. [RT #25183]
+
+3151. [bug] Queries for type RRSIG or SIG could be handled
+ incorrectly. [RT #21050]
+
+3148. [bug] Processing of normal queries could be stalled when
+ forwarding a UPDATE message. [RT #24711]
+
+3146. [test] Fixed gcc4.6.0 errors in ATF. [RT #25598]
+
+3145. [test] Capture output of ATF unit tests in "./atf.out" if
+ there were any errors while running them. [RT #25527]
+
+3144. [bug] dns_dbiterator_seek() could trigger an assert when
+ used with a nonexistent database node. [RT #25358]
+
+3143. [bug] Silence clang compiler warnings. [RT #25174]
+
+3139. [test] Added tests from RFC 6234, RFC 2202, and RFC 1321
+ for the hashing algorithms (md5, sha1 - sha512, and
+ their hmac counterparts). [RT #25067]
+
--- 9.8.1 released ---
=20
--- 9.8.1rc1 released ---
@@ -14,7 +314,7 @@
3138. [bug] Address memory leaks and out-of-order operations when
shutting named down. [RT #25210]
=20
-3136. [func] Add RFC 1918 reverse zones to the list of built-in=20
+3136. [func] Add RFC 1918 reverse zones to the list of built-in
empty zones switched on by the 'empty-zones-enable'
option. [RT #24990]
=20
@@ -34,9 +334,9 @@
=20
3133. [bug] Change #3114 was incomplete. [RT #24577]
=20
-3131. [tuning] Improve scalability by allocating one zone task
- per 100 zones at startup time, rather than using a
- fixed-size task table. [RT #24406]
+3131. [tuning] Improve scalability by allocating one zone task
+ per 100 zones at startup time, rather than using a
+ fixed-size task table. [RT #24406]
=20
3129. [bug] Named could crash on 'rndc reconfig' when
allow-new-zones was set to yes and named ACLs
@@ -62,10 +362,10 @@
=20
3122. [cleanup] dnssec-settime: corrected usage message. [RT #24664]
=20
-3121. [security] An authoritative name server sending a negative
- response containing a very large RRset could
- trigger an off-by-one error in the ncache code
- and crash named. [RT #24650]
+3121. [security] An authoritative name server sending a negative
+ response containing a very large RRset could
+ trigger an off-by-one error in the ncache code
+ and crash named. [RT #24650]
=20
3120. [bug] Named could fail to validate zones listed in a DLV
that validated insecure without using DLV and had
@@ -99,9 +399,9 @@
"krb5-subdomain", which allow machines to update
their own records, to the BIND 9 ARM.
=20
-3111. [bug] Improved consistency checks for dnssec-enable and
- dnssec-validation, added test cases to the
- checkconf system test. [RT #24398]
+3111. [bug] Improved consistency checks for dnssec-enable and
+ dnssec-validation, added test cases to the
+ checkconf system test. [RT #24398]
=20
3110. [bug] dnssec-signzone: Wrong error message could appear
when attempting to sign with no KSK. [RT #24369]
@@ -109,10 +409,10 @@
3107. [bug] dnssec-signzone: Report the correct number of ZSKs
when using -x. [RT #20852]
=20
-3105. [bug] GOST support can be suppressed by "configure
- --without-gost" [RT #24367]
-
-3104. [bug] Better support for cross-compiling. [RT #24367]
+3105. [bug] GOST support can be suppressed by "configure
+ --without-gost" [RT #24367]
+
+3104. [bug] Better support for cross-compiling. [RT #24367]
=20
3103. [bug] Configuring 'dnssec-validation auto' in a view
instead of in the options statement could trigger
@@ -142,7 +442,7 @@
=20
3094. [doc] Expand dns64 documentation.
=20
-3093. [bug] Fix gssapi/kerberos dependencies [RT #23836]
+3093. [bug] Fix gssapi/kerberos dependencies [RT #23836]
=20
3092. [bug] Signatures for records at the zone apex could go
stale due to an incorrect timer setting. [RT #23769]
@@ -151,7 +451,7 @@
and then subsequently activated could fail to trigger
automatic signing. [RT #22911]
=20
-3090. [func] Make --with-gssapi default [RT #23738]
+3090. [func] Make --with-gssapi default [RT #23738]
=20
3088. [bug] Remove bin/tests/system/logfileconfig/ns1/named.conf
and add setup.sh in order to resolve changing
@@ -269,9 +569,9 @@
=20
3043. [test] Merged in the NetBSD ATF test framework (currently
version 0.12) for development of future unit tests.
- Use configure --with-atf to build ATF internally
- or configure --with-atf=3Dprefix to use an external
- copy. [RT #23209]
+ Use configure --with-atf to build ATF internally
+ or configure --with-atf=3Dprefix to use an external
+ copy. [RT #23209]
=20
3042. [bug] dig +trace could fail attempting to use IPv6
addresses on systems with only IPv4 connectivity.
@@ -706,7 +1006,7 @@
2929. [bug] Improved handling of GSS security contexts:
- added LRU expiration for generated TSIGs
- added the ability to use a non-default realm
- - added new "realm" keyword in nsupdate
+ - added new "realm" keyword in nsupdate
- limited lifetime of generated keys to 1 hour
or the lifetime of the context (whichever is
smaller)
@@ -1535,7 +1835,7 @@
--with-export-includedir. [RT #20252]
=20
2675. [bug] dnssec-signzone could crash if the key directory
- did not exist. [RT #20232]
+ did not exist. [RT #20232]
=20
--- 9.7.0a3 released ---
=20
@@ -1626,7 +1926,7 @@
64-bit systems. [RT #20076]
=20
2650. [bug] Assertion failure in dnssec-signzone when trying
- to read keyset-* files. [RT #20075]
+ to read keyset-* files. [RT #20075]
=20
2649. [bug] Set the domain for forward only zones. [RT #19944]
=20
@@ -1698,7 +1998,7 @@
2630. [func] Improved syntax for DDNS autoconfiguration: use
"update-policy local;" to switch on local DDNS in a
zone. (The "ddns-autoconf" option has been removed.)
- [RT #19875]
+ [RT #19875]
=20
2629. [port] Check for seteuid()/setegid(), use setresuid()/
setresgid() if not present. [RT #19932]
@@ -2383,10 +2683,10 @@
time. [RT #18277]
=20
2423. [security] Randomize server selection on queries, so as to
- make forgery a little more difficult. Instead of
- always preferring the server with the lowest RTT,
- pick a server with RTT within the same 128
- millisecond band. [RT #18441]
+ make forgery a little more difficult. Instead of
+ always preferring the server with the lowest RTT,
+ pick a server with RTT within the same 128
+ millisecond band. [RT #18441]
=20
2422. [bug] Handle the special return value of a empty node as
if it was a NXRRSET in the validator. [RT #18447]
@@ -2467,7 +2767,7 @@
=20
2399. [placeholder]
=20
-2398. [bug] Improve file descriptor management. New,
+2398. [bug] Improve file descriptor management. New,
temporary, named.conf option reserved-sockets,
default 512. [RT #18344]
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/COPYRIGHT
--- a/head/contrib/bind9/COPYRIGHT Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/COPYRIGHT Tue Apr 17 11:51:51 2012 +0300
@@ -1,4 +1,4 @@
-Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
Copyright (C) 1996-2003 Internet Software Consortium.
=20
Permission to use, copy, modify, and/or distribute this software for any
@@ -13,7 +13,7 @@
OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
PERFORMANCE OF THIS SOFTWARE.
=20
-$Id: COPYRIGHT,v 1.17.14.1 2011-02-22 06:34:47 marka Exp $
+$Id: COPYRIGHT,v 1.17.14.2 2012/01/04 23:46:18 tbox Exp $
=20
Portions of this code release fall under one or more of the
following Copyright notices. Please see individual source
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/FAQ.xml
--- a/head/contrib/bind9/FAQ.xml Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/FAQ.xml Tue Apr 17 11:51:51 2012 +0300
@@ -17,7 +17,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: FAQ.xml,v 1.54 2010-01-19 23:48:55 tbox Exp $ -->
+<!-- $Id: FAQ.xml,v 1.54 2010/01/19 23:48:55 tbox Exp $ -->
=20
<article class=3D"faq">
<title>Frequently Asked Questions about BIND 9</title>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/Makefile.in
--- a/head/contrib/bind9/Makefile.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/Makefile.in Tue Apr 17 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.58.250.2 2011-02-28 01:19:57 tbox Exp $
+# $Id: Makefile.in,v 1.58.250.4 2011/09/06 04:06:11 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
@@ -64,8 +64,10 @@
check: test
=20
test:
- (cd bin/tests && ${MAKE} ${MAKEDEFS} test)
- (test -f unit/unittest.sh && $(SHELL) unit/unittest.sh)
+ status=3D0; \
+ (cd bin/tests && ${MAKE} ${MAKEDEFS} test) || status=3D1; \
+ (test -f unit/unittest.sh && $(SHELL) unit/unittest.sh) || status=3D1; \
+ exit $$status
=20
FAQ: FAQ.xml
${XSLTPROC} doc/xsl/isc-docbook-text.xsl FAQ.xml | \
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/README
--- a/head/contrib/bind9/README Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/README Tue Apr 17 11:51:51 2012 +0300
@@ -48,6 +48,14 @@
For a detailed list of user-visible changes from
previous releases, see the CHANGES file.
=20
+ For up-to-date release notes and errata, see
+ http://www.isc.org/software/bind9/releasenotes
+
+BIND 9.8.2
+
+ BIND 9.8.2 includes a number of bug fixes and prevents a security
+ problem described in CVE-2011-4313
+
BIND 9.8.1
=20
BIND 9.8.1 includes a number of bug fixes and enhancements from
@@ -314,6 +322,7 @@
libraries. sh-utils-1.16 provides a "printf" which compiles
on SunOS 4.
=20
+
Documentation
=20
The BIND 9 Administrator Reference Manual is included with the
@@ -336,6 +345,48 @@
in the other README files.
=20
=20
+Change Log
+
+ A detailed list of all changes to BIND 9 is included in the=20
+ file CHANGES, with the most recent changes listed first.
+ Change notes include tags indicating the category of the
+ change that was made; these categories are:
+
+ [func] New feature
+
+ [bug] General bug fix
+
+ [security] Fix for a significant security flaw
+
+ [experimental] Used for new features when the syntax
+ or other aspects of the design are still
+ in flux and may change
+
+ [port] Portability enhancement
+
+ [maint] Updates to built-in data such as root
+ server addresses and keys
+
+ [tuning] Changes to built-in configuration defaults
+ and constants to improve performanceo
+
+ [protocol] Updates to the DNS protocol such as new
+ RR types
+
+ [test] Changes to the automatic tests, not
+ affecting server functionality
+
+ [cleanup] Minor corrections and refactoring
+
+ [doc] Documentation
+
+ In general, [func] and [experimental] tags will only appear
+ in new-feature releases (i.e., those with version numbers
+ ending in zero). Some new functionality may be backported to
+ older releases on a case-by-case basis. All other change
+ types may be applied to all currently-supported releases.
+
+
Bug Reports and Mailing Lists
=20
Bugs reports should be sent to
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/acconfig.h
--- a/head/contrib/bind9/acconfig.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/acconfig.h Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: acconfig.h,v 1.53 2008-12-01 23:47:44 tbox Exp $ */
+/* $Id: acconfig.h,v 1.53 2008/12/01 23:47:44 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/Makefile.in
--- a/head/contrib/bind9/bin/Makefile.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/Makefile.in Tue Apr 17 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.29 2009-10-05 12:07:08 fdupont Exp $
+# $Id: Makefile.in,v 1.29 2009/10/05 12:07:08 fdupont Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/check/Makefile.=
in
--- a/head/contrib/bind9/bin/check/Makefile.in Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/bin/check/Makefile.in Tue Apr 17 11:51:51 2012 +03=
00
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.36 2009-12-05 23:31:40 each Exp $
+# $Id: Makefile.in,v 1.36 2009/12/05 23:31:40 each Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/check/check-too=
l.c
--- a/head/contrib/bind9/bin/check/check-tool.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/bin/check/check-tool.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: check-tool.c,v 1.41 2010-09-07 23:46:59 tbox Exp $ */
+/* $Id: check-tool.c,v 1.41 2010/09/07 23:46:59 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/check/check-too=
l.h
--- a/head/contrib/bind9/bin/check/check-tool.h Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/bin/check/check-tool.h Tue Apr 17 11:51:51 2012 +0=
300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: check-tool.h,v 1.16 2010-09-07 23:46:59 tbox Exp $ */
+/* $Id: check-tool.h,v 1.16 2010/09/07 23:46:59 tbox Exp $ */
=20
#ifndef CHECK_TOOL_H
#define CHECK_TOOL_H
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/check/named-che=
ckconf.8
--- a/head/contrib/bind9/bin/check/named-checkconf.8 Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/bin/check/named-checkconf.8 Tue Apr 17 11:51:51 20=
12 +0300
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: named-checkconf.8,v 1.33 2009-12-29 01:14:03 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/check/named-che=
ckconf.c
--- a/head/contrib/bind9/bin/check/named-checkconf.c Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/bin/check/named-checkconf.c Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: named-checkconf.c,v 1.54.62.2 2011-03-12 04:59:13 tbox Exp $ */
+/* $Id: named-checkconf.c,v 1.54.62.2 2011/03/12 04:59:13 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/check/named-che=
ckconf.docbook
--- a/head/contrib/bind9/bin/check/named-checkconf.docbook Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/bin/check/named-checkconf.docbook Tue Apr 17 11:51=
:51 2012 +0300
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: named-checkconf.docbook,v 1.22 2009-12-28 23:21:16 each Exp $ -->
+<!-- $Id: named-checkconf.docbook,v 1.22 2009/12/28 23:21:16 each Exp $ -->
<refentry id=3D"man.named-checkconf">
<refentryinfo>
<date>June 14, 2000</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/check/named-che=
ckconf.html
--- a/head/contrib/bind9/bin/check/named-checkconf.html Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/bin/check/named-checkconf.html Tue Apr 17 11:51:51=
2012 +0300
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: named-checkconf.html,v 1.33 2009-12-29 01:14:03 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -32,7 +32,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">named-checkconf</cod=
e> [<code class=3D"option">-h</code>] [<code class=3D"option">-v</code>] [=
<code class=3D"option">-j</code>] [<code class=3D"option">-t <em class=3D"r=
eplaceable"><code>directory</code></em></code>] {filename} [<code class=3D"=
option">-p</code>] [<code class=3D"option">-z</code>]</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543395"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543396"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">named-checkconf</strong></span>
checks the syntax, but not the semantics, of a
<span><strong class=3D"command">named</strong></span> configuration =
file. The file is parsed
@@ -52,7 +52,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543444"></a><h2>OPTIONS</h2>
+<a name=3D"id2543445"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-h</span></dt>
<dd><p>
@@ -91,21 +91,21 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543568"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2543569"></a><h2>RETURN VALUES</h2>
<p><span><strong class=3D"command">named-checkconf</strong></span>
returns an exit status of 1 if
errors were detected and 0 otherwise.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543579"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543580"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">named</span>=
(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named-che=
ckzone</span>(8)</span>,
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543609"></a><h2>AUTHOR</h2>
+<a name=3D"id2543610"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/check/named-che=
ckzone.8
--- a/head/contrib/bind9/bin/check/named-checkzone.8 Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/bin/check/named-checkzone.8 Tue Apr 17 11:51:51 20=
12 +0300
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: named-checkzone.8,v 1.47 2010-01-17 01:14:02 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/check/named-che=
ckzone.c
--- a/head/contrib/bind9/bin/check/named-checkzone.c Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/bin/check/named-checkzone.c Tue Apr 17 11:51:51 20=
12 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2010 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: named-checkzone.c,v 1.61 2010-09-07 23:46:59 tbox Exp $ */
+/* $Id: named-checkzone.c,v 1.61.62.2 2011/12/22 23:45:54 tbox Exp $ */
=20
/*! \file */
=20
@@ -112,6 +112,7 @@
const char *outputformatstr =3D NULL;
dns_masterformat_t inputformat =3D dns_masterformat_text;
dns_masterformat_t outputformat =3D dns_masterformat_text;
+ isc_boolean_t logdump =3D ISC_FALSE;
FILE *errout =3D stdout;
=20
outputstyle =3D &dns_master_style_full;
@@ -418,6 +419,7 @@
=20
if (progmode =3D=3D progmode_compile) {
dumpzone =3D 1; /* always dump */
+ logdump =3D !quiet;
if (output_filename =3D=3D NULL) {
fprintf(stderr,
"output file required, but not specified\n");
@@ -436,8 +438,10 @@
(output_filename =3D=3D NULL ||
strcmp(output_filename, "-") =3D=3D 0 ||
strcmp(output_filename, "/dev/fd/1") =3D=3D 0 ||
- strcmp(output_filename, "/dev/stdout") =3D=3D 0))
+ strcmp(output_filename, "/dev/stdout") =3D=3D 0)) {
errout =3D stderr;
+ logdump =3D ISC_FALSE;
+ }
=20
if (isc_commandline_index + 2 !=3D argc)
usage();
@@ -462,13 +466,13 @@
&zone);
=20
if (result =3D=3D ISC_R_SUCCESS && dumpzone) {
- if (!quiet && progmode =3D=3D progmode_compile) {
+ if (logdump) {
fprintf(errout, "dump zone to %s...", output_filename);
fflush(errout);
}
result =3D dump_zone(origin, zone, output_filename,
outputformat, outputstyle);
- if (!quiet && progmode =3D=3D progmode_compile)
+ if (logdump)
fprintf(errout, "done\n");
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/check/named-che=
ckzone.docbook
--- a/head/contrib/bind9/bin/check/named-checkzone.docbook Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/bin/check/named-checkzone.docbook Tue Apr 17 11:51=
:51 2012 +0300
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: named-checkzone.docbook,v 1.40 2010-01-16 23:48:15 tbox Exp $ -->
+<!-- $Id: named-checkzone.docbook,v 1.40 2010/01/16 23:48:15 tbox Exp $ -->
<refentry id=3D"man.named-checkzone">
<refentryinfo>
<date>June 13, 2000</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/check/named-che=
ckzone.html
--- a/head/contrib/bind9/bin/check/named-checkzone.html Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/bin/check/named-checkzone.html Tue Apr 17 11:51:51=
2012 +0300
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: named-checkzone.html,v 1.47 2010-01-17 01:14:02 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -33,7 +33,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">named-compilezone</c=
ode> [<code class=3D"option">-d</code>] [<code class=3D"option">-j</code>]=
[<code class=3D"option">-q</code>] [<code class=3D"option">-v</code>] [<co=
de class=3D"option">-c <em class=3D"replaceable"><code>class</code></em></c=
ode>] [<code class=3D"option">-C <em class=3D"replaceable"><code>mode</code=
></em></code>] [<code class=3D"option">-f <em class=3D"replaceable"><code>f=
ormat</code></em></code>] [<code class=3D"option">-F <em class=3D"replaceab=
le"><code>format</code></em></code>] [<code class=3D"option">-i <em class=
=3D"replaceable"><code>mode</code></em></code>] [<code class=3D"option">-k =
<em class=3D"replaceable"><code>mode</code></em></code>] [<code class=3D"op=
tion">-m <em class=3D"replaceable"><code>mode</code></em></code>] [<code cl=
ass=3D"option">-n <em class=3D"replaceable"><code>mode</code></em></code>] =
[<code class=3D"option">-r <em class=3D"replaceable"><code>mode</code></em>=
</code>] [<code class=3D"option">-s <em class=3D"replaceable"><code>style</=
code></em></code>] [<code class=3D"option">-t <em class=3D"replaceable"><co=
de>directory</code></em></code>] [<code class=3D"option">-w <em class=3D"re=
placeable"><code>directory</code></em></code>] [<code class=3D"option">-D</=
code>] [<code class=3D"option">-W <em class=3D"replaceable"><code>mode</cod=
e></em></code>] {<code class=3D"option">-o <em class=3D"replaceable"><code>=
filename</code></em></code>} {zonename} {filename}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543694"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543696"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">named-checkzone</strong></span>
checks the syntax and integrity of a zone file. It performs the
same checks as <span><strong class=3D"command">named</strong></span>=
does when loading a
@@ -53,7 +53,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543730"></a><h2>OPTIONS</h2>
+<a name=3D"id2543731"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-d</span></dt>
<dd><p>
@@ -247,14 +247,14 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544377"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2544446"></a><h2>RETURN VALUES</h2>
<p><span><strong class=3D"command">named-checkzone</strong></span>
returns an exit status of 1 if
errors were detected and 0 otherwise.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544389"></a><h2>SEE ALSO</h2>
+<a name=3D"id2544458"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">named</span>=
(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named-che=
ckconf</span>(8)</span>,
<em class=3D"citetitle">RFC 1035</em>,
@@ -262,7 +262,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544422"></a><h2>AUTHOR</h2>
+<a name=3D"id2544491"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/Makefil=
e.in
--- a/head/contrib/bind9/bin/confgen/Makefile.in Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/bin/confgen/Makefile.in Tue Apr 17 11:51:51 2012 +=
0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.8 2009-12-05 23:31:40 each Exp $
+# $Id: Makefile.in,v 1.8 2009/12/05 23:31:40 each Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/ddns-co=
nfgen.8
--- a/head/contrib/bind9/bin/confgen/ddns-confgen.8 Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/bin/confgen/ddns-confgen.8 Tue Apr 17 11:51:51 201=
2 +0300
@@ -12,7 +12,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: ddns-confgen.8,v 1.10 2009-09-19 01:14:52 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/ddns-co=
nfgen.c
--- a/head/contrib/bind9/bin/confgen/ddns-confgen.c Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/bin/confgen/ddns-confgen.c Tue Apr 17 11:51:51 201=
2 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ddns-confgen.c,v 1.9.308.2 2011-03-12 04:59:13 tbox Exp $ */
+/* $Id: ddns-confgen.c,v 1.9.308.2 2011/03/12 04:59:13 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/ddns-co=
nfgen.docbook
--- a/head/contrib/bind9/bin/confgen/ddns-confgen.docbook Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/confgen/ddns-confgen.docbook Tue Apr 17 11:51:=
51 2012 +0300
@@ -17,7 +17,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: ddns-confgen.docbook,v 1.6 2009-09-18 22:08:55 fdupont Exp $ -->
+<!-- $Id: ddns-confgen.docbook,v 1.6 2009/09/18 22:08:55 fdupont Exp $ -->
<refentry id=3D"man.ddns-confgen">
<refentryinfo>
<date>Jan 29, 2009</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/ddns-co=
nfgen.html
--- a/head/contrib/bind9/bin/confgen/ddns-confgen.html Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/bin/confgen/ddns-confgen.html Tue Apr 17 11:51:51 =
2012 +0300
@@ -13,7 +13,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: ddns-confgen.html,v 1.10 2009-09-19 01:14:52 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -31,7 +31,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">ddns-confgen</code> =
[<code class=3D"option">-a <em class=3D"replaceable"><code>algorithm</code=
></em></code>] [<code class=3D"option">-h</code>] [<code class=3D"option">-=
k <em class=3D"replaceable"><code>keyname</code></em></code>] [<code class=
=3D"option">-r <em class=3D"replaceable"><code>randomfile</code></em></code=
>] [ -s <em class=3D"replaceable"><code>name</code></em> | -z <em class=
=3D"replaceable"><code>zone</code></em> ] [<code class=3D"option">-q</code>=
] [name]</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543395"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543396"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">ddns-confgen</strong></span>
generates a key for use by <span><strong class=3D"command">nsupdate<=
/strong></span>
and <span><strong class=3D"command">named</strong></span>. It simpl=
ifies configuration
@@ -58,7 +58,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543454"></a><h2>OPTIONS</h2>
+<a name=3D"id2543456"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-a <em class=3D"replaceable"><code>algorithm</cod=
e></em></span></dt>
<dd><p>
@@ -125,7 +125,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543642"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543643"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">nsupdate</sp=
an>(1)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named.con=
f</span>(5)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named</sp=
an>(8)</span>,
@@ -133,7 +133,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543681"></a><h2>AUTHOR</h2>
+<a name=3D"id2543682"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/include=
/confgen/os.h
--- a/head/contrib/bind9/bin/confgen/include/confgen/os.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/confgen/include/confgen/os.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: os.h,v 1.3 2009-06-11 23:47:55 tbox Exp $ */
+/* $Id: os.h,v 1.3 2009/06/11 23:47:55 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/keygen.c
--- a/head/contrib/bind9/bin/confgen/keygen.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/confgen/keygen.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: keygen.c,v 1.4 2009-11-12 14:02:38 marka Exp $ */
+/* $Id: keygen.c,v 1.4 2009/11/12 14:02:38 marka Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/keygen.h
--- a/head/contrib/bind9/bin/confgen/keygen.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/confgen/keygen.h Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: keygen.h,v 1.3 2009-06-11 23:47:55 tbox Exp $ */
+/* $Id: keygen.h,v 1.3 2009/06/11 23:47:55 tbox Exp $ */
=20
#ifndef RNDC_KEYGEN_H
#define RNDC_KEYGEN_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/rndc-co=
nfgen.8
--- a/head/contrib/bind9/bin/confgen/rndc-confgen.8 Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/bin/confgen/rndc-confgen.8 Tue Apr 17 11:51:51 201=
2 +0300
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: rndc-confgen.8,v 1.7 2009-07-11 01:12:45 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/rndc-co=
nfgen.c
--- a/head/contrib/bind9/bin/confgen/rndc-confgen.c Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/bin/confgen/rndc-confgen.c Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rndc-confgen.c,v 1.5.308.2 2011-03-12 04:59:13 tbox Exp $ */
+/* $Id: rndc-confgen.c,v 1.5.308.2 2011/03/12 04:59:13 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/rndc-co=
nfgen.docbook
--- a/head/contrib/bind9/bin/confgen/rndc-confgen.docbook Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/confgen/rndc-confgen.docbook Tue Apr 17 11:51:=
51 2012 +0300
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: rndc-confgen.docbook,v 1.4 2009-06-15 23:47:59 tbox Exp $ -->
+<!-- $Id: rndc-confgen.docbook,v 1.4 2009/06/15 23:47:59 tbox Exp $ -->
<refentry id=3D"man.rndc-confgen">
<refentryinfo>
<date>Aug 27, 2001</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/rndc-co=
nfgen.html
--- a/head/contrib/bind9/bin/confgen/rndc-confgen.html Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/bin/confgen/rndc-confgen.html Tue Apr 17 11:51:51 =
2012 +0300
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: rndc-confgen.html,v 1.7 2009-07-11 01:12:45 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -32,7 +32,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">rndc-confgen</code> =
[<code class=3D"option">-a</code>] [<code class=3D"option">-b <em class=3D=
"replaceable"><code>keysize</code></em></code>] [<code class=3D"option">-c =
<em class=3D"replaceable"><code>keyfile</code></em></code>] [<code class=3D=
"option">-h</code>] [<code class=3D"option">-k <em class=3D"replaceable"><c=
ode>keyname</code></em></code>] [<code class=3D"option">-p <em class=3D"rep=
laceable"><code>port</code></em></code>] [<code class=3D"option">-r <em cla=
ss=3D"replaceable"><code>randomfile</code></em></code>] [<code class=3D"opt=
ion">-s <em class=3D"replaceable"><code>address</code></em></code>] [<code =
class=3D"option">-t <em class=3D"replaceable"><code>chrootdir</code></em></=
code>] [<code class=3D"option">-u <em class=3D"replaceable"><code>user</cod=
e></em></code>]</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543432"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543433"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">rndc-confgen</strong></span>
generates configuration files
for <span><strong class=3D"command">rndc</strong></span>. It can be=
used as a
@@ -48,7 +48,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543477"></a><h2>OPTIONS</h2>
+<a name=3D"id2543478"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-a</span></dt>
<dd>
@@ -155,7 +155,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543790"></a><h2>EXAMPLES</h2>
+<a name=3D"id2543792"></a><h2>EXAMPLES</h2>
<p>
To allow <span><strong class=3D"command">rndc</strong></span> to be =
used with
no manual configuration, run
@@ -172,7 +172,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543832"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543833"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">rndc</span>(=
8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">rndc.conf=
</span>(5)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named</sp=
an>(8)</span>,
@@ -180,7 +180,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543870"></a><h2>AUTHOR</h2>
+<a name=3D"id2543872"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/unix/Ma=
kefile.in
--- a/head/contrib/bind9/bin/confgen/unix/Makefile.in Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/bin/confgen/unix/Makefile.in Tue Apr 17 11:51:51 2=
012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.3 2009-06-11 23:47:55 tbox Exp $
+# $Id: Makefile.in,v 1.3 2009/06/11 23:47:55 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/unix/os=
.c
--- a/head/contrib/bind9/bin/confgen/unix/os.c Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/bin/confgen/unix/os.c Tue Apr 17 11:51:51 2012 +03=
00
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: os.c,v 1.3 2009-06-11 23:47:55 tbox Exp $ */
+/* $Id: os.c,v 1.3 2009/06/11 23:47:55 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/util.c
--- a/head/contrib/bind9/bin/confgen/util.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/confgen/util.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: util.c,v 1.3 2009-06-11 23:47:55 tbox Exp $ */
+/* $Id: util.c,v 1.3 2009/06/11 23:47:55 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/confgen/util.h
--- a/head/contrib/bind9/bin/confgen/util.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/confgen/util.h Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: util.h,v 1.4 2009-09-29 15:06:05 fdupont Exp $ */
+/* $Id: util.h,v 1.4 2009/09/29 15:06:05 fdupont Exp $ */
=20
#ifndef RNDC_UTIL_H
#define RNDC_UTIL_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dig/Makefile.in
--- a/head/contrib/bind9/bin/dig/Makefile.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/dig/Makefile.in Tue Apr 17 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.47 2009-12-05 23:31:40 each Exp $
+# $Id: Makefile.in,v 1.47 2009/12/05 23:31:40 each Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dig/dig.1
--- a/head/contrib/bind9/bin/dig/dig.1 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/dig/dig.1 Tue Apr 17 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: dig.1,v 1.54 2010-03-05 01:14:15 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dig/dig.c
--- a/head/contrib/bind9/bin/dig/dig.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/dig/dig.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dig.c,v 1.237.124.3 2011-03-11 06:46:58 marka Exp $ */
+/* $Id: dig.c,v 1.237.124.4 2011/12/07 17:23:55 each Exp $ */
=20
/*! \file */
=20
@@ -1527,7 +1527,7 @@
if (strncmp(rv[0], "%", 1) =3D=3D 0)
break;
if (strncmp(rv[0], "@", 1) =3D=3D 0) {
- addresscount =3D getaddresses(lookup, &rv[0][1]);
+ addresscount =3D getaddresses(lookup, &rv[0][1], NULL);
} else if (rv[0][0] =3D=3D '+') {
plus_option(&rv[0][1], is_batchfile,
lookup);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dig/dig.docbook
--- a/head/contrib/bind9/bin/dig/dig.docbook Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/dig/dig.docbook Tue Apr 17 11:51:51 2012 +0300
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: dig.docbook,v 1.47 2010-03-04 23:50:34 tbox Exp $ -->
+<!-- $Id: dig.docbook,v 1.47 2010/03/04 23:50:34 tbox Exp $ -->
<refentry id=3D"man.dig">
=20
<refentryinfo>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dig/dig.html
--- a/head/contrib/bind9/bin/dig/dig.html Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/dig/dig.html Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: dig.html,v 1.49 2010-03-05 01:14:15 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -34,7 +34,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">dig</code> [global-=
queryopt...] [query...]</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543522"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543524"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">dig</strong></span>
(domain information groper) is a flexible tool
for interrogating DNS name servers. It performs DNS lookups and
@@ -80,7 +80,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543595"></a><h2>SIMPLE USAGE</h2>
+<a name=3D"id2543597"></a><h2>SIMPLE USAGE</h2>
<p>
A typical invocation of <span><strong class=3D"command">dig</strong>=
</span> looks like:
</p>
@@ -126,7 +126,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543686"></a><h2>OPTIONS</h2>
+<a name=3D"id2543688"></a><h2>OPTIONS</h2>
<p>
The <code class=3D"option">-b</code> option sets the source IP addre=
ss of the query
to <em class=3D"parameter"><code>address</code></em>. This must be =
a valid
@@ -230,7 +230,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544035"></a><h2>QUERY OPTIONS</h2>
+<a name=3D"id2544037"></a><h2>QUERY OPTIONS</h2>
<p><span><strong class=3D"command">dig</strong></span>
provides a number of query options which affect
the way in which lookups are made and the results displayed. Some of
@@ -561,7 +561,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2545184"></a><h2>MULTIPLE QUERIES</h2>
+<a name=3D"id2545186"></a><h2>MULTIPLE QUERIES</h2>
<p>
The BIND 9 implementation of <span><strong class=3D"command">dig </s=
trong></span>
supports
@@ -607,7 +607,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2545245"></a><h2>IDN SUPPORT</h2>
+<a name=3D"id2545248"></a><h2>IDN SUPPORT</h2>
<p>
If <span><strong class=3D"command">dig</strong></span> has been buil=
t with IDN (internationalized
domain name) support, it can accept and display non-ASCII domain nam=
es.
@@ -621,14 +621,14 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2545336"></a><h2>FILES</h2>
+<a name=3D"id2545338"></a><h2>FILES</h2>
<p><code class=3D"filename">/etc/resolv.conf</code>
</p>
<p><code class=3D"filename">${HOME}/.digrc</code>
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2545353"></a><h2>SEE ALSO</h2>
+<a name=3D"id2545355"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">host</span>(=
1)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named</sp=
an>(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-ke=
ygen</span>(8)</span>,
@@ -636,7 +636,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2545390"></a><h2>BUGS</h2>
+<a name=3D"id2545393"></a><h2>BUGS</h2>
<p>
There are probably too many query options.
</p>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dig/dighost.c
--- a/head/contrib/bind9/bin/dig/dighost.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/dig/dighost.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dighost.c,v 1.336.22.4 2011-03-11 06:46:58 marka Exp $ */
+/* $Id: dighost.c,v 1.336.22.9 2011/12/07 17:23:55 each Exp $ */
=20
/*! \file
* \note
@@ -66,6 +66,7 @@
#include <dns/tsig.h>
=20
#include <dst/dst.h>
+#include <dst/result.h>
=20
#include <isc/app.h>
#include <isc/base64.h>
@@ -81,6 +82,7 @@
#include <isc/print.h>
#include <isc/random.h>
#include <isc/result.h>
+#include <isc/serial.h>
#include <isc/string.h>
#include <isc/task.h>
#include <isc/timer.h>
@@ -360,6 +362,8 @@
static void
launch_next_query(dig_query_t *query, isc_boolean_t include_question);
=20
+static void
+send_tcp_connect(dig_query_t *query);
=20
static void *
mem_alloc(void *arg, size_t size) {
@@ -742,7 +746,7 @@
looknew->xfr_q =3D NULL;
looknew->current_query =3D NULL;
looknew->doing_xfr =3D ISC_FALSE;
- looknew->ixfr_serial =3D ISC_FALSE;
+ looknew->ixfr_serial =3D 0;
looknew->trace =3D ISC_FALSE;
looknew->trace_root =3D ISC_FALSE;
looknew->identify =3D ISC_FALSE;
@@ -787,6 +791,7 @@
looknew->new_search =3D ISC_FALSE;
looknew->done_as_is =3D ISC_FALSE;
looknew->need_search =3D ISC_FALSE;
+ dns_fixedname_init(&looknew->fdomain);
ISC_LINK_INIT(looknew, link);
ISC_LIST_INIT(looknew->q);
ISC_LIST_INIT(looknew->my_server_list);
@@ -862,6 +867,8 @@
looknew->tsigctx =3D NULL;
looknew->need_search =3D lookold->need_search;
looknew->done_as_is =3D lookold->done_as_is;
+ dns_name_copy(dns_fixedname_name(&lookold->fdomain),
+ dns_fixedname_name(&looknew->fdomain), NULL);
=20
if (servers)
clone_server_list(lookold->my_server_list,
@@ -925,6 +932,11 @@
=20
secretsize =3D isc_buffer_usedlength(&secretbuf);
=20
+ if (hmacname =3D=3D NULL) {
+ result =3D DST_R_UNSUPPORTEDALG;
+ goto failure;
+ }
+
result =3D dns_name_fromtext(&keyname, namebuf, dns_rootname, 0, namebuf);
if (result !=3D ISC_R_SUCCESS)
goto failure;
@@ -1698,6 +1710,9 @@
isc_result_t result;
isc_boolean_t success =3D ISC_FALSE;
int numLookups =3D 0;
+ int num;
+ isc_result_t lresult, addresses_result;
+ char bad_namestr[DNS_NAME_FORMATSIZE];
dns_name_t *domain;
isc_boolean_t horizontal =3D ISC_FALSE, bad =3D ISC_FALSE;
=20
@@ -1705,6 +1720,8 @@
=20
debug("following up %s", query->lookup->textname);
=20
+ addresses_result =3D ISC_R_SUCCESS;
+ bad_namestr[0] =3D '\0';
for (result =3D dns_message_firstname(msg, section);
result =3D=3D ISC_R_SUCCESS;
result =3D dns_message_nextname(msg, section)) {
@@ -1783,15 +1800,27 @@
lookup->trace_root =3D ISC_FALSE;
if (lookup->ns_search_only)
lookup->recurse =3D ISC_FALSE;
- dns_fixedname_init(&lookup->fdomain);
domain =3D dns_fixedname_name(&lookup->fdomain);
dns_name_copy(name, domain, NULL);
}
debug("adding server %s", namestr);
- numLookups +=3D getaddresses(lookup, namestr);
+ num =3D getaddresses(lookup, namestr, &lresult);
+ if (lresult !=3D ISC_R_SUCCESS) {
+ debug("couldn't get address for '%s': %s",
+ namestr, isc_result_totext(lresult));
+ if (addresses_result =3D=3D ISC_R_SUCCESS) {
+ addresses_result =3D lresult;
+ strcpy(bad_namestr, namestr);
+ }
+ }
+ numLookups +=3D num;
dns_rdata_reset(&rdata);
}
}
+ if (numLookups =3D=3D 0 && addresses_result !=3D ISC_R_SUCCESS) {
+ fatal("couldn't get address for '%s': %s",
+ bad_namestr, isc_result_totext(result));
+ }
=20
if (lookup =3D=3D NULL &&
section =3D=3D DNS_SECTION_ANSWER &&
@@ -1838,12 +1867,10 @@
* Return ISC_TRUE iff there was another searchlist entry.
*/
static isc_boolean_t
-next_origin(dns_message_t *msg, dig_query_t *query) {
+next_origin(dig_query_t *query) {
dig_lookup_t *lookup;
dig_searchlist_t *search;
=20
- UNUSED(msg);
-
INSIST(!free_now);
=20
debug("next_origin()");
@@ -2318,7 +2345,7 @@
query->waiting_senddone =3D ISC_FALSE;
l =3D query->lookup;
=20
- if (l->ns_search_only && !l->trace_root) {
+ if (l->ns_search_only && !l->trace_root && !l->tcp_mode) {
debug("sending next, since searching");
next =3D ISC_LIST_NEXT(query, link);
if (next !=3D NULL)
@@ -2865,8 +2892,10 @@
dns_rdataset_t *rdataset =3D NULL;
dns_rdata_t rdata =3D DNS_RDATA_INIT;
dns_rdata_soa_t soa;
- isc_uint32_t serial;
+ isc_uint32_t ixfr_serial =3D query->lookup->ixfr_serial, serial;
isc_result_t result;
+ isc_boolean_t ixfr =3D query->lookup->rdtype =3D=3D dns_rdatatype_ixfr;
+ isc_boolean_t axfr =3D query->lookup->rdtype =3D=3D dns_rdatatype_axfr;
=20
debug("check_for_more_data()");
=20
@@ -2916,6 +2945,7 @@
query->second_rr_rcvd =3D ISC_TRUE;
query->second_rr_serial =3D 0;
debug("got the second rr as nonsoa");
+ axfr =3D ISC_TRUE;
goto next_rdata;
}
=20
@@ -2925,6 +2955,7 @@
*/
if (rdata.type !=3D dns_rdatatype_soa)
goto next_rdata;
+
/* Now we have an SOA. Work with it. */
debug("got an SOA");
result =3D dns_rdata_tostruct(&rdata, &soa, NULL);
@@ -2934,15 +2965,17 @@
if (!query->first_soa_rcvd) {
query->first_soa_rcvd =3D ISC_TRUE;
query->first_rr_serial =3D serial;
- debug("this is the first %d",
- query->lookup->ixfr_serial);
- if (query->lookup->ixfr_serial >=3D
- serial)
+ debug("this is the first serial %u",
+ serial);
+ if (ixfr && isc_serial_ge(ixfr_serial,
+ serial)) {
+ debug("got up to date "
+ "response");
goto doexit;
+ }
goto next_rdata;
}
- if (query->lookup->rdtype =3D=3D
- dns_rdatatype_axfr) {
+ if (axfr) {
debug("doing axfr, got second SOA");
goto doexit;
}
@@ -2952,22 +2985,12 @@
"empty zone");
goto doexit;
}
- debug("this is the second %d",
- query->lookup->ixfr_serial);
+ debug("this is the second serial %u",
+ serial);
query->second_rr_rcvd =3D ISC_TRUE;
query->second_rr_serial =3D serial;
goto next_rdata;
}
- if (query->second_rr_serial =3D=3D 0) {
- /*
- * If the second RR was a non-SOA
- * record, and we're getting any
- * other SOA, then this is an
- * AXFR, and we're done.
- */
- debug("done, since axfr");
- goto doexit;
- }
/*
* If we get to this point, we're doing an
* IXFR and have to start really looking
@@ -2983,7 +3006,7 @@
debug("done with ixfr");
goto doexit;
}
- debug("meaningless soa %d", serial);
+ debug("meaningless soa %u", serial);
next_rdata:
result =3D dns_rdataset_next(rdataset);
} while (result =3D=3D ISC_R_SUCCESS);
@@ -3360,7 +3383,7 @@
if (!l->doing_xfr || l->xfr_q =3D=3D query) {
if (msg->rcode !=3D dns_rcode_noerror &&
(l->origin !=3D NULL || l->need_search)) {
- if (!next_origin(msg, query) || showsearch) {
+ if (!next_origin(query) || showsearch) {
printmessage(query, msg, ISC_TRUE);
received(b->used, &sevent->address, query);
}
@@ -3546,7 +3569,7 @@
}
=20
int
-getaddresses(dig_lookup_t *lookup, const char *host) {
+getaddresses(dig_lookup_t *lookup, const char *host, isc_result_t *resultp=
) {
isc_result_t result;
isc_sockaddr_t sockaddrs[DIG_MAX_ADDRESSES];
isc_netaddr_t netaddr;
@@ -3556,9 +3579,14 @@
=20
result =3D bind9_getaddresses(host, 0, sockaddrs,
DIG_MAX_ADDRESSES, &count);
- if (result !=3D ISC_R_SUCCESS)
- fatal("couldn't get address for '%s': %s",
- host, isc_result_totext(result));
+ if (resultp !=3D NULL)
+ *resultp =3D result;
+ if (result !=3D ISC_R_SUCCESS) {
+ if (resultp =3D=3D NULL)
+ fatal("couldn't get address for '%s': %s",
+ host, isc_result_totext(result));
+ return 0;
+ }
=20
for (i =3D 0; i < count; i++) {
isc_netaddr_fromsockaddr(&netaddr, &sockaddrs[i]);
@@ -4208,7 +4236,6 @@
return (result);
}
=20
-
isc_result_t
get_trusted_key(isc_mem_t *mctx)
{
@@ -4270,6 +4297,7 @@
if (key !=3D NULL)
dst_key_free(&key);
}
+ fclose(fp);
return (ISC_R_SUCCESS);
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dig/host.1
--- a/head/contrib/bind9/bin/dig/host.1 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/dig/host.1 Tue Apr 17 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: host.1,v 1.31 2009-07-11 01:12:45 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dig/host.c
--- a/head/contrib/bind9/bin/dig/host.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/dig/host.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: host.c,v 1.124.40.3 2011-03-11 06:46:59 marka Exp $ */
+/* $Id: host.c,v 1.124.40.3 2011/03/11 06:46:59 marka Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dig/host.docbook
--- a/head/contrib/bind9/bin/dig/host.docbook Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/dig/host.docbook Tue Apr 17 11:51:51 2012 +0300
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: host.docbook,v 1.20 2009-01-20 23:47:56 tbox Exp $ -->
+<!-- $Id: host.docbook,v 1.20 2009/01/20 23:47:56 tbox Exp $ -->
<refentry id=3D"man.host">
=20
<refentryinfo>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dig/host.html
--- a/head/contrib/bind9/bin/dig/host.html Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/dig/host.html Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: host.html,v 1.30 2009-07-11 01:12:45 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -32,7 +32,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">host</code> [<code =
class=3D"option">-aCdlnrsTwv</code>] [<code class=3D"option">-c <em class=
=3D"replaceable"><code>class</code></em></code>] [<code class=3D"option">-N=
<em class=3D"replaceable"><code>ndots</code></em></code>] [<code class=3D"=
option">-R <em class=3D"replaceable"><code>number</code></em></code>] [<cod=
e class=3D"option">-t <em class=3D"replaceable"><code>type</code></em></cod=
e>] [<code class=3D"option">-W <em class=3D"replaceable"><code>wait</code><=
/em></code>] [<code class=3D"option">-m <em class=3D"replaceable"><code>fla=
g</code></em></code>] [<code class=3D"option">-4</code>] [<code class=3D"op=
tion">-6</code>] {name} [server]</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543434"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543436"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">host</strong></span>
is a simple utility for performing DNS lookups.
It is normally used to convert names to IP addresses and vice versa.
@@ -184,7 +184,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543800"></a><h2>IDN SUPPORT</h2>
+<a name=3D"id2543802"></a><h2>IDN SUPPORT</h2>
<p>
If <span><strong class=3D"command">host</strong></span> has been bui=
lt with IDN (internationalized
domain name) support, it can accept and display non-ASCII domain nam=
es.=20
@@ -198,12 +198,12 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543822"></a><h2>FILES</h2>
+<a name=3D"id2543825"></a><h2>FILES</h2>
<p><code class=3D"filename">/etc/resolv.conf</code>
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543834"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543836"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">dig</span>(1=
)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named</sp=
an>(8)</span>.
</p>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dig/include/dig=
/dig.h
--- a/head/contrib/bind9/bin/dig/include/dig/dig.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/bin/dig/include/dig/dig.h Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dig.h,v 1.111.306.2 2011-02-28 01:19:58 tbox Exp $ */
+/* $Id: dig.h,v 1.111.306.3 2011/12/07 17:23:55 each Exp $ */
=20
#ifndef DIG_H
#define DIG_H
@@ -289,7 +289,7 @@
get_address(char *host, in_port_t port, isc_sockaddr_t *sockaddr);
=20
int
-getaddresses(dig_lookup_t *lookup, const char *host);
+getaddresses(dig_lookup_t *lookup, const char *host, isc_result_t *resultp=
);
=20
isc_result_t
get_reverse(char *reverse, size_t len, char *value, isc_boolean_t ip6_int,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dig/nslookup.1
--- a/head/contrib/bind9/bin/dig/nslookup.1 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/dig/nslookup.1 Tue Apr 17 11:51:51 2012 +0300
@@ -12,7 +12,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: nslookup.1,v 1.16 2010-02-23 01:14:31 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dig/nslookup.c
--- a/head/contrib/bind9/bin/dig/nslookup.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/dig/nslookup.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: nslookup.c,v 1.127.38.2 2011-02-28 01:19:58 tbox Exp $ */
+/* $Id: nslookup.c,v 1.127.38.2 2011/02/28 01:19:58 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dig/nslookup.do=
cbook
--- a/head/contrib/bind9/bin/dig/nslookup.docbook Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/bin/dig/nslookup.docbook Tue Apr 17 11:51:51 2012 =
+0300
@@ -17,7 +17,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: nslookup.docbook,v 1.18 2010-02-22 23:49:11 tbox Exp $ -->
+<!-- $Id: nslookup.docbook,v 1.18 2010/02/22 23:49:11 tbox Exp $ -->
<!--
- Copyright (c) 1985, 1989
- The Regents of the University of California. All rights reserved.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dig/nslookup.ht=
ml
--- a/head/contrib/bind9/bin/dig/nslookup.html Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/bin/dig/nslookup.html Tue Apr 17 11:51:51 2012 +03=
00
@@ -13,7 +13,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: nslookup.html,v 1.23 2010-02-23 01:14:31 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -21,7 +21,7 @@
<meta name=3D"generator" content=3D"DocBook XSL Stylesheets V1.71.1">
</head>
<body bgcolor=3D"white" text=3D"black" link=3D"#0000FF" vlink=3D"#840084" =
alink=3D"#0000FF"><div class=3D"refentry" lang=3D"en">
-<a name=3D"id2476276"></a><div class=3D"titlepage"></div>
+<a name=3D"id2476277"></a><div class=3D"titlepage"></div>
<div class=3D"refnamediv">
<h2>Name</h2>
<p>nslookup — query Internet name servers interactively</p>
@@ -31,7 +31,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">nslookup</code> [<c=
ode class=3D"option">-option</code>] [name | -] [server]</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543358"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543361"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">Nslookup</strong></span>
is a program to query Internet domain name servers. <span><strong c=
lass=3D"command">Nslookup</strong></span>
has two modes: interactive and non-interactive. Interactive mode al=
lows
@@ -43,7 +43,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543374"></a><h2>ARGUMENTS</h2>
+<a name=3D"id2543377"></a><h2>ARGUMENTS</h2>
<p>
Interactive mode is entered in the following cases:
</p>
@@ -78,7 +78,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543418"></a><h2>INTERACTIVE COMMANDS</h2>
+<a name=3D"id2543420"></a><h2>INTERACTIVE COMMANDS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term"><code class=3D"constant">host</code> [<span class=
=3D"optional">server</span>]</span></dt>
<dd>
@@ -288,19 +288,19 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2546284"></a><h2>FILES</h2>
+<a name=3D"id2546286"></a><h2>FILES</h2>
<p><code class=3D"filename">/etc/resolv.conf</code>
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2546296"></a><h2>SEE ALSO</h2>
+<a name=3D"id2546298"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">dig</span>(1=
)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">host</spa=
n>(1)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named</sp=
an>(8)</span>.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2546330"></a><h2>Author</h2>
+<a name=3D"id2546332"></a><h2>Author</h2>
<p>
Andrew Cherenson
</p>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/Makefile=
.in
--- a/head/contrib/bind9/bin/dnssec/Makefile.in Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/bin/dnssec/Makefile.in Tue Apr 17 11:51:51 2012 +0=
300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.42 2009-12-05 23:31:40 each Exp $
+# $Id: Makefile.in,v 1.42 2009/12/05 23:31:40 each Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-d=
sfromkey.8
--- a/head/contrib/bind9/bin/dnssec/dnssec-dsfromkey.8 Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-dsfromkey.8 Tue Apr 17 11:51:51 =
2012 +0300
@@ -12,7 +12,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: dnssec-dsfromkey.8,v 1.13 2010-12-24 01:14:20 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-d=
sfromkey.c
--- a/head/contrib/bind9/bin/dnssec/dnssec-dsfromkey.c Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-dsfromkey.c Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2008-2010 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2008-2011 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dnssec-dsfromkey.c,v 1.19 2010-12-23 04:07:59 marka Exp $ */
+/* $Id: dnssec-dsfromkey.c,v 1.19.14.2 2011/09/05 23:45:53 tbox Exp $ */
=20
/*! \file */
=20
@@ -265,12 +265,10 @@
fatal("can't print class");
=20
isc_buffer_usedregion(&nameb, &r);
- isc_util_fwrite(r.base, 1, r.length, stdout);
-
- putchar(' ');
+ printf("%.*s ", (int)r.length, r.base);
=20
isc_buffer_usedregion(&classb, &r);
- isc_util_fwrite(r.base, 1, r.length, stdout);
+ printf("%.*s", (int)r.length, r.base);
=20
if (lookaside =3D=3D NULL)
printf(" DS ");
@@ -278,8 +276,7 @@
printf(" DLV ");
=20
isc_buffer_usedregion(&textb, &r);
- isc_util_fwrite(r.base, 1, r.length, stdout);
- putchar('\n');
+ printf("%.*s\n", (int)r.length, r.base);
}
=20
ISC_PLATFORM_NORETURN_PRE static void
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-d=
sfromkey.docbook
--- a/head/contrib/bind9/bin/dnssec/dnssec-dsfromkey.docbook Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-dsfromkey.docbook Tue Apr 17 11:=
51:51 2012 +0300
@@ -17,7 +17,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: dnssec-dsfromkey.docbook,v 1.12 2010-12-23 23:47:08 tbox Exp $ -=
->
+<!-- $Id: dnssec-dsfromkey.docbook,v 1.12 2010/12/23 23:47:08 tbox Exp $ -=
->
<refentry id=3D"man.dnssec-dsfromkey">
<refentryinfo>
<date>August 26, 2009</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-d=
sfromkey.html
--- a/head/contrib/bind9/bin/dnssec/dnssec-dsfromkey.html Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-dsfromkey.html Tue Apr 17 11:51:=
51 2012 +0300
@@ -13,7 +13,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: dnssec-dsfromkey.html,v 1.13 2010-12-24 01:14:19 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -32,14 +32,14 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">dnssec-dsfromkey</co=
de> {-s} [<code class=3D"option">-1</code>] [<code class=3D"option">-2</co=
de>] [<code class=3D"option">-a <em class=3D"replaceable"><code>alg</code><=
/em></code>] [<code class=3D"option">-K <em class=3D"replaceable"><code>dir=
ectory</code></em></code>] [<code class=3D"option">-l <em class=3D"replacea=
ble"><code>domain</code></em></code>] [<code class=3D"option">-s</code>] [<=
code class=3D"option">-c <em class=3D"replaceable"><code>class</code></em><=
/code>] [<code class=3D"option">-f <em class=3D"replaceable"><code>file</co=
de></em></code>] [<code class=3D"option">-A</code>] [<code class=3D"option"=
>-v <em class=3D"replaceable"><code>level</code></em></code>] {dnsname}</p>=
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543464"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543465"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">dnssec-dsfromkey</strong></span>
outputs the Delegation Signer (DS) resource record (RR), as defined =
in
RFC 3658 and RFC 4509, for the given key(s).
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543476"></a><h2>OPTIONS</h2>
+<a name=3D"id2543477"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-1</span></dt>
<dd><p>
@@ -100,7 +100,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543662"></a><h2>EXAMPLE</h2>
+<a name=3D"id2543664"></a><h2>EXAMPLE</h2>
<p>
To build the SHA-256 DS RR from the
<strong class=3D"userinput"><code>Kexample.com.+003+26160</code></st=
rong>
@@ -115,7 +115,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543692"></a><h2>FILES</h2>
+<a name=3D"id2543693"></a><h2>FILES</h2>
<p>
The keyfile can be designed by the key identification
<code class=3D"filename">Knnnn.+aaa+iiiii</code> or the full file na=
me
@@ -129,13 +129,13 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543728"></a><h2>CAVEAT</h2>
+<a name=3D"id2543729"></a><h2>CAVEAT</h2>
<p>
A keyfile error can give a "file not found" even if the file exists.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543737"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543738"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-keyge=
n</span>(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-si=
gnzone</span>(8)</span>,
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
@@ -145,7 +145,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543777"></a><h2>AUTHOR</h2>
+<a name=3D"id2543778"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-k=
eyfromlabel.8
--- a/head/contrib/bind9/bin/dnssec/dnssec-keyfromlabel.8 Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-keyfromlabel.8 Tue Apr 17 11:51:=
51 2012 +0300
@@ -12,7 +12,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: dnssec-keyfromlabel.8,v 1.18.14.2 2011-02-28 02:37:42 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-k=
eyfromlabel.c
--- a/head/contrib/bind9/bin/dnssec/dnssec-keyfromlabel.c Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-keyfromlabel.c Tue Apr 17 11:51:=
51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dnssec-keyfromlabel.c,v 1.32.14.2 2011-03-12 04:59:14 tbox Exp $ */
+/* $Id: dnssec-keyfromlabel.c,v 1.32.14.4 2011/11/30 00:51:38 marka Exp $ =
*/
=20
/*! \file */
=20
@@ -110,7 +110,8 @@
=20
int
main(int argc, char **argv) {
- char *algname =3D NULL, *nametype =3D NULL, *type =3D NULL;
+ char *algname =3D NULL, *freeit =3D NULL;
+ char *nametype =3D NULL, *type =3D NULL;
const char *directory =3D NULL;
#ifdef USE_PKCS11
const char *engine =3D "pkcs11";
@@ -342,6 +343,9 @@
algname =3D strdup(DEFAULT_NSEC3_ALGORITHM);
else
algname =3D strdup(DEFAULT_ALGORITHM);
+ if (algname =3D=3D NULL)
+ fatal("strdup failed");
+ freeit =3D algname;
if (verbose > 0)
fprintf(stderr, "no algorithm specified; "
"defaulting to %s\n", algname);
@@ -514,8 +518,7 @@
* is a risk of ID collision due to this key or another key
* being revoked.
*/
- if (key_collision(dst_key_id(key), name, directory, alg, mctx, &exact))
- {
+ if (key_collision(key, name, directory, mctx, &exact)) {
isc_buffer_clear(&buf);
ret =3D dst_key_buildfilename(key, 0, directory, &buf);
if (ret !=3D ISC_R_SUCCESS)
@@ -560,5 +563,8 @@
isc_mem_free(mctx, label);
isc_mem_destroy(&mctx);
=20
+ if (freeit !=3D NULL)
+ free(freeit);
+
return (0);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-k=
eyfromlabel.docbook
--- a/head/contrib/bind9/bin/dnssec/dnssec-keyfromlabel.docbook Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-keyfromlabel.docbook Tue Apr 17 =
11:51:51 2012 +0300
@@ -17,7 +17,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: dnssec-keyfromlabel.docbook,v 1.18.14.2 2011-02-28 01:19:58 tbox=
Exp $ -->
+<!-- $Id: dnssec-keyfromlabel.docbook,v 1.18.14.2 2011/02/28 01:19:58 tbox=
Exp $ -->
<refentry id=3D"man.dnssec-keyfromlabel">
<refentryinfo>
<date>February 8, 2008</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-k=
eyfromlabel.html
--- a/head/contrib/bind9/bin/dnssec/dnssec-keyfromlabel.html Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-keyfromlabel.html Tue Apr 17 11:=
51:51 2012 +0300
@@ -13,7 +13,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: dnssec-keyfromlabel.html,v 1.17.14.2 2011-02-28 02:37:42 tbox Ex=
p $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -31,7 +31,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">dnssec-keyfromlabel<=
/code> {-l <em class=3D"replaceable"><code>label</code></em>} [<code class=
=3D"option">-3</code>] [<code class=3D"option">-a <em class=3D"replaceable"=
><code>algorithm</code></em></code>] [<code class=3D"option">-A <em class=
=3D"replaceable"><code>date/offset</code></em></code>] [<code class=3D"opti=
on">-c <em class=3D"replaceable"><code>class</code></em></code>] [<code cla=
ss=3D"option">-D <em class=3D"replaceable"><code>date/offset</code></em></c=
ode>] [<code class=3D"option">-E <em class=3D"replaceable"><code>engine</co=
de></em></code>] [<code class=3D"option">-f <em class=3D"replaceable"><code=
>flag</code></em></code>] [<code class=3D"option">-G</code>] [<code class=
=3D"option">-I <em class=3D"replaceable"><code>date/offset</code></em></cod=
e>] [<code class=3D"option">-k</code>] [<code class=3D"option">-K <em class=
=3D"replaceable"><code>directory</code></em></code>] [<code class=3D"option=
">-n <em class=3D"replaceable"><code>nametype</code></em></code>] [<code cl=
ass=3D"option">-P <em class=3D"replaceable"><code>date/offset</code></em></=
code>] [<code class=3D"option">-p <em class=3D"replaceable"><code>protocol<=
/code></em></code>] [<code class=3D"option">-R <em class=3D"replaceable"><c=
ode>date/offset</code></em></code>] [<code class=3D"option">-t <em class=3D=
"replaceable"><code>type</code></em></code>] [<code class=3D"option">-v <em=
class=3D"replaceable"><code>level</code></em></code>] [<code class=3D"opti=
on">-y</code>] {name}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543494"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543495"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">dnssec-keyfromlabel</strong></span>
gets keys with the given label from a crypto hardware and builds
key files for DNSSEC (Secure DNS), as defined in RFC 2535
@@ -44,7 +44,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543512"></a><h2>OPTIONS</h2>
+<a name=3D"id2543513"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-a <em class=3D"replaceable"><code>algorithm</cod=
e></em></span></dt>
<dd>
@@ -163,7 +163,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543876"></a><h2>TIMING OPTIONS</h2>
+<a name=3D"id2543877"></a><h2>TIMING OPTIONS</h2>
<p>
Dates can be expressed in the format YYYYMMDD or YYYYMMDDHHMMSS.
If the argument begins with a '+' or '-', it is interpreted as
@@ -210,7 +210,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544042"></a><h2>GENERATED KEY FILES</h2>
+<a name=3D"id2544043"></a><h2>GENERATED KEY FILES</h2>
<p>
When <span><strong class=3D"command">dnssec-keyfromlabel</strong></s=
pan> completes
successfully,
@@ -249,7 +249,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544115"></a><h2>SEE ALSO</h2>
+<a name=3D"id2544116"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-keyge=
n</span>(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-si=
gnzone</span>(8)</span>,
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
@@ -257,7 +257,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544148"></a><h2>AUTHOR</h2>
+<a name=3D"id2544149"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-k=
eygen.8
--- a/head/contrib/bind9/bin/dnssec/dnssec-keygen.8 Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-keygen.8 Tue Apr 17 11:51:51 201=
2 +0300
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: dnssec-keygen.8,v 1.55 2010-12-24 01:14:19 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-k=
eygen.c
--- a/head/contrib/bind9/bin/dnssec/dnssec-keygen.c Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-keygen.c Tue Apr 17 11:51:51 201=
2 +0300
@@ -29,7 +29,7 @@
* IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dnssec-keygen.c,v 1.115.14.2 2011-03-12 04:59:14 tbox Exp $ */
+/* $Id: dnssec-keygen.c,v 1.115.14.4 2011/11/30 00:51:38 marka Exp $ */
=20
/*! \file */
=20
@@ -197,7 +197,8 @@
=20
int
main(int argc, char **argv) {
- char *algname =3D NULL, *nametype =3D NULL, *type =3D NULL;
+ char *algname =3D NULL, *freeit =3D NULL;
+ char *nametype =3D NULL, *type =3D NULL;
char *classname =3D NULL;
char *endp;
dst_key_t *key =3D NULL;
@@ -509,6 +510,9 @@
algname =3D strdup(DEFAULT_NSEC3_ALGORITHM);
else
algname =3D strdup(DEFAULT_ALGORITHM);
+ if (algname =3D=3D NULL)
+ fatal("strdup failed");
+ freeit =3D algname;
if (verbose > 0)
fprintf(stderr, "no algorithm specified; "
"defaulting to %s\n", algname);
@@ -965,8 +969,7 @@
* if there is a risk of ID collision due to this key
* or another key being revoked.
*/
- if (key_collision(dst_key_id(key), name, directory,
- alg, mctx, NULL)) {
+ if (key_collision(key, name, directory, mctx, NULL)) {
conflict =3D ISC_TRUE;
if (null_key) {
dst_key_free(&key);
@@ -1020,5 +1023,8 @@
isc_mem_stats(mctx, stdout);
isc_mem_destroy(&mctx);
=20
+ if (freeit !=3D NULL)
+ free(freeit);
+
return (0);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-k=
eygen.docbook
--- a/head/contrib/bind9/bin/dnssec/dnssec-keygen.docbook Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-keygen.docbook Tue Apr 17 11:51:=
51 2012 +0300
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: dnssec-keygen.docbook,v 1.36 2010-12-23 04:07:59 marka Exp $ -->
+<!-- $Id: dnssec-keygen.docbook,v 1.36 2010/12/23 04:07:59 marka Exp $ -->
<refentry id=3D"man.dnssec-keygen">
<refentryinfo>
<date>June 30, 2000</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-k=
eygen.html
--- a/head/contrib/bind9/bin/dnssec/dnssec-keygen.html Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-keygen.html Tue Apr 17 11:51:51 =
2012 +0300
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: dnssec-keygen.html,v 1.47 2010-12-24 01:14:20 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -32,7 +32,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">dnssec-keygen</code>=
[<code class=3D"option">-a <em class=3D"replaceable"><code>algorithm</cod=
e></em></code>] [<code class=3D"option">-b <em class=3D"replaceable"><code>=
keysize</code></em></code>] [<code class=3D"option">-n <em class=3D"replace=
able"><code>nametype</code></em></code>] [<code class=3D"option">-3</code>]=
[<code class=3D"option">-A <em class=3D"replaceable"><code>date/offset</co=
de></em></code>] [<code class=3D"option">-C</code>] [<code class=3D"option"=
>-c <em class=3D"replaceable"><code>class</code></em></code>] [<code class=
=3D"option">-D <em class=3D"replaceable"><code>date/offset</code></em></cod=
e>] [<code class=3D"option">-E <em class=3D"replaceable"><code>engine</code=
></em></code>] [<code class=3D"option">-e</code>] [<code class=3D"option">-=
f <em class=3D"replaceable"><code>flag</code></em></code>] [<code class=3D"=
option">-G</code>] [<code class=3D"option">-g <em class=3D"replaceable"><co=
de>generator</code></em></code>] [<code class=3D"option">-h</code>] [<code =
class=3D"option">-I <em class=3D"replaceable"><code>date/offset</code></em>=
</code>] [<code class=3D"option">-i <em class=3D"replaceable"><code>interva=
l</code></em></code>] [<code class=3D"option">-K <em class=3D"replaceable">=
<code>directory</code></em></code>] [<code class=3D"option">-k</code>] [<co=
de class=3D"option">-P <em class=3D"replaceable"><code>date/offset</code></=
em></code>] [<code class=3D"option">-p <em class=3D"replaceable"><code>prot=
ocol</code></em></code>] [<code class=3D"option">-q</code>] [<code class=3D=
"option">-R <em class=3D"replaceable"><code>date/offset</code></em></code>]=
[<code class=3D"option">-r <em class=3D"replaceable"><code>randomdev</code=
></em></code>] [<code class=3D"option">-S <em class=3D"replaceable"><code>k=
ey</code></em></code>] [<code class=3D"option">-s <em class=3D"replaceable"=
><code>strength</code></em></code>] [<code class=3D"option">-t <em class=3D=
"replaceable"><code>type</code></em></code>] [<code class=3D"option">-v <em=
class=3D"replaceable"><code>level</code></em></code>] [<code class=3D"opti=
on">-z</code>] {name}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543578"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543579"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">dnssec-keygen</strong></span>
generates keys for DNSSEC (Secure DNS), as defined in RFC 2535
and RFC 4034. It can also generate keys for use with
@@ -46,7 +46,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543596"></a><h2>OPTIONS</h2>
+<a name=3D"id2543597"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-a <em class=3D"replaceable"><code>algorithm</cod=
e></em></span></dt>
<dd>
@@ -248,7 +248,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544301"></a><h2>TIMING OPTIONS</h2>
+<a name=3D"id2544166"></a><h2>TIMING OPTIONS</h2>
<p>
Dates can be expressed in the format YYYYMMDD or YYYYMMDDHHMMSS.
If the argument begins with a '+' or '-', it is interpreted as
@@ -319,7 +319,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544491"></a><h2>GENERATED KEYS</h2>
+<a name=3D"id2544356"></a><h2>GENERATED KEYS</h2>
<p>
When <span><strong class=3D"command">dnssec-keygen</strong></span> c=
ompletes
successfully,
@@ -365,7 +365,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544642"></a><h2>EXAMPLE</h2>
+<a name=3D"id2544506"></a><h2>EXAMPLE</h2>
<p>
To generate a 768-bit DSA key for the domain
<strong class=3D"userinput"><code>example.com</code></strong>, the f=
ollowing command would be
@@ -386,7 +386,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544685"></a><h2>SEE ALSO</h2>
+<a name=3D"id2544550"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-signz=
one</span>(8)</span>,
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
<em class=3D"citetitle">RFC 2539</em>,
@@ -395,7 +395,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544716"></a><h2>AUTHOR</h2>
+<a name=3D"id2544581"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-r=
evoke.8
--- a/head/contrib/bind9/bin/dnssec/dnssec-revoke.8 Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-revoke.8 Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+.\" Copyright (C) 2009, 2011 Internet Systems Consortium, Inc. ("ISC")
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
.\" purpose with or without fee is hereby granted, provided that the above
@@ -12,7 +12,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: dnssec-revoke.8,v 1.9 2010-05-19 01:14:14 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -32,7 +32,7 @@
dnssec\-revoke \- Set the REVOKED bit on a DNSSEC key
.SH "SYNOPSIS"
.HP 14
-\fBdnssec\-revoke\fR [\fB\-hr\fR] [\fB\-v\ \fR\fB\fIlevel\fR\fR] [\fB\-K\ =
\fR\fB\fIdirectory\fR\fR] [\fB\-E\ \fR\fB\fIengine\fR\fR] [\fB\-f\fR] {keyf=
ile}
+\fBdnssec\-revoke\fR [\fB\-hr\fR] [\fB\-v\ \fR\fB\fIlevel\fR\fR] [\fB\-K\ =
\fR\fB\fIdirectory\fR\fR] [\fB\-E\ \fR\fB\fIengine\fR\fR] [\fB\-f\fR] [\fB\=
-R\fR] {keyfile}
.SH "DESCRIPTION"
.PP
\fBdnssec\-revoke\fR
@@ -70,6 +70,11 @@
\fBdnssec\-revoke\fR
to write the new key pair even if a file already exists matching the algor=
ithm and key ID of the revoked key.
.RE
+.PP
+\-R
+.RS 4
+Print the key tag of the key with the REVOKE bit set but do not revoke the=
key.
+.RE
.SH "SEE ALSO"
.PP
\fBdnssec\-keygen\fR(8),
@@ -79,5 +84,5 @@
.PP
Internet Systems Consortium
.SH "COPYRIGHT"
-Copyright \(co 2009 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2009, 2011 Internet Systems Consortium, Inc. ("ISC")
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-r=
evoke.c
--- a/head/contrib/bind9/bin/dnssec/dnssec-revoke.c Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-revoke.c Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009, 2010 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009-2011 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dnssec-revoke.c,v 1.22 2010-05-06 23:50:56 tbox Exp $ */
+/* $Id: dnssec-revoke.c,v 1.22.124.2 2011/10/20 23:46:27 tbox Exp $ */
=20
/*! \file */
=20
@@ -92,6 +92,7 @@
isc_buffer_t buf;
isc_boolean_t force =3D ISC_FALSE;
isc_boolean_t remove =3D ISC_FALSE;
+ isc_boolean_t id =3D ISC_FALSE;
=20
if (argc =3D=3D 1)
usage();
@@ -104,7 +105,7 @@
=20
isc_commandline_errprint =3D ISC_FALSE;
=20
- while ((ch =3D isc_commandline_parse(argc, argv, "E:fK:rhv:")) !=3D -1) {
+ while ((ch =3D isc_commandline_parse(argc, argv, "E:fK:rRhv:")) !=3D -1) {
switch (ch) {
case 'E':
engine =3D isc_commandline_argument;
@@ -126,6 +127,9 @@
case 'r':
remove =3D ISC_TRUE;
break;
+ case 'R':
+ id =3D ISC_TRUE;
+ break;
case 'v':
verbose =3D strtol(isc_commandline_argument, &endp, 0);
if (*endp !=3D '\0')
@@ -186,6 +190,10 @@
fatal("Invalid keyfile name %s: %s",
filename, isc_result_totext(result));
=20
+ if (id) {
+ fprintf(stdout, "%u\n", dst_key_rid(key));
+ goto cleanup;
+ }
dst_key_format(key, keystr, sizeof(keystr));
=20
if (verbose > 2)
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-r=
evoke.docbook
--- a/head/contrib/bind9/bin/dnssec/dnssec-revoke.docbook Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-revoke.docbook Tue Apr 17 11:51:=
51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2009, 2011 Internet Systems Consortium, Inc. ("ISC")
-
- Permission to use, copy, modify, and/or distribute this software for any
- purpose with or without fee is hereby granted, provided that the above
@@ -17,7 +17,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: dnssec-revoke.docbook,v 1.7 2009-11-03 21:44:46 each Exp $ -->
+<!-- $Id: dnssec-revoke.docbook,v 1.7.266.2 2011/10/20 23:46:27 tbox Exp $=
-->
<refentry id=3D"man.dnssec-revoke">
<refentryinfo>
<date>June 1, 2009</date>
@@ -37,6 +37,7 @@
<docinfo>
<copyright>
<year>2009</year>
+ <year>2011</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
</docinfo>
@@ -49,6 +50,7 @@
<arg><option>-K <replaceable class=3D"parameter">directory</replacea=
ble></option></arg>
<arg><option>-E <replaceable class=3D"parameter">engine</replaceable=
></option></arg>
<arg><option>-f</option></arg>
+ <arg><option>-R</option></arg>
<arg choice=3D"req">keyfile</arg>
</cmdsynopsis>
</refsynopsisdiv>
@@ -123,6 +125,16 @@
</para>
</listitem>
</varlistentry>
+
+ <varlistentry>
+ <term>-R</term>
+ <listitem>
+ <para>
+ Print the key tag of the key with the REVOKE bit set but do
+ not revoke the key.
+ </para>
+ </listitem>
+ </varlistentry>
</variablelist>
</refsect1>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-r=
evoke.html
--- a/head/contrib/bind9/bin/dnssec/dnssec-revoke.html Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-revoke.html Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2009, 2011 Internet Systems Consortium, Inc. ("ISC")
-=20
- Permission to use, copy, modify, and/or distribute this software for any
- purpose with or without fee is hereby granted, provided that the above
@@ -13,7 +13,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: dnssec-revoke.html,v 1.9 2010-05-19 01:14:14 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -28,10 +28,10 @@
</div>
<div class=3D"refsynopsisdiv">
<h2>Synopsis</h2>
-<div class=3D"cmdsynopsis"><p><code class=3D"command">dnssec-revoke</code>=
[<code class=3D"option">-hr</code>] [<code class=3D"option">-v <em class=
=3D"replaceable"><code>level</code></em></code>] [<code class=3D"option">-K=
<em class=3D"replaceable"><code>directory</code></em></code>] [<code class=
=3D"option">-E <em class=3D"replaceable"><code>engine</code></em></code>] [=
<code class=3D"option">-f</code>] {keyfile}</p></div>
+<div class=3D"cmdsynopsis"><p><code class=3D"command">dnssec-revoke</code>=
[<code class=3D"option">-hr</code>] [<code class=3D"option">-v <em class=
=3D"replaceable"><code>level</code></em></code>] [<code class=3D"option">-K=
<em class=3D"replaceable"><code>directory</code></em></code>] [<code class=
=3D"option">-E <em class=3D"replaceable"><code>engine</code></em></code>] [=
<code class=3D"option">-f</code>] [<code class=3D"option">-R</code>] {keyfi=
le}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543373"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543382"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">dnssec-revoke</strong></span>
reads a DNSSEC key file, sets the REVOKED bit on the key as defined
in RFC 5011, and creates a new pair of key files containing the
@@ -39,7 +39,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543385"></a><h2>OPTIONS</h2>
+<a name=3D"id2543394"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-h</span></dt>
<dd><p>
@@ -69,17 +69,22 @@
write the new key pair even if a file already exists matching
the algorithm and key ID of the revoked key.
</p></dd>
+<dt><span class=3D"term">-R</span></dt>
+<dd><p>
+ Print the key tag of the key with the REVOKE bit set but do
+ not revoke the key.
+ </p></dd>
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543491"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543512"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-keyge=
n</span>(8)</span>,
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
<em class=3D"citetitle">RFC 5011</em>.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543515"></a><h2>AUTHOR</h2>
+<a name=3D"id2543537"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-s=
ettime.8
--- a/head/contrib/bind9/bin/dnssec/dnssec-settime.8 Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-settime.8 Tue Apr 17 11:51:51 20=
12 +0300
@@ -12,7 +12,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: dnssec-settime.8,v 1.14.70.1 2011-03-22 02:37:44 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -52,7 +52,7 @@
.PP
When key metadata fields are changed, both files of a key pair (\fIKnnnn.+=
aaa+iiiii.key\fR
and
-\fIKnnnn.+aaa+iiiii.private\fR) are regenerated. Metadata fields are store=
d in the private file. A human\-readable description of the metadata is als=
o placed in comments in the key file.
+\fIKnnnn.+aaa+iiiii.private\fR) are regenerated. Metadata fields are store=
d in the private file. A human\-readable description of the metadata is als=
o placed in comments in the key file. The private file's permissions are al=
ways set to be inaccessible to anyone other than the owner (mode 0600).
.SH "OPTIONS"
.PP
\-f
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-s=
ettime.c
--- a/head/contrib/bind9/bin/dnssec/dnssec-settime.c Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-settime.c Tue Apr 17 11:51:51 20=
12 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dnssec-settime.c,v 1.28.16.3 2011-06-02 20:24:11 each Exp $ */
+/* $Id: dnssec-settime.c,v 1.28.16.3 2011/06/02 20:24:11 each Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-s=
ettime.docbook
--- a/head/contrib/bind9/bin/dnssec/dnssec-settime.docbook Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-settime.docbook Tue Apr 17 11:51=
:51 2012 +0300
@@ -17,7 +17,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: dnssec-settime.docbook,v 1.11.70.2 2011-03-21 23:46:58 tbox Exp =
$ -->
+<!-- $Id: dnssec-settime.docbook,v 1.11.70.3 2011/11/03 20:21:30 each Exp =
$ -->
<refentry id=3D"man.dnssec-settime">
<refentryinfo>
<date>July 15, 2009</date>
@@ -82,7 +82,8 @@
<filename>Knnnn.+aaa+iiiii.private</filename>) are regenerated.
Metadata fields are stored in the private file. A human-readable
description of the metadata is also placed in comments in the key
- file.
+ file. The private file's permissions are always set to be
+ inaccessible to anyone other than the owner (mode 0600).
</para>
</refsect1>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-s=
ettime.html
--- a/head/contrib/bind9/bin/dnssec/dnssec-settime.html Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-settime.html Tue Apr 17 11:51:51=
2012 +0300
@@ -13,7 +13,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: dnssec-settime.html,v 1.14.70.1 2011-03-22 02:37:44 tbox Exp $ -=
->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -31,7 +31,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">dnssec-settime</code=
> [<code class=3D"option">-f</code>] [<code class=3D"option">-K <em class=
=3D"replaceable"><code>directory</code></em></code>] [<code class=3D"option=
">-P <em class=3D"replaceable"><code>date/offset</code></em></code>] [<code=
class=3D"option">-A <em class=3D"replaceable"><code>date/offset</code></em=
></code>] [<code class=3D"option">-R <em class=3D"replaceable"><code>date/o=
ffset</code></em></code>] [<code class=3D"option">-I <em class=3D"replaceab=
le"><code>date/offset</code></em></code>] [<code class=3D"option">-D <em cl=
ass=3D"replaceable"><code>date/offset</code></em></code>] [<code class=3D"o=
ption">-h</code>] [<code class=3D"option">-v <em class=3D"replaceable"><cod=
e>level</code></em></code>] [<code class=3D"option">-E <em class=3D"replace=
able"><code>engine</code></em></code>] {keyfile}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543422"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543424"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">dnssec-settime</strong></span>
reads a DNSSEC private key file and sets the key timing metadata
as specified by the <code class=3D"option">-P</code>, <code class=3D=
"option">-A</code>,
@@ -52,11 +52,12 @@
<code class=3D"filename">Knnnn.+aaa+iiiii.private</code>) are regene=
rated.
Metadata fields are stored in the private file. A human-readable
description of the metadata is also placed in comments in the key
- file.
+ file. The private file's permissions are always set to be
+ inaccessible to anyone other than the owner (mode 0600).
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543470"></a><h2>OPTIONS</h2>
+<a name=3D"id2543472"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-f</span></dt>
<dd><p>
@@ -89,7 +90,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543562"></a><h2>TIMING OPTIONS</h2>
+<a name=3D"id2543563"></a><h2>TIMING OPTIONS</h2>
<p>
Dates can be expressed in the format YYYYMMDD or YYYYMMDDHHMMSS.
If the argument begins with a '+' or '-', it is interpreted as
@@ -168,7 +169,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543701"></a><h2>PRINTING OPTIONS</h2>
+<a name=3D"id2543770"></a><h2>PRINTING OPTIONS</h2>
<p>
<span><strong class=3D"command">dnssec-settime</strong></span> can a=
lso be used to print the
timing metadata associated with a key.
@@ -194,7 +195,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543915"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543848"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-keyge=
n</span>(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-si=
gnzone</span>(8)</span>,
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
@@ -202,7 +203,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543948"></a><h2>AUTHOR</h2>
+<a name=3D"id2543881"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-s=
ignzone.8
--- a/head/contrib/bind9/bin/dnssec/dnssec-signzone.8 Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-signzone.8 Tue Apr 17 11:51:51 2=
012 +0300
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: dnssec-signzone.8,v 1.59 2009-12-04 01:13:44 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-s=
ignzone.c
--- a/head/contrib/bind9/bin/dnssec/dnssec-signzone.c Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-signzone.c Tue Apr 17 11:51:51 2=
012 +0300
@@ -29,7 +29,7 @@
* IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dnssec-signzone.c,v 1.262.110.9 2011-07-19 23:47:12 tbox Exp $ */
+/* $Id: dnssec-signzone.c,v 1.262.110.9 2011/07/19 23:47:12 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-s=
ignzone.docbook
--- a/head/contrib/bind9/bin/dnssec/dnssec-signzone.docbook Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-signzone.docbook Tue Apr 17 11:5=
1:51 2012 +0300
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: dnssec-signzone.docbook,v 1.44 2009-12-03 23:18:16 each Exp $ -->
+<!-- $Id: dnssec-signzone.docbook,v 1.44 2009/12/03 23:18:16 each Exp $ -->
<refentry id=3D"man.dnssec-signzone">
<refentryinfo>
<date>June 05, 2009</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssec-s=
ignzone.html
--- a/head/contrib/bind9/bin/dnssec/dnssec-signzone.html Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/bin/dnssec/dnssec-signzone.html Tue Apr 17 11:51:5=
1 2012 +0300
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: dnssec-signzone.html,v 1.45 2009-12-04 01:13:44 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -32,7 +32,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">dnssec-signzone</cod=
e> [<code class=3D"option">-a</code>] [<code class=3D"option">-c <em class=
=3D"replaceable"><code>class</code></em></code>] [<code class=3D"option">-d=
<em class=3D"replaceable"><code>directory</code></em></code>] [<code class=
=3D"option">-E <em class=3D"replaceable"><code>engine</code></em></code>] [=
<code class=3D"option">-e <em class=3D"replaceable"><code>end-time</code></=
em></code>] [<code class=3D"option">-f <em class=3D"replaceable"><code>outp=
ut-file</code></em></code>] [<code class=3D"option">-g</code>] [<code class=
=3D"option">-h</code>] [<code class=3D"option">-K <em class=3D"replaceable"=
><code>directory</code></em></code>] [<code class=3D"option">-k <em class=
=3D"replaceable"><code>key</code></em></code>] [<code class=3D"option">-l <=
em class=3D"replaceable"><code>domain</code></em></code>] [<code class=3D"o=
ption">-i <em class=3D"replaceable"><code>interval</code></em></code>] [<co=
de class=3D"option">-I <em class=3D"replaceable"><code>input-format</code><=
/em></code>] [<code class=3D"option">-j <em class=3D"replaceable"><code>jit=
ter</code></em></code>] [<code class=3D"option">-N <em class=3D"replaceable=
"><code>soa-serial-format</code></em></code>] [<code class=3D"option">-o <e=
m class=3D"replaceable"><code>origin</code></em></code>] [<code class=3D"op=
tion">-O <em class=3D"replaceable"><code>output-format</code></em></code>] =
[<code class=3D"option">-p</code>] [<code class=3D"option">-P</code>] [<cod=
e class=3D"option">-r <em class=3D"replaceable"><code>randomdev</code></em>=
</code>] [<code class=3D"option">-S</code>] [<code class=3D"option">-s <em =
class=3D"replaceable"><code>start-time</code></em></code>] [<code class=3D"=
option">-T <em class=3D"replaceable"><code>ttl</code></em></code>] [<code c=
lass=3D"option">-t</code>] [<code class=3D"option">-u</code>] [<code class=
=3D"option">-v <em class=3D"replaceable"><code>level</code></em></code>] [<=
code class=3D"option">-x</code>] [<code class=3D"option">-z</code>] [<code =
class=3D"option">-3 <em class=3D"replaceable"><code>salt</code></em></code>=
] [<code class=3D"option">-H <em class=3D"replaceable"><code>iterations</co=
de></em></code>] [<code class=3D"option">-A</code>] {zonefile} [key...]</p>=
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543596"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543597"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">dnssec-signzone</strong></span>
signs a zone. It generates
NSEC and RRSIG records and produces a signed version of the
@@ -43,7 +43,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543611"></a><h2>OPTIONS</h2>
+<a name=3D"id2543612"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-a</span></dt>
<dd><p>
@@ -379,7 +379,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544896"></a><h2>EXAMPLE</h2>
+<a name=3D"id2544965"></a><h2>EXAMPLE</h2>
<p>
The following command signs the <strong class=3D"userinput"><code>ex=
ample.com</code></strong>
zone with the DSA key generated by <span><strong class=3D"command">d=
nssec-keygen</strong></span>
@@ -409,14 +409,14 @@
%</pre>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2545019"></a><h2>SEE ALSO</h2>
+<a name=3D"id2545020"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-keyge=
n</span>(8)</span>,
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
<em class=3D"citetitle">RFC 4033</em>.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2545044"></a><h2>AUTHOR</h2>
+<a name=3D"id2545045"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssecto=
ol.c
--- a/head/contrib/bind9/bin/dnssec/dnssectool.c Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/bin/dnssec/dnssectool.c Tue Apr 17 11:51:51 2012 +=
0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2009, 2010 Internet Systems Consortium=
, Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2009-2011 Internet Systems Consortium,=
Inc. ("ISC")
* Copyright (C) 2000, 2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dnssectool.c,v 1.60 2010-01-19 23:48:56 tbox Exp $ */
+/* $Id: dnssectool.c,v 1.60.162.3 2011/10/21 03:56:32 marka Exp $ */
=20
/*! \file */
=20
@@ -406,19 +406,24 @@
}
=20
isc_boolean_t
-key_collision(isc_uint16_t id, dns_name_t *name, const char *dir,
- dns_secalg_t alg, isc_mem_t *mctx, isc_boolean_t *exact)
+key_collision(dst_key_t *dstkey, dns_name_t *name, const char *dir,
+ isc_mem_t *mctx, isc_boolean_t *exact)
{
isc_result_t result;
isc_boolean_t conflict =3D ISC_FALSE;
dns_dnsseckeylist_t matchkeys;
dns_dnsseckey_t *key =3D NULL;
- isc_uint16_t oldid, diff;
- isc_uint16_t bits =3D DNS_KEYFLAG_REVOKE; /* flag bits to look for */
+ isc_uint16_t id, oldid;
+ isc_uint32_t rid, roldid;
+ dns_secalg_t alg;
=20
if (exact !=3D NULL)
*exact =3D ISC_FALSE;
=20
+ id =3D dst_key_id(dstkey);
+ rid =3D dst_key_rid(dstkey);
+ alg =3D dst_key_alg(dstkey);
+
ISC_LIST_INIT(matchkeys);
result =3D dns_dnssec_findmatchingkeys(name, dir, mctx, &matchkeys);
if (result =3D=3D ISC_R_NOTFOUND)
@@ -430,10 +435,11 @@
goto next;
=20
oldid =3D dst_key_id(key->key);
- diff =3D (oldid > id) ? (oldid - id) : (id - oldid);
- if ((diff & ~bits) =3D=3D 0) {
+ roldid =3D dst_key_rid(key->key);
+
+ if (oldid =3D=3D rid || roldid =3D=3D id || id =3D=3D oldid) {
conflict =3D ISC_TRUE;
- if (diff !=3D 0) {
+ if (id !=3D oldid) {
if (verbose > 1)
fprintf(stderr, "Key ID %d could "
"collide with %d\n",
@@ -461,4 +467,3 @@
=20
return (conflict);
}
-
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/dnssec/dnssecto=
ol.h
--- a/head/contrib/bind9/bin/dnssec/dnssectool.h Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/bin/dnssec/dnssectool.h Tue Apr 17 11:51:51 2012 +=
0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2007-2010 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004, 2007-2011 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 2000, 2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dnssectool.h,v 1.31 2010-01-19 23:48:56 tbox Exp $ */
+/* $Id: dnssectool.h,v 1.31.162.2 2011/10/20 23:46:27 tbox Exp $ */
=20
#ifndef DNSSECTOOL_H
#define DNSSECTOOL_H 1
@@ -78,6 +78,7 @@
set_keyversion(dst_key_t *key);
=20
isc_boolean_t
-key_collision(isc_uint16_t id, dns_name_t *name, const char *dir,
- dns_secalg_t alg, isc_mem_t *mctx, isc_boolean_t *exact);
+key_collision(dst_key_t *key, dns_name_t *name, const char *dir,
+ isc_mem_t *mctx, isc_boolean_t *exact);
+
#endif /* DNSSEC_DNSSECTOOL_H */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/Makefile.=
in
--- a/head/contrib/bind9/bin/named/Makefile.in Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/bin/named/Makefile.in Tue Apr 17 11:51:51 2012 +03=
00
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.114.14.2 2011-03-10 23:47:25 tbox Exp $
+# $Id: Makefile.in,v 1.114.14.2 2011/03/10 23:47:25 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/bind.keys=
.h
--- a/head/contrib/bind9/bin/named/bind.keys.h Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/bin/named/bind.keys.h Tue Apr 17 11:51:51 2012 +03=
00
@@ -1,6 +1,6 @@
/*
- * Generated by bindkeys.pl 1.7 2011-01-04 23:47:13 tbox Exp =20
- * From bind.keys 1.7 2011-01-03 23:45:07 each Exp =20
+ * Generated by bindkeys.pl 1.7 2011/01/04 23:47:13 tbox Exp =20
+ * From bind.keys 1.7 2011/01/03 23:45:07 each Exp =20
*/
#define TRUSTED_KEYS "\
# The bind.keys file is used to override the built-in DNSSEC trust anchors=
\n\
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/bind9.xsl
--- a/head/contrib/bind9/bin/named/bind9.xsl Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/bind9.xsl Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: bind9.xsl,v 1.21 2009-01-27 23:47:54 tbox Exp $ -->
+<!-- $Id: bind9.xsl,v 1.21 2009/01/27 23:47:54 tbox Exp $ -->
=20
<xsl:stylesheet version=3D"1.0"
xmlns:xsl=3D"http://www.w3.org/1999/XSL/Transform"
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/bind9.xsl=
.h
--- a/head/contrib/bind9/bin/named/bind9.xsl.h Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/bin/named/bind9.xsl.h Tue Apr 17 11:51:51 2012 +03=
00
@@ -1,6 +1,6 @@
/*
- * Generated by convertxsl.pl 1.14 2008-07-17 23:43:26 jinmei Exp =20
- * From bind9.xsl 1.21 2009-01-27 23:47:54 tbox Exp=20
+ * Generated by convertxsl.pl 1.14 2008/07/17 23:43:26 jinmei Exp =20
+ * From bind9.xsl 1.21 2009/01/27 23:47:54 tbox Exp=20
*/
static char xslmsg[] =3D
"<?xml version=3D\"1.0\" encoding=3D\"UTF-8\"?>\n"
@@ -20,7 +20,7 @@
" - PERFORMANCE OF THIS SOFTWARE.\n"
"-->\n"
"\n"
- "<!-- \045Id: bind9.xsl,v 1.21 2009-01-27 23:47:54 tbox Exp \045 -->\n"
+ "<!-- \045Id: bind9.xsl,v 1.21 2009/01/27 23:47:54 tbox Exp \045 -->\n"
"\n"
"<xsl:stylesheet version=3D\"1.0\"\n"
" xmlns:xsl=3D\"http://www.w3.org/1999/XSL/Transform\"\n"
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/builtin.c
--- a/head/contrib/bind9/bin/named/builtin.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/builtin.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2009-2011 Internet Systems Consortium,=
Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2009-2012 Internet Systems Consortium,=
Inc. ("ISC")
* Copyright (C) 2001-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: builtin.c,v 1.20 2011-01-07 23:47:07 tbox Exp $ */
+/* $Id: builtin.c,v 1.20.14.3 2012/01/11 20:19:40 ckb Exp $ */
=20
/*! \file
* \brief
@@ -300,6 +300,7 @@
const char **p;
static const char *authors[] =3D {
"Mark Andrews",
+ "Curtis Blackburn",
"James Brister",
"Ben Cottrell",
"Michael Graff",
@@ -308,6 +309,7 @@
"Evan Hunt",
"JINMEI Tatuya",
"David Lawrence",
+ "Scott Mann",
"Danny Mayer",
"Damien Neil",
"Matt Nelson",
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/client.c
--- a/head/contrib/bind9/bin/named/client.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/client.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: client.c,v 1.271.10.2 2011-07-28 04:30:54 marka Exp $ */
+/* $Id: client.c,v 1.271.10.4 2012/01/31 23:46:39 tbox Exp $ */
=20
#include <config.h>
=20
@@ -934,6 +934,15 @@
render_opts =3D 0;
else
render_opts =3D DNS_MESSAGERENDER_OMITDNSSEC;
+
+ preferred_glue =3D 0;
+ if (client->view !=3D NULL) {
+ if (client->view->preferred_glue =3D=3D dns_rdatatype_a)
+ preferred_glue =3D DNS_MESSAGERENDER_PREFER_A;
+ else if (client->view->preferred_glue =3D=3D dns_rdatatype_aaaa)
+ preferred_glue =3D DNS_MESSAGERENDER_PREFER_AAAA;
+ }
+
#ifdef ALLOW_FILTER_AAAA_ON_V4
/*
* filter-aaaa-on-v4 yes or break-dnssec option to suppress
@@ -942,17 +951,15 @@
* that we have both AAAA and A records,
* and that we either have no signatures that the client wants
* or we are supposed to break DNSSEC.
+ *
+ * Override preferred glue if necessary.
*/
- if ((client->attributes & NS_CLIENTATTR_FILTER_AAAA) !=3D 0)
+ if ((client->attributes & NS_CLIENTATTR_FILTER_AAAA) !=3D 0) {
render_opts |=3D DNS_MESSAGERENDER_FILTER_AAAA;
+ if (preferred_glue =3D=3D DNS_MESSAGERENDER_PREFER_AAAA)
+ preferred_glue =3D DNS_MESSAGERENDER_PREFER_A;
+ }
#endif
- preferred_glue =3D 0;
- if (client->view !=3D NULL) {
- if (client->view->preferred_glue =3D=3D dns_rdatatype_a)
- preferred_glue =3D DNS_MESSAGERENDER_PREFER_A;
- else if (client->view->preferred_glue =3D=3D dns_rdatatype_aaaa)
- preferred_glue =3D DNS_MESSAGERENDER_PREFER_AAAA;
- }
=20
/*
* XXXRTH The following doesn't deal with TCP buffer resizing.
@@ -2109,6 +2116,9 @@
client->recursionquota =3D NULL;
client->interface =3D NULL;
client->peeraddr_valid =3D ISC_FALSE;
+#ifdef ALLOW_FILTER_AAAA_ON_V4
+ client->filter_aaaa =3D dns_v4_aaaa_ok;
+#endif
ISC_EVENT_INIT(&client->ctlevent, sizeof(client->ctlevent), 0, NULL,
NS_EVENT_CLIENTCONTROL, client_start, client, client,
NULL, NULL);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/config.c
--- a/head/contrib/bind9/bin/named/config.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/config.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: config.c,v 1.113.16.2 2011-02-28 01:19:58 tbox Exp $ */
+/* $Id: config.c,v 1.113.16.2 2011/02/28 01:19:58 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/control.c
--- a/head/contrib/bind9/bin/named/control.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/control.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: control.c,v 1.41 2010-12-03 22:05:19 each Exp $ */
+/* $Id: control.c,v 1.41 2010/12/03 22:05:19 each Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/controlco=
nf.c
--- a/head/contrib/bind9/bin/named/controlconf.c Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/bin/named/controlconf.c Tue Apr 17 11:51:51 2012 +=
0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2008, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2008, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 2001-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: controlconf.c,v 1.60.544.2 2011-03-12 04:59:14 tbox Exp $ */
+/* $Id: controlconf.c,v 1.60.544.3 2011/12/22 08:10:09 marka Exp $ */
=20
/*! \file */
=20
@@ -373,17 +373,8 @@
if (result =3D=3D ISC_R_SUCCESS)
break;
isc_mem_put(listener->mctx, secret.rstart, REGION_SIZE(secret));
- if (result =3D=3D ISCCC_R_BADAUTH) {
- /*
- * For some reason, request is non-NULL when
- * isccc_cc_fromwire returns ISCCC_R_BADAUTH.
- */
- if (request !=3D NULL)
- isccc_sexpr_free(&request);
- } else {
- log_invalid(&conn->ccmsg, result);
- goto cleanup;
- }
+ log_invalid(&conn->ccmsg, result);
+ goto cleanup;
}
=20
if (key =3D=3D NULL) {
@@ -1148,6 +1139,11 @@
if (result =3D=3D ISC_R_SUCCESS)
isc_socket_setname(listener->sock, "control", NULL);
=20
+#ifndef ISC_ALLOW_MAPPED
+ if (result =3D=3D ISC_R_SUCCESS)
+ isc_socket_ipv6only(listener->sock, ISC_TRUE);
+#endif
+
if (result =3D=3D ISC_R_SUCCESS)
result =3D isc_socket_bind(listener->sock, &listener->address,
ISC_SOCKET_REUSEADDRESS);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/convertxs=
l.pl
--- a/head/contrib/bind9/bin/named/convertxsl.pl Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/bin/named/convertxsl.pl Tue Apr 17 11:51:51 2012 +=
0300
@@ -14,12 +14,12 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: convertxsl.pl,v 1.14 2008-07-17 23:43:26 jinmei Exp $
+# $Id: convertxsl.pl,v 1.14 2008/07/17 23:43:26 jinmei Exp $
=20
use strict;
use warnings;
=20
-my $rev =3D '$Id: convertxsl.pl,v 1.14 2008-07-17 23:43:26 jinmei Exp $';
+my $rev =3D '$Id: convertxsl.pl,v 1.14 2008/07/17 23:43:26 jinmei Exp $';
$rev =3D~ s/\$//g;
$rev =3D~ s/,v//g;
$rev =3D~ s/Id: //;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/d=
lz/dlz_dlopen_driver.h
--- a/head/contrib/bind9/bin/named/include/dlz/dlz_dlopen_driver.h Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/dlz/dlz_dlopen_driver.h Tue Apr =
17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dlz_dlopen_driver.h,v 1.1.4.4 2011-03-17 09:41:06 fdupont Exp $ */
+/* $Id: dlz_dlopen_driver.h,v 1.1.4.4 2011/03/17 09:41:06 fdupont Exp $ */
=20
#ifndef DLZ_DLOPEN_DRIVER_H
#define DLZ_DLOPEN_DRIVER_H
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/builtin.h
--- a/head/contrib/bind9/bin/named/include/named/builtin.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/builtin.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: builtin.h,v 1.6 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: builtin.h,v 1.6 2007/06/19 23:46:59 tbox Exp $ */
=20
#ifndef NAMED_BUILTIN_H
#define NAMED_BUILTIN_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/client.h
--- a/head/contrib/bind9/bin/named/include/named/client.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/client.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: client.h,v 1.91 2009-10-26 23:14:53 each Exp $ */
+/* $Id: client.h,v 1.91.278.2 2012/01/31 23:46:39 tbox Exp $ */
=20
#ifndef NAMED_CLIENT_H
#define NAMED_CLIENT_H 1
@@ -141,6 +141,9 @@
isc_netaddr_t destaddr;
struct in6_pktinfo pktinfo;
isc_event_t ctlevent;
+#ifdef ALLOW_FILTER_AAAA_ON_V4
+ dns_v4_aaaa_t filter_aaaa;
+#endif
/*%
* Information about recent FORMERR response(s), for
* FORMERR loop avoidance. This is separate for each
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/config.h
--- a/head/contrib/bind9/bin/named/include/named/config.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/config.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: config.h,v 1.16 2009-06-11 23:47:55 tbox Exp $ */
+/* $Id: config.h,v 1.16 2009/06/11 23:47:55 tbox Exp $ */
=20
#ifndef NAMED_CONFIG_H
#define NAMED_CONFIG_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/control.h
--- a/head/contrib/bind9/bin/named/include/named/control.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/control.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: control.h,v 1.31 2010-08-16 22:21:06 marka Exp $ */
+/* $Id: control.h,v 1.31 2010/08/16 22:21:06 marka Exp $ */
=20
#ifndef NAMED_CONTROL_H
#define NAMED_CONTROL_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/globals.h
--- a/head/contrib/bind9/bin/named/include/named/globals.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/globals.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: globals.h,v 1.89.54.2 2011-06-17 23:47:10 tbox Exp $ */
+/* $Id: globals.h,v 1.89.54.2 2011/06/17 23:47:10 tbox Exp $ */
=20
#ifndef NAMED_GLOBALS_H
#define NAMED_GLOBALS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/interfacemgr.h
--- a/head/contrib/bind9/bin/named/include/named/interfacemgr.h Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/interfacemgr.h Tue Apr 17 =
11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: interfacemgr.h,v 1.33 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: interfacemgr.h,v 1.33 2007/06/19 23:46:59 tbox Exp $ */
=20
#ifndef NAMED_INTERFACEMGR_H
#define NAMED_INTERFACEMGR_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/listenlist.h
--- a/head/contrib/bind9/bin/named/include/named/listenlist.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/listenlist.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: listenlist.h,v 1.15 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: listenlist.h,v 1.15 2007/06/19 23:46:59 tbox Exp $ */
=20
#ifndef NAMED_LISTENLIST_H
#define NAMED_LISTENLIST_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/log.h
--- a/head/contrib/bind9/bin/named/include/named/log.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/log.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: log.h,v 1.27 2009-01-07 23:47:46 tbox Exp $ */
+/* $Id: log.h,v 1.27 2009/01/07 23:47:46 tbox Exp $ */
=20
#ifndef NAMED_LOG_H
#define NAMED_LOG_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/logconf.h
--- a/head/contrib/bind9/bin/named/include/named/logconf.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/logconf.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: logconf.h,v 1.17 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: logconf.h,v 1.17 2007/06/19 23:46:59 tbox Exp $ */
=20
#ifndef NAMED_LOGCONF_H
#define NAMED_LOGCONF_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/lwaddr.h
--- a/head/contrib/bind9/bin/named/include/named/lwaddr.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/lwaddr.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwaddr.h,v 1.8 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: lwaddr.h,v 1.8 2007/06/19 23:46:59 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/lwdclient.h
--- a/head/contrib/bind9/bin/named/include/named/lwdclient.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/lwdclient.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwdclient.h,v 1.20 2009-01-17 23:47:42 tbox Exp $ */
+/* $Id: lwdclient.h,v 1.20 2009/01/17 23:47:42 tbox Exp $ */
=20
#ifndef NAMED_LWDCLIENT_H
#define NAMED_LWDCLIENT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/lwresd.h
--- a/head/contrib/bind9/bin/named/include/named/lwresd.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/lwresd.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwresd.h,v 1.19 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: lwresd.h,v 1.19 2007/06/19 23:46:59 tbox Exp $ */
=20
#ifndef NAMED_LWRESD_H
#define NAMED_LWRESD_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/lwsearch.h
--- a/head/contrib/bind9/bin/named/include/named/lwsearch.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/lwsearch.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwsearch.h,v 1.9 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: lwsearch.h,v 1.9 2007/06/19 23:46:59 tbox Exp $ */
=20
#ifndef NAMED_LWSEARCH_H
#define NAMED_LWSEARCH_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/main.h
--- a/head/contrib/bind9/bin/named/include/named/main.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/main.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: main.h,v 1.17 2009-09-29 23:48:03 tbox Exp $ */
+/* $Id: main.h,v 1.17 2009/09/29 23:48:03 tbox Exp $ */
=20
#ifndef NAMED_MAIN_H
#define NAMED_MAIN_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/notify.h
--- a/head/contrib/bind9/bin/named/include/named/notify.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/notify.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: notify.h,v 1.16 2009-01-17 23:47:42 tbox Exp $ */
+/* $Id: notify.h,v 1.16 2009/01/17 23:47:42 tbox Exp $ */
=20
#ifndef NAMED_NOTIFY_H
#define NAMED_NOTIFY_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/ns_smf_globals.h
--- a/head/contrib/bind9/bin/named/include/named/ns_smf_globals.h Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/ns_smf_globals.h Tue Apr 1=
7 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ns_smf_globals.h,v 1.7 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: ns_smf_globals.h,v 1.7 2007/06/19 23:46:59 tbox Exp $ */
=20
#ifndef NS_SMF_GLOBALS_H
#define NS_SMF_GLOBALS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/query.h
--- a/head/contrib/bind9/bin/named/include/named/query.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/query.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: query.h,v 1.45 2011-01-13 04:59:24 tbox Exp $ */
+/* $Id: query.h,v 1.45 2011/01/13 04:59:24 tbox Exp $ */
=20
#ifndef NAMED_QUERY_H
#define NAMED_QUERY_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/server.h
--- a/head/contrib/bind9/bin/named/include/named/server.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/server.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: server.h,v 1.110 2010-08-16 23:46:52 tbox Exp $ */
+/* $Id: server.h,v 1.110 2010/08/16 23:46:52 tbox Exp $ */
=20
#ifndef NAMED_SERVER_H
#define NAMED_SERVER_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/sortlist.h
--- a/head/contrib/bind9/bin/named/include/named/sortlist.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/sortlist.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sortlist.h,v 1.11 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: sortlist.h,v 1.11 2007/06/19 23:46:59 tbox Exp $ */
=20
#ifndef NAMED_SORTLIST_H
#define NAMED_SORTLIST_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/statschannel.h
--- a/head/contrib/bind9/bin/named/include/named/statschannel.h Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/statschannel.h Tue Apr 17 =
11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: statschannel.h,v 1.3 2008-04-03 05:55:51 marka Exp $ */
+/* $Id: statschannel.h,v 1.3 2008/04/03 05:55:51 marka Exp $ */
=20
#ifndef NAMED_STATSCHANNEL_H
#define NAMED_STATSCHANNEL_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/tkeyconf.h
--- a/head/contrib/bind9/bin/named/include/named/tkeyconf.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/tkeyconf.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: tkeyconf.h,v 1.16 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: tkeyconf.h,v 1.16 2007/06/19 23:46:59 tbox Exp $ */
=20
#ifndef NS_TKEYCONF_H
#define NS_TKEYCONF_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/tsigconf.h
--- a/head/contrib/bind9/bin/named/include/named/tsigconf.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/tsigconf.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: tsigconf.h,v 1.18 2009-06-11 23:47:55 tbox Exp $ */
+/* $Id: tsigconf.h,v 1.18 2009/06/11 23:47:55 tbox Exp $ */
=20
#ifndef NS_TSIGCONF_H
#define NS_TSIGCONF_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/types.h
--- a/head/contrib/bind9/bin/named/include/named/types.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/types.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: types.h,v 1.31 2009-01-09 23:47:45 tbox Exp $ */
+/* $Id: types.h,v 1.31 2009/01/09 23:47:45 tbox Exp $ */
=20
#ifndef NAMED_TYPES_H
#define NAMED_TYPES_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/update.h
--- a/head/contrib/bind9/bin/named/include/named/update.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/update.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: update.h,v 1.13 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: update.h,v 1.13 2007/06/19 23:46:59 tbox Exp $ */
=20
#ifndef NAMED_UPDATE_H
#define NAMED_UPDATE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/xfrout.h
--- a/head/contrib/bind9/bin/named/include/named/xfrout.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/xfrout.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: xfrout.h,v 1.12 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: xfrout.h,v 1.12 2007/06/19 23:46:59 tbox Exp $ */
=20
#ifndef NAMED_XFROUT_H
#define NAMED_XFROUT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/include/n=
amed/zoneconf.h
--- a/head/contrib/bind9/bin/named/include/named/zoneconf.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/include/named/zoneconf.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: zoneconf.h,v 1.28 2010-12-20 23:47:20 tbox Exp $ */
+/* $Id: zoneconf.h,v 1.28 2010/12/20 23:47:20 tbox Exp $ */
=20
#ifndef NS_ZONECONF_H
#define NS_ZONECONF_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/interface=
mgr.c
--- a/head/contrib/bind9/bin/named/interfacemgr.c Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/bin/named/interfacemgr.c Tue Apr 17 11:51:51 2012 =
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: interfacemgr.c,v 1.95.426.2 2011-03-12 04:59:14 tbox Exp $ */
+/* $Id: interfacemgr.c,v 1.95.426.2 2011/03/12 04:59:14 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/listenlis=
t.c
--- a/head/contrib/bind9/bin/named/listenlist.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/bin/named/listenlist.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: listenlist.c,v 1.14 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: listenlist.c,v 1.14 2007/06/19 23:46:59 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/log.c
--- a/head/contrib/bind9/bin/named/log.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/log.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: log.c,v 1.49 2009-01-07 01:46:40 jinmei Exp $ */
+/* $Id: log.c,v 1.49 2009/01/07 01:46:40 jinmei Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/logconf.c
--- a/head/contrib/bind9/bin/named/logconf.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/logconf.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: logconf.c,v 1.42.816.3 2011-03-05 23:52:06 tbox Exp $ */
+/* $Id: logconf.c,v 1.42.816.3 2011/03/05 23:52:06 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/lwaddr.c
--- a/head/contrib/bind9/bin/named/lwaddr.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/lwaddr.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwaddr.c,v 1.10 2008-01-11 23:46:56 tbox Exp $ */
+/* $Id: lwaddr.c,v 1.10 2008/01/11 23:46:56 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/lwdclient=
.c
--- a/head/contrib/bind9/bin/named/lwdclient.c Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/bin/named/lwdclient.c Tue Apr 17 11:51:51 2012 +03=
00
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwdclient.c,v 1.22 2007-06-18 23:47:18 tbox Exp $ */
+/* $Id: lwdclient.c,v 1.22 2007/06/18 23:47:18 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/lwderror.c
--- a/head/contrib/bind9/bin/named/lwderror.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/lwderror.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwderror.c,v 1.12 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: lwderror.c,v 1.12 2007/06/19 23:46:59 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/lwdgabn.c
--- a/head/contrib/bind9/bin/named/lwdgabn.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/lwdgabn.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwdgabn.c,v 1.24 2009-09-02 23:48:01 tbox Exp $ */
+/* $Id: lwdgabn.c,v 1.24 2009/09/02 23:48:01 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/lwdgnba.c
--- a/head/contrib/bind9/bin/named/lwdgnba.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/lwdgnba.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwdgnba.c,v 1.22 2008-01-14 23:46:56 tbox Exp $ */
+/* $Id: lwdgnba.c,v 1.22 2008/01/14 23:46:56 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/lwdgrbn.c
--- a/head/contrib/bind9/bin/named/lwdgrbn.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/lwdgrbn.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwdgrbn.c,v 1.22 2009-09-02 23:48:01 tbox Exp $ */
+/* $Id: lwdgrbn.c,v 1.22 2009/09/02 23:48:01 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/lwdnoop.c
--- a/head/contrib/bind9/bin/named/lwdnoop.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/lwdnoop.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwdnoop.c,v 1.13 2008-01-22 23:28:04 tbox Exp $ */
+/* $Id: lwdnoop.c,v 1.13 2008/01/22 23:28:04 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/lwresd.8
--- a/head/contrib/bind9/bin/named/lwresd.8 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/lwresd.8 Tue Apr 17 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwresd.8,v 1.31 2009-07-11 01:12:45 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/lwresd.c
--- a/head/contrib/bind9/bin/named/lwresd.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/lwresd.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwresd.c,v 1.60 2009-09-02 23:48:01 tbox Exp $ */
+/* $Id: lwresd.c,v 1.60 2009/09/02 23:48:01 tbox Exp $ */
=20
/*! \file
* \brief
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/lwresd.do=
cbook
--- a/head/contrib/bind9/bin/named/lwresd.docbook Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/bin/named/lwresd.docbook Tue Apr 17 11:51:51 2012 =
+0300
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwresd.docbook,v 1.20 2009-01-20 23:47:56 tbox Exp $ -->
+<!-- $Id: lwresd.docbook,v 1.20 2009/01/20 23:47:56 tbox Exp $ -->
<refentry>
<refentryinfo>
<date>June 30, 2000</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/lwresd.ht=
ml
--- a/head/contrib/bind9/bin/named/lwresd.html Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/bin/named/lwresd.html Tue Apr 17 11:51:51 2012 +03=
00
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwresd.html,v 1.27 2009-07-11 01:12:45 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -22,7 +22,7 @@
<meta name=3D"generator" content=3D"DocBook XSL Stylesheets V1.71.1">
</head>
<body bgcolor=3D"white" text=3D"black" link=3D"#0000FF" vlink=3D"#840084" =
alink=3D"#0000FF"><div class=3D"refentry" lang=3D"en">
-<a name=3D"id2476275"></a><div class=3D"titlepage"></div>
+<a name=3D"id2476274"></a><div class=3D"titlepage"></div>
<div class=3D"refnamediv">
<h2>Name</h2>
<p><span class=3D"application">lwresd</span> — lightweight resolver =
daemon</p>
@@ -32,7 +32,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">lwresd</code> [<cod=
e class=3D"option">-c <em class=3D"replaceable"><code>config-file</code></e=
m></code>] [<code class=3D"option">-C <em class=3D"replaceable"><code>confi=
g-file</code></em></code>] [<code class=3D"option">-d <em class=3D"replacea=
ble"><code>debug-level</code></em></code>] [<code class=3D"option">-f</code=
>] [<code class=3D"option">-g</code>] [<code class=3D"option">-i <em class=
=3D"replaceable"><code>pid-file</code></em></code>] [<code class=3D"option"=
>-m <em class=3D"replaceable"><code>flag</code></em></code>] [<code class=
=3D"option">-n <em class=3D"replaceable"><code>#cpus</code></em></code>] [<=
code class=3D"option">-P <em class=3D"replaceable"><code>port</code></em></=
code>] [<code class=3D"option">-p <em class=3D"replaceable"><code>port</cod=
e></em></code>] [<code class=3D"option">-s</code>] [<code class=3D"option">=
-t <em class=3D"replaceable"><code>directory</code></em></code>] [<code cla=
ss=3D"option">-u <em class=3D"replaceable"><code>user</code></em></code>] [=
<code class=3D"option">-v</code>] [<code class=3D"option">-4</code>] [<code=
class=3D"option">-6</code>]</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543467"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543469"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">lwresd</strong></span>
is the daemon providing name lookup
services to clients that use the BIND 9 lightweight resolver
@@ -67,7 +67,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543514"></a><h2>OPTIONS</h2>
+<a name=3D"id2543516"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-4</span></dt>
<dd><p>
@@ -197,7 +197,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543931"></a><h2>FILES</h2>
+<a name=3D"id2543933"></a><h2>FILES</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term"><code class=3D"filename">/etc/resolv.conf</code><=
/span></dt>
<dd><p>
@@ -210,14 +210,14 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543971"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543973"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">named</span>=
(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">lwres</sp=
an>(3)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">resolver<=
/span>(5)</span>.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544005"></a><h2>AUTHOR</h2>
+<a name=3D"id2544007"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/lwsearch.c
--- a/head/contrib/bind9/bin/named/lwsearch.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/lwsearch.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwsearch.c,v 1.13 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: lwsearch.c,v 1.13 2007/06/19 23:46:59 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/main.c
--- a/head/contrib/bind9/bin/named/main.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/main.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: main.c,v 1.180.14.3 2011-03-11 06:47:00 marka Exp $ */
+/* $Id: main.c,v 1.180.14.4 2011/11/05 00:45:52 each Exp $ */
=20
/*! \file */
=20
@@ -793,6 +793,25 @@
isc_log_write(ns_g_lctx, NS_LOGCATEGORY_GENERAL, NS_LOGMODULE_MAIN,
ISC_LOG_NOTICE, "built with %s", ns_g_configargs);
=20
+ isc_log_write(ns_g_lctx, NS_LOGCATEGORY_GENERAL, NS_LOGMODULE_MAIN,
+ ISC_LOG_NOTICE,
+ "----------------------------------------------------");
+ isc_log_write(ns_g_lctx, NS_LOGCATEGORY_GENERAL, NS_LOGMODULE_MAIN,
+ ISC_LOG_NOTICE,
+ "BIND 9 is maintained by Internet Systems Consortium,");
+ isc_log_write(ns_g_lctx, NS_LOGCATEGORY_GENERAL, NS_LOGMODULE_MAIN,
+ ISC_LOG_NOTICE,
+ "Inc. (ISC), a non-profit 501(c)(3) public-benefit ");
+ isc_log_write(ns_g_lctx, NS_LOGCATEGORY_GENERAL, NS_LOGMODULE_MAIN,
+ ISC_LOG_NOTICE,
+ "corporation. Support and training for BIND 9 are ");
+ isc_log_write(ns_g_lctx, NS_LOGCATEGORY_GENERAL, NS_LOGMODULE_MAIN,
+ ISC_LOG_NOTICE,
+ "available at https://www.isc.org/support");
+ isc_log_write(ns_g_lctx, NS_LOGCATEGORY_GENERAL, NS_LOGMODULE_MAIN,
+ ISC_LOG_NOTICE,
+ "----------------------------------------------------");
+
dump_symboltable();
=20
/*
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/named.8
--- a/head/contrib/bind9/bin/named/named.8 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/named.8 Tue Apr 17 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: named.8,v 1.41 2009-10-06 01:14:41 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/named.con=
f.5
--- a/head/contrib/bind9/bin/named/named.conf.5 Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/bin/named/named.conf.5 Tue Apr 17 11:51:51 2012 +0=
300
@@ -12,7 +12,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: named.conf.5,v 1.44.12.1 2011-02-03 12:29:12 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -254,8 +254,7 @@
disable\-algorithms \fIstring\fR { \fIstring\fR; ... };
dnssec\-enable \fIboolean\fR;
dnssec\-validation \fIboolean\fR;
- dnssec\-lookaside \fIstring\fR trust\-anchor \fIstring\fR;
- dnssec\-lookaside ( \fIauto\fR | \fIdomain\fR trust\-anchor \fIdomain\fR =
);
+ dnssec\-lookaside ( \fIauto\fR | \fIno\fR | \fIdomain\fR trust\-anchor \f=
Idomain\fR );
dnssec\-must\-be\-secure \fIstring\fR \fIboolean\fR;
dnssec\-accept\-expired \fIboolean\fR;
dns64\-server \fIstring\fR;
@@ -424,7 +423,7 @@
disable\-algorithms \fIstring\fR { \fIstring\fR; ... };
dnssec\-enable \fIboolean\fR;
dnssec\-validation \fIboolean\fR;
- dnssec\-lookaside \fIstring\fR trust\-anchor \fIstring\fR;
+ dnssec\-lookaside ( \fIauto\fR | \fIno\fR | \fIdomain\fR trust\-anchor \f=
Idomain\fR );
dnssec\-must\-be\-secure \fIstring\fR \fIboolean\fR;
dnssec\-accept\-expired \fIboolean\fR;
dns64\-server \fIstring\fR;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/named.con=
f.docbook
--- a/head/contrib/bind9/bin/named/named.conf.docbook Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/bin/named/named.conf.docbook Tue Apr 17 11:51:51 2=
012 +0300
@@ -17,7 +17,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: named.conf.docbook,v 1.49.14.1 2011-02-03 05:50:05 marka Exp $ -=
->
+<!-- $Id: named.conf.docbook,v 1.49.14.2 2011/11/07 00:31:47 marka Exp $ -=
->
<refentry>
<refentryinfo>
<date>Aug 13, 2004</date>
@@ -285,8 +285,7 @@
disable-algorithms <replaceable>string</replaceable> { <replaceable>strin=
g</replaceable>; ... };
dnssec-enable <replaceable>boolean</replaceable>;
dnssec-validation <replaceable>boolean</replaceable>;
- dnssec-lookaside <replaceable>string</replaceable> trust-anchor <replacea=
ble>string</replaceable>;
- dnssec-lookaside ( <replaceable>auto</replaceable> | <replaceable>domain<=
/replaceable> trust-anchor <replaceable>domain</replaceable> );
+ dnssec-lookaside ( <replaceable>auto</replaceable> | <replaceable>no</rep=
laceable> | <replaceable>domain</replaceable> trust-anchor <replaceable>dom=
ain</replaceable> );
dnssec-must-be-secure <replaceable>string</replaceable> <replaceable>bool=
ean</replaceable>;
dnssec-accept-expired <replaceable>boolean</replaceable>;
=20
@@ -473,7 +472,7 @@
disable-algorithms <replaceable>string</replaceable> { <replaceable>strin=
g</replaceable>; ... };
dnssec-enable <replaceable>boolean</replaceable>;
dnssec-validation <replaceable>boolean</replaceable>;
- dnssec-lookaside <replaceable>string</replaceable> trust-anchor <replacea=
ble>string</replaceable>;
+ dnssec-lookaside ( <replaceable>auto</replaceable> | <replaceable>no</rep=
laceable> | <replaceable>domain</replaceable> trust-anchor <replaceable>dom=
ain</replaceable> );
dnssec-must-be-secure <replaceable>string</replaceable> <replaceable>bool=
ean</replaceable>;
dnssec-accept-expired <replaceable>boolean</replaceable>;
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/named.con=
f.html
--- a/head/contrib/bind9/bin/named/named.conf.html Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/bin/named/named.conf.html Tue Apr 17 11:51:51 2012=
+0300
@@ -13,7 +13,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: named.conf.html,v 1.53.12.1 2011-02-03 12:29:12 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -31,7 +31,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">named.conf</code> </=
p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543352"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543353"></a><h2>DESCRIPTION</h2>
<p><code class=3D"filename">named.conf</code> is the configuration file
for
<span><strong class=3D"command">named</strong></span>. Statements a=
re enclosed
@@ -50,14 +50,14 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543380"></a><h2>ACL</h2>
+<a name=3D"id2543381"></a><h2>ACL</h2>
<div class=3D"literallayout"><p><br>
acl=A0<em class=3D"replaceable"><code>string</code></em>=A0{=A0<em class=
=3D"replaceable"><code>address_match_element</code></em>;=A0...=A0};<br>
<br>
</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543396"></a><h2>KEY</h2>
+<a name=3D"id2543397"></a><h2>KEY</h2>
<div class=3D"literallayout"><p><br>
key=A0<em class=3D"replaceable"><code>domain_name</code></em>=A0{<br>
algorithm=A0<em class=3D"replaceable"><code>string</code></em>;<br>
@@ -66,7 +66,7 @@
</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543415"></a><h2>MASTERS</h2>
+<a name=3D"id2543416"></a><h2>MASTERS</h2>
<div class=3D"literallayout"><p><br>
masters=A0<em class=3D"replaceable"><code>string</code></em>=A0[<span clas=
s=3D"optional">=A0port=A0<em class=3D"replaceable"><code>integer</code></em=
>=A0</span>]=A0{<br>
(=A0<em class=3D"replaceable"><code>masters</code></em>=A0|=A0<em class=
=3D"replaceable"><code>ipv4_address</code></em>=A0[<span class=3D"optional"=
>port=A0<em class=3D"replaceable"><code>integer</code></em></span>]=A0|<br>
@@ -75,7 +75,7 @@
</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543461"></a><h2>SERVER</h2>
+<a name=3D"id2543462"></a><h2>SERVER</h2>
<div class=3D"literallayout"><p><br>
server=A0(=A0<em class=3D"replaceable"><code>ipv4_address[<span class=3D"o=
ptional">/prefixlen</span>]</code></em>=A0|=A0<em class=3D"replaceable"><co=
de>ipv6_address[<span class=3D"optional">/prefixlen</span>]</code></em>=A0)=
=A0{<br>
bogus=A0<em class=3D"replaceable"><code>boolean</code></em>;<br>
@@ -97,7 +97,7 @@
</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543529"></a><h2>TRUSTED-KEYS</h2>
+<a name=3D"id2543530"></a><h2>TRUSTED-KEYS</h2>
<div class=3D"literallayout"><p><br>
trusted-keys=A0{<br>
<em class=3D"replaceable"><code>domain_name</code></em>=A0<em class=3D"re=
placeable"><code>flags</code></em>=A0<em class=3D"replaceable"><code>protoc=
ol</code></em>=A0<em class=3D"replaceable"><code>algorithm</code></em>=A0<e=
m class=3D"replaceable"><code>key</code></em>;=A0...=A0<br>
@@ -105,7 +105,7 @@
</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543555"></a><h2>MANAGED-KEYS</h2>
+<a name=3D"id2543556"></a><h2>MANAGED-KEYS</h2>
<div class=3D"literallayout"><p><br>
managed-keys=A0{<br>
<em class=3D"replaceable"><code>domain_name</code></em>=A0<code class=3D"=
constant">initial-key</code>=A0<em class=3D"replaceable"><code>flags</code>=
</em>=A0<em class=3D"replaceable"><code>protocol</code></em>=A0<em class=3D=
"replaceable"><code>algorithm</code></em>=A0<em class=3D"replaceable"><code=
>key</code></em>;=A0...=A0<br>
@@ -113,7 +113,7 @@
</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543584"></a><h2>CONTROLS</h2>
+<a name=3D"id2543585"></a><h2>CONTROLS</h2>
<div class=3D"literallayout"><p><br>
controls=A0{<br>
inet=A0(=A0<em class=3D"replaceable"><code>ipv4_address</code></em>=A0|=
=A0<em class=3D"replaceable"><code>ipv6_address</code></em>=A0|=A0*=A0)<br>
@@ -125,7 +125,7 @@
</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543619"></a><h2>LOGGING</h2>
+<a name=3D"id2543620"></a><h2>LOGGING</h2>
<div class=3D"literallayout"><p><br>
logging=A0{<br>
channel=A0<em class=3D"replaceable"><code>string</code></em>=A0{<br>
@@ -143,7 +143,7 @@
</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543657"></a><h2>LWRES</h2>
+<a name=3D"id2543658"></a><h2>LWRES</h2>
<div class=3D"literallayout"><p><br>
lwres=A0{<br>
listen-on=A0[<span class=3D"optional">=A0port=A0<em class=3D"replaceable"=
><code>integer</code></em>=A0</span>]=A0{<br>
@@ -156,7 +156,7 @@
</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543699"></a><h2>OPTIONS</h2>
+<a name=3D"id2543700"></a><h2>OPTIONS</h2>
<div class=3D"literallayout"><p><br>
options=A0{<br>
avoid-v4-udp-ports=A0{=A0<em class=3D"replaceable"><code>port</code></em>=
;=A0...=A0};<br>
@@ -251,8 +251,7 @@
disable-algorithms=A0<em class=3D"replaceable"><code>string</code></em>=
=A0{=A0<em class=3D"replaceable"><code>string</code></em>;=A0...=A0};<br>
dnssec-enable=A0<em class=3D"replaceable"><code>boolean</code></em>;<br>
dnssec-validation=A0<em class=3D"replaceable"><code>boolean</code></em>;<=
br>
- dnssec-lookaside=A0<em class=3D"replaceable"><code>string</code></em>=A0t=
rust-anchor=A0<em class=3D"replaceable"><code>string</code></em>;<br>
- dnssec-lookaside=A0(=A0<em class=3D"replaceable"><code>auto</code></em>=
=A0|=A0<em class=3D"replaceable"><code>domain</code></em>=A0trust-anchor=A0=
<em class=3D"replaceable"><code>domain</code></em>=A0);<br>
+ dnssec-lookaside=A0(=A0<em class=3D"replaceable"><code>auto</code></em>=
=A0|=A0<em class=3D"replaceable"><code>no</code></em>=A0|=A0<em class=3D"re=
placeable"><code>domain</code></em>=A0trust-anchor=A0<em class=3D"replaceab=
le"><code>domain</code></em>=A0);<br>
dnssec-must-be-secure=A0<em class=3D"replaceable"><code>string</code></em=
>=A0<em class=3D"replaceable"><code>boolean</code></em>;<br>
dnssec-accept-expired=A0<em class=3D"replaceable"><code>boolean</code></e=
m>;<br>
<br>
@@ -361,7 +360,7 @@
</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544577"></a><h2>VIEW</h2>
+<a name=3D"id2544574"></a><h2>VIEW</h2>
<div class=3D"literallayout"><p><br>
view=A0<em class=3D"replaceable"><code>string</code></em>=A0<em class=3D"r=
eplaceable"><code>optional_class</code></em>=A0{<br>
match-clients=A0{=A0<em class=3D"replaceable"><code>address_match_element=
</code></em>;=A0...=A0};<br>
@@ -438,7 +437,7 @@
disable-algorithms=A0<em class=3D"replaceable"><code>string</code></em>=
=A0{=A0<em class=3D"replaceable"><code>string</code></em>;=A0...=A0};<br>
dnssec-enable=A0<em class=3D"replaceable"><code>boolean</code></em>;<br>
dnssec-validation=A0<em class=3D"replaceable"><code>boolean</code></em>;<=
br>
- dnssec-lookaside=A0<em class=3D"replaceable"><code>string</code></em>=A0t=
rust-anchor=A0<em class=3D"replaceable"><code>string</code></em>;<br>
+ dnssec-lookaside=A0(=A0<em class=3D"replaceable"><code>auto</code></em>=
=A0|=A0<em class=3D"replaceable"><code>no</code></em>=A0|=A0<em class=3D"re=
placeable"><code>domain</code></em>=A0trust-anchor=A0<em class=3D"replaceab=
le"><code>domain</code></em>=A0);<br>
dnssec-must-be-secure=A0<em class=3D"replaceable"><code>string</code></em=
>=A0<em class=3D"replaceable"><code>boolean</code></em>;<br>
dnssec-accept-expired=A0<em class=3D"replaceable"><code>boolean</code></e=
m>;<br>
<br>
@@ -524,7 +523,7 @@
</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2545280"></a><h2>ZONE</h2>
+<a name=3D"id2545284"></a><h2>ZONE</h2>
<div class=3D"literallayout"><p><br>
zone=A0<em class=3D"replaceable"><code>string</code></em>=A0<em class=3D"r=
eplaceable"><code>optional_class</code></em>=A0{<br>
type=A0(=A0master=A0|=A0slave=A0|=A0stub=A0|=A0hint=A0|<br>
@@ -619,12 +618,12 @@
</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2545659"></a><h2>FILES</h2>
+<a name=3D"id2545664"></a><h2>FILES</h2>
<p><code class=3D"filename">/etc/named.conf</code>
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2545671"></a><h2>SEE ALSO</h2>
+<a name=3D"id2545675"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">named</span>=
(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named-che=
ckconf</span>(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">rndc</spa=
n>(8)</span>,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/named.doc=
book
--- a/head/contrib/bind9/bin/named/named.docbook Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/bin/named/named.docbook Tue Apr 17 11:51:51 2012 +=
0300
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: named.docbook,v 1.26 2009-10-05 17:30:49 fdupont Exp $ -->
+<!-- $Id: named.docbook,v 1.26 2009/10/05 17:30:49 fdupont Exp $ -->
<refentry id=3D"man.named">
<refentryinfo>
<date>May 21, 2009</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/named.html
--- a/head/contrib/bind9/bin/named/named.html Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/named.html Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: named.html,v 1.33 2009-10-06 01:14:41 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -32,7 +32,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">named</code> [<code=
class=3D"option">-4</code>] [<code class=3D"option">-6</code>] [<code clas=
s=3D"option">-c <em class=3D"replaceable"><code>config-file</code></em></co=
de>] [<code class=3D"option">-d <em class=3D"replaceable"><code>debug-level=
</code></em></code>] [<code class=3D"option">-E <em class=3D"replaceable"><=
code>engine-name</code></em></code>] [<code class=3D"option">-f</code>] [<c=
ode class=3D"option">-g</code>] [<code class=3D"option">-m <em class=3D"rep=
laceable"><code>flag</code></em></code>] [<code class=3D"option">-n <em cla=
ss=3D"replaceable"><code>#cpus</code></em></code>] [<code class=3D"option">=
-p <em class=3D"replaceable"><code>port</code></em></code>] [<code class=3D=
"option">-s</code>] [<code class=3D"option">-S <em class=3D"replaceable"><c=
ode>#max-socks</code></em></code>] [<code class=3D"option">-t <em class=3D"=
replaceable"><code>directory</code></em></code>] [<code class=3D"option">-u=
<em class=3D"replaceable"><code>user</code></em></code>] [<code class=3D"o=
ption">-v</code>] [<code class=3D"option">-V</code>] [<code class=3D"option=
">-x <em class=3D"replaceable"><code>cache-file</code></em></code>]</p></di=
v>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543480"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543482"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">named</strong></span>
is a Domain Name System (DNS) server,
part of the BIND 9 distribution from ISC. For more
@@ -47,7 +47,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543505"></a><h2>OPTIONS</h2>
+<a name=3D"id2543507"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-4</span></dt>
<dd><p>
@@ -228,7 +228,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543962"></a><h2>SIGNALS</h2>
+<a name=3D"id2543964"></a><h2>SIGNALS</h2>
<p>
In routine operation, signals should not be used to control
the nameserver; <span><strong class=3D"command">rndc</strong></span>=
should be used
@@ -249,7 +249,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544010"></a><h2>CONFIGURATION</h2>
+<a name=3D"id2544012"></a><h2>CONFIGURATION</h2>
<p>
The <span><strong class=3D"command">named</strong></span> configurat=
ion file is too complex
to describe in detail here. A complete description is provided
@@ -266,7 +266,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544046"></a><h2>FILES</h2>
+<a name=3D"id2544049"></a><h2>FILES</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term"><code class=3D"filename">/etc/named.conf</code></=
span></dt>
<dd><p>
@@ -279,7 +279,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544086"></a><h2>SEE ALSO</h2>
+<a name=3D"id2544088"></a><h2>SEE ALSO</h2>
<p><em class=3D"citetitle">RFC 1033</em>,
<em class=3D"citetitle">RFC 1034</em>,
<em class=3D"citetitle">RFC 1035</em>,
@@ -292,7 +292,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544293"></a><h2>AUTHOR</h2>
+<a name=3D"id2544295"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/notify.c
--- a/head/contrib/bind9/bin/named/notify.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/notify.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: notify.c,v 1.37 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: notify.c,v 1.37 2007/06/19 23:46:59 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/query.c
--- a/head/contrib/bind9/bin/named/query.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/query.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: query.c,v 1.353.8.11.4.1 2011-11-16 09:32:08 marka Exp $ */
+/* $Id: query.c,v 1.353.8.24 2012/02/07 01:14:39 marka Exp $ */
=20
/*! \file */
=20
@@ -830,57 +830,41 @@
}
=20
static void
-rpz_log(ns_client_t *client) {
- char namebuf1[DNS_NAME_FORMATSIZE];
- char namebuf2[DNS_NAME_FORMATSIZE];
- dns_rpz_st_t *st;
- const char *pat;
-
- if (!ns_g_server->log_queries ||
- !isc_log_wouldlog(ns_g_lctx, DNS_RPZ_INFO_LEVEL))
+rpz_log_rewrite(ns_client_t *client, const char *disabled,
+ dns_rpz_policy_t policy, dns_rpz_type_t type,
+ dns_name_t *rpz_qname) {
+ char qname_buf[DNS_NAME_FORMATSIZE];
+ char rpz_qname_buf[DNS_NAME_FORMATSIZE];
+
+ if (!isc_log_wouldlog(ns_g_lctx, DNS_RPZ_INFO_LEVEL))
return;
=20
- st =3D client->query.rpz_st;
- dns_name_format(client->query.qname, namebuf1, sizeof(namebuf1));
- dns_name_format(st->qname, namebuf2, sizeof(namebuf2));
-
- switch (st->m.policy) {
- case DNS_RPZ_POLICY_NO_OP:
- pat =3D"response policy %s rewrite %s NO-OP using %s";
- break;
- case DNS_RPZ_POLICY_NXDOMAIN:
- pat =3D "response policy %s rewrite %s to NXDOMAIN using %s";
- break;
- case DNS_RPZ_POLICY_NODATA:
- pat =3D "response policy %s rewrite %s to NODATA using %s";
- break;
- case DNS_RPZ_POLICY_RECORD:
- case DNS_RPZ_POLICY_CNAME:
- pat =3D "response policy %s rewrite %s using %s";
- break;
- default:
- INSIST(0);
- }
- ns_client_log(client, NS_LOGCATEGORY_QUERIES, NS_LOGMODULE_QUERY,
- DNS_RPZ_INFO_LEVEL, pat, dns_rpz_type2str(st->m.type),
- namebuf1, namebuf2);
+ dns_name_format(client->query.qname, qname_buf, sizeof(qname_buf));
+ dns_name_format(rpz_qname, rpz_qname_buf, sizeof(rpz_qname_buf));
+
+ ns_client_log(client, DNS_LOGCATEGORY_RPZ, NS_LOGMODULE_QUERY,
+ DNS_RPZ_INFO_LEVEL, "%srpz %s %s rewrite %s via %s",
+ disabled,
+ dns_rpz_type2str(type), dns_rpz_policy2str(policy),
+ qname_buf, rpz_qname_buf);
}
=20
static void
-rpz_fail_log(ns_client_t *client, int level, dns_rpz_type_t rpz_type,
- dns_name_t *name, const char *str, isc_result_t result)
+rpz_log_fail(ns_client_t *client, int level,
+ dns_rpz_type_t rpz_type, dns_name_t *name,
+ const char *str, isc_result_t result)
{
char namebuf1[DNS_NAME_FORMATSIZE];
char namebuf2[DNS_NAME_FORMATSIZE];
=20
- if (!ns_g_server->log_queries || !isc_log_wouldlog(ns_g_lctx, level))
+ if (!isc_log_wouldlog(ns_g_lctx, level))
return;
=20
dns_name_format(client->query.qname, namebuf1, sizeof(namebuf1));
dns_name_format(name, namebuf2, sizeof(namebuf2));
ns_client_log(client, NS_LOGCATEGORY_QUERY_EERRORS,
NS_LOGMODULE_QUERY, level,
- "response policy %s rewrite %s via %s %sfailed: %s",
+ "rpz %s rewrite %s via %s %sfailed: %s",
dns_rpz_type2str(rpz_type),
namebuf1, namebuf2, str, isc_result_totext(result));
}
@@ -889,9 +873,8 @@
* Get a policy rewrite zone database.
*/
static isc_result_t
-rpz_getdb(ns_client_t *client, dns_rpz_type_t rpz_type,
- dns_name_t *rpz_qname, dns_zone_t **zonep,
- dns_db_t **dbp, dns_dbversion_t **versionp)
+rpz_getdb(ns_client_t *client, dns_rpz_type_t rpz_type, dns_name_t *rpz_qn=
ame,
+ dns_zone_t **zonep, dns_db_t **dbp, dns_dbversion_t **versionp)
{
char namebuf1[DNS_NAME_FORMATSIZE];
char namebuf2[DNS_NAME_FORMATSIZE];
@@ -901,12 +884,11 @@
result =3D query_getzonedb(client, rpz_qname, dns_rdatatype_any,
DNS_GETDB_IGNOREACL, zonep, dbp, &rpz_version);
if (result =3D=3D ISC_R_SUCCESS) {
- if (ns_g_server->log_queries &&
- isc_log_wouldlog(ns_g_lctx, DNS_RPZ_DEBUG_LEVEL2)) {
+ if (isc_log_wouldlog(ns_g_lctx, DNS_RPZ_DEBUG_LEVEL2)) {
dns_name_format(client->query.qname, namebuf1,
sizeof(namebuf1));
dns_name_format(rpz_qname, namebuf2, sizeof(namebuf2));
- ns_client_log(client, NS_LOGCATEGORY_QUERIES,
+ ns_client_log(client, DNS_LOGCATEGORY_RPZ,
NS_LOGMODULE_QUERY, DNS_RPZ_DEBUG_LEVEL2,
"try rpz %s rewrite %s via %s",
dns_rpz_type2str(rpz_type),
@@ -915,7 +897,7 @@
*versionp =3D rpz_version;
return (ISC_R_SUCCESS);
}
- rpz_fail_log(client, DNS_RPZ_ERROR_LEVEL, rpz_type, rpz_qname,
+ rpz_log_fail(client, DNS_RPZ_ERROR_LEVEL, rpz_type, rpz_qname,
"query_getzonedb() ", result);
return (result);
}
@@ -1144,7 +1126,8 @@
if (name =3D=3D mname)
mname =3D NULL;
=20
- *mnamep =3D mname;
+ if (mnamep !=3D NULL)
+ *mnamep =3D mname;
=20
CTRACE("query_isduplicate: false: done");
return (ISC_FALSE);
@@ -1363,6 +1346,10 @@
}
=20
if (qtype =3D=3D dns_rdatatype_a) {
+#ifdef ALLOW_FILTER_AAAA_ON_V4
+ isc_boolean_t have_a =3D ISC_FALSE;
+#endif
+
/*
* We now go looking for A and AAAA records, along with
* their signatures.
@@ -1385,6 +1372,8 @@
if (sigrdataset =3D=3D NULL)
goto addname;
}
+ if (query_isduplicate(client, fname, dns_rdatatype_a, NULL))
+ goto aaaa_lookup;
result =3D dns_db_findrdataset(db, node, version,
dns_rdatatype_a, 0,
client->now, rdataset,
@@ -1399,6 +1388,9 @@
}
if (result =3D=3D ISC_R_SUCCESS) {
mname =3D NULL;
+#ifdef ALLOW_FILTER_AAAA_ON_V4
+ have_a =3D ISC_TRUE;
+#endif
if (!query_isduplicate(client, fname,
dns_rdatatype_a, &mname)) {
if (mname !=3D NULL) {
@@ -1428,6 +1420,9 @@
dns_rdataset_disassociate(sigrdataset);
}
}
+ aaaa_lookup:
+ if (query_isduplicate(client, fname, dns_rdatatype_aaaa, NULL))
+ goto addname;
result =3D dns_db_findrdataset(db, node, version,
dns_rdatatype_aaaa, 0,
client->now, rdataset,
@@ -1442,6 +1437,17 @@
}
if (result =3D=3D ISC_R_SUCCESS) {
mname =3D NULL;
+ /*
+ * There's an A; check whether we're filtering AAAA
+ */
+#ifdef ALLOW_FILTER_AAAA_ON_V4
+ if (have_a &&
+ (client->filter_aaaa =3D=3D dns_v4_aaaa_break_dnssec ||
+ (client->filter_aaaa =3D=3D dns_v4_aaaa_filter &&
+ (!WANTDNSSEC(client) || sigrdataset =3D=3D NULL ||
+ !dns_rdataset_isassociated(sigrdataset)))))
+ goto addname;
+#endif
if (!query_isduplicate(client, fname,
dns_rdatatype_aaaa, &mname)) {
if (mname !=3D NULL) {
@@ -1593,7 +1599,13 @@
dns_rdatatype_t type;
dns_rdatasetadditional_t additionaltype;
=20
- if (qtype !=3D dns_rdatatype_a) {
+ /*
+ * If we don't have an additional cache call query_addadditional.
+ */
+ client =3D additionalctx->client;
+ REQUIRE(NS_CLIENT_VALID(client));
+
+ if (qtype !=3D dns_rdatatype_a || client->view->acache =3D=3D NULL) {
/*
* This function is optimized for "address" types. For other
* types, use a generic routine.
@@ -1607,8 +1619,6 @@
* Initialization.
*/
rdataset_base =3D additionalctx->rdataset;
- client =3D additionalctx->client;
- REQUIRE(NS_CLIENT_VALID(client));
eresult =3D ISC_R_SUCCESS;
fname =3D NULL;
rdataset =3D NULL;
@@ -1861,6 +1871,9 @@
if (sigrdataset =3D=3D NULL)
goto cleanup;
=20
+ if (additionaltype =3D=3D dns_rdatasetadditional_fromcache &&
+ query_isduplicate(client, fname, dns_rdatatype_a, NULL))
+ goto aaaa_lookup;
/*
* Find A RRset with sig RRset. Even if we don't find a sig RRset
* for a client using DNSSEC, we'll continue the process to make a
@@ -1905,6 +1918,10 @@
}
}
=20
+ aaaa_lookup:
+ if (additionaltype =3D=3D dns_rdatasetadditional_fromcache &&
+ query_isduplicate(client, fname, dns_rdatatype_aaaa, NULL))
+ goto foundcache;
/* Find AAAA RRset with sig RRset */
result =3D dns_db_findrdataset(db, node, version, dns_rdatatype_aaaa,
0, client->now, rdataset, sigrdataset);
@@ -3350,8 +3367,9 @@
sigrdataset, fname, ISC_TRUE, cname);
if (!dns_rdataset_isassociated(rdataset))
goto cleanup;
- query_addrrset(client, &fname, &rdataset, &sigrdataset,
- dbuf, DNS_SECTION_AUTHORITY);
+ if (!ispositive)
+ query_addrrset(client, &fname, &rdataset, &sigrdataset,
+ dbuf, DNS_SECTION_AUTHORITY);
=20
/*
* Replace resources which were consumed by query_addrrset.
@@ -3799,14 +3817,15 @@
dns_rpz_st_t *st =3D client->query.rpz_st;
=20
rpz_clean(&st->m.zone, &st->m.db, &st->m.node, NULL);
+ st->m.version =3D NULL;
if (st->m.rdataset !=3D NULL)
query_putrdataset(client, &st->m.rdataset);
=20
- rpz_clean(NULL, &st->ns.db, NULL, NULL);
- if (st->ns.ns_rdataset !=3D NULL)
- query_putrdataset(client, &st->ns.ns_rdataset);
- if (st->ns.r_rdataset !=3D NULL)
- query_putrdataset(client, &st->ns.r_rdataset);
+ rpz_clean(NULL, &st->r.db, NULL, NULL);
+ if (st->r.ns_rdataset !=3D NULL)
+ query_putrdataset(client, &st->r.ns_rdataset);
+ if (st->r.r_rdataset !=3D NULL)
+ query_putrdataset(client, &st->r.r_rdataset);
=20
rpz_clean(&st->q.zone, &st->q.db, &st->q.node, NULL);
if (st->q.rdataset !=3D NULL)
@@ -3814,15 +3833,18 @@
if (st->q.sigrdataset !=3D NULL)
query_putrdataset(client, &st->q.sigrdataset);
st->state =3D 0;
+ st->m.type =3D DNS_RPZ_TYPE_BAD;
+ st->m.policy =3D DNS_RPZ_POLICY_MISS;
}
=20
/*
- * Get NS, A, or AAAA rrset for rpz nsdname or nsip checking.
+ * Get NS, A, or AAAA rrset for response policy zone checks.
*/
static isc_result_t
-rpz_ns_find(ns_client_t *client, dns_name_t *name, dns_rdatatype_t type,
- dns_db_t **dbp, dns_dbversion_t *version,
- dns_rdataset_t **rdatasetp, isc_boolean_t resuming)
+rpz_rrset_find(ns_client_t *client, dns_rpz_type_t rpz_type,
+ dns_name_t *name, dns_rdatatype_t type,
+ dns_db_t **dbp, dns_dbversion_t *version,
+ dns_rdataset_t **rdatasetp, isc_boolean_t resuming)
{
dns_rpz_st_t *st;
isc_boolean_t is_zone;
@@ -3833,22 +3855,22 @@
=20
st =3D client->query.rpz_st;
if ((st->state & DNS_RPZ_RECURSING) !=3D 0) {
- INSIST(st->ns.r_type =3D=3D type);
+ INSIST(st->r.r_type =3D=3D type);
INSIST(dns_name_equal(name, st->r_name));
INSIST(*rdatasetp =3D=3D NULL ||
!dns_rdataset_isassociated(*rdatasetp));
st->state &=3D ~DNS_RPZ_RECURSING;
- *dbp =3D st->ns.db;
- st->ns.db =3D NULL;
+ *dbp =3D st->r.db;
+ st->r.db =3D NULL;
if (*rdatasetp !=3D NULL)
query_putrdataset(client, rdatasetp);
- *rdatasetp =3D st->ns.r_rdataset;
- st->ns.r_rdataset =3D NULL;
- result =3D st->ns.r_result;
+ *rdatasetp =3D st->r.r_rdataset;
+ st->r.r_rdataset =3D NULL;
+ result =3D st->r.r_result;
if (result =3D=3D DNS_R_DELEGATION) {
- rpz_fail_log(client, DNS_RPZ_ERROR_LEVEL,
- DNS_RPZ_TYPE_NSIP, name,
- "rpz_ns_find() ", result);
+ rpz_log_fail(client, DNS_RPZ_ERROR_LEVEL,
+ rpz_type, name,
+ "rpz_rrset_find(1) ", result);
st->m.policy =3D DNS_RPZ_POLICY_ERROR;
result =3D DNS_R_SERVFAIL;
}
@@ -3870,9 +3892,9 @@
result =3D query_getdb(client, name, type, 0, &zone, dbp,
&version, &is_zone);
if (result !=3D ISC_R_SUCCESS) {
- rpz_fail_log(client, DNS_RPZ_ERROR_LEVEL,
- DNS_RPZ_TYPE_NSIP, name, "NS getdb() ",
- result);
+ rpz_log_fail(client, DNS_RPZ_ERROR_LEVEL,
+ rpz_type, name,
+ "rpz_rrset_find(2) ", result);
st->m.policy =3D DNS_RPZ_POLICY_ERROR;
if (zone !=3D NULL)
dns_zone_detach(&zone);
@@ -3885,8 +3907,8 @@
node =3D NULL;
dns_fixedname_init(&fixed);
found =3D dns_fixedname_name(&fixed);
- result =3D dns_db_find(*dbp, name, version, type, 0, client->now, &node,
- found, *rdatasetp, NULL);
+ result =3D dns_db_find(*dbp, name, version, type, DNS_DBFIND_GLUEOK,
+ client->now, &node, found, *rdatasetp, NULL);
if (result =3D=3D DNS_R_DELEGATION && is_zone && USECACHE(client)) {
/*
* Try the cache if we're authoritative for an
@@ -3901,16 +3923,21 @@
}
rpz_clean(NULL, dbp, &node, NULL);
if (result =3D=3D DNS_R_DELEGATION) {
+ rpz_clean(NULL, NULL, NULL, rdatasetp);
/*
- * Recurse to get NS rrset or A or AAAA rrset for an NS name.
+ * Recurse for NS rrset or A or AAAA rrset for an NS.
+ * Do not recurse for addresses for the query name.
*/
- rpz_clean(NULL, NULL, NULL, rdatasetp);
- dns_name_copy(name, st->r_name, NULL);
- result =3D query_recurse(client, type, st->r_name, NULL, NULL,
- resuming);
- if (result =3D=3D ISC_R_SUCCESS) {
- st->state |=3D DNS_RPZ_RECURSING;
- result =3D DNS_R_DELEGATION;
+ if (rpz_type =3D=3D DNS_RPZ_TYPE_IP) {
+ result =3D DNS_R_NXRRSET;
+ } else {
+ dns_name_copy(name, st->r_name, NULL);
+ result =3D query_recurse(client, type, st->r_name,
+ NULL, NULL, resuming);
+ if (result =3D=3D ISC_R_SUCCESS) {
+ st->state |=3D DNS_RPZ_RECURSING;
+ result =3D DNS_R_DELEGATION;
+ }
}
}
return (result);
@@ -3928,7 +3955,7 @@
dns_dbversion_t *version;
dns_zone_t *zone;
dns_db_t *db;
- dns_rpz_zone_t *new_rpz;
+ dns_rpz_zone_t *rpz;
isc_result_t result;
=20
st =3D client->query.rpz_st;
@@ -3939,16 +3966,26 @@
}
zone =3D NULL;
db =3D NULL;
- for (new_rpz =3D ISC_LIST_HEAD(client->view->rpz_zones);
- new_rpz !=3D NULL;
- new_rpz =3D ISC_LIST_NEXT(new_rpz, link)) {
+ for (rpz =3D ISC_LIST_HEAD(client->view->rpz_zones);
+ rpz !=3D NULL;
+ rpz =3D ISC_LIST_NEXT(rpz, link)) {
+ /*
+ * Do not check policy zones that cannot replace a policy
+ * already known to match.
+ */
+ if (st->m.policy !=3D DNS_RPZ_POLICY_MISS) {
+ if (st->m.rpz->num < rpz->num)
+ break;
+ if (st->m.rpz->num =3D=3D rpz->num &&
+ st->m.type < rpz_type)
+ continue;
+ }
+
+ /*
+ * Find the database for this policy zone to get its radix tree.
+ */
version =3D NULL;
-
- /*
- * Find the database for this policy zone to get its
- * radix tree.
- */
- result =3D rpz_getdb(client, rpz_type, &new_rpz->origin,
+ result =3D rpz_getdb(client, rpz_type, &rpz->origin,
&zone, &db, &version);
if (result !=3D ISC_R_SUCCESS) {
rpz_clean(&zone, &db, NULL, NULL);
@@ -3960,26 +3997,31 @@
* hit, if any. Note the domain name and quality of the
* best hit.
*/
- result =3D dns_db_rpz_findips(new_rpz, rpz_type, zone, db,
- version, rdataset, st);
- RUNTIME_CHECK(result =3D=3D ISC_R_SUCCESS);
+ (void)dns_db_rpz_findips(rpz, rpz_type, zone, db, version,
+ rdataset, st,
+ client->query.rpz_st->qname);
rpz_clean(&zone, &db, NULL, NULL);
}
return (ISC_R_SUCCESS);
}
=20
+/*
+ * Look for an A or AAAA rdataset
+ * and check for IP or NSIP rewrite policy rules.
+ */
static isc_result_t
-rpz_rewrite_nsip(ns_client_t *client, dns_rdatatype_t type, dns_name_t *na=
me,
- dns_db_t **dbp, dns_dbversion_t *version,
- dns_rdataset_t **rdatasetp, isc_boolean_t resuming)
+rpz_rewrite_rrset(ns_client_t *client, dns_rpz_type_t rpz_type,
+ dns_rdatatype_t type, dns_name_t *name,
+ dns_db_t **dbp, dns_dbversion_t *version,
+ dns_rdataset_t **rdatasetp, isc_boolean_t resuming)
{
isc_result_t result;
=20
- result =3D rpz_ns_find(client, name, type, dbp, version, rdatasetp,
- resuming);
+ result =3D rpz_rrset_find(client, rpz_type, name, type, dbp, version,
+ rdatasetp, resuming);
switch (result) {
case ISC_R_SUCCESS:
- result =3D rpz_rewrite_ip(client, *rdatasetp, DNS_RPZ_TYPE_NSIP);
+ result =3D rpz_rewrite_ip(client, *rdatasetp, rpz_type);
break;
case DNS_R_EMPTYNAME:
case DNS_R_EMPTYWILD:
@@ -3987,17 +4029,24 @@
case DNS_R_NCACHENXDOMAIN:
case DNS_R_NXRRSET:
case DNS_R_NCACHENXRRSET:
+ case ISC_R_NOTFOUND:
result =3D ISC_R_SUCCESS;
break;
case DNS_R_DELEGATION:
case DNS_R_DUPLICATE:
case DNS_R_DROP:
break;
+ case DNS_R_CNAME:
+ case DNS_R_DNAME:
+ rpz_log_fail(client, DNS_RPZ_DEBUG_LEVEL1, rpz_type,
+ name, "NS address rewrite rrset ", result);
+ result =3D ISC_R_SUCCESS;
+ break;
default:
if (client->query.rpz_st->m.policy !=3D DNS_RPZ_POLICY_ERROR) {
client->query.rpz_st->m.policy =3D DNS_RPZ_POLICY_ERROR;
- rpz_fail_log(client, ISC_LOG_WARNING, DNS_RPZ_TYPE_NSIP,
- name, "NS address rewrite nsip ", result);
+ rpz_log_fail(client, DNS_RPZ_ERROR_LEVEL, rpz_type,
+ name, "NS address rewrite rrset ", result);
}
break;
}
@@ -4005,15 +4054,61 @@
}
=20
/*
+ * Look for both A and AAAA rdatasets
+ * and check for IP or NSIP rewrite policy rules.
+ * Look only for addresses that will be in the ANSWER section
+ * when checking for IP rules.
+ */
+static isc_result_t
+rpz_rewrite_rrsets(ns_client_t *client, dns_rpz_type_t rpz_type,
+ dns_name_t *name, dns_rdatatype_t type,
+ dns_rdataset_t **rdatasetp, isc_boolean_t resuming)
+{
+ dns_rpz_st_t *st;
+ dns_dbversion_t *version;
+ dns_db_t *ipdb;
+ isc_result_t result;
+
+ st =3D client->query.rpz_st;
+ version =3D NULL;
+ ipdb =3D NULL;
+ if ((st->state & DNS_RPZ_DONE_IPv4) =3D=3D 0 &&
+ ((rpz_type =3D=3D DNS_RPZ_TYPE_NSIP) ?
+ (st->state & DNS_RPZ_HAVE_NSIPv4) :
+ (st->state & DNS_RPZ_HAVE_IP)) !=3D 0 &&
+ (type =3D=3D dns_rdatatype_any || type =3D=3D dns_rdatatype_a)) {
+ result =3D rpz_rewrite_rrset(client, rpz_type, dns_rdatatype_a,
+ name, &ipdb, version, rdatasetp,
+ resuming);
+ if (result =3D=3D ISC_R_SUCCESS)
+ st->state |=3D DNS_RPZ_DONE_IPv4;
+ } else {
+ result =3D ISC_R_SUCCESS;
+ }
+ if (result =3D=3D ISC_R_SUCCESS &&
+ ((rpz_type =3D=3D DNS_RPZ_TYPE_NSIP) ?
+ (st->state & DNS_RPZ_HAVE_NSIPv6) :
+ (st->state & DNS_RPZ_HAVE_IP)) !=3D 0 &&
+ (type =3D=3D dns_rdatatype_any || type =3D=3D dns_rdatatype_aaaa)) {
+ result =3D rpz_rewrite_rrset(client, rpz_type, dns_rdatatype_aaaa,
+ name, &ipdb, version, rdatasetp,
+ resuming);
+ }
+ if (ipdb !=3D NULL)
+ dns_db_detach(&ipdb);
+ return (result);
+}
+
+/*
* Get the rrset from a response policy zone.
*/
static isc_result_t
rpz_find(ns_client_t *client, dns_rdatatype_t qtype, dns_name_t *qnamef,
dns_name_t *sname, dns_rpz_type_t rpz_type, dns_zone_t **zonep,
- dns_db_t **dbp, dns_dbnode_t **nodep, dns_rdataset_t **rdatasetp,
+ dns_db_t **dbp, dns_dbversion_t **versionp,
+ dns_dbnode_t **nodep, dns_rdataset_t **rdatasetp,
dns_rpz_policy_t *policyp)
{
- dns_dbversion_t *version;
dns_rpz_policy_t policy;
dns_fixedname_t fixed;
dns_name_t *found;
@@ -4029,8 +4124,8 @@
* Try to get either a CNAME or the type of record demanded by the
* request from the policy zone.
*/
- version =3D NULL;
- result =3D rpz_getdb(client, rpz_type, qnamef, zonep, dbp, &version);
+ *versionp =3D NULL;
+ result =3D rpz_getdb(client, rpz_type, qnamef, zonep, dbp, versionp);
if (result !=3D ISC_R_SUCCESS) {
*policyp =3D DNS_RPZ_POLICY_MISS;
return (DNS_R_NXDOMAIN);
@@ -4038,17 +4133,17 @@
=20
dns_fixedname_init(&fixed);
found =3D dns_fixedname_name(&fixed);
- result =3D dns_db_find(*dbp, qnamef, version, dns_rdatatype_any, 0,
+ result =3D dns_db_find(*dbp, qnamef, *versionp, dns_rdatatype_any, 0,
client->now, nodep, found, *rdatasetp, NULL);
if (result =3D=3D ISC_R_SUCCESS) {
dns_rdatasetiter_t *rdsiter;
=20
rdsiter =3D NULL;
- result =3D dns_db_allrdatasets(*dbp, *nodep, version, 0,
+ result =3D dns_db_allrdatasets(*dbp, *nodep, *versionp, 0,
&rdsiter);
if (result !=3D ISC_R_SUCCESS) {
dns_db_detachnode(*dbp, nodep);
- rpz_fail_log(client, DNS_RPZ_ERROR_LEVEL, rpz_type,
+ rpz_log_fail(client, DNS_RPZ_ERROR_LEVEL, rpz_type,
qnamef, "allrdatasets()", result);
*policyp =3D DNS_RPZ_POLICY_ERROR;
return (DNS_R_SERVFAIL);
@@ -4065,7 +4160,7 @@
dns_rdatasetiter_destroy(&rdsiter);
if (result !=3D ISC_R_SUCCESS) {
if (result !=3D ISC_R_NOMORE) {
- rpz_fail_log(client, DNS_RPZ_ERROR_LEVEL,
+ rpz_log_fail(client, DNS_RPZ_ERROR_LEVEL,
rpz_type, qnamef, "rdatasetiter",
result);
*policyp =3D DNS_RPZ_POLICY_ERROR;
@@ -4083,7 +4178,7 @@
qtype =3D=3D dns_rdatatype_sig)
result =3D DNS_R_NXRRSET;
else
- result =3D dns_db_find(*dbp, qnamef, version,
+ result =3D dns_db_find(*dbp, qnamef, *versionp,
qtype, 0, client->now,
nodep, found, *rdatasetp,
NULL);
@@ -4095,7 +4190,8 @@
policy =3D DNS_RPZ_POLICY_RECORD;
} else {
policy =3D dns_rpz_decode_cname(*rdatasetp, sname);
- if (policy =3D=3D DNS_RPZ_POLICY_RECORD &&
+ if ((policy =3D=3D DNS_RPZ_POLICY_RECORD ||
+ policy =3D=3D DNS_RPZ_POLICY_WILDCNAME) &&
qtype !=3D dns_rdatatype_cname &&
qtype !=3D dns_rdatatype_any)
result =3D DNS_R_CNAME;
@@ -4106,8 +4202,8 @@
* DNAME policy RRs have very few if any uses that are not
* better served with simple wildcards. Making the work would
* require complications to get the number of labels matched
- * in the name or the found name itself to the main DNS_R_DNAME
- * case in query_find(). So fall through to treat them as NODATA.
+ * in the name or the found name to the main DNS_R_DNAME case
+ * in query_find(). So fall through to treat them as NODATA.
*/
case DNS_R_NXRRSET:
policy =3D DNS_RPZ_POLICY_NODATA;
@@ -4126,7 +4222,7 @@
default:
dns_db_detach(dbp);
dns_zone_detach(zonep);
- rpz_fail_log(client, DNS_RPZ_ERROR_LEVEL, rpz_type, qnamef,
+ rpz_log_fail(client, DNS_RPZ_ERROR_LEVEL, rpz_type, qnamef,
"", result);
policy =3D DNS_RPZ_POLICY_ERROR;
result =3D DNS_R_SERVFAIL;
@@ -4150,6 +4246,7 @@
dns_name_t *prefix, *suffix, *rpz_qname;
dns_zone_t *zone;
dns_db_t *db;
+ dns_dbversion_t *version;
dns_dbnode_t *node;
dns_rpz_policy_t policy;
unsigned int labels;
@@ -4164,7 +4261,18 @@
rpz !=3D NULL;
rpz =3D ISC_LIST_NEXT(rpz, link)) {
/*
- * Construct the rule's owner name.
+ * Do not check policy zones that cannot replace a policy
+ * already known to match.
+ */
+ if (st->m.policy !=3D DNS_RPZ_POLICY_MISS) {
+ if (st->m.rpz->num < rpz->num)
+ break;
+ if (st->m.rpz->num =3D=3D rpz->num &&
+ st->m.type < rpz_type)
+ continue;
+ }
+ /*
+ * Construct the policy's owner name.
*/
dns_fixedname_init(&prefixf);
prefix =3D dns_fixedname_name(&prefixf);
@@ -4183,13 +4291,13 @@
INSIST(result =3D=3D DNS_R_NAMETOOLONG);
labels =3D dns_name_countlabels(prefix);
if (labels < 2) {
- rpz_fail_log(client, DNS_RPZ_ERROR_LEVEL,
+ rpz_log_fail(client, DNS_RPZ_ERROR_LEVEL,
rpz_type, suffix,
"concatentate() ", result);
return (ISC_R_SUCCESS);
}
if (labels+1 =3D=3D dns_name_countlabels(qname)) {
- rpz_fail_log(client, DNS_RPZ_DEBUG_LEVEL1,
+ rpz_log_fail(client, DNS_RPZ_DEBUG_LEVEL1,
rpz_type, suffix,
"concatentate() ", result);
}
@@ -4197,10 +4305,11 @@
}
=20
/*
- * See if the qname rule (or RR) exists.
+ * See if the policy record exists.
*/
result =3D rpz_find(client, qtype, rpz_qname, qname, rpz_type,
- &zone, &db, &node, rdatasetp, &policy);
+ &zone, &db, &version, &node, rdatasetp,
+ &policy);
switch (result) {
case DNS_R_NXDOMAIN:
case DNS_R_EMPTYNAME:
@@ -4211,14 +4320,31 @@
return (DNS_R_SERVFAIL);
default:
/*
- * when more than one name or address hits a rule,
- * prefer the first set of names (qname or NS),
- * the first policy zone, and the smallest name
+ * We are dealing with names here.
+ * With more than one applicable policy, prefer
+ * the earliest configured policy,
+ * QNAME over IP over NSDNAME over NSIP,
+ * and the smallest name.
+ * Because of the testing above,
+ * we known st->m.rpz->num >=3D rpz->num and either
+ * st->m.rpz->num > rpz->num or st->m.type >=3D rpz_type
*/
- if (st->m.type =3D=3D rpz_type &&
- rpz->num > st->m.rpz->num &&
- 0 <=3D dns_name_compare(rpz_qname, st->qname))
+ if (st->m.policy !=3D DNS_RPZ_POLICY_MISS &&
+ rpz->num =3D=3D st->m.rpz->num &&
+ (st->m.type < rpz_type ||
+ (st->m.type =3D=3D rpz_type &&
+ 0 >=3D dns_name_compare(rpz_qname, st->qname))))
continue;
+
+ /*
+ * Merely log DNS_RPZ_POLICY_DISABLED hits.
+ */
+ if (rpz->policy =3D=3D DNS_RPZ_POLICY_DISABLED) {
+ rpz_log_rewrite(client, "disabled ",
+ policy, rpz_type, rpz_qname);
+ continue;
+ }
+
rpz_clean(&st->m.zone, &st->m.db, &st->m.node,
&st->m.rdataset);
st->m.rpz =3D rpz;
@@ -4227,7 +4353,8 @@
st->m.policy =3D policy;
st->m.result =3D result;
dns_name_copy(rpz_qname, st->qname, NULL);
- if (dns_rdataset_isassociated(*rdatasetp)) {
+ if (*rdatasetp !=3D NULL &&
+ dns_rdataset_isassociated(*rdatasetp)) {
dns_rdataset_t *trdataset;
=20
trdataset =3D st->m.rdataset;
@@ -4241,6 +4368,7 @@
node =3D NULL;
st->m.db =3D db;
db =3D NULL;
+ st->m.version =3D version;
st->m.zone =3D zone;
zone =3D NULL;
}
@@ -4250,24 +4378,38 @@
return (ISC_R_SUCCESS);
}
=20
+static void
+rpz_rewrite_ns_skip(ns_client_t *client, dns_name_t *nsname,
+ isc_result_t result, int level, const char *str)
+{
+ dns_rpz_st_t *st;
+
+ st =3D client->query.rpz_st;
+
+ if (str !=3D NULL)
+ rpz_log_fail(client, level, DNS_RPZ_TYPE_NSIP, nsname,
+ str, result);
+ if (st->r.ns_rdataset !=3D NULL &&
+ dns_rdataset_isassociated(st->r.ns_rdataset))
+ dns_rdataset_disassociate(st->r.ns_rdataset);
+
+ st->r.label--;
+}
+
/*
- * Look for response policy zone NSIP and NSDNAME rewriting.
+ * Look for response policy zone QNAME, NSIP, and NSDNAME rewriting.
*/
static isc_result_t
-rpz_rewrite(ns_client_t *client, dns_rdatatype_t qtype,
+rpz_rewrite(ns_client_t *client, dns_rdatatype_t qtype, isc_result_t qresu=
lt,
isc_boolean_t resuming)
{
dns_rpz_st_t *st;
- dns_db_t *ipdb;
dns_rdataset_t *rdataset;
dns_fixedname_t nsnamef;
dns_name_t *nsname;
- dns_dbversion_t *version;
+ isc_boolean_t ck_ip;
isc_result_t result;
=20
- ipdb =3D NULL;
- rdataset =3D NULL;
-
st =3D client->query.rpz_st;
if (st =3D=3D NULL) {
st =3D isc_mem_get(client->mctx, sizeof(*st));
@@ -4275,7 +4417,9 @@
return (ISC_R_NOMEMORY);
st->state =3D 0;
memset(&st->m, 0, sizeof(st->m));
- memset(&st->ns, 0, sizeof(st->ns));
+ st->m.type =3D DNS_RPZ_TYPE_BAD;
+ st->m.policy =3D DNS_RPZ_POLICY_MISS;
+ memset(&st->r, 0, sizeof(st->r));
memset(&st->q, 0, sizeof(st->q));
dns_fixedname_init(&st->_qnamef);
dns_fixedname_init(&st->_r_namef);
@@ -4285,78 +4429,147 @@
st->fname =3D dns_fixedname_name(&st->_fnamef);
client->query.rpz_st =3D st;
}
+
+ /*
+ * There is nothing to rewrite if the main query failed.
+ */
+ switch (qresult) {
+ case ISC_R_SUCCESS:
+ case DNS_R_GLUE:
+ case DNS_R_ZONECUT:
+ ck_ip =3D ISC_TRUE;
+ break;
+ case DNS_R_EMPTYNAME:
+ case DNS_R_NXRRSET:
+ case DNS_R_NXDOMAIN:
+ case DNS_R_EMPTYWILD:
+ case DNS_R_NCACHENXDOMAIN:
+ case DNS_R_NCACHENXRRSET:
+ case DNS_R_CNAME:
+ case DNS_R_DNAME:
+ ck_ip =3D ISC_FALSE;
+ break;
+ case DNS_R_DELEGATION:
+ case ISC_R_NOTFOUND:
+ return (ISC_R_SUCCESS);
+ case ISC_R_FAILURE:
+ case ISC_R_TIMEDOUT:
+ case DNS_R_BROKENCHAIN:
+ rpz_log_fail(client, DNS_RPZ_DEBUG_LEVEL3, DNS_RPZ_TYPE_QNAME,
+ client->query.qname,
+ "stop on qresult in rpz_rewrite()",
+ qresult);
+ return (ISC_R_SUCCESS);
+ default:
+ rpz_log_fail(client, DNS_RPZ_DEBUG_LEVEL1, DNS_RPZ_TYPE_QNAME,
+ client->query.qname,
+ "stop on unrecognized qresult in rpz_rewrite()",
+ qresult);
+ return (ISC_R_SUCCESS);
+ }
+
+ rdataset =3D NULL;
if ((st->state & DNS_RPZ_DONE_QNAME) =3D=3D 0) {
- st->state =3D DNS_RPZ_DONE_QNAME;
- st->m.type =3D DNS_RPZ_TYPE_BAD;
- st->m.policy =3D DNS_RPZ_POLICY_MISS;
-
/*
- * Check rules for the name if this it the first time,
- * i.e. we've not been recursing.
+ * Check rules for the query name if this it the first time
+ * for the current qname, i.e. we've not been recursing.
+ * There is a first time for each name in a CNAME chain.
*/
- st->state &=3D ~(DNS_RPZ_HAVE_IP | DNS_RPZ_HAVE_NSIPv4 |
- DNS_RPZ_HAVE_NSIPv6 | DNS_RPZ_HAD_NSDNAME);
result =3D rpz_rewrite_name(client, qtype, client->query.qname,
DNS_RPZ_TYPE_QNAME, &rdataset);
if (result !=3D ISC_R_SUCCESS)
goto cleanup;
- if (st->m.policy !=3D DNS_RPZ_POLICY_MISS)
+
+ st->r.label =3D dns_name_countlabels(client->query.qname);
+
+ st->state &=3D ~(DNS_RPZ_DONE_QNAME_IP | DNS_RPZ_DONE_IPv4);
+ st->state |=3D DNS_RPZ_DONE_QNAME;
+ }
+
+ /*
+ * Check known IP addresses for the query name.
+ * Any recursion required for the query has already happened.
+ * Do not check addresses that will not be in the ANSWER section.
+ */
+ if ((st->state & DNS_RPZ_DONE_QNAME_IP) =3D=3D 0 &&
+ (st->state & DNS_RPZ_HAVE_IP) !=3D 0 && ck_ip) {
+ result =3D rpz_rewrite_rrsets(client, DNS_RPZ_TYPE_IP,
+ client->query.qname, qtype,
+ &rdataset, resuming);
+ if (result !=3D ISC_R_SUCCESS)
goto cleanup;
- if ((st->state & (DNS_RPZ_HAVE_NSIPv4 | DNS_RPZ_HAVE_NSIPv6 |
- DNS_RPZ_HAD_NSDNAME)) =3D=3D 0)
- goto cleanup;
- st->ns.label =3D dns_name_countlabels(client->query.qname);
+ st->state &=3D ~DNS_RPZ_DONE_IPv4;
+ st->state |=3D DNS_RPZ_DONE_QNAME_IP;
+ }
+
+ /*
+ * Stop looking for rules if there are none of the other kinds.
+ */
+ if ((st->state & (DNS_RPZ_HAVE_NSIPv4 | DNS_RPZ_HAVE_NSIPv6 |
+ DNS_RPZ_HAVE_NSDNAME)) =3D=3D 0) {
+ result =3D ISC_R_SUCCESS;
+ goto cleanup;
}
=20
dns_fixedname_init(&nsnamef);
dns_name_clone(client->query.qname, dns_fixedname_name(&nsnamef));
- while (st->ns.label > 1 && st->m.policy =3D=3D DNS_RPZ_POLICY_MISS) {
- if (st->ns.label =3D=3D dns_name_countlabels(client->query.qname)) {
+ while (st->r.label > 1) {
+ /*
+ * Get NS rrset for each domain in the current qname.
+ */
+ if (st->r.label =3D=3D dns_name_countlabels(client->query.qname)) {
nsname =3D client->query.qname;
} else {
nsname =3D dns_fixedname_name(&nsnamef);
- dns_name_split(client->query.qname, st->ns.label,
+ dns_name_split(client->query.qname, st->r.label,
NULL, nsname);
}
- if (st->ns.ns_rdataset =3D=3D NULL ||
- !dns_rdataset_isassociated(st->ns.ns_rdataset)) {
+ if (st->r.ns_rdataset =3D=3D NULL ||
+ !dns_rdataset_isassociated(st->r.ns_rdataset)) {
dns_db_t *db =3D NULL;
- result =3D rpz_ns_find(client, nsname, dns_rdatatype_ns,
- &db, NULL, &st->ns.ns_rdataset,
- resuming);
+ result =3D rpz_rrset_find(client, DNS_RPZ_TYPE_NSDNAME,
+ nsname, dns_rdatatype_ns,
+ &db, NULL, &st->r.ns_rdataset,
+ resuming);
if (db !=3D NULL)
dns_db_detach(&db);
- if (result !=3D ISC_R_SUCCESS) {
- if (result =3D=3D DNS_R_DELEGATION)
+ if (st->m.policy =3D=3D DNS_RPZ_POLICY_ERROR)
+ goto cleanup;
+ switch (result) {
+ case ISC_R_SUCCESS:
+ result =3D dns_rdataset_first(st->r.ns_rdataset);
+ if (result !=3D ISC_R_SUCCESS)
goto cleanup;
- if (result =3D=3D DNS_R_EMPTYNAME ||
- result =3D=3D DNS_R_NXRRSET ||
- result =3D=3D DNS_R_EMPTYWILD ||
- result =3D=3D DNS_R_NXDOMAIN ||
- result =3D=3D DNS_R_NCACHENXDOMAIN ||
- result =3D=3D DNS_R_NCACHENXRRSET ||
- result =3D=3D DNS_R_CNAME ||
- result =3D=3D DNS_R_DNAME) {
- rpz_fail_log(client,
- DNS_RPZ_DEBUG_LEVEL2,
- DNS_RPZ_TYPE_NSIP, nsname,
- "NS db_find() ", result);
- dns_rdataset_disassociate(st->ns.
- ns_rdataset);
- st->ns.label--;
- continue;
- }
- if (st->m.policy !=3D DNS_RPZ_POLICY_ERROR) {
- rpz_fail_log(client, DNS_RPZ_INFO_LEVEL,
- DNS_RPZ_TYPE_NSIP, nsname,
- "NS db_find() ", result);
- st->m.policy =3D DNS_RPZ_POLICY_ERROR;
- }
+ st->state &=3D ~(DNS_RPZ_DONE_NSDNAME |
+ DNS_RPZ_DONE_IPv4);
+ break;
+ case DNS_R_DELEGATION:
goto cleanup;
+ case DNS_R_EMPTYNAME:
+ case DNS_R_NXRRSET:
+ case DNS_R_EMPTYWILD:
+ case DNS_R_NXDOMAIN:
+ case DNS_R_NCACHENXDOMAIN:
+ case DNS_R_NCACHENXRRSET:
+ case ISC_R_NOTFOUND:
+ case DNS_R_CNAME:
+ case DNS_R_DNAME:
+ rpz_rewrite_ns_skip(client, nsname, result,
+ 0, NULL);
+ continue;
+ case ISC_R_TIMEDOUT:
+ case DNS_R_BROKENCHAIN:
+ case ISC_R_FAILURE:
+ rpz_rewrite_ns_skip(client, nsname, result,
+ DNS_RPZ_DEBUG_LEVEL3,
+ "NS db_find() ");
+ continue;
+ default:
+ rpz_rewrite_ns_skip(client, nsname, result,
+ DNS_RPZ_INFO_LEVEL,
+ "unrecognized NS db_find() ");
+ continue;
}
- result =3D dns_rdataset_first(st->ns.ns_rdataset);
- if (result !=3D ISC_R_SUCCESS)
- goto cleanup;
}
/*
* Check all NS names.
@@ -4365,17 +4578,30 @@
dns_rdata_ns_t ns;
dns_rdata_t nsrdata =3D DNS_RDATA_INIT;
=20
- dns_rdataset_current(st->ns.ns_rdataset, &nsrdata);
+ dns_rdataset_current(st->r.ns_rdataset, &nsrdata);
result =3D dns_rdata_tostruct(&nsrdata, &ns, NULL);
dns_rdata_reset(&nsrdata);
if (result !=3D ISC_R_SUCCESS) {
- rpz_fail_log(client, DNS_RPZ_ERROR_LEVEL,
+ rpz_log_fail(client, DNS_RPZ_ERROR_LEVEL,
DNS_RPZ_TYPE_NSIP, nsname,
"rdata_tostruct() ", result);
st->m.policy =3D DNS_RPZ_POLICY_ERROR;
goto cleanup;
}
- if ((st->state & DNS_RPZ_HAD_NSDNAME) !=3D 0) {
+ /*
+ * Do nothing about "NS ."
+ */
+ if (dns_name_equal(&ns.name, dns_rootname)) {
+ dns_rdata_freestruct(&ns);
+ result =3D dns_rdataset_next(st->r.ns_rdataset);
+ continue;
+ }
+ /*
+ * Check this NS name if we did not handle it
+ * during a previous recursion.
+ */
+ if ((st->state & DNS_RPZ_DONE_NSDNAME) =3D=3D 0 &&
+ (st->state & DNS_RPZ_HAVE_NSDNAME) !=3D 0) {
result =3D rpz_rewrite_name(client, qtype,
&ns.name,
DNS_RPZ_TYPE_NSDNAME,
@@ -4384,42 +4610,23 @@
dns_rdata_freestruct(&ns);
goto cleanup;
}
+ st->state |=3D DNS_RPZ_DONE_NSDNAME;
}
/*
- * Check all IP addresses for this NS name, but don't
- * bother without NSIP rules or with a NSDNAME hit.
+ * Check all IP addresses for this NS name.
*/
- version =3D NULL;
- if ((st->state & DNS_RPZ_HAVE_NSIPv4) !=3D 0 &&
- st->m.type !=3D DNS_RPZ_TYPE_NSDNAME &&
- (st->state & DNS_RPZ_DONE_A) =3D=3D 0) {
- result =3D rpz_rewrite_nsip(client,
- dns_rdatatype_a,
- &ns.name, &ipdb,
- version, &rdataset,
- resuming);
- if (result =3D=3D ISC_R_SUCCESS)
- st->state |=3D DNS_RPZ_DONE_A;
- }
- if (result =3D=3D ISC_R_SUCCESS &&
- (st->state & DNS_RPZ_HAVE_NSIPv6) !=3D 0 &&
- st->m.type !=3D DNS_RPZ_TYPE_NSDNAME) {
- result =3D rpz_rewrite_nsip(client,
- dns_rdatatype_aaaa,
- &ns.name, &ipdb,
- version, &rdataset,
- resuming);
- }
+ result =3D rpz_rewrite_rrsets(client, DNS_RPZ_TYPE_NSIP,
+ &ns.name, dns_rdatatype_any,
+ &rdataset, resuming);
dns_rdata_freestruct(&ns);
- if (ipdb !=3D NULL)
- dns_db_detach(&ipdb);
if (result !=3D ISC_R_SUCCESS)
goto cleanup;
- st->state &=3D ~DNS_RPZ_DONE_A;
- result =3D dns_rdataset_next(st->ns.ns_rdataset);
+ st->state &=3D ~(DNS_RPZ_DONE_NSDNAME |
+ DNS_RPZ_DONE_IPv4);
+ result =3D dns_rdataset_next(st->r.ns_rdataset);
} while (result =3D=3D ISC_R_SUCCESS);
- dns_rdataset_disassociate(st->ns.ns_rdataset);
- st->ns.label--;
+ dns_rdataset_disassociate(st->r.ns_rdataset);
+ st->r.label--;
}
=20
/*
@@ -4429,31 +4636,76 @@
=20
cleanup:
if (st->m.policy !=3D DNS_RPZ_POLICY_MISS &&
- st->m.policy !=3D DNS_RPZ_POLICY_NO_OP &&
st->m.policy !=3D DNS_RPZ_POLICY_ERROR &&
st->m.rpz->policy !=3D DNS_RPZ_POLICY_GIVEN)
st->m.policy =3D st->m.rpz->policy;
- if (st->m.policy =3D=3D DNS_RPZ_POLICY_NO_OP)
- rpz_log(client);
if (st->m.policy =3D=3D DNS_RPZ_POLICY_MISS ||
- st->m.policy =3D=3D DNS_RPZ_POLICY_NO_OP ||
- st->m.policy =3D=3D DNS_RPZ_POLICY_ERROR)
+ st->m.policy =3D=3D DNS_RPZ_POLICY_PASSTHRU ||
+ st->m.policy =3D=3D DNS_RPZ_POLICY_ERROR) {
+ if (st->m.policy =3D=3D DNS_RPZ_POLICY_PASSTHRU)
+ rpz_log_rewrite(client, "", st->m.policy, st->m.type,
+ st->qname);
rpz_clean(&st->m.zone, &st->m.db, &st->m.node, &st->m.rdataset);
- if (st->m.policy !=3D DNS_RPZ_POLICY_MISS)
- st->state |=3D DNS_RPZ_REWRITTEN;
+ }
if (st->m.policy =3D=3D DNS_RPZ_POLICY_ERROR) {
st->m.type =3D DNS_RPZ_TYPE_BAD;
result =3D DNS_R_SERVFAIL;
}
- if (rdataset !=3D NULL)
- query_putrdataset(client, &rdataset);
- if ((st->state & DNS_RPZ_RECURSING) =3D=3D 0) {
- rpz_clean(NULL, &st->ns.db, NULL, &st->ns.ns_rdataset);
- }
+ query_putrdataset(client, &rdataset);
+ if ((st->state & DNS_RPZ_RECURSING) =3D=3D 0)
+ rpz_clean(NULL, &st->r.db, NULL, &st->r.ns_rdataset);
=20
return (result);
}
=20
+/*
+ * Add a CNAME to the query response, including translating foo.evil.com a=
nd
+ * *.evil.com CNAME *.example.com
+ * to
+ * foo.evil.com CNAME foo.evil.com.example.com
+ */
+static isc_result_t
+rpz_add_cname(ns_client_t *client, dns_rpz_st_t *st,
+ dns_name_t *cname, dns_name_t *fname, isc_buffer_t *dbuf)
+{
+ dns_fixedname_t prefix, suffix;
+ unsigned int labels;
+ isc_result_t result;
+
+ labels =3D dns_name_countlabels(cname);
+ if (labels > 2 && dns_name_iswildcard(cname)) {
+ dns_fixedname_init(&prefix);
+ dns_name_split(client->query.qname, 1,
+ dns_fixedname_name(&prefix), NULL);
+ dns_fixedname_init(&suffix);
+ dns_name_split(cname, labels-1,
+ NULL, dns_fixedname_name(&suffix));
+ result =3D dns_name_concatenate(dns_fixedname_name(&prefix),
+ dns_fixedname_name(&suffix),
+ fname, NULL);
+ if (result =3D=3D DNS_R_NAMETOOLONG)
+ client->message->rcode =3D dns_rcode_yxdomain;
+ } else {
+ result =3D dns_name_copy(cname, fname, NULL);
+ RUNTIME_CHECK(result =3D=3D ISC_R_SUCCESS);
+ }
+ if (result !=3D ISC_R_SUCCESS)
+ return (result);
+ query_keepname(client, fname, dbuf);
+ result =3D query_add_cname(client, client->query.qname,
+ fname, dns_trust_authanswer, st->m.ttl);
+ if (result !=3D ISC_R_SUCCESS)
+ return (result);
+ rpz_log_rewrite(client, "", st->m.policy, st->m.type, st->qname);
+ ns_client_qnamereplace(client, fname);
+ /*
+ * Turn off DNSSEC because the results of a
+ * response policy zone cannot verify.
+ */
+ client->attributes &=3D ~NS_CLIENTATTR_WANTDNSSEC;
+ return (ISC_R_SUCCESS);
+}
+
#define MAX_RESTARTS 16
=20
#define QUERY_ERROR(r) \
@@ -5027,14 +5279,12 @@
rpz_st->q.sigrdataset =3D NULL;
qtype =3D rpz_st->q.qtype;
=20
+ rpz_st->r.db =3D event->db;
if (event->node !=3D NULL)
- dns_db_detachnode(db, &event->node);
- rpz_st->ns.db =3D event->db;
- rpz_st->ns.r_type =3D event->qtype;
- rpz_st->ns.r_rdataset =3D event->rdataset;
- if (event->sigrdataset !=3D NULL &&
- dns_rdataset_isassociated(event->sigrdataset))
- dns_rdataset_disassociate(event->sigrdataset);
+ dns_db_detachnode(event->db, &event->node);
+ rpz_st->r.r_type =3D event->qtype;
+ rpz_st->r.r_rdataset =3D event->rdataset;
+ query_putrdataset(client, &event->sigrdataset);
} else {
authoritative =3D ISC_FALSE;
=20
@@ -5085,7 +5335,7 @@
}
if (rpz_st !=3D NULL &&
(rpz_st->state & DNS_RPZ_RECURSING) !=3D 0) {
- rpz_st->ns.r_result =3D event->result;
+ rpz_st->r.r_result =3D event->result;
result =3D rpz_st->q.result;
isc_event_free(ISC_EVENT_PTR(&event));
} else {
@@ -5248,13 +5498,14 @@
=20
if (!ISC_LIST_EMPTY(client->view->rpz_zones) &&
RECURSIONOK(client) && !RECURSING(client) &&
- result !=3D DNS_R_DELEGATION && result !=3D ISC_R_NOTFOUND &&
+ (!WANTDNSSEC(client) || sigrdataset =3D=3D NULL ||
+ !dns_rdataset_isassociated(sigrdataset)) &&
(client->query.rpz_st =3D=3D NULL ||
(client->query.rpz_st->state & DNS_RPZ_REWRITTEN) =3D=3D 0) &&
!dns_name_equal(client->query.qname, dns_rootname)) {
isc_result_t rresult;
=20
- rresult =3D rpz_rewrite(client, qtype, resuming);
+ rresult =3D rpz_rewrite(client, qtype, result, resuming);
rpz_st =3D client->query.rpz_st;
switch (rresult) {
case ISC_R_SUCCESS:
@@ -5285,16 +5536,19 @@
RECURSE_ERROR(rresult);
goto cleanup;
}
+ if (rpz_st->m.policy !=3D DNS_RPZ_POLICY_MISS)
+ rpz_st->state |=3D DNS_RPZ_REWRITTEN;
if (rpz_st->m.policy !=3D DNS_RPZ_POLICY_MISS &&
- rpz_st->m.policy !=3D DNS_RPZ_POLICY_NO_OP) {
- result =3D dns_name_copy(client->query.qname, fname,
- NULL);
- RUNTIME_CHECK(result =3D=3D ISC_R_SUCCESS);
- finish_rewrite:
+ rpz_st->m.policy !=3D DNS_RPZ_POLICY_PASSTHRU &&
+ rpz_st->m.policy !=3D DNS_RPZ_POLICY_ERROR) {
+ if (rpz_st->m.type =3D=3D DNS_RPZ_TYPE_QNAME) {
+ result =3D dns_name_copy(client->query.qname,
+ fname, NULL);
+ RUNTIME_CHECK(result =3D=3D ISC_R_SUCCESS);
+ }
rpz_clean(&zone, &db, &node, NULL);
if (rpz_st->m.rdataset !=3D NULL) {
- if (rdataset !=3D NULL)
- query_putrdataset(client, &rdataset);
+ query_putrdataset(client, &rdataset);
rdataset =3D rpz_st->m.rdataset;
rpz_st->m.rdataset =3D NULL;
} else if (rdataset !=3D NULL &&
@@ -5305,10 +5559,11 @@
rpz_st->m.node =3D NULL;
db =3D rpz_st->m.db;
rpz_st->m.db =3D NULL;
+ version =3D rpz_st->m.version;
+ rpz_st->m.version =3D NULL;
zone =3D rpz_st->m.zone;
rpz_st->m.zone =3D NULL;
=20
- result =3D rpz_st->m.result;
switch (rpz_st->m.policy) {
case DNS_RPZ_POLICY_NXDOMAIN:
result =3D DNS_R_NXDOMAIN;
@@ -5317,27 +5572,39 @@
result =3D DNS_R_NXRRSET;
break;
case DNS_RPZ_POLICY_RECORD:
+ result =3D rpz_st->m.result;
if (type =3D=3D dns_rdatatype_any &&
result !=3D DNS_R_CNAME &&
dns_rdataset_isassociated(rdataset))
dns_rdataset_disassociate(rdataset);
break;
- case DNS_RPZ_POLICY_CNAME:
- result =3D dns_name_copy(&rpz_st->m.rpz->cname,
- fname, NULL);
+ case DNS_RPZ_POLICY_WILDCNAME:
+ result =3D dns_rdataset_first(rdataset);
RUNTIME_CHECK(result =3D=3D ISC_R_SUCCESS);
- query_keepname(client, fname, dbuf);
- result =3D query_add_cname(client,
- client->query.qname,
- fname,
- dns_trust_authanswer,
- rpz_st->m.ttl);
+ dns_rdataset_current(rdataset, &rdata);
+ result =3D dns_rdata_tostruct(&rdata, &cname,
+ NULL);
+ RUNTIME_CHECK(result =3D=3D ISC_R_SUCCESS);
+ dns_rdata_reset(&rdata);
+ result =3D rpz_add_cname(client, rpz_st,
+ &cname.cname,
+ fname, dbuf);
if (result !=3D ISC_R_SUCCESS)
goto cleanup;
- ns_client_qnamereplace(client, fname);
fname =3D NULL;
- client->attributes &=3D ~NS_CLIENTATTR_WANTDNSSEC;
- rpz_log(client);
+ want_restart =3D ISC_TRUE;
+ goto cleanup;
+ case DNS_RPZ_POLICY_CNAME:
+ /*
+ * Add overridding CNAME from a named.conf
+ * response-policy statement
+ */
+ result =3D rpz_add_cname(client, rpz_st,
+ &rpz_st->m.rpz->cname,
+ fname, dbuf);
+ if (result !=3D ISC_R_SUCCESS)
+ goto cleanup;
+ fname =3D NULL;
want_restart =3D ISC_TRUE;
goto cleanup;
default:
@@ -5349,11 +5616,10 @@
* response policy zone cannot verify.
*/
client->attributes &=3D ~NS_CLIENTATTR_WANTDNSSEC;
- if (sigrdataset !=3D NULL &&
- dns_rdataset_isassociated(sigrdataset))
- dns_rdataset_disassociate(sigrdataset);
+ query_putrdataset(client, &sigrdataset);
is_zone =3D ISC_TRUE;
- rpz_log(client);
+ rpz_log_rewrite(client, "", rpz_st->m.policy,
+ rpz_st->m.type, rpz_st->qname);
}
}
=20
@@ -5668,7 +5934,7 @@
=20
case DNS_R_EMPTYNAME:
case DNS_R_NXRRSET:
- nxrrset:
+ iszone_nxrrset:
INSIST(is_zone);
=20
#ifdef dns64_bis_return_excluded_addresses
@@ -5686,6 +5952,8 @@
query_putrdataset(client, &sigrdataset);
rdataset =3D client->query.dns64_aaaa;
sigrdataset =3D client->query.dns64_sigaaaa;
+ client->query.dns64_aaaa =3D NULL;
+ client->query.dns64_sigaaaa =3D NULL;
if (fname =3D=3D NULL) {
dbuf =3D query_getnamebuf(client);
if (dbuf =3D=3D NULL) {
@@ -5699,8 +5967,6 @@
}
}
dns_name_copy(client->query.qname, fname, NULL);
- client->query.dns64_aaaa =3D NULL;
- client->query.dns64_sigaaaa =3D NULL;
dns64 =3D ISC_FALSE;
#ifdef dns64_bis_return_excluded_addresses
/*
@@ -5735,6 +6001,7 @@
/*
* Look for a NSEC3 record if we don't have a NSEC record.
*/
+ nxrrset_rrsig:
if (!dns_rdataset_isassociated(rdataset) &&
WANTDNSSEC(client)) {
if ((fname->attributes & DNS_NAMEATTR_WILDCARD) =3D=3D 0) {
@@ -5860,6 +6127,7 @@
*/
query_releasename(client, &fname);
}
+
/*
* Add SOA. If the query was for a SOA record force the
* ttl to zero so that it is possible for clients to find
@@ -5936,6 +6204,8 @@
query_putrdataset(client, &sigrdataset);
rdataset =3D client->query.dns64_aaaa;
sigrdataset =3D client->query.dns64_sigaaaa;
+ client->query.dns64_aaaa =3D NULL;
+ client->query.dns64_sigaaaa =3D NULL;
if (fname =3D=3D NULL) {
dbuf =3D query_getnamebuf(client);
if (dbuf =3D=3D NULL) {
@@ -5949,8 +6219,6 @@
}
}
dns_name_copy(client->query.qname, fname, NULL);
- client->query.dns64_aaaa =3D NULL;
- client->query.dns64_sigaaaa =3D NULL;
dns64 =3D ISC_FALSE;
#ifdef dns64_bis_return_excluded_addresses
if (dns64_excluded)
@@ -6201,9 +6469,21 @@
need_wildcardproof =3D ISC_TRUE;
}
=20
+#ifdef ALLOW_FILTER_AAAA_ON_V4
+ if (client->view->v4_aaaa !=3D dns_v4_aaaa_ok &&
+ is_v4_client(client) &&
+ ns_client_checkaclsilent(client, NULL,
+ client->view->v4_aaaa_acl,
+ ISC_TRUE) =3D=3D ISC_R_SUCCESS)
+ client->filter_aaaa =3D client->view->v4_aaaa;
+ else
+ client->filter_aaaa =3D dns_v4_aaaa_ok;
+
+#endif
+
if (type =3D=3D dns_rdatatype_any) {
#ifdef ALLOW_FILTER_AAAA_ON_V4
- isc_boolean_t have_aaaa, have_a, have_sig, filter_aaaa;
+ isc_boolean_t have_aaaa, have_a, have_sig;
=20
/*
* The filter-aaaa-on-v4 option should
@@ -6215,14 +6495,6 @@
have_aaaa =3D ISC_FALSE;
have_a =3D !authoritative;
have_sig =3D ISC_FALSE;
- if (client->view->v4_aaaa !=3D dns_v4_aaaa_ok &&
- is_v4_client(client) &&
- ns_client_checkaclsilent(client, NULL,
- client->view->v4_aaaa_acl,
- ISC_TRUE) =3D=3D ISC_R_SUCCESS)
- filter_aaaa =3D ISC_TRUE;
- else
- filter_aaaa =3D ISC_FALSE;
#endif
/*
* XXXRTH Need to handle zonecuts with special case
@@ -6237,53 +6509,6 @@
}
=20
/*
- * Check all A and AAAA records in all response policy
- * IP address zones
- */
- rpz_st =3D client->query.rpz_st;
- if (rpz_st !=3D NULL &&
- (rpz_st->state & DNS_RPZ_DONE_QNAME) !=3D 0 &&
- (rpz_st->state & DNS_RPZ_REWRITTEN) =3D=3D 0 &&
- RECURSIONOK(client) && !RECURSING(client) &&
- (rpz_st->state & DNS_RPZ_HAVE_IP) !=3D 0) {
- for (result =3D dns_rdatasetiter_first(rdsiter);
- result =3D=3D ISC_R_SUCCESS;
- result =3D dns_rdatasetiter_next(rdsiter)) {
- dns_rdatasetiter_current(rdsiter, rdataset);
- if (rdataset->type =3D=3D dns_rdatatype_a ||
- rdataset->type =3D=3D dns_rdatatype_aaaa)
- result =3D rpz_rewrite_ip(client,
- rdataset,
- DNS_RPZ_TYPE_IP);
- dns_rdataset_disassociate(rdataset);
- if (result !=3D ISC_R_SUCCESS)
- break;
- }
- if (result !=3D ISC_R_NOMORE) {
- dns_rdatasetiter_destroy(&rdsiter);
- QUERY_ERROR(DNS_R_SERVFAIL);
- goto cleanup;
- }
- switch (rpz_st->m.policy) {
- case DNS_RPZ_POLICY_MISS:
- break;
- case DNS_RPZ_POLICY_NO_OP:
- rpz_log(client);
- rpz_st->state |=3D DNS_RPZ_REWRITTEN;
- break;
- case DNS_RPZ_POLICY_NXDOMAIN:
- case DNS_RPZ_POLICY_NODATA:
- case DNS_RPZ_POLICY_RECORD:
- case DNS_RPZ_POLICY_CNAME:
- dns_rdatasetiter_destroy(&rdsiter);
- rpz_st->state |=3D DNS_RPZ_REWRITTEN;
- goto finish_rewrite;
- default:
- INSIST(0);
- }
- }
-
- /*
* Calling query_addrrset() with a non-NULL dbuf is going
* to either keep or release the name. We don't want it to
* release fname, since we may have to call query_addrrset()
@@ -6304,7 +6529,7 @@
* Notice the presence of A and AAAAs so
* that AAAAs can be hidden from IPv4 clients.
*/
- if (filter_aaaa) {
+ if (client->filter_aaaa !=3D dns_v4_aaaa_ok) {
if (rdataset->type =3D=3D dns_rdatatype_aaaa)
have_aaaa =3D ISC_TRUE;
else if (rdataset->type =3D=3D dns_rdatatype_a)
@@ -6361,76 +6586,52 @@
* Filter AAAAs if there is an A and there is no signature
* or we are supposed to break DNSSEC.
*/
- if (filter_aaaa && have_aaaa && have_a &&
- (!have_sig || !WANTDNSSEC(client) ||
- client->view->v4_aaaa =3D=3D dns_v4_aaaa_break_dnssec))
+ if (client->filter_aaaa =3D=3D dns_v4_aaaa_break_dnssec)
client->attributes |=3D NS_CLIENTATTR_FILTER_AAAA;
+ else if (client->filter_aaaa !=3D dns_v4_aaaa_ok &&
+ have_aaaa && have_a &&
+ (!have_sig || !WANTDNSSEC(client)))
+ client->attributes |=3D NS_CLIENTATTR_FILTER_AAAA;
#endif
if (fname !=3D NULL)
dns_message_puttempname(client->message, &fname);
=20
- if (n =3D=3D 0 && is_zone) {
+ if (n =3D=3D 0) {
/*
- * We didn't match any rdatasets.
+ * No matching rdatasets found in cache. If we were
+ * searching for RRSIG/SIG, that's probably okay;
+ * otherwise this is an error condition.
*/
if ((qtype =3D=3D dns_rdatatype_rrsig ||
qtype =3D=3D dns_rdatatype_sig) &&
result =3D=3D ISC_R_NOMORE) {
- /*
- * XXXRTH If this is a secure zone and we
- * didn't find any SIGs, we should generate
- * an error unless we were searching for
- * glue. Ugh.
- */
if (!is_zone) {
- /*
- * Note: this is dead code because
- * is_zone is always true due to the
- * condition above. But naive
- * recursion would cause infinite
- * attempts of recursion because
- * the answer to (RR)SIG queries
- * won't be cached. Until we figure
- * out what we should do and implement
- * it we intentionally keep this code
- * dead.
- */
authoritative =3D ISC_FALSE;
dns_rdatasetiter_destroy(&rdsiter);
- if (RECURSIONOK(client)) {
- result =3D query_recurse(client,
- qtype,
- client->query.qname,
- NULL, NULL,
- resuming);
- if (result =3D=3D ISC_R_SUCCESS)
- client->query.attributes |=3D
- NS_QUERYATTR_RECURSING;
- else
- RECURSE_ERROR(result);
- }
+ client->attributes &=3D ~NS_CLIENTATTR_RA;
goto addauth;
}
- /*
- * We were searching for SIG records in
- * a nonsecure zone. Send a "no error,
- * no data" response.
- */
- /*
- * Add SOA.
- */
- result =3D query_addsoa(client, db, version,
- ISC_UINT32_MAX,
- ISC_FALSE);
- if (result =3D=3D ISC_R_SUCCESS)
- result =3D ISC_R_NOMORE;
- } else {
- /*
- * Something went wrong.
- */
+
+ if (dns_db_issecure(db)) {
+ char namebuf[DNS_NAME_FORMATSIZE];
+ dns_name_format(client->query.qname,
+ namebuf,
+ sizeof(namebuf));
+ ns_client_log(client,
+ DNS_LOGCATEGORY_DNSSEC,
+ NS_LOGMODULE_QUERY,
+ ISC_LOG_WARNING,
+ "missing signature "
+ "for %s", namebuf);
+ }
+
+ dns_rdatasetiter_destroy(&rdsiter);
+ fname =3D query_newname(client, dbuf, &b);
+ goto nxrrset_rrsig;
+ } else
result =3D DNS_R_SERVFAIL;
- }
}
+
dns_rdatasetiter_destroy(&rdsiter);
if (result !=3D ISC_R_NOMORE) {
QUERY_ERROR(DNS_R_SERVFAIL);
@@ -6442,48 +6643,6 @@
* we know the answer.
*/
=20
- /*
- * Check all A and AAAA records in all response policy
- * IP address zones
- */
- rpz_st =3D client->query.rpz_st;
- if (rpz_st !=3D NULL &&
- (rpz_st->state & DNS_RPZ_DONE_QNAME) !=3D 0 &&
- (rpz_st->state & DNS_RPZ_REWRITTEN) =3D=3D 0 &&
- RECURSIONOK(client) && !RECURSING(client) &&
- (rpz_st->state & DNS_RPZ_HAVE_IP) !=3D 0 &&
- (qtype =3D=3D dns_rdatatype_aaaa || qtype =3D=3D dns_rdatatype_a)) {
- result =3D rpz_rewrite_ip(client, rdataset,
- DNS_RPZ_TYPE_IP);
- if (result !=3D ISC_R_SUCCESS) {
- QUERY_ERROR(DNS_R_SERVFAIL);
- goto cleanup;
- }
- /*
- * After a hit in the radix tree for the policy domain,
- * either stop trying to rewrite (DNS_RPZ_POLICY_NO_OP)
- * or restart to ask the ordinary database of the
- * policy zone for the DNS record corresponding to the
- * record in the radix tree.
- */
- switch (rpz_st->m.policy) {
- case DNS_RPZ_POLICY_MISS:
- break;
- case DNS_RPZ_POLICY_NO_OP:
- rpz_log(client);
- rpz_st->state |=3D DNS_RPZ_REWRITTEN;
- break;
- case DNS_RPZ_POLICY_NXDOMAIN:
- case DNS_RPZ_POLICY_NODATA:
- case DNS_RPZ_POLICY_RECORD:
- case DNS_RPZ_POLICY_CNAME:
- rpz_st->state |=3D DNS_RPZ_REWRITTEN;
- goto finish_rewrite;
- default:
- INSIST(0);
- }
- }
-
#ifdef ALLOW_FILTER_AAAA_ON_V4
/*
* Optionally hide AAAAs from IPv4 clients if there is an A.
@@ -6493,15 +6652,11 @@
* so fundamentally wrong, unavoidably inaccurate, and
* unneeded that it is best to keep it as short as possible.
*/
- if (client->view->v4_aaaa !=3D dns_v4_aaaa_ok &&
- is_v4_client(client) &&
- ns_client_checkaclsilent(client, NULL,
- client->view->v4_aaaa_acl,
- ISC_TRUE) =3D=3D ISC_R_SUCCESS &&
- (!WANTDNSSEC(client) ||
- sigrdataset =3D=3D NULL ||
- !dns_rdataset_isassociated(sigrdataset) ||
- client->view->v4_aaaa =3D=3D dns_v4_aaaa_break_dnssec)) {
+ if (client->filter_aaaa =3D=3D dns_v4_aaaa_break_dnssec ||
+ (client->filter_aaaa =3D=3D dns_v4_aaaa_filter &&
+ (!WANTDNSSEC(client) || sigrdataset =3D=3D NULL ||
+ !dns_rdataset_isassociated(sigrdataset))))
+ {
if (qtype =3D=3D dns_rdatatype_aaaa) {
trdataset =3D query_newrdataset(client);
result =3D dns_db_findrdataset(db, node, version,
@@ -6633,7 +6788,7 @@
}
#endif
if (is_zone)
- goto nxrrset;
+ goto iszone_nxrrset;
else
goto ncache_nxrrset;
} else if (result !=3D ISC_R_SUCCESS) {
@@ -6691,9 +6846,11 @@
* General cleanup.
*/
rpz_st =3D client->query.rpz_st;
- if (rpz_st !=3D NULL && (rpz_st->state & DNS_RPZ_RECURSING) =3D=3D 0)
+ if (rpz_st !=3D NULL && (rpz_st->state & DNS_RPZ_RECURSING) =3D=3D 0) {
rpz_clean(&rpz_st->m.zone, &rpz_st->m.db, &rpz_st->m.node,
&rpz_st->m.rdataset);
+ rpz_st->state &=3D ~DNS_RPZ_DONE_QNAME;
+ }
if (rdataset !=3D NULL)
query_putrdataset(client, &rdataset);
if (sigrdataset !=3D NULL)
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/server.c
--- a/head/contrib/bind9/bin/named/server.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/server.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: server.c,v 1.599.8.12 2011-08-02 04:58:45 each Exp $ */
+/* $Id: server.c,v 1.599.8.19 2012/02/22 00:33:32 each Exp $ */
=20
/*! \file */
=20
@@ -2596,14 +2596,19 @@
if (result =3D=3D ISC_R_SUCCESS) {
/* If set to "auto", use the version from the defaults */
const cfg_obj_t *dlvobj;
+ const char *dom;
dlvobj =3D cfg_listelt_value(cfg_list_first(obj));
- if (!strcmp(cfg_obj_asstring(cfg_tuple_get(dlvobj, "domain")),
- "auto") &&
- cfg_obj_isvoid(cfg_tuple_get(dlvobj, "trust-anchor"))) {
- auto_dlv =3D ISC_TRUE;
- obj =3D NULL;
- result =3D cfg_map_get(ns_g_defaults,
- "dnssec-lookaside", &obj);
+ dom =3D cfg_obj_asstring(cfg_tuple_get(dlvobj, "domain"));
+ if (cfg_obj_isvoid(cfg_tuple_get(dlvobj, "trust-anchor"))) {
+ /* If "no", skip; if "auto", use global default */
+ if (!strcasecmp(dom, "no"))
+ result =3D ISC_R_NOTFOUND;
+ else if (!strcasecmp(dom, "auto")) {
+ auto_dlv =3D ISC_TRUE;
+ obj =3D NULL;
+ result =3D cfg_map_get(ns_g_defaults,
+ "dnssec-lookaside", &obj);
+ }
}
}
=20
@@ -2704,7 +2709,7 @@
rfc1918 =3D ISC_FALSE;
empty_zones_enable =3D ISC_FALSE;
}
- if (empty_zones_enable) {
+ if (empty_zones_enable && !lwresd_g_useresolvconf) {
const char *empty;
int empty_zone =3D 0;
dns_fixedname_t fixed;
@@ -2842,7 +2847,8 @@
CHECK(dns_zone_create(&zone, mctx));
CHECK(dns_zone_setorigin(zone, name));
dns_zone_setview(zone, view);
- CHECK(dns_zonemgr_managezone(ns_g_server->zonemgr, zone));
+ CHECK(dns_zonemgr_managezone(ns_g_server->zonemgr,
+ zone));
dns_zone_setclass(zone, view->rdclass);
dns_zone_settype(zone, dns_zone_master);
dns_zone_setstats(zone, ns_g_server->zonestats);
@@ -3449,6 +3455,12 @@
*/
CHECK(dns_view_addzone(view, zone));
=20
+ /*
+ * Ensure that zone keys are reloaded on reconfig
+ */
+ if ((dns_zone_getkeyopts(zone) & DNS_ZONEKEY_MAINTAIN) !=3D 0)
+ dns_zone_rekey(zone, ISC_FALSE);
+
cleanup:
if (zone !=3D NULL)
dns_zone_detach(&zone);
@@ -3489,6 +3501,7 @@
dns_zone_attach(pview->managed_keys, &view->managed_keys);
dns_zone_setview(pview->managed_keys, view);
dns_view_detach(&pview);
+ dns_zone_synckeyzone(view->managed_keys);
return (ISC_R_SUCCESS);
}
=20
@@ -4278,15 +4291,12 @@
ns_cache_t *nsc;
struct cfg_context *nzctx;
int num_zones =3D 0;
+ isc_boolean_t exclusive =3D ISC_FALSE;
=20
ISC_LIST_INIT(viewlist);
ISC_LIST_INIT(builtin_viewlist);
ISC_LIST_INIT(cachelist);
=20
- /* Ensure exclusive access to configuration data. */
- result =3D isc_task_beginexclusive(server->task);
- RUNTIME_CHECK(result =3D=3D ISC_R_SUCCESS);
-
/* Create the ACL configuration context */
if (ns_g_aclconfctx !=3D NULL)
cfg_aclconfctx_detach(&ns_g_aclconfctx);
@@ -4382,6 +4392,13 @@
CHECK(result);
}
=20
+ /* Ensure exclusive access to configuration data. */
+ if (!exclusive) {
+ result =3D isc_task_beginexclusive(server->task);
+ RUNTIME_CHECK(result =3D=3D ISC_R_SUCCESS);
+ exclusive =3D ISC_TRUE;
+ }
+
/*
* Set process limits, which (usually) needs to be done as root.
*/
@@ -5149,7 +5166,8 @@
adjust_interfaces(server, ns_g_mctx);
=20
/* Relinquish exclusive access to configuration data. */
- isc_task_endexclusive(server->task);
+ if (exclusive)
+ isc_task_endexclusive(server->task);
=20
isc_log_write(ns_g_lctx, NS_LOGCATEGORY_GENERAL, NS_LOGMODULE_SERVER,
ISC_LOG_DEBUG(1), "load_configuration: %s",
@@ -7352,13 +7370,14 @@
CHECK(isc_stdio_open(view->new_zone_file, "a", &fp));
=20
/* Mark view unfrozen so that zone can be added */
+ isc_task_beginexclusive(server->task);
dns_view_thaw(view);
result =3D configure_zone(cfg->config, parms, vconfig,
server->mctx, view, cfg->actx, ISC_FALSE);
dns_view_freeze(view);
- if (result !=3D ISC_R_SUCCESS) {
+ isc_task_endexclusive(server->task);
+ if (result !=3D ISC_R_SUCCESS)
goto cleanup;
- }
=20
/* Is it there yet? */
CHECK(dns_zt_find(view->zonetable, &dnsname, 0, NULL, &zone));
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/sortlist.c
--- a/head/contrib/bind9/bin/named/sortlist.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/sortlist.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sortlist.c,v 1.17 2007-09-14 01:46:05 marka Exp $ */
+/* $Id: sortlist.c,v 1.17 2007/09/14 01:46:05 marka Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/statschan=
nel.c
--- a/head/contrib/bind9/bin/named/statschannel.c Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/bin/named/statschannel.c Tue Apr 17 11:51:51 2012 =
+0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: statschannel.c,v 1.26.150.2 2011-03-12 04:59:14 tbox Exp $ */
+/* $Id: statschannel.c,v 1.26.150.2 2011/03/12 04:59:14 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/tkeyconf.c
--- a/head/contrib/bind9/bin/named/tkeyconf.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/tkeyconf.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: tkeyconf.c,v 1.33 2010-12-20 23:47:20 tbox Exp $ */
+/* $Id: tkeyconf.c,v 1.33 2010/12/20 23:47:20 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/tsigconf.c
--- a/head/contrib/bind9/bin/named/tsigconf.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/tsigconf.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: tsigconf.c,v 1.35 2011-01-11 23:47:12 tbox Exp $ */
+/* $Id: tsigconf.c,v 1.35 2011/01/11 23:47:12 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/unix/Make=
file.in
--- a/head/contrib/bind9/bin/named/unix/Makefile.in Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/bin/named/unix/Makefile.in Tue Apr 17 11:51:51 201=
2 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.13.244.2 2011-03-10 23:47:26 tbox Exp $
+# $Id: Makefile.in,v 1.13.244.2 2011/03/10 23:47:26 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/unix/dlz_=
dlopen_driver.c
--- a/head/contrib/bind9/bin/named/unix/dlz_dlopen_driver.c Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/unix/dlz_dlopen_driver.c Tue Apr 17 11:5=
1:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2011, 2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dlz_dlopen_driver.c,v 1.1.4.4 2011-03-17 09:41:06 fdupont Exp $ */
+/* $Id: dlz_dlopen_driver.c,v 1.1.4.6 2012/02/22 23:46:35 tbox Exp $ */
=20
#include <config.h>
=20
@@ -313,6 +313,8 @@
dl_load_symbol(cd, "dlz_subrdataset", ISC_FALSE);
cd->dlz_delrdataset =3D (dlz_dlopen_delrdataset_t *)
dl_load_symbol(cd, "dlz_delrdataset", ISC_FALSE);
+ cd->dlz_destroy =3D (dlz_dlopen_destroy_t *)
+ dl_load_symbol(cd, "dlz_destroy", ISC_FALSE);
=20
/* Check the version of the API is the same */
cd->version =3D cd->dlz_version(&cd->flags);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/unix/incl=
ude/named/os.h
--- a/head/contrib/bind9/bin/named/unix/include/named/os.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/unix/include/named/os.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: os.h,v 1.31 2009-08-05 23:47:43 tbox Exp $ */
+/* $Id: os.h,v 1.31 2009/08/05 23:47:43 tbox Exp $ */
=20
#ifndef NS_OS_H
#define NS_OS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/unix/os.c
--- a/head/contrib/bind9/bin/named/unix/os.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/unix/os.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: os.c,v 1.104.38.3 2011-03-02 00:04:01 marka Exp $ */
+/* $Id: os.c,v 1.104.38.3 2011/03/02 00:04:01 marka Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/update.c
--- a/head/contrib/bind9/bin/named/update.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/update.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: update.c,v 1.186.16.5 2011-03-25 23:53:52 each Exp $ */
+/* $Id: update.c,v 1.186.16.7 2011/11/03 02:55:34 each Exp $ */
=20
#include <config.h>
=20
@@ -1506,8 +1506,6 @@
* Incremental updating of NSECs and RRSIGs.
*/
=20
-#define MAXZONEKEYS 32 /*%< Maximum number of zone keys supported. */
-
/*%
* We abuse the dns_diff_t type to represent a set of domain names
* affected by the update.
@@ -2131,7 +2129,7 @@
dns_diff_t nsec_diff;
dns_diff_t nsec_mindiff;
isc_boolean_t flag, build_nsec, build_nsec3;
- dst_key_t *zone_keys[MAXZONEKEYS];
+ dst_key_t *zone_keys[DNS_MAXZONEKEYS];
unsigned int nkeys =3D 0;
unsigned int i;
isc_stdtime_t now, inception, expire;
@@ -2154,7 +2152,7 @@
dns_diff_init(client->mctx, &nsec_mindiff);
=20
result =3D find_zone_keys(zone, db, newver, client->mctx,
- MAXZONEKEYS, zone_keys, &nkeys);
+ DNS_MAXZONEKEYS, zone_keys, &nkeys);
if (result !=3D ISC_R_SUCCESS) {
update_log(client, zone, ISC_LOG_ERROR,
"could not get zone keys for secure dynamic update");
@@ -4473,6 +4471,12 @@
isc_task_t *zonetask =3D NULL;
ns_client_t *evclient;
=20
+ /*
+ * This may take some time so replace this client.
+ */
+ if (!client->mortal && (client->attributes & NS_CLIENTATTR_TCP) =3D=3D 0)
+ CHECK(ns_client_replace(client));
+
event =3D (update_event_t *)
isc_event_allocate(client->mctx, client, DNS_EVENT_UPDATE,
forward_action, NULL, sizeof(*event));
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/xfrout.c
--- a/head/contrib/bind9/bin/named/xfrout.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/xfrout.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: xfrout.c,v 1.139.16.3 2011-07-28 04:30:54 marka Exp $ */
+/* $Id: xfrout.c,v 1.139.16.4 2011/12/01 01:00:50 marka Exp $ */
=20
#include <config.h>
=20
@@ -1287,6 +1287,13 @@
isc_buffer_free(&xfr->lasttsig);
=20
/*
+ * Account for reserved space.
+ */
+ if (xfr->tsigkey !=3D NULL)
+ INSIST(msg->reserved !=3D 0U);
+ isc_buffer_add(&xfr->buf, msg->reserved);
+
+ /*
* Include a question section in the first message only.
* BIND 8.2.1 will not recognize an IXFR if it does not
* have a question section.
@@ -1324,9 +1331,13 @@
ISC_LIST_APPEND(qname->list, qrdataset, link);
=20
dns_message_addname(msg, qname, DNS_SECTION_QUESTION);
+ } else {
+ /*
+ * Reserve space for the 12-byte message header
+ */
+ isc_buffer_add(&xfr->buf, 12);
+ msg->tcp_continuation =3D 1;
}
- else
- msg->tcp_continuation =3D 1;
}
=20
/*
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/named/zoneconf.c
--- a/head/contrib/bind9/bin/named/zoneconf.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/named/zoneconf.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: zoneconf.c,v 1.170.14.4 2011-05-23 20:56:10 each Exp $ */
+/* $Id: zoneconf.c,v 1.170.14.7 2012/01/31 23:46:39 tbox Exp $ */
=20
/*% */
=20
@@ -1329,8 +1329,11 @@
&count));
result =3D dns_zone_setmasterswithkeys(zone, addrs,
keynames, count);
- ns_config_putipandkeylist(mctx, &addrs, &keynames,
- count);
+ if (count !=3D 0)
+ ns_config_putipandkeylist(mctx, &addrs,
+ &keynames, count);
+ else
+ INSIST(addrs =3D=3D NULL && keynames =3D=3D NULL);
} else
result =3D dns_zone_setmasters(zone, NULL, 0);
RETERR(result);
@@ -1462,15 +1465,21 @@
=20
zoptions =3D cfg_tuple_get(zconfig, "options");
=20
- if (zonetype_fromconfig(zoptions) !=3D dns_zone_gettype(zone))
+ if (zonetype_fromconfig(zoptions) !=3D dns_zone_gettype(zone)) {
+ dns_zone_log(zone, ISC_LOG_DEBUG(1),
+ "not reusable: type mismatch");
return (ISC_FALSE);
+ }
=20
/*
* We always reconfigure a static-stub zone for simplicity, assuming
* the amount of data to be loaded is small.
*/
- if (zonetype_fromconfig(zoptions) =3D=3D dns_zone_staticstub)
+ if (zonetype_fromconfig(zoptions) =3D=3D dns_zone_staticstub) {
+ dns_zone_log(zone, ISC_LOG_DEBUG(1),
+ "not reusable: staticstub");
return (ISC_FALSE);
+ }
=20
obj =3D NULL;
(void)cfg_map_get(zoptions, "file", &obj);
@@ -1481,8 +1490,11 @@
zfilename =3D dns_zone_getfile(zone);
if (!((cfilename =3D=3D NULL && zfilename =3D=3D NULL) ||
(cfilename !=3D NULL && zfilename !=3D NULL &&
- strcmp(cfilename, zfilename) =3D=3D 0)))
- return (ISC_FALSE);
+ strcmp(cfilename, zfilename) =3D=3D 0))) {
+ dns_zone_log(zone, ISC_LOG_DEBUG(1),
+ "not reusable: filename mismatch");
+ return (ISC_FALSE);
+ }
=20
return (ISC_TRUE);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/nsupdate/Makefi=
le.in
--- a/head/contrib/bind9/bin/nsupdate/Makefile.in Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/bin/nsupdate/Makefile.in Tue Apr 17 11:51:51 2012 =
+0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.36 2009-12-05 23:31:40 each Exp $
+# $Id: Makefile.in,v 1.36 2009/12/05 23:31:40 each Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/nsupdate/nsupda=
te.1
--- a/head/contrib/bind9/bin/nsupdate/nsupdate.1 Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/bin/nsupdate/nsupdate.1 Tue Apr 17 11:51:51 2012 +=
0300
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: nsupdate.1,v 1.13 2010-07-10 01:14:19 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/nsupdate/nsupda=
te.c
--- a/head/contrib/bind9/bin/nsupdate/nsupdate.c Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/bin/nsupdate/nsupdate.c Tue Apr 17 11:51:51 2012 +=
0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: nsupdate.c,v 1.193.12.3 2011-05-23 22:12:14 each Exp $ */
+/* $Id: nsupdate.c,v 1.193.12.4 2011/11/03 04:30:09 each Exp $ */
=20
/*! \file */
=20
@@ -2280,6 +2280,7 @@
dns_message_destroy(&soaquery);
ddebug("Out of recvsoa");
done_update();
+ seenerror =3D ISC_TRUE;
return;
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/nsupdate/nsupda=
te.docbook
--- a/head/contrib/bind9/bin/nsupdate/nsupdate.docbook Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/bin/nsupdate/nsupdate.docbook Tue Apr 17 11:51:51 =
2012 +0300
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: nsupdate.docbook,v 1.44 2010-07-09 23:46:51 tbox Exp $ -->
+<!-- $Id: nsupdate.docbook,v 1.44 2010/07/09 23:46:51 tbox Exp $ -->
<refentry id=3D"man.nsupdate">
<refentryinfo>
<date>Aug 25, 2009</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/nsupdate/nsupda=
te.html
--- a/head/contrib/bind9/bin/nsupdate/nsupdate.html Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/bin/nsupdate/nsupdate.html Tue Apr 17 11:51:51 201=
2 +0300
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: nsupdate.html,v 1.50 2010-07-10 01:14:19 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -32,7 +32,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">nsupdate</code> [<c=
ode class=3D"option">-d</code>] [<code class=3D"option">-D</code>] [[<code =
class=3D"option">-g</code>] | [<code class=3D"option">-o</code>] | [<code=
class=3D"option">-l</code>] | [<code class=3D"option">-y <em class=3D"rep=
laceable"><code>[<span class=3D"optional">hmac:</span>]keyname:secret</code=
></em></code>] | [<code class=3D"option">-k <em class=3D"replaceable"><cod=
e>keyfile</code></em></code>]] [<code class=3D"option">-t <em class=3D"repl=
aceable"><code>timeout</code></em></code>] [<code class=3D"option">-u <em c=
lass=3D"replaceable"><code>udptimeout</code></em></code>] [<code class=3D"o=
ption">-r <em class=3D"replaceable"><code>udpretries</code></em></code>] [<=
code class=3D"option">-R <em class=3D"replaceable"><code>randomdev</code></=
em></code>] [<code class=3D"option">-v</code>] [filename]</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543457"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543459"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">nsupdate</strong></span>
is used to submit Dynamic DNS Update requests as defined in RFC 2136
to a name server.
@@ -192,7 +192,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543788"></a><h2>INPUT FORMAT</h2>
+<a name=3D"id2543790"></a><h2>INPUT FORMAT</h2>
<p><span><strong class=3D"command">nsupdate</strong></span>
reads input from
<em class=3D"parameter"><code>filename</code></em>
@@ -480,7 +480,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544700"></a><h2>EXAMPLES</h2>
+<a name=3D"id2544702"></a><h2>EXAMPLES</h2>
<p>
The examples below show how
<span><strong class=3D"command">nsupdate</strong></span>
@@ -534,7 +534,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544744"></a><h2>FILES</h2>
+<a name=3D"id2544746"></a><h2>FILES</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term"><code class=3D"constant">/etc/resolv.conf</code><=
/span></dt>
<dd><p>
@@ -557,7 +557,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544827"></a><h2>SEE ALSO</h2>
+<a name=3D"id2544829"></a><h2>SEE ALSO</h2>
<p>
<em class=3D"citetitle">RFC 2136</em>,
<em class=3D"citetitle">RFC 3007</em>,
@@ -572,7 +572,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2542154"></a><h2>BUGS</h2>
+<a name=3D"id2542156"></a><h2>BUGS</h2>
<p>
The TSIG key is redundantly stored in two separate files.
This is a consequence of nsupdate using the DST library
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/rndc/Makefile.in
--- a/head/contrib/bind9/bin/rndc/Makefile.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/rndc/Makefile.in Tue Apr 17 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.49 2009-12-05 23:31:40 each Exp $
+# $Id: Makefile.in,v 1.49 2009/12/05 23:31:40 each Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/rndc/include/rn=
dc/os.h
--- a/head/contrib/bind9/bin/rndc/include/rndc/os.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/bin/rndc/include/rndc/os.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: os.h,v 1.12 2009-06-10 00:27:21 each Exp $ */
+/* $Id: os.h,v 1.12 2009/06/10 00:27:21 each Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/rndc/rndc.8
--- a/head/contrib/bind9/bin/rndc/rndc.8 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/rndc/rndc.8 Tue Apr 17 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: rndc.8,v 1.43 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/rndc/rndc.c
--- a/head/contrib/bind9/bin/rndc/rndc.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/rndc/rndc.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rndc.c,v 1.131.20.2 2011-02-28 01:19:59 tbox Exp $ */
+/* $Id: rndc.c,v 1.131.20.3 2011/11/03 22:06:31 each Exp $ */
=20
/*! \file */
=20
@@ -142,13 +142,17 @@
Flush the given name from the server's cache(s)\n\
status Display status of the server.\n\
recursing Dump the queries that are currently recursing (named.recursing=
)\n\
+ tsig-list List all currently active TSIG keys, including both statically=
\n\
+ configured and TKEY-negotiated keys.\n\
+ tsig-delete keyname [view] \n\
+ Delete a TKEY-negotiated TSIG key.\n\
validation newstate [view]\n\
Enable / disable DNSSEC validation.\n\
- *restart Restart the server.\n\
addzone [\"file\"] zone [class [view]] { zone-options }\n\
Add zone to given view. Requires new-zone-file option.\n\
delzone [\"file\"] zone [class [view]]\n\
Removes zone from given view. Requires new-zone-file option.\n\
+ *restart Restart the server.\n\
\n\
* =3D=3D not yet implemented\n\
Version: %s\n",
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/rndc/rndc.conf
--- a/head/contrib/bind9/bin/rndc/rndc.conf Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/rndc/rndc.conf Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rndc.conf,v 1.11 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: rndc.conf,v 1.11 2007/06/19 23:46:59 tbox Exp $ */
=20
/*
* Sample rndc configuration file.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/rndc/rndc.conf.5
--- a/head/contrib/bind9/bin/rndc/rndc.conf.5 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/rndc/rndc.conf.5 Tue Apr 17 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: rndc.conf.5,v 1.41 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/rndc/rndc.conf.=
docbook
--- a/head/contrib/bind9/bin/rndc/rndc.conf.docbook Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/bin/rndc/rndc.conf.docbook Tue Apr 17 11:51:51 201=
2 +0300
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: rndc.conf.docbook,v 1.17 2007-06-18 23:47:25 tbox Exp $ -->
+<!-- $Id: rndc.conf.docbook,v 1.17 2007/06/18 23:47:25 tbox Exp $ -->
<refentry id=3D"man.rndc.conf">
<refentryinfo>
<date>June 30, 2000</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/rndc/rndc.conf.=
html
--- a/head/contrib/bind9/bin/rndc/rndc.conf.html Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/bin/rndc/rndc.conf.html Tue Apr 17 11:51:51 2012 +=
0300
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: rndc.conf.html,v 1.32 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -32,7 +32,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">rndc.conf</code> </p=
></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543352"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543354"></a><h2>DESCRIPTION</h2>
<p><code class=3D"filename">rndc.conf</code> is the configuration file
for <span><strong class=3D"command">rndc</strong></span>, the BIND 9=
name server control
utility. This file has a similar structure and syntax to
@@ -117,7 +117,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543500"></a><h2>EXAMPLE</h2>
+<a name=3D"id2543502"></a><h2>EXAMPLE</h2>
<pre class=3D"programlisting">
options {
default-server localhost;
@@ -191,7 +191,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543592"></a><h2>NAME SERVER CONFIGURATION</h2>
+<a name=3D"id2543594"></a><h2>NAME SERVER CONFIGURATION</h2>
<p>
The name server must be configured to accept rndc connections and
to recognize the key specified in the <code class=3D"filename">rndc.=
conf</code>
@@ -201,7 +201,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543613"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543616"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">rndc</span>(=
8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">rndc-conf=
gen</span>(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">mmencode<=
/span>(1)</span>,
@@ -209,7 +209,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543652"></a><h2>AUTHOR</h2>
+<a name=3D"id2543654"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/rndc/rndc.docbo=
ok
--- a/head/contrib/bind9/bin/rndc/rndc.docbook Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/bin/rndc/rndc.docbook Tue Apr 17 11:51:51 2012 +03=
00
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: rndc.docbook,v 1.21 2007-12-14 20:39:14 marka Exp $ -->
+<!-- $Id: rndc.docbook,v 1.21 2007/12/14 20:39:14 marka Exp $ -->
<refentry id=3D"man.rndc">
<refentryinfo>
<date>June 30, 2000</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/rndc/rndc.html
--- a/head/contrib/bind9/bin/rndc/rndc.html Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/rndc/rndc.html Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: rndc.html,v 1.32 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -32,7 +32,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">rndc</code> [<code =
class=3D"option">-b <em class=3D"replaceable"><code>source-address</code></=
em></code>] [<code class=3D"option">-c <em class=3D"replaceable"><code>conf=
ig-file</code></em></code>] [<code class=3D"option">-k <em class=3D"replace=
able"><code>key-file</code></em></code>] [<code class=3D"option">-s <em cla=
ss=3D"replaceable"><code>server</code></em></code>] [<code class=3D"option"=
>-p <em class=3D"replaceable"><code>port</code></em></code>] [<code class=
=3D"option">-V</code>] [<code class=3D"option">-y <em class=3D"replaceable"=
><code>key_id</code></em></code>] {command}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543413"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543415"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">rndc</strong></span>
controls the operation of a name
server. It supersedes the <span><strong class=3D"command">ndc</stro=
ng></span> utility
@@ -61,7 +61,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543448"></a><h2>OPTIONS</h2>
+<a name=3D"id2543450"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-b <em class=3D"replaceable"><code>source-address=
</code></em></span></dt>
<dd><p>
@@ -133,7 +133,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543656"></a><h2>LIMITATIONS</h2>
+<a name=3D"id2543658"></a><h2>LIMITATIONS</h2>
<p><span><strong class=3D"command">rndc</strong></span>
does not yet support all the commands of
the BIND 8 <span><strong class=3D"command">ndc</strong></span> utili=
ty.
@@ -147,7 +147,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543683"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543685"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">rndc.conf</s=
pan>(5)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">rndc-conf=
gen</span>(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named</sp=
an>(8)</span>,
@@ -157,7 +157,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543738"></a><h2>AUTHOR</h2>
+<a name=3D"id2543740"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/rndc/util.c
--- a/head/contrib/bind9/bin/rndc/util.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/rndc/util.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: util.c,v 1.7 2007-06-19 23:46:59 tbox Exp $ */
+/* $Id: util.c,v 1.7 2007/06/19 23:46:59 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/rndc/util.h
--- a/head/contrib/bind9/bin/rndc/util.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/rndc/util.h Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: util.h,v 1.12 2009-09-29 23:48:03 tbox Exp $ */
+/* $Id: util.h,v 1.12 2009/09/29 23:48:03 tbox Exp $ */
=20
#ifndef RNDC_UTIL_H
#define RNDC_UTIL_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/Makefile.=
in
--- a/head/contrib/bind9/bin/tools/Makefile.in Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/bin/tools/Makefile.in Tue Apr 17 11:51:51 2012 +03=
00
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.13 2010-01-07 23:48:53 tbox Exp $
+# $Id: Makefile.in,v 1.13 2010/01/07 23:48:53 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/arpaname.1
--- a/head/contrib/bind9/bin/tools/arpaname.1 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/tools/arpaname.1 Tue Apr 17 11:51:51 2012 +0300
@@ -12,7 +12,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: arpaname.1,v 1.4 2010-05-19 01:14:14 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/arpaname.c
--- a/head/contrib/bind9/bin/tools/arpaname.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/tools/arpaname.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: arpaname.c,v 1.4 2009-10-27 03:05:33 marka Exp $ */
+/* $Id: arpaname.c,v 1.4 2009/10/27 03:05:33 marka Exp $ */
=20
#include "config.h"
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/arpaname.=
docbook
--- a/head/contrib/bind9/bin/tools/arpaname.docbook Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/bin/tools/arpaname.docbook Tue Apr 17 11:51:51 201=
2 +0300
@@ -17,7 +17,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: arpaname.docbook,v 1.1 2009-03-04 01:30:27 marka Exp $ -->
+<!-- $Id: arpaname.docbook,v 1.1 2009/03/04 01:30:27 marka Exp $ -->
<refentry id=3D"man.arpaname">
<refentryinfo>
<date>March 4, 2009</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/arpaname.=
html
--- a/head/contrib/bind9/bin/tools/arpaname.html Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/bin/tools/arpaname.html Tue Apr 17 11:51:51 2012 +=
0300
@@ -13,7 +13,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: arpaname.html,v 1.4 2010-05-19 01:14:14 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -31,20 +31,20 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">arpaname</code> {<e=
m class=3D"replaceable"><code>ipaddress </code></em>...}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543345"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543347"></a><h2>DESCRIPTION</h2>
<p>
<span><strong class=3D"command">arpaname</strong></span> translates =
IP addresses (IPv4 and
IPv6) to the corresponding IN-ADDR.ARPA or IP6.ARPA names.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543357"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543360"></a><h2>SEE ALSO</h2>
<p>
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543371"></a><h2>AUTHOR</h2>
+<a name=3D"id2543373"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/genrandom=
.8
--- a/head/contrib/bind9/bin/tools/genrandom.8 Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/bin/tools/genrandom.8 Tue Apr 17 11:51:51 2012 +03=
00
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2009-2011 Internet Systems Consortium, Inc. ("ISC")
+.\" Copyright (C) 2009-2012 Internet Systems Consortium, Inc. ("ISC")
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
.\" purpose with or without fee is hereby granted, provided that the above
@@ -12,7 +12,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: genrandom.8,v 1.8.124.1 2011-08-09 01:52:58 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -65,5 +65,5 @@
.PP
Internet Systems Consortium
.SH "COPYRIGHT"
-Copyright \(co 2009\-2011 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2009\-2012 Internet Systems Consortium, Inc. ("ISC")
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/genrandom=
.c
--- a/head/contrib/bind9/bin/tools/genrandom.c Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/bin/tools/genrandom.c Tue Apr 17 11:51:51 2012 +03=
00
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: genrandom.c,v 1.7 2010-05-17 23:51:04 tbox Exp $ */
+/* $Id: genrandom.c,v 1.7 2010/05/17 23:51:04 tbox Exp $ */
=20
/*! \file */
#include <config.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/genrandom=
.docbook
--- a/head/contrib/bind9/bin/tools/genrandom.docbook Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/bin/tools/genrandom.docbook Tue Apr 17 11:51:51 20=
12 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2009-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2009-2012 Internet Systems Consortium, Inc. ("ISC")
-
- Permission to use, copy, modify, and/or distribute this software for any
- purpose with or without fee is hereby granted, provided that the above
@@ -17,7 +17,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: genrandom.docbook,v 1.6.124.2 2011-08-08 23:45:44 tbox Exp $ -->
+<!-- $Id$ -->
<refentry id=3D"man.genrandom">
<refentryinfo>
<date>Feb 19, 2009</date>
@@ -39,6 +39,7 @@
<year>2009</year>
<year>2010</year>
<year>2011</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
</docinfo>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/genrandom=
.html
--- a/head/contrib/bind9/bin/tools/genrandom.html Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/bin/tools/genrandom.html Tue Apr 17 11:51:51 2012 =
+0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2009-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2009-2012 Internet Systems Consortium, Inc. ("ISC")
-=20
- Permission to use, copy, modify, and/or distribute this software for any
- purpose with or without fee is hereby granted, provided that the above
@@ -13,7 +13,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: genrandom.html,v 1.8.124.1 2011-08-09 01:52:58 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -31,7 +31,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">genrandom</code> [<=
code class=3D"option">-n <em class=3D"replaceable"><code>number</code></em>=
</code>] {<em class=3D"replaceable"><code>size</code></em>} {<em class=3D"r=
eplaceable"><code>filename</code></em>}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543366"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543370"></a><h2>DESCRIPTION</h2>
<p>
<span><strong class=3D"command">genrandom</strong></span>
generates a file or a set of files containing a specified quantity
@@ -40,7 +40,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543379"></a><h2>ARGUMENTS</h2>
+<a name=3D"id2543383"></a><h2>ARGUMENTS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-n <em class=3D"replaceable"><code>number</code><=
/em></span></dt>
<dd><p>
@@ -58,14 +58,14 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543440"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543444"></a><h2>SEE ALSO</h2>
<p>
<span class=3D"citerefentry"><span class=3D"refentrytitle">rand</spa=
n>(3)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">arc4rando=
m</span>(3)</span>
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543466"></a><h2>AUTHOR</h2>
+<a name=3D"id2543470"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/isc-hmac-=
fixup.8
--- a/head/contrib/bind9/bin/tools/isc-hmac-fixup.8 Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/bin/tools/isc-hmac-fixup.8 Tue Apr 17 11:51:51 201=
2 +0300
@@ -12,7 +12,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: isc-hmac-fixup.8,v 1.4 2010-05-19 01:14:14 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/isc-hmac-=
fixup.c
--- a/head/contrib/bind9/bin/tools/isc-hmac-fixup.c Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/bin/tools/isc-hmac-fixup.c Tue Apr 17 11:51:51 201=
2 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: isc-hmac-fixup.c,v 1.4 2010-03-10 02:17:52 marka Exp $ */
+/* $Id: isc-hmac-fixup.c,v 1.4 2010/03/10 02:17:52 marka Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/isc-hmac-=
fixup.docbook
--- a/head/contrib/bind9/bin/tools/isc-hmac-fixup.docbook Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/bin/tools/isc-hmac-fixup.docbook Tue Apr 17 11:51:=
51 2012 +0300
@@ -17,7 +17,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: isc-hmac-fixup.docbook,v 1.2 2010-01-07 21:52:11 each Exp $ -->
+<!-- $Id: isc-hmac-fixup.docbook,v 1.2 2010/01/07 21:52:11 each Exp $ -->
<refentry id=3D"man.isc-hmac-fixup">
<refentryinfo>
<date>January 5, 2010</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/isc-hmac-=
fixup.html
--- a/head/contrib/bind9/bin/tools/isc-hmac-fixup.html Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/bin/tools/isc-hmac-fixup.html Tue Apr 17 11:51:51 =
2012 +0300
@@ -13,7 +13,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: isc-hmac-fixup.html,v 1.4 2010-05-19 01:14:14 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -31,7 +31,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">isc-hmac-fixup</code=
> {<em class=3D"replaceable"><code>algorithm</code></em>} {<em class=3D"re=
placeable"><code>secret</code></em>}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543351"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543352"></a><h2>DESCRIPTION</h2>
<p>
Versions of BIND 9 up to and including BIND 9.6 had a bug causing
HMAC-SHA* TSIG keys which were longer than the digest length of the
@@ -57,7 +57,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543374"></a><h2>SECURITY CONSIDERATIONS</h2>
+<a name=3D"id2543376"></a><h2>SECURITY CONSIDERATIONS</h2>
<p>
Secrets that have been converted by <span><strong class=3D"command">=
isc-hmac-fixup</strong></span>
are shortened, but as this is how the HMAC protocol works in
@@ -68,14 +68,14 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543388"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543389"></a><h2>SEE ALSO</h2>
<p>
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
<em class=3D"citetitle">RFC 2104</em>.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543405"></a><h2>AUTHOR</h2>
+<a name=3D"id2543406"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/named-jou=
rnalprint.8
--- a/head/contrib/bind9/bin/tools/named-journalprint.8 Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/bin/tools/named-journalprint.8 Tue Apr 17 11:51:51=
2012 +0300
@@ -12,7 +12,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: named-journalprint.8,v 1.4 2010-05-19 01:14:14 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/named-jou=
rnalprint.c
--- a/head/contrib/bind9/bin/tools/named-journalprint.c Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/bin/tools/named-journalprint.c Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: named-journalprint.c,v 1.2 2009-12-04 21:59:23 marka Exp $ */
+/* $Id: named-journalprint.c,v 1.2 2009/12/04 21:59:23 marka Exp $ */
=20
/*! \file */
#include <config.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/named-jou=
rnalprint.docbook
--- a/head/contrib/bind9/bin/tools/named-journalprint.docbook Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/bin/tools/named-journalprint.docbook Tue Apr 17 11=
:51:51 2012 +0300
@@ -17,7 +17,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: named-journalprint.docbook,v 1.2 2009-12-04 21:59:23 marka Exp $=
-->
+<!-- $Id: named-journalprint.docbook,v 1.2 2009/12/04 21:59:23 marka Exp $=
-->
<refentry id=3D"man.named-journalprint">
<refentryinfo>
<date>Feb 18, 2009</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/named-jou=
rnalprint.html
--- a/head/contrib/bind9/bin/tools/named-journalprint.html Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/bin/tools/named-journalprint.html Tue Apr 17 11:51=
:51 2012 +0300
@@ -13,7 +13,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: named-journalprint.html,v 1.4 2010-05-19 01:14:14 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -31,7 +31,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">named-journalprint</=
code> {<em class=3D"replaceable"><code>journal</code></em>}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543342"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543344"></a><h2>DESCRIPTION</h2>
<p>
<span><strong class=3D"command">named-journalprint</strong></span>
prints the contents of a zone journal file in a human-readable
@@ -57,7 +57,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543378"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543379"></a><h2>SEE ALSO</h2>
<p>
<span class=3D"citerefentry"><span class=3D"refentrytitle">named</sp=
an>(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">nsupdate<=
/span>(8)</span>,
@@ -65,7 +65,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543409"></a><h2>AUTHOR</h2>
+<a name=3D"id2543410"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/nsec3hash=
.8
--- a/head/contrib/bind9/bin/tools/nsec3hash.8 Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/bin/tools/nsec3hash.8 Tue Apr 17 11:51:51 2012 +03=
00
@@ -12,7 +12,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: nsec3hash.8,v 1.5 2010-05-19 01:14:14 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/nsec3hash=
.c
--- a/head/contrib/bind9/bin/tools/nsec3hash.c Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/bin/tools/nsec3hash.c Tue Apr 17 11:51:51 2012 +03=
00
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2006, 2008, 2009 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2006, 2008, 2009, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: nsec3hash.c,v 1.6 2009-10-06 21:20:44 each Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
@@ -60,7 +60,8 @@
=20
static void
usage() {
- fatal("salt hash iterations domain");
+ printf("Usage: %s salt algorithm iterations domain\n", program);
+ exit(1);
}
=20
int
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/nsec3hash=
.docbook
--- a/head/contrib/bind9/bin/tools/nsec3hash.docbook Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/bin/tools/nsec3hash.docbook Tue Apr 17 11:51:51 20=
12 +0300
@@ -17,7 +17,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: nsec3hash.docbook,v 1.3 2009-03-02 23:47:43 tbox Exp $ -->
+<!-- $Id: nsec3hash.docbook,v 1.3 2009/03/02 23:47:43 tbox Exp $ -->
<refentry id=3D"man.nsec3hash">
<refentryinfo>
<date>Feb 18, 2009</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/bin/tools/nsec3hash=
.html
--- a/head/contrib/bind9/bin/tools/nsec3hash.html Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/bin/tools/nsec3hash.html Tue Apr 17 11:51:51 2012 =
+0300
@@ -13,7 +13,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: nsec3hash.html,v 1.5 2010-05-19 01:14:14 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -31,7 +31,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">nsec3hash</code> {<=
em class=3D"replaceable"><code>salt</code></em>} {<em class=3D"replaceable"=
><code>algorithm</code></em>} {<em class=3D"replaceable"><code>iterations</=
code></em>} {<em class=3D"replaceable"><code>domain</code></em>}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543367"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543369"></a><h2>DESCRIPTION</h2>
<p>
<span><strong class=3D"command">nsec3hash</strong></span> generates =
an NSEC3 hash based on
a set of NSEC3 parameters. This can be used to check the validity
@@ -39,7 +39,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543380"></a><h2>ARGUMENTS</h2>
+<a name=3D"id2543382"></a><h2>ARGUMENTS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">salt</span></dt>
<dd><p>
@@ -63,14 +63,14 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543442"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543444"></a><h2>SEE ALSO</h2>
<p>
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
<em class=3D"citetitle">RFC 5155</em>.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543459"></a><h2>AUTHOR</h2>
+<a name=3D"id2543461"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/config.h.in
--- a/head/contrib/bind9/config.h.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/config.h.in Tue Apr 17 11:51:51 2012 +0300
@@ -16,7 +16,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: config.h.in,v 1.143.8.4 2011-03-10 04:29:14 each Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -144,6 +144,9 @@
/* Define if threads need PTHREAD_SCOPE_SYSTEM */
#undef NEED_PTHREAD_SCOPE_SYSTEM
=20
+/* Define if building universal (internal helper macro) */
+#undef AC_APPLE_UNIVERSAL_BUILD
+
/* Define to enable the "filter-aaaa-on-v4" option. */
#undef ALLOW_FILTER_AAAA_ON_V4
=20
@@ -380,6 +383,9 @@
/* Define to the one symbol short name of this package. */
#undef PACKAGE_TARNAME
=20
+/* Define to the home page for this package. */
+#undef PACKAGE_URL
+
/* Define to the version of this package. */
#undef PACKAGE_VERSION
=20
@@ -387,6 +393,9 @@
(O_NDELAY/O_NONBLOCK). */
#undef PORT_NONBLOCK
=20
+/* The size of `void *', as computed by sizeof. */
+#undef SIZEOF_VOID_P
+
/* Define to 1 if you have the ANSI C header files. */
#undef STDC_HEADERS
=20
@@ -400,9 +409,17 @@
/* define if idnkit support is to be included. */
#undef WITH_IDN
=20
-/* Define to 1 if your processor stores words with the most significant by=
te
- first (like Motorola and SPARC, unlike Intel and VAX). */
-#undef WORDS_BIGENDIAN
+/* Define WORDS_BIGENDIAN to 1 if your processor stores words with the most
+ significant byte first (like Motorola and SPARC, unlike Intel). */
+#if defined AC_APPLE_UNIVERSAL_BUILD
+# if defined __BIG_ENDIAN__
+# define WORDS_BIGENDIAN 1
+# endif
+#else
+# ifndef WORDS_BIGENDIAN
+# undef WORDS_BIGENDIAN
+# endif
+#endif
=20
/* Define to empty if `const' does not conform to ANSI C. */
#undef const
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/config.threads.in
--- a/head/contrib/bind9/config.threads.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/config.threads.in Tue Apr 17 11:51:51 2012 +0300
@@ -33,8 +33,9 @@
*-*-sysv*OpenUNIX*)
# UnixWare
use_threads=3Dtrue ;;
-*-netbsd[1234].*)
- # NetBSD earlier than NetBSD 5.0 has poor pthreads. Don't use it by defa=
ult.
+[*-netbsd[1234].*])
+ # NetBSD earlier than NetBSD 5.0 has poor pthreads.
+ # Don't use it by default.
use_threads=3Dfalse ;;
*-netbsd*)
use_threads=3Dtrue ;;
@@ -44,7 +45,7 @@
use_threads=3Dfalse ;;
*-freebsd*)
use_threads=3Dfalse ;;
-*-bsdi[234]*)
+[*-bsdi[234]*])
# Thread signals do not work reliably on some versions of BSD/OS.
use_threads=3Dfalse ;;
*-bsdi5*)
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/configure.in
--- a/head/contrib/bind9/configure.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/configure.in Tue Apr 17 11:51:51 2012 +0300
@@ -18,7 +18,7 @@
esyscmd([sed "s/^/# /" COPYRIGHT])dnl
AC_DIVERT_POP()dnl
=20
-AC_REVISION($Revision: 1.512.8.12 $)
+AC_REVISION($Revision: 1.512.8.15 $)
=20
AC_INIT(lib/dns/name.c)
AC_PREREQ(2.59)
@@ -62,6 +62,25 @@
;;
esac
=20
+AC_ARG_ENABLE(developer, [ --enable-developer enable developer build =
settings])
+case "$enable_developer" in
+yes)
+ test "${enable_fixed_rrset+set}" =3D set || enable_fixed_rrset=3Dyes
+ test "${with_atf+set}" =3D set || with_atf=3Dyes
+ test "${enable_filter_aaaa+set}" =3D set || enable_filter_aaaa=3Dyes
+ test "${enable_rpz_nsip+set}" =3D set || enable_rpz_nsip=3Dyes
+ test "${enable_rpz_nsdname+set}" =3D set || enable_rpz_nsdname=3Dyes
+ test "${with_dlz_filesystem+set}" =3D set || with_dlz_filesystem=3Dyes
+ case "$host" in
+ *-darwin*)
+ test "${enable_exportlib+set}" =3D set || enable_exportlib=3Dyes
+ ;;
+ *-linux*)
+ test "${enable_exportlib+set}" =3D set || enable_exportlib=3Dyes
+ ;;
+ esac
+ ;;
+esac
#
# Make very sure that these are the first files processed by
# config.status, since we use the processed output as the input for
@@ -263,7 +282,7 @@
# as it breaks how the two halves (Basic and Advanced) of the IPv6
# Socket API were designed to be used but we have to live with it.
# Define _GNU_SOURCE to pull in the IPv6 Advanced Socket API.
- *-linux*)
+ *-linux* | *-kfreebsd*-gnu)
STD_CDEFINES=3D"$STD_CDEFINES -D_GNU_SOURCE"
CPPFLAGS=3D"$CPPFLAGS -D_GNU_SOURCE"
;;
@@ -502,7 +521,6 @@
#
AC_C_BIGENDIAN
=20
-
#
# was --with-openssl specified?
#
@@ -1437,9 +1455,9 @@
O=3Dlo
A=3Dla
LIBTOOL_MKDEP_SED=3D's;\.o;\.lo;'
- LIBTOOL_MODE_COMPILE=3D'--mode=3Dcompile'
- LIBTOOL_MODE_INSTALL=3D'--mode=3Dinstall'
- LIBTOOL_MODE_LINK=3D'--mode=3Dlink'
+ LIBTOOL_MODE_COMPILE=3D'--mode=3Dcompile --tag=3DCC'
+ LIBTOOL_MODE_INSTALL=3D'--mode=3Dinstall --tag=3DCC'
+ LIBTOOL_MODE_LINK=3D'--mode=3Dlink --tag=3DCC'
case "$host" in
*) LIBTOOL_ALLOW_UNDEFINED=3D ;;
esac
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/Makefile.in
--- a/head/contrib/bind9/doc/Makefile.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/Makefile.in Tue Apr 17 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.11 2007-06-19 23:47:13 tbox Exp $
+# $Id: Makefile.in,v 1.11 2007/06/19 23:47:13 tbox Exp $
=20
# This Makefile is a placeholder. It exists merely to make
# sure that its directory gets created in the object directory
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/Bv9ARM-book=
.xml
--- a/head/contrib/bind9/doc/arm/Bv9ARM-book.xml Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/doc/arm/Bv9ARM-book.xml Tue Apr 17 11:51:51 2012 +=
0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- File: $Id: Bv9ARM-book.xml,v 1.478.8.11 2011-08-02 04:58:46 each Exp =
$ -->
+<!-- File: $Id$ -->
<book xmlns:xi=3D"http://www.w3.org/2001/XInclude">
<title>BIND 9 Administrator Reference Manual</title>
=20
@@ -32,6 +32,7 @@
<year>2009</year>
<year>2010</year>
<year>2011</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
@@ -1462,6 +1463,31 @@
</varlistentry>
=20
<varlistentry>
+ <term><userinput>tsig-list</userinput></term>
+ <listitem>
+ <para>
+ List the names of all TSIG keys currently configur=
ed
+ for use by <command>named</command> in each view. =
The
+ list both statically configured keys and dynamic
+ TKEY-negotiated keys.
+ </para>
+ </listitem>
+ </varlistentry>
+
+ <varlistentry>
+ <term><userinput>tsig-delete</userinput>
+ <replaceable>keyname</replaceable>
+ <optional><replaceable>view</replaceable></optional><=
/term>
+ <listitem>
+ <para>
+ Delete a given TKEY-negotated key from the server.
+ (This does not apply to statically configured TSIG
+ keys.)
+ </para>
+ </listitem>
+ </varlistentry>
+
+ <varlistentry>
<term><userinput>addzone
<replaceable>zone</replaceable>
<optional><replaceable>class</replaceable>
@@ -1898,11 +1924,13 @@
</para>
=20
<para>
- When acting as a slave, <acronym>BIND</acronym> 9 will
- attempt to use IXFR unless
- it is explicitly disabled. For more information about disabling
- IXFR, see the description of the <command>request-ixfr</command> c=
lause
- of the <command>server</command> statement.
+ When acting as a slave, <acronym>BIND</acronym> 9 will attempt
+ to use IXFR unless it is explicitly disabled via the
+ <command>request-ixfr</command> option or the use of
+ <command>ixfr-from-differences</command>. For
+ more information about disabling IXFR, see the description
+ of the <command>request-ixfr</command> clause of the
+ <command>server</command> statement.
</para>
</sect1>
=20
@@ -4645,6 +4673,19 @@
</para>
</entry>
</row>
+ <row rowsep=3D"0">
+ <entry colname=3D"1">
+ <para><command>RPZ</command></para>
+ </entry>
+ <entry colname=3D"2">
+ <para>
+ Information about errors in response policy zone files,
+ rewritten responses, and at the highest
+ <command>debug</command> levels, mere rewriting
+ attempts.
+ </para>
+ </entry>
+ </row>
</tbody>
</tgroup>
</informaltable>
@@ -4993,6 +5034,10 @@
<optional> cache-file <replaceable>path_name</replaceable>; </optional>
<optional> dump-file <replaceable>path_name</replaceable>; </optional>
<optional> bindkeys-file <replaceable>path_name</replaceable>; </optio=
nal>
+ <optional> secroots-file <replaceable>path_name</replaceable>; </optio=
nal>
+ <optional> session-keyfile <replaceable>path_name</replaceable>; </opt=
ional>
+ <optional> session-keyname <replaceable>key_name</replaceable>; </opti=
onal>
+ <optional> session-keyalg <replaceable>algorithm_id</replaceable>; </o=
ptional>
<optional> memstatistics <replaceable>yes_or_no</replaceable>; </optio=
nal>
<optional> memstatistics-file <replaceable>path_name</replaceable>; </=
optional>
<optional> pid-file <replaceable>path_name</replaceable>; </optional>
@@ -5018,7 +5063,8 @@
<optional> ixfr-from-differences (<replaceable>yes_or_no</replaceable>=
| <constant>master</constant> | <constant>slave</constant>); </optional>
<optional> dnssec-enable <replaceable>yes_or_no</replaceable>; </optio=
nal>
<optional> dnssec-validation (<replaceable>yes_or_no</replaceable> | <=
constant>auto</constant>); </optional>
- <optional> dnssec-lookaside ( <replaceable>auto</replaceable> |=20
+ <optional> dnssec-lookaside ( <replaceable>auto</replaceable> |
+ <replaceable>no</replaceable> |
<replaceable>domain</replaceable> trust-anchor <re=
placeable>domain</replaceable> ); </optional>
<optional> dnssec-must-be-secure <replaceable>domain yes_or_no</replac=
eable>; </optional>
<optional> dnssec-accept-expired <replaceable>yes_or_no</replaceable>;=
</optional>
@@ -5166,7 +5212,7 @@
<optional> resolver-query-timeout <replaceable>number</replaceable> ; =
</optional>
<optional> deny-answer-addresses { <replaceable>address_match_list</re=
placeable> } <optional> except-from { <replaceable>namelist</replaceable> }=
</optional>;</optional>
<optional> deny-answer-aliases { <replaceable>namelist</replaceable> }=
<optional> except-from { <replaceable>namelist</replaceable> } </optional>=
;</optional>
- <optional> response-policy { <replaceable>zone_name</replaceable> <opt=
ional> policy <replaceable>given</replaceable> | <replaceable>no-op</replac=
eable> | <replaceable>nxdomain</replaceable> | <replaceable>nodata</replace=
able> | <replaceable>cname domain</replaceable> </optional> ; } ; </optiona=
l>
+ <optional> response-policy { <replaceable>zone_name</replaceable> <opt=
ional> policy given | disabled | passthru | nxdomain | nodata | cname <repl=
aceable>domain</replaceable> </optional> ; } ; </optional>
};
</programlisting>
=20
@@ -5516,7 +5562,8 @@
The pathname of the file the server dumps
security roots to when instructed to do so with
<command>rndc secroots</command>.
- If not specified, the default is <filename>named.secroots<=
/filename>.
+ If not specified, the default is
+ <filename>named.secroots</filename>.
</para>
</listitem>
</varlistentry>
@@ -5561,19 +5608,6 @@
</varlistentry>
=20
<varlistentry>
- <term><command>session-keyfile</command></term>
- <listitem>
- <para>
- The pathname of the file into which to write a session TSIG
- key for use by <command>nsupdate -l</command>. (See the
- discussion of the <command>update-policy</command>
- statement's <userinput>local</userinput> option for more
- details on this feature.)
- </para>
- </listitem>
- </varlistentry>
-
- <varlistentry>
<term><command>port</command></term>
<listitem>
<para>
@@ -5708,6 +5742,11 @@
values for the DLV domain and trust anchor will be
used, along with a built-in key for validation.
</para>
+ <para>
+ If <command>dnssec-lookaside</command> is set to
+ <userinput>no</userinput>, then dnssec-lookaside
+ is not used.
+ </para>
<para>
The default DLV key is stored in the file
<filename>bind.keys</filename>;
@@ -8590,7 +8629,7 @@
<para>
Specify a private RDATA type to be used when generating
key signing records. The default is
- <literal>65535</literal>.
+ <literal>65534</literal>.
</para>
<para>
It is expected that this parameter may be removed
@@ -8853,10 +8892,11 @@
and which queries should not be sent to the Internet's root
servers. The official servers which cover these namespaces
return NXDOMAIN responses to these queries. In particular,
- these cover the reverse namespace for addresses from RFC 1918 and
- RFC 3330. They also include the reverse namespace for IPv6 local
- address (locally assigned), IPv6 link local addresses, the IPv6
- loopback address and the IPv6 unknown address.
+ these cover the reverse namespaces for addresses from
+ RFC 1918, RFC 4193, and RFC 5737. They also include the
+ reverse namespace for IPv6 local address (locally assigned),
+ IPv6 link local addresses, the IPv6 loopback address and the
+ IPv6 unknown address.
</para>
<para>
Named will attempt to determine if a built-in zone already exists
@@ -9227,141 +9267,228 @@
<title>Response Policy Zone (RPZ) Rewriting</title>
<para>
<acronym>BIND</acronym> 9 includes an intentionally limited
- mechanism to modify DNS responses for recursive requests
- similar to email anti-spam DNS blacklists.
- All response policy zones are named in the
- <command>response-policy</command> option for the view or amon=
g the
- global options if there is no response-policy option for the v=
iew.
- </para>
-
- <para>
- The rules encoded in a response policy zone (RPZ) are applied
- only to responses to queries that ask for recursion (RD=3D1).
- RPZs are normal DNS zones containing RRsets
- that can be queried normally if allowed.
- It is usually best to restrict those queries with something li=
ke
- <command>allow-query {none; };</command> or
- <command>allow-query { 127.0.0.1; };</command>.
- </para>
-
- <para>
- There are four kinds of RPZ rewrite rules. QNAME rules are
- applied to query names in requests and to targets of CNAME
- records resolved in the process of generating the response.
- The owner name of a QNAME rule is the query name relativized
- to the RPZ.
- The records in a rewrite rule are usually A, AAAA, or special
- CNAMEs, but can be any type except DNAME.
- </para>
-
- <para>
- IP rules are triggered by addresses in A and AAAA records.
- All IP addresses in A or AAAA RRsets are tested and the rule
- longest prefix is applied. Ties between rules with equal pref=
ixes
- are broken in favor of the first RPZ mentioned in the
- response-policy option.
- The rule matching the smallest IP address is chosen among equal
- prefix rules from a single RPZ.
- IP rules are expressed in RRsets with owner names that are
- subdomains of rpz-ip and encoding an IP address block, reversed
- as in IN-ARPA.
- prefix.B.B.B.B with prefix between 1 and 32 and B between 1 an=
d 255
- encodes an IPv4 address.
- IPv6 addresses are encoded by with prefix.W.W.W.W.W.W.W.W or
- prefix.WORDS.zz.WORDS. The words in the standard IPv6 text
- representation are reversed, "::" is replaced with ".zz.",
- and ":" becomes ".".
- </para>
-
- <para>
- NSDNAME rules match names in NS RRsets for the response or a
- parent. They are encoded as subdomains of rpz-nsdomain relati=
vized
- to the RPZ origin name.
- </para>
-
- <para>
- NSIP rules match IP addresses in A and AAAA RRsets for names of
- responsible servers or the names that can be matched by NSDNAME
- rules. The are encoded like IP rules except as subdomains of
- rpz-nsip.
- </para>
-
- <para>
- Authority verification issues and variations in authority data=
in
- the current version of <acronym>BIND</acronym> 9 can cause
- inconsistent results from NSIP and NSDNAME. So they are available
+ mechanism to modify DNS responses for recursive requests
+ somewhat similar to email anti-spam DNS blacklists.
+ Responses can be changed to deny the existence of domains(NXDOMAIN),
+ deny the existence of IP addresses for domains (NODATA),
+ or contain other IP addresses or data.
+ </para>
+
+ <para>
+ The actions encoded in a response policy zone (RPZ) are applied
+ only to queries that ask for recursion (RD=3D1).
+ Response policy zones are named in the
+ <command>response-policy</command> option for the view or among the
+ global options if there is no response-policy option for the view.
+ RPZs are ordinary DNS zones containing RRsets
+ that can be queried normally if allowed.
+ It is usually best to restrict those queries with something like
+ <command>allow-query { localhost; };</command>.
+ </para>
+
+ <para>
+ There are four kinds of RPZ records, QNAME, IP, NSIP,
+ and NSDNAME.
+ QNAME records are applied to query names of requests and targets
+ of CNAME records resolved to generate the response.
+ The owner name of a QNAME RPZ record is the query name relativized
+ to the RPZ.
+ </para>
+
+ <para>
+ The second kind of RPZ record, an IP policy record,
+ is triggered by addresses in A and AAAA records
+ for the ANSWER sections of responses.
+ IP policy records have owner names that are
+ subdomains of <userinput>rpz-ip</userinput> relativized to the
+ RPZ origin name and encode an IP address or address block.
+ IPv4 addresses are encoded as
+ <userinput>prefixlength.B4.B3.B2.B1.rpz-ip</userinput>.
+ The prefix length must be between 1 and 32.
+ All four bytes, B4, B3, B2, and B1, must be present.
+ B4 is the decimal value of the least significant byte of the
+ IPv4 address as in IN-ADDR.ARPA.
+ IPv6 addresses are encoded in a format similar to the standard
+ IPv6 text representation,
+ <userinput>prefixlength.W8.W7.W6.W5.W4.W3.W2.W1.rpz-ip</userinput>.
+ Each of W8,...,W1 is a one to four digit hexadecimal number
+ representing 16 bits of the IPv6 address as in the standard text
+ representation of IPv6 addresses, but reversed as in IN-ADDR.ARPA.
+ All 8 words must be present except when consecutive
+ zero words are replaced with <userinput>.zz.</userinput>
+ analogous to double colons (::) in standard IPv6 text encodings.
+ The prefix length must be between 1 and 128.
+ </para>
+
+ <para>
+ NSDNAME policy records match names of authoritative servers
+ for the query name, a parent of the query name, a CNAME,
+ or a parent of a CNAME.
+ They are encoded as subdomains of
+ <userinput>rpz-nsdomain</userinput> relativized
+ to the RPZ origin name.
+ </para>
+
+ <para>
+ NSIP policy records match IP addresses in A and AAAA RRsets
+ for domains that can be checked against NSDNAME policy records.
+ The are encoded like IP policies except as subdomains of
+ <userinput>rpz-nsip</userinput>.
+ </para>
+
+ <para>
+ The query response is checked against all RPZs, so
+ two or more policy records can apply to a single response.
+ Because DNS responses can be rewritten according by at most a
+ single policy record, a single policy (other than
+ <command>DISABLED</command> policies) must be chosen.
+ Policies are chosen in the following order:
+ <itemizedlist>
+ <listitem>Among applicable zones, use the RPZ that appears first
+ in the response-policy option.
+ </listitem>
+ <listitem>Prefer QNAME to IP to NSDNAME to NSIP policy records
+ in a single RPZ
+ </listitem>
+ <listitem>Among applicable NSDNAME policy records, prefer the
+ policy record that matches the lexically smallest name
+ </listitem>
+ <listitem>Among IP or NSIP policy records, prefer the record
+ with the longest prefix.
+ </listitem>
+ <listitem>Among records with the same prefex length,
+ prefer the IP or NSIP policy record that matches
+ the smallest IP address.
+ </listitem>
+ </itemizedlist>
+ </para>
+
+ <para>
+ When the processing of a response is restarted to resolve
+ DNAME or CNAME records and an applicable policy record set has
+ not been found,
+ all RPZs are again consulted for the DNAME or CNAME names
+ and addresses.
+ </para>
+
+ <para>
+ Authority verification issues and variations in authority data
+ can cause inconsistent results for NSIP and NSDNAME policy records.
+ Glue NS records often differ from authoritative NS records.
+ So they are available
only when <acronym>BIND</acronym> is built with the
<userinput>--enable-rpz-nsip</userinput> or
<userinput>--enable-rpz-nsdname</userinput> options
- on the "configure" command line.
- </para>
-
- <para>
- Four policies can be expressed.
- The <command>NXDOMAIN</command> policy causes a NXDOMAIN respo=
nse
- and is expressed with an RRset consisting of a single CNAME
- whose target is the root domain (.).
- <command>NODATA</command> generates NODATA or ANCOUNT=3D1 rega=
rdless
- of query type.
- It is expressed with a CNAME whose target is the wildcard
- top-level domain (*.).
- The <command>NO-OP</command> policy does not change the respon=
se
- and is used to "poke holes" in policies for larger CIDR blocks=
or in
- zones named later in the <command>response-policy</command> op=
tion.
- The NO-OP policy is expressed by a CNAME with a target consist=
ing
- of the variable part of the owner name, such as "example.com."=
for
- a QNAME rule or "128.1.0.0.127." for an IP rule.
- The <command>CNAME</command> policy is used to replace the RRs=
ets
- of response.
- A and AAAA RRsets are most common and useful to capture
- an evil domain in a walled garden, but any valid set of RRsets
- is possible.
- </para>
-
- <para>
- All of the policies in an RPZ can be overridden with a
- <command>policy</command> clause.
- <command>given</command> says "do not override."
- <command>no-op</command> says "do nothing" regardless of the p=
olicy
- in RPZ records.
- <command>nxdomain</command> causes all RPZ rules to generate
- NXDOMAIN results.
- <command>nodata</command> gives nodata.
- <command>cname domain</command> causes all RPZ rules to act as=
if
- the consisted of a "cname domain" record.
- </para>
-
- <para>
- For example, you might use this option statement
- </para>
-<programlisting>response-policy { zone "bl"; };</programlisting>
+ on the "configure" command line.
+ </para>
+
+ <para>
+ RPZ record sets are special CNAME records or one or more
+ of any types of DNS record except DNAME or DNSSEC.
+ Except when a policy record is a CNAME, there can be more
+ more than one record and more than one type
+ in a set of policy records.
+ Except for three kinds of CNAME records that are illegal except
+ in policy zones, the records in a set are used in the response as if
+ their owner name were the query name. They are copied to the
+ response as dictated by their types.
+ <itemizedlist>
+ <listitem>A CNAME whose target is the root domain (.)
+ specifies the <command>NXDOMAIN</command> policy,
+ which generates an NXDOMAIN response.
+ </listitem>
+ <listitem>A CNAME whose target is the wildcard top-level
+ domain (*.) specifies the <command>NODATA</command> policy,
+ which rewrites the response to NODATA or ANCOUNT=3D1.
+ </listitem>
+ <listitem>A CNAME whose target is a wildcard hostname such
+ as *.example.com is used normally after the astrisk (*)
+ has been replaced with the query name.
+ These records are usually resolved with ordinary CNAMEs
+ outside the policy zones. They can be useful for logging.
+ </listitem>
+ <listitem>The <command>PASSTHRU</command> policy is specified
+ by a CNAME whose target is the variable part of its own
+ owner name. It causes the response to not be rewritten
+ and is most often used to "poke holes" in policies for
+ CIDR blocks.
+ </listitem>
+ </itemizedlist>
+ </para>
+
+ <para>
+ The policies specified in individual records
+ in an RPZ can be overridden with a <command>policy</command> clause
+ in the <command>response-policy</command> option.
+ An organization using an RPZ provided by another organization might
+ use this mechanism to redirect domains to its own walled garden.
+ <itemizedlist>
+ <listitem><command>GIVEN</command> says "do not override."
+ </listitem>
+ <listitem><command>DISABLED</command> causes policy records to do
+ nothing but log what they might have done.
+ The response to the DNS query will be written according to
+ any matching policy records that are not disabled.
+ Policy zones overridden with <command>DISABLED</command> should
+ appear first, because they will often not be logged
+ if a higher precedence policy is found first.
+ </listitem>
+ <listitem><command>PASSTHRU</command> causes all policy records
+ to act as if they were CNAME records with targets the variable
+ part of their owner name. They protect the response from
+ being changed.
+ </listitem>
+ <listitem><command>NXDOMAIN</command> causes all RPZ records
+ to specify NXDOMAIN policies.
+ </listitem>
+ <listitem><command>NODATA</command> overrides with the
+ NODATA policy
+ </listitem>
+ <listitem><command>CNAME domain</command> causes all RPZ
+ policy records to act as if they were "cname domain" records.
+ </listitem>
+ </itemizedlist>
+ </para>
+
+ <para>
+ For example, you might use this option statement
+ </para>
+<programlisting> response-policy { zone "badlist"; };</programlisting>
<para>
and this zone statement
</para>
-<programlisting>zone "bl" {type master; file "example/bl"; allow-query {no=
ne;}; };</programlisting>
+<programlisting> zone "badlist" {type master; file "master/badlist"; al=
low-query {none;}; };</programlisting>
<para>
with this zone file
</para>
<programlisting>$TTL 1H
-@ SOA LOCALHOST. named-mgr.example.com (1 1h 15m 30d 2h)
-
-; QNAME rules
-nxdomain.domain.com CNAME .
-nodata.domain.com CNAME *.
-bad.domain.com A 10.0.0.1
- AAAA 2001:2::1
-ok.domain.com CNAME ok.domain.com.
-*.badzone.domain.com CNAME garden.example.com.
-
-; IP rules rewriting all answers for 127/8 except 127.0.0.1
-8.0.0.0.127.ip CNAME .
-32.1.0.0.127.ip CNAME 32.1.0.0.127.
-
-; NSDNAME and NSIP rules
+@ SOA LOCALHOST. named-mgr.example.com (1 1h 15m 30d=
2h)
+ NS LOCALHOST.
+
+; QNAME policy records. There are no periods (.) after the owner names.
+nxdomain.domain.com CNAME . ; NXDOMAIN policy
+nodata.domain.com CNAME *. ; NODATA policy
+bad.domain.com A 10.0.0.1 ; redirect to a walled gar=
den
+ AAAA 2001:2::1
+
+; do not rewrite (PASSTHRU) OK.DOMAIN.COM
+ok.domain.com CNAME ok.domain.com.
+
+bzone.domain.com CNAME garden.example.com.
+
+; redirect x.bzone.domain.com to x.bzone.domain.com.garden.example.com
+*.bzone.domain.com CNAME *.garden.example.com.
+
+
+; IP policy records that rewrite all answers for 127/8 except 127.0.0.1
+8.0.0.0.127.rpz-ip CNAME .
+32.1.0.0.127.rpz-ip CNAME 32.1.0.0.127. ; PASSTHRU for 127.0.0.1
+
+; NSDNAME and NSIP policy records
ns.domain.com.rpz-nsdname CNAME .
48.zz.2.2001.rpz-nsip CNAME .
</programlisting>
- </sect3>
+ </sect3>
</sect2>
=20
<sect2 id=3D"server_statement_grammar">
@@ -14725,9 +14852,8 @@
// RFC1918 space and some reserved space, which is
// commonly used in spoofing attacks.
acl bogusnets {
- 0.0.0.0/8; 1.0.0.0/8; 2.0.0.0/8; 192.0.2.0/24;
- 224.0.0.0/3; 10.0.0.0/8; 172.16.0.0/12;
- 192.168.0.0/16;
+ 0.0.0.0/8; 192.0.2.0/24; 224.0.0.0/3;
+ 10.0.0.0/8; 172.16.0.0/12; 192.168.0.0/16;
};
=20
// Set up an ACL called our-nets. Replace this with the
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/Bv9ARM.ch01=
.html
--- a/head/contrib/bind9/doc/arm/Bv9ARM.ch01.html Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/doc/arm/Bv9ARM.ch01.html Tue Apr 17 11:51:51 2012 =
+0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: Bv9ARM.ch01.html,v 1.49.14.1 2011-06-22 02:37:19 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -45,17 +45,17 @@
<div class=3D"toc">
<p><b>Table of Contents</b></p>
<dl>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564371">Scope of =
Document</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564394">Organizat=
ion of This Document</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564534">Conventio=
ns Used in This Document</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564715">The Domai=
n Name System (<acronym class=3D"acronym">DNS</acronym>)</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564375">Scope of =
Document</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564398">Organizat=
ion of This Document</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564538">Conventio=
ns Used in This Document</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564720">The Domai=
n Name System (<acronym class=3D"acronym">DNS</acronym>)</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2564737">DNS Funda=
mentals</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2564771">Domains a=
nd Domain Names</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567176">Zones</a>=
</span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567253">Authorita=
tive Name Servers</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567426">Caching N=
ame Servers</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567556">Name Serv=
ers in Multiple Roles</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2564741">DNS Funda=
mentals</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2564775">Domains a=
nd Domain Names</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567180">Zones</a>=
</span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567257">Authorita=
tive Name Servers</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567430">Caching N=
ame Servers</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567560">Name Serv=
ers in Multiple Roles</a></span></dt>
</dl></dd>
</dl>
</div>
@@ -71,7 +71,7 @@
</p>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2564371"></a>Scope of Document</h2></div></div></div>
+<a name=3D"id2564375"></a>Scope of Document</h2></div></div></div>
<p>
The Berkeley Internet Name Domain
(<acronym class=3D"acronym">BIND</acronym>) implements a
@@ -87,7 +87,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2564394"></a>Organization of This Document</h2></div></div></=
div>
+<a name=3D"id2564398"></a>Organization of This Document</h2></div></div></=
div>
<p>
In this document, <span class=3D"emphasis"><em>Chapter 1</em></spa=
n> introduces
the basic <acronym class=3D"acronym">DNS</acronym> and <acronym cl=
ass=3D"acronym">BIND</acronym> concepts. <span class=3D"emphasis"><em>Chapt=
er 2</em></span>
@@ -116,7 +116,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2564534"></a>Conventions Used in This Document</h2></div></di=
v></div>
+<a name=3D"id2564538"></a>Conventions Used in This Document</h2></div></di=
v></div>
<p>
In this document, we use the following general typographic
conventions:
@@ -243,7 +243,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2564715"></a>The Domain Name System (<acronym class=3D"acrony=
m">DNS</acronym>)</h2></div></div></div>
+<a name=3D"id2564720"></a>The Domain Name System (<acronym class=3D"acrony=
m">DNS</acronym>)</h2></div></div></div>
<p>
The purpose of this document is to explain the installation
and upkeep of the <acronym class=3D"acronym">BIND</acronym> (Berke=
ley Internet
@@ -253,7 +253,7 @@
</p>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2564737"></a>DNS Fundamentals</h3></div></div></div>
+<a name=3D"id2564741"></a>DNS Fundamentals</h3></div></div></div>
<p>
The Domain Name System (DNS) is a hierarchical, distributed
database. It stores information for mapping Internet host names=
to
@@ -275,7 +275,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2564771"></a>Domains and Domain Names</h3></div></div></div>
+<a name=3D"id2564775"></a>Domains and Domain Names</h3></div></div></div>
<p>
The data stored in the DNS is identified by <span class=3D"empha=
sis"><em>domain names</em></span> that are organized as a tree according to
organizational or administrative boundaries. Each node of the tr=
ee,
@@ -321,7 +321,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2567176"></a>Zones</h3></div></div></div>
+<a name=3D"id2567180"></a>Zones</h3></div></div></div>
<p>
To properly operate a name server, it is important to understand
the difference between a <span class=3D"emphasis"><em>zone</em><=
/span>
@@ -374,7 +374,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2567253"></a>Authoritative Name Servers</h3></div></div></div>
+<a name=3D"id2567257"></a>Authoritative Name Servers</h3></div></div></div>
<p>
Each zone is served by at least
one <span class=3D"emphasis"><em>authoritative name server</em><=
/span>,
@@ -391,7 +391,7 @@
</p>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2567276"></a>The Primary Master</h4></div></div></div>
+<a name=3D"id2567281"></a>The Primary Master</h4></div></div></div>
<p>
The authoritative server where the master copy of the zone
data is maintained is called the
@@ -411,7 +411,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2567374"></a>Slave Servers</h4></div></div></div>
+<a name=3D"id2567379"></a>Slave Servers</h4></div></div></div>
<p>
The other authoritative servers, the <span class=3D"emphasis">=
<em>slave</em></span>
servers (also known as <span class=3D"emphasis"><em>secondary<=
/em></span> servers)
@@ -427,7 +427,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2567396"></a>Stealth Servers</h4></div></div></div>
+<a name=3D"id2567400"></a>Stealth Servers</h4></div></div></div>
<p>
Usually all of the zone's authoritative servers are listed in
NS records in the parent zone. These NS records constitute
@@ -462,7 +462,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2567426"></a>Caching Name Servers</h3></div></div></div>
+<a name=3D"id2567430"></a>Caching Name Servers</h3></div></div></div>
<p>
The resolver libraries provided by most operating systems are
<span class=3D"emphasis"><em>stub resolvers</em></span>, meaning=
that they are not
@@ -489,7 +489,7 @@
</p>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2567529"></a>Forwarding</h4></div></div></div>
+<a name=3D"id2567533"></a>Forwarding</h4></div></div></div>
<p>
Even a caching name server does not necessarily perform
the complete recursive lookup itself. Instead, it can
@@ -516,7 +516,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2567556"></a>Name Servers in Multiple Roles</h3></div></div><=
/div>
+<a name=3D"id2567560"></a>Name Servers in Multiple Roles</h3></div></div><=
/div>
<p>
The <acronym class=3D"acronym">BIND</acronym> name server can
simultaneously act as
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/Bv9ARM.ch02=
.html
--- a/head/contrib/bind9/doc/arm/Bv9ARM.ch02.html Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/doc/arm/Bv9ARM.ch02.html Tue Apr 17 11:51:51 2012 =
+0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: Bv9ARM.ch02.html,v 1.43 2011-01-05 01:14:07 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -45,16 +45,16 @@
<div class=3D"toc">
<p><b>Table of Contents</b></p>
<dl>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567590">Hardware =
requirements</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567617">CPU Requi=
rements</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567629">Memory Re=
quirements</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567724">Name Serv=
er Intensive Environment Issues</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567735">Supported=
Operating Systems</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567594">Hardware =
requirements</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567621">CPU Requi=
rements</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567634">Memory Re=
quirements</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567729">Name Serv=
er Intensive Environment Issues</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567739">Supported=
Operating Systems</a></span></dt>
</dl>
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2567590"></a>Hardware requirements</h2></div></div></div>
+<a name=3D"id2567594"></a>Hardware requirements</h2></div></div></div>
<p>
<acronym class=3D"acronym">DNS</acronym> hardware requirements have
traditionally been quite modest.
@@ -73,7 +73,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2567617"></a>CPU Requirements</h2></div></div></div>
+<a name=3D"id2567621"></a>CPU Requirements</h2></div></div></div>
<p>
CPU requirements for <acronym class=3D"acronym">BIND</acronym> 9 r=
ange from
i486-class machines
@@ -84,7 +84,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2567629"></a>Memory Requirements</h2></div></div></div>
+<a name=3D"id2567634"></a>Memory Requirements</h2></div></div></div>
<p>
The memory of the server has to be large enough to fit the
cache and zones loaded off disk. The <span><strong class=3D"comma=
nd">max-cache-size</strong></span>
@@ -107,7 +107,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2567724"></a>Name Server Intensive Environment Issues</h2></d=
iv></div></div>
+<a name=3D"id2567729"></a>Name Server Intensive Environment Issues</h2></d=
iv></div></div>
<p>
For name server intensive environments, there are two alternative
configurations that may be used. The first is where clients and
@@ -124,7 +124,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2567735"></a>Supported Operating Systems</h2></div></div></di=
v>
+<a name=3D"id2567739"></a>Supported Operating Systems</h2></div></div></di=
v>
<p>
ISC <acronym class=3D"acronym">BIND</acronym> 9 compiles and runs =
on a large
number
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/Bv9ARM.ch03=
.html
--- a/head/contrib/bind9/doc/arm/Bv9ARM.ch03.html Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/doc/arm/Bv9ARM.ch03.html Tue Apr 17 11:51:51 2012 =
+0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: Bv9ARM.ch03.html,v 1.83.8.1 2011-05-24 02:37:17 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -47,14 +47,14 @@
<dl>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch03.html#sample_configuration=
">Sample Configurations</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2567767">A Caching=
-only Name Server</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2567988">An Author=
itative-only Name Server</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2567771">A Caching=
-only Name Server</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2567992">An Author=
itative-only Name Server</a></span></dt>
</dl></dd>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch03.html#id2568010">Load Bala=
ncing</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch03.html#id2568364">Name Serv=
er Operations</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch03.html#id2568014">Load Bala=
ncing</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch03.html#id2568369">Name Serv=
er Operations</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2568370">Tools for=
Use With the Name Server Daemon</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2570378">Signals</=
a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2568374">Tools for=
Use With the Name Server Daemon</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2570421">Signals</=
a></span></dt>
</dl></dd>
</dl>
</div>
@@ -68,7 +68,7 @@
<a name=3D"sample_configuration"></a>Sample Configurations</h2></div></div=
></div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2567767"></a>A Caching-only Name Server</h3></div></div></div>
+<a name=3D"id2567771"></a>A Caching-only Name Server</h3></div></div></div>
<p>
The following sample configuration is appropriate for a caching-=
only
name server for use by clients internal to a corporation. All
@@ -98,7 +98,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2567988"></a>An Authoritative-only Name Server</h3></div></di=
v></div>
+<a name=3D"id2567992"></a>An Authoritative-only Name Server</h3></div></di=
v></div>
<p>
This sample configuration is for an authoritative-only server
that is the master server for "<code class=3D"filename">example.=
com</code>"
@@ -146,7 +146,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2568010"></a>Load Balancing</h2></div></div></div>
+<a name=3D"id2568014"></a>Load Balancing</h2></div></div></div>
<p>
A primitive form of load balancing can be achieved in
the <acronym class=3D"acronym">DNS</acronym> by using multiple rec=
ords
@@ -289,10 +289,10 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2568364"></a>Name Server Operations</h2></div></div></div>
+<a name=3D"id2568369"></a>Name Server Operations</h2></div></div></div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2568370"></a>Tools for Use With the Name Server Daemon</h3></=
div></div></div>
+<a name=3D"id2568374"></a>Tools for Use With the Name Server Daemon</h3></=
div></div></div>
<p>
This section describes several indispensable diagnostic,
administrative and monitoring tools available to the system
@@ -670,6 +670,21 @@
set to <strong class=3D"userinput"><code>yes</code=
></strong> to be effective.
It defaults to enabled.
</p></dd>
+<dt><span class=3D"term"><strong class=3D"userinput"><code>tsig-list</code=
></strong></span></dt>
+<dd><p>
+ List the names of all TSIG keys currently configur=
ed
+ for use by <span><strong class=3D"command">named</=
strong></span> in each view. The
+ list both statically configured keys and dynamic
+ TKEY-negotiated keys.
+ </p></dd>
+<dt><span class=3D"term"><strong class=3D"userinput"><code>tsig-delete</co=
de></strong>
+ <em class=3D"replaceable"><code>keyname</code></em>
+ [<span class=3D"optional"><em class=3D"replaceable"><=
code>view</code></em></span>]</span></dt>
+<dd><p>
+ Delete a given TKEY-negotated key from the server.
+ (This does not apply to statically configured TSIG
+ keys.)
+ </p></dd>
<dt><span class=3D"term"><strong class=3D"userinput"><code>addzone
<em class=3D"replaceable"><code>zone</code></em>
[<span class=3D"optional"><em class=3D"replaceable=
"><code>class</code></em>
@@ -873,7 +888,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2570378"></a>Signals</h3></div></div></div>
+<a name=3D"id2570421"></a>Signals</h3></div></div></div>
<p>
Certain UNIX signals cause the name server to take specific
actions, as described in the following table. These signals can
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/Bv9ARM.ch04=
.html
--- a/head/contrib/bind9/doc/arm/Bv9ARM.ch04.html Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/doc/arm/Bv9ARM.ch04.html Tue Apr 17 11:51:51 2012 =
+0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: Bv9ARM.ch04.html,v 1.125.8.9 2011-08-03 02:35:12 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -49,59 +49,59 @@
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#dynamic_update">Dyna=
mic Update</a></span></dt>
<dd><dl><dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#journal">The=
journal file</a></span></dt></dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#incremental_zone_tra=
nsfers">Incremental Zone Transfers (IXFR)</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2570885">Split DNS=
</a></span></dt>
-<dd><dl><dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2570903">E=
xample split DNS setup</a></span></dt></dl></dd>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2570934">Split DNS=
</a></span></dt>
+<dd><dl><dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2570952">E=
xample split DNS setup</a></span></dt></dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#tsig">TSIG</a></span=
></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571336">Generate =
Shared Keys for Each Pair of Hosts</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571478">Copying t=
he Shared Secret to Both Machines</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571489">Informing=
the Servers of the Key's Existence</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571525">Instructi=
ng the Server to Use the Key</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571651">TSIG Key =
Based Access Control</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571700">Errors</a=
></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2564012">Generate =
Shared Keys for Each Pair of Hosts</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2564086">Copying t=
he Shared Secret to Both Machines</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571811">Informing=
the Servers of the Key's Existence</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571847">Instructi=
ng the Server to Use the Key</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571905">TSIG Key =
Based Access Control</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571954">Errors</a=
></span></dt>
</dl></dd>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2571714">TKEY</a><=
/span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2563980">SIG(0)</a=
></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2571968">TKEY</a><=
/span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2572153">SIG(0)</a=
></span></dt>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#DNSSEC">DNSSEC</a></=
span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2564117">Generatin=
g Keys</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572183">Signing t=
he Zone</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572264">Configuri=
ng Servers</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572221">Generatin=
g Keys</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572300">Signing t=
he Zone</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572381">Configuri=
ng Servers</a></span></dt>
</dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#dnssec.dynamic.zones=
">DNSSEC, Dynamic Zones, and Automatic Signing</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563484">Convertin=
g from insecure to secure</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563522">Dynamic D=
NS update method</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563626">Fully aut=
omatic zone signing</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563777">Private-t=
ype records</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563814">DNSKEY ro=
llovers</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563827">Dynamic D=
NS update method</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563860">Automatic=
key rollovers</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563886">NSEC3PARA=
M rollovers via UPDATE</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563896">Convertin=
g from NSEC to NSEC3</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563906">Convertin=
g from NSEC3 to NSEC</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563918">Convertin=
g from secure to insecure</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563956">Periodic =
re-signing</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571816">NSEC3 and=
OPTOUT</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571421">Convertin=
g from insecure to secure</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571459">Dynamic D=
NS update method</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563508">Fully aut=
omatic zone signing</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563590">Private-t=
ype records</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563696">DNSKEY ro=
llovers</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563708">Dynamic D=
NS update method</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563741">Automatic=
key rollovers</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563836">NSEC3PARA=
M rollovers via UPDATE</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563846">Convertin=
g from NSEC to NSEC3</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563856">Convertin=
g from NSEC3 to NSEC</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563868">Convertin=
g from secure to insecure</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563906">Periodic =
re-signing</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563915">NSEC3 and=
OPTOUT</a></span></dt>
</dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#rfc5011.support">Dyn=
amic Trust Anchor Management</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571869">Validatin=
g Resolver</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571892">Authorita=
tive Server</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571685">Validatin=
g Resolver</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571707">Authorita=
tive Server</a></span></dt>
</dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#pkcs11">PKCS #11 (Cr=
yptoki) support</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2609757">Prerequis=
ites</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2607912">Building =
BIND 9 with PKCS#11</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2608144">PKCS #11 =
Tools</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2608174">Using the=
HSM</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2610353">Specifyin=
g the engine on the command line</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2610467">Running n=
amed with automatic zone re-signing</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2609970">Prerequis=
ites</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2608219">Building =
BIND 9 with PKCS#11</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2610529">PKCS #11 =
Tools</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2610560">Using the=
HSM</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2635129">Specifyin=
g the engine on the command line</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2635243">Running n=
amed with automatic zone re-signing</a></span></dt>
</dl></dd>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2572484">IPv6 Supp=
ort in <acronym class=3D"acronym">BIND</acronym> 9</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2572669">IPv6 Supp=
ort in <acronym class=3D"acronym">BIND</acronym> 9</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572819">Address L=
ookups Using AAAA Records</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572840">Address t=
o Name Lookups Using Nibble Format</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572868">Address L=
ookups Using AAAA Records</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572889">Address t=
o Name Lookups Using Nibble Format</a></span></dt>
</dl></dd>
</dl>
</div>
@@ -247,16 +247,18 @@
to <strong class=3D"userinput"><code>yes</code></strong>.
</p>
<p>
- When acting as a slave, <acronym class=3D"acronym">BIND</acronym> =
9 will
- attempt to use IXFR unless
- it is explicitly disabled. For more information about disabling
- IXFR, see the description of the <span><strong class=3D"command">r=
equest-ixfr</strong></span> clause
- of the <span><strong class=3D"command">server</strong></span> stat=
ement.
+ When acting as a slave, <acronym class=3D"acronym">BIND</acronym> =
9 will attempt
+ to use IXFR unless it is explicitly disabled via the
+ <span><strong class=3D"command">request-ixfr</strong></span> optio=
n or the use of
+ <span><strong class=3D"command">ixfr-from-differences</strong></sp=
an>. For
+ more information about disabling IXFR, see the description
+ of the <span><strong class=3D"command">request-ixfr</strong></span=
> clause of the
+ <span><strong class=3D"command">server</strong></span> statement.
</p>
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2570885"></a>Split DNS</h2></div></div></div>
+<a name=3D"id2570934"></a>Split DNS</h2></div></div></div>
<p>
Setting up different views, or visibility, of the DNS space to
internal and external resolvers is usually referred to as a
@@ -286,7 +288,7 @@
</p>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2570903"></a>Example split DNS setup</h3></div></div></div>
+<a name=3D"id2570952"></a>Example split DNS setup</h3></div></div></div>
<p>
Let's say a company named <span class=3D"emphasis"><em>Example, In=
c.</em></span>
(<code class=3D"literal">example.com</code>)
@@ -543,7 +545,7 @@
</p>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2571336"></a>Generate Shared Keys for Each Pair of Hosts</h3>=
</div></div></div>
+<a name=3D"id2564012"></a>Generate Shared Keys for Each Pair of Hosts</h3>=
</div></div></div>
<p>
A shared secret is generated to be shared between <span class=3D=
"emphasis"><em>host1</em></span> and <span class=3D"emphasis"><em>host2</em=
></span>.
An arbitrary key name is chosen: "host1-host2.". The key name mu=
st
@@ -551,7 +553,7 @@
</p>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2571353"></a>Automatic Generation</h4></div></div></div>
+<a name=3D"id2564029"></a>Automatic Generation</h4></div></div></div>
<p>
The following command will generate a 128-bit (16 byte) HMAC-S=
HA256
key as described above. Longer keys are better, but shorter ke=
ys
@@ -575,7 +577,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2571392"></a>Manual Generation</h4></div></div></div>
+<a name=3D"id2564068"></a>Manual Generation</h4></div></div></div>
<p>
The shared secret is simply a random sequence of bits, encoded
in base-64. Most ASCII strings are valid base-64 strings (assu=
ming
@@ -590,7 +592,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2571478"></a>Copying the Shared Secret to Both Machines</h3><=
/div></div></div>
+<a name=3D"id2564086"></a>Copying the Shared Secret to Both Machines</h3><=
/div></div></div>
<p>
This is beyond the scope of DNS. A secure transport mechanism
should be used. This could be secure FTP, ssh, telephone, etc.
@@ -598,7 +600,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2571489"></a>Informing the Servers of the Key's Existence</h3=
></div></div></div>
+<a name=3D"id2571811"></a>Informing the Servers of the Key's Existence</h3=
></div></div></div>
<p>
Imagine <span class=3D"emphasis"><em>host1</em></span> and <span=
class=3D"emphasis"><em>host 2</em></span>
are
@@ -625,7 +627,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2571525"></a>Instructing the Server to Use the Key</h3></div>=
</div></div>
+<a name=3D"id2571847"></a>Instructing the Server to Use the Key</h3></div>=
</div></div>
<p>
Since keys are shared between two hosts only, the server must
be told when keys are to be used. The following is added to the =
<code class=3D"filename">named.conf</code> file
@@ -657,7 +659,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2571651"></a>TSIG Key Based Access Control</h3></div></div></=
div>
+<a name=3D"id2571905"></a>TSIG Key Based Access Control</h3></div></div></=
div>
<p>
<acronym class=3D"acronym">BIND</acronym> allows IP addresses an=
d ranges
to be specified in ACL
@@ -684,7 +686,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2571700"></a>Errors</h3></div></div></div>
+<a name=3D"id2571954"></a>Errors</h3></div></div></div>
<p>
The processing of TSIG signed messages can result in
several errors. If a signed message is sent to a non-TSIG aware
@@ -710,7 +712,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2571714"></a>TKEY</h2></div></div></div>
+<a name=3D"id2571968"></a>TKEY</h2></div></div></div>
<p><span><strong class=3D"command">TKEY</strong></span>
is a mechanism for automatically generating a shared secret
between two hosts. There are several "modes" of
@@ -746,7 +748,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2563980"></a>SIG(0)</h2></div></div></div>
+<a name=3D"id2572153"></a>SIG(0)</h2></div></div></div>
<p>
<acronym class=3D"acronym">BIND</acronym> 9 partially supports DNS=
SEC SIG(0)
transaction signatures as specified in RFC 2535 and RFC 2931.
@@ -807,7 +809,7 @@
</p>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2564117"></a>Generating Keys</h3></div></div></div>
+<a name=3D"id2572221"></a>Generating Keys</h3></div></div></div>
<p>
The <span><strong class=3D"command">dnssec-keygen</strong></span=
> program is used to
generate keys.
@@ -863,7 +865,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2572183"></a>Signing the Zone</h3></div></div></div>
+<a name=3D"id2572300"></a>Signing the Zone</h3></div></div></div>
<p>
The <span><strong class=3D"command">dnssec-signzone</strong></sp=
an> program is used
to sign a zone.
@@ -905,7 +907,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2572264"></a>Configuring Servers</h3></div></div></div>
+<a name=3D"id2572381"></a>Configuring Servers</h3></div></div></div>
<p>
To enable <span><strong class=3D"command">named</strong></span> =
to respond appropriately
to DNS requests from DNSSEC aware clients,
@@ -1065,7 +1067,7 @@
from insecure to signed and back again. A secure zone can use
either NSEC or NSEC3 chains.</p>
<div class=3D"sect2" lang=3D"en"><div class=3D"titlepage"><div><div><h3 cl=
ass=3D"title">
-<a name=3D"id2563484"></a>Converting from insecure to secure</h3></div></d=
iv></div></div>
+<a name=3D"id2571421"></a>Converting from insecure to secure</h3></div></d=
iv></div></div>
<p>Changing a zone from insecure to secure can be done in two
ways: using a dynamic DNS update, or the=20
<span><strong class=3D"command">auto-dnssec</strong></span> zone option.=
</p>
@@ -1091,7 +1093,7 @@
well. An NSEC chain will be generated as part of the initial
signing process.</p>
<div class=3D"sect2" lang=3D"en"><div class=3D"titlepage"><div><div><h3 cl=
ass=3D"title">
-<a name=3D"id2563522"></a>Dynamic DNS update method</h3></div></div></div>=
</div>
+<a name=3D"id2571459"></a>Dynamic DNS update method</h3></div></div></div>=
</div>
<p>To insert the keys via dynamic update:</p>
<pre class=3D"screen">
% nsupdate
@@ -1127,7 +1129,7 @@
<p>While the initial signing and NSEC/NSEC3 chain generation
is happening, other updates are possible as well.</p>
<div class=3D"sect2" lang=3D"en"><div class=3D"titlepage"><div><div><h3 cl=
ass=3D"title">
-<a name=3D"id2563626"></a>Fully automatic zone signing</h3></div></div></d=
iv></div>
+<a name=3D"id2563508"></a>Fully automatic zone signing</h3></div></div></d=
iv></div>
<p>To enable automatic signing, add the=20
<span><strong class=3D"command">auto-dnssec</strong></span> option to th=
e zone statement in=20
<code class=3D"filename">named.conf</code>.=20
@@ -1162,7 +1164,7 @@
configuration. If this has not been done, the configuration will
fail.</p>
<div class=3D"sect2" lang=3D"en"><div class=3D"titlepage"><div><div><h3 cl=
ass=3D"title">
-<a name=3D"id2563777"></a>Private-type records</h3></div></div></div></div>
+<a name=3D"id2563590"></a>Private-type records</h3></div></div></div></div>
<p>The state of the signing process is signaled by
private-type records (with a default type value of 65534). When
signing is complete, these records will have a nonzero value for
@@ -1203,12 +1205,12 @@
<p>
</p>
<div class=3D"sect2" lang=3D"en"><div class=3D"titlepage"><div><div><h3 cl=
ass=3D"title">
-<a name=3D"id2563814"></a>DNSKEY rollovers</h3></div></div></div></div>
+<a name=3D"id2563696"></a>DNSKEY rollovers</h3></div></div></div></div>
<p>As with insecure-to-secure conversions, rolling DNSSEC
keys can be done in two ways: using a dynamic DNS update, or the=20
<span><strong class=3D"command">auto-dnssec</strong></span> zone option.=
</p>
<div class=3D"sect2" lang=3D"en"><div class=3D"titlepage"><div><div><h3 cl=
ass=3D"title">
-<a name=3D"id2563827"></a>Dynamic DNS update method</h3></div></div></div>=
</div>
+<a name=3D"id2563708"></a>Dynamic DNS update method</h3></div></div></div>=
</div>
<p> To perform key rollovers via dynamic update, you need to add
the <code class=3D"filename">K*</code> files for the new keys so that=20
<span><strong class=3D"command">named</strong></span> can find them. You=
can then add the new
@@ -1230,7 +1232,7 @@
<span><strong class=3D"command">named</strong></span> will clean out any=
signatures generated
by the old key after the update completes.</p>
<div class=3D"sect2" lang=3D"en"><div class=3D"titlepage"><div><div><h3 cl=
ass=3D"title">
-<a name=3D"id2563860"></a>Automatic key rollovers</h3></div></div></div></=
div>
+<a name=3D"id2563741"></a>Automatic key rollovers</h3></div></div></div></=
div>
<p>When a new key reaches its activation date (as set by
<span><strong class=3D"command">dnssec-keygen</strong></span> or <span><=
strong class=3D"command">dnssec-settime</strong></span>),
if the <span><strong class=3D"command">auto-dnssec</strong></span> zone =
option is set to=20
@@ -1245,27 +1247,27 @@
completes in 30 days, after which it will be safe to remove the
old key from the DNSKEY RRset.</p>
<div class=3D"sect2" lang=3D"en"><div class=3D"titlepage"><div><div><h3 cl=
ass=3D"title">
-<a name=3D"id2563886"></a>NSEC3PARAM rollovers via UPDATE</h3></div></div>=
</div></div>
+<a name=3D"id2563836"></a>NSEC3PARAM rollovers via UPDATE</h3></div></div>=
</div></div>
<p>Add the new NSEC3PARAM record via dynamic update. When the
new NSEC3 chain has been generated, the NSEC3PARAM flag field
will be zero. At this point you can remove the old NSEC3PARAM
record. The old chain will be removed after the update request
completes.</p>
<div class=3D"sect2" lang=3D"en"><div class=3D"titlepage"><div><div><h3 cl=
ass=3D"title">
-<a name=3D"id2563896"></a>Converting from NSEC to NSEC3</h3></div></div></=
div></div>
+<a name=3D"id2563846"></a>Converting from NSEC to NSEC3</h3></div></div></=
div></div>
<p>To do this, you just need to add an NSEC3PARAM record. When
the conversion is complete, the NSEC chain will have been removed
and the NSEC3PARAM record will have a zero flag field. The NSEC3
chain will be generated before the NSEC chain is
destroyed.</p>
<div class=3D"sect2" lang=3D"en"><div class=3D"titlepage"><div><div><h3 cl=
ass=3D"title">
-<a name=3D"id2563906"></a>Converting from NSEC3 to NSEC</h3></div></div></=
div></div>
+<a name=3D"id2563856"></a>Converting from NSEC3 to NSEC</h3></div></div></=
div></div>
<p>To do this, use <span><strong class=3D"command">nsupdate</strong></span=
> to
remove all NSEC3PARAM records with a zero flag
field. The NSEC chain will be generated before the NSEC3 chain is
removed.</p>
<div class=3D"sect2" lang=3D"en"><div class=3D"titlepage"><div><div><h3 cl=
ass=3D"title">
-<a name=3D"id2563918"></a>Converting from secure to insecure</h3></div></d=
iv></div></div>
+<a name=3D"id2563868"></a>Converting from secure to insecure</h3></div></d=
iv></div></div>
<p>To convert a signed zone to unsigned using dynamic DNS,
delete all the DNSKEY records from the zone apex using
<span><strong class=3D"command">nsupdate</strong></span>. All signatures=
, NSEC or NSEC3 chains,
@@ -1280,14 +1282,14 @@
<span><strong class=3D"command">allow</strong></span> instead (or it wil=
l re-sign).
</p>
<div class=3D"sect2" lang=3D"en"><div class=3D"titlepage"><div><div><h3 cl=
ass=3D"title">
-<a name=3D"id2563956"></a>Periodic re-signing</h3></div></div></div></div>
+<a name=3D"id2563906"></a>Periodic re-signing</h3></div></div></div></div>
<p>In any secure zone which supports dynamic updates, named
will periodically re-sign RRsets which have not been re-signed as
a result of some update action. The signature lifetimes will be
adjusted so as to spread the re-sign load over time rather than
all at once.</p>
<div class=3D"sect2" lang=3D"en"><div class=3D"titlepage"><div><div><h3 cl=
ass=3D"title">
-<a name=3D"id2571816"></a>NSEC3 and OPTOUT</h3></div></div></div></div>
+<a name=3D"id2563915"></a>NSEC3 and OPTOUT</h3></div></div></div></div>
<p>
<span><strong class=3D"command">named</strong></span> only supports crea=
ting new NSEC3 chains
where all the NSEC3 records in the zone have the same OPTOUT
@@ -1309,7 +1311,7 @@
configuration files.</p>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2571869"></a>Validating Resolver</h3></div></div></div>
+<a name=3D"id2571685"></a>Validating Resolver</h3></div></div></div>
<p>To configure a validating resolver to use RFC 5011 to
maintain a trust anchor, configure the trust anchor using a=20
<span><strong class=3D"command">managed-keys</strong></span> statement=
. Information about
@@ -1320,7 +1322,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2571892"></a>Authoritative Server</h3></div></div></div>
+<a name=3D"id2571707"></a>Authoritative Server</h3></div></div></div>
<p>To set up an authoritative zone for RFC 5011 trust anchor
maintenance, generate two (or more) key signing keys (KSKs) for
the zone. Sign the zone with one of them; this is the "active"
@@ -1394,7 +1396,7 @@
Debian Linux, Solaris x86 and Windows Server 2003.</p>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2609757"></a>Prerequisites</h3></div></div></div>
+<a name=3D"id2609970"></a>Prerequisites</h3></div></div></div>
<p>See the HSM vendor documentation for information about
installing, initializing, testing and troubleshooting the
HSM.</p>
@@ -1429,13 +1431,16 @@
other computationally-intensive operations. The AEP Keyper
is an example of such a device.</p></li>
</ul></div>
-<p>The modified OpenSSL code is included in the BIND 9.7.0
- release, in the form of a context diff against the latest OpenSSL.
+<p>The modified OpenSSL code is included in the BIND 9 release,
+ in the form of a context diff against the latest verions of
+ OpenSSL. OpenSSL 0.9.8 and 1.0.0 are both supported; there are
+ separate diffs for each version. In the examples to follow,
+ we use OpenSSL 0.9.8, but the same methods work with OpenSSL 1.0.0.
</p>
<div class=3D"note" style=3D"margin-left: 0.5in; margin-right: 0.5in;">
<h3 class=3D"title">Note</h3>
- The latest OpenSSL version at the time of the BIND release
- is 0.9.8l.
+ The latest OpenSSL versions at the time of the BIND release
+ are 0.9.8s and 1.0.0f.
ISC will provide an updated patch as new versions of OpenSSL
are released. The version number in the following examples
is expected to change.</div>
@@ -1444,18 +1449,18 @@
necessary to build OpenSSL with this patch in place and inform
it of the path to the HSM-specific PKCS #11 provider
library.</p>
-<p>Obtain OpenSSL 0.9.8l:</p>
+<p>Obtain OpenSSL 0.9.8s:</p>
<pre class=3D"screen">
-$ <strong class=3D"userinput"><code>wget <a href=3D"" target=3D"_top">http=
://www.openssl.org/source/openssl-0.9.8l.tar.gz</a></code></strong>
+$ <strong class=3D"userinput"><code>wget <a href=3D"" target=3D"_top">http=
://www.openssl.org/source/openssl-0.9.8s.tar.gz</a></code></strong>
</pre>
<p>Extract the tarball:</p>
<pre class=3D"screen">
-$ <strong class=3D"userinput"><code>tar zxf openssl-0.9.8l.tar.gz</code></=
strong>
+$ <strong class=3D"userinput"><code>tar zxf openssl-0.9.8s.tar.gz</code></=
strong>
</pre>
<p>Apply the patch from the BIND 9 release:</p>
<pre class=3D"screen">
-$ <strong class=3D"userinput"><code>patch -p1 -d openssl-0.9.8l \
- < bind-9.7.0/bin/pkcs11/openssl-0.9.8l-patch</code></strong>
+$ <strong class=3D"userinput"><code>patch -p1 -d openssl-0.9.8s \
+ < bind9/bin/pkcs11/openssl-0.9.8s-patch</code></strong>
</pre>
<div class=3D"note" style=3D"margin-left: 0.5in; margin-right: 0.5in;">
<h3 class=3D"title">Note</h3>(Note that the patch file may not be compatib=
le with the
@@ -1468,7 +1473,7 @@
when we configure BIND 9.</p>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2607669"></a>Building OpenSSL for the AEP Keyper on Linux</h4=
></div></div></div>
+<a name=3D"id2607881"></a>Building OpenSSL for the AEP Keyper on Linux</h4=
></div></div></div>
<p>The AEP Keyper is a highly secure key storage device,
but does not provide hardware cryptographic acceleration. It
can carry out cryptographic operations, but it is probably
@@ -1487,7 +1492,7 @@
<p>Finally, the Keyper library requires threads, so we
must specify -pthread.</p>
<pre class=3D"screen">
-$ <strong class=3D"userinput"><code>cd openssl-0.9.8l</code></strong>
+$ <strong class=3D"userinput"><code>cd openssl-0.9.8s</code></strong>
$ <strong class=3D"userinput"><code>./Configure linux-generic32 -m32 -pthr=
ead \
--pk11-libname=3D/opt/pkcs11/usr/lib/libpkcs11.so \
--pk11-flavor=3Dsign-only \
@@ -1500,7 +1505,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2607806"></a>Building OpenSSL for the SCA 6000 on Solaris</h4=
></div></div></div>
+<a name=3D"id2608019"></a>Building OpenSSL for the SCA 6000 on Solaris</h4=
></div></div></div>
<p>The SCA-6000 PKCS #11 provider is installed as a system
library, libpkcs11. It is a true crypto accelerator, up to 4
times faster than any CPU, so the flavor shall be
@@ -1508,7 +1513,7 @@
<p>In this example, we are building on Solaris x86 on an
AMD64 system.</p>
<pre class=3D"screen">
-$ <strong class=3D"userinput"><code>cd openssl-0.9.8l</code></strong>
+$ <strong class=3D"userinput"><code>cd openssl-0.9.8s</code></strong>
$ <strong class=3D"userinput"><code>./Configure solaris64-x86_64-cc \
--pk11-libname=3D/usr/lib/64/libpkcs11.so \
--pk11-flavor=3Dcrypto-accelerator \
@@ -1519,11 +1524,50 @@
<p>After configuring, run=20
<span><strong class=3D"command">make</strong></span> and=20
<span><strong class=3D"command">make test</strong></span>.</p>
+</div>
+<div class=3D"sect3" lang=3D"en">
+<div class=3D"titlepage"><div><div><h4 class=3D"title">
+<a name=3D"id2608068"></a>Building OpenSSL for SoftHSM</h4></div></div></d=
iv>
+<p>SoftHSM is a software library provided by the OpenDNSSEC
+ project (http://www.opendnssec.org) which provides a PKCS#11
+ interface to a virtual HSM, implemented in the form of encrypted
+ data on the local filesystem. It uses the Botan library for
+ encryption and SQLite3 for data storage. Though less secure
+ than a true HSM, it can provide more secure key storage than
+ traditional key files, and can allow you to experiment with
+ PKCS#11 when an HSM is not available.</p>
+<p>The SoftHSM cryptographic store must be installed and
+ initialized before using it with OpenSSL, and the SOFTHSM_CONF
+ environment variable must always point to the SoftHSM configuration
+ file:</p>
+<pre class=3D"screen">
+$ <strong class=3D"userinput"><code> cd softhsm-1.3.0 </code></strong>
+$ <strong class=3D"userinput"><code> configure --prefix=3D/opt/pkcs11/usr =
</code></strong>
+$ <strong class=3D"userinput"><code> make </code></strong>
+$ <strong class=3D"userinput"><code> make install </code></strong>
+$ <strong class=3D"userinput"><code> export SOFTHSM_CONF=3D/opt/pkcs11/sof=
thsm.conf </code></strong>
+$ <strong class=3D"userinput"><code> echo "0:/opt/pkcs11/softhsm.db" > =
$SOFTHSM_CONF </code></strong>
+$ <strong class=3D"userinput"><code> /opt/pkcs11/usr/bin/softhsm --init-to=
ken 0 --slot 0 --label softhsm </code></strong>
+</pre>
+<p>SoftHSM can perform all cryptographic operations, but
+ since it only uses your system CPU, there is no need to use it
+ for anything but signing. Therefore, we choose the 'sign-only'
+ flavor when building OpenSSL.</p>
+<pre class=3D"screen">
+$ <strong class=3D"userinput"><code>cd openssl-0.9.8s</code></strong>
+$ <strong class=3D"userinput"><code>./Configure linux-x86_64 -pthread \
+ --pk11-libname=3D/opt/pkcs11/usr/lib/libpkcs11.so \
+ --pk11-flavor=3Dsign-only \
+ --prefix=3D/opt/pkcs11/usr</code></strong>
+</pre>
+<p>After configuring, run "<span><strong class=3D"command">make</strong></=
span>"
+ and "<span><strong class=3D"command">make test</strong></span>".</p>
+</div>
<p>Once you have built OpenSSL, run
- "<span><strong class=3D"command">apps/openssl engine pkcs11</strong>=
</span>" to confirm
- that PKCS #11 support was compiled in correctly. The output
- should be one of the following lines, depending on the flavor
- selected:</p>
+ "<span><strong class=3D"command">apps/openssl engine pkcs11</strong></=
span>" to confirm
+ that PKCS #11 support was compiled in correctly. The output
+ should be one of the following lines, depending on the flavor
+ selected:</p>
<pre class=3D"screen">
(pkcs11) PKCS #11 engine support (sign only)
</pre>
@@ -1532,24 +1576,23 @@
(pkcs11) PKCS #11 engine support (crypto accelerator)
</pre>
<p>Next, run
- "<span><strong class=3D"command">apps/openssl engine pkcs11 -t</stro=
ng></span>". This will
- attempt to initialize the PKCS #11 engine. If it is able to
- do so successfully, it will report
- “<span class=3D"quote"><code class=3D"literal">[ available ]</=
code></span>”.</p>
+ "<span><strong class=3D"command">apps/openssl engine pkcs11 -t</strong=
></span>". This will
+ attempt to initialize the PKCS #11 engine. If it is able to
+ do so successfully, it will report
+ “<span class=3D"quote"><code class=3D"literal">[ available ]</co=
de></span>”.</p>
<p>If the output is correct, run
- "<span><strong class=3D"command">make install</strong></span>" which=
will install the
- modified OpenSSL suite to=20
- <code class=3D"filename">/opt/pkcs11/usr</code>.</p>
-</div>
+ "<span><strong class=3D"command">make install</strong></span>" which w=
ill install the
+ modified OpenSSL suite to=20
+ <code class=3D"filename">/opt/pkcs11/usr</code>.</p>
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2607912"></a>Building BIND 9 with PKCS#11</h3></div></div></d=
iv>
+<a name=3D"id2608219"></a>Building BIND 9 with PKCS#11</h3></div></div></d=
iv>
<p>When building BIND 9, the location of the custom-built
OpenSSL library must be specified via configure.</p>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2607921"></a>Configuring BIND 9 for Linux</h4></div></div></d=
iv>
+<a name=3D"id2608228"></a>Configuring BIND 9 for Linux with the AEP Keyper=
</h4></div></div></div>
<p>To link with the PKCS #11 provider, threads must be
enabled in the BIND 9 build.</p>
<p>The PKCS #11 library for the AEP Keyper is currently
@@ -1557,7 +1600,7 @@
64-bit host, we must force a 32-bit build by adding "-m32" to
the CC options on the "configure" command line.</p>
<pre class=3D"screen">
-$ <strong class=3D"userinput"><code>cd ../bind-9.7.0</code></strong>
+$ <strong class=3D"userinput"><code>cd ../bind9</code></strong>
$ <strong class=3D"userinput"><code>./configure CC=3D"gcc -m32" --enable-t=
hreads \
--with-openssl=3D/opt/pkcs11/usr \
--with-pkcs11=3D/opt/pkcs11/usr/lib/libpkcs11.so</code></strong>
@@ -1565,11 +1608,11 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2608020"></a>Configuring BIND 9 for Solaris</h4></div></div><=
/div>
+<a name=3D"id2608260"></a>Configuring BIND 9 for Solaris with the SCA 6000=
</h4></div></div></div>
<p>To link with the PKCS #11 provider, threads must be
enabled in the BIND 9 build.</p>
<pre class=3D"screen">
-$ <strong class=3D"userinput"><code>cd ../bind-9.7.0</code></strong>
+$ <strong class=3D"userinput"><code>cd ../bind9</code></strong>
$ <strong class=3D"userinput"><code>./configure CC=3D"cc -xarch=3Damd64" -=
-enable-threads \
--with-openssl=3D/opt/pkcs11/usr \
--with-pkcs11=3D/usr/lib/64/libpkcs11.so</code></strong>
@@ -1581,14 +1624,26 @@
same as the --prefix argument to the OpenSSL
Configure).</p>
</div>
+<div class=3D"sect3" lang=3D"en">
+<div class=3D"titlepage"><div><div><h4 class=3D"title">
+<a name=3D"id2610481"></a>Configuring BIND 9 for SoftHSM</h4></div></div><=
/div>
+<pre class=3D"screen">
+$ <strong class=3D"userinput"><code>cd ../bind9</code></strong>
+$ <strong class=3D"userinput"><code>./configure --enable-threads \
+ --with-openssl=3D/opt/pkcs11/usr \
+ --with-pkcs11=3D/opt/pkcs11/usr/lib/libpkcs11.so</code></strong>
+</pre>
+</div>
<p>After configuring, run
"<span><strong class=3D"command">make</strong></span>",
"<span><strong class=3D"command">make test</strong></span>" and
"<span><strong class=3D"command">make install</strong></span>".</p>
+<p>(Note: If "make test" fails in the "pkcs11" system test, you may
+ have forgotten to set the SOFTHSM_CONF environment variable.)</p>
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2608144"></a>PKCS #11 Tools</h3></div></div></div>
+<a name=3D"id2610529"></a>PKCS #11 Tools</h3></div></div></div>
<p>BIND 9 includes a minimal set of tools to operate the
HSM, including=20
<span><strong class=3D"command">pkcs11-keygen</strong></span> to gener=
ate a new key pair
@@ -1606,7 +1661,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2608174"></a>Using the HSM</h3></div></div></div>
+<a name=3D"id2610560"></a>Using the HSM</h3></div></div></div>
<p>First, we must set up the runtime environment so the
OpenSSL and PKCS #11 libraries can be loaded:</p>
<pre class=3D"screen">
@@ -1694,7 +1749,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2610353"></a>Specifying the engine on the command line</h3></=
div></div></div>
+<a name=3D"id2635129"></a>Specifying the engine on the command line</h3></=
div></div></div>
<p>The OpenSSL engine can be specified in=20
<span><strong class=3D"command">named</strong></span> and all of the B=
IND=20
<span><strong class=3D"command">dnssec-*</strong></span> tools by usin=
g the "-E
@@ -1715,7 +1770,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2610467"></a>Running named with automatic zone re-signing</h3=
></div></div></div>
+<a name=3D"id2635243"></a>Running named with automatic zone re-signing</h3=
></div></div></div>
<p>If you want=20
<span><strong class=3D"command">named</strong></span> to dynamically r=
e-sign zones using HSM
keys, and/or to to sign new records inserted via nsupdate, then
@@ -1751,7 +1806,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2572484"></a>IPv6 Support in <acronym class=3D"acronym">BIND<=
/acronym> 9</h2></div></div></div>
+<a name=3D"id2572669"></a>IPv6 Support in <acronym class=3D"acronym">BIND<=
/acronym> 9</h2></div></div></div>
<p>
<acronym class=3D"acronym">BIND</acronym> 9 fully supports all cur=
rently
defined forms of IPv6 name to address and address to name
@@ -1789,7 +1844,7 @@
</p>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2572819"></a>Address Lookups Using AAAA Records</h3></div></d=
iv></div>
+<a name=3D"id2572868"></a>Address Lookups Using AAAA Records</h3></div></d=
iv></div>
<p>
The IPv6 AAAA record is a parallel to the IPv4 A record,
and, unlike the deprecated A6 record, specifies the entire
@@ -1808,7 +1863,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2572840"></a>Address to Name Lookups Using Nibble Format</h3>=
</div></div></div>
+<a name=3D"id2572889"></a>Address to Name Lookups Using Nibble Format</h3>=
</div></div></div>
<p>
When looking up an address in nibble format, the address
components are simply reversed, just as in IPv4, and
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/Bv9ARM.ch05=
.html
--- a/head/contrib/bind9/doc/arm/Bv9ARM.ch05.html Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/doc/arm/Bv9ARM.ch05.html Tue Apr 17 11:51:51 2012 =
+0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: Bv9ARM.ch05.html,v 1.93.14.1 2011-05-24 02:37:16 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -45,13 +45,13 @@
<div class=3D"toc">
<p><b>Table of Contents</b></p>
<dl>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch05.html#id2572873">The Light=
weight Resolver Library</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch05.html#id2572922">The Light=
weight Resolver Library</a></span></dt>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch05.html#lwresd">Running a Re=
solver Daemon</a></span></dt>
</dl>
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2572873"></a>The Lightweight Resolver Library</h2></div></div=
></div>
+<a name=3D"id2572922"></a>The Lightweight Resolver Library</h2></div></div=
></div>
<p>
Traditionally applications have been linked with a stub resolver
library that sends recursive DNS queries to a local caching name
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/Bv9ARM.ch06=
.html
--- a/head/contrib/bind9/doc/arm/Bv9ARM.ch06.html Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/doc/arm/Bv9ARM.ch06.html Tue Apr 17 11:51:51 2012 =
+0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: Bv9ARM.ch06.html,v 1.275.8.10 2011-08-03 02:35:13 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -48,58 +48,58 @@
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch06.html#configuration_file_e=
lements">Configuration File Elements</a></span></dt>
<dd><dl>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#address_match_lists"=
>Address Match Lists</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2574283">Comment S=
yntax</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2574332">Comment S=
yntax</a></span></dt>
</dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch06.html#Configuration_File_G=
rammar">Configuration File Grammar</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2574937"><span><st=
rong class=3D"command">acl</strong></span> Statement Grammar</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2574986"><span><st=
rong class=3D"command">acl</strong></span> Statement Grammar</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#acl"><span><strong c=
lass=3D"command">acl</strong></span> Statement Definition and
Usage</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575127"><span><st=
rong class=3D"command">controls</strong></span> Statement Grammar</a></span=
></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575176"><span><st=
rong class=3D"command">controls</strong></span> Statement Grammar</a></span=
></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#controls_statement_d=
efinition_and_usage"><span><strong class=3D"command">controls</strong></spa=
n> Statement Definition and
Usage</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575418"><span><st=
rong class=3D"command">include</strong></span> Statement Grammar</a></span>=
</dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575504"><span><st=
rong class=3D"command">include</strong></span> Statement Definition and
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575467"><span><st=
rong class=3D"command">include</strong></span> Statement Grammar</a></span>=
</dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575484"><span><st=
rong class=3D"command">include</strong></span> Statement Definition and
Usage</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575527"><span><st=
rong class=3D"command">key</strong></span> Statement Grammar</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575550"><span><st=
rong class=3D"command">key</strong></span> Statement Definition and Usage</=
a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575709"><span><st=
rong class=3D"command">logging</strong></span> Statement Grammar</a></span>=
</dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575835"><span><st=
rong class=3D"command">logging</strong></span> Statement Definition and
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575576"><span><st=
rong class=3D"command">key</strong></span> Statement Grammar</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575600"><span><st=
rong class=3D"command">key</strong></span> Statement Definition and Usage</=
a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575758"><span><st=
rong class=3D"command">logging</strong></span> Statement Grammar</a></span>=
</dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575884"><span><st=
rong class=3D"command">logging</strong></span> Statement Definition and
Usage</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2577834"><span><st=
rong class=3D"command">lwres</strong></span> Statement Grammar</a></span></=
dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2577908"><span><st=
rong class=3D"command">lwres</strong></span> Statement Definition and Usage=
</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2578040"><span><st=
rong class=3D"command">masters</strong></span> Statement Grammar</a></span>=
</dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2578084"><span><st=
rong class=3D"command">masters</strong></span> Statement Definition and
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2577910"><span><st=
rong class=3D"command">lwres</strong></span> Statement Grammar</a></span></=
dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2577984"><span><st=
rong class=3D"command">lwres</strong></span> Statement Definition and Usage=
</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2578116"><span><st=
rong class=3D"command">masters</strong></span> Statement Grammar</a></span>=
</dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2578160"><span><st=
rong class=3D"command">masters</strong></span> Statement Definition and
Usage</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2578099"><span><st=
rong class=3D"command">options</strong></span> Statement Grammar</a></span>=
</dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2578174"><span><st=
rong class=3D"command">options</strong></span> Statement Grammar</a></span>=
</dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#options"><span><stro=
ng class=3D"command">options</strong></span> Statement Definition and
Usage</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#server_statement_gra=
mmar"><span><strong class=3D"command">server</strong></span> Statement Gram=
mar</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#server_statement_def=
inition_and_usage"><span><strong class=3D"command">server</strong></span> S=
tatement Definition and
Usage</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#statschannels"><span=
><strong class=3D"command">statistics-channels</strong></span> Statement Gr=
ammar</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2589395"><span><st=
rong class=3D"command">statistics-channels</strong></span> Statement Defini=
tion and
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2589481"><span><st=
rong class=3D"command">statistics-channels</strong></span> Statement Defini=
tion and
Usage</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#trusted-keys"><span>=
<strong class=3D"command">trusted-keys</strong></span> Statement Grammar</a=
></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2589534"><span><st=
rong class=3D"command">trusted-keys</strong></span> Statement Definition
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2589689"><span><st=
rong class=3D"command">trusted-keys</strong></span> Statement Definition
and Usage</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2589581"><span><st=
rong class=3D"command">managed-keys</strong></span> Statement Grammar</a></=
span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2589736"><span><st=
rong class=3D"command">managed-keys</strong></span> Statement Grammar</a></=
span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#managed-keys"><span>=
<strong class=3D"command">managed-keys</strong></span> Statement Definition
and Usage</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#view_statement_gramm=
ar"><span><strong class=3D"command">view</strong></span> Statement Grammar<=
/a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2590007"><span><st=
rong class=3D"command">view</strong></span> Statement Definition and Usage<=
/a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2590162"><span><st=
rong class=3D"command">view</strong></span> Statement Definition and Usage<=
/a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#zone_statement_gramm=
ar"><span><strong class=3D"command">zone</strong></span>
Statement Grammar</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2591558"><span><st=
rong class=3D"command">zone</strong></span> Statement Definition and Usage<=
/a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2591713"><span><st=
rong class=3D"command">zone</strong></span> Statement Definition and Usage<=
/a></span></dt>
</dl></dd>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch06.html#id2595030">Zone File=
</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch06.html#id2595116">Zone File=
</a></span></dt>
<dd><dl>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#types_of_resource_re=
cords_and_when_to_use_them">Types of Resource Records and When to Use Them<=
/a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2597260">Discussio=
n of MX Records</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2597415">Discussio=
n of MX Records</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#Setting_TTLs">Settin=
g TTLs</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2597876">Inverse M=
apping in IPv4</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2598003">Other Zon=
e File Directives</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2598276"><acronym =
class=3D"acronym">BIND</acronym> Master File Extension: the <span><strong =
class=3D"command">$GENERATE</strong></span> Directive</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2597962">Inverse M=
apping in IPv4</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2598157">Other Zon=
e File Directives</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2598430"><acronym =
class=3D"acronym">BIND</acronym> Master File Extension: the <span><strong =
class=3D"command">$GENERATE</strong></span> Directive</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#zonefile_format">Add=
itional File Formats</a></span></dt>
</dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch06.html#statistics">BIND9 St=
atistics</a></span></dt>
@@ -477,7 +477,7 @@
<a name=3D"address_match_lists"></a>Address Match Lists</h3></div></div></=
div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2574050"></a>Syntax</h4></div></div></div>
+<a name=3D"id2574099"></a>Syntax</h4></div></div></div>
<pre class=3D"programlisting"><code class=3D"varname">address_match_list</=
code> =3D address_match_list_element ;
[<span class=3D"optional"> address_match_list_element; ... </span>]
<code class=3D"varname">address_match_list_element</code> =3D [<span class=
=3D"optional"> ! </span>] (ip_address [<span class=3D"optional">/length</sp=
an>] |
@@ -486,7 +486,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2574077"></a>Definition and Usage</h4></div></div></div>
+<a name=3D"id2574126"></a>Definition and Usage</h4></div></div></div>
<p>
Address match lists are primarily used to determine access
control for various server operations. They are also used in
@@ -570,7 +570,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2574283"></a>Comment Syntax</h3></div></div></div>
+<a name=3D"id2574332"></a>Comment Syntax</h3></div></div></div>
<p>
The <acronym class=3D"acronym">BIND</acronym> 9 comment syntax a=
llows for
comments to appear
@@ -580,7 +580,7 @@
</p>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2574298"></a>Syntax</h4></div></div></div>
+<a name=3D"id2574347"></a>Syntax</h4></div></div></div>
<p>
</p>
<pre class=3D"programlisting">/* This is a <acronym class=3D"acronym">BIND=
</acronym> comment as in C */</pre>
@@ -596,7 +596,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2574328"></a>Definition and Usage</h4></div></div></div>
+<a name=3D"id2574377"></a>Definition and Usage</h4></div></div></div>
<p>
Comments may appear anywhere that whitespace may appear in
a <acronym class=3D"acronym">BIND</acronym> configuration file.
@@ -848,7 +848,7 @@
</p>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2574937"></a><span><strong class=3D"command">acl</strong></sp=
an> Statement Grammar</h3></div></div></div>
+<a name=3D"id2574986"></a><span><strong class=3D"command">acl</strong></sp=
an> Statement Grammar</h3></div></div></div>
<pre class=3D"programlisting"><span><strong class=3D"command">acl</strong>=
</span> acl-name {
address_match_list
};
@@ -930,7 +930,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2575127"></a><span><strong class=3D"command">controls</strong=
></span> Statement Grammar</h3></div></div></div>
+<a name=3D"id2575176"></a><span><strong class=3D"command">controls</strong=
></span> Statement Grammar</h3></div></div></div>
<pre class=3D"programlisting"><span><strong class=3D"command">controls</st=
rong></span> {
[ inet ( ip_addr | * ) [ port ip_port ]
allow { <em class=3D"replaceable"><code> address_match_lis=
t </code></em> }
@@ -1054,12 +1054,12 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2575418"></a><span><strong class=3D"command">include</strong>=
</span> Statement Grammar</h3></div></div></div>
+<a name=3D"id2575467"></a><span><strong class=3D"command">include</strong>=
</span> Statement Grammar</h3></div></div></div>
<pre class=3D"programlisting"><span><strong class=3D"command">include</str=
ong></span> <em class=3D"replaceable"><code>filename</code></em>;</pre>
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2575504"></a><span><strong class=3D"command">include</strong>=
</span> Statement Definition and
+<a name=3D"id2575484"></a><span><strong class=3D"command">include</strong>=
</span> Statement Definition and
Usage</h3></div></div></div>
<p>
The <span><strong class=3D"command">include</strong></span> stat=
ement inserts the
@@ -1074,7 +1074,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2575527"></a><span><strong class=3D"command">key</strong></sp=
an> Statement Grammar</h3></div></div></div>
+<a name=3D"id2575576"></a><span><strong class=3D"command">key</strong></sp=
an> Statement Grammar</h3></div></div></div>
<pre class=3D"programlisting"><span><strong class=3D"command">key</strong>=
</span> <em class=3D"replaceable"><code>key_id</code></em> {
algorithm <em class=3D"replaceable"><code>string</code></em>;
secret <em class=3D"replaceable"><code>string</code></em>;
@@ -1083,7 +1083,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2575550"></a><span><strong class=3D"command">key</strong></sp=
an> Statement Definition and Usage</h3></div></div></div>
+<a name=3D"id2575600"></a><span><strong class=3D"command">key</strong></sp=
an> Statement Definition and Usage</h3></div></div></div>
<p>
The <span><strong class=3D"command">key</strong></span> statemen=
t defines a shared
secret key for use with TSIG (see <a href=3D"Bv9ARM.ch04.html#ts=
ig" title=3D"TSIG">the section called “TSIG”</a>)
@@ -1130,7 +1130,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2575709"></a><span><strong class=3D"command">logging</strong>=
</span> Statement Grammar</h3></div></div></div>
+<a name=3D"id2575758"></a><span><strong class=3D"command">logging</strong>=
</span> Statement Grammar</h3></div></div></div>
<pre class=3D"programlisting"><span><strong class=3D"command">logging</str=
ong></span> {
[ <span><strong class=3D"command">channel</strong></span> <em class=3D"=
replaceable"><code>channel_name</code></em> {
( <span><strong class=3D"command">file</strong></span> <em class=3D"r=
eplaceable"><code>path_name</code></em>
@@ -1154,7 +1154,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2575835"></a><span><strong class=3D"command">logging</strong>=
</span> Statement Definition and
+<a name=3D"id2575884"></a><span><strong class=3D"command">logging</strong>=
</span> Statement Definition and
Usage</h3></div></div></div>
<p>
The <span><strong class=3D"command">logging</strong></span> stat=
ement configures a
@@ -1188,7 +1188,7 @@
</p>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2575888"></a>The <span><strong class=3D"command">channel</str=
ong></span> Phrase</h4></div></div></div>
+<a name=3D"id2576005"></a>The <span><strong class=3D"command">channel</str=
ong></span> Phrase</h4></div></div></div>
<p>
All log output goes to one or more <span class=3D"emphasis"><e=
m>channels</em></span>;
you can make as many of them as you want.
@@ -1748,12 +1748,25 @@
</p>
</td>
</tr>
+<tr>
+<td>
+ <p><span><strong class=3D"command">RPZ</strong></span>=
</p>
+ </td>
+<td>
+ <p>
+ Information about errors in response policy zone fil=
es,
+ rewritten responses, and at the highest
+ <span><strong class=3D"command">debug</strong></span=
> levels, mere rewriting
+ attempts.
+ </p>
+ </td>
+</tr>
</tbody>
</table></div>
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2577315"></a>The <span><strong class=3D"command">query-errors=
</strong></span> Category</h4></div></div></div>
+<a name=3D"id2577322"></a>The <span><strong class=3D"command">query-errors=
</strong></span> Category</h4></div></div></div>
<p>
The <span><strong class=3D"command">query-errors</strong></spa=
n> category is
specifically intended for debugging purposes: To identify
@@ -1981,7 +1994,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2577834"></a><span><strong class=3D"command">lwres</strong></=
span> Statement Grammar</h3></div></div></div>
+<a name=3D"id2577910"></a><span><strong class=3D"command">lwres</strong></=
span> Statement Grammar</h3></div></div></div>
<p>
This is the grammar of the <span><strong class=3D"command">lwre=
s</strong></span>
statement in the <code class=3D"filename">named.conf</code> file:
@@ -1997,7 +2010,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2577908"></a><span><strong class=3D"command">lwres</strong></=
span> Statement Definition and Usage</h3></div></div></div>
+<a name=3D"id2577984"></a><span><strong class=3D"command">lwres</strong></=
span> Statement Definition and Usage</h3></div></div></div>
<p>
The <span><strong class=3D"command">lwres</strong></span> statem=
ent configures the
name
@@ -2048,7 +2061,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2578040"></a><span><strong class=3D"command">masters</strong>=
</span> Statement Grammar</h3></div></div></div>
+<a name=3D"id2578116"></a><span><strong class=3D"command">masters</strong>=
</span> Statement Grammar</h3></div></div></div>
<pre class=3D"programlisting">
<span><strong class=3D"command">masters</strong></span> <em class=3D"repla=
ceable"><code>name</code></em> [<span class=3D"optional">port <em class=3D"=
replaceable"><code>ip_port</code></em></span>] { ( <em class=3D"replaceable=
"><code>masters_list</code></em> |=20
<em class=3D"replaceable"><code>ip_addr</code></em> [<span class=3D"=
optional">port <em class=3D"replaceable"><code>ip_port</code></em></span>] =
[<span class=3D"optional">key <em class=3D"replaceable"><code>key</code></e=
m></span>] ) ; [<span class=3D"optional">...</span>] };
@@ -2056,7 +2069,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2578084"></a><span><strong class=3D"command">masters</strong>=
</span> Statement Definition and
+<a name=3D"id2578160"></a><span><strong class=3D"command">masters</strong>=
</span> Statement Definition and
Usage</h3></div></div></div>
<p><span><strong class=3D"command">masters</strong></span>
lists allow for a common set of masters to be easily used by
@@ -2065,7 +2078,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2578099"></a><span><strong class=3D"command">options</strong>=
</span> Statement Grammar</h3></div></div></div>
+<a name=3D"id2578174"></a><span><strong class=3D"command">options</strong>=
</span> Statement Grammar</h3></div></div></div>
<p>
This is the grammar of the <span><strong class=3D"command">optio=
ns</strong></span>
statement in the <code class=3D"filename">named.conf</code> file:
@@ -2086,6 +2099,10 @@
[<span class=3D"optional"> cache-file <em class=3D"replaceable"><code>=
path_name</code></em>; </span>]
[<span class=3D"optional"> dump-file <em class=3D"replaceable"><code>p=
ath_name</code></em>; </span>]
[<span class=3D"optional"> bindkeys-file <em class=3D"replaceable"><co=
de>path_name</code></em>; </span>]
+ [<span class=3D"optional"> secroots-file <em class=3D"replaceable"><co=
de>path_name</code></em>; </span>]
+ [<span class=3D"optional"> session-keyfile <em class=3D"replaceable"><=
code>path_name</code></em>; </span>]
+ [<span class=3D"optional"> session-keyname <em class=3D"replaceable"><=
code>key_name</code></em>; </span>]
+ [<span class=3D"optional"> session-keyalg <em class=3D"replaceable"><c=
ode>algorithm_id</code></em>; </span>]
[<span class=3D"optional"> memstatistics <em class=3D"replaceable"><co=
de>yes_or_no</code></em>; </span>]
[<span class=3D"optional"> memstatistics-file <em class=3D"replaceable=
"><code>path_name</code></em>; </span>]
[<span class=3D"optional"> pid-file <em class=3D"replaceable"><code>pa=
th_name</code></em>; </span>]
@@ -2111,7 +2128,8 @@
[<span class=3D"optional"> ixfr-from-differences (<em class=3D"replace=
able"><code>yes_or_no</code></em> | <code class=3D"constant">master</code> =
| <code class=3D"constant">slave</code>); </span>]
[<span class=3D"optional"> dnssec-enable <em class=3D"replaceable"><co=
de>yes_or_no</code></em>; </span>]
[<span class=3D"optional"> dnssec-validation (<em class=3D"replaceable=
"><code>yes_or_no</code></em> | <code class=3D"constant">auto</code>); </sp=
an>]
- [<span class=3D"optional"> dnssec-lookaside ( <em class=3D"replaceable=
"><code>auto</code></em> |=20
+ [<span class=3D"optional"> dnssec-lookaside ( <em class=3D"replaceable=
"><code>auto</code></em> |
+ <em class=3D"replaceable"><code>no</code></em> |
<em class=3D"replaceable"><code>domain</code></em>=
trust-anchor <em class=3D"replaceable"><code>domain</code></em> ); </span>]
[<span class=3D"optional"> dnssec-must-be-secure <em class=3D"replacea=
ble"><code>domain yes_or_no</code></em>; </span>]
[<span class=3D"optional"> dnssec-accept-expired <em class=3D"replacea=
ble"><code>yes_or_no</code></em>; </span>]
@@ -2259,7 +2277,7 @@
[<span class=3D"optional"> resolver-query-timeout <em class=3D"replace=
able"><code>number</code></em> ; </span>]
[<span class=3D"optional"> deny-answer-addresses { <em class=3D"replac=
eable"><code>address_match_list</code></em> } [<span class=3D"optional"> ex=
cept-from { <em class=3D"replaceable"><code>namelist</code></em> } </span>]=
;</span>]
[<span class=3D"optional"> deny-answer-aliases { <em class=3D"replacea=
ble"><code>namelist</code></em> } [<span class=3D"optional"> except-from { =
<em class=3D"replaceable"><code>namelist</code></em> } </span>];</span>]
- [<span class=3D"optional"> response-policy { <em class=3D"replaceable"=
><code>zone_name</code></em> [<span class=3D"optional"> policy <em class=3D=
"replaceable"><code>given</code></em> | <em class=3D"replaceable"><code>no-=
op</code></em> | <em class=3D"replaceable"><code>nxdomain</code></em> | <em=
class=3D"replaceable"><code>nodata</code></em> | <em class=3D"replaceable"=
><code>cname domain</code></em> </span>] ; } ; </span>]
+ [<span class=3D"optional"> response-policy { <em class=3D"replaceable"=
><code>zone_name</code></em> [<span class=3D"optional"> policy given | disa=
bled | passthru | nxdomain | nodata | cname <em class=3D"replaceable"><code=
>domain</code></em> </span>] ; } ; </span>]
};
</pre>
</div>
@@ -2517,7 +2535,8 @@
The pathname of the file the server dumps
security roots to when instructed to do so with
<span><strong class=3D"command">rndc secroots</strong></sp=
an>.
- If not specified, the default is <code class=3D"filename">=
named.secroots</code>.
+ If not specified, the default is
+ <code class=3D"filename">named.secroots</code>.
</p></dd>
<dt><span class=3D"term"><span><strong class=3D"command">session-keyfile</=
strong></span></span></dt>
<dd><p>
@@ -2543,14 +2562,6 @@
hmac-sha384, hmac-sha512 and hmac-md5. If not
specified, the default is hmac-sha256.
</p></dd>
-<dt><span class=3D"term"><span><strong class=3D"command">session-keyfile</=
strong></span></span></dt>
-<dd><p>
- The pathname of the file into which to write a session TSIG
- key for use by <span><strong class=3D"command">nsupdate -l=
</strong></span>. (See the
- discussion of the <span><strong class=3D"command">update-p=
olicy</strong></span>
- statement's <strong class=3D"userinput"><code>local</code>=
</strong> option for more
- details on this feature.)
- </p></dd>
<dt><span class=3D"term"><span><strong class=3D"command">port</strong></sp=
an></span></dt>
<dd><p>
The UDP/TCP port number the server uses for
@@ -2663,6 +2674,11 @@
used, along with a built-in key for validation.
</p>
<p>
+ If <span><strong class=3D"command">dnssec-lookaside</stron=
g></span> is set to
+ <strong class=3D"userinput"><code>no</code></strong>, then=
dnssec-lookaside
+ is not used.
+ </p>
+<p>
The default DLV key is stored in the file
<code class=3D"filename">bind.keys</code>;
<span><strong class=3D"command">named</strong></span> will=
load that key at
@@ -3649,7 +3665,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2583636"></a>Forwarding</h4></div></div></div>
+<a name=3D"id2583643"></a>Forwarding</h4></div></div></div>
<p>
The forwarding facility can be used to create a large site-wide
cache on a few servers, reducing traffic over links to external
@@ -3693,7 +3709,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2583763"></a>Dual-stack Servers</h4></div></div></div>
+<a name=3D"id2583702"></a>Dual-stack Servers</h4></div></div></div>
<p>
Dual-stack servers are used as servers of last resort to work
around
@@ -3904,7 +3920,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2584382"></a>Interfaces</h4></div></div></div>
+<a name=3D"id2584322"></a>Interfaces</h4></div></div></div>
<p>
The interfaces and ports that the server will answer queries
from may be specified using the <span><strong class=3D"command=
">listen-on</strong></span> option. <span><strong class=3D"command">listen-=
on</strong></span> takes
@@ -4363,7 +4379,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2585456"></a>UDP Port Lists</h4></div></div></div>
+<a name=3D"id2585531"></a>UDP Port Lists</h4></div></div></div>
<p>
<span><strong class=3D"command">use-v4-udp-ports</strong></spa=
n>,
<span><strong class=3D"command">avoid-v4-udp-ports</strong></s=
pan>,
@@ -4405,7 +4421,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2585584"></a>Operating System Resource Limits</h4></div></div=
></div>
+<a name=3D"id2585591"></a>Operating System Resource Limits</h4></div></div=
></div>
<p>
The server's usage of many system resources can be limited.
Scaled values are allowed when specifying resource limits. For
@@ -4567,7 +4583,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2585869"></a>Periodic Task Intervals</h4></div></div></div>
+<a name=3D"id2586082"></a>Periodic Task Intervals</h4></div></div></div>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term"><span><strong class=3D"command">cleaning-interval=
</strong></span></span></dt>
<dd><p>
@@ -4988,7 +5004,7 @@
<p>
Specify a private RDATA type to be used when generating
key signing records. The default is
- <code class=3D"literal">65535</code>.
+ <code class=3D"literal">65534</code>.
</p>
<p>
It is expected that this parameter may be removed
@@ -5210,10 +5226,11 @@
and which queries should not be sent to the Internet's root
servers. The official servers which cover these namespaces
return NXDOMAIN responses to these queries. In particular,
- these cover the reverse namespace for addresses from RFC 1918 =
and
- RFC 3330. They also include the reverse namespace for IPv6 lo=
cal
- address (locally assigned), IPv6 link local addresses, the IPv6
- loopback address and the IPv6 unknown address.
+ these cover the reverse namespaces for addresses from
+ RFC 1918, RFC 4193, and RFC 5737. They also include the
+ reverse namespace for IPv6 local address (locally assigned),
+ IPv6 link local addresses, the IPv6 loopback address and the
+ IPv6 unknown address.
</p>
<p>
Named will attempt to determine if a built-in zone already exi=
sts
@@ -5406,7 +5423,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2588113"></a>Content Filtering</h4></div></div></div>
+<a name=3D"id2588188"></a>Content Filtering</h4></div></div></div>
<p>
<acronym class=3D"acronym">BIND</acronym> 9 provides the abili=
ty to filter
out DNS responses from external DNS servers containing
@@ -5529,131 +5546,228 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2588372"></a>Response Policy Zone (RPZ) Rewriting</h4></div><=
/div></div>
+<a name=3D"id2588379"></a>Response Policy Zone (RPZ) Rewriting</h4></div><=
/div></div>
<p>
<acronym class=3D"acronym">BIND</acronym> 9 includes an intent=
ionally limited
mechanism to modify DNS responses for recursive requests
- similar to email anti-spam DNS blacklists.
- All response policy zones are named in the
+ somewhat similar to email anti-spam DNS blacklists.
+ Responses can be changed to deny the existence of domains(NXDO=
MAIN),
+ deny the existence of IP addresses for domains (NODATA),
+ or contain other IP addresses or data.
+ </p>
+<p>
+ The actions encoded in a response policy zone (RPZ) are applied
+ only to queries that ask for recursion (RD=3D1).
+ Response policy zones are named in the
<span><strong class=3D"command">response-policy</strong></span=
> option for the view or among the
global options if there is no response-policy option for the v=
iew.
- </p>
-<p>
- The rules encoded in a response policy zone (RPZ) are applied
- only to responses to queries that ask for recursion (RD=3D1).
- RPZs are normal DNS zones containing RRsets
+ RPZs are ordinary DNS zones containing RRsets
that can be queried normally if allowed.
It is usually best to restrict those queries with something li=
ke
- <span><strong class=3D"command">allow-query {none; };</strong>=
</span> or
- <span><strong class=3D"command">allow-query { 127.0.0.1; };</s=
trong></span>.
- </p>
-<p>
- There are four kinds of RPZ rewrite rules. QNAME rules are
- applied to query names in requests and to targets of CNAME
- records resolved in the process of generating the response.
- The owner name of a QNAME rule is the query name relativized
+ <span><strong class=3D"command">allow-query { localhost; };</s=
trong></span>.
+ </p>
+<p>
+ There are four kinds of RPZ records, QNAME, IP, NSIP,
+ and NSDNAME.
+ QNAME records are applied to query names of requests and targe=
ts
+ of CNAME records resolved to generate the response.
+ The owner name of a QNAME RPZ record is the query name relativ=
ized
to the RPZ.
- The records in a rewrite rule are usually A, AAAA, or special
- CNAMEs, but can be any type except DNAME.
- </p>
-<p>
- IP rules are triggered by addresses in A and AAAA records.
- All IP addresses in A or AAAA RRsets are tested and the rule
- longest prefix is applied. Ties between rules with equal pref=
ixes
- are broken in favor of the first RPZ mentioned in the
- response-policy option.
- The rule matching the smallest IP address is chosen among equal
- prefix rules from a single RPZ.
- IP rules are expressed in RRsets with owner names that are
- subdomains of rpz-ip and encoding an IP address block, reversed
- as in IN-ARPA.
- prefix.B.B.B.B with prefix between 1 and 32 and B between 1 an=
d 255
- encodes an IPv4 address.
- IPv6 addresses are encoded by with prefix.W.W.W.W.W.W.W.W or
- prefix.WORDS.zz.WORDS. The words in the standard IPv6 text
- representation are reversed, "::" is replaced with ".zz.",
- and ":" becomes ".".
- </p>
-<p>
- NSDNAME rules match names in NS RRsets for the response or a
- parent. They are encoded as subdomains of rpz-nsdomain relati=
vized
+ </p>
+<p>
+ The second kind of RPZ record, an IP policy record,
+ is triggered by addresses in A and AAAA records
+ for the ANSWER sections of responses.
+ IP policy records have owner names that are
+ subdomains of <strong class=3D"userinput"><code>rpz-ip</code><=
/strong> relativized to the
+ RPZ origin name and encode an IP address or address block.
+ IPv4 addresses are encoded as
+ <strong class=3D"userinput"><code>prefixlength.B4.B3.B2.B1.rpz=
-ip</code></strong>.
+ The prefix length must be between 1 and 32.
+ All four bytes, B4, B3, B2, and B1, must be present.
+ B4 is the decimal value of the least significant byte of the
+ IPv4 address as in IN-ADDR.ARPA.
+ IPv6 addresses are encoded in a format similar to the standard
+ IPv6 text representation,
+ <strong class=3D"userinput"><code>prefixlength.W8.W7.W6.W5.W4.=
W3.W2.W1.rpz-ip</code></strong>.
+ Each of W8,...,W1 is a one to four digit hexadecimal number
+ representing 16 bits of the IPv6 address as in the standard te=
xt
+ representation of IPv6 addresses, but reversed as in IN-ADDR.A=
RPA.
+ All 8 words must be present except when consecutive
+ zero words are replaced with <strong class=3D"userinput"><code=
>.zz.</code></strong>
+ analogous to double colons (::) in standard IPv6 text encoding=
s.
+ The prefix length must be between 1 and 128.
+ </p>
+<p>
+ NSDNAME policy records match names of authoritative servers
+ for the query name, a parent of the query name, a CNAME,
+ or a parent of a CNAME.
+ They are encoded as subdomains of
+ <strong class=3D"userinput"><code>rpz-nsdomain</code></strong>=
relativized
to the RPZ origin name.
</p>
<p>
- NSIP rules match IP addresses in A and AAAA RRsets for names of
- responsible servers or the names that can be matched by NSDNAME
- rules. The are encoded like IP rules except as subdomains of
- rpz-nsip.
- </p>
-<p>
- Authority verification issues and variations in authority data=
in
- the current version of <acronym class=3D"acronym">BIND</acrony=
m> 9 can cause
- inconsistent results from NSIP and NSDNAME. So they are avail=
able
+ NSIP policy records match IP addresses in A and AAAA RRsets
+ for domains that can be checked against NSDNAME policy records.
+ The are encoded like IP policies except as subdomains of
+ <strong class=3D"userinput"><code>rpz-nsip</code></strong>.
+ </p>
+<p>
+ The query response is checked against all RPZs, so
+ two or more policy records can apply to a single response.
+ Because DNS responses can be rewritten according by at most a
+ single policy record, a single policy (other than
+ <span><strong class=3D"command">DISABLED</strong></span> polic=
ies) must be chosen.
+ Policies are chosen in the following order:
+ </p>
+<div class=3D"itemizedlist"><ul type=3D"disc">
+<li>Among applicable zones, use the RPZ that appears first
+ in the response-policy option.
+ </li>
+<li>Prefer QNAME to IP to NSDNAME to NSIP policy records
+ in a single RPZ
+ </li>
+<li>Among applicable NSDNAME policy records, prefer the
+ policy record that matches the lexically smallest name
+ </li>
+<li>Among IP or NSIP policy records, prefer the record
+ with the longest prefix.
+ </li>
+<li>Among records with the same prefex length,
+ prefer the IP or NSIP policy record that matches
+ the smallest IP address.
+ </li>
+</ul></div>
+<p>
+ </p>
+<p>
+ When the processing of a response is restarted to resolve
+ DNAME or CNAME records and an applicable policy record set has
+ not been found,
+ all RPZs are again consulted for the DNAME or CNAME names
+ and addresses.
+ </p>
+<p>
+ Authority verification issues and variations in authority data
+ can cause inconsistent results for NSIP and NSDNAME policy rec=
ords.
+ Glue NS records often differ from authoritative NS records.
+ So they are available
only when <acronym class=3D"acronym">BIND</acronym> is built w=
ith the
<strong class=3D"userinput"><code>--enable-rpz-nsip</code></st=
rong> or
<strong class=3D"userinput"><code>--enable-rpz-nsdname</code><=
/strong> options
on the "configure" command line.
</p>
<p>
- Four policies can be expressed.
- The <span><strong class=3D"command">NXDOMAIN</strong></span> p=
olicy causes a NXDOMAIN response
- and is expressed with an RRset consisting of a single CNAME
- whose target is the root domain (.).
- <span><strong class=3D"command">NODATA</strong></span> generat=
es NODATA or ANCOUNT=3D1 regardless
- of query type.
- It is expressed with a CNAME whose target is the wildcard
- top-level domain (*.).
- The <span><strong class=3D"command">NO-OP</strong></span> poli=
cy does not change the response
- and is used to "poke holes" in policies for larger CIDR blocks=
or in
- zones named later in the <span><strong class=3D"command">respo=
nse-policy</strong></span> option.
- The NO-OP policy is expressed by a CNAME with a target consist=
ing
- of the variable part of the owner name, such as "example.com."=
for
- a QNAME rule or "128.1.0.0.127." for an IP rule.
- The <span><strong class=3D"command">CNAME</strong></span> poli=
cy is used to replace the RRsets
- of response.
- A and AAAA RRsets are most common and useful to capture
- an evil domain in a walled garden, but any valid set of RRsets
- is possible.
- </p>
-<p>
- All of the policies in an RPZ can be overridden with a
- <span><strong class=3D"command">policy</strong></span> clause.
- <span><strong class=3D"command">given</strong></span> says "do=
not override."
- <span><strong class=3D"command">no-op</strong></span> says "do=
nothing" regardless of the policy
- in RPZ records.
- <span><strong class=3D"command">nxdomain</strong></span> cause=
s all RPZ rules to generate
- NXDOMAIN results.
- <span><strong class=3D"command">nodata</strong></span> gives n=
odata.
- <span><strong class=3D"command">cname domain</strong></span> c=
auses all RPZ rules to act as if
- the consisted of a "cname domain" record.
+ RPZ record sets are special CNAME records or one or more
+ of any types of DNS record except DNAME or DNSSEC.
+ Except when a policy record is a CNAME, there can be more
+ more than one record and more than one type
+ in a set of policy records.
+ Except for three kinds of CNAME records that are illegal except
+ in policy zones, the records in a set are used in the response=
as if
+ their owner name were the query name. They are copied to the
+ response as dictated by their types.
+ </p>
+<div class=3D"itemizedlist"><ul type=3D"disc">
+<li>A CNAME whose target is the root domain (.)
+ specifies the <span><strong class=3D"command">NXDOMAIN</st=
rong></span> policy,
+ which generates an NXDOMAIN response.
+ </li>
+<li>A CNAME whose target is the wildcard top-level
+ domain (*.) specifies the <span><strong class=3D"command">=
NODATA</strong></span> policy,
+ which rewrites the response to NODATA or ANCOUNT=3D1.
+ </li>
+<li>A CNAME whose target is a wildcard hostname such
+ as *.example.com is used normally after the astrisk (*)
+ has been replaced with the query name.
+ These records are usually resolved with ordinary CNAMEs
+ outside the policy zones. They can be useful for logging.
+ </li>
+<li>The <span><strong class=3D"command">PASSTHRU</strong></span> policy is=
specified
+ by a CNAME whose target is the variable part of its own
+ owner name. It causes the response to not be rewritten
+ and is most often used to "poke holes" in policies for
+ CIDR blocks.
+ </li>
+</ul></div>
+<p>
+ </p>
+<p>
+ The policies specified in individual records
+ in an RPZ can be overridden with a <span><strong class=3D"comm=
and">policy</strong></span> clause
+ in the <span><strong class=3D"command">response-policy</strong=
></span> option.
+ An organization using an RPZ provided by another organization =
might
+ use this mechanism to redirect domains to its own walled garde=
n.
+ </p>
+<div class=3D"itemizedlist"><ul type=3D"disc">
+<li>
+<span><strong class=3D"command">GIVEN</strong></span> says "do not overrid=
e."
+ </li>
+<li>
+<span><strong class=3D"command">DISABLED</strong></span> causes policy rec=
ords to do
+ nothing but log what they might have done.
+ The response to the DNS query will be written according to
+ any matching policy records that are not disabled.
+ Policy zones overridden with <span><strong class=3D"comman=
d">DISABLED</strong></span> should
+ appear first, because they will often not be logged
+ if a higher precedence policy is found first.
+ </li>
+<li>
+<span><strong class=3D"command">PASSTHRU</strong></span> causes all policy=
records
+ to act as if they were CNAME records with targets the vari=
able
+ part of their owner name. They protect the response from
+ being changed.
+ </li>
+<li>
+<span><strong class=3D"command">NXDOMAIN</strong></span> causes all RPZ re=
cords
+ to specify NXDOMAIN policies.
+ </li>
+<li>
+<span><strong class=3D"command">NODATA</strong></span> overrides with the
+ NODATA policy
+ </li>
+<li>
+<span><strong class=3D"command">CNAME domain</strong></span> causes all RPZ
+ policy records to act as if they were "cname domain" recor=
ds.
+ </li>
+</ul></div>
+<p>
</p>
<p>
For example, you might use this option statement
</p>
-<pre class=3D"programlisting">response-policy { zone "bl"; };</pre>
+<pre class=3D"programlisting"> response-policy { zone "badlist"; };</pr=
e>
<p>
and this zone statement
</p>
-<pre class=3D"programlisting">zone "bl" {type master; file "example/bl"; a=
llow-query {none;}; };</pre>
+<pre class=3D"programlisting"> zone "badlist" {type master; file "maste=
r/badlist"; allow-query {none;}; };</pre>
<p>
with this zone file
</p>
<pre class=3D"programlisting">$TTL 1H
-@ SOA LOCALHOST. named-mgr.example.com (1 1h 15m 30d 2h)
+@ SOA LOCALHOST. named-mgr.example.com (1 1h 15m 30d=
2h)
+ NS LOCALHOST.
=20
-; QNAME rules
-nxdomain.domain.com CNAME .
-nodata.domain.com CNAME *.
-bad.domain.com A 10.0.0.1
- AAAA 2001:2::1
-ok.domain.com CNAME ok.domain.com.
-*.badzone.domain.com CNAME garden.example.com.
+; QNAME policy records. There are no periods (.) after the owner names.
+nxdomain.domain.com CNAME . ; NXDOMAIN policy
+nodata.domain.com CNAME *. ; NODATA policy
+bad.domain.com A 10.0.0.1 ; redirect to a walled gar=
den
+ AAAA 2001:2::1
=20
-; IP rules rewriting all answers for 127/8 except 127.0.0.1
-8.0.0.0.127.ip CNAME .
-32.1.0.0.127.ip CNAME 32.1.0.0.127.
+; do not rewrite (PASSTHRU) OK.DOMAIN.COM
+ok.domain.com CNAME ok.domain.com.
=20
-; NSDNAME and NSIP rules
+bzone.domain.com CNAME garden.example.com.
+
+; redirect x.bzone.domain.com to x.bzone.domain.com.garden.example.com
+*.bzone.domain.com CNAME *.garden.example.com.
+
+
+; IP policy records that rewrite all answers for 127/8 except 127.0.0.1
+8.0.0.0.127.rpz-ip CNAME .
+32.1.0.0.127.rpz-ip CNAME 32.1.0.0.127. ; PASSTHRU for 127.0.0.1
+
+; NSDNAME and NSIP policy records
ns.domain.com.rpz-nsdname CNAME .
48.zz.2.2001.rpz-nsip CNAME .
</pre>
@@ -5867,7 +5981,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2589395"></a><span><strong class=3D"command">statistics-chann=
els</strong></span> Statement Definition and
+<a name=3D"id2589481"></a><span><strong class=3D"command">statistics-chann=
els</strong></span> Statement Definition and
Usage</h3></div></div></div>
<p>
The <span><strong class=3D"command">statistics-channels</strong>=
</span> statement
@@ -5927,7 +6041,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2589534"></a><span><strong class=3D"command">trusted-keys</st=
rong></span> Statement Definition
+<a name=3D"id2589689"></a><span><strong class=3D"command">trusted-keys</st=
rong></span> Statement Definition
and Usage</h3></div></div></div>
<p>
The <span><strong class=3D"command">trusted-keys</strong></spa=
n> statement defines
@@ -5967,7 +6081,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2589581"></a><span><strong class=3D"command">managed-keys</st=
rong></span> Statement Grammar</h3></div></div></div>
+<a name=3D"id2589736"></a><span><strong class=3D"command">managed-keys</st=
rong></span> Statement Grammar</h3></div></div></div>
<pre class=3D"programlisting"><span><strong class=3D"command">managed-keys=
</strong></span> {
<em class=3D"replaceable"><code>string</code></em> initial-key <em cla=
ss=3D"replaceable"><code>number</code></em> <em class=3D"replaceable"><code=
>number</code></em> <em class=3D"replaceable"><code>number</code></em> <em =
class=3D"replaceable"><code>string</code></em> ;
[<span class=3D"optional"> <em class=3D"replaceable"><code>string</cod=
e></em> initial-key <em class=3D"replaceable"><code>number</code></em> <em =
class=3D"replaceable"><code>number</code></em> <em class=3D"replaceable"><c=
ode>number</code></em> <em class=3D"replaceable"><code>string</code></em> ;=
[<span class=3D"optional">...</span>]</span>]
@@ -6102,7 +6216,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2590007"></a><span><strong class=3D"command">view</strong></s=
pan> Statement Definition and Usage</h3></div></div></div>
+<a name=3D"id2590162"></a><span><strong class=3D"command">view</strong></s=
pan> Statement Definition and Usage</h3></div></div></div>
<p>
The <span><strong class=3D"command">view</strong></span> state=
ment is a powerful
feature
@@ -6391,10 +6505,10 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2591558"></a><span><strong class=3D"command">zone</strong></s=
pan> Statement Definition and Usage</h3></div></div></div>
+<a name=3D"id2591713"></a><span><strong class=3D"command">zone</strong></s=
pan> Statement Definition and Usage</h3></div></div></div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2591565"></a>Zone Types</h4></div></div></div>
+<a name=3D"id2591720"></a>Zone Types</h4></div></div></div>
<div class=3D"informaltable"><table border=3D"1">
<colgroup>
<col>
@@ -6654,7 +6768,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2592179"></a>Class</h4></div></div></div>
+<a name=3D"id2592402"></a>Class</h4></div></div></div>
<p>
The zone's name may optionally be followed by a class. If
a class is not specified, class <code class=3D"literal">IN</=
code> (for <code class=3D"varname">Internet</code>),
@@ -6676,7 +6790,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2592212"></a>Zone Options</h4></div></div></div>
+<a name=3D"id2592503"></a>Zone Options</h4></div></div></div>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term"><span><strong class=3D"command">allow-notify</str=
ong></span></span></dt>
<dd><p>
@@ -7553,7 +7667,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2595030"></a>Zone File</h2></div></div></div>
+<a name=3D"id2595116"></a>Zone File</h2></div></div></div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
<a name=3D"types_of_resource_records_and_when_to_use_them"></a>Types of Re=
source Records and When to Use Them</h3></div></div></div>
@@ -7566,7 +7680,7 @@
</p>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2595048"></a>Resource Records</h4></div></div></div>
+<a name=3D"id2595134"></a>Resource Records</h4></div></div></div>
<p>
A domain name identifies a node. Each node has a set of
resource information, which may be empty. The set of resour=
ce
@@ -8303,7 +8417,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2596603"></a>Textual expression of RRs</h4></div></div></div>
+<a name=3D"id2596826"></a>Textual expression of RRs</h4></div></div></div>
<p>
RRs are represented in binary form in the packets of the DNS
protocol, and are usually represented in highly encoded form
@@ -8506,7 +8620,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2597260"></a>Discussion of MX Records</h3></div></div></div>
+<a name=3D"id2597415"></a>Discussion of MX Records</h3></div></div></div>
<p>
As described above, domain servers store information as a
series of resource records, each of which contains a particular
@@ -8762,7 +8876,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2597876"></a>Inverse Mapping in IPv4</h3></div></div></div>
+<a name=3D"id2597962"></a>Inverse Mapping in IPv4</h3></div></div></div>
<p>
Reverse name resolution (that is, translation from IP address
to name) is achieved by means of the <span class=3D"emphasis">=
<em>in-addr.arpa</em></span> domain
@@ -8823,7 +8937,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2598003"></a>Other Zone File Directives</h3></div></div></div>
+<a name=3D"id2598157"></a>Other Zone File Directives</h3></div></div></div>
<p>
The Master File Format was initially defined in RFC 1035 and
has subsequently been extended. While the Master File Format
@@ -8838,7 +8952,7 @@
</p>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2598093"></a>The <span><strong class=3D"command">@</strong></=
span> (at-sign)</h4></div></div></div>
+<a name=3D"id2598180"></a>The <span><strong class=3D"command">@</strong></=
span> (at-sign)</h4></div></div></div>
<p>
When used in the label (or name) field, the asperand or
at-sign (@) symbol represents the current origin.
@@ -8849,7 +8963,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2598109"></a>The <span><strong class=3D"command">$ORIGIN</str=
ong></span> Directive</h4></div></div></div>
+<a name=3D"id2598196"></a>The <span><strong class=3D"command">$ORIGIN</str=
ong></span> Directive</h4></div></div></div>
<p>
Syntax: <span><strong class=3D"command">$ORIGIN</strong></sp=
an>
<em class=3D"replaceable"><code>domain-name</code></em>
@@ -8878,7 +8992,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2598170"></a>The <span><strong class=3D"command">$INCLUDE</st=
rong></span> Directive</h4></div></div></div>
+<a name=3D"id2598325"></a>The <span><strong class=3D"command">$INCLUDE</st=
rong></span> Directive</h4></div></div></div>
<p>
Syntax: <span><strong class=3D"command">$INCLUDE</strong></s=
pan>
<em class=3D"replaceable"><code>filename</code></em>
@@ -8914,7 +9028,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2598240"></a>The <span><strong class=3D"command">$TTL</strong=
></span> Directive</h4></div></div></div>
+<a name=3D"id2598394"></a>The <span><strong class=3D"command">$TTL</strong=
></span> Directive</h4></div></div></div>
<p>
Syntax: <span><strong class=3D"command">$TTL</strong></span>
<em class=3D"replaceable"><code>default-ttl</code></em>
@@ -8933,7 +9047,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2598276"></a><acronym class=3D"acronym">BIND</acronym> Master=
File Extension: the <span><strong class=3D"command">$GENERATE</strong></s=
pan> Directive</h3></div></div></div>
+<a name=3D"id2598430"></a><acronym class=3D"acronym">BIND</acronym> Master=
File Extension: the <span><strong class=3D"command">$GENERATE</strong></s=
pan> Directive</h3></div></div></div>
<p>
Syntax: <span><strong class=3D"command">$GENERATE</strong></sp=
an>
<em class=3D"replaceable"><code>range</code></em>
@@ -9357,7 +9471,7 @@
</p>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2599229"></a>Name Server Statistics Counters</h4></div></div>=
</div>
+<a name=3D"id2599384"></a>Name Server Statistics Counters</h4></div></div>=
</div>
<div class=3D"informaltable"><table border=3D"1">
<colgroup>
<col>
@@ -9914,7 +10028,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2600702"></a>Zone Maintenance Statistics Counters</h4></div><=
/div></div>
+<a name=3D"id2600857"></a>Zone Maintenance Statistics Counters</h4></div><=
/div></div>
<div class=3D"informaltable"><table border=3D"1">
<colgroup>
<col>
@@ -10068,7 +10182,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2601154"></a>Resolver Statistics Counters</h4></div></div></d=
iv>
+<a name=3D"id2601308"></a>Resolver Statistics Counters</h4></div></div></d=
iv>
<div class=3D"informaltable"><table border=3D"1">
<colgroup>
<col>
@@ -10451,7 +10565,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2602312"></a>Socket I/O Statistics Counters</h4></div></div><=
/div>
+<a name=3D"id2602398"></a>Socket I/O Statistics Counters</h4></div></div><=
/div>
<p>
Socket I/O statistics counters are defined per socket
types, which are
@@ -10606,7 +10720,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2602685"></a>Compatibility with <span class=3D"emphasis"><em>=
BIND</em></span> 8 Counters</h4></div></div></div>
+<a name=3D"id2602840"></a>Compatibility with <span class=3D"emphasis"><em>=
BIND</em></span> 8 Counters</h4></div></div></div>
<p>
Most statistics counters that were available
in <span><strong class=3D"command">BIND</strong></span> 8 ar=
e also supported in
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/Bv9ARM.ch07=
.html
--- a/head/contrib/bind9/doc/arm/Bv9ARM.ch07.html Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/doc/arm/Bv9ARM.ch07.html Tue Apr 17 11:51:51 2012 =
+0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: Bv9ARM.ch07.html,v 1.242.8.7 2011-08-03 02:35:10 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -46,10 +46,10 @@
<p><b>Table of Contents</b></p>
<dl>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch07.html#Access_Control_Lists=
">Access Control Lists</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch07.html#id2602996"><span><st=
rong class=3D"command">Chroot</strong></span> and <span><strong class=3D"co=
mmand">Setuid</strong></span></a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch07.html#id2603082"><span><st=
rong class=3D"command">Chroot</strong></span> and <span><strong class=3D"co=
mmand">Setuid</strong></span></a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch07.html#id2603077">The <span=
><strong class=3D"command">chroot</strong></span> Environment</a></span></d=
t>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch07.html#id2603137">Using the=
<span><strong class=3D"command">setuid</strong></span> Function</a></span>=
</dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch07.html#id2603232">The <span=
><strong class=3D"command">chroot</strong></span> Environment</a></span></d=
t>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch07.html#id2603291">Using the=
<span><strong class=3D"command">setuid</strong></span> Function</a></span>=
</dt>
</dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch07.html#dynamic_update_secur=
ity">Dynamic Update Security</a></span></dt>
</dl>
@@ -84,9 +84,8 @@
// RFC1918 space and some reserved space, which is
// commonly used in spoofing attacks.
acl bogusnets {
- 0.0.0.0/8; 1.0.0.0/8; 2.0.0.0/8; 192.0.2.0/24;
- 224.0.0.0/3; 10.0.0.0/8; 172.16.0.0/12;
- 192.168.0.0/16;
+ 0.0.0.0/8; 192.0.2.0/24; 224.0.0.0/3;
+ 10.0.0.0/8; 172.16.0.0/12; 192.168.0.0/16;
};
=20
// Set up an ACL called our-nets. Replace this with the
@@ -122,7 +121,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2602996"></a><span><strong class=3D"command">Chroot</strong><=
/span> and <span><strong class=3D"command">Setuid</strong></span>
+<a name=3D"id2603082"></a><span><strong class=3D"command">Chroot</strong><=
/span> and <span><strong class=3D"command">Setuid</strong></span>
</h2></div></div></div>
<p>
On UNIX servers, it is possible to run <acronym class=3D"acronym=
">BIND</acronym>
@@ -148,7 +147,7 @@
</p>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2603077"></a>The <span><strong class=3D"command">chroot</stro=
ng></span> Environment</h3></div></div></div>
+<a name=3D"id2603232"></a>The <span><strong class=3D"command">chroot</stro=
ng></span> Environment</h3></div></div></div>
<p>
In order for a <span><strong class=3D"command">chroot</strong>=
</span> environment
to
@@ -176,7 +175,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2603137"></a>Using the <span><strong class=3D"command">setuid=
</strong></span> Function</h3></div></div></div>
+<a name=3D"id2603291"></a>Using the <span><strong class=3D"command">setuid=
</strong></span> Function</h3></div></div></div>
<p>
Prior to running the <span><strong class=3D"command">named</st=
rong></span> daemon,
use
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/Bv9ARM.ch08=
.html
--- a/head/contrib/bind9/doc/arm/Bv9ARM.ch08.html Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/doc/arm/Bv9ARM.ch08.html Tue Apr 17 11:51:51 2012 =
+0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: Bv9ARM.ch08.html,v 1.242.8.7 2011-08-03 02:35:11 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -45,18 +45,18 @@
<div class=3D"toc">
<p><b>Table of Contents</b></p>
<dl>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch08.html#id2603285">Common Pr=
oblems</a></span></dt>
-<dd><dl><dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch08.html#id2603290">I=
t's not working; how can I figure out what's wrong?</a></span></dt></dl></d=
d>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch08.html#id2603302">Increment=
ing and Changing the Serial Number</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch08.html#id2603319">Where Can=
I Get Help?</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch08.html#id2603371">Common Pr=
oblems</a></span></dt>
+<dd><dl><dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch08.html#id2603377">I=
t's not working; how can I figure out what's wrong?</a></span></dt></dl></d=
d>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch08.html#id2603388">Increment=
ing and Changing the Serial Number</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch08.html#id2603405">Where Can=
I Get Help?</a></span></dt>
</dl>
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2603285"></a>Common Problems</h2></div></div></div>
+<a name=3D"id2603371"></a>Common Problems</h2></div></div></div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2603290"></a>It's not working; how can I figure out what's wr=
ong?</h3></div></div></div>
+<a name=3D"id2603377"></a>It's not working; how can I figure out what's wr=
ong?</h3></div></div></div>
<p>
The best solution to solving installation and
configuration issues is to take preventative measures by setti=
ng
@@ -68,7 +68,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2603302"></a>Incrementing and Changing the Serial Number</h2>=
</div></div></div>
+<a name=3D"id2603388"></a>Incrementing and Changing the Serial Number</h2>=
</div></div></div>
<p>
Zone serial numbers are just numbers — they aren't
date related. A lot of people set them to a number that
@@ -95,7 +95,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2603319"></a>Where Can I Get Help?</h2></div></div></div>
+<a name=3D"id2603405"></a>Where Can I Get Help?</h2></div></div></div>
<p>
The Internet Systems Consortium
(<acronym class=3D"acronym">ISC</acronym>) offers a wide range
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/Bv9ARM.ch09=
.html
--- a/head/contrib/bind9/doc/arm/Bv9ARM.ch09.html Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/doc/arm/Bv9ARM.ch09.html Tue Apr 17 11:51:51 2012 =
+0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: Bv9ARM.ch09.html,v 1.246.8.9 2011-08-03 02:35:11 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -45,31 +45,31 @@
<div class=3D"toc">
<p><b>Table of Contents</b></p>
<dl>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch09.html#id2603449">Acknowled=
gments</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch09.html#id2603536">Acknowled=
gments</a></span></dt>
<dd><dl><dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#historical_d=
ns_information">A Brief History of the <acronym class=3D"acronym">DNS</acro=
nym> and <acronym class=3D"acronym">BIND</acronym></a></span></dt></dl></dd>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch09.html#id2603553">General <=
acronym class=3D"acronym">DNS</acronym> Reference Information</a></span></d=
t>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch09.html#id2603707">General <=
acronym class=3D"acronym">DNS</acronym> Reference Information</a></span></d=
t>
<dd><dl><dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#ipv6addresse=
s">IPv6 addresses (AAAA)</a></span></dt></dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch09.html#bibliography">Biblio=
graphy (and Suggested Reading)</a></span></dt>
<dd><dl>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#rfcs">Request for Co=
mments (RFCs)</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#internet_drafts">Int=
ernet Drafts</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2606901">Other Doc=
uments About <acronym class=3D"acronym">BIND</acronym></a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2607124">Other Doc=
uments About <acronym class=3D"acronym">BIND</acronym></a></span></dt>
</dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch09.html#bind9.library">BIND =
9 DNS Library Support</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608203">Prerequis=
ite</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608213">Compilati=
on</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608237">Installat=
ion</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608268">Known Def=
ects/Restrictions</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608413">The dns.c=
onf File</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608440">Sample Ap=
plications</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2609345">Library R=
eferences</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608280">Prerequis=
ite</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608290">Compilati=
on</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608314">Installat=
ion</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608345">Known Def=
ects/Restrictions</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608422">The dns.c=
onf File</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608449">Sample Ap=
plications</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2609490">Library R=
eferences</a></span></dt>
</dl></dd>
</dl>
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2603449"></a>Acknowledgments</h2></div></div></div>
+<a name=3D"id2603536"></a>Acknowledgments</h2></div></div></div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
<a name=3D"historical_dns_information"></a>A Brief History of the <acronym=
class=3D"acronym">DNS</acronym> and <acronym class=3D"acronym">BIND</acron=
ym>
@@ -172,7 +172,7 @@
</div>
<div class=3D"sect1" lang=3D"en">
<div class=3D"titlepage"><div><div><h2 class=3D"title" style=3D"clear: bot=
h">
-<a name=3D"id2603553"></a>General <acronym class=3D"acronym">DNS</acronym>=
Reference Information</h2></div></div></div>
+<a name=3D"id2603707"></a>General <acronym class=3D"acronym">DNS</acronym>=
Reference Information</h2></div></div></div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
<a name=3D"ipv6addresses"></a>IPv6 addresses (AAAA)</h3></div></div></div>
@@ -260,17 +260,17 @@
</p>
<div class=3D"bibliography">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2603809"></a>Bibliography</h4></div></div></div>
+<a name=3D"id2603895"></a>Bibliography</h4></div></div></div>
<div class=3D"bibliodiv">
<h3 class=3D"title">Standards</h3>
<div class=3D"biblioentry">
-<a name=3D"id2603819"></a><p>[<abbr class=3D"abbrev">RFC974</abbr>] <span =
class=3D"author"><span class=3D"firstname">C.</span> <span class=3D"surname=
">Partridge</span>. </span><span class=3D"title"><i>Mail Routing and the Do=
main System</i>. </span><span class=3D"pubdate">January 1986. </span></p>
+<a name=3D"id2603906"></a><p>[<abbr class=3D"abbrev">RFC974</abbr>] <span =
class=3D"author"><span class=3D"firstname">C.</span> <span class=3D"surname=
">Partridge</span>. </span><span class=3D"title"><i>Mail Routing and the Do=
main System</i>. </span><span class=3D"pubdate">January 1986. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2603843"></a><p>[<abbr class=3D"abbrev">RFC1034</abbr>] <span=
class=3D"author"><span class=3D"firstname">P.V.</span> <span class=3D"surn=
ame">Mockapetris</span>. </span><span class=3D"title"><i>Domain Names ̵=
2; Concepts and Facilities</i>. </span><span class=3D"pubdate">November 198=
7. </span></p>
+<a name=3D"id2603929"></a><p>[<abbr class=3D"abbrev">RFC1034</abbr>] <span=
class=3D"author"><span class=3D"firstname">P.V.</span> <span class=3D"surn=
ame">Mockapetris</span>. </span><span class=3D"title"><i>Domain Names ̵=
2; Concepts and Facilities</i>. </span><span class=3D"pubdate">November 198=
7. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2603866"></a><p>[<abbr class=3D"abbrev">RFC1035</abbr>] <span=
class=3D"author"><span class=3D"firstname">P. V.</span> <span class=3D"sur=
name">Mockapetris</span>. </span><span class=3D"title"><i>Domain Names R=
12; Implementation and
+<a name=3D"id2603953"></a><p>[<abbr class=3D"abbrev">RFC1035</abbr>] <span=
class=3D"author"><span class=3D"firstname">P. V.</span> <span class=3D"sur=
name">Mockapetris</span>. </span><span class=3D"title"><i>Domain Names R=
12; Implementation and
Specification</i>. </span><span class=3D"pubdate">Novemb=
er 1987. </span></p>
</div>
</div>
@@ -278,42 +278,42 @@
<h3 class=3D"title">
<a name=3D"proposed_standards"></a>Proposed Standards</h3>
<div class=3D"biblioentry">
-<a name=3D"id2603902"></a><p>[<abbr class=3D"abbrev">RFC2181</abbr>] <span=
class=3D"author"><span class=3D"firstname">R., R. Bush</span> <span class=
=3D"surname">Elz</span>. </span><span class=3D"title"><i>Clarifications to =
the <acronym class=3D"acronym">DNS</acronym>
+<a name=3D"id2603989"></a><p>[<abbr class=3D"abbrev">RFC2181</abbr>] <span=
class=3D"author"><span class=3D"firstname">R., R. Bush</span> <span class=
=3D"surname">Elz</span>. </span><span class=3D"title"><i>Clarifications to =
the <acronym class=3D"acronym">DNS</acronym>
Specification</i>. </span><span class=3D"pubdate">July 1=
997. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2603929"></a><p>[<abbr class=3D"abbrev">RFC2308</abbr>] <span=
class=3D"author"><span class=3D"firstname">M.</span> <span class=3D"surnam=
e">Andrews</span>. </span><span class=3D"title"><i>Negative Caching of <acr=
onym class=3D"acronym">DNS</acronym>
+<a name=3D"id2604016"></a><p>[<abbr class=3D"abbrev">RFC2308</abbr>] <span=
class=3D"author"><span class=3D"firstname">M.</span> <span class=3D"surnam=
e">Andrews</span>. </span><span class=3D"title"><i>Negative Caching of <acr=
onym class=3D"acronym">DNS</acronym>
Queries</i>. </span><span class=3D"pubdate">March 1998. =
</span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2603955"></a><p>[<abbr class=3D"abbrev">RFC1995</abbr>] <span=
class=3D"author"><span class=3D"firstname">M.</span> <span class=3D"surnam=
e">Ohta</span>. </span><span class=3D"title"><i>Incremental Zone Transfer i=
n <acronym class=3D"acronym">DNS</acronym></i>. </span><span class=3D"pubda=
te">August 1996. </span></p>
+<a name=3D"id2604041"></a><p>[<abbr class=3D"abbrev">RFC1995</abbr>] <span=
class=3D"author"><span class=3D"firstname">M.</span> <span class=3D"surnam=
e">Ohta</span>. </span><span class=3D"title"><i>Incremental Zone Transfer i=
n <acronym class=3D"acronym">DNS</acronym></i>. </span><span class=3D"pubda=
te">August 1996. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2603979"></a><p>[<abbr class=3D"abbrev">RFC1996</abbr>] <span=
class=3D"author"><span class=3D"firstname">P.</span> <span class=3D"surnam=
e">Vixie</span>. </span><span class=3D"title"><i>A Mechanism for Prompt Not=
ification of Zone Changes</i>. </span><span class=3D"pubdate">August 1996. =
</span></p>
+<a name=3D"id2604066"></a><p>[<abbr class=3D"abbrev">RFC1996</abbr>] <span=
class=3D"author"><span class=3D"firstname">P.</span> <span class=3D"surnam=
e">Vixie</span>. </span><span class=3D"title"><i>A Mechanism for Prompt Not=
ification of Zone Changes</i>. </span><span class=3D"pubdate">August 1996. =
</span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604003"></a><p>[<abbr class=3D"abbrev">RFC2136</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">P.</span> <span class=3D"s=
urname">Vixie</span>, <span class=3D"firstname">S.</span> <span class=3D"su=
rname">Thomson</span>, <span class=3D"firstname">Y.</span> <span class=3D"s=
urname">Rekhter</span>, and <span class=3D"firstname">J.</span> <span class=
=3D"surname">Bound</span>. </span><span class=3D"title"><i>Dynamic Updates =
in the Domain Name System</i>. </span><span class=3D"pubdate">April 1997. <=
/span></p>
+<a name=3D"id2604089"></a><p>[<abbr class=3D"abbrev">RFC2136</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">P.</span> <span class=3D"s=
urname">Vixie</span>, <span class=3D"firstname">S.</span> <span class=3D"su=
rname">Thomson</span>, <span class=3D"firstname">Y.</span> <span class=3D"s=
urname">Rekhter</span>, and <span class=3D"firstname">J.</span> <span class=
=3D"surname">Bound</span>. </span><span class=3D"title"><i>Dynamic Updates =
in the Domain Name System</i>. </span><span class=3D"pubdate">April 1997. <=
/span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604058"></a><p>[<abbr class=3D"abbrev">RFC2671</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">P.</span> <span class=3D"s=
urname">Vixie</span>. </span><span class=3D"title"><i>Extension Mechanisms =
for DNS (EDNS0)</i>. </span><span class=3D"pubdate">August 1997. </span></p>
+<a name=3D"id2604145"></a><p>[<abbr class=3D"abbrev">RFC2671</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">P.</span> <span class=3D"s=
urname">Vixie</span>. </span><span class=3D"title"><i>Extension Mechanisms =
for DNS (EDNS0)</i>. </span><span class=3D"pubdate">August 1997. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604085"></a><p>[<abbr class=3D"abbrev">RFC2672</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">M.</span> <span class=3D"s=
urname">Crawford</span>. </span><span class=3D"title"><i>Non-Terminal DNS N=
ame Redirection</i>. </span><span class=3D"pubdate">August 1999. </span></p>
+<a name=3D"id2604171"></a><p>[<abbr class=3D"abbrev">RFC2672</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">M.</span> <span class=3D"s=
urname">Crawford</span>. </span><span class=3D"title"><i>Non-Terminal DNS N=
ame Redirection</i>. </span><span class=3D"pubdate">August 1999. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604112"></a><p>[<abbr class=3D"abbrev">RFC2845</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">P.</span> <span class=3D"s=
urname">Vixie</span>, <span class=3D"firstname">O.</span> <span class=3D"su=
rname">Gudmundsson</span>, <span class=3D"firstname">D.</span> <span class=
=3D"surname">Eastlake</span>, <span class=3D"lineage">3rd</span>, and <span=
class=3D"firstname">B.</span> <span class=3D"surname">Wellington</span>. <=
/span><span class=3D"title"><i>Secret Key Transaction Authentication for <a=
cronym class=3D"acronym">DNS</acronym> (TSIG)</i>. </span><span class=3D"pu=
bdate">May 2000. </span></p>
+<a name=3D"id2604198"></a><p>[<abbr class=3D"abbrev">RFC2845</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">P.</span> <span class=3D"s=
urname">Vixie</span>, <span class=3D"firstname">O.</span> <span class=3D"su=
rname">Gudmundsson</span>, <span class=3D"firstname">D.</span> <span class=
=3D"surname">Eastlake</span>, <span class=3D"lineage">3rd</span>, and <span=
class=3D"firstname">B.</span> <span class=3D"surname">Wellington</span>. <=
/span><span class=3D"title"><i>Secret Key Transaction Authentication for <a=
cronym class=3D"acronym">DNS</acronym> (TSIG)</i>. </span><span class=3D"pu=
bdate">May 2000. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604173"></a><p>[<abbr class=3D"abbrev">RFC2930</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span c=
lass=3D"title"><i>Secret Key Establishment for DNS (TKEY RR)</i>. </span><s=
pan class=3D"pubdate">September 2000. </span></p>
+<a name=3D"id2604260"></a><p>[<abbr class=3D"abbrev">RFC2930</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span c=
lass=3D"title"><i>Secret Key Establishment for DNS (TKEY RR)</i>. </span><s=
pan class=3D"pubdate">September 2000. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604203"></a><p>[<abbr class=3D"abbrev">RFC2931</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span c=
lass=3D"title"><i>DNS Request and Transaction Signatures (SIG(0)s)</i>. </s=
pan><span class=3D"pubdate">September 2000. </span></p>
+<a name=3D"id2604290"></a><p>[<abbr class=3D"abbrev">RFC2931</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span c=
lass=3D"title"><i>DNS Request and Transaction Signatures (SIG(0)s)</i>. </s=
pan><span class=3D"pubdate">September 2000. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604233"></a><p>[<abbr class=3D"abbrev">RFC3007</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">B.</span> <span class=3D"s=
urname">Wellington</span>. </span><span class=3D"title"><i>Secure Domain Na=
me System (DNS) Dynamic Update</i>. </span><span class=3D"pubdate">November=
2000. </span></p>
+<a name=3D"id2604320"></a><p>[<abbr class=3D"abbrev">RFC3007</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">B.</span> <span class=3D"s=
urname">Wellington</span>. </span><span class=3D"title"><i>Secure Domain Na=
me System (DNS) Dynamic Update</i>. </span><span class=3D"pubdate">November=
2000. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604260"></a><p>[<abbr class=3D"abbrev">RFC3645</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">S.</span> <span class=3D"s=
urname">Kwan</span>, <span class=3D"firstname">P.</span> <span class=3D"sur=
name">Garg</span>, <span class=3D"firstname">J.</span> <span class=3D"surna=
me">Gilroy</span>, <span class=3D"firstname">L.</span> <span class=3D"surna=
me">Esibov</span>, <span class=3D"firstname">J.</span> <span class=3D"surna=
me">Westhead</span>, and <span class=3D"firstname">R.</span> <span class=3D=
"surname">Hall</span>. </span><span class=3D"title"><i>Generic Security Ser=
vice Algorithm for Secret
+<a name=3D"id2604346"></a><p>[<abbr class=3D"abbrev">RFC3645</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">S.</span> <span class=3D"s=
urname">Kwan</span>, <span class=3D"firstname">P.</span> <span class=3D"sur=
name">Garg</span>, <span class=3D"firstname">J.</span> <span class=3D"surna=
me">Gilroy</span>, <span class=3D"firstname">L.</span> <span class=3D"surna=
me">Esibov</span>, <span class=3D"firstname">J.</span> <span class=3D"surna=
me">Westhead</span>, and <span class=3D"firstname">R.</span> <span class=3D=
"surname">Hall</span>. </span><span class=3D"title"><i>Generic Security Ser=
vice Algorithm for Secret
Key Transaction Authentication for DNS
(GSS-TSIG)</i>. </span><span class=3D"pubdate">Octo=
ber 2003. </span></p>
</div>
@@ -322,19 +322,19 @@
<h3 class=3D"title">
<acronym class=3D"acronym">DNS</acronym> Security Proposed Standards</h3>
<div class=3D"biblioentry">
-<a name=3D"id2604342"></a><p>[<abbr class=3D"abbrev">RFC3225</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Conrad</span>. </span><span class=3D"title"><i>Indicating Resolver =
Support of DNSSEC</i>. </span><span class=3D"pubdate">December 2001. </span=
></p>
+<a name=3D"id2604428"></a><p>[<abbr class=3D"abbrev">RFC3225</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Conrad</span>. </span><span class=3D"title"><i>Indicating Resolver =
Support of DNSSEC</i>. </span><span class=3D"pubdate">December 2001. </span=
></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604369"></a><p>[<abbr class=3D"abbrev">RFC3833</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Atkins</span> and <span class=3D"firstname">R.</span> <span class=
=3D"surname">Austein</span>. </span><span class=3D"title"><i>Threat Analysi=
s of the Domain Name System (DNS)</i>. </span><span class=3D"pubdate">Augus=
t 2004. </span></p>
+<a name=3D"id2604455"></a><p>[<abbr class=3D"abbrev">RFC3833</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Atkins</span> and <span class=3D"firstname">R.</span> <span class=
=3D"surname">Austein</span>. </span><span class=3D"title"><i>Threat Analysi=
s of the Domain Name System (DNS)</i>. </span><span class=3D"pubdate">Augus=
t 2004. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604405"></a><p>[<abbr class=3D"abbrev">RFC4033</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">R.</span> <span class=3D"s=
urname">Arends</span>, <span class=3D"firstname">R.</span> <span class=3D"s=
urname">Austein</span>, <span class=3D"firstname">M.</span> <span class=3D"=
surname">Larson</span>, <span class=3D"firstname">D.</span> <span class=3D"=
surname">Massey</span>, and <span class=3D"firstname">S.</span> <span class=
=3D"surname">Rose</span>. </span><span class=3D"title"><i>DNS Security Intr=
oduction and Requirements</i>. </span><span class=3D"pubdate">March 2005. <=
/span></p>
+<a name=3D"id2604491"></a><p>[<abbr class=3D"abbrev">RFC4033</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">R.</span> <span class=3D"s=
urname">Arends</span>, <span class=3D"firstname">R.</span> <span class=3D"s=
urname">Austein</span>, <span class=3D"firstname">M.</span> <span class=3D"=
surname">Larson</span>, <span class=3D"firstname">D.</span> <span class=3D"=
surname">Massey</span>, and <span class=3D"firstname">S.</span> <span class=
=3D"surname">Rose</span>. </span><span class=3D"title"><i>DNS Security Intr=
oduction and Requirements</i>. </span><span class=3D"pubdate">March 2005. <=
/span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604470"></a><p>[<abbr class=3D"abbrev">RFC4034</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">R.</span> <span class=3D"s=
urname">Arends</span>, <span class=3D"firstname">R.</span> <span class=3D"s=
urname">Austein</span>, <span class=3D"firstname">M.</span> <span class=3D"=
surname">Larson</span>, <span class=3D"firstname">D.</span> <span class=3D"=
surname">Massey</span>, and <span class=3D"firstname">S.</span> <span class=
=3D"surname">Rose</span>. </span><span class=3D"title"><i>Resource Records =
for the DNS Security Extensions</i>. </span><span class=3D"pubdate">March 2=
005. </span></p>
+<a name=3D"id2604625"></a><p>[<abbr class=3D"abbrev">RFC4034</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">R.</span> <span class=3D"s=
urname">Arends</span>, <span class=3D"firstname">R.</span> <span class=3D"s=
urname">Austein</span>, <span class=3D"firstname">M.</span> <span class=3D"=
surname">Larson</span>, <span class=3D"firstname">D.</span> <span class=3D"=
surname">Massey</span>, and <span class=3D"firstname">S.</span> <span class=
=3D"surname">Rose</span>. </span><span class=3D"title"><i>Resource Records =
for the DNS Security Extensions</i>. </span><span class=3D"pubdate">March 2=
005. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604603"></a><p>[<abbr class=3D"abbrev">RFC4035</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">R.</span> <span class=3D"s=
urname">Arends</span>, <span class=3D"firstname">R.</span> <span class=3D"s=
urname">Austein</span>, <span class=3D"firstname">M.</span> <span class=3D"=
surname">Larson</span>, <span class=3D"firstname">D.</span> <span class=3D"=
surname">Massey</span>, and <span class=3D"firstname">S.</span> <span class=
=3D"surname">Rose</span>. </span><span class=3D"title"><i>Protocol Modifica=
tions for the DNS
+<a name=3D"id2604690"></a><p>[<abbr class=3D"abbrev">RFC4035</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">R.</span> <span class=3D"s=
urname">Arends</span>, <span class=3D"firstname">R.</span> <span class=3D"s=
urname">Austein</span>, <span class=3D"firstname">M.</span> <span class=3D"=
surname">Larson</span>, <span class=3D"firstname">D.</span> <span class=3D"=
surname">Massey</span>, and <span class=3D"firstname">S.</span> <span class=
=3D"surname">Rose</span>. </span><span class=3D"title"><i>Protocol Modifica=
tions for the DNS
Security Extensions</i>. </span><span class=3D"pubd=
ate">March 2005. </span></p>
</div>
</div>
@@ -342,146 +342,146 @@
<h3 class=3D"title">Other Important RFCs About <acronym class=3D"acronym">=
DNS</acronym>
Implementation</h3>
<div class=3D"biblioentry">
-<a name=3D"id2604677"></a><p>[<abbr class=3D"abbrev">RFC1535</abbr>] <span=
class=3D"author"><span class=3D"firstname">E.</span> <span class=3D"surnam=
e">Gavron</span>. </span><span class=3D"title"><i>A Security Problem and Pr=
oposed Correction With Widely
+<a name=3D"id2604763"></a><p>[<abbr class=3D"abbrev">RFC1535</abbr>] <span=
class=3D"author"><span class=3D"firstname">E.</span> <span class=3D"surnam=
e">Gavron</span>. </span><span class=3D"title"><i>A Security Problem and Pr=
oposed Correction With Widely
Deployed <acronym class=3D"acronym">DNS</acronym> Softwa=
re.</i>. </span><span class=3D"pubdate">October 1993. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604702"></a><p>[<abbr class=3D"abbrev">RFC1536</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">A.</span> <span class=3D"s=
urname">Kumar</span>, <span class=3D"firstname">J.</span> <span class=3D"su=
rname">Postel</span>, <span class=3D"firstname">C.</span> <span class=3D"su=
rname">Neuman</span>, <span class=3D"firstname">P.</span> <span class=3D"su=
rname">Danzig</span>, and <span class=3D"firstname">S.</span> <span class=
=3D"surname">Miller</span>. </span><span class=3D"title"><i>Common <acronym=
class=3D"acronym">DNS</acronym> Implementation
+<a name=3D"id2604789"></a><p>[<abbr class=3D"abbrev">RFC1536</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">A.</span> <span class=3D"s=
urname">Kumar</span>, <span class=3D"firstname">J.</span> <span class=3D"su=
rname">Postel</span>, <span class=3D"firstname">C.</span> <span class=3D"su=
rname">Neuman</span>, <span class=3D"firstname">P.</span> <span class=3D"su=
rname">Danzig</span>, and <span class=3D"firstname">S.</span> <span class=
=3D"surname">Miller</span>. </span><span class=3D"title"><i>Common <acronym=
class=3D"acronym">DNS</acronym> Implementation
Errors and Suggested Fixes</i>. </span><span class=3D"pu=
bdate">October 1993. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604771"></a><p>[<abbr class=3D"abbrev">RFC1982</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">R.</span> <span class=3D"s=
urname">Elz</span> and <span class=3D"firstname">R.</span> <span class=3D"s=
urname">Bush</span>. </span><span class=3D"title"><i>Serial Number Arithmet=
ic</i>. </span><span class=3D"pubdate">August 1996. </span></p>
+<a name=3D"id2604857"></a><p>[<abbr class=3D"abbrev">RFC1982</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">R.</span> <span class=3D"s=
urname">Elz</span> and <span class=3D"firstname">R.</span> <span class=3D"s=
urname">Bush</span>. </span><span class=3D"title"><i>Serial Number Arithmet=
ic</i>. </span><span class=3D"pubdate">August 1996. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604806"></a><p>[<abbr class=3D"abbrev">RFC4074</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">Y.</span> <span class=3D"s=
urname">Morishita</span> and <span class=3D"firstname">T.</span> <span clas=
s=3D"surname">Jinmei</span>. </span><span class=3D"title"><i>Common Misbeha=
viour Against <acronym class=3D"acronym">DNS</acronym>
+<a name=3D"id2604892"></a><p>[<abbr class=3D"abbrev">RFC4074</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">Y.</span> <span class=3D"s=
urname">Morishita</span> and <span class=3D"firstname">T.</span> <span clas=
s=3D"surname">Jinmei</span>. </span><span class=3D"title"><i>Common Misbeha=
viour Against <acronym class=3D"acronym">DNS</acronym>
Queries for IPv6 Addresses</i>. </span><span class=3D"pubd=
ate">May 2005. </span></p>
</div>
</div>
<div class=3D"bibliodiv">
<h3 class=3D"title">Resource Record Types</h3>
<div class=3D"biblioentry">
-<a name=3D"id2604852"></a><p>[<abbr class=3D"abbrev">RFC1183</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">C.F.</span> <span class=3D=
"surname">Everhart</span>, <span class=3D"firstname">L. A.</span> <span cla=
ss=3D"surname">Mamakos</span>, <span class=3D"firstname">R.</span> <span cl=
ass=3D"surname">Ullmann</span>, and <span class=3D"firstname">P.</span> <sp=
an class=3D"surname">Mockapetris</span>. </span><span class=3D"title"><i>Ne=
w <acronym class=3D"acronym">DNS</acronym> RR Definitions</i>. </span><span=
class=3D"pubdate">October 1990. </span></p>
+<a name=3D"id2604938"></a><p>[<abbr class=3D"abbrev">RFC1183</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">C.F.</span> <span class=3D=
"surname">Everhart</span>, <span class=3D"firstname">L. A.</span> <span cla=
ss=3D"surname">Mamakos</span>, <span class=3D"firstname">R.</span> <span cl=
ass=3D"surname">Ullmann</span>, and <span class=3D"firstname">P.</span> <sp=
an class=3D"surname">Mockapetris</span>. </span><span class=3D"title"><i>Ne=
w <acronym class=3D"acronym">DNS</acronym> RR Definitions</i>. </span><span=
class=3D"pubdate">October 1990. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604909"></a><p>[<abbr class=3D"abbrev">RFC1706</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">B.</span> <span class=3D"s=
urname">Manning</span> and <span class=3D"firstname">R.</span> <span class=
=3D"surname">Colella</span>. </span><span class=3D"title"><i><acronym class=
=3D"acronym">DNS</acronym> NSAP Resource Records</i>. </span><span class=3D=
"pubdate">October 1994. </span></p>
+<a name=3D"id2604996"></a><p>[<abbr class=3D"abbrev">RFC1706</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">B.</span> <span class=3D"s=
urname">Manning</span> and <span class=3D"firstname">R.</span> <span class=
=3D"surname">Colella</span>. </span><span class=3D"title"><i><acronym class=
=3D"acronym">DNS</acronym> NSAP Resource Records</i>. </span><span class=3D=
"pubdate">October 1994. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604947"></a><p>[<abbr class=3D"abbrev">RFC2168</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">R.</span> <span class=3D"s=
urname">Daniel</span> and <span class=3D"firstname">M.</span> <span class=
=3D"surname">Mealling</span>. </span><span class=3D"title"><i>Resolution of=
Uniform Resource Identifiers using
+<a name=3D"id2605033"></a><p>[<abbr class=3D"abbrev">RFC2168</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">R.</span> <span class=3D"s=
urname">Daniel</span> and <span class=3D"firstname">M.</span> <span class=
=3D"surname">Mealling</span>. </span><span class=3D"title"><i>Resolution of=
Uniform Resource Identifiers using
the Domain Name System</i>. </span><span class=3D"pubdat=
e">June 1997. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2604982"></a><p>[<abbr class=3D"abbrev">RFC1876</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">C.</span> <span class=3D"s=
urname">Davis</span>, <span class=3D"firstname">P.</span> <span class=3D"su=
rname">Vixie</span>, <span class=3D"firstname">T.</span>, and <span class=
=3D"firstname">I.</span> <span class=3D"surname">Dickinson</span>. </span><=
span class=3D"title"><i>A Means for Expressing Location Information in the
+<a name=3D"id2605137"></a><p>[<abbr class=3D"abbrev">RFC1876</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">C.</span> <span class=3D"s=
urname">Davis</span>, <span class=3D"firstname">P.</span> <span class=3D"su=
rname">Vixie</span>, <span class=3D"firstname">T.</span>, and <span class=
=3D"firstname">I.</span> <span class=3D"surname">Dickinson</span>. </span><=
span class=3D"title"><i>A Means for Expressing Location Information in the
Domain
Name System</i>. </span><span class=3D"pubdate">January =
1996. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605036"></a><p>[<abbr class=3D"abbrev">RFC2052</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">A.</span> <span class=3D"s=
urname">Gulbrandsen</span> and <span class=3D"firstname">P.</span> <span cl=
ass=3D"surname">Vixie</span>. </span><span class=3D"title"><i>A <acronym cl=
ass=3D"acronym">DNS</acronym> RR for Specifying the
+<a name=3D"id2605191"></a><p>[<abbr class=3D"abbrev">RFC2052</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">A.</span> <span class=3D"s=
urname">Gulbrandsen</span> and <span class=3D"firstname">P.</span> <span cl=
ass=3D"surname">Vixie</span>. </span><span class=3D"title"><i>A <acronym cl=
ass=3D"acronym">DNS</acronym> RR for Specifying the
Location of
Services.</i>. </span><span class=3D"pubdate">October 19=
96. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605075"></a><p>[<abbr class=3D"abbrev">RFC2163</abbr>] <span=
class=3D"author"><span class=3D"firstname">A.</span> <span class=3D"surnam=
e">Allocchio</span>. </span><span class=3D"title"><i>Using the Internet <ac=
ronym class=3D"acronym">DNS</acronym> to
+<a name=3D"id2605229"></a><p>[<abbr class=3D"abbrev">RFC2163</abbr>] <span=
class=3D"author"><span class=3D"firstname">A.</span> <span class=3D"surnam=
e">Allocchio</span>. </span><span class=3D"title"><i>Using the Internet <ac=
ronym class=3D"acronym">DNS</acronym> to
Distribute MIXER
Conformant Global Address Mapping</i>. </span><span clas=
s=3D"pubdate">January 1998. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605100"></a><p>[<abbr class=3D"abbrev">RFC2230</abbr>] <span=
class=3D"author"><span class=3D"firstname">R.</span> <span class=3D"surnam=
e">Atkinson</span>. </span><span class=3D"title"><i>Key Exchange Delegation=
Record for the <acronym class=3D"acronym">DNS</acronym></i>. </span><span =
class=3D"pubdate">October 1997. </span></p>
+<a name=3D"id2605255"></a><p>[<abbr class=3D"abbrev">RFC2230</abbr>] <span=
class=3D"author"><span class=3D"firstname">R.</span> <span class=3D"surnam=
e">Atkinson</span>. </span><span class=3D"title"><i>Key Exchange Delegation=
Record for the <acronym class=3D"acronym">DNS</acronym></i>. </span><span =
class=3D"pubdate">October 1997. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605126"></a><p>[<abbr class=3D"abbrev">RFC2536</abbr>] <span=
class=3D"author"><span class=3D"firstname">D.</span> <span class=3D"surnam=
e">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span class=
=3D"title"><i>DSA KEYs and SIGs in the Domain Name System (DNS)</i>. </span=
><span class=3D"pubdate">March 1999. </span></p>
+<a name=3D"id2605281"></a><p>[<abbr class=3D"abbrev">RFC2536</abbr>] <span=
class=3D"author"><span class=3D"firstname">D.</span> <span class=3D"surnam=
e">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span class=
=3D"title"><i>DSA KEYs and SIGs in the Domain Name System (DNS)</i>. </span=
><span class=3D"pubdate">March 1999. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605153"></a><p>[<abbr class=3D"abbrev">RFC2537</abbr>] <span=
class=3D"author"><span class=3D"firstname">D.</span> <span class=3D"surnam=
e">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span class=
=3D"title"><i>RSA/MD5 KEYs and SIGs in the Domain Name System (DNS)</i>. </=
span><span class=3D"pubdate">March 1999. </span></p>
+<a name=3D"id2605307"></a><p>[<abbr class=3D"abbrev">RFC2537</abbr>] <span=
class=3D"author"><span class=3D"firstname">D.</span> <span class=3D"surnam=
e">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span class=
=3D"title"><i>RSA/MD5 KEYs and SIGs in the Domain Name System (DNS)</i>. </=
span><span class=3D"pubdate">March 1999. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605179"></a><p>[<abbr class=3D"abbrev">RFC2538</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span> and <span class=
=3D"firstname">O.</span> <span class=3D"surname">Gudmundsson</span>. </span=
><span class=3D"title"><i>Storing Certificates in the Domain Name System (D=
NS)</i>. </span><span class=3D"pubdate">March 1999. </span></p>
+<a name=3D"id2605334"></a><p>[<abbr class=3D"abbrev">RFC2538</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span> and <span class=
=3D"firstname">O.</span> <span class=3D"surname">Gudmundsson</span>. </span=
><span class=3D"title"><i>Storing Certificates in the Domain Name System (D=
NS)</i>. </span><span class=3D"pubdate">March 1999. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605219"></a><p>[<abbr class=3D"abbrev">RFC2539</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span c=
lass=3D"title"><i>Storage of Diffie-Hellman Keys in the Domain Name System =
(DNS)</i>. </span><span class=3D"pubdate">March 1999. </span></p>
+<a name=3D"id2605373"></a><p>[<abbr class=3D"abbrev">RFC2539</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span c=
lass=3D"title"><i>Storage of Diffie-Hellman Keys in the Domain Name System =
(DNS)</i>. </span><span class=3D"pubdate">March 1999. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605249"></a><p>[<abbr class=3D"abbrev">RFC2540</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span c=
lass=3D"title"><i>Detached Domain Name System (DNS) Information</i>. </span=
><span class=3D"pubdate">March 1999. </span></p>
+<a name=3D"id2605403"></a><p>[<abbr class=3D"abbrev">RFC2540</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span c=
lass=3D"title"><i>Detached Domain Name System (DNS) Information</i>. </span=
><span class=3D"pubdate">March 1999. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605278"></a><p>[<abbr class=3D"abbrev">RFC2782</abbr>] <span=
class=3D"author"><span class=3D"firstname">A.</span> <span class=3D"surnam=
e">Gulbrandsen</span>. </span><span class=3D"author"><span class=3D"firstna=
me">P.</span> <span class=3D"surname">Vixie</span>. </span><span class=3D"a=
uthor"><span class=3D"firstname">L.</span> <span class=3D"surname">Esibov</=
span>. </span><span class=3D"title"><i>A DNS RR for specifying the location=
of services (DNS SRV)</i>. </span><span class=3D"pubdate">February 2000. <=
/span></p>
+<a name=3D"id2605433"></a><p>[<abbr class=3D"abbrev">RFC2782</abbr>] <span=
class=3D"author"><span class=3D"firstname">A.</span> <span class=3D"surnam=
e">Gulbrandsen</span>. </span><span class=3D"author"><span class=3D"firstna=
me">P.</span> <span class=3D"surname">Vixie</span>. </span><span class=3D"a=
uthor"><span class=3D"firstname">L.</span> <span class=3D"surname">Esibov</=
span>. </span><span class=3D"title"><i>A DNS RR for specifying the location=
of services (DNS SRV)</i>. </span><span class=3D"pubdate">February 2000. <=
/span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605321"></a><p>[<abbr class=3D"abbrev">RFC2915</abbr>] <span=
class=3D"author"><span class=3D"firstname">M.</span> <span class=3D"surnam=
e">Mealling</span>. </span><span class=3D"author"><span class=3D"firstname"=
>R.</span> <span class=3D"surname">Daniel</span>. </span><span class=3D"tit=
le"><i>The Naming Authority Pointer (NAPTR) DNS Resource Record</i>. </span=
><span class=3D"pubdate">September 2000. </span></p>
+<a name=3D"id2605476"></a><p>[<abbr class=3D"abbrev">RFC2915</abbr>] <span=
class=3D"author"><span class=3D"firstname">M.</span> <span class=3D"surnam=
e">Mealling</span>. </span><span class=3D"author"><span class=3D"firstname"=
>R.</span> <span class=3D"surname">Daniel</span>. </span><span class=3D"tit=
le"><i>The Naming Authority Pointer (NAPTR) DNS Resource Record</i>. </span=
><span class=3D"pubdate">September 2000. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605354"></a><p>[<abbr class=3D"abbrev">RFC3110</abbr>] <span=
class=3D"author"><span class=3D"firstname">D.</span> <span class=3D"surnam=
e">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span class=
=3D"title"><i>RSA/SHA-1 SIGs and RSA KEYs in the Domain Name System (DNS)</=
i>. </span><span class=3D"pubdate">May 2001. </span></p>
+<a name=3D"id2605509"></a><p>[<abbr class=3D"abbrev">RFC3110</abbr>] <span=
class=3D"author"><span class=3D"firstname">D.</span> <span class=3D"surnam=
e">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span class=
=3D"title"><i>RSA/SHA-1 SIGs and RSA KEYs in the Domain Name System (DNS)</=
i>. </span><span class=3D"pubdate">May 2001. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605381"></a><p>[<abbr class=3D"abbrev">RFC3123</abbr>] <span=
class=3D"author"><span class=3D"firstname">P.</span> <span class=3D"surnam=
e">Koch</span>. </span><span class=3D"title"><i>A DNS RR Type for Lists of =
Address Prefixes (APL RR)</i>. </span><span class=3D"pubdate">June 2001. </=
span></p>
+<a name=3D"id2605536"></a><p>[<abbr class=3D"abbrev">RFC3123</abbr>] <span=
class=3D"author"><span class=3D"firstname">P.</span> <span class=3D"surnam=
e">Koch</span>. </span><span class=3D"title"><i>A DNS RR Type for Lists of =
Address Prefixes (APL RR)</i>. </span><span class=3D"pubdate">June 2001. </=
span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605473"></a><p>[<abbr class=3D"abbrev">RFC3596</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">S.</span> <span class=3D"s=
urname">Thomson</span>, <span class=3D"firstname">C.</span> <span class=3D"=
surname">Huitema</span>, <span class=3D"firstname">V.</span> <span class=3D=
"surname">Ksinant</span>, and <span class=3D"firstname">M.</span> <span cla=
ss=3D"surname">Souissi</span>. </span><span class=3D"title"><i><acronym cla=
ss=3D"acronym">DNS</acronym> Extensions to support IP
+<a name=3D"id2605559"></a><p>[<abbr class=3D"abbrev">RFC3596</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">S.</span> <span class=3D"s=
urname">Thomson</span>, <span class=3D"firstname">C.</span> <span class=3D"=
surname">Huitema</span>, <span class=3D"firstname">V.</span> <span class=3D=
"surname">Ksinant</span>, and <span class=3D"firstname">M.</span> <span cla=
ss=3D"surname">Souissi</span>. </span><span class=3D"title"><i><acronym cla=
ss=3D"acronym">DNS</acronym> Extensions to support IP
version 6</i>. </span><span class=3D"pubdate">October 20=
03. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605530"></a><p>[<abbr class=3D"abbrev">RFC3597</abbr>] <span=
class=3D"author"><span class=3D"firstname">A.</span> <span class=3D"surnam=
e">Gustafsson</span>. </span><span class=3D"title"><i>Handling of Unknown D=
NS Resource Record (RR) Types</i>. </span><span class=3D"pubdate">September=
2003. </span></p>
+<a name=3D"id2605617"></a><p>[<abbr class=3D"abbrev">RFC3597</abbr>] <span=
class=3D"author"><span class=3D"firstname">A.</span> <span class=3D"surnam=
e">Gustafsson</span>. </span><span class=3D"title"><i>Handling of Unknown D=
NS Resource Record (RR) Types</i>. </span><span class=3D"pubdate">September=
2003. </span></p>
</div>
</div>
<div class=3D"bibliodiv">
<h3 class=3D"title">
<acronym class=3D"acronym">DNS</acronym> and the Internet</h3>
<div class=3D"biblioentry">
-<a name=3D"id2605562"></a><p>[<abbr class=3D"abbrev">RFC1101</abbr>] <span=
class=3D"author"><span class=3D"firstname">P. V.</span> <span class=3D"sur=
name">Mockapetris</span>. </span><span class=3D"title"><i><acronym class=3D=
"acronym">DNS</acronym> Encoding of Network Names
+<a name=3D"id2605649"></a><p>[<abbr class=3D"abbrev">RFC1101</abbr>] <span=
class=3D"author"><span class=3D"firstname">P. V.</span> <span class=3D"sur=
name">Mockapetris</span>. </span><span class=3D"title"><i><acronym class=3D=
"acronym">DNS</acronym> Encoding of Network Names
and Other Types</i>. </span><span class=3D"pubdate">Apri=
l 1989. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605588"></a><p>[<abbr class=3D"abbrev">RFC1123</abbr>] <span=
class=3D"author"><span class=3D"surname">Braden</span>. </span><span class=
=3D"title"><i>Requirements for Internet Hosts - Application and
+<a name=3D"id2605674"></a><p>[<abbr class=3D"abbrev">RFC1123</abbr>] <span=
class=3D"author"><span class=3D"surname">Braden</span>. </span><span class=
=3D"title"><i>Requirements for Internet Hosts - Application and
Support</i>. </span><span class=3D"pubdate">October 1989=
. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605610"></a><p>[<abbr class=3D"abbrev">RFC1591</abbr>] <span=
class=3D"author"><span class=3D"firstname">J.</span> <span class=3D"surnam=
e">Postel</span>. </span><span class=3D"title"><i>Domain Name System Struct=
ure and Delegation</i>. </span><span class=3D"pubdate">March 1994. </span><=
/p>
+<a name=3D"id2605697"></a><p>[<abbr class=3D"abbrev">RFC1591</abbr>] <span=
class=3D"author"><span class=3D"firstname">J.</span> <span class=3D"surnam=
e">Postel</span>. </span><span class=3D"title"><i>Domain Name System Struct=
ure and Delegation</i>. </span><span class=3D"pubdate">March 1994. </span><=
/p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605634"></a><p>[<abbr class=3D"abbrev">RFC2317</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">H.</span> <span class=3D"s=
urname">Eidnes</span>, <span class=3D"firstname">G.</span> <span class=3D"s=
urname">de Groot</span>, and <span class=3D"firstname">P.</span> <span clas=
s=3D"surname">Vixie</span>. </span><span class=3D"title"><i>Classless IN-AD=
DR.ARPA Delegation</i>. </span><span class=3D"pubdate">March 1998. </span><=
/p>
+<a name=3D"id2605720"></a><p>[<abbr class=3D"abbrev">RFC2317</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">H.</span> <span class=3D"s=
urname">Eidnes</span>, <span class=3D"firstname">G.</span> <span class=3D"s=
urname">de Groot</span>, and <span class=3D"firstname">P.</span> <span clas=
s=3D"surname">Vixie</span>. </span><span class=3D"title"><i>Classless IN-AD=
DR.ARPA Delegation</i>. </span><span class=3D"pubdate">March 1998. </span><=
/p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605680"></a><p>[<abbr class=3D"abbrev">RFC2826</abbr>] <span=
class=3D"authorgroup"><span class=3D"surname">Internet Architecture Board<=
/span>. </span><span class=3D"title"><i>IAB Technical Comment on the Unique=
DNS Root</i>. </span><span class=3D"pubdate">May 2000. </span></p>
+<a name=3D"id2605766"></a><p>[<abbr class=3D"abbrev">RFC2826</abbr>] <span=
class=3D"authorgroup"><span class=3D"surname">Internet Architecture Board<=
/span>. </span><span class=3D"title"><i>IAB Technical Comment on the Unique=
DNS Root</i>. </span><span class=3D"pubdate">May 2000. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605703"></a><p>[<abbr class=3D"abbrev">RFC2929</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span>, <span class=3D=
"firstname">E.</span> <span class=3D"surname">Brunner-Williams</span>, and =
<span class=3D"firstname">B.</span> <span class=3D"surname">Manning</span>.=
</span><span class=3D"title"><i>Domain Name System (DNS) IANA Consideratio=
ns</i>. </span><span class=3D"pubdate">September 2000. </span></p>
+<a name=3D"id2605789"></a><p>[<abbr class=3D"abbrev">RFC2929</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span>, <span class=3D=
"firstname">E.</span> <span class=3D"surname">Brunner-Williams</span>, and =
<span class=3D"firstname">B.</span> <span class=3D"surname">Manning</span>.=
</span><span class=3D"title"><i>Domain Name System (DNS) IANA Consideratio=
ns</i>. </span><span class=3D"pubdate">September 2000. </span></p>
</div>
</div>
<div class=3D"bibliodiv">
<h3 class=3D"title">
<acronym class=3D"acronym">DNS</acronym> Operations</h3>
<div class=3D"biblioentry">
-<a name=3D"id2605761"></a><p>[<abbr class=3D"abbrev">RFC1033</abbr>] <span=
class=3D"author"><span class=3D"firstname">M.</span> <span class=3D"surnam=
e">Lottor</span>. </span><span class=3D"title"><i>Domain administrators ope=
rations guide.</i>. </span><span class=3D"pubdate">November 1987. </span></=
p>
+<a name=3D"id2605847"></a><p>[<abbr class=3D"abbrev">RFC1033</abbr>] <span=
class=3D"author"><span class=3D"firstname">M.</span> <span class=3D"surnam=
e">Lottor</span>. </span><span class=3D"title"><i>Domain administrators ope=
rations guide.</i>. </span><span class=3D"pubdate">November 1987. </span></=
p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605784"></a><p>[<abbr class=3D"abbrev">RFC1537</abbr>] <span=
class=3D"author"><span class=3D"firstname">P.</span> <span class=3D"surnam=
e">Beertema</span>. </span><span class=3D"title"><i>Common <acronym class=
=3D"acronym">DNS</acronym> Data File
+<a name=3D"id2605870"></a><p>[<abbr class=3D"abbrev">RFC1537</abbr>] <span=
class=3D"author"><span class=3D"firstname">P.</span> <span class=3D"surnam=
e">Beertema</span>. </span><span class=3D"title"><i>Common <acronym class=
=3D"acronym">DNS</acronym> Data File
Configuration Errors</i>. </span><span class=3D"pubdate"=
>October 1993. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605811"></a><p>[<abbr class=3D"abbrev">RFC1912</abbr>] <span=
class=3D"author"><span class=3D"firstname">D.</span> <span class=3D"surnam=
e">Barr</span>. </span><span class=3D"title"><i>Common <acronym class=3D"ac=
ronym">DNS</acronym> Operational and
+<a name=3D"id2605897"></a><p>[<abbr class=3D"abbrev">RFC1912</abbr>] <span=
class=3D"author"><span class=3D"firstname">D.</span> <span class=3D"surnam=
e">Barr</span>. </span><span class=3D"title"><i>Common <acronym class=3D"ac=
ronym">DNS</acronym> Operational and
Configuration Errors</i>. </span><span class=3D"pubdate"=
>February 1996. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605837"></a><p>[<abbr class=3D"abbrev">RFC2010</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">B.</span> <span class=3D"s=
urname">Manning</span> and <span class=3D"firstname">P.</span> <span class=
=3D"surname">Vixie</span>. </span><span class=3D"title"><i>Operational Crit=
eria for Root Name Servers.</i>. </span><span class=3D"pubdate">October 199=
6. </span></p>
+<a name=3D"id2605924"></a><p>[<abbr class=3D"abbrev">RFC2010</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">B.</span> <span class=3D"s=
urname">Manning</span> and <span class=3D"firstname">P.</span> <span class=
=3D"surname">Vixie</span>. </span><span class=3D"title"><i>Operational Crit=
eria for Root Name Servers.</i>. </span><span class=3D"pubdate">October 199=
6. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605874"></a><p>[<abbr class=3D"abbrev">RFC2219</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">M.</span> <span class=3D"s=
urname">Hamilton</span> and <span class=3D"firstname">R.</span> <span class=
=3D"surname">Wright</span>. </span><span class=3D"title"><i>Use of <acronym=
class=3D"acronym">DNS</acronym> Aliases for
+<a name=3D"id2605960"></a><p>[<abbr class=3D"abbrev">RFC2219</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">M.</span> <span class=3D"s=
urname">Hamilton</span> and <span class=3D"firstname">R.</span> <span class=
=3D"surname">Wright</span>. </span><span class=3D"title"><i>Use of <acronym=
class=3D"acronym">DNS</acronym> Aliases for
Network Services.</i>. </span><span class=3D"pubdate">Oc=
tober 1997. </span></p>
</div>
</div>
<div class=3D"bibliodiv">
<h3 class=3D"title">Internationalized Domain Names</h3>
<div class=3D"biblioentry">
-<a name=3D"id2605920"></a><p>[<abbr class=3D"abbrev">RFC2825</abbr>] <span=
class=3D"authorgroup"><span class=3D"surname">IAB</span> and <span class=
=3D"firstname">R.</span> <span class=3D"surname">Daigle</span>. </span><spa=
n class=3D"title"><i>A Tangled Web: Issues of I18N, Domain Names,
+<a name=3D"id2606006"></a><p>[<abbr class=3D"abbrev">RFC2825</abbr>] <span=
class=3D"authorgroup"><span class=3D"surname">IAB</span> and <span class=
=3D"firstname">R.</span> <span class=3D"surname">Daigle</span>. </span><spa=
n class=3D"title"><i>A Tangled Web: Issues of I18N, Domain Names,
and the Other Internet protocols</i>. </span><span =
class=3D"pubdate">May 2000. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605952"></a><p>[<abbr class=3D"abbrev">RFC3490</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">P.</span> <span class=3D"s=
urname">Faltstrom</span>, <span class=3D"firstname">P.</span> <span class=
=3D"surname">Hoffman</span>, and <span class=3D"firstname">A.</span> <span =
class=3D"surname">Costello</span>. </span><span class=3D"title"><i>Internat=
ionalizing Domain Names in Applications (IDNA)</i>. </span><span class=3D"p=
ubdate">March 2003. </span></p>
+<a name=3D"id2606038"></a><p>[<abbr class=3D"abbrev">RFC3490</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">P.</span> <span class=3D"s=
urname">Faltstrom</span>, <span class=3D"firstname">P.</span> <span class=
=3D"surname">Hoffman</span>, and <span class=3D"firstname">A.</span> <span =
class=3D"surname">Costello</span>. </span><span class=3D"title"><i>Internat=
ionalizing Domain Names in Applications (IDNA)</i>. </span><span class=3D"p=
ubdate">March 2003. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2605997"></a><p>[<abbr class=3D"abbrev">RFC3491</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">P.</span> <span class=3D"s=
urname">Hoffman</span> and <span class=3D"firstname">M.</span> <span class=
=3D"surname">Blanchet</span>. </span><span class=3D"title"><i>Nameprep: A S=
tringprep Profile for Internationalized Domain Names</i>. </span><span clas=
s=3D"pubdate">March 2003. </span></p>
+<a name=3D"id2606084"></a><p>[<abbr class=3D"abbrev">RFC3491</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">P.</span> <span class=3D"s=
urname">Hoffman</span> and <span class=3D"firstname">M.</span> <span class=
=3D"surname">Blanchet</span>. </span><span class=3D"title"><i>Nameprep: A S=
tringprep Profile for Internationalized Domain Names</i>. </span><span clas=
s=3D"pubdate">March 2003. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606033"></a><p>[<abbr class=3D"abbrev">RFC3492</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">A.</span> <span class=3D"s=
urname">Costello</span>. </span><span class=3D"title"><i>Punycode: A Bootst=
ring encoding of Unicode
+<a name=3D"id2606119"></a><p>[<abbr class=3D"abbrev">RFC3492</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">A.</span> <span class=3D"s=
urname">Costello</span>. </span><span class=3D"title"><i>Punycode: A Bootst=
ring encoding of Unicode
for Internationalized Domain Names in
Applications (IDNA)</i>. </span><span class=3D"pubd=
ate">March 2003. </span></p>
</div>
@@ -497,47 +497,47 @@
</p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606077"></a><p>[<abbr class=3D"abbrev">RFC1464</abbr>] <span=
class=3D"author"><span class=3D"firstname">R.</span> <span class=3D"surnam=
e">Rosenbaum</span>. </span><span class=3D"title"><i>Using the Domain Name =
System To Store Arbitrary String
+<a name=3D"id2606164"></a><p>[<abbr class=3D"abbrev">RFC1464</abbr>] <span=
class=3D"author"><span class=3D"firstname">R.</span> <span class=3D"surnam=
e">Rosenbaum</span>. </span><span class=3D"title"><i>Using the Domain Name =
System To Store Arbitrary String
Attributes</i>. </span><span class=3D"pubdate">May 1993.=
</span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606100"></a><p>[<abbr class=3D"abbrev">RFC1713</abbr>] <span=
class=3D"author"><span class=3D"firstname">A.</span> <span class=3D"surnam=
e">Romao</span>. </span><span class=3D"title"><i>Tools for <acronym class=
=3D"acronym">DNS</acronym> Debugging</i>. </span><span class=3D"pubdate">No=
vember 1994. </span></p>
+<a name=3D"id2606186"></a><p>[<abbr class=3D"abbrev">RFC1713</abbr>] <span=
class=3D"author"><span class=3D"firstname">A.</span> <span class=3D"surnam=
e">Romao</span>. </span><span class=3D"title"><i>Tools for <acronym class=
=3D"acronym">DNS</acronym> Debugging</i>. </span><span class=3D"pubdate">No=
vember 1994. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606125"></a><p>[<abbr class=3D"abbrev">RFC1794</abbr>] <span=
class=3D"author"><span class=3D"firstname">T.</span> <span class=3D"surnam=
e">Brisco</span>. </span><span class=3D"title"><i><acronym class=3D"acronym=
">DNS</acronym> Support for Load
+<a name=3D"id2606212"></a><p>[<abbr class=3D"abbrev">RFC1794</abbr>] <span=
class=3D"author"><span class=3D"firstname">T.</span> <span class=3D"surnam=
e">Brisco</span>. </span><span class=3D"title"><i><acronym class=3D"acronym=
">DNS</acronym> Support for Load
Balancing</i>. </span><span class=3D"pubdate">April 1995=
. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606151"></a><p>[<abbr class=3D"abbrev">RFC2240</abbr>] <span=
class=3D"author"><span class=3D"firstname">O.</span> <span class=3D"surnam=
e">Vaughan</span>. </span><span class=3D"title"><i>A Legal Basis for Domain=
Name Allocation</i>. </span><span class=3D"pubdate">November 1997. </span>=
</p>
+<a name=3D"id2606306"></a><p>[<abbr class=3D"abbrev">RFC2240</abbr>] <span=
class=3D"author"><span class=3D"firstname">O.</span> <span class=3D"surnam=
e">Vaughan</span>. </span><span class=3D"title"><i>A Legal Basis for Domain=
Name Allocation</i>. </span><span class=3D"pubdate">November 1997. </span>=
</p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606174"></a><p>[<abbr class=3D"abbrev">RFC2345</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">J.</span> <span class=3D"s=
urname">Klensin</span>, <span class=3D"firstname">T.</span> <span class=3D"=
surname">Wolf</span>, and <span class=3D"firstname">G.</span> <span class=
=3D"surname">Oglesby</span>. </span><span class=3D"title"><i>Domain Names a=
nd Company Name Retrieval</i>. </span><span class=3D"pubdate">May 1998. </s=
pan></p>
+<a name=3D"id2606329"></a><p>[<abbr class=3D"abbrev">RFC2345</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">J.</span> <span class=3D"s=
urname">Klensin</span>, <span class=3D"firstname">T.</span> <span class=3D"=
surname">Wolf</span>, and <span class=3D"firstname">G.</span> <span class=
=3D"surname">Oglesby</span>. </span><span class=3D"title"><i>Domain Names a=
nd Company Name Retrieval</i>. </span><span class=3D"pubdate">May 1998. </s=
pan></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606220"></a><p>[<abbr class=3D"abbrev">RFC2352</abbr>] <span=
class=3D"author"><span class=3D"firstname">O.</span> <span class=3D"surnam=
e">Vaughan</span>. </span><span class=3D"title"><i>A Convention For Using L=
egal Names as Domain Names</i>. </span><span class=3D"pubdate">May 1998. </=
span></p>
+<a name=3D"id2606375"></a><p>[<abbr class=3D"abbrev">RFC2352</abbr>] <span=
class=3D"author"><span class=3D"firstname">O.</span> <span class=3D"surnam=
e">Vaughan</span>. </span><span class=3D"title"><i>A Convention For Using L=
egal Names as Domain Names</i>. </span><span class=3D"pubdate">May 1998. </=
span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606244"></a><p>[<abbr class=3D"abbrev">RFC3071</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">J.</span> <span class=3D"s=
urname">Klensin</span>. </span><span class=3D"title"><i>Reflections on the =
DNS, RFC 1591, and Categories of Domains</i>. </span><span class=3D"pubdate=
">February 2001. </span></p>
+<a name=3D"id2606398"></a><p>[<abbr class=3D"abbrev">RFC3071</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">J.</span> <span class=3D"s=
urname">Klensin</span>. </span><span class=3D"title"><i>Reflections on the =
DNS, RFC 1591, and Categories of Domains</i>. </span><span class=3D"pubdate=
">February 2001. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606270"></a><p>[<abbr class=3D"abbrev">RFC3258</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">T.</span> <span class=3D"s=
urname">Hardie</span>. </span><span class=3D"title"><i>Distributing Authori=
tative Name Servers via
+<a name=3D"id2606425"></a><p>[<abbr class=3D"abbrev">RFC3258</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">T.</span> <span class=3D"s=
urname">Hardie</span>. </span><span class=3D"title"><i>Distributing Authori=
tative Name Servers via
Shared Unicast Addresses</i>. </span><span class=3D=
"pubdate">April 2002. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606296"></a><p>[<abbr class=3D"abbrev">RFC3901</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">A.</span> <span class=3D"s=
urname">Durand</span> and <span class=3D"firstname">J.</span> <span class=
=3D"surname">Ihren</span>. </span><span class=3D"title"><i>DNS IPv6 Transpo=
rt Operational Guidelines</i>. </span><span class=3D"pubdate">September 200=
4. </span></p>
+<a name=3D"id2606451"></a><p>[<abbr class=3D"abbrev">RFC3901</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">A.</span> <span class=3D"s=
urname">Durand</span> and <span class=3D"firstname">J.</span> <span class=
=3D"surname">Ihren</span>. </span><span class=3D"title"><i>DNS IPv6 Transpo=
rt Operational Guidelines</i>. </span><span class=3D"pubdate">September 200=
4. </span></p>
</div>
</div>
<div class=3D"bibliodiv">
<h3 class=3D"title">Obsolete and Unimplemented Experimental RFC</h3>
<div class=3D"biblioentry">
-<a name=3D"id2606340"></a><p>[<abbr class=3D"abbrev">RFC1712</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">C.</span> <span class=3D"s=
urname">Farrell</span>, <span class=3D"firstname">M.</span> <span class=3D"=
surname">Schulze</span>, <span class=3D"firstname">S.</span> <span class=3D=
"surname">Pleitner</span>, and <span class=3D"firstname">D.</span> <span cl=
ass=3D"surname">Baldoni</span>. </span><span class=3D"title"><i><acronym cl=
ass=3D"acronym">DNS</acronym> Encoding of Geographical
+<a name=3D"id2606494"></a><p>[<abbr class=3D"abbrev">RFC1712</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">C.</span> <span class=3D"s=
urname">Farrell</span>, <span class=3D"firstname">M.</span> <span class=3D"=
surname">Schulze</span>, <span class=3D"firstname">S.</span> <span class=3D=
"surname">Pleitner</span>, and <span class=3D"firstname">D.</span> <span cl=
ass=3D"surname">Baldoni</span>. </span><span class=3D"title"><i><acronym cl=
ass=3D"acronym">DNS</acronym> Encoding of Geographical
Location</i>. </span><span class=3D"pubdate">November 19=
94. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606397"></a><p>[<abbr class=3D"abbrev">RFC2673</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">M.</span> <span class=3D"s=
urname">Crawford</span>. </span><span class=3D"title"><i>Binary Labels in t=
he Domain Name System</i>. </span><span class=3D"pubdate">August 1999. </sp=
an></p>
+<a name=3D"id2606552"></a><p>[<abbr class=3D"abbrev">RFC2673</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">M.</span> <span class=3D"s=
urname">Crawford</span>. </span><span class=3D"title"><i>Binary Labels in t=
he Domain Name System</i>. </span><span class=3D"pubdate">August 1999. </sp=
an></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606424"></a><p>[<abbr class=3D"abbrev">RFC2874</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">M.</span> <span class=3D"s=
urname">Crawford</span> and <span class=3D"firstname">C.</span> <span class=
=3D"surname">Huitema</span>. </span><span class=3D"title"><i>DNS Extensions=
to Support IPv6 Address Aggregation
+<a name=3D"id2606579"></a><p>[<abbr class=3D"abbrev">RFC2874</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">M.</span> <span class=3D"s=
urname">Crawford</span> and <span class=3D"firstname">C.</span> <span class=
=3D"surname">Huitema</span>. </span><span class=3D"title"><i>DNS Extensions=
to Support IPv6 Address Aggregation
and Renumbering</i>. </span><span class=3D"pubdate"=
>July 2000. </span></p>
</div>
</div>
@@ -551,39 +551,39 @@
</p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606472"></a><p>[<abbr class=3D"abbrev">RFC2065</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span> and <span class=
=3D"firstname">C.</span> <span class=3D"surname">Kaufman</span>. </span><sp=
an class=3D"title"><i>Domain Name System Security Extensions</i>. </span><s=
pan class=3D"pubdate">January 1997. </span></p>
+<a name=3D"id2606695"></a><p>[<abbr class=3D"abbrev">RFC2065</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span> and <span class=
=3D"firstname">C.</span> <span class=3D"surname">Kaufman</span>. </span><sp=
an class=3D"title"><i>Domain Name System Security Extensions</i>. </span><s=
pan class=3D"pubdate">January 1997. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606512"></a><p>[<abbr class=3D"abbrev">RFC2137</abbr>] <span=
class=3D"author"><span class=3D"firstname">D.</span> <span class=3D"surnam=
e">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span class=
=3D"title"><i>Secure Domain Name System Dynamic Update</i>. </span><span cl=
ass=3D"pubdate">April 1997. </span></p>
+<a name=3D"id2606734"></a><p>[<abbr class=3D"abbrev">RFC2137</abbr>] <span=
class=3D"author"><span class=3D"firstname">D.</span> <span class=3D"surnam=
e">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span class=
=3D"title"><i>Secure Domain Name System Dynamic Update</i>. </span><span cl=
ass=3D"pubdate">April 1997. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606538"></a><p>[<abbr class=3D"abbrev">RFC2535</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span c=
lass=3D"title"><i>Domain Name System Security Extensions</i>. </span><span =
class=3D"pubdate">March 1999. </span></p>
+<a name=3D"id2606761"></a><p>[<abbr class=3D"abbrev">RFC2535</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Eastlake</span>, <span class=3D"lineage">3rd</span>. </span><span c=
lass=3D"title"><i>Domain Name System Security Extensions</i>. </span><span =
class=3D"pubdate">March 1999. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606568"></a><p>[<abbr class=3D"abbrev">RFC3008</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">B.</span> <span class=3D"s=
urname">Wellington</span>. </span><span class=3D"title"><i>Domain Name Syst=
em Security (DNSSEC)
+<a name=3D"id2606791"></a><p>[<abbr class=3D"abbrev">RFC3008</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">B.</span> <span class=3D"s=
urname">Wellington</span>. </span><span class=3D"title"><i>Domain Name Syst=
em Security (DNSSEC)
Signing Authority</i>. </span><span class=3D"pubdat=
e">November 2000. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606594"></a><p>[<abbr class=3D"abbrev">RFC3090</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">E.</span> <span class=3D"s=
urname">Lewis</span>. </span><span class=3D"title"><i>DNS Security Extensio=
n Clarification on Zone Status</i>. </span><span class=3D"pubdate">March 20=
01. </span></p>
+<a name=3D"id2606817"></a><p>[<abbr class=3D"abbrev">RFC3090</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">E.</span> <span class=3D"s=
urname">Lewis</span>. </span><span class=3D"title"><i>DNS Security Extensio=
n Clarification on Zone Status</i>. </span><span class=3D"pubdate">March 20=
01. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606620"></a><p>[<abbr class=3D"abbrev">RFC3445</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Massey</span> and <span class=3D"firstname">S.</span> <span class=
=3D"surname">Rose</span>. </span><span class=3D"title"><i>Limiting the Scop=
e of the KEY Resource Record (RR)</i>. </span><span class=3D"pubdate">Decem=
ber 2002. </span></p>
+<a name=3D"id2606843"></a><p>[<abbr class=3D"abbrev">RFC3445</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">D.</span> <span class=3D"s=
urname">Massey</span> and <span class=3D"firstname">S.</span> <span class=
=3D"surname">Rose</span>. </span><span class=3D"title"><i>Limiting the Scop=
e of the KEY Resource Record (RR)</i>. </span><span class=3D"pubdate">Decem=
ber 2002. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606657"></a><p>[<abbr class=3D"abbrev">RFC3655</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">B.</span> <span class=3D"s=
urname">Wellington</span> and <span class=3D"firstname">O.</span> <span cla=
ss=3D"surname">Gudmundsson</span>. </span><span class=3D"title"><i>Redefini=
tion of DNS Authenticated Data (AD) bit</i>. </span><span class=3D"pubdate"=
>November 2003. </span></p>
+<a name=3D"id2606880"></a><p>[<abbr class=3D"abbrev">RFC3655</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">B.</span> <span class=3D"s=
urname">Wellington</span> and <span class=3D"firstname">O.</span> <span cla=
ss=3D"surname">Gudmundsson</span>. </span><span class=3D"title"><i>Redefini=
tion of DNS Authenticated Data (AD) bit</i>. </span><span class=3D"pubdate"=
>November 2003. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606693"></a><p>[<abbr class=3D"abbrev">RFC3658</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">O.</span> <span class=3D"s=
urname">Gudmundsson</span>. </span><span class=3D"title"><i>Delegation Sign=
er (DS) Resource Record (RR)</i>. </span><span class=3D"pubdate">December 2=
003. </span></p>
+<a name=3D"id2606916"></a><p>[<abbr class=3D"abbrev">RFC3658</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">O.</span> <span class=3D"s=
urname">Gudmundsson</span>. </span><span class=3D"title"><i>Delegation Sign=
er (DS) Resource Record (RR)</i>. </span><span class=3D"pubdate">December 2=
003. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606720"></a><p>[<abbr class=3D"abbrev">RFC3755</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">S.</span> <span class=3D"s=
urname">Weiler</span>. </span><span class=3D"title"><i>Legacy Resolver Comp=
atibility for Delegation Signer (DS)</i>. </span><span class=3D"pubdate">Ma=
y 2004. </span></p>
+<a name=3D"id2606942"></a><p>[<abbr class=3D"abbrev">RFC3755</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">S.</span> <span class=3D"s=
urname">Weiler</span>. </span><span class=3D"title"><i>Legacy Resolver Comp=
atibility for Delegation Signer (DS)</i>. </span><span class=3D"pubdate">Ma=
y 2004. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606746"></a><p>[<abbr class=3D"abbrev">RFC3757</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">O.</span> <span class=3D"s=
urname">Kolkman</span>, <span class=3D"firstname">J.</span> <span class=3D"=
surname">Schlyter</span>, and <span class=3D"firstname">E.</span> <span cla=
ss=3D"surname">Lewis</span>. </span><span class=3D"title"><i>Domain Name Sy=
stem KEY (DNSKEY) Resource Record
+<a name=3D"id2607037"></a><p>[<abbr class=3D"abbrev">RFC3757</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">O.</span> <span class=3D"s=
urname">Kolkman</span>, <span class=3D"firstname">J.</span> <span class=3D"=
surname">Schlyter</span>, and <span class=3D"firstname">E.</span> <span cla=
ss=3D"surname">Lewis</span>. </span><span class=3D"title"><i>Domain Name Sy=
stem KEY (DNSKEY) Resource Record
(RR) Secure Entry Point (SEP) Flag</i>. </span><span=
class=3D"pubdate">April 2004. </span></p>
</div>
<div class=3D"biblioentry">
-<a name=3D"id2606791"></a><p>[<abbr class=3D"abbrev">RFC3845</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">J.</span> <span class=3D"s=
urname">Schlyter</span>. </span><span class=3D"title"><i>DNS Security (DNSS=
EC) NextSECure (NSEC) RDATA Format</i>. </span><span class=3D"pubdate">Augu=
st 2004. </span></p>
+<a name=3D"id2607082"></a><p>[<abbr class=3D"abbrev">RFC3845</abbr>] <span=
class=3D"authorgroup"><span class=3D"firstname">J.</span> <span class=3D"s=
urname">Schlyter</span>. </span><span class=3D"title"><i>DNS Security (DNSS=
EC) NextSECure (NSEC) RDATA Format</i>. </span><span class=3D"pubdate">Augu=
st 2004. </span></p>
</div>
</div>
</div>
@@ -604,14 +604,14 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2606901"></a>Other Documents About <acronym class=3D"acronym"=
>BIND</acronym>
+<a name=3D"id2607124"></a>Other Documents About <acronym class=3D"acronym"=
>BIND</acronym>
</h3></div></div></div>
<p></p>
<div class=3D"bibliography">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2606910"></a>Bibliography</h4></div></div></div>
+<a name=3D"id2607133"></a>Bibliography</h4></div></div></div>
<div class=3D"biblioentry">
-<a name=3D"id2606913"></a><p><span class=3D"authorgroup"><span class=3D"fi=
rstname">Paul</span> <span class=3D"surname">Albitz</span> and <span class=
=3D"firstname">Cricket</span> <span class=3D"surname">Liu</span>. </span><s=
pan class=3D"title"><i><acronym class=3D"acronym">DNS</acronym> and <acrony=
m class=3D"acronym">BIND</acronym></i>. </span><span class=3D"copyright">Co=
pyright =A9 1998 Sebastopol, CA: O'Reilly and Associates. </span></p>
+<a name=3D"id2607136"></a><p><span class=3D"authorgroup"><span class=3D"fi=
rstname">Paul</span> <span class=3D"surname">Albitz</span> and <span class=
=3D"firstname">Cricket</span> <span class=3D"surname">Liu</span>. </span><s=
pan class=3D"title"><i><acronym class=3D"acronym">DNS</acronym> and <acrony=
m class=3D"acronym">BIND</acronym></i>. </span><span class=3D"copyright">Co=
pyright =A9 1998 Sebastopol, CA: O'Reilly and Associates. </span></p>
</div>
</div>
</div>
@@ -648,7 +648,7 @@
</ul></div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2608203"></a>Prerequisite</h3></div></div></div>
+<a name=3D"id2608280"></a>Prerequisite</h3></div></div></div>
<p>GNU make is required to build the export libraries (other
part of BIND 9 can still be built with other types of make). In
the reminder of this document, "make" means GNU make. Note that
@@ -657,7 +657,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2608213"></a>Compilation</h3></div></div></div>
+<a name=3D"id2608290"></a>Compilation</h3></div></div></div>
<pre class=3D"screen">
$ <strong class=3D"userinput"><code>./configure --enable-exportlib <em cla=
ss=3D"replaceable"><code>[other flags]</code></em></code></strong>
$ <strong class=3D"userinput"><code>make</code></strong>
@@ -672,7 +672,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2608237"></a>Installation</h3></div></div></div>
+<a name=3D"id2608314"></a>Installation</h3></div></div></div>
<pre class=3D"screen">
$ <strong class=3D"userinput"><code>cd lib/export</code></strong>
$ <strong class=3D"userinput"><code>make install</code></strong>
@@ -694,7 +694,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2608268"></a>Known Defects/Restrictions</h3></div></div></div>
+<a name=3D"id2608345"></a>Known Defects/Restrictions</h3></div></div></div>
<div class=3D"itemizedlist"><ul type=3D"disc">
<li><p>Currently, win32 is not supported for the export
library. (Normal BIND 9 application can be built as
@@ -734,7 +734,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2608413"></a>The dns.conf File</h3></div></div></div>
+<a name=3D"id2608422"></a>The dns.conf File</h3></div></div></div>
<p>The IRS library supports an "advanced" configuration file
related to the DNS library for configuration parameters that
would be beyond the capability of the
@@ -752,14 +752,14 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2608440"></a>Sample Applications</h3></div></div></div>
+<a name=3D"id2608449"></a>Sample Applications</h3></div></div></div>
<p>Some sample application programs using this API are
provided for reference. The following is a brief description of
these applications.
</p>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2608449"></a>sample: a simple stub resolver utility</h4></div=
></div></div>
+<a name=3D"id2608457"></a>sample: a simple stub resolver utility</h4></div=
></div></div>
<p>
It sends a query of a given name (of a given optional RR type) to a
specified recursive server, and prints the result as a list of
@@ -823,7 +823,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2608608"></a>sample-async: a simple stub resolver, working as=
ynchronously</h4></div></div></div>
+<a name=3D"id2608548"></a>sample-async: a simple stub resolver, working as=
ynchronously</h4></div></div></div>
<p>
Similar to "sample", but accepts a list
of (query) domain names as a separate file and resolves the names
@@ -864,7 +864,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2608661"></a>sample-request: a simple DNS transaction client<=
/h4></div></div></div>
+<a name=3D"id2608601"></a>sample-request: a simple DNS transaction client<=
/h4></div></div></div>
<p>
It sends a query to a specified server, and
prints the response with minimal processing. It doesn't act as a
@@ -905,7 +905,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2608725"></a>sample-gai: getaddrinfo() and getnameinfo() test=
code</h4></div></div></div>
+<a name=3D"id2608733"></a>sample-gai: getaddrinfo() and getnameinfo() test=
code</h4></div></div></div>
<p>
This is a test program
to check getaddrinfo() and getnameinfo() behavior. It takes a
@@ -922,7 +922,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2608740"></a>sample-update: a simple dynamic update client pr=
ogram</h4></div></div></div>
+<a name=3D"id2608748"></a>sample-update: a simple dynamic update client pr=
ogram</h4></div></div></div>
<p>
It accepts a single update command as a
command-line argument, sends an update request message to the
@@ -1017,7 +1017,7 @@
</div>
<div class=3D"sect3" lang=3D"en">
<div class=3D"titlepage"><div><div><h4 class=3D"title">
-<a name=3D"id2609281"></a>nsprobe: domain/name server checker in terms of =
RFC 4074</h4></div></div></div>
+<a name=3D"id2609426"></a>nsprobe: domain/name server checker in terms of =
RFC 4074</h4></div></div></div>
<p>
It checks a set
of domains to see the name servers of the domains behave
@@ -1074,7 +1074,7 @@
</div>
<div class=3D"sect2" lang=3D"en">
<div class=3D"titlepage"><div><div><h3 class=3D"title">
-<a name=3D"id2609345"></a>Library References</h3></div></div></div>
+<a name=3D"id2609490"></a>Library References</h3></div></div></div>
<p>As of this writing, there is no formal "manual" of the
libraries, except this document, header files (some of them
provide pretty detailed explanations), and sample application
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/Bv9ARM.ch10=
.html
--- a/head/contrib/bind9/doc/arm/Bv9ARM.ch10.html Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/doc/arm/Bv9ARM.ch10.html Tue Apr 17 11:51:51 2012 =
+0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: Bv9ARM.ch10.html,v 1.20 2011-01-05 01:14:09 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/Bv9ARM.html
--- a/head/contrib/bind9/doc/arm/Bv9ARM.html Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/arm/Bv9ARM.html Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: Bv9ARM.html,v 1.263.8.9 2011-08-03 02:35:13 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -40,8 +40,8 @@
<div class=3D"titlepage">
<div>
<div><h1 class=3D"title">
-<a name=3D"id2563174"></a>BIND 9 Administrator Reference Manual</h1></div>
-<div><p class=3D"copyright">Copyright =A9 2004-2011 Internet Systems Conso=
rtium, Inc. ("ISC")</p></div>
+<a name=3D"id2563175"></a>BIND 9 Administrator Reference Manual</h1></div>
+<div><p class=3D"copyright">Copyright =A9 2004-2012 Internet Systems Conso=
rtium, Inc. ("ISC")</p></div>
<div><p class=3D"copyright">Copyright =A9 2000-2003 Internet Software Cons=
ortium.</p></div>
</div>
<hr>
@@ -51,39 +51,39 @@
<dl>
<dt><span class=3D"chapter"><a href=3D"Bv9ARM.ch01.html">1. Introduction</=
a></span></dt>
<dd><dl>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564371">Scope of =
Document</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564394">Organizat=
ion of This Document</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564534">Conventio=
ns Used in This Document</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564715">The Domai=
n Name System (<acronym class=3D"acronym">DNS</acronym>)</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564375">Scope of =
Document</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564398">Organizat=
ion of This Document</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564538">Conventio=
ns Used in This Document</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch01.html#id2564720">The Domai=
n Name System (<acronym class=3D"acronym">DNS</acronym>)</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2564737">DNS Funda=
mentals</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2564771">Domains a=
nd Domain Names</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567176">Zones</a>=
</span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567253">Authorita=
tive Name Servers</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567426">Caching N=
ame Servers</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567556">Name Serv=
ers in Multiple Roles</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2564741">DNS Funda=
mentals</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2564775">Domains a=
nd Domain Names</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567180">Zones</a>=
</span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567257">Authorita=
tive Name Servers</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567430">Caching N=
ame Servers</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch01.html#id2567560">Name Serv=
ers in Multiple Roles</a></span></dt>
</dl></dd>
</dl></dd>
<dt><span class=3D"chapter"><a href=3D"Bv9ARM.ch02.html">2. <acronym class=
=3D"acronym">BIND</acronym> Resource Requirements</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567590">Hardware =
requirements</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567617">CPU Requi=
rements</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567629">Memory Re=
quirements</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567724">Name Serv=
er Intensive Environment Issues</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567735">Supported=
Operating Systems</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567594">Hardware =
requirements</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567621">CPU Requi=
rements</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567634">Memory Re=
quirements</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567729">Name Serv=
er Intensive Environment Issues</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch02.html#id2567739">Supported=
Operating Systems</a></span></dt>
</dl></dd>
<dt><span class=3D"chapter"><a href=3D"Bv9ARM.ch03.html">3. Name Server Co=
nfiguration</a></span></dt>
<dd><dl>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch03.html#sample_configuration=
">Sample Configurations</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2567767">A Caching=
-only Name Server</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2567988">An Author=
itative-only Name Server</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2567771">A Caching=
-only Name Server</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2567992">An Author=
itative-only Name Server</a></span></dt>
</dl></dd>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch03.html#id2568010">Load Bala=
ncing</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch03.html#id2568364">Name Serv=
er Operations</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch03.html#id2568014">Load Bala=
ncing</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch03.html#id2568369">Name Serv=
er Operations</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2568370">Tools for=
Use With the Name Server Daemon</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2570378">Signals</=
a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2568374">Tools for=
Use With the Name Server Daemon</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch03.html#id2570421">Signals</=
a></span></dt>
</dl></dd>
</dl></dd>
<dt><span class=3D"chapter"><a href=3D"Bv9ARM.ch04.html">4. Advanced DNS F=
eatures</a></span></dt>
@@ -92,64 +92,64 @@
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#dynamic_update">Dyna=
mic Update</a></span></dt>
<dd><dl><dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#journal">The=
journal file</a></span></dt></dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#incremental_zone_tra=
nsfers">Incremental Zone Transfers (IXFR)</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2570885">Split DNS=
</a></span></dt>
-<dd><dl><dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2570903">E=
xample split DNS setup</a></span></dt></dl></dd>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2570934">Split DNS=
</a></span></dt>
+<dd><dl><dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2570952">E=
xample split DNS setup</a></span></dt></dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#tsig">TSIG</a></span=
></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571336">Generate =
Shared Keys for Each Pair of Hosts</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571478">Copying t=
he Shared Secret to Both Machines</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571489">Informing=
the Servers of the Key's Existence</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571525">Instructi=
ng the Server to Use the Key</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571651">TSIG Key =
Based Access Control</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571700">Errors</a=
></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2564012">Generate =
Shared Keys for Each Pair of Hosts</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2564086">Copying t=
he Shared Secret to Both Machines</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571811">Informing=
the Servers of the Key's Existence</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571847">Instructi=
ng the Server to Use the Key</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571905">TSIG Key =
Based Access Control</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571954">Errors</a=
></span></dt>
</dl></dd>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2571714">TKEY</a><=
/span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2563980">SIG(0)</a=
></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2571968">TKEY</a><=
/span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2572153">SIG(0)</a=
></span></dt>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#DNSSEC">DNSSEC</a></=
span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2564117">Generatin=
g Keys</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572183">Signing t=
he Zone</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572264">Configuri=
ng Servers</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572221">Generatin=
g Keys</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572300">Signing t=
he Zone</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572381">Configuri=
ng Servers</a></span></dt>
</dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#dnssec.dynamic.zones=
">DNSSEC, Dynamic Zones, and Automatic Signing</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563484">Convertin=
g from insecure to secure</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563522">Dynamic D=
NS update method</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563626">Fully aut=
omatic zone signing</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563777">Private-t=
ype records</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563814">DNSKEY ro=
llovers</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563827">Dynamic D=
NS update method</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563860">Automatic=
key rollovers</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563886">NSEC3PARA=
M rollovers via UPDATE</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563896">Convertin=
g from NSEC to NSEC3</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563906">Convertin=
g from NSEC3 to NSEC</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563918">Convertin=
g from secure to insecure</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563956">Periodic =
re-signing</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571816">NSEC3 and=
OPTOUT</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571421">Convertin=
g from insecure to secure</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571459">Dynamic D=
NS update method</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563508">Fully aut=
omatic zone signing</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563590">Private-t=
ype records</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563696">DNSKEY ro=
llovers</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563708">Dynamic D=
NS update method</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563741">Automatic=
key rollovers</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563836">NSEC3PARA=
M rollovers via UPDATE</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563846">Convertin=
g from NSEC to NSEC3</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563856">Convertin=
g from NSEC3 to NSEC</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563868">Convertin=
g from secure to insecure</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563906">Periodic =
re-signing</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2563915">NSEC3 and=
OPTOUT</a></span></dt>
</dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#rfc5011.support">Dyn=
amic Trust Anchor Management</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571869">Validatin=
g Resolver</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571892">Authorita=
tive Server</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571685">Validatin=
g Resolver</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2571707">Authorita=
tive Server</a></span></dt>
</dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#pkcs11">PKCS #11 (Cr=
yptoki) support</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2609757">Prerequis=
ites</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2607912">Building =
BIND 9 with PKCS#11</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2608144">PKCS #11 =
Tools</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2608174">Using the=
HSM</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2610353">Specifyin=
g the engine on the command line</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2610467">Running n=
amed with automatic zone re-signing</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2609970">Prerequis=
ites</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2608219">Building =
BIND 9 with PKCS#11</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2610529">PKCS #11 =
Tools</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2610560">Using the=
HSM</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2635129">Specifyin=
g the engine on the command line</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2635243">Running n=
amed with automatic zone re-signing</a></span></dt>
</dl></dd>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2572484">IPv6 Supp=
ort in <acronym class=3D"acronym">BIND</acronym> 9</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch04.html#id2572669">IPv6 Supp=
ort in <acronym class=3D"acronym">BIND</acronym> 9</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572819">Address L=
ookups Using AAAA Records</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572840">Address t=
o Name Lookups Using Nibble Format</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572868">Address L=
ookups Using AAAA Records</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch04.html#id2572889">Address t=
o Name Lookups Using Nibble Format</a></span></dt>
</dl></dd>
</dl></dd>
<dt><span class=3D"chapter"><a href=3D"Bv9ARM.ch05.html">5. The <acronym c=
lass=3D"acronym">BIND</acronym> 9 Lightweight Resolver</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch05.html#id2572873">The Light=
weight Resolver Library</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch05.html#id2572922">The Light=
weight Resolver Library</a></span></dt>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch05.html#lwresd">Running a Re=
solver Daemon</a></span></dt>
</dl></dd>
<dt><span class=3D"chapter"><a href=3D"Bv9ARM.ch06.html">6. <acronym class=
=3D"acronym">BIND</acronym> 9 Configuration Reference</a></span></dt>
@@ -157,58 +157,58 @@
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch06.html#configuration_file_e=
lements">Configuration File Elements</a></span></dt>
<dd><dl>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#address_match_lists"=
>Address Match Lists</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2574283">Comment S=
yntax</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2574332">Comment S=
yntax</a></span></dt>
</dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch06.html#Configuration_File_G=
rammar">Configuration File Grammar</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2574937"><span><st=
rong class=3D"command">acl</strong></span> Statement Grammar</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2574986"><span><st=
rong class=3D"command">acl</strong></span> Statement Grammar</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#acl"><span><strong c=
lass=3D"command">acl</strong></span> Statement Definition and
Usage</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575127"><span><st=
rong class=3D"command">controls</strong></span> Statement Grammar</a></span=
></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575176"><span><st=
rong class=3D"command">controls</strong></span> Statement Grammar</a></span=
></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#controls_statement_d=
efinition_and_usage"><span><strong class=3D"command">controls</strong></spa=
n> Statement Definition and
Usage</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575418"><span><st=
rong class=3D"command">include</strong></span> Statement Grammar</a></span>=
</dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575504"><span><st=
rong class=3D"command">include</strong></span> Statement Definition and
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575467"><span><st=
rong class=3D"command">include</strong></span> Statement Grammar</a></span>=
</dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575484"><span><st=
rong class=3D"command">include</strong></span> Statement Definition and
Usage</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575527"><span><st=
rong class=3D"command">key</strong></span> Statement Grammar</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575550"><span><st=
rong class=3D"command">key</strong></span> Statement Definition and Usage</=
a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575709"><span><st=
rong class=3D"command">logging</strong></span> Statement Grammar</a></span>=
</dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575835"><span><st=
rong class=3D"command">logging</strong></span> Statement Definition and
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575576"><span><st=
rong class=3D"command">key</strong></span> Statement Grammar</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575600"><span><st=
rong class=3D"command">key</strong></span> Statement Definition and Usage</=
a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575758"><span><st=
rong class=3D"command">logging</strong></span> Statement Grammar</a></span>=
</dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2575884"><span><st=
rong class=3D"command">logging</strong></span> Statement Definition and
Usage</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2577834"><span><st=
rong class=3D"command">lwres</strong></span> Statement Grammar</a></span></=
dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2577908"><span><st=
rong class=3D"command">lwres</strong></span> Statement Definition and Usage=
</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2578040"><span><st=
rong class=3D"command">masters</strong></span> Statement Grammar</a></span>=
</dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2578084"><span><st=
rong class=3D"command">masters</strong></span> Statement Definition and
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2577910"><span><st=
rong class=3D"command">lwres</strong></span> Statement Grammar</a></span></=
dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2577984"><span><st=
rong class=3D"command">lwres</strong></span> Statement Definition and Usage=
</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2578116"><span><st=
rong class=3D"command">masters</strong></span> Statement Grammar</a></span>=
</dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2578160"><span><st=
rong class=3D"command">masters</strong></span> Statement Definition and
Usage</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2578099"><span><st=
rong class=3D"command">options</strong></span> Statement Grammar</a></span>=
</dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2578174"><span><st=
rong class=3D"command">options</strong></span> Statement Grammar</a></span>=
</dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#options"><span><stro=
ng class=3D"command">options</strong></span> Statement Definition and
Usage</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#server_statement_gra=
mmar"><span><strong class=3D"command">server</strong></span> Statement Gram=
mar</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#server_statement_def=
inition_and_usage"><span><strong class=3D"command">server</strong></span> S=
tatement Definition and
Usage</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#statschannels"><span=
><strong class=3D"command">statistics-channels</strong></span> Statement Gr=
ammar</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2589395"><span><st=
rong class=3D"command">statistics-channels</strong></span> Statement Defini=
tion and
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2589481"><span><st=
rong class=3D"command">statistics-channels</strong></span> Statement Defini=
tion and
Usage</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#trusted-keys"><span>=
<strong class=3D"command">trusted-keys</strong></span> Statement Grammar</a=
></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2589534"><span><st=
rong class=3D"command">trusted-keys</strong></span> Statement Definition
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2589689"><span><st=
rong class=3D"command">trusted-keys</strong></span> Statement Definition
and Usage</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2589581"><span><st=
rong class=3D"command">managed-keys</strong></span> Statement Grammar</a></=
span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2589736"><span><st=
rong class=3D"command">managed-keys</strong></span> Statement Grammar</a></=
span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#managed-keys"><span>=
<strong class=3D"command">managed-keys</strong></span> Statement Definition
and Usage</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#view_statement_gramm=
ar"><span><strong class=3D"command">view</strong></span> Statement Grammar<=
/a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2590007"><span><st=
rong class=3D"command">view</strong></span> Statement Definition and Usage<=
/a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2590162"><span><st=
rong class=3D"command">view</strong></span> Statement Definition and Usage<=
/a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#zone_statement_gramm=
ar"><span><strong class=3D"command">zone</strong></span>
Statement Grammar</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2591558"><span><st=
rong class=3D"command">zone</strong></span> Statement Definition and Usage<=
/a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2591713"><span><st=
rong class=3D"command">zone</strong></span> Statement Definition and Usage<=
/a></span></dt>
</dl></dd>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch06.html#id2595030">Zone File=
</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch06.html#id2595116">Zone File=
</a></span></dt>
<dd><dl>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#types_of_resource_re=
cords_and_when_to_use_them">Types of Resource Records and When to Use Them<=
/a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2597260">Discussio=
n of MX Records</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2597415">Discussio=
n of MX Records</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#Setting_TTLs">Settin=
g TTLs</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2597876">Inverse M=
apping in IPv4</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2598003">Other Zon=
e File Directives</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2598276"><acronym =
class=3D"acronym">BIND</acronym> Master File Extension: the <span><strong =
class=3D"command">$GENERATE</strong></span> Directive</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2597962">Inverse M=
apping in IPv4</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2598157">Other Zon=
e File Directives</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#id2598430"><acronym =
class=3D"acronym">BIND</acronym> Master File Extension: the <span><strong =
class=3D"command">$GENERATE</strong></span> Directive</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch06.html#zonefile_format">Add=
itional File Formats</a></span></dt>
</dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch06.html#statistics">BIND9 St=
atistics</a></span></dt>
@@ -217,41 +217,41 @@
<dt><span class=3D"chapter"><a href=3D"Bv9ARM.ch07.html">7. <acronym class=
=3D"acronym">BIND</acronym> 9 Security Considerations</a></span></dt>
<dd><dl>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch07.html#Access_Control_Lists=
">Access Control Lists</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch07.html#id2602996"><span><st=
rong class=3D"command">Chroot</strong></span> and <span><strong class=3D"co=
mmand">Setuid</strong></span></a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch07.html#id2603082"><span><st=
rong class=3D"command">Chroot</strong></span> and <span><strong class=3D"co=
mmand">Setuid</strong></span></a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch07.html#id2603077">The <span=
><strong class=3D"command">chroot</strong></span> Environment</a></span></d=
t>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch07.html#id2603137">Using the=
<span><strong class=3D"command">setuid</strong></span> Function</a></span>=
</dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch07.html#id2603232">The <span=
><strong class=3D"command">chroot</strong></span> Environment</a></span></d=
t>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch07.html#id2603291">Using the=
<span><strong class=3D"command">setuid</strong></span> Function</a></span>=
</dt>
</dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch07.html#dynamic_update_secur=
ity">Dynamic Update Security</a></span></dt>
</dl></dd>
<dt><span class=3D"chapter"><a href=3D"Bv9ARM.ch08.html">8. Troubleshootin=
g</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch08.html#id2603285">Common Pr=
oblems</a></span></dt>
-<dd><dl><dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch08.html#id2603290">I=
t's not working; how can I figure out what's wrong?</a></span></dt></dl></d=
d>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch08.html#id2603302">Increment=
ing and Changing the Serial Number</a></span></dt>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch08.html#id2603319">Where Can=
I Get Help?</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch08.html#id2603371">Common Pr=
oblems</a></span></dt>
+<dd><dl><dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch08.html#id2603377">I=
t's not working; how can I figure out what's wrong?</a></span></dt></dl></d=
d>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch08.html#id2603388">Increment=
ing and Changing the Serial Number</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch08.html#id2603405">Where Can=
I Get Help?</a></span></dt>
</dl></dd>
<dt><span class=3D"appendix"><a href=3D"Bv9ARM.ch09.html">A. Appendices</a=
></span></dt>
<dd><dl>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch09.html#id2603449">Acknowled=
gments</a></span></dt>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch09.html#id2603536">Acknowled=
gments</a></span></dt>
<dd><dl><dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#historical_d=
ns_information">A Brief History of the <acronym class=3D"acronym">DNS</acro=
nym> and <acronym class=3D"acronym">BIND</acronym></a></span></dt></dl></dd>
-<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch09.html#id2603553">General <=
acronym class=3D"acronym">DNS</acronym> Reference Information</a></span></d=
t>
+<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch09.html#id2603707">General <=
acronym class=3D"acronym">DNS</acronym> Reference Information</a></span></d=
t>
<dd><dl><dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#ipv6addresse=
s">IPv6 addresses (AAAA)</a></span></dt></dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch09.html#bibliography">Biblio=
graphy (and Suggested Reading)</a></span></dt>
<dd><dl>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#rfcs">Request for Co=
mments (RFCs)</a></span></dt>
<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#internet_drafts">Int=
ernet Drafts</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2606901">Other Doc=
uments About <acronym class=3D"acronym">BIND</acronym></a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2607124">Other Doc=
uments About <acronym class=3D"acronym">BIND</acronym></a></span></dt>
</dl></dd>
<dt><span class=3D"sect1"><a href=3D"Bv9ARM.ch09.html#bind9.library">BIND =
9 DNS Library Support</a></span></dt>
<dd><dl>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608203">Prerequis=
ite</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608213">Compilati=
on</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608237">Installat=
ion</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608268">Known Def=
ects/Restrictions</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608413">The dns.c=
onf File</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608440">Sample Ap=
plications</a></span></dt>
-<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2609345">Library R=
eferences</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608280">Prerequis=
ite</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608290">Compilati=
on</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608314">Installat=
ion</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608345">Known Def=
ects/Restrictions</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608422">The dns.c=
onf File</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2608449">Sample Ap=
plications</a></span></dt>
+<dt><span class=3D"sect2"><a href=3D"Bv9ARM.ch09.html#id2609490">Library R=
eferences</a></span></dt>
</dl></dd>
</dl></dd>
<dt><span class=3D"reference"><a href=3D"Bv9ARM.ch10.html">I. Manual pages=
</a></span></dt>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/Bv9ARM.pdf
Binary file head/contrib/bind9/doc/arm/Bv9ARM.pdf has changed
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/Makefile.in
--- a/head/contrib/bind9/doc/arm/Makefile.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/arm/Makefile.in Tue Apr 17 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.22 2009-02-12 23:47:56 tbox Exp $
+# $Id: Makefile.in,v 1.22 2009/02/12 23:47:56 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/README-SGML
--- a/head/contrib/bind9/doc/arm/README-SGML Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/arm/README-SGML Tue Apr 17 11:51:51 2012 +0300
@@ -4,7 +4,7 @@
=20
The BIND v9 ARM master document is now kept in DocBook XML format.
=20
-Version: $Id: README-SGML,v 1.17 2004-03-05 05:04:43 marka Exp $
+Version: $Id: README-SGML,v 1.17 2004/03/05 05:04:43 marka Exp $
=20
The entire ARM is in the single file:
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/dnssec.xml
--- a/head/contrib/bind9/doc/arm/dnssec.xml Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/arm/dnssec.xml Tue Apr 17 11:51:51 2012 +0300
@@ -1,6 +1,6 @@
<?xml version=3D"1.0" encoding=3D"utf-8"?>
<!--
- - Copyright (C) 2010 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2010, 2012 Internet Systems Consortium, Inc. ("ISC")
-
- Permission to use, copy, modify, and/or distribute this software for any
- purpose with or without fee is hereby granted, provided that the above
@@ -15,7 +15,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: dnssec.xml,v 1.4 2010-08-16 22:21:06 marka Exp $ -->
+<!-- $Id$ -->
=20
<sect1 id=3D"dnssec.dynamic.zones">
<title>DNSSEC, Dynamic Zones, and Automatic Signing</title>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/libdns.xml
--- a/head/contrib/bind9/doc/arm/libdns.xml Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/arm/libdns.xml Tue Apr 17 11:51:51 2012 +0300
@@ -527,4 +527,4 @@
programs.</para>
</sect2>
</sect1>
-<!-- $Id: libdns.xml,v 1.3 2010-02-03 23:49:07 tbox Exp $ -->
+<!-- $Id: libdns.xml,v 1.3 2010/02/03 23:49:07 tbox Exp $ -->
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.arpanam=
e.html
--- a/head/contrib/bind9/doc/arm/man.arpaname.html Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/doc/arm/man.arpaname.html Tue Apr 17 11:51:51 2012=
+0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.arpaname.html,v 1.33.8.11 2011-08-03 02:35:10 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,20 +50,20 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">arpaname</code> {<e=
m class=3D"replaceable"><code>ipaddress </code></em>...}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2648201"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2614792"></a><h2>DESCRIPTION</h2>
<p>
<span><strong class=3D"command">arpaname</strong></span> translates =
IP addresses (IPv4 and
IPv6) to the corresponding IN-ADDR.ARPA or IP6.ARPA names.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2648216"></a><h2>SEE ALSO</h2>
+<a name=3D"id2614807"></a><h2>SEE ALSO</h2>
<p>
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2648230"></a><h2>AUTHOR</h2>
+<a name=3D"id2652026"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.ddns-co=
nfgen.html
--- a/head/contrib/bind9/doc/arm/man.ddns-confgen.html Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/doc/arm/man.ddns-confgen.html Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.ddns-confgen.html,v 1.69.8.11 2011-08-03 02:35:10 tbox Exp $=
-->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">ddns-confgen</code> =
[<code class=3D"option">-a <em class=3D"replaceable"><code>algorithm</code=
></em></code>] [<code class=3D"option">-h</code>] [<code class=3D"option">-=
k <em class=3D"replaceable"><code>keyname</code></em></code>] [<code class=
=3D"option">-r <em class=3D"replaceable"><code>randomfile</code></em></code=
>] [ -s <em class=3D"replaceable"><code>name</code></em> | -z <em class=
=3D"replaceable"><code>zone</code></em> ] [<code class=3D"option">-q</code>=
] [name]</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2644606"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2651677"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">ddns-confgen</strong></span>
generates a key for use by <span><strong class=3D"command">nsupdate<=
/strong></span>
and <span><strong class=3D"command">named</strong></span>. It simpl=
ifies configuration
@@ -77,7 +77,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2644762"></a><h2>OPTIONS</h2>
+<a name=3D"id2651765"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-a <em class=3D"replaceable"><code>algorithm</cod=
e></em></span></dt>
<dd><p>
@@ -144,7 +144,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2645987"></a><h2>SEE ALSO</h2>
+<a name=3D"id2651965"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">nsupdate</sp=
an>(1)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named.con=
f</span>(5)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named</sp=
an>(8)</span>,
@@ -152,7 +152,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2648141"></a><h2>AUTHOR</h2>
+<a name=3D"id2652004"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.dig.html
--- a/head/contrib/bind9/doc/arm/man.dig.html Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/arm/man.dig.html Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.dig.html,v 1.162.8.9 2011-08-03 02:35:11 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -52,7 +52,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">dig</code> [global-=
queryopt...] [query...]</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2609512"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2610001"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">dig</strong></span>
(domain information groper) is a flexible tool
for interrogating DNS name servers. It performs DNS lookups and
@@ -98,7 +98,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2609607"></a><h2>SIMPLE USAGE</h2>
+<a name=3D"id2610096"></a><h2>SIMPLE USAGE</h2>
<p>
A typical invocation of <span><strong class=3D"command">dig</strong>=
</span> looks like:
</p>
@@ -144,7 +144,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2610059"></a><h2>OPTIONS</h2>
+<a name=3D"id2610889"></a><h2>OPTIONS</h2>
<p>
The <code class=3D"option">-b</code> option sets the source IP addre=
ss of the query
to <em class=3D"parameter"><code>address</code></em>. This must be =
a valid
@@ -248,7 +248,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2662694"></a><h2>QUERY OPTIONS</h2>
+<a name=3D"id2662636"></a><h2>QUERY OPTIONS</h2>
<p><span><strong class=3D"command">dig</strong></span>
provides a number of query options which affect
the way in which lookups are made and the results displayed. Some of
@@ -579,7 +579,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2663708"></a><h2>MULTIPLE QUERIES</h2>
+<a name=3D"id2663651"></a><h2>MULTIPLE QUERIES</h2>
<p>
The BIND 9 implementation of <span><strong class=3D"command">dig </s=
trong></span>
supports
@@ -625,7 +625,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2663794"></a><h2>IDN SUPPORT</h2>
+<a name=3D"id2663804"></a><h2>IDN SUPPORT</h2>
<p>
If <span><strong class=3D"command">dig</strong></span> has been buil=
t with IDN (internationalized
domain name) support, it can accept and display non-ASCII domain nam=
es.
@@ -639,14 +639,14 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2663822"></a><h2>FILES</h2>
+<a name=3D"id2663833"></a><h2>FILES</h2>
<p><code class=3D"filename">/etc/resolv.conf</code>
</p>
<p><code class=3D"filename">${HOME}/.digrc</code>
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2663912"></a><h2>SEE ALSO</h2>
+<a name=3D"id2663854"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">host</span>(=
1)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named</sp=
an>(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-ke=
ygen</span>(8)</span>,
@@ -654,7 +654,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2663949"></a><h2>BUGS</h2>
+<a name=3D"id2663892"></a><h2>BUGS</h2>
<p>
There are probably too many query options.
</p>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.dnssec-=
dsfromkey.html
--- a/head/contrib/bind9/doc/arm/man.dnssec-dsfromkey.html Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/doc/arm/man.dnssec-dsfromkey.html Tue Apr 17 11:51=
:51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.dnssec-dsfromkey.html,v 1.74.8.9 2011-08-03 02:35:10 tbox Ex=
p $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -51,14 +51,14 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">dnssec-dsfromkey</co=
de> {-s} [<code class=3D"option">-1</code>] [<code class=3D"option">-2</co=
de>] [<code class=3D"option">-a <em class=3D"replaceable"><code>alg</code><=
/em></code>] [<code class=3D"option">-K <em class=3D"replaceable"><code>dir=
ectory</code></em></code>] [<code class=3D"option">-l <em class=3D"replacea=
ble"><code>domain</code></em></code>] [<code class=3D"option">-s</code>] [<=
code class=3D"option">-c <em class=3D"replaceable"><code>class</code></em><=
/code>] [<code class=3D"option">-f <em class=3D"replaceable"><code>file</co=
de></em></code>] [<code class=3D"option">-A</code>] [<code class=3D"option"=
>-v <em class=3D"replaceable"><code>level</code></em></code>] {dnsname}</p>=
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2611562"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2611846"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">dnssec-dsfromkey</strong></span>
outputs the Delegation Signer (DS) resource record (RR), as defined =
in
RFC 3658 and RFC 4509, for the given key(s).
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2611576"></a><h2>OPTIONS</h2>
+<a name=3D"id2611860"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-1</span></dt>
<dd><p>
@@ -119,7 +119,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2611765"></a><h2>EXAMPLE</h2>
+<a name=3D"id2612526"></a><h2>EXAMPLE</h2>
<p>
To build the SHA-256 DS RR from the
<strong class=3D"userinput"><code>Kexample.com.+003+26160</code></st=
rong>
@@ -134,7 +134,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2611801"></a><h2>FILES</h2>
+<a name=3D"id2612563"></a><h2>FILES</h2>
<p>
The keyfile can be designed by the key identification
<code class=3D"filename">Knnnn.+aaa+iiiii</code> or the full file na=
me
@@ -148,13 +148,13 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2612184"></a><h2>CAVEAT</h2>
+<a name=3D"id2612604"></a><h2>CAVEAT</h2>
<p>
A keyfile error can give a "file not found" even if the file exists.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2612194"></a><h2>SEE ALSO</h2>
+<a name=3D"id2612614"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-keyge=
n</span>(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-si=
gnzone</span>(8)</span>,
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
@@ -164,7 +164,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2612233"></a><h2>AUTHOR</h2>
+<a name=3D"id2612858"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.dnssec-=
keyfromlabel.html
--- a/head/contrib/bind9/doc/arm/man.dnssec-keyfromlabel.html Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/arm/man.dnssec-keyfromlabel.html Tue Apr 17 11=
:51:51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.dnssec-keyfromlabel.html,v 1.110.8.10 2011-08-03 02:35:10 tb=
ox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">dnssec-keyfromlabel<=
/code> {-l <em class=3D"replaceable"><code>label</code></em>} [<code class=
=3D"option">-3</code>] [<code class=3D"option">-a <em class=3D"replaceable"=
><code>algorithm</code></em></code>] [<code class=3D"option">-A <em class=
=3D"replaceable"><code>date/offset</code></em></code>] [<code class=3D"opti=
on">-c <em class=3D"replaceable"><code>class</code></em></code>] [<code cla=
ss=3D"option">-D <em class=3D"replaceable"><code>date/offset</code></em></c=
ode>] [<code class=3D"option">-E <em class=3D"replaceable"><code>engine</co=
de></em></code>] [<code class=3D"option">-f <em class=3D"replaceable"><code=
>flag</code></em></code>] [<code class=3D"option">-G</code>] [<code class=
=3D"option">-I <em class=3D"replaceable"><code>date/offset</code></em></cod=
e>] [<code class=3D"option">-k</code>] [<code class=3D"option">-K <em class=
=3D"replaceable"><code>directory</code></em></code>] [<code class=3D"option=
">-n <em class=3D"replaceable"><code>nametype</code></em></code>] [<code cl=
ass=3D"option">-P <em class=3D"replaceable"><code>date/offset</code></em></=
code>] [<code class=3D"option">-p <em class=3D"replaceable"><code>protocol<=
/code></em></code>] [<code class=3D"option">-R <em class=3D"replaceable"><c=
ode>date/offset</code></em></code>] [<code class=3D"option">-t <em class=3D=
"replaceable"><code>type</code></em></code>] [<code class=3D"option">-v <em=
class=3D"replaceable"><code>level</code></em></code>] [<code class=3D"opti=
on">-y</code>] {name}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2613155"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2613302"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">dnssec-keyfromlabel</strong></span>
gets keys with the given label from a crypto hardware and builds
key files for DNSSEC (Secure DNS), as defined in RFC 2535
@@ -63,7 +63,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2613175"></a><h2>OPTIONS</h2>
+<a name=3D"id2613322"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-a <em class=3D"replaceable"><code>algorithm</cod=
e></em></span></dt>
<dd>
@@ -182,7 +182,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2615181"></a><h2>TIMING OPTIONS</h2>
+<a name=3D"id2614168"></a><h2>TIMING OPTIONS</h2>
<p>
Dates can be expressed in the format YYYYMMDD or YYYYMMDDHHMMSS.
If the argument begins with a '+' or '-', it is interpreted as
@@ -229,7 +229,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2666480"></a><h2>GENERATED KEY FILES</h2>
+<a name=3D"id2614266"></a><h2>GENERATED KEY FILES</h2>
<p>
When <span><strong class=3D"command">dnssec-keyfromlabel</strong></s=
pan> completes
successfully,
@@ -268,7 +268,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2666573"></a><h2>SEE ALSO</h2>
+<a name=3D"id2615589"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-keyge=
n</span>(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-si=
gnzone</span>(8)</span>,
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
@@ -276,7 +276,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2666606"></a><h2>AUTHOR</h2>
+<a name=3D"id2615622"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.dnssec-=
keygen.html
--- a/head/contrib/bind9/doc/arm/man.dnssec-keygen.html Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/doc/arm/man.dnssec-keygen.html Tue Apr 17 11:51:51=
2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.dnssec-keygen.html,v 1.179.8.10 2011-08-03 02:35:10 tbox Exp=
$ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">dnssec-keygen</code>=
[<code class=3D"option">-a <em class=3D"replaceable"><code>algorithm</cod=
e></em></code>] [<code class=3D"option">-b <em class=3D"replaceable"><code>=
keysize</code></em></code>] [<code class=3D"option">-n <em class=3D"replace=
able"><code>nametype</code></em></code>] [<code class=3D"option">-3</code>]=
[<code class=3D"option">-A <em class=3D"replaceable"><code>date/offset</co=
de></em></code>] [<code class=3D"option">-C</code>] [<code class=3D"option"=
>-c <em class=3D"replaceable"><code>class</code></em></code>] [<code class=
=3D"option">-D <em class=3D"replaceable"><code>date/offset</code></em></cod=
e>] [<code class=3D"option">-E <em class=3D"replaceable"><code>engine</code=
></em></code>] [<code class=3D"option">-e</code>] [<code class=3D"option">-=
f <em class=3D"replaceable"><code>flag</code></em></code>] [<code class=3D"=
option">-G</code>] [<code class=3D"option">-g <em class=3D"replaceable"><co=
de>generator</code></em></code>] [<code class=3D"option">-h</code>] [<code =
class=3D"option">-I <em class=3D"replaceable"><code>date/offset</code></em>=
</code>] [<code class=3D"option">-i <em class=3D"replaceable"><code>interva=
l</code></em></code>] [<code class=3D"option">-K <em class=3D"replaceable">=
<code>directory</code></em></code>] [<code class=3D"option">-k</code>] [<co=
de class=3D"option">-P <em class=3D"replaceable"><code>date/offset</code></=
em></code>] [<code class=3D"option">-p <em class=3D"replaceable"><code>prot=
ocol</code></em></code>] [<code class=3D"option">-q</code>] [<code class=3D=
"option">-R <em class=3D"replaceable"><code>date/offset</code></em></code>]=
[<code class=3D"option">-r <em class=3D"replaceable"><code>randomdev</code=
></em></code>] [<code class=3D"option">-S <em class=3D"replaceable"><code>k=
ey</code></em></code>] [<code class=3D"option">-s <em class=3D"replaceable"=
><code>strength</code></em></code>] [<code class=3D"option">-t <em class=3D=
"replaceable"><code>type</code></em></code>] [<code class=3D"option">-v <em=
class=3D"replaceable"><code>level</code></em></code>] [<code class=3D"opti=
on">-z</code>] {name}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2614380"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2614596"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">dnssec-keygen</strong></span>
generates keys for DNSSEC (Secure DNS), as defined in RFC 2535
and RFC 4034. It can also generate keys for use with
@@ -64,7 +64,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2614401"></a><h2>OPTIONS</h2>
+<a name=3D"id2614684"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-a <em class=3D"replaceable"><code>algorithm</cod=
e></em></span></dt>
<dd>
@@ -266,7 +266,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2667754"></a><h2>TIMING OPTIONS</h2>
+<a name=3D"id2668243"></a><h2>TIMING OPTIONS</h2>
<p>
Dates can be expressed in the format YYYYMMDD or YYYYMMDDHHMMSS.
If the argument begins with a '+' or '-', it is interpreted as
@@ -337,7 +337,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2667944"></a><h2>GENERATED KEYS</h2>
+<a name=3D"id2668501"></a><h2>GENERATED KEYS</h2>
<p>
When <span><strong class=3D"command">dnssec-keygen</strong></span> c=
ompletes
successfully,
@@ -383,7 +383,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2668052"></a><h2>EXAMPLE</h2>
+<a name=3D"id2668609"></a><h2>EXAMPLE</h2>
<p>
To generate a 768-bit DSA key for the domain
<strong class=3D"userinput"><code>example.com</code></strong>, the f=
ollowing command would be
@@ -404,7 +404,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2668245"></a><h2>SEE ALSO</h2>
+<a name=3D"id2668665"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-signz=
one</span>(8)</span>,
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
<em class=3D"citetitle">RFC 2539</em>,
@@ -413,7 +413,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2668276"></a><h2>AUTHOR</h2>
+<a name=3D"id2668696"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.dnssec-=
revoke.html
--- a/head/contrib/bind9/doc/arm/man.dnssec-revoke.html Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/doc/arm/man.dnssec-revoke.html Tue Apr 17 11:51:51=
2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.dnssec-revoke.html,v 1.62.8.10 2011-08-03 02:35:12 tbox Exp =
$ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -47,10 +47,10 @@
</div>
<div class=3D"refsynopsisdiv">
<h2>Synopsis</h2>
-<div class=3D"cmdsynopsis"><p><code class=3D"command">dnssec-revoke</code>=
[<code class=3D"option">-hr</code>] [<code class=3D"option">-v <em class=
=3D"replaceable"><code>level</code></em></code>] [<code class=3D"option">-K=
<em class=3D"replaceable"><code>directory</code></em></code>] [<code class=
=3D"option">-E <em class=3D"replaceable"><code>engine</code></em></code>] [=
<code class=3D"option">-f</code>] {keyfile}</p></div>
+<div class=3D"cmdsynopsis"><p><code class=3D"command">dnssec-revoke</code>=
[<code class=3D"option">-hr</code>] [<code class=3D"option">-v <em class=
=3D"replaceable"><code>level</code></em></code>] [<code class=3D"option">-K=
<em class=3D"replaceable"><code>directory</code></em></code>] [<code class=
=3D"option">-E <em class=3D"replaceable"><code>engine</code></em></code>] [=
<code class=3D"option">-f</code>] [<code class=3D"option">-R</code>] {keyfi=
le}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2614715"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2615650"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">dnssec-revoke</strong></span>
reads a DNSSEC key file, sets the REVOKED bit on the key as defined
in RFC 5011, and creates a new pair of key files containing the
@@ -58,7 +58,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2614729"></a><h2>OPTIONS</h2>
+<a name=3D"id2615664"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-h</span></dt>
<dd><p>
@@ -88,17 +88,22 @@
write the new key pair even if a file already exists matching
the algorithm and key ID of the revoked key.
</p></dd>
+<dt><span class=3D"term">-R</span></dt>
+<dd><p>
+ Print the key tag of the key with the REVOKE bit set but do
+ not revoke the key.
+ </p></dd>
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2614837"></a><h2>SEE ALSO</h2>
+<a name=3D"id2615784"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-keyge=
n</span>(8)</span>,
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
<em class=3D"citetitle">RFC 5011</em>.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2614861"></a><h2>AUTHOR</h2>
+<a name=3D"id2615809"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.dnssec-=
settime.html
--- a/head/contrib/bind9/doc/arm/man.dnssec-settime.html Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/doc/arm/man.dnssec-settime.html Tue Apr 17 11:51:5=
1 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.dnssec-settime.html,v 1.58.8.11 2011-08-03 02:35:13 tbox Exp=
$ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">dnssec-settime</code=
> [<code class=3D"option">-f</code>] [<code class=3D"option">-K <em class=
=3D"replaceable"><code>directory</code></em></code>] [<code class=3D"option=
">-P <em class=3D"replaceable"><code>date/offset</code></em></code>] [<code=
class=3D"option">-A <em class=3D"replaceable"><code>date/offset</code></em=
></code>] [<code class=3D"option">-R <em class=3D"replaceable"><code>date/o=
ffset</code></em></code>] [<code class=3D"option">-I <em class=3D"replaceab=
le"><code>date/offset</code></em></code>] [<code class=3D"option">-D <em cl=
ass=3D"replaceable"><code>date/offset</code></em></code>] [<code class=3D"o=
ption">-h</code>] [<code class=3D"option">-v <em class=3D"replaceable"><cod=
e>level</code></em></code>] [<code class=3D"option">-E <em class=3D"replace=
able"><code>engine</code></em></code>] {keyfile}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2615479"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2615924"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">dnssec-settime</strong></span>
reads a DNSSEC private key file and sets the key timing metadata
as specified by the <code class=3D"option">-P</code>, <code class=3D=
"option">-A</code>,
@@ -71,11 +71,12 @@
<code class=3D"filename">Knnnn.+aaa+iiiii.private</code>) are regene=
rated.
Metadata fields are stored in the private file. A human-readable
description of the metadata is also placed in comments in the key
- file.
+ file. The private file's permissions are always set to be
+ inaccessible to anyone other than the owner (mode 0600).
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2615538"></a><h2>OPTIONS</h2>
+<a name=3D"id2616051"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-f</span></dt>
<dd><p>
@@ -108,7 +109,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2615632"></a><h2>TIMING OPTIONS</h2>
+<a name=3D"id2616145"></a><h2>TIMING OPTIONS</h2>
<p>
Dates can be expressed in the format YYYYMMDD or YYYYMMDDHHMMSS.
If the argument begins with a '+' or '-', it is interpreted as
@@ -187,7 +188,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2616453"></a><h2>PRINTING OPTIONS</h2>
+<a name=3D"id2616488"></a><h2>PRINTING OPTIONS</h2>
<p>
<span><strong class=3D"command">dnssec-settime</strong></span> can a=
lso be used to print the
timing metadata associated with a key.
@@ -213,7 +214,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2616533"></a><h2>SEE ALSO</h2>
+<a name=3D"id2616636"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-keyge=
n</span>(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-si=
gnzone</span>(8)</span>,
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
@@ -221,7 +222,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2616566"></a><h2>AUTHOR</h2>
+<a name=3D"id2617693"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.dnssec-=
signzone.html
--- a/head/contrib/bind9/doc/arm/man.dnssec-signzone.html Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/doc/arm/man.dnssec-signzone.html Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.dnssec-signzone.html,v 1.179.8.11 2011-08-03 02:35:13 tbox E=
xp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">dnssec-signzone</cod=
e> [<code class=3D"option">-a</code>] [<code class=3D"option">-c <em class=
=3D"replaceable"><code>class</code></em></code>] [<code class=3D"option">-d=
<em class=3D"replaceable"><code>directory</code></em></code>] [<code class=
=3D"option">-E <em class=3D"replaceable"><code>engine</code></em></code>] [=
<code class=3D"option">-e <em class=3D"replaceable"><code>end-time</code></=
em></code>] [<code class=3D"option">-f <em class=3D"replaceable"><code>outp=
ut-file</code></em></code>] [<code class=3D"option">-g</code>] [<code class=
=3D"option">-h</code>] [<code class=3D"option">-K <em class=3D"replaceable"=
><code>directory</code></em></code>] [<code class=3D"option">-k <em class=
=3D"replaceable"><code>key</code></em></code>] [<code class=3D"option">-l <=
em class=3D"replaceable"><code>domain</code></em></code>] [<code class=3D"o=
ption">-i <em class=3D"replaceable"><code>interval</code></em></code>] [<co=
de class=3D"option">-I <em class=3D"replaceable"><code>input-format</code><=
/em></code>] [<code class=3D"option">-j <em class=3D"replaceable"><code>jit=
ter</code></em></code>] [<code class=3D"option">-N <em class=3D"replaceable=
"><code>soa-serial-format</code></em></code>] [<code class=3D"option">-o <e=
m class=3D"replaceable"><code>origin</code></em></code>] [<code class=3D"op=
tion">-O <em class=3D"replaceable"><code>output-format</code></em></code>] =
[<code class=3D"option">-p</code>] [<code class=3D"option">-P</code>] [<cod=
e class=3D"option">-r <em class=3D"replaceable"><code>randomdev</code></em>=
</code>] [<code class=3D"option">-S</code>] [<code class=3D"option">-s <em =
class=3D"replaceable"><code>start-time</code></em></code>] [<code class=3D"=
option">-T <em class=3D"replaceable"><code>ttl</code></em></code>] [<code c=
lass=3D"option">-t</code>] [<code class=3D"option">-u</code>] [<code class=
=3D"option">-v <em class=3D"replaceable"><code>level</code></em></code>] [<=
code class=3D"option">-x</code>] [<code class=3D"option">-z</code>] [<code =
class=3D"option">-3 <em class=3D"replaceable"><code>salt</code></em></code>=
] [<code class=3D"option">-H <em class=3D"replaceable"><code>iterations</co=
de></em></code>] [<code class=3D"option">-A</code>] {zonefile} [key...]</p>=
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2617358"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2617803"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">dnssec-signzone</strong></span>
signs a zone. It generates
NSEC and RRSIG records and produces a signed version of the
@@ -61,7 +61,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2617378"></a><h2>OPTIONS</h2>
+<a name=3D"id2617822"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-a</span></dt>
<dd><p>
@@ -397,7 +397,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2672040"></a><h2>EXAMPLE</h2>
+<a name=3D"id2672553"></a><h2>EXAMPLE</h2>
<p>
The following command signs the <strong class=3D"userinput"><code>ex=
ample.com</code></strong>
zone with the DSA key generated by <span><strong class=3D"command">d=
nssec-keygen</strong></span>
@@ -427,14 +427,14 @@
%</pre>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2672119"></a><h2>SEE ALSO</h2>
+<a name=3D"id2672632"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">dnssec-keyge=
n</span>(8)</span>,
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
<em class=3D"citetitle">RFC 4033</em>.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2672144"></a><h2>AUTHOR</h2>
+<a name=3D"id2672657"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.genrand=
om.html
--- a/head/contrib/bind9/doc/arm/man.genrandom.html Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/doc/arm/man.genrandom.html Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.genrandom.html,v 1.34.8.12 2011-08-09 01:52:59 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">genrandom</code> [<=
code class=3D"option">-n <em class=3D"replaceable"><code>number</code></em>=
</code>] {<em class=3D"replaceable"><code>size</code></em>} {<em class=3D"r=
eplaceable"><code>filename</code></em>}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2615898"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2652195"></a><h2>DESCRIPTION</h2>
<p>
<span><strong class=3D"command">genrandom</strong></span>
generates a file or a set of files containing a specified quantity
@@ -59,7 +59,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2648272"></a><h2>ARGUMENTS</h2>
+<a name=3D"id2652210"></a><h2>ARGUMENTS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-n <em class=3D"replaceable"><code>number</code><=
/em></span></dt>
<dd><p>
@@ -77,14 +77,14 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2648332"></a><h2>SEE ALSO</h2>
+<a name=3D"id2652270"></a><h2>SEE ALSO</h2>
<p>
<span class=3D"citerefentry"><span class=3D"refentrytitle">rand</spa=
n>(3)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">arc4rando=
m</span>(3)</span>
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2648427"></a><h2>AUTHOR</h2>
+<a name=3D"id2652980"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.host.ht=
ml
--- a/head/contrib/bind9/doc/arm/man.host.html Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/doc/arm/man.host.html Tue Apr 17 11:51:51 2012 +03=
00
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.host.html,v 1.160.8.9 2011-08-03 02:35:10 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">host</code> [<code =
class=3D"option">-aCdlnrsTwv</code>] [<code class=3D"option">-c <em class=
=3D"replaceable"><code>class</code></em></code>] [<code class=3D"option">-N=
<em class=3D"replaceable"><code>ndots</code></em></code>] [<code class=3D"=
option">-R <em class=3D"replaceable"><code>number</code></em></code>] [<cod=
e class=3D"option">-t <em class=3D"replaceable"><code>type</code></em></cod=
e>] [<code class=3D"option">-W <em class=3D"replaceable"><code>wait</code><=
/em></code>] [<code class=3D"option">-m <em class=3D"replaceable"><code>fla=
g</code></em></code>] [<code class=3D"option">-4</code>] [<code class=3D"op=
tion">-6</code>] {name} [server]</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2610601"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2611091"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">host</strong></span>
is a simple utility for performing DNS lookups.
It is normally used to convert names to IP addresses and vice versa.
@@ -202,7 +202,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2611184"></a><h2>IDN SUPPORT</h2>
+<a name=3D"id2611537"></a><h2>IDN SUPPORT</h2>
<p>
If <span><strong class=3D"command">host</strong></span> has been bui=
lt with IDN (internationalized
domain name) support, it can accept and display non-ASCII domain nam=
es.=20
@@ -216,12 +216,12 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2611212"></a><h2>FILES</h2>
+<a name=3D"id2611565"></a><h2>FILES</h2>
<p><code class=3D"filename">/etc/resolv.conf</code>
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2611226"></a><h2>SEE ALSO</h2>
+<a name=3D"id2611579"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">dig</span>(1=
)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named</sp=
an>(8)</span>.
</p>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.isc-hma=
c-fixup.html
--- a/head/contrib/bind9/doc/arm/man.isc-hmac-fixup.html Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/doc/arm/man.isc-hmac-fixup.html Tue Apr 17 11:51:5=
1 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.isc-hmac-fixup.html,v 1.31.8.12 2011-08-09 01:52:59 tbox Exp=
$ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">isc-hmac-fixup</code=
> {<em class=3D"replaceable"><code>algorithm</code></em>} {<em class=3D"re=
placeable"><code>secret</code></em>}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2648612"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2615000"></a><h2>DESCRIPTION</h2>
<p>
Versions of BIND 9 up to and including BIND 9.6 had a bug causing
HMAC-SHA* TSIG keys which were longer than the digest length of the
@@ -76,7 +76,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2648640"></a><h2>SECURITY CONSIDERATIONS</h2>
+<a name=3D"id2653052"></a><h2>SECURITY CONSIDERATIONS</h2>
<p>
Secrets that have been converted by <span><strong class=3D"command">=
isc-hmac-fixup</strong></span>
are shortened, but as this is how the HMAC protocol works in
@@ -87,14 +87,14 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2648656"></a><h2>SEE ALSO</h2>
+<a name=3D"id2653068"></a><h2>SEE ALSO</h2>
<p>
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
<em class=3D"citetitle">RFC 2104</em>.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2648673"></a><h2>AUTHOR</h2>
+<a name=3D"id2653085"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.named-c=
heckconf.html
--- a/head/contrib/bind9/doc/arm/man.named-checkconf.html Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/doc/arm/man.named-checkconf.html Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.named-checkconf.html,v 1.174.8.11 2011-08-03 02:35:11 tbox E=
xp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">named-checkconf</cod=
e> [<code class=3D"option">-h</code>] [<code class=3D"option">-v</code>] [=
<code class=3D"option">-j</code>] [<code class=3D"option">-t <em class=3D"r=
eplaceable"><code>directory</code></em></code>] {filename} [<code class=3D"=
option">-p</code>] [<code class=3D"option">-z</code>]</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2618224"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2617986"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">named-checkconf</strong></span>
checks the syntax, but not the semantics, of a
<span><strong class=3D"command">named</strong></span> configuration =
file. The file is parsed
@@ -70,7 +70,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2618294"></a><h2>OPTIONS</h2>
+<a name=3D"id2618056"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-h</span></dt>
<dd><p>
@@ -109,21 +109,21 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2618428"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2618190"></a><h2>RETURN VALUES</h2>
<p><span><strong class=3D"command">named-checkconf</strong></span>
returns an exit status of 1 if
errors were detected and 0 otherwise.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2618579"></a><h2>SEE ALSO</h2>
+<a name=3D"id2618204"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">named</span>=
(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named-che=
ckzone</span>(8)</span>,
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2618609"></a><h2>AUTHOR</h2>
+<a name=3D"id2618234"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.named-c=
heckzone.html
--- a/head/contrib/bind9/doc/arm/man.named-checkzone.html Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/doc/arm/man.named-checkzone.html Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.named-checkzone.html,v 1.183.8.11 2011-08-03 02:35:12 tbox E=
xp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -51,7 +51,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">named-compilezone</c=
ode> [<code class=3D"option">-d</code>] [<code class=3D"option">-j</code>]=
[<code class=3D"option">-q</code>] [<code class=3D"option">-v</code>] [<co=
de class=3D"option">-c <em class=3D"replaceable"><code>class</code></em></c=
ode>] [<code class=3D"option">-C <em class=3D"replaceable"><code>mode</code=
></em></code>] [<code class=3D"option">-f <em class=3D"replaceable"><code>f=
ormat</code></em></code>] [<code class=3D"option">-F <em class=3D"replaceab=
le"><code>format</code></em></code>] [<code class=3D"option">-i <em class=
=3D"replaceable"><code>mode</code></em></code>] [<code class=3D"option">-k =
<em class=3D"replaceable"><code>mode</code></em></code>] [<code class=3D"op=
tion">-m <em class=3D"replaceable"><code>mode</code></em></code>] [<code cl=
ass=3D"option">-n <em class=3D"replaceable"><code>mode</code></em></code>] =
[<code class=3D"option">-r <em class=3D"replaceable"><code>mode</code></em>=
</code>] [<code class=3D"option">-s <em class=3D"replaceable"><code>style</=
code></em></code>] [<code class=3D"option">-t <em class=3D"replaceable"><co=
de>directory</code></em></code>] [<code class=3D"option">-w <em class=3D"re=
placeable"><code>directory</code></em></code>] [<code class=3D"option">-D</=
code>] [<code class=3D"option">-W <em class=3D"replaceable"><code>mode</cod=
e></em></code>] {<code class=3D"option">-o <em class=3D"replaceable"><code>=
filename</code></em></code>} {zonename} {filename}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2632057"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2633185"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">named-checkzone</strong></span>
checks the syntax and integrity of a zone file. It performs the
same checks as <span><strong class=3D"command">named</strong></span>=
does when loading a
@@ -71,7 +71,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2632107"></a><h2>OPTIONS</h2>
+<a name=3D"id2633235"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-d</span></dt>
<dd><p>
@@ -265,14 +265,14 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2673019"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2673464"></a><h2>RETURN VALUES</h2>
<p><span><strong class=3D"command">named-checkzone</strong></span>
returns an exit status of 1 if
errors were detected and 0 otherwise.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2673033"></a><h2>SEE ALSO</h2>
+<a name=3D"id2673478"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">named</span>=
(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named-che=
ckconf</span>(8)</span>,
<em class=3D"citetitle">RFC 1035</em>,
@@ -280,7 +280,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2673066"></a><h2>AUTHOR</h2>
+<a name=3D"id2673511"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.named-j=
ournalprint.html
--- a/head/contrib/bind9/doc/arm/man.named-journalprint.html Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/doc/arm/man.named-journalprint.html Tue Apr 17 11:=
51:51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.named-journalprint.html,v 1.33.8.11 2011-08-03 02:35:12 tbox=
Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">named-journalprint</=
code> {<em class=3D"replaceable"><code>journal</code></em>}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2613550"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2612358"></a><h2>DESCRIPTION</h2>
<p>
<span><strong class=3D"command">named-journalprint</strong></span>
prints the contents of a zone journal file in a human-readable
@@ -76,7 +76,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2635032"></a><h2>SEE ALSO</h2>
+<a name=3D"id2638618"></a><h2>SEE ALSO</h2>
<p>
<span class=3D"citerefentry"><span class=3D"refentrytitle">named</sp=
an>(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">nsupdate<=
/span>(8)</span>,
@@ -84,7 +84,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2635063"></a><h2>AUTHOR</h2>
+<a name=3D"id2638649"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.named.h=
tml
--- a/head/contrib/bind9/doc/arm/man.named.html Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/doc/arm/man.named.html Tue Apr 17 11:51:51 2012 +0=
300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.named.html,v 1.185.8.11 2011-08-03 02:35:13 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">named</code> [<code=
class=3D"option">-4</code>] [<code class=3D"option">-6</code>] [<code clas=
s=3D"option">-c <em class=3D"replaceable"><code>config-file</code></em></co=
de>] [<code class=3D"option">-d <em class=3D"replaceable"><code>debug-level=
</code></em></code>] [<code class=3D"option">-E <em class=3D"replaceable"><=
code>engine-name</code></em></code>] [<code class=3D"option">-f</code>] [<c=
ode class=3D"option">-g</code>] [<code class=3D"option">-m <em class=3D"rep=
laceable"><code>flag</code></em></code>] [<code class=3D"option">-n <em cla=
ss=3D"replaceable"><code>#cpus</code></em></code>] [<code class=3D"option">=
-p <em class=3D"replaceable"><code>port</code></em></code>] [<code class=3D=
"option">-s</code>] [<code class=3D"option">-S <em class=3D"replaceable"><c=
ode>#max-socks</code></em></code>] [<code class=3D"option">-t <em class=3D"=
replaceable"><code>directory</code></em></code>] [<code class=3D"option">-u=
<em class=3D"replaceable"><code>user</code></em></code>] [<code class=3D"o=
ption">-v</code>] [<code class=3D"option">-V</code>] [<code class=3D"option=
">-x <em class=3D"replaceable"><code>cache-file</code></em></code>]</p></di=
v>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2632834"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2635533"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">named</strong></span>
is a Domain Name System (DNS) server,
part of the BIND 9 distribution from ISC. For more
@@ -65,7 +65,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2632933"></a><h2>OPTIONS</h2>
+<a name=3D"id2635564"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-4</span></dt>
<dd><p>
@@ -246,7 +246,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2639904"></a><h2>SIGNALS</h2>
+<a name=3D"id2660284"></a><h2>SIGNALS</h2>
<p>
In routine operation, signals should not be used to control
the nameserver; <span><strong class=3D"command">rndc</strong></span>=
should be used
@@ -267,7 +267,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2674906"></a><h2>CONFIGURATION</h2>
+<a name=3D"id2660334"></a><h2>CONFIGURATION</h2>
<p>
The <span><strong class=3D"command">named</strong></span> configurat=
ion file is too complex
to describe in detail here. A complete description is provided
@@ -284,7 +284,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2674955"></a><h2>FILES</h2>
+<a name=3D"id2660384"></a><h2>FILES</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term"><code class=3D"filename">/etc/named.conf</code></=
span></dt>
<dd><p>
@@ -297,7 +297,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2675067"></a><h2>SEE ALSO</h2>
+<a name=3D"id2660427"></a><h2>SEE ALSO</h2>
<p><em class=3D"citetitle">RFC 1033</em>,
<em class=3D"citetitle">RFC 1034</em>,
<em class=3D"citetitle">RFC 1035</em>,
@@ -310,7 +310,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2675138"></a><h2>AUTHOR</h2>
+<a name=3D"id2675585"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.nsec3ha=
sh.html
--- a/head/contrib/bind9/doc/arm/man.nsec3hash.html Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/doc/arm/man.nsec3hash.html Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.nsec3hash.html,v 1.34.8.12 2011-08-09 01:52:59 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -48,7 +48,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">nsec3hash</code> {<=
em class=3D"replaceable"><code>salt</code></em>} {<em class=3D"replaceable"=
><code>algorithm</code></em>} {<em class=3D"replaceable"><code>iterations</=
code></em>} {<em class=3D"replaceable"><code>domain</code></em>}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2616633"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2653133"></a><h2>DESCRIPTION</h2>
<p>
<span><strong class=3D"command">nsec3hash</strong></span> generates =
an NSEC3 hash based on
a set of NSEC3 parameters. This can be used to check the validity
@@ -56,7 +56,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2616648"></a><h2>ARGUMENTS</h2>
+<a name=3D"id2653148"></a><h2>ARGUMENTS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">salt</span></dt>
<dd><p>
@@ -80,14 +80,14 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2648795"></a><h2>SEE ALSO</h2>
+<a name=3D"id2653210"></a><h2>SEE ALSO</h2>
<p>
<em class=3D"citetitle">BIND 9 Administrator Reference Manual</em>,
<em class=3D"citetitle">RFC 5155</em>.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2648812"></a><h2>AUTHOR</h2>
+<a name=3D"id2653227"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.nsupdat=
e.html
--- a/head/contrib/bind9/doc/arm/man.nsupdate.html Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/doc/arm/man.nsupdate.html Tue Apr 17 11:51:51 2012=
+0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.nsupdate.html,v 1.110.8.11 2011-08-03 02:35:12 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">nsupdate</code> [<c=
ode class=3D"option">-d</code>] [<code class=3D"option">-D</code>] [[<code =
class=3D"option">-g</code>] | [<code class=3D"option">-o</code>] | [<code=
class=3D"option">-l</code>] | [<code class=3D"option">-y <em class=3D"rep=
laceable"><code>[<span class=3D"optional">hmac:</span>]keyname:secret</code=
></em></code>] | [<code class=3D"option">-k <em class=3D"replaceable"><cod=
e>keyfile</code></em></code>]] [<code class=3D"option">-t <em class=3D"repl=
aceable"><code>timeout</code></em></code>] [<code class=3D"option">-u <em c=
lass=3D"replaceable"><code>udptimeout</code></em></code>] [<code class=3D"o=
ption">-r <em class=3D"replaceable"><code>udpretries</code></em></code>] [<=
code class=3D"option">-R <em class=3D"replaceable"><code>randomdev</code></=
em></code>] [<code class=3D"option">-v</code>] [filename]</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2635224"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2639154"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">nsupdate</strong></span>
is used to submit Dynamic DNS Update requests as defined in RFC 2136
to a name server.
@@ -210,7 +210,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2638766"></a><h2>INPUT FORMAT</h2>
+<a name=3D"id2639897"></a><h2>INPUT FORMAT</h2>
<p><span><strong class=3D"command">nsupdate</strong></span>
reads input from
<em class=3D"parameter"><code>filename</code></em>
@@ -498,7 +498,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2678249"></a><h2>EXAMPLES</h2>
+<a name=3D"id2678629"></a><h2>EXAMPLES</h2>
<p>
The examples below show how
<span><strong class=3D"command">nsupdate</strong></span>
@@ -552,7 +552,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2678299"></a><h2>FILES</h2>
+<a name=3D"id2678679"></a><h2>FILES</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term"><code class=3D"constant">/etc/resolv.conf</code><=
/span></dt>
<dd><p>
@@ -575,7 +575,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2678382"></a><h2>SEE ALSO</h2>
+<a name=3D"id2678762"></a><h2>SEE ALSO</h2>
<p>
<em class=3D"citetitle">RFC 2136</em>,
<em class=3D"citetitle">RFC 3007</em>,
@@ -590,7 +590,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2678440"></a><h2>BUGS</h2>
+<a name=3D"id2678820"></a><h2>BUGS</h2>
<p>
The TSIG key is redundantly stored in two separate files.
This is a consequence of nsupdate using the DST library
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.rndc-co=
nfgen.html
--- a/head/contrib/bind9/doc/arm/man.rndc-confgen.html Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/doc/arm/man.rndc-confgen.html Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.rndc-confgen.html,v 1.189.8.11 2011-08-03 02:35:09 tbox Exp =
$ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">rndc-confgen</code> =
[<code class=3D"option">-a</code>] [<code class=3D"option">-b <em class=3D=
"replaceable"><code>keysize</code></em></code>] [<code class=3D"option">-c =
<em class=3D"replaceable"><code>keyfile</code></em></code>] [<code class=3D=
"option">-h</code>] [<code class=3D"option">-k <em class=3D"replaceable"><c=
ode>keyname</code></em></code>] [<code class=3D"option">-p <em class=3D"rep=
laceable"><code>port</code></em></code>] [<code class=3D"option">-r <em cla=
ss=3D"replaceable"><code>randomfile</code></em></code>] [<code class=3D"opt=
ion">-s <em class=3D"replaceable"><code>address</code></em></code>] [<code =
class=3D"option">-t <em class=3D"replaceable"><code>chrootdir</code></em></=
code>] [<code class=3D"option">-u <em class=3D"replaceable"><code>user</cod=
e></em></code>]</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2642305"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2642617"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">rndc-confgen</strong></span>
generates configuration files
for <span><strong class=3D"command">rndc</strong></span>. It can be=
used as a
@@ -66,7 +66,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2642439"></a><h2>OPTIONS</h2>
+<a name=3D"id2642683"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-a</span></dt>
<dd>
@@ -173,7 +173,7 @@
</dl></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2643098"></a><h2>EXAMPLES</h2>
+<a name=3D"id2650101"></a><h2>EXAMPLES</h2>
<p>
To allow <span><strong class=3D"command">rndc</strong></span> to be =
used with
no manual configuration, run
@@ -190,7 +190,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2648548"></a><h2>SEE ALSO</h2>
+<a name=3D"id2652410"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">rndc</span>(=
8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">rndc.conf=
</span>(5)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named</sp=
an>(8)</span>,
@@ -198,7 +198,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2648586"></a><h2>AUTHOR</h2>
+<a name=3D"id2652449"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.rndc.co=
nf.html
--- a/head/contrib/bind9/doc/arm/man.rndc.conf.html Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/doc/arm/man.rndc.conf.html Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.rndc.conf.html,v 1.190.8.11 2011-08-03 02:35:12 tbox Exp $ -=
->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">rndc.conf</code> </p=
></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2614578"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2641106"></a><h2>DESCRIPTION</h2>
<p><code class=3D"filename">rndc.conf</code> is the configuration file
for <span><strong class=3D"command">rndc</strong></span>, the BIND 9=
name server control
utility. This file has a similar structure and syntax to
@@ -135,7 +135,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2640759"></a><h2>EXAMPLE</h2>
+<a name=3D"id2641346"></a><h2>EXAMPLE</h2>
<pre class=3D"programlisting">
options {
default-server localhost;
@@ -209,7 +209,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2641358"></a><h2>NAME SERVER CONFIGURATION</h2>
+<a name=3D"id2641672"></a><h2>NAME SERVER CONFIGURATION</h2>
<p>
The name server must be configured to accept rndc connections and
to recognize the key specified in the <code class=3D"filename">rndc.=
conf</code>
@@ -219,7 +219,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2641384"></a><h2>SEE ALSO</h2>
+<a name=3D"id2641698"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">rndc</span>(=
8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">rndc-conf=
gen</span>(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">mmencode<=
/span>(1)</span>,
@@ -227,7 +227,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2641422"></a><h2>AUTHOR</h2>
+<a name=3D"id2642419"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/man.rndc.ht=
ml
--- a/head/contrib/bind9/doc/arm/man.rndc.html Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/doc/arm/man.rndc.html Tue Apr 17 11:51:51 2012 +03=
00
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
- Copyright (C) 2000-2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: man.rndc.html,v 1.188.8.11 2011-08-03 02:35:12 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
<div class=3D"cmdsynopsis"><p><code class=3D"command">rndc</code> [<code =
class=3D"option">-b <em class=3D"replaceable"><code>source-address</code></=
em></code>] [<code class=3D"option">-c <em class=3D"replaceable"><code>conf=
ig-file</code></em></code>] [<code class=3D"option">-k <em class=3D"replace=
able"><code>key-file</code></em></code>] [<code class=3D"option">-s <em cla=
ss=3D"replaceable"><code>server</code></em></code>] [<code class=3D"option"=
>-p <em class=3D"replaceable"><code>port</code></em></code>] [<code class=
=3D"option">-V</code>] [<code class=3D"option">-y <em class=3D"replaceable"=
><code>key_id</code></em></code>] {command}</p></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2640011"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2640665"></a><h2>DESCRIPTION</h2>
<p><span><strong class=3D"command">rndc</strong></span>
controls the operation of a name
server. It supersedes the <span><strong class=3D"command">ndc</stro=
ng></span> utility
@@ -79,7 +79,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2640061"></a><h2>OPTIONS</h2>
+<a name=3D"id2640715"></a><h2>OPTIONS</h2>
<div class=3D"variablelist"><dl>
<dt><span class=3D"term">-b <em class=3D"replaceable"><code>source-address=
</code></em></span></dt>
<dd><p>
@@ -151,7 +151,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2640355"></a><h2>LIMITATIONS</h2>
+<a name=3D"id2640940"></a><h2>LIMITATIONS</h2>
<p><span><strong class=3D"command">rndc</strong></span>
does not yet support all the commands of
the BIND 8 <span><strong class=3D"command">ndc</strong></span> utili=
ty.
@@ -165,7 +165,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2640386"></a><h2>SEE ALSO</h2>
+<a name=3D"id2640971"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">rndc.conf</s=
pan>(5)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">rndc-conf=
gen</span>(8)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">named</sp=
an>(8)</span>,
@@ -175,7 +175,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2640578"></a><h2>AUTHOR</h2>
+<a name=3D"id2641027"></a><h2>AUTHOR</h2>
<p><span class=3D"corpauthor">Internet Systems Consortium</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/managed-key=
s.xml
--- a/head/contrib/bind9/doc/arm/managed-keys.xml Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/doc/arm/managed-keys.xml Tue Apr 17 11:51:51 2012 =
+0300
@@ -15,7 +15,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: managed-keys.xml,v 1.3 2010-02-03 23:49:07 tbox Exp $ -->
+<!-- $Id: managed-keys.xml,v 1.3 2010/02/03 23:49:07 tbox Exp $ -->
=20
<sect1 id=3D"rfc5011.support">
<title>Dynamic Trust Anchor Management</title>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/arm/pkcs11.xml
--- a/head/contrib/bind9/doc/arm/pkcs11.xml Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/arm/pkcs11.xml Tue Apr 17 11:51:51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2010 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2010, 2012 Internet Systems Consortium, Inc. ("ISC")
-
- Permission to use, copy, modify, and/or distribute this software for any
- purpose with or without fee is hereby granted, provided that the above
@@ -17,7 +17,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: pkcs11.xml,v 1.3 2010-02-06 07:42:02 marka Exp $ -->
+<!-- $Id$ -->
=20
<sect1 id=3D"pkcs11">
<title>PKCS #11 (Cryptoki) support</title>
@@ -68,12 +68,15 @@
is an example of such a device.</para>
</listitem>
</itemizedlist>
- <para>The modified OpenSSL code is included in the BIND 9.7.0
- release, in the form of a context diff against the latest OpenSSL.
+ <para>The modified OpenSSL code is included in the BIND 9 release,
+ in the form of a context diff against the latest verions of
+ OpenSSL. OpenSSL 0.9.8 and 1.0.0 are both supported; there are
+ separate diffs for each version. In the examples to follow,
+ we use OpenSSL 0.9.8, but the same methods work with OpenSSL 1.0.0.
</para>
<note>
- The latest OpenSSL version at the time of the BIND release
- is 0.9.8l.
+ The latest OpenSSL versions at the time of the BIND release
+ are 0.9.8s and 1.0.0f.
ISC will provide an updated patch as new versions of OpenSSL
are released. The version number in the following examples
is expected to change.</note>
@@ -82,18 +85,18 @@
necessary to build OpenSSL with this patch in place and inform
it of the path to the HSM-specific PKCS #11 provider
library.</para>
- <para>Obtain OpenSSL 0.9.8l:</para>
+ <para>Obtain OpenSSL 0.9.8s:</para>
<screen>
-$ <userinput>wget <ulink>http://www.openssl.org/source/openssl-0.9.8l.tar.=
gz</ulink></userinput>
+$ <userinput>wget <ulink>http://www.openssl.org/source/openssl-0.9.8s.tar.=
gz</ulink></userinput>
</screen>
<para>Extract the tarball:</para>
<screen>
-$ <userinput>tar zxf openssl-0.9.8l.tar.gz</userinput>
+$ <userinput>tar zxf openssl-0.9.8s.tar.gz</userinput>
</screen>
<para>Apply the patch from the BIND 9 release:</para>
<screen>
-$ <userinput>patch -p1 -d openssl-0.9.8l \
- < bind-9.7.0/bin/pkcs11/openssl-0.9.8l-patch</userinput>
+$ <userinput>patch -p1 -d openssl-0.9.8s \
+ < bind9/bin/pkcs11/openssl-0.9.8s-patch</userinput>
</screen>
<note>(Note that the patch file may not be compatible with the
"patch" utility on all operating systems. You may need to
@@ -124,7 +127,7 @@
<para>Finally, the Keyper library requires threads, so we
must specify -pthread.</para>
<screen>
-$ <userinput>cd openssl-0.9.8l</userinput>
+$ <userinput>cd openssl-0.9.8s</userinput>
$ <userinput>./Configure linux-generic32 -m32 -pthread \
--pk11-libname=3D/opt/pkcs11/usr/lib/libpkcs11.so \
--pk11-flavor=3Dsign-only \
@@ -145,7 +148,7 @@
<para>In this example, we are building on Solaris x86 on an
AMD64 system.</para>
<screen>
-$ <userinput>cd openssl-0.9.8l</userinput>
+$ <userinput>cd openssl-0.9.8s</userinput>
$ <userinput>./Configure solaris64-x86_64-cc \
--pk11-libname=3D/usr/lib/64/libpkcs11.so \
--pk11-flavor=3Dcrypto-accelerator \
@@ -156,36 +159,74 @@
<para>After configuring, run=20
<command>make</command> and=20
<command>make test</command>.</para>
- <para>Once you have built OpenSSL, run
- "<command>apps/openssl engine pkcs11</command>" to confirm
- that PKCS #11 support was compiled in correctly. The output
- should be one of the following lines, depending on the flavor
- selected:</para>
+ </sect3>
+ <sect3>
+ <!-- Example 3 -->
+ <title>Building OpenSSL for SoftHSM</title>
+ <para>SoftHSM is a software library provided by the OpenDNSSEC
+ project (http://www.opendnssec.org) which provides a PKCS#11
+ interface to a virtual HSM, implemented in the form of encrypted
+ data on the local filesystem. It uses the Botan library for
+ encryption and SQLite3 for data storage. Though less secure
+ than a true HSM, it can provide more secure key storage than
+ traditional key files, and can allow you to experiment with
+ PKCS#11 when an HSM is not available.</para>
+ <para>The SoftHSM cryptographic store must be installed and
+ initialized before using it with OpenSSL, and the SOFTHSM_CONF
+ environment variable must always point to the SoftHSM configuration
+ file:</para>
<screen>
+$ <userinput> cd softhsm-1.3.0 </userinput>
+$ <userinput> configure --prefix=3D/opt/pkcs11/usr </userinput>
+$ <userinput> make </userinput>
+$ <userinput> make install </userinput>
+$ <userinput> export SOFTHSM_CONF=3D/opt/pkcs11/softhsm.conf </userinput>
+$ <userinput> echo "0:/opt/pkcs11/softhsm.db" > $SOFTHSM_CONF </userinput>
+$ <userinput> /opt/pkcs11/usr/bin/softhsm --init-token 0 --slot 0 --label =
softhsm </userinput>
+</screen>
+ <para>SoftHSM can perform all cryptographic operations, but
+ since it only uses your system CPU, there is no need to use it
+ for anything but signing. Therefore, we choose the 'sign-only'
+ flavor when building OpenSSL.</para>
+ <screen>
+$ <userinput>cd openssl-0.9.8s</userinput>
+$ <userinput>./Configure linux-x86_64 -pthread \
+ --pk11-libname=3D/opt/pkcs11/usr/lib/libpkcs11.so \
+ --pk11-flavor=3Dsign-only \
+ --prefix=3D/opt/pkcs11/usr</userinput>
+</screen>
+ <para>After configuring, run "<command>make</command>"
+ and "<command>make test</command>".</para>
+ </sect3>
+ <para>Once you have built OpenSSL, run
+ "<command>apps/openssl engine pkcs11</command>" to confirm
+ that PKCS #11 support was compiled in correctly. The output
+ should be one of the following lines, depending on the flavor
+ selected:</para>
+ <screen>
(pkcs11) PKCS #11 engine support (sign only)
</screen>
- <para>Or:</para>
- <screen>
+ <para>Or:</para>
+ <screen>
(pkcs11) PKCS #11 engine support (crypto accelerator)
</screen>
- <para>Next, run
- "<command>apps/openssl engine pkcs11 -t</command>". This will
- attempt to initialize the PKCS #11 engine. If it is able to
- do so successfully, it will report
- <quote><literal>[ available ]</literal></quote>.</para>
- <para>If the output is correct, run
- "<command>make install</command>" which will install the
- modified OpenSSL suite to=20
- <filename>/opt/pkcs11/usr</filename>.</para>
- </sect3>
+ <para>Next, run
+ "<command>apps/openssl engine pkcs11 -t</command>". This will
+ attempt to initialize the PKCS #11 engine. If it is able to
+ do so successfully, it will report
+ <quote><literal>[ available ]</literal></quote>.</para>
+ <para>If the output is correct, run
+ "<command>make install</command>" which will install the
+ modified OpenSSL suite to=20
+ <filename>/opt/pkcs11/usr</filename>.</para>
</sect2>
<sect2>
<title>Building BIND 9 with PKCS#11</title>
<para>When building BIND 9, the location of the custom-built
OpenSSL library must be specified via configure.</para>
<sect3>
- <!-- Example 3 -->
- <title>Configuring BIND 9 for Linux</title>
+ <!-- Example 4 -->
+ <title>Configuring BIND 9 for Linux with the AEP Keyper</title>
<para>To link with the PKCS #11 provider, threads must be
enabled in the BIND 9 build.</para>
<para>The PKCS #11 library for the AEP Keyper is currently
@@ -193,19 +234,19 @@
64-bit host, we must force a 32-bit build by adding "-m32" to
the CC options on the "configure" command line.</para>
<screen>
-$ <userinput>cd ../bind-9.7.0</userinput>
+$ <userinput>cd ../bind9</userinput>
$ <userinput>./configure CC=3D"gcc -m32" --enable-threads \
--with-openssl=3D/opt/pkcs11/usr \
--with-pkcs11=3D/opt/pkcs11/usr/lib/libpkcs11.so</userinput>
</screen>
</sect3>
<sect3>
- <!-- Example 4 -->
- <title>Configuring BIND 9 for Solaris</title>
+ <!-- Example 5 -->
+ <title>Configuring BIND 9 for Solaris with the SCA 6000</title>
<para>To link with the PKCS #11 provider, threads must be
enabled in the BIND 9 build.</para>
<screen>
-$ <userinput>cd ../bind-9.7.0</userinput>
+$ <userinput>cd ../bind9</userinput>
$ <userinput>./configure CC=3D"cc -xarch=3Damd64" --enable-threads \
--with-openssl=3D/opt/pkcs11/usr \
--with-pkcs11=3D/usr/lib/64/libpkcs11.so</userinput>
@@ -217,10 +258,22 @@
same as the --prefix argument to the OpenSSL
Configure).</para>
</sect3>
+ <sect3>
+ <!-- Example 6 -->
+ <title>Configuring BIND 9 for SoftHSM</title>
+ <screen>
+$ <userinput>cd ../bind9</userinput>
+$ <userinput>./configure --enable-threads \
+ --with-openssl=3D/opt/pkcs11/usr \
+ --with-pkcs11=3D/opt/pkcs11/usr/lib/libpkcs11.so</userinput>
+</screen>
+ </sect3>
<para>After configuring, run
"<command>make</command>",
"<command>make test</command>" and
"<command>make install</command>".</para>
+ <para>(Note: If "make test" fails in the "pkcs11" system test, you may
+ have forgotten to set the SOFTHSM_CONF environment variable.)</para>
</sect2>
<sect2>
<title>PKCS #11 Tools</title>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/misc/Makefile.in
--- a/head/contrib/bind9/doc/misc/Makefile.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/misc/Makefile.in Tue Apr 17 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.9 2009-07-10 23:47:58 tbox Exp $
+# $Id: Makefile.in,v 1.9 2009/07/10 23:47:58 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/misc/dnssec
--- a/head/contrib/bind9/doc/misc/dnssec Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/misc/dnssec Tue Apr 17 11:51:51 2012 +0300
@@ -81,4 +81,4 @@
ensure the integrity of zone transfers.
=20
=20
-$Id: dnssec,v 1.19 2004-03-05 05:04:53 marka Exp $
+$Id: dnssec,v 1.19 2004/03/05 05:04:53 marka Exp $
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/misc/format-opt=
ions.pl
--- a/head/contrib/bind9/doc/misc/format-options.pl Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/doc/misc/format-options.pl Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: format-options.pl,v 1.5 2007-09-24 04:21:59 marka Exp $
+# $Id: format-options.pl,v 1.5 2007/09/24 04:21:59 marka Exp $
=20
print <<END;
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/misc/ipv6
--- a/head/contrib/bind9/doc/misc/ipv6 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/misc/ipv6 Tue Apr 17 11:51:51 2012 +0300
@@ -110,4 +110,4 @@
3542: Advanced Sockets Application Program Interface (API) for IPv6
=20
=20
-$Id: ipv6,v 1.9 2004-08-10 04:27:51 jinmei Exp $
+$Id: ipv6,v 1.9 2004/08/10 04:27:51 jinmei Exp $
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/misc/migration
--- a/head/contrib/bind9/doc/misc/migration Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/misc/migration Tue Apr 17 11:51:51 2012 +0300
@@ -264,4 +264,4 @@
start the named process.
=20
=20
-$Id: migration,v 1.49 2008-03-18 15:42:53 jreed Exp $
+$Id: migration,v 1.49 2008/03/18 15:42:53 jreed Exp $
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/misc/migration-=
4to9
--- a/head/contrib/bind9/doc/misc/migration-4to9 Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/doc/misc/migration-4to9 Tue Apr 17 11:51:51 2012 +=
0300
@@ -2,7 +2,7 @@
Copyright (C) 2001 Internet Software Consortium.
See COPYRIGHT in the source root or http://isc.org/copyright.html for term=
s.
=20
-$Id: migration-4to9,v 1.4 2004-03-05 05:04:53 marka Exp $
+$Id: migration-4to9,v 1.4 2004/03/05 05:04:53 marka Exp $
=20
BIND 4 to BIND 9 Migration Notes
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/misc/options
--- a/head/contrib/bind9/doc/misc/options Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/misc/options Tue Apr 17 11:51:51 2012 +0300
@@ -74,6 +74,7 @@
* ) ];
attach-cache <string>;
auth-nxdomain <boolean>; // default changed
+ auto-dnssec ( allow | maintain | off );
avoid-v4-udp-ports { <portrange>; ... };
avoid-v6-udp-ports { <portrange>; ... };
bindkeys-file <quoted_string>;
@@ -113,7 +114,7 @@
dnssec-accept-expired <boolean>;
dnssec-dnskey-kskonly <boolean>;
dnssec-enable <boolean>;
- dnssec-lookaside ( <string> trust-anchor <string> | auto );
+ dnssec-lookaside ( <string> trust-anchor <string> | auto | no );
dnssec-must-be-secure <string> <boolean>;
dnssec-secure-to-insecure <boolean>;
dnssec-validation ( yes | no | auto );
@@ -196,8 +197,8 @@
reserved-sockets <integer>;
resolver-query-timeout <integer>;
response-policy {
- zone <string> [ policy ( given | no-op | nxdomain | nodata
- | cname <domain> ) ];
+ zone <string> [ policy ( given | disabled | passthru |
+ no-op | nxdomain | nodata | cname <domain> ) ];
};
rfc2308-type1 <boolean>; // not yet implemented
root-delegation-only [ exclude { <quoted_string>; ... } ];
@@ -297,6 +298,7 @@
* ) ];
attach-cache <string>;
auth-nxdomain <boolean>; // default changed
+ auto-dnssec ( allow | maintain | off );
cache-file <quoted_string>;
check-dup-records ( fail | warn | ignore );
check-integrity <boolean>;
@@ -332,7 +334,7 @@
dnssec-accept-expired <boolean>;
dnssec-dnskey-kskonly <boolean>;
dnssec-enable <boolean>;
- dnssec-lookaside ( <string> trust-anchor <string> | auto );
+ dnssec-lookaside ( <string> trust-anchor <string> | auto | no );
dnssec-must-be-secure <string> <boolean>;
dnssec-secure-to-insecure <boolean>;
dnssec-validation ( yes | no | auto );
@@ -399,8 +401,8 @@
request-nsid <boolean>;
resolver-query-timeout <integer>;
response-policy {
- zone <string> [ policy ( given | no-op | nxdomain | nodata
- | cname <domain> ) ];
+ zone <string> [ policy ( given | disabled | passthru |
+ no-op | nxdomain | nodata | cname <domain> ) ];
};
rfc2308-type1 <boolean>; // not yet implemented
root-delegation-only [ exclude { <quoted_string>; ... } ];
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/misc/rfc-compli=
ance
--- a/head/contrib/bind9/doc/misc/rfc-compliance Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/doc/misc/rfc-compliance Tue Apr 17 11:51:51 2012 +=
0300
@@ -2,7 +2,7 @@
Copyright (C) 2001 Internet Software Consortium.
See COPYRIGHT in the source root or http://isc.org/copyright.html for term=
s.
=20
-$Id: rfc-compliance,v 1.4 2004-03-05 05:04:53 marka Exp $
+$Id: rfc-compliance,v 1.4 2004/03/05 05:04:53 marka Exp $
=20
BIND 9 is striving for strict compliance with IETF standards. We
believe this release of BIND 9 complies with the following RFCs, with
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/misc/roadmap
--- a/head/contrib/bind9/doc/misc/roadmap Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/misc/roadmap Tue Apr 17 11:51:51 2012 +0300
@@ -2,7 +2,7 @@
Copyright (C) 2000, 2001 Internet Software Consortium.
See COPYRIGHT in the source root or http://isc.org/copyright.html for term=
s.
=20
-$Id: roadmap,v 1.2 2004-03-05 05:04:54 marka Exp $
+$Id: roadmap,v 1.2 2004/03/05 05:04:54 marka Exp $
=20
Road Map to the BIND 9 Source Tree
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/misc/sdb
--- a/head/contrib/bind9/doc/misc/sdb Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/doc/misc/sdb Tue Apr 17 11:51:51 2012 +0300
@@ -166,4 +166,4 @@
A future release may support dynamic loading of sdb drivers.
=20
=20
-$Id: sdb,v 1.6 2004-03-05 05:04:54 marka Exp $
+$Id: sdb,v 1.6 2004/03/05 05:04:54 marka Exp $
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/doc/misc/sort-optio=
ns.pl
--- a/head/contrib/bind9/doc/misc/sort-options.pl Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/doc/misc/sort-options.pl Tue Apr 17 11:51:51 2012 =
+0300
@@ -14,7 +14,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: sort-options.pl,v 1.3 2007-09-24 23:46:48 tbox Exp $
+# $Id: sort-options.pl,v 1.3 2007/09/24 23:46:48 tbox Exp $
=20
sub sortlevel() {
my @options =3D ();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/isc-config.sh.in
--- a/head/contrib/bind9/isc-config.sh.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/isc-config.sh.in Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: isc-config.sh.in,v 1.17 2007-06-19 23:46:59 tbox Exp $
+# $Id: isc-config.sh.in,v 1.17 2007/06/19 23:46:59 tbox Exp $
=20
prefix=3D at prefix@
exec_prefix=3D at exec_prefix@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/Makefile.in
--- a/head/contrib/bind9/lib/Makefile.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/Makefile.in Tue Apr 17 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.21 2007-06-19 23:47:13 tbox Exp $
+# $Id: Makefile.in,v 1.21 2007/06/19 23:47:13 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/bind9/Makefile.=
in
--- a/head/contrib/bind9/lib/bind9/Makefile.in Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/bind9/Makefile.in Tue Apr 17 11:51:51 2012 +03=
00
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.14 2009-12-05 23:31:40 each Exp $
+# $Id: Makefile.in,v 1.14 2009/12/05 23:31:40 each Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/bind9/api
--- a/head/contrib/bind9/lib/bind9/api Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/bind9/api Tue Apr 17 11:51:51 2012 +0300
@@ -1,3 +1,8 @@
+# LIBINTERFACE ranges
+# 9.6: 50-59, 110-119
+# 9.7: 60-79
+# 9.8: 80-89
+# 9.9: 90-109
LIBINTERFACE =3D 80
-LIBREVISION =3D 3
+LIBREVISION =3D 4
LIBAGE =3D 0
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/bind9/check.c
--- a/head/contrib/bind9/lib/bind9/check.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/bind9/check.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 2001-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: check.c,v 1.125.14.6 2011-06-17 07:04:31 each Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -671,8 +671,17 @@
unsigned int max;
} intervaltable;
=20
+typedef enum {
+ optlevel_config,
+ optlevel_options,
+ optlevel_view,
+ optlevel_zone
+} optlevel_t;
+
static isc_result_t
-check_options(const cfg_obj_t *options, isc_log_t *logctx, isc_mem_t *mctx=
) {
+check_options(const cfg_obj_t *options, isc_log_t *logctx, isc_mem_t *mctx,
+ optlevel_t optlevel)
+{
isc_result_t result =3D ISC_R_SUCCESS;
isc_result_t tresult;
unsigned int i;
@@ -844,19 +853,23 @@
element =3D cfg_list_next(element))
{
const char *dlv;
- const cfg_obj_t *anchor;
+ const cfg_obj_t *dlvobj, *anchor;
=20
obj =3D cfg_listelt_value(element);
=20
- dlv =3D cfg_obj_asstring(cfg_tuple_get(obj, "domain"));
anchor =3D cfg_tuple_get(obj, "trust-anchor");
+ dlvobj =3D cfg_tuple_get(obj, "domain");
+ dlv =3D cfg_obj_asstring(dlvobj);
=20
/*
- * If domain is "auto" and trust anchor is missing,
- * skip remaining tests
+ * If domain is "auto" or "no" and trust anchor
+ * is missing, skip remaining tests
*/
- if (!strcmp(dlv, "auto") && cfg_obj_isvoid(anchor))
- continue;
+ if (cfg_obj_isvoid(anchor)) {
+ if (!strcasecmp(dlv, "no") ||
+ !strcasecmp(dlv, "auto"))
+ continue;
+ }
=20
isc_buffer_init(&b, dlv, strlen(dlv));
isc_buffer_add(&b, strlen(dlv));
@@ -908,8 +921,8 @@
} else {
cfg_obj_log(obj, logctx, ISC_LOG_ERROR,
"dnssec-lookaside requires "
- "either 'auto' or a domain and "
- "trust anchor");
+ "either 'auto' or 'no', or a "
+ "domain and trust anchor");
if (result =3D=3D ISC_R_SUCCESS)
result =3D ISC_R_FAILURE;
}
@@ -920,6 +933,21 @@
}
=20
/*
+ * Check auto-dnssec at the view/options level
+ */
+ obj =3D NULL;
+ (void)cfg_map_get(options, "auto-dnssec", &obj);
+ if (obj !=3D NULL) {
+ const char *arg =3D cfg_obj_asstring(obj);
+ if (optlevel !=3D optlevel_zone && strcasecmp(arg, "off") !=3D 0) {
+ cfg_obj_log(obj, logctx, ISC_LOG_ERROR,
+ "auto-dnssec may only be activated at the "
+ "zone level");
+ result =3D ISC_R_FAILURE;
+ }
+ }
+
+ /*
* Check dnssec-must-be-secure.
*/
obj =3D NULL;
@@ -1644,7 +1672,7 @@
/*
* Check various options.
*/
- tresult =3D check_options(zoptions, logctx, mctx);
+ tresult =3D check_options(zoptions, logctx, mctx, optlevel_zone);
if (tresult !=3D ISC_R_SUCCESS)
result =3D tresult;
=20
@@ -2101,7 +2129,7 @@
* Check that all zone statements are syntactically correct and
* there are no duplicate zones.
*/
- tresult =3D isc_symtab_create(mctx, 100, freekey, mctx,
+ tresult =3D isc_symtab_create(mctx, 1000, freekey, mctx,
ISC_FALSE, &symtab);
if (tresult !=3D ISC_R_SUCCESS)
return (ISC_R_NOMEMORY);
@@ -2165,7 +2193,7 @@
* Check that all key statements are syntactically correct and
* there are no duplicate keys.
*/
- tresult =3D isc_symtab_create(mctx, 100, freekey, mctx,
+ tresult =3D isc_symtab_create(mctx, 1000, freekey, mctx,
ISC_FALSE, &symtab);
if (tresult !=3D ISC_R_SUCCESS)
return (ISC_R_NOMEMORY);
@@ -2277,13 +2305,16 @@
result =3D tresult;
}
}
+
/*
* Check options.
*/
if (voptions !=3D NULL)
- tresult =3D check_options(voptions, logctx, mctx);
+ tresult =3D check_options(voptions, logctx, mctx,
+ optlevel_view);
else
- tresult =3D check_options(config, logctx, mctx);
+ tresult =3D check_options(config, logctx, mctx,
+ optlevel_config);
if (tresult !=3D ISC_R_SUCCESS)
result =3D tresult;
=20
@@ -2574,7 +2605,8 @@
(void)cfg_map_get(config, "options", &options);
=20
if (options !=3D NULL &&
- check_options(options, logctx, mctx) !=3D ISC_R_SUCCESS)
+ check_options(options, logctx, mctx,
+ optlevel_options) !=3D ISC_R_SUCCESS)
result =3D ISC_R_FAILURE;
=20
if (bind9_check_logging(config, logctx, mctx) !=3D ISC_R_SUCCESS)
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/bind9/getaddres=
ses.c
--- a/head/contrib/bind9/lib/bind9/getaddresses.c Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/bind9/getaddresses.c Tue Apr 17 11:51:51 2012 =
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: getaddresses.c,v 1.22 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: getaddresses.c,v 1.22 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/bind9/include/M=
akefile.in
--- a/head/contrib/bind9/lib/bind9/include/Makefile.in Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/bind9/include/Makefile.in Tue Apr 17 11:51:51 =
2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.4 2007-06-19 23:47:16 tbox Exp $
+# $Id: Makefile.in,v 1.4 2007/06/19 23:47:16 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/bind9/include/b=
ind9/Makefile.in
--- a/head/contrib/bind9/lib/bind9/include/bind9/Makefile.in Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/bind9/include/bind9/Makefile.in Tue Apr 17 11:=
51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.8 2007-06-19 23:47:16 tbox Exp $
+# $Id: Makefile.in,v 1.8 2007/06/19 23:47:16 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/bind9/include/b=
ind9/check.h
--- a/head/contrib/bind9/lib/bind9/include/bind9/check.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/bind9/include/bind9/check.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: check.h,v 1.9 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: check.h,v 1.9 2007/06/19 23:47:16 tbox Exp $ */
=20
#ifndef BIND9_CHECK_H
#define BIND9_CHECK_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/bind9/include/b=
ind9/getaddresses.h
--- a/head/contrib/bind9/lib/bind9/include/bind9/getaddresses.h Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/bind9/include/bind9/getaddresses.h Tue Apr 17 =
11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: getaddresses.h,v 1.11 2009-01-17 23:47:42 tbox Exp $ */
+/* $Id: getaddresses.h,v 1.11 2009/01/17 23:47:42 tbox Exp $ */
=20
#ifndef BIND9_GETADDRESSES_H
#define BIND9_GETADDRESSES_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/bind9/include/b=
ind9/version.h
--- a/head/contrib/bind9/lib/bind9/include/bind9/version.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/bind9/include/bind9/version.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: version.h,v 1.9 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: version.h,v 1.9 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file bind9/version.h */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/bind9/version.c
--- a/head/contrib/bind9/lib/bind9/version.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/bind9/version.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: version.c,v 1.8 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: version.c,v 1.8 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/Makefile.in
--- a/head/contrib/bind9/lib/dns/Makefile.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/Makefile.in Tue Apr 17 11:51:51 2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
# Copyright (C) 1998-2003 Internet Software Consortium.
#
# Permission to use, copy, modify, and/or distribute this software for any
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.176.8.2 2011-03-10 04:29:17 each Exp $
+# $Id$
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/acache.c
--- a/head/contrib/bind9/lib/dns/acache.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/acache.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: acache.c,v 1.22 2008-02-07 23:46:54 tbox Exp $ */
+/* $Id: acache.c,v 1.22 2008/02/07 23:46:54 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/acl.c
--- a/head/contrib/bind9/lib/dns/acl.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/acl.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: acl.c,v 1.53.426.2 2011-06-17 23:47:11 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/adb.c
--- a/head/contrib/bind9/lib/dns/adb.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/adb.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: adb.c,v 1.254.14.4 2011-03-13 03:36:47 marka Exp $ */
+/* $Id$ */
=20
/*! \file
*
@@ -254,6 +254,7 @@
=20
ISC_LIST(dns_adblameinfo_t) lameinfo;
ISC_LINK(dns_adbentry_t) plink;
+
};
=20
/*
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/api
--- a/head/contrib/bind9/lib/dns/api Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/api Tue Apr 17 11:51:51 2012 +0300
@@ -1,3 +1,8 @@
-LIBINTERFACE =3D 84
-LIBREVISION =3D 1
-LIBAGE =3D 3
+# LIBINTERFACE ranges
+# 9.6: 50-59, 110-119
+# 9.7: 60-79
+# 9.8: 80-89
+# 9.9: 90-109
+LIBINTERFACE =3D 87
+LIBREVISION =3D 0
+LIBAGE =3D 6
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/byaddr.c
--- a/head/contrib/bind9/lib/dns/byaddr.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/byaddr.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: byaddr.c,v 1.41 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: byaddr.c,v 1.41 2009/09/02 23:48:02 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/cache.c
--- a/head/contrib/bind9/lib/dns/cache.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/cache.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: cache.c,v 1.87.262.2 2011-03-03 23:47:09 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/callbacks.c
--- a/head/contrib/bind9/lib/dns/callbacks.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/callbacks.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
* Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: callbacks.c,v 1.17 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/client.c
--- a/head/contrib/bind9/lib/dns/client.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/client.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009-2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: client.c,v 1.12.24.2 2011-03-12 04:59:16 tbox Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/compress.c
--- a/head/contrib/bind9/lib/dns/compress.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/compress.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: compress.c,v 1.59 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: compress.c,v 1.59 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/db.c
--- a/head/contrib/bind9/lib/dns/db.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/db.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007-2009, 2011 Internet Systems Consortium,=
Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007-2009, 2011, 2012 Internet Systems Conso=
rtium, Inc. ("ISC")
* Copyright (C) 1999-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: db.c,v 1.97 2011-01-13 04:59:25 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -955,10 +955,11 @@
isc_result_t
dns_db_rpz_findips(dns_rpz_zone_t *rpz, dns_rpz_type_t rpz_type,
dns_zone_t *zone, dns_db_t *db, dns_dbversion_t *version,
- dns_rdataset_t *ardataset, dns_rpz_st_t *st)
+ dns_rdataset_t *ardataset, dns_rpz_st_t *st,
+ dns_name_t *query_qname)
{
if (db->methods->rpz_findips =3D=3D NULL)
return (ISC_R_NOTIMPLEMENTED);
return ((db->methods->rpz_findips)(rpz, rpz_type, zone, db, version,
- ardataset, st));
+ ardataset, st, query_qname));
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/dbiterator.c
--- a/head/contrib/bind9/lib/dns/dbiterator.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/dbiterator.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dbiterator.c,v 1.18 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: dbiterator.c,v 1.18 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/dbtable.c
--- a/head/contrib/bind9/lib/dns/dbtable.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/dbtable.c Tue Apr 17 11:51:51 2012 +0300
@@ -16,7 +16,7 @@
*/
=20
/*
- * $Id: dbtable.c,v 1.33 2007-06-19 23:47:16 tbox Exp $
+ * $Id: dbtable.c,v 1.33 2007/06/19 23:47:16 tbox Exp $
*/
=20
/*! \file
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/diff.c
--- a/head/contrib/bind9/lib/dns/diff.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/diff.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007-2009, 2011 Internet Systems Consortium,=
Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007-2009, 2011, 2012 Internet Systems Conso=
rtium, Inc. ("ISC")
* Copyright (C) 2000-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: diff.c,v 1.23.248.3 2011-03-25 23:53:52 each Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/dispatch.c
--- a/head/contrib/bind9/lib/dns/dispatch.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/dispatch.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dispatch.c,v 1.168.248.4 2011-04-06 10:30:08 marka Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/dlz.c
--- a/head/contrib/bind9/lib/dns/dlz.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/dlz.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Portions Copyright (C) 2005, 2007, 2009-2011 Internet Systems Consorti=
um, Inc. ("ISC")
+ * Portions Copyright (C) 2005, 2007, 2009-2012 Internet Systems Consorti=
um, Inc. ("ISC")
* Portions Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -50,7 +50,7 @@
* USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dlz.c,v 1.10.14.2 2011-03-12 04:59:16 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/dns64.c
--- a/head/contrib/bind9/lib/dns/dns64.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/dns64.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2010-2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dns64.c,v 1.6.22.2 2011-03-12 04:59:16 tbox Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/dnssec.c
--- a/head/contrib/bind9/lib/dns/dnssec.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/dnssec.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -16,7 +16,7 @@
*/
=20
/*
- * $Id: dnssec.c,v 1.119.170.4 2011-05-06 21:07:50 each Exp $
+ * $Id$
*/
=20
/*! \file */
@@ -1134,17 +1134,15 @@
}
=20
static void
-get_hints(dns_dnsseckey_t *key) {
+get_hints(dns_dnsseckey_t *key, isc_stdtime_t now) {
isc_result_t result;
- isc_stdtime_t now, publish, active, revoke, inactive, delete;
+ isc_stdtime_t publish, active, revoke, inactive, delete;
isc_boolean_t pubset =3D ISC_FALSE, actset =3D ISC_FALSE;
isc_boolean_t revset =3D ISC_FALSE, inactset =3D ISC_FALSE;
isc_boolean_t delset =3D ISC_FALSE;
=20
REQUIRE(key !=3D NULL && key->key !=3D NULL);
=20
- isc_stdtime_get(&now);
-
result =3D dst_key_gettime(key->key, DST_TIME_PUBLISH, &publish);
if (result =3D=3D ISC_R_SUCCESS)
pubset =3D ISC_TRUE;
@@ -1241,6 +1239,7 @@
char namebuf[DNS_NAME_FORMATSIZE], *p;
isc_buffer_t b;
unsigned int len;
+ isc_stdtime_t now;
=20
REQUIRE(keylist !=3D NULL);
ISC_LIST_INIT(list);
@@ -1256,6 +1255,8 @@
RETERR(isc_dir_open(&dir, directory));
dir_open =3D ISC_TRUE;
=20
+ isc_stdtime_get(&now);
+
while (isc_dir_read(&dir) =3D=3D ISC_R_SUCCESS) {
if (dir.entry.name[0] =3D=3D 'K' &&
dir.entry.length > len + 1 &&
@@ -1286,7 +1287,7 @@
=20
RETERR(dns_dnsseckey_create(mctx, &dstkey, &key));
key->source =3D dns_keysource_repository;
- get_hints(key);
+ get_hints(key, now);
=20
if (key->legacy) {
dns_dnsseckey_destroy(mctx, &key);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/ds.c
--- a/head/contrib/bind9/lib/dns/ds.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/ds.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ds.c,v 1.13 2010-12-23 23:47:08 tbox Exp $ */
+/* $Id: ds.c,v 1.13 2010/12/23 23:47:08 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/dst_api.c
--- a/head/contrib/bind9/lib/dns/dst_api.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/dst_api.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Portions Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("I=
SC")
+ * Portions Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("I=
SC")
* Portions Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -31,7 +31,7 @@
=20
/*
* Principal Author: Brian Wellington
- * $Id: dst_api.c,v 1.57.10.1 2011-03-21 19:53:34 each Exp $
+ * $Id$
*/
=20
/*! \file */
@@ -447,7 +447,6 @@
dst_key_free(&key);
return (DST_R_INVALIDPRIVATEKEY);
}
- key->key_id =3D id;
=20
*keyp =3D key;
return (ISC_R_SUCCESS);
@@ -598,7 +597,7 @@
isc_uint8_t alg, proto;
isc_uint32_t flags, extflags;
dst_key_t *key =3D NULL;
- dns_keytag_t id;
+ dns_keytag_t id, rid;
isc_region_t r;
isc_result_t result;
=20
@@ -613,6 +612,7 @@
alg =3D isc_buffer_getuint8(source);
=20
id =3D dst_region_computeid(&r, alg);
+ rid =3D dst_region_computerid(&r, alg);
=20
if (flags & DNS_KEYFLAG_EXTENDED) {
if (isc_buffer_remaininglength(source) < 2)
@@ -626,6 +626,7 @@
if (result !=3D ISC_R_SUCCESS)
return (result);
key->key_id =3D id;
+ key->key_rid =3D rid;
=20
*keyp =3D key;
return (ISC_R_SUCCESS);
@@ -926,13 +927,6 @@
if (key1->key_alg !=3D key2->key_alg)
return (ISC_FALSE);
=20
- /*
- * For all algorithms except RSAMD5, revoking the key
- * changes the key ID, increasing it by 128. If we want to
- * be able to find matching keys even if one of them is the
- * revoked version of the other one, then we need to check
- * for that possibility.
- */
if (key1->key_id !=3D key2->key_id) {
if (!match_revoked_key)
return (ISC_FALSE);
@@ -941,11 +935,8 @@
if ((key1->key_flags & DNS_KEYFLAG_REVOKE) =3D=3D
(key2->key_flags & DNS_KEYFLAG_REVOKE))
return (ISC_FALSE);
- if ((key1->key_flags & DNS_KEYFLAG_REVOKE) !=3D 0 &&
- key1->key_id !=3D ((key2->key_id + 128) & 0xffff))
- return (ISC_FALSE);
- if ((key2->key_flags & DNS_KEYFLAG_REVOKE) !=3D 0 &&
- key2->key_id !=3D ((key1->key_id + 128) & 0xffff))
+ if (key1->key_id !=3D key2->key_rid &&
+ key1->key_rid !=3D key2->key_id)
return (ISC_FALSE);
}
=20
@@ -1572,7 +1563,8 @@
fprintf(fp, " ");
=20
isc_buffer_usedregion(&classb, &r);
- isc_util_fwrite(r.base, 1, r.length, fp);
+ if ((unsigned) fwrite(r.base, 1, r.length, fp) !=3D r.length)
+ ret =3D DST_R_WRITEERROR;
=20
if ((type & DST_TYPE_KEY) !=3D 0)
fprintf(fp, " KEY ");
@@ -1580,7 +1572,8 @@
fprintf(fp, " DNSKEY ");
=20
isc_buffer_usedregion(&textb, &r);
- isc_util_fwrite(r.base, 1, r.length, fp);
+ if ((unsigned) fwrite(r.base, 1, r.length, fp) !=3D r.length)
+ ret =3D DST_R_WRITEERROR;
=20
fputc('\n', fp);
fflush(fp);
@@ -1643,6 +1636,7 @@
=20
isc_buffer_usedregion(&dnsbuf, &r);
key->key_id =3D dst_region_computeid(&r, key->key_alg);
+ key->key_rid =3D dst_region_computerid(&r, key->key_alg);
return (ISC_R_SUCCESS);
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/dst_interna=
l.h
--- a/head/contrib/bind9/lib/dns/dst_internal.h Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/dns/dst_internal.h Tue Apr 17 11:51:51 2012 +0=
300
@@ -1,5 +1,5 @@
/*
- * Portions Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("I=
SC")
+ * Portions Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("I=
SC")
* Portions Copyright (C) 2000-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -29,7 +29,7 @@
* IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dst_internal.h,v 1.29 2011-01-11 23:47:13 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DST_DST_INTERNAL_H
#define DST_DST_INTERNAL_H 1
@@ -94,6 +94,8 @@
unsigned int key_alg; /*%< algorithm of the key */
isc_uint32_t key_flags; /*%< flags of the public key */
isc_uint16_t key_id; /*%< identifier of the key */
+ isc_uint16_t key_rid; /*%< identifier of the key when
+ revoked */
isc_uint16_t key_bits; /*%< hmac digest bits */
dns_rdataclass_t key_class; /*%< class of the key record */
isc_mem_t *mctx; /*%< memory context */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/dst_lib.c
--- a/head/contrib/bind9/lib/dns/dst_lib.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/dst_lib.c Tue Apr 17 11:51:51 2012 +0300
@@ -17,7 +17,7 @@
=20
/*
* Principal Author: Brian Wellington
- * $Id: dst_lib.c,v 1.5 2007-06-19 23:47:16 tbox Exp $
+ * $Id: dst_lib.c,v 1.5 2007/06/19 23:47:16 tbox Exp $
*/
=20
/*! \file */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/dst_openssl=
.h
--- a/head/contrib/bind9/lib/dns/dst_openssl.h Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/dns/dst_openssl.h Tue Apr 17 11:51:51 2012 +03=
00
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007-2009, 2011 Internet Systems Consortium,=
Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007-2009, 2011, 2012 Internet Systems Conso=
rtium, Inc. ("ISC")
* Copyright (C) 2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dst_openssl.h,v 1.9.302.2 2011-03-12 04:59:16 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DST_OPENSSL_H
#define DST_OPENSSL_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/dst_parse.c
--- a/head/contrib/bind9/lib/dns/dst_parse.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/dst_parse.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Portions Copyright (C) 2004-2010 Internet Systems Consortium, Inc. ("I=
SC")
+ * Portions Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("I=
SC")
* Portions Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -31,7 +31,7 @@
=20
/*%
* Principal Author: Brian Wellington
- * $Id: dst_parse.c,v 1.27 2010-12-23 04:07:58 marka Exp $
+ * $Id$
*/
=20
#include <config.h>
@@ -641,9 +641,7 @@
}
isc_buffer_usedregion(&b, &r);
=20
- fprintf(fp, "%s ", s);
- isc_util_fwrite(r.base, 1, r.length, fp);
- fprintf(fp, "\n");
+ fprintf(fp, "%s %.*s\n", s, (int)r.length, r.base);
}
=20
/* Add the metadata tags */
@@ -661,14 +659,15 @@
=20
isc_buffer_init(&b, buffer, sizeof(buffer));
result =3D dns_time32_totext(when, &b);
- if (result !=3D ISC_R_SUCCESS)
- continue;
+ if (result !=3D ISC_R_SUCCESS) {
+ fclose(fp);
+ return (DST_R_INVALIDPRIVATEKEY);
+ }
=20
isc_buffer_usedregion(&b, &r);
=20
- fprintf(fp, "%s ", timetags[i]);
- isc_util_fwrite(r.base, 1, r.length, fp);
- fprintf(fp, "\n");
+ fprintf(fp, "%s %.*s\n", timetags[i], (int)r.length,
+ r.base);
}
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/dst_parse.h
--- a/head/contrib/bind9/lib/dns/dst_parse.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/dst_parse.h Tue Apr 17 11:51:51 2012 +0300
@@ -29,7 +29,7 @@
* IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dst_parse.h,v 1.17 2010-12-23 23:47:08 tbox Exp $ */
+/* $Id: dst_parse.h,v 1.17 2010/12/23 23:47:08 tbox Exp $ */
=20
/*! \file */
#ifndef DST_DST_PARSE_H
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/dst_result.c
--- a/head/contrib/bind9/lib/dns/dst_result.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/dst_result.c Tue Apr 17 11:51:51 2012 +0300
@@ -17,7 +17,7 @@
=20
/*%
* Principal Author: Brian Wellington
- * $Id: dst_result.c,v 1.7 2008-04-01 23:47:10 tbox Exp $
+ * $Id: dst_result.c,v 1.7 2008/04/01 23:47:10 tbox Exp $
*/
=20
#include <config.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/ecdb.c
--- a/head/contrib/bind9/lib/dns/ecdb.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/ecdb.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009-2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ecdb.c,v 1.8 2011-01-14 00:51:43 tbox Exp $ */
+/* $Id$ */
=20
#include "config.h"
=20
@@ -37,10 +37,6 @@
#define ECDBNODE_MAGIC ISC_MAGIC('E', 'C', 'D', 'N')
#define VALID_ECDBNODE(ecdbn) ISC_MAGIC_VALID(ecdbn, ECDBNODE_MAGIC)
=20
-#if DNS_RDATASET_FIXED
-#error "Fixed rdataset isn't supported in this implementation"
-#endif
-
/*%
* The 'ephemeral' cache DB (ecdb) implementation. An ecdb just provides
* temporary storage for ongoing name resolution with the common DB interf=
aces.
@@ -660,7 +656,11 @@
rdataset->private5 =3D NULL;
return (ISC_R_NOMORE);
}
+#if DNS_RDATASET_FIXED
+ raw +=3D 2 + (4 * count);
+#else
raw +=3D 2;
+#endif
/*
* The privateuint4 field is the number of rdata beyond the cursor
* position, so we decrement the total count by one before storing
@@ -686,7 +686,11 @@
rdataset->privateuint4 =3D count;
raw =3D rdataset->private5;
length =3D raw[0] * 256 + raw[1];
+#if DNS_RDATASET_FIXED
+ raw +=3D length + 4;
+#else
raw +=3D length + 2;
+#endif
rdataset->private5 =3D raw;
=20
return (ISC_R_SUCCESS);
@@ -702,7 +706,11 @@
REQUIRE(raw !=3D NULL);
=20
length =3D raw[0] * 256 + raw[1];
+#if DNS_RDATASET_FIXED
+ raw +=3D 4;
+#else
raw +=3D 2;
+#endif
if (rdataset->type =3D=3D dns_rdatatype_rrsig) {
if (*raw & DNS_RDATASLAB_OFFLINE)
flags |=3D DNS_RDATA_OFFLINE;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/forward.c
--- a/head/contrib/bind9/lib/dns/forward.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/forward.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: forward.c,v 1.14 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: forward.c,v 1.14 2009/09/02 23:48:02 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/gen-unix.h
--- a/head/contrib/bind9/lib/dns/gen-unix.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/gen-unix.h Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: gen-unix.h,v 1.21 2009-01-17 23:47:42 tbox Exp $ */
+/* $Id: gen-unix.h,v 1.21 2009/01/17 23:47:42 tbox Exp $ */
=20
/*! \file
* \brief
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/gen.c
--- a/head/contrib/bind9/lib/dns/gen.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/gen.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: gen.c,v 1.85 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: gen.c,v 1.85 2009/12/04 22:06:37 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/gssapi_link=
.c
--- a/head/contrib/bind9/lib/dns/gssapi_link.c Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/dns/gssapi_link.c Tue Apr 17 11:51:51 2012 +03=
00
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 2000-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -16,7 +16,7 @@
*/
=20
/*
- * $Id: gssapi_link.c,v 1.16.10.1 2011-03-28 05:36:05 marka Exp $
+ * $Id$
*/
=20
#include <config.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/gssapictx.c
--- a/head/contrib/bind9/lib/dns/gssapictx.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/gssapictx.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 2000, 2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: gssapictx.c,v 1.26.12.2 2011-04-07 23:05:01 marka Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
@@ -135,6 +135,7 @@
}
=20
result =3D dns_name_toprincipal(namep, buffer);
+ RUNTIME_CHECK(result =3D=3D ISC_R_SUCCESS);
isc_buffer_putuint8(buffer, 0);
isc_buffer_usedregion(buffer, &r);
REGION_TO_GBUFFER(r, *gbuffer);
@@ -309,7 +310,7 @@
if (gret !=3D GSS_S_COMPLETE) {
gss_log(3, "failed to acquire %s credentials for %s: %s",
initiate ? "initiate" : "accept",
- (char *)gnamebuf.value,
+ (gname !=3D NULL) ? (char *)gnamebuf.value : "?",
gss_error_tostring(gret, minor, buf, sizeof(buf)));
check_config((char *)array);
return (ISC_R_FAILURE);
@@ -317,12 +318,14 @@
=20
gss_log(4, "acquired %s credentials for %s",
initiate ? "initiate" : "accept",
- (char *)gnamebuf.value);
+ (gname !=3D NULL) ? (char *)gnamebuf.value : "?");
=20
log_cred(*cred);
=20
return (ISC_R_SUCCESS);
#else
+ REQUIRE(cred !=3D NULL && *cred =3D=3D NULL);
+
UNUSED(name);
UNUSED(initiate);
UNUSED(cred);
@@ -342,13 +345,15 @@
char *sname;
char *rname;
isc_buffer_t buffer;
+ isc_result_t result;
=20
/*
* It is far, far easier to write the names we are looking at into
* a string, and do string operations on them.
*/
isc_buffer_init(&buffer, sbuf, sizeof(sbuf));
- dns_name_toprincipal(signer, &buffer);
+ result =3D dns_name_toprincipal(signer, &buffer);
+ RUNTIME_CHECK(result =3D=3D ISC_R_SUCCESS);
isc_buffer_putuint8(&buffer, 0);
if (name !=3D NULL)
dns_name_format(name, nbuf, sizeof(nbuf));
@@ -414,13 +419,15 @@
char *nname;
char *rname;
isc_buffer_t buffer;
+ isc_result_t result;
=20
/*
* It is far, far easier to write the names we are looking at into
* a string, and do string operations on them.
*/
isc_buffer_init(&buffer, sbuf, sizeof(sbuf));
- dns_name_toprincipal(signer, &buffer);
+ result =3D dns_name_toprincipal(signer, &buffer);
+ RUNTIME_CHECK(result =3D=3D ISC_R_SUCCESS);
isc_buffer_putuint8(&buffer, 0);
if (name !=3D NULL)
dns_name_format(name, nbuf, sizeof(nbuf));
@@ -664,8 +671,7 @@
gss_log(3, "failed "
"gsskrb5_register_acceptor_identity(%s): %s",
gssapi_keytab,
- gss_error_tostring(gret, minor,
- buf, sizeof(buf)));
+ gss_error_tostring(gret, 0, buf, sizeof(buf)));
return (DNS_R_INVALIDTKEY);
}
#else
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/hmac_link.c
--- a/head/contrib/bind9/lib/dns/hmac_link.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/hmac_link.c Tue Apr 17 11:51:51 2012 +0300
@@ -31,7 +31,7 @@
=20
/*
* Principal Author: Brian Wellington
- * $Id: hmac_link.c,v 1.19 2011-01-11 23:47:13 tbox Exp $
+ * $Id: hmac_link.c,v 1.19 2011/01/11 23:47:13 tbox Exp $
*/
=20
#include <config.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/Mak=
efile.in
--- a/head/contrib/bind9/lib/dns/include/Makefile.in Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/include/Makefile.in Tue Apr 17 11:51:51 20=
12 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.15 2007-06-19 23:47:16 tbox Exp $
+# $Id: Makefile.in,v 1.15 2007/06/19 23:47:16 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/Makefile.in
--- a/head/contrib/bind9/lib/dns/include/dns/Makefile.in Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/Makefile.in Tue Apr 17 11:51:5=
1 2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2004, 2007-2009, 2011 Internet Systems Consortium, Inc. (=
"ISC")
+# Copyright (C) 2004, 2007-2009, 2011, 2012 Internet Systems Consortium, =
Inc. ("ISC")
# Copyright (C) 1998-2003 Internet Software Consortium.
#
# Permission to use, copy, modify, and/or distribute this software for any
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.57.296.2 2011-02-28 01:20:02 tbox Exp $
+# $Id$
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/acache.h
--- a/head/contrib/bind9/lib/dns/include/dns/acache.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/acache.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: acache.h,v 1.8 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: acache.h,v 1.8 2007/06/19 23:47:16 tbox Exp $ */
=20
#ifndef DNS_ACACHE_H
#define DNS_ACACHE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/acl.h
--- a/head/contrib/bind9/lib/dns/include/dns/acl.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/include/dns/acl.h Tue Apr 17 11:51:51 2012=
+0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2009, 2011 Internet Systems Consortium, Inc. =
("ISC")
+ * Copyright (C) 2004-2007, 2009, 2011, 2012 Internet Systems Consortium,=
Inc. ("ISC")
* Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: acl.h,v 1.33.426.2 2011-06-17 23:47:11 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_ACL_H
#define DNS_ACL_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/adb.h
--- a/head/contrib/bind9/lib/dns/include/dns/adb.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/include/dns/adb.h Tue Apr 17 11:51:51 2012=
+0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2008 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2008, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: adb.h,v 1.85 2008-04-03 06:09:04 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_ADB_H
#define DNS_ADB_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/bit.h
--- a/head/contrib/bind9/lib/dns/include/dns/bit.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/include/dns/bit.h Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: bit.h,v 1.14 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: bit.h,v 1.14 2007/06/19 23:47:16 tbox Exp $ */
=20
#ifndef DNS_BIT_H
#define DNS_BIT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/byaddr.h
--- a/head/contrib/bind9/lib/dns/include/dns/byaddr.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/byaddr.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: byaddr.h,v 1.22 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: byaddr.h,v 1.22 2007/06/19 23:47:16 tbox Exp $ */
=20
#ifndef DNS_BYADDR_H
#define DNS_BYADDR_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/cache.h
--- a/head/contrib/bind9/lib/dns/include/dns/cache.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/cache.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2009, 2011 Internet Systems Consortium, Inc. =
("ISC")
+ * Copyright (C) 2004-2007, 2009, 2011, 2012 Internet Systems Consortium,=
Inc. ("ISC")
* Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: cache.h,v 1.28.428.2 2011-03-03 23:47:09 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_CACHE_H
#define DNS_CACHE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/callbacks.h
--- a/head/contrib/bind9/lib/dns/include/dns/callbacks.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/callbacks.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2007, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: callbacks.h,v 1.24 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_CALLBACKS_H
#define DNS_CALLBACKS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/cert.h
--- a/head/contrib/bind9/lib/dns/include/dns/cert.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/cert.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: cert.h,v 1.19 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: cert.h,v 1.19 2007/06/19 23:47:16 tbox Exp $ */
=20
#ifndef DNS_CERT_H
#define DNS_CERT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/client.h
--- a/head/contrib/bind9/lib/dns/include/dns/client.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/client.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: client.h,v 1.3 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: client.h,v 1.3 2009/09/02 23:48:02 tbox Exp $ */
=20
#ifndef DNS_CLIENT_H
#define DNS_CLIENT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/compress.h
--- a/head/contrib/bind9/lib/dns/include/dns/compress.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/compress.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: compress.h,v 1.42 2009-01-17 23:47:43 tbox Exp $ */
+/* $Id: compress.h,v 1.42 2009/01/17 23:47:43 tbox Exp $ */
=20
#ifndef DNS_COMPRESS_H
#define DNS_COMPRESS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/db.h
--- a/head/contrib/bind9/lib/dns/include/dns/db.h Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/dns/include/dns/db.h Tue Apr 17 11:51:51 2012 =
+0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: db.h,v 1.104.8.1 2011-05-19 04:42:51 each Exp $ */
+/* $Id$ */
=20
#ifndef DNS_DB_H
#define DNS_DB_H 1
@@ -177,7 +177,8 @@
dns_zone_t *zone, dns_db_t *db,
dns_dbversion_t *version,
dns_rdataset_t *ardataset,
- dns_rpz_st_t *st);
+ dns_rpz_st_t *st,
+ dns_name_t *query_qname);
} dns_dbmethods_t;
=20
typedef isc_result_t
@@ -1509,7 +1510,8 @@
isc_result_t
dns_db_rpz_findips(dns_rpz_zone_t *rpz, dns_rpz_type_t rpz_type,
dns_zone_t *zone, dns_db_t *db, dns_dbversion_t *version,
- dns_rdataset_t *ardataset, dns_rpz_st_t *st);
+ dns_rdataset_t *ardataset, dns_rpz_st_t *st,
+ dns_name_t *query_qname);
/*%<
* Search the CDIR block tree of a response policy tree of trees for the b=
est
* match to any of the IP addresses in an A or AAAA rdataset.
@@ -1522,6 +1524,10 @@
* \li 'ardataset' is an A or AAAA rdataset of addresses to check
* \li 'found' specifies the previous best match if any or
* or NULL, an empty name, 0, DNS_RPZ_POLICY_MISS, and 0
+ *
+ * Returns:
+ * \li #ISC_R_SUCCESS
+ * \li #ISC_R_UNEXPECTED
*/
=20
ISC_LANG_ENDDECLS
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/dbiterator.h
--- a/head/contrib/bind9/lib/dns/include/dns/dbiterator.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/dbiterator.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dbiterator.h,v 1.25 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: dbiterator.h,v 1.25 2007/06/19 23:47:16 tbox Exp $ */
=20
#ifndef DNS_DBITERATOR_H
#define DNS_DBITERATOR_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/dbtable.h
--- a/head/contrib/bind9/lib/dns/include/dns/dbtable.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/dbtable.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dbtable.h,v 1.23 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: dbtable.h,v 1.23 2007/06/19 23:47:16 tbox Exp $ */
=20
#ifndef DNS_DBTABLE_H
#define DNS_DBTABLE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/diff.h
--- a/head/contrib/bind9/lib/dns/include/dns/diff.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/diff.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: diff.h,v 1.19 2010-06-04 23:51:14 tbox Exp $ */
+/* $Id: diff.h,v 1.19 2010/06/04 23:51:14 tbox Exp $ */
=20
#ifndef DNS_DIFF_H
#define DNS_DIFF_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/dispatch.h
--- a/head/contrib/bind9/lib/dns/include/dns/dispatch.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/dispatch.h Tue Apr 17 11:51:51=
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dispatch.h,v 1.62 2009-01-27 23:47:54 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_DISPATCH_H
#define DNS_DISPATCH_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/dlz.h
--- a/head/contrib/bind9/lib/dns/include/dns/dlz.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/include/dns/dlz.h Tue Apr 17 11:51:51 2012=
+0300
@@ -1,5 +1,5 @@
/*
- * Portions Copyright (C) 2005-2007, 2009-2011 Internet Systems Consortiu=
m, Inc. ("ISC")
+ * Portions Copyright (C) 2005-2007, 2009-2012 Internet Systems Consortiu=
m, Inc. ("ISC")
* Portions Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -50,7 +50,7 @@
* USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dlz.h,v 1.12.14.2 2011-03-17 23:47:06 tbox Exp $ */
+/* $Id$ */
=20
/*! \file dns/dlz.h */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/dlz_dlopen.h
--- a/head/contrib/bind9/lib/dns/include/dns/dlz_dlopen.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/dlz_dlopen.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2011, 2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dlz_dlopen.h,v 1.2.2.2 2011-03-17 09:41:07 fdupont Exp $ */
+/* $Id$ */
=20
/*! \file dns/dlz_open.h */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/dns64.h
--- a/head/contrib/bind9/lib/dns/include/dns/dns64.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/dns64.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dns64.h,v 1.3 2010-12-08 23:51:56 tbox Exp $ */
+/* $Id: dns64.h,v 1.3 2010/12/08 23:51:56 tbox Exp $ */
=20
#ifndef DNS_DNS64_H
#define DNS_DNS64_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/dnssec.h
--- a/head/contrib/bind9/lib/dns/include/dns/dnssec.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/dnssec.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2009-2011 Internet Systems Consortium, Inc. (=
"ISC")
+ * Copyright (C) 2004-2007, 2009-2012 Internet Systems Consortium, Inc. (=
"ISC")
* Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dnssec.h,v 1.42.178.2 2011-05-06 23:47:05 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_DNSSEC_H
#define DNS_DNSSEC_H 1
@@ -32,6 +32,9 @@
=20
ISC_LANG_BEGINDECLS
=20
+/*%< Maximum number of keys supported in a zone. */
+#define DNS_MAXZONEKEYS 32
+
/*
* Indicates how the signer found this key: in the key repository, at the
* zone apex, or specified by the user.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/ds.h
--- a/head/contrib/bind9/lib/dns/include/dns/ds.h Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/dns/include/dns/ds.h Tue Apr 17 11:51:51 2012 =
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ds.h,v 1.12 2010-12-23 23:47:08 tbox Exp $ */
+/* $Id: ds.h,v 1.12 2010/12/23 23:47:08 tbox Exp $ */
=20
#ifndef DNS_DS_H
#define DNS_DS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/ecdb.h
--- a/head/contrib/bind9/lib/dns/include/dns/ecdb.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/ecdb.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ecdb.h,v 1.3 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: ecdb.h,v 1.3 2009/09/02 23:48:02 tbox Exp $ */
=20
#ifndef DNS_ECDB_H
#define DNS_ECDB_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/events.h
--- a/head/contrib/bind9/lib/dns/include/dns/events.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/events.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2009, 2010 Internet Systems Consortium, Inc. =
("ISC")
+ * Copyright (C) 2004-2007, 2009, 2010, 2012 Internet Systems Consortium,=
Inc. ("ISC")
* Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: events.h,v 1.56 2010-12-21 03:11:42 marka Exp $ */
+/* $Id$ */
=20
#ifndef DNS_EVENTS_H
#define DNS_EVENTS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/fixedname.h
--- a/head/contrib/bind9/lib/dns/include/dns/fixedname.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/fixedname.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: fixedname.h,v 1.19 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: fixedname.h,v 1.19 2007/06/19 23:47:16 tbox Exp $ */
=20
#ifndef DNS_FIXEDNAME_H
#define DNS_FIXEDNAME_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/forward.h
--- a/head/contrib/bind9/lib/dns/include/dns/forward.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/forward.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: forward.h,v 1.13 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: forward.h,v 1.13 2009/09/02 23:48:02 tbox Exp $ */
=20
#ifndef DNS_FORWARD_H
#define DNS_FORWARD_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/iptable.h
--- a/head/contrib/bind9/lib/dns/include/dns/iptable.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/iptable.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: iptable.h,v 1.4 2007-09-14 01:46:05 marka Exp $ */
+/* $Id: iptable.h,v 1.4 2007/09/14 01:46:05 marka Exp $ */
=20
#ifndef DNS_IPTABLE_H
#define DNS_IPTABLE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/journal.h
--- a/head/contrib/bind9/lib/dns/include/dns/journal.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/journal.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: journal.h,v 1.37 2009-11-04 23:48:18 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_JOURNAL_H
#define DNS_JOURNAL_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/keydata.h
--- a/head/contrib/bind9/lib/dns/include/dns/keydata.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/keydata.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: keydata.h,v 1.2 2009-06-30 02:52:32 each Exp $ */
+/* $Id: keydata.h,v 1.2 2009/06/30 02:52:32 each Exp $ */
=20
#ifndef DNS_KEYDATA_H
#define DNS_KEYDATA_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/keyflags.h
--- a/head/contrib/bind9/lib/dns/include/dns/keyflags.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/keyflags.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: keyflags.h,v 1.16 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: keyflags.h,v 1.16 2007/06/19 23:47:16 tbox Exp $ */
=20
#ifndef DNS_KEYFLAGS_H
#define DNS_KEYFLAGS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/keytable.h
--- a/head/contrib/bind9/lib/dns/include/dns/keytable.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/keytable.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: keytable.h,v 1.23 2010-06-25 03:24:05 marka Exp $ */
+/* $Id: keytable.h,v 1.23 2010/06/25 03:24:05 marka Exp $ */
=20
#ifndef DNS_KEYTABLE_H
#define DNS_KEYTABLE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/keyvalues.h
--- a/head/contrib/bind9/lib/dns/include/dns/keyvalues.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/keyvalues.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: keyvalues.h,v 1.29 2010-12-23 23:47:08 tbox Exp $ */
+/* $Id: keyvalues.h,v 1.29 2010/12/23 23:47:08 tbox Exp $ */
=20
#ifndef DNS_KEYVALUES_H
#define DNS_KEYVALUES_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/lib.h
--- a/head/contrib/bind9/lib/dns/include/dns/lib.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/include/dns/lib.h Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lib.h,v 1.18 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: lib.h,v 1.18 2009/09/02 23:48:02 tbox Exp $ */
=20
#ifndef DNS_LIB_H
#define DNS_LIB_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/log.h
--- a/head/contrib/bind9/lib/dns/include/dns/log.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/include/dns/log.h Tue Apr 17 11:51:51 2012=
+0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2007, 2009, 2011, 2012 Internet Systems Consortium,=
Inc. ("ISC")
* Copyright (C) 1999-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: log.h,v 1.45 2009-12-18 22:16:49 each Exp $ */
+/* $Id$ */
=20
/*! \file dns/log.h
* \author Principal Authors: DCL */
@@ -42,6 +42,7 @@
#define DNS_LOGCATEGORY_LAME_SERVERS (&dns_categories[9])
#define DNS_LOGCATEGORY_DELEGATION_ONLY (&dns_categories[10])
#define DNS_LOGCATEGORY_EDNS_DISABLED (&dns_categories[11])
+#define DNS_LOGCATEGORY_RPZ (&dns_categories[12])
=20
/* Backwards compatibility. */
#define DNS_LOGCATEGORY_GENERAL ISC_LOGCATEGORY_GENERAL
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/lookup.h
--- a/head/contrib/bind9/lib/dns/include/dns/lookup.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/lookup.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lookup.h,v 1.14 2009-01-17 23:47:43 tbox Exp $ */
+/* $Id: lookup.h,v 1.14 2009/01/17 23:47:43 tbox Exp $ */
=20
#ifndef DNS_LOOKUP_H
#define DNS_LOOKUP_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/master.h
--- a/head/contrib/bind9/lib/dns/include/dns/master.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/master.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: master.h,v 1.53 2009-07-01 23:47:36 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_MASTER_H
#define DNS_MASTER_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/masterdump.h
--- a/head/contrib/bind9/lib/dns/include/dns/masterdump.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/masterdump.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2008, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2008, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: masterdump.h,v 1.42.524.2 2011-05-28 00:27:48 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_MASTERDUMP_H
#define DNS_MASTERDUMP_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/message.h
--- a/head/contrib/bind9/lib/dns/include/dns/message.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/message.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2010 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2010, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: message.h,v 1.132 2010-03-04 23:50:34 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_MESSAGE_H
#define DNS_MESSAGE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/name.h
--- a/head/contrib/bind9/lib/dns/include/dns/name.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/name.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: name.h,v 1.137 2011-01-13 04:59:26 tbox Exp $ */
+/* $Id: name.h,v 1.137 2011/01/13 04:59:26 tbox Exp $ */
=20
#ifndef DNS_NAME_H
#define DNS_NAME_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/ncache.h
--- a/head/contrib/bind9/lib/dns/include/dns/ncache.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/ncache.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ncache.h,v 1.29 2010-05-14 23:50:40 tbox Exp $ */
+/* $Id: ncache.h,v 1.29 2010/05/14 23:50:40 tbox Exp $ */
=20
#ifndef DNS_NCACHE_H
#define DNS_NCACHE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/nsec.h
--- a/head/contrib/bind9/lib/dns/include/dns/nsec.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/nsec.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2008 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2008, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: nsec.h,v 1.12 2008-09-25 04:02:39 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_NSEC_H
#define DNS_NSEC_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/nsec3.h
--- a/head/contrib/bind9/lib/dns/include/dns/nsec3.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/nsec3.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2008-2010 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2008-2010, 2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: nsec3.h,v 1.12 2010-05-18 02:38:10 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_NSEC3_H
#define DNS_NSEC3_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/opcode.h
--- a/head/contrib/bind9/lib/dns/include/dns/opcode.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/opcode.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: opcode.h,v 1.8 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: opcode.h,v 1.8 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef DNS_OPCODE_H
#define DNS_OPCODE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/order.h
--- a/head/contrib/bind9/lib/dns/include/dns/order.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/order.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: order.h,v 1.9 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: order.h,v 1.9 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef DNS_ORDER_H
#define DNS_ORDER_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/peer.h
--- a/head/contrib/bind9/lib/dns/include/dns/peer.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/peer.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: peer.h,v 1.35 2009-01-17 23:47:43 tbox Exp $ */
+/* $Id: peer.h,v 1.35 2009/01/17 23:47:43 tbox Exp $ */
=20
#ifndef DNS_PEER_H
#define DNS_PEER_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/portlist.h
--- a/head/contrib/bind9/lib/dns/include/dns/portlist.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/portlist.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: portlist.h,v 1.9 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: portlist.h,v 1.9 2007/06/19 23:47:17 tbox Exp $ */
=20
/*! \file dns/portlist.h */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/private.h
--- a/head/contrib/bind9/lib/dns/include/dns/private.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/private.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009, 2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: private.h,v 1.3 2009-10-09 23:48:09 tbox Exp $ */
+/* $Id$ */
=20
#include <isc/lang.h>
#include <isc/types.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/rbt.h
--- a/head/contrib/bind9/lib/dns/include/dns/rbt.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/include/dns/rbt.h Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rbt.h,v 1.77 2009-11-04 01:18:19 marka Exp $ */
+/* $Id: rbt.h,v 1.77 2009/11/04 01:18:19 marka Exp $ */
=20
#ifndef DNS_RBT_H
#define DNS_RBT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/rcode.h
--- a/head/contrib/bind9/lib/dns/include/dns/rcode.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/rcode.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rcode.h,v 1.21 2008-09-25 04:02:39 tbox Exp $ */
+/* $Id: rcode.h,v 1.21 2008/09/25 04:02:39 tbox Exp $ */
=20
#ifndef DNS_RCODE_H
#define DNS_RCODE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/rdata.h
--- a/head/contrib/bind9/lib/dns/include/dns/rdata.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/rdata.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1998-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rdata.h,v 1.77 2009-12-04 21:09:33 marka Exp $ */
+/* $Id$ */
=20
#ifndef DNS_RDATA_H
#define DNS_RDATA_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/rdataclass.h
--- a/head/contrib/bind9/lib/dns/include/dns/rdataclass.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/rdataclass.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rdataclass.h,v 1.24 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: rdataclass.h,v 1.24 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef DNS_RDATACLASS_H
#define DNS_RDATACLASS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/rdatalist.h
--- a/head/contrib/bind9/lib/dns/include/dns/rdatalist.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/rdatalist.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rdatalist.h,v 1.22 2008-04-03 06:09:05 tbox Exp $ */
+/* $Id: rdatalist.h,v 1.22 2008/04/03 06:09:05 tbox Exp $ */
=20
#ifndef DNS_RDATALIST_H
#define DNS_RDATALIST_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/rdataset.h
--- a/head/contrib/bind9/lib/dns/include/dns/rdataset.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/rdataset.h Tue Apr 17 11:51:51=
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rdataset.h,v 1.69.148.3 2011-06-08 23:02:43 each Exp $ */
+/* $Id$ */
=20
#ifndef DNS_RDATASET_H
#define DNS_RDATASET_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/rdatasetiter.h
--- a/head/contrib/bind9/lib/dns/include/dns/rdatasetiter.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/rdatasetiter.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rdatasetiter.h,v 1.21 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: rdatasetiter.h,v 1.21 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef DNS_RDATASETITER_H
#define DNS_RDATASETITER_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/rdataslab.h
--- a/head/contrib/bind9/lib/dns/include/dns/rdataslab.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/rdataslab.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rdataslab.h,v 1.33 2008-04-01 23:47:10 tbox Exp $ */
+/* $Id: rdataslab.h,v 1.33 2008/04/01 23:47:10 tbox Exp $ */
=20
#ifndef DNS_RDATASLAB_H
#define DNS_RDATASLAB_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/rdatatype.h
--- a/head/contrib/bind9/lib/dns/include/dns/rdatatype.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/rdatatype.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rdatatype.h,v 1.26 2008-09-25 04:02:39 tbox Exp $ */
+/* $Id: rdatatype.h,v 1.26 2008/09/25 04:02:39 tbox Exp $ */
=20
#ifndef DNS_RDATATYPE_H
#define DNS_RDATATYPE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/request.h
--- a/head/contrib/bind9/lib/dns/include/dns/request.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/request.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: request.h,v 1.31 2010-03-04 23:50:34 tbox Exp $ */
+/* $Id: request.h,v 1.31 2010/03/04 23:50:34 tbox Exp $ */
=20
#ifndef DNS_REQUEST_H
#define DNS_REQUEST_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/resolver.h
--- a/head/contrib/bind9/lib/dns/include/dns/resolver.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/resolver.h Tue Apr 17 11:51:51=
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: resolver.h,v 1.67.86.2 2011-02-28 01:20:02 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_RESOLVER_H
#define DNS_RESOLVER_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/result.h
--- a/head/contrib/bind9/lib/dns/include/dns/result.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/result.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1998-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: result.h,v 1.122 2011-01-11 23:47:13 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_RESULT_H
#define DNS_RESULT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/rootns.h
--- a/head/contrib/bind9/lib/dns/include/dns/rootns.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/rootns.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rootns.h,v 1.16 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: rootns.h,v 1.16 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef DNS_ROOTNS_H
#define DNS_ROOTNS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/rpz.h
--- a/head/contrib/bind9/lib/dns/include/dns/rpz.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/include/dns/rpz.h Tue Apr 17 11:51:51 2012=
+0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2011, 2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rpz.h,v 1.3 2011-01-13 04:59:26 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_RPZ_H
#define DNS_RPZ_H 1
@@ -37,21 +37,24 @@
DNS_RPZ_TYPE_BAD,
DNS_RPZ_TYPE_QNAME,
DNS_RPZ_TYPE_IP,
- DNS_RPZ_TYPE_NSIP,
- DNS_RPZ_TYPE_NSDNAME
+ DNS_RPZ_TYPE_NSDNAME,
+ DNS_RPZ_TYPE_NSIP
} dns_rpz_type_t;
=20
/*
- * Require DNS_RPZ_POLICY_NO_OP < DNS_RPZ_POLICY_NXDOMAIN <
- * DNS_RPZ_POLICY_NODATA < DNS_RPZ_POLICY_CNAME.
+ * Require DNS_RPZ_POLICY_PASSTHRU < DNS_RPZ_POLICY_NXDOMAIN <
+ * DNS_RPZ_POLICY_NODATA < DNS_RPZ_POLICY_CNAME to choose among competing
+ * policies.
*/
typedef enum {
- DNS_RPZ_POLICY_GIVEN =3D 0, /* 'given': what something else says */
- DNS_RPZ_POLICY_NO_OP =3D 1, /* 'no-op': do not rewrite */
- DNS_RPZ_POLICY_NXDOMAIN =3D 2, /* 'nxdomain': answer with NXDOMAIN */
- DNS_RPZ_POLICY_NODATA =3D 3, /* 'nodata': answer with ANCOUNT=3D0 */
- DNS_RPZ_POLICY_CNAME =3D 4, /* 'cname x': answer with x's rrsets */
- DNS_RPZ_POLICY_RECORD =3D 5,
+ DNS_RPZ_POLICY_GIVEN =3D 0, /* 'given': what policy record says */
+ DNS_RPZ_POLICY_DISABLED =3D 1, /* 'cname x': answer with x's rrsets */
+ DNS_RPZ_POLICY_PASSTHRU =3D 2, /* 'passthru': do not rewrite */
+ DNS_RPZ_POLICY_NXDOMAIN =3D 3, /* 'nxdomain': answer with NXDOMAIN */
+ DNS_RPZ_POLICY_NODATA =3D 4, /* 'nodata': answer with ANCOUNT=3D0 */
+ DNS_RPZ_POLICY_CNAME =3D 5, /* 'cname x': answer with x's rrsets */
+ DNS_RPZ_POLICY_RECORD,
+ DNS_RPZ_POLICY_WILDCNAME,
DNS_RPZ_POLICY_MISS,
DNS_RPZ_POLICY_ERROR
} dns_rpz_policy_t;
@@ -65,10 +68,9 @@
ISC_LINK(dns_rpz_zone_t) link;
int num;
dns_name_t origin; /* Policy zone name */
- dns_name_t nsdname; /* RPZ_NSDNAME_ZONE.origin */
- dns_rpz_policy_t policy; /* RPZ_POLICY_GIVEN or override */
- dns_name_t cname; /* override name for
- RPZ_POLICY_CNAME */
+ dns_name_t nsdname; /* DNS_RPZ_NSDNAME_ZONE.origin */
+ dns_rpz_policy_t policy; /* DNS_RPZ_POLICY_GIVEN or override */
+ dns_name_t cname; /* override value for ..._CNAME */
};
=20
/*
@@ -82,13 +84,15 @@
typedef struct {
unsigned int state;
# define DNS_RPZ_REWRITTEN 0x0001
-# define DNS_RPZ_DONE_QNAME 0x0002
-# define DNS_RPZ_DONE_A 0x0004
-# define DNS_RPZ_RECURSING 0x0008
-# define DNS_RPZ_HAVE_IP 0x0010
-# define DNS_RPZ_HAVE_NSIPv4 0x0020
-# define DNS_RPZ_HAVE_NSIPv6 0x0040
-# define DNS_RPZ_HAD_NSDNAME 0x0080
+# define DNS_RPZ_DONE_QNAME 0x0002 /* qname checked */
+# define DNS_RPZ_DONE_QNAME_IP 0x0004 /* IP addresses of qname checked */
+# define DNS_RPZ_DONE_NSDNAME 0x0008 /* NS name missed; checking addresses=
*/
+# define DNS_RPZ_DONE_IPv4 0x0010
+# define DNS_RPZ_RECURSING 0x0020
+# define DNS_RPZ_HAVE_IP 0x0040 /* a policy zone has IP addresses */
+# define DNS_RPZ_HAVE_NSIPv4 0x0080 /* IPv4 NISP addresses */
+# define DNS_RPZ_HAVE_NSIPv6 0x0100 /* IPv6 NISP addresses */
+# define DNS_RPZ_HAVE_NSDNAME 0x0200 /* NS names */
/*
* Best match so far.
*/
@@ -101,11 +105,12 @@
isc_result_t result;
dns_zone_t *zone;
dns_db_t *db;
+ dns_dbversion_t *version;
dns_dbnode_t *node;
dns_rdataset_t *rdataset;
} m;
/*
- * State for chasing NS names and addresses including recursion.
+ * State for chasing IP addresses and NS names including recursion.
*/
struct {
unsigned int label;
@@ -114,7 +119,7 @@
dns_rdatatype_t r_type;
isc_result_t r_result;
dns_rdataset_t *r_rdataset;
- } ns;
+ } r;
/*
* State of real query while recursing for NSIP or NSDNAME.
*/
@@ -146,6 +151,7 @@
#define DNS_RPZ_INFO_LEVEL ISC_LOG_INFO
#define DNS_RPZ_DEBUG_LEVEL1 ISC_LOG_DEBUG(1)
#define DNS_RPZ_DEBUG_LEVEL2 ISC_LOG_DEBUG(2)
+#define DNS_RPZ_DEBUG_LEVEL3 ISC_LOG_DEBUG(3)
=20
const char *
dns_rpz_type2str(dns_rpz_type_t type);
@@ -153,6 +159,9 @@
dns_rpz_policy_t
dns_rpz_str2policy(const char *str);
=20
+const char *
+dns_rpz_policy2str(dns_rpz_policy_t policy);
+
void
dns_rpz_set_need(isc_boolean_t need);
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/rriterator.h
--- a/head/contrib/bind9/lib/dns/include/dns/rriterator.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/rriterator.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009, 2011, 2012 Internet Systems Consortium, Inc. ("ISC=
")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rriterator.h,v 1.2 2009-06-30 02:52:32 each Exp $ */
+/* $Id$ */
=20
#ifndef DNS_RRITERATOR_H
#define DNS_RRITERATOR_H 1
@@ -77,26 +77,110 @@
isc_result_t
dns_rriterator_init(dns_rriterator_t *it, dns_db_t *db,
dns_dbversion_t *ver, isc_stdtime_t now);
+/*%
+ * Initialize an rriterator; sets the cursor to the origin node
+ * of the database.
+ *
+ * Requires:
+ *
+ * \li 'db' is a valid database.
+ *
+ * Returns:
+ *
+ * \li #ISC_R_SUCCESS
+ * \li #ISC_R_NOMEMORY
+ */
=20
isc_result_t
dns_rriterator_first(dns_rriterator_t *it);
+/*%<
+ * Move the rriterator cursor to the first rdata in the database.
+ *
+ * Requires:
+ *\li 'it' is a valid, initialized rriterator
+ *
+ * Returns:
+ *\li #ISC_R_SUCCESS
+ *\li #ISC_R_NOMORE There are no rdata in the set.
+ */
=20
isc_result_t
dns_rriterator_nextrrset(dns_rriterator_t *it);
+/*%<
+ * Move the rriterator cursor to the next rrset in the database,
+ * skipping over any remaining records that have the same rdatatype
+ * as the current one.
+ *
+ * Requires:
+ *\li 'it' is a valid, initialized rriterator
+ *
+ * Returns:
+ *\li #ISC_R_SUCCESS
+ *\li #ISC_R_NOMORE No more rrsets in the database
+ */
=20
isc_result_t
dns_rriterator_next(dns_rriterator_t *it);
+/*%<
+ * Move the rriterator cursor to the next rrset in the database,
+ * skipping over any remaining records that have the same rdatatype
+ * as the current one.
+ *
+ * Requires:
+ *\li 'it' is a valid, initialized rriterator
+ *
+ * Returns:
+ *\li #ISC_R_SUCCESS
+ *\li #ISC_R_NOMORE No more records in the database
+ */
=20
void
dns_rriterator_current(dns_rriterator_t *it, dns_name_t **name,
isc_uint32_t *ttl, dns_rdataset_t **rdataset,
dns_rdata_t **rdata);
+/*%<
+ * Make '*name' refer to the current name. If 'rdataset' is not NULL,
+ * make '*rdataset' refer to the current * rdataset. If '*rdata' is not
+ * NULL, make '*rdata' refer to the current record.
+ *
+ * Requires:
+ *\li '*name' is a valid name object
+ *\li 'rdataset' is NULL or '*rdataset' is NULL
+ *\li 'rdata' is NULL or '*rdata' is NULL
+ *
+ * Ensures:
+ *\li 'rdata' refers to the rdata at the rdata cursor location of
+ *\li 'rdataset'.
+ */
=20
void
dns_rriterator_pause(dns_rriterator_t *it);
+/*%<
+ * Pause rriterator. Frees any locks held by the database iterator.
+ * Callers should use this routine any time they are not going to
+ * execute another rriterator method in the immediate future.
+ *
+ * Requires:
+ *\li 'it' is a valid iterator.
+ *
+ * Ensures:
+ *\li Any database locks being held for efficiency of iterator access are
+ * released.
+ */
=20
void
dns_rriterator_destroy(dns_rriterator_t *it);
+/*%<
+ * Shut down and free resources in rriterator 'it'.
+ *
+ * Requires:
+ *
+ *\li 'it' is a valid iterator.
+ *
+ * Ensures:
+ *
+ *\li All resources used by the rriterator are freed.
+ */
=20
ISC_LANG_ENDDECLS
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/sdb.h
--- a/head/contrib/bind9/lib/dns/include/dns/sdb.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/include/dns/sdb.h Tue Apr 17 11:51:51 2012=
+0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2007, 2009, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 2000, 2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sdb.h,v 1.23 2009-01-17 23:47:43 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_SDB_H
#define DNS_SDB_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/sdlz.h
--- a/head/contrib/bind9/lib/dns/include/dns/sdlz.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/sdlz.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,5 +1,5 @@
/*
- * Portions Copyright (C) 2005-2007, 2009-2011 Internet Systems Consortiu=
m, Inc. ("ISC")
+ * Portions Copyright (C) 2005-2007, 2009-2012 Internet Systems Consortiu=
m, Inc. ("ISC")
* Portions Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -50,7 +50,7 @@
* USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sdlz.h,v 1.14.8.2 2011-03-17 23:47:06 tbox Exp $ */
+/* $Id$ */
=20
/*! \file dns/sdlz.h */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/secalg.h
--- a/head/contrib/bind9/lib/dns/include/dns/secalg.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/secalg.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: secalg.h,v 1.21 2009-10-12 23:48:02 tbox Exp $ */
+/* $Id: secalg.h,v 1.21 2009/10/12 23:48:02 tbox Exp $ */
=20
#ifndef DNS_SECALG_H
#define DNS_SECALG_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/secproto.h
--- a/head/contrib/bind9/lib/dns/include/dns/secproto.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/secproto.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: secproto.h,v 1.16 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: secproto.h,v 1.16 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef DNS_SECPROTO_H
#define DNS_SECPROTO_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/soa.h
--- a/head/contrib/bind9/lib/dns/include/dns/soa.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/include/dns/soa.h Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: soa.h,v 1.12 2009-09-10 01:47:09 each Exp $ */
+/* $Id: soa.h,v 1.12 2009/09/10 01:47:09 each Exp $ */
=20
#ifndef DNS_SOA_H
#define DNS_SOA_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/ssu.h
--- a/head/contrib/bind9/lib/dns/include/dns/ssu.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/include/dns/ssu.h Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ssu.h,v 1.28 2011-01-06 23:47:00 tbox Exp $ */
+/* $Id: ssu.h,v 1.28 2011/01/06 23:47:00 tbox Exp $ */
=20
#ifndef DNS_SSU_H
#define DNS_SSU_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/stats.h
--- a/head/contrib/bind9/lib/dns/include/dns/stats.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/stats.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 2000, 2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: stats.h,v 1.20 2009-01-27 23:47:54 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_STATS_H
#define DNS_STATS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/tcpmsg.h
--- a/head/contrib/bind9/lib/dns/include/dns/tcpmsg.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/tcpmsg.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: tcpmsg.h,v 1.22 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: tcpmsg.h,v 1.22 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef DNS_TCPMSG_H
#define DNS_TCPMSG_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/time.h
--- a/head/contrib/bind9/lib/dns/include/dns/time.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/time.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2007, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: time.h,v 1.17 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_TIME_H
#define DNS_TIME_H 1
@@ -67,6 +67,12 @@
* current date is chosen.
*/
=20
+isc_int64_t
+dns_time64_from32(isc_uint32_t value);
+/*%<
+ * Covert a 32-bit cyclic time value into a 64 bit time stamp.
+ */
+
ISC_LANG_ENDDECLS
=20
#endif /* DNS_TIME_H */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/timer.h
--- a/head/contrib/bind9/lib/dns/include/dns/timer.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/timer.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: timer.h,v 1.9 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: timer.h,v 1.9 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef DNS_TIMER_H
#define DNS_TIMER_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/tkey.h
--- a/head/contrib/bind9/lib/dns/include/dns/tkey.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/tkey.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: tkey.h,v 1.32 2011-01-08 23:47:01 tbox Exp $ */
+/* $Id: tkey.h,v 1.32 2011/01/08 23:47:01 tbox Exp $ */
=20
#ifndef DNS_TKEY_H
#define DNS_TKEY_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/tsec.h
--- a/head/contrib/bind9/lib/dns/include/dns/tsec.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/tsec.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: tsec.h,v 1.6 2010-12-09 00:54:34 marka Exp $ */
+/* $Id: tsec.h,v 1.6 2010/12/09 00:54:34 marka Exp $ */
=20
#ifndef DNS_TSEC_H
#define DNS_TSEC_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/tsig.h
--- a/head/contrib/bind9/lib/dns/include/dns/tsig.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/tsig.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: tsig.h,v 1.59 2011-01-11 23:47:13 tbox Exp $ */
+/* $Id: tsig.h,v 1.59 2011/01/11 23:47:13 tbox Exp $ */
=20
#ifndef DNS_TSIG_H
#define DNS_TSIG_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/ttl.h
--- a/head/contrib/bind9/lib/dns/include/dns/ttl.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/include/dns/ttl.h Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ttl.h,v 1.19 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: ttl.h,v 1.19 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef DNS_TTL_H
#define DNS_TTL_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/types.h
--- a/head/contrib/bind9/lib/dns/include/dns/types.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/types.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2010 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2010, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1998-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: types.h,v 1.143 2010-12-08 02:46:16 marka Exp $ */
+/* $Id$ */
=20
#ifndef DNS_TYPES_H
#define DNS_TYPES_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/validator.h
--- a/head/contrib/bind9/lib/dns/include/dns/validator.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/validator.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: validator.h,v 1.46 2010-02-25 05:08:01 tbox Exp $ */
+/* $Id: validator.h,v 1.46 2010/02/25 05:08:01 tbox Exp $ */
=20
#ifndef DNS_VALIDATOR_H
#define DNS_VALIDATOR_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/version.h
--- a/head/contrib/bind9/lib/dns/include/dns/version.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/version.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: version.h,v 1.9 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: version.h,v 1.9 2007/06/19 23:47:17 tbox Exp $ */
=20
/*! \file dns/version.h */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/view.h
--- a/head/contrib/bind9/lib/dns/include/dns/view.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/view.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: view.h,v 1.132 2011-01-13 01:59:28 marka Exp $ */
+/* $Id$ */
=20
#ifndef DNS_VIEW_H
#define DNS_VIEW_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/xfrin.h
--- a/head/contrib/bind9/lib/dns/include/dns/xfrin.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/xfrin.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: xfrin.h,v 1.30 2009-01-17 23:47:43 tbox Exp $ */
+/* $Id: xfrin.h,v 1.30 2009/01/17 23:47:43 tbox Exp $ */
=20
#ifndef DNS_XFRIN_H
#define DNS_XFRIN_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/zone.h
--- a/head/contrib/bind9/lib/dns/include/dns/zone.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/zone.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: zone.h,v 1.182.16.2 2011-07-08 23:47:16 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_ZONE_H
#define DNS_ZONE_H 1
@@ -1570,6 +1570,32 @@
*\li 'local' to be a valid sockaddr.
*/
=20
+isc_boolean_t
+dns_zonemgr_unreachable(dns_zonemgr_t *zmgr, isc_sockaddr_t *remote,
+ isc_sockaddr_t *local, isc_time_t *now);
+/*%<
+ * Returns ISC_TRUE if the given local/remote address pair
+ * is found in the zone maanger's unreachable cache.
+ *
+ * Requires:
+ *\li 'zmgr' to be a valid zone manager.
+ *\li 'remote' to be a valid sockaddr.
+ *\li 'local' to be a valid sockaddr.
+ *\li 'now' !=3D NULL
+ */
+
+void
+dns_zonemgr_unreachabledel(dns_zonemgr_t *zmgr, isc_sockaddr_t *remote,
+ isc_sockaddr_t *local);
+/*%<
+ * Remove the pair of addresses from the unreachable cache.
+ *
+ * Requires:
+ *\li 'zmgr' to be a valid zone manager.
+ *\li 'remote' to be a valid sockaddr.
+ *\li 'local' to be a valid sockaddr.
+ */
+
void
dns_zone_forcereload(dns_zone_t *zone);
/*%<
@@ -1865,6 +1891,13 @@
* Load the origin names for a writeable DLZ database.
*/
=20
+isc_result_t
+dns_zone_synckeyzone(dns_zone_t *zone);
+/*%
+ * Force the managed key zone to synchronize, and start the key
+ * maintenance timer.
+ */
+
ISC_LANG_ENDDECLS
=20
#endif /* DNS_ZONE_H */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/zonekey.h
--- a/head/contrib/bind9/lib/dns/include/dns/zonekey.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dns/zonekey.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: zonekey.h,v 1.10 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: zonekey.h,v 1.10 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef DNS_ZONEKEY_H
#define DNS_ZONEKEY_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dns=
/zt.h
--- a/head/contrib/bind9/lib/dns/include/dns/zt.h Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/dns/include/dns/zt.h Tue Apr 17 11:51:51 2012 =
+0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2007, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: zt.h,v 1.38 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_ZT_H
#define DNS_ZT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dst=
/Makefile.in
--- a/head/contrib/bind9/lib/dns/include/dst/Makefile.in Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dst/Makefile.in Tue Apr 17 11:51:5=
1 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.4 2007-12-11 20:28:55 marka Exp $
+# $Id: Makefile.in,v 1.4 2007/12/11 20:28:55 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dst=
/dst.h
--- a/head/contrib/bind9/lib/dns/include/dst/dst.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/include/dst/dst.h Tue Apr 17 11:51:51 2012=
+0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 2000-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dst.h,v 1.31.10.1 2011-03-21 19:53:35 each Exp $ */
+/* $Id$ */
=20
#ifndef DST_DST_H
#define DST_DST_H 1
@@ -641,6 +641,9 @@
dns_keytag_t
dst_key_id(const dst_key_t *key);
=20
+dns_keytag_t
+dst_key_rid(const dst_key_t *key);
+
dns_rdataclass_t
dst_key_class(const dst_key_t *key);
=20
@@ -706,9 +709,11 @@
=20
isc_uint16_t
dst_region_computeid(const isc_region_t *source, unsigned int alg);
+isc_uint16_t
+dst_region_computerid(const isc_region_t *source, unsigned int alg);
/*%<
- * Computes the key id of the key stored in the provided region with the
- * given algorithm.
+ * Computes the (revoked) key id of the key stored in the provided
+ * region with the given algorithm.
*
* Requires:
*\li "source" contains a valid, non-NULL region.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dst=
/gssapi.h
--- a/head/contrib/bind9/lib/dns/include/dst/gssapi.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dst/gssapi.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: gssapi.h,v 1.16 2011-01-08 23:47:01 tbox Exp $ */
+/* $Id: gssapi.h,v 1.16 2011/01/08 23:47:01 tbox Exp $ */
=20
#ifndef DST_GSSAPI_H
#define DST_GSSAPI_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dst=
/lib.h
--- a/head/contrib/bind9/lib/dns/include/dst/lib.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/include/dst/lib.h Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lib.h,v 1.7 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: lib.h,v 1.7 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef DST_LIB_H
#define DST_LIB_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/include/dst=
/result.h
--- a/head/contrib/bind9/lib/dns/include/dst/result.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/include/dst/result.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: result.h,v 1.9 2008-04-01 23:47:10 tbox Exp $ */
+/* $Id: result.h,v 1.9 2008/04/01 23:47:10 tbox Exp $ */
=20
#ifndef DST_RESULT_H
#define DST_RESULT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/iptable.c
--- a/head/contrib/bind9/lib/dns/iptable.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/iptable.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: iptable.c,v 1.15 2009-02-18 23:47:48 tbox Exp $ */
+/* $Id: iptable.c,v 1.15 2009/02/18 23:47:48 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/journal.c
--- a/head/contrib/bind9/lib/dns/journal.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/journal.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007-2011 Internet Systems Consortium, Inc. =
("ISC")
+ * Copyright (C) 2004, 2005, 2007-2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: journal.c,v 1.112.38.2 2011-03-12 04:59:17 tbox Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/key.c
--- a/head/contrib/bind9/lib/dns/key.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/key.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2007, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: key.c,v 1.8 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
@@ -56,6 +56,33 @@
return ((isc_uint16_t)(ac & 0xffff));
}
=20
+isc_uint16_t
+dst_region_computerid(const isc_region_t *source, unsigned int alg) {
+ isc_uint32_t ac;
+ const unsigned char *p;
+ int size;
+
+ REQUIRE(source !=3D NULL);
+ REQUIRE(source->length >=3D 4);
+
+ p =3D source->base;
+ size =3D source->length;
+
+ if (alg =3D=3D DST_ALG_RSAMD5)
+ return ((p[size - 3] << 8) + p[size - 2]);
+
+ ac =3D ((*p) << 8) + *(p + 1);
+ ac |=3D DNS_KEYFLAG_REVOKE;
+ for (size -=3D 2, p +=3D2; size > 1; size -=3D 2, p +=3D 2)
+ ac +=3D ((*p) << 8) + *(p + 1);
+
+ if (size > 0)
+ ac +=3D ((*p) << 8);
+ ac +=3D (ac >> 16) & 0xffff;
+
+ return ((isc_uint16_t)(ac & 0xffff));
+}
+
dns_name_t *
dst_key_name(const dst_key_t *key) {
REQUIRE(VALID_KEY(key));
@@ -92,6 +119,12 @@
return (key->key_id);
}
=20
+dns_keytag_t
+dst_key_rid(const dst_key_t *key) {
+ REQUIRE(VALID_KEY(key));
+ return (key->key_rid);
+}
+
dns_rdataclass_t
dst_key_class(const dst_key_t *key) {
REQUIRE(VALID_KEY(key));
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/keydata.c
--- a/head/contrib/bind9/lib/dns/keydata.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/keydata.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: keydata.c,v 1.3 2009-07-01 23:47:36 tbox Exp $ */
+/* $Id: keydata.c,v 1.3 2009/07/01 23:47:36 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/keytable.c
--- a/head/contrib/bind9/lib/dns/keytable.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/keytable.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: keytable.c,v 1.41 2010-06-25 23:46:51 tbox Exp $ */
+/* $Id: keytable.c,v 1.41 2010/06/25 23:46:51 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/lib.c
--- a/head/contrib/bind9/lib/dns/lib.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/lib.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lib.c,v 1.19 2009-09-03 00:12:23 each Exp $ */
+/* $Id: lib.c,v 1.19 2009/09/03 00:12:23 each Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/log.c
--- a/head/contrib/bind9/lib/dns/log.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/log.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2007, 2009, 2011, 2012 Internet Systems Consortium,=
Inc. ("ISC")
* Copyright (C) 1999-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: log.c,v 1.47 2009-12-18 23:49:03 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -44,6 +44,7 @@
{ "lame-servers", 0 },
{ "delegation-only", 0 },
{ "edns-disabled", 0 },
+ { "rpz", 0 },
{ NULL, 0 }
};
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/lookup.c
--- a/head/contrib/bind9/lib/dns/lookup.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/lookup.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lookup.c,v 1.21 2007-06-18 23:47:40 tbox Exp $ */
+/* $Id: lookup.c,v 1.21 2007/06/18 23:47:40 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/master.c
--- a/head/contrib/bind9/lib/dns/master.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/master.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: master.c,v 1.178.346.2 2011-03-12 04:59:17 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -2257,14 +2257,14 @@
if (rdcount > rdata_size) {
dns_rdata_t *new_rdata =3D NULL;
=20
- new_rdata =3D grow_rdata(rdata_size + RDSZ, rdata,
+ new_rdata =3D grow_rdata(rdcount + RDSZ, rdata,
rdata_size, &head,
&dummy, mctx);
if (new_rdata =3D=3D NULL) {
result =3D ISC_R_NOMEMORY;
goto cleanup;
}
- rdata_size +=3D RDSZ;
+ rdata_size =3D rdcount + RDSZ;
rdata =3D new_rdata;
}
=20
@@ -2687,6 +2687,7 @@
}
while ((this =3D ISC_LIST_HEAD(save)) !=3D NULL) {
ISC_LIST_UNLINK(save, this, link);
+ INSIST(rdlcount < new_len);
new[rdlcount] =3D *this;
ISC_LIST_APPEND(*current, &new[rdlcount], link);
rdlcount++;
@@ -2699,6 +2700,7 @@
}
while ((this =3D ISC_LIST_HEAD(save)) !=3D NULL) {
ISC_LIST_UNLINK(save, this, link);
+ INSIST(rdlcount < new_len);
new[rdlcount] =3D *this;
ISC_LIST_APPEND(*glue, &new[rdlcount], link);
rdlcount++;
@@ -2742,6 +2744,7 @@
}
while ((rdata =3D ISC_LIST_HEAD(save)) !=3D NULL) {
ISC_LIST_UNLINK(save, rdata, link);
+ INSIST(rdcount < new_len);
new[rdcount] =3D *rdata;
ISC_LIST_APPEND(this->rdata, &new[rdcount], link);
rdcount++;
@@ -2761,13 +2764,14 @@
}
while ((rdata =3D ISC_LIST_HEAD(save)) !=3D NULL) {
ISC_LIST_UNLINK(save, rdata, link);
+ INSIST(rdcount < new_len);
new[rdcount] =3D *rdata;
ISC_LIST_APPEND(this->rdata, &new[rdcount], link);
rdcount++;
}
this =3D ISC_LIST_NEXT(this, link);
}
- INSIST(rdcount =3D=3D old_len);
+ INSIST(rdcount =3D=3D old_len || rdcount =3D=3D 0);
if (old !=3D NULL)
isc_mem_put(mctx, old, old_len * sizeof(*old));
return (new);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/masterdump.c
--- a/head/contrib/bind9/lib/dns/masterdump.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/masterdump.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: masterdump.c,v 1.99.258.7 2011-06-08 23:02:42 each Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -416,12 +416,11 @@
=20
rdataset->attributes |=3D DNS_RDATASETATTR_LOADORDER;
result =3D dns_rdataset_first(rdataset);
- REQUIRE(result =3D=3D ISC_R_SUCCESS);
=20
current_ttl =3D ctx->current_ttl;
current_ttl_valid =3D ctx->current_ttl_valid;
=20
- do {
+ while (result =3D=3D ISC_R_SUCCESS) {
column =3D 0;
=20
/*
@@ -546,7 +545,7 @@
=20
first =3D ISC_FALSE;
result =3D dns_rdataset_next(rdataset);
- } while (result =3D=3D ISC_R_SUCCESS);
+ }
=20
if (result !=3D ISC_R_NOMORE)
return (result);
@@ -928,6 +927,7 @@
REQUIRE(buffer->length > 0);
REQUIRE(DNS_RDATASET_VALID(rdataset));
=20
+ rdataset->attributes |=3D DNS_RDATASETATTR_LOADORDER;
restart:
totallen =3D 0;
result =3D dns_rdataset_first(rdataset);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/message.c
--- a/head/contrib/bind9/lib/dns/message.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/message.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: message.c,v 1.254.114.3 2011-06-08 23:02:42 each Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/name.c
--- a/head/contrib/bind9/lib/dns/name.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/name.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1998-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: name.c,v 1.174.8.1 2011-03-11 06:47:04 marka Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/ncache.c
--- a/head/contrib/bind9/lib/dns/ncache.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/ncache.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2008, 2010, 2011 Internet Systems Cons=
ortium, Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2008, 2010-2012 Internet Systems Conso=
rtium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ncache.c,v 1.50.124.4 2011-06-08 23:02:42 each Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/nsec.c
--- a/head/contrib/bind9/lib/dns/nsec.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/nsec.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007-2009, 2011 Internet Systems Consortium,=
Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007-2009, 2011, 2012 Internet Systems Conso=
rtium, Inc. ("ISC")
* Copyright (C) 1999-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: nsec.c,v 1.13.428.2 2011-03-12 04:59:17 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/nsec3.c
--- a/head/contrib/bind9/lib/dns/nsec3.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/nsec3.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2006, 2008-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2006, 2008-2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: nsec3.c,v 1.19.24.3 2011-06-08 23:02:42 each Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
@@ -1784,7 +1784,7 @@
dst_key_t *key =3D NULL;
isc_buffer_t buffer;
isc_result_t result;
- isc_uint16_t bits, minbits =3D 4096;
+ unsigned int bits, minbits =3D 4096;
=20
result =3D dns_db_getoriginnode(db, &node);
if (result !=3D ISC_R_SUCCESS)
@@ -1811,7 +1811,7 @@
isc_buffer_add(&buffer, rdata.length);
CHECK(dst_key_fromdns(dns_db_origin(db), rdataset.rdclass,
&buffer, mctx, &key));
- bits =3D dst_key_getbits(key);
+ bits =3D dst_key_size(key);
dst_key_free(&key);
if (minbits > bits)
minbits =3D bits;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/openssl_lin=
k.c
--- a/head/contrib/bind9/lib/dns/openssl_link.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/dns/openssl_link.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -1,5 +1,5 @@
/*
- * Portions Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("I=
SC")
+ * Portions Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("I=
SC")
* Portions Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -31,7 +31,7 @@
=20
/*
* Principal Author: Brian Wellington
- * $Id: openssl_link.c,v 1.29.54.2 2011-03-12 04:59:17 tbox Exp $
+ * $Id$
*/
#ifdef OPENSSL
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/openssldh_l=
ink.c
--- a/head/contrib/bind9/lib/dns/openssldh_link.c Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/dns/openssldh_link.c Tue Apr 17 11:51:51 2012 =
+0300
@@ -31,7 +31,7 @@
=20
/*
* Principal Author: Brian Wellington
- * $Id: openssldh_link.c,v 1.20 2011-01-11 23:47:13 tbox Exp $
+ * $Id: openssldh_link.c,v 1.20 2011/01/11 23:47:13 tbox Exp $
*/
=20
#ifdef OPENSSL
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/openssldsa_=
link.c
--- a/head/contrib/bind9/lib/dns/openssldsa_link.c Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/openssldsa_link.c Tue Apr 17 11:51:51 2012=
+0300
@@ -1,5 +1,5 @@
/*
- * Portions Copyright (C) 2004-2009, 2011 Internet Systems Consortium, In=
c. ("ISC")
+ * Portions Copyright (C) 2004-2009, 2011, 2012 Internet Systems Consorti=
um, Inc. ("ISC")
* Portions Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -29,7 +29,7 @@
* IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: openssldsa_link.c,v 1.20.10.1 2011-03-11 06:47:04 marka Exp $ */
+/* $Id$ */
=20
#ifdef OPENSSL
#ifndef USE_EVP
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/opensslgost=
_link.c
--- a/head/contrib/bind9/lib/dns/opensslgost_link.c Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/opensslgost_link.c Tue Apr 17 11:51:51 201=
2 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: opensslgost_link.c,v 1.5 2011-01-19 23:47:12 tbox Exp $ */
+/* $Id: opensslgost_link.c,v 1.5 2011/01/19 23:47:12 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/opensslrsa_=
link.c
--- a/head/contrib/bind9/lib/dns/opensslrsa_link.c Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/dns/opensslrsa_link.c Tue Apr 17 11:51:51 2012=
+0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 2000-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -17,7 +17,7 @@
=20
/*
* Principal Author: Brian Wellington
- * $Id: opensslrsa_link.c,v 1.39.10.2 2011-03-11 02:57:35 marka Exp $
+ * $Id$
*/
#ifdef OPENSSL
#include <config.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/order.c
--- a/head/contrib/bind9/lib/dns/order.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/order.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: order.c,v 1.10 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: order.c,v 1.10 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/peer.c
--- a/head/contrib/bind9/lib/dns/peer.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/peer.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: peer.c,v 1.33 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: peer.c,v 1.33 2009/09/02 23:48:02 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/portlist.c
--- a/head/contrib/bind9/lib/dns/portlist.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/portlist.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: portlist.c,v 1.13 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: portlist.c,v 1.13 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/private.c
--- a/head/contrib/bind9/lib/dns/private.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/private.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009, 2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: private.c,v 1.3 2009-10-09 23:48:09 tbox Exp $ */
+/* $Id$ */
=20
#include "config.h"
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rbt.c
--- a/head/contrib/bind9/lib/dns/rbt.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rbt.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007-2009, 2011 Internet Systems Consortium,=
Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007-2009, 2011, 2012 Internet Systems Conso=
rtium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rbt.c,v 1.146.278.2 2011-03-12 04:59:17 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -1929,6 +1929,8 @@
sibling =3D RIGHT(parent);
}
=20
+ INSIST(sibling !=3D NULL);
+
if (IS_BLACK(LEFT(sibling)) &&
IS_BLACK(RIGHT(sibling))) {
MAKE_RED(sibling);
@@ -1965,6 +1967,8 @@
sibling =3D LEFT(parent);
}
=20
+ INSIST(sibling !=3D NULL);
+
if (IS_BLACK(LEFT(sibling)) &&
IS_BLACK(RIGHT(sibling))) {
MAKE_RED(sibling);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rbtdb.c
--- a/head/contrib/bind9/lib/dns/rbtdb.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rbtdb.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rbtdb.c,v 1.310.8.5.4.1 2011-11-16 09:32:08 marka Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -365,9 +365,12 @@
dns_db_secure
} dns_db_secure_t;
=20
+typedef struct dns_rbtdb dns_rbtdb_t;
+
typedef struct rbtdb_version {
/* Not locked */
rbtdb_serial_t serial;
+ dns_rbtdb_t * rbtdb;
/*
* Protected in the refcount routines.
* XXXJT: should we change the lock policy based on the refcount
@@ -392,7 +395,7 @@
=20
typedef ISC_LIST(rbtdb_version_t) rbtdb_versionlist_t;
=20
-typedef struct {
+struct dns_rbtdb {
/* Unlocked. */
dns_db_t common;
/* Locks the data in this struct */
@@ -452,7 +455,7 @@
=20
/* Unlocked */
unsigned int quantum;
-} dns_rbtdb_t;
+};
=20
#define RBTDB_ATTR_LOADED 0x01
#define RBTDB_ATTR_LOADING 0x02
@@ -1105,6 +1108,7 @@
version =3D allocate_version(rbtdb->common.mctx, rbtdb->next_serial, 1,
ISC_TRUE);
if (version !=3D NULL) {
+ version->rbtdb =3D rbtdb;
version->commit_ok =3D ISC_TRUE;
version->secure =3D rbtdb->current_version->secure;
version->havensec3 =3D rbtdb->current_version->havensec3;
@@ -1146,6 +1150,7 @@
unsigned int refs;
=20
REQUIRE(VALID_RBTDB(rbtdb));
+ INSIST(rbtversion !=3D NULL && rbtversion->rbtdb =3D=3D rbtdb);
=20
isc_refcount_increment(&rbtversion->references, &refs);
INSIST(refs > 1);
@@ -1603,14 +1608,14 @@
}
=20
/*
- * Caller must be holding the node lock if its reference must be protected
- * by the lock.
+ * Caller must be holding the node lock.
*/
static inline void
new_reference(dns_rbtdb_t *rbtdb, dns_rbtnode_t *node) {
unsigned int lockrefs, noderefs;
isc_refcount_t *lockref;
=20
+ INSIST(!ISC_LINK_LINKED(node, deadlink));
dns_rbtnode_refincrement0(node, &noderefs);
if (noderefs =3D=3D 1) { /* this is the first reference to the node */
lockref =3D &rbtdb->node_locks[node->locknum].references;
@@ -1634,33 +1639,43 @@
reactivate_node(dns_rbtdb_t *rbtdb, dns_rbtnode_t *node,
isc_rwlocktype_t treelocktype)
{
- isc_boolean_t need_relock =3D ISC_FALSE;
-
- NODE_STRONGLOCK(&rbtdb->node_locks[node->locknum].lock);
- new_reference(rbtdb, node);
-
- NODE_WEAKLOCK(&rbtdb->node_locks[node->locknum].lock,
- isc_rwlocktype_read);
- if (ISC_LINK_LINKED(node, deadlink))
- need_relock =3D ISC_TRUE;
- else if (!ISC_LIST_EMPTY(rbtdb->deadnodes[node->locknum]) &&
- treelocktype =3D=3D isc_rwlocktype_write)
- need_relock =3D ISC_TRUE;
- NODE_WEAKUNLOCK(&rbtdb->node_locks[node->locknum].lock,
- isc_rwlocktype_read);
- if (need_relock) {
- NODE_WEAKLOCK(&rbtdb->node_locks[node->locknum].lock,
- isc_rwlocktype_write);
+ isc_rwlocktype_t locktype =3D isc_rwlocktype_read;
+ nodelock_t *nodelock =3D &rbtdb->node_locks[node->locknum].lock;
+ isc_boolean_t maybe_cleanup =3D ISC_FALSE;
+
+ POST(locktype);
+
+ NODE_STRONGLOCK(nodelock);
+ NODE_WEAKLOCK(nodelock, locktype);
+
+ /*
+ * Check if we can possibly cleanup the dead node. If so, upgrade
+ * the node lock below to perform the cleanup.
+ */
+ if (!ISC_LIST_EMPTY(rbtdb->deadnodes[node->locknum]) &&
+ treelocktype =3D=3D isc_rwlocktype_write) {
+ maybe_cleanup =3D ISC_TRUE;
+ }
+
+ if (ISC_LINK_LINKED(node, deadlink) || maybe_cleanup) {
+ /*
+ * Upgrade the lock and test if we still need to unlink.
+ */
+ NODE_WEAKUNLOCK(nodelock, locktype);
+ locktype =3D isc_rwlocktype_write;
+ POST(locktype);
+ NODE_WEAKLOCK(nodelock, locktype);
if (ISC_LINK_LINKED(node, deadlink))
ISC_LIST_UNLINK(rbtdb->deadnodes[node->locknum],
node, deadlink);
- if (treelocktype =3D=3D isc_rwlocktype_write)
+ if (maybe_cleanup)
cleanup_dead_nodes(rbtdb, node->locknum);
- NODE_WEAKUNLOCK(&rbtdb->node_locks[node->locknum].lock,
- isc_rwlocktype_write);
- }
-
- NODE_STRONGUNLOCK(&rbtdb->node_locks[node->locknum].lock);
+ }
+
+ new_reference(rbtdb, node);
+
+ NODE_WEAKUNLOCK(nodelock, locktype);
+ NODE_STRONGUNLOCK(nodelock);
}
=20
/*
@@ -1684,7 +1699,7 @@
rbtdb_nodelock_t *nodelock;
unsigned int refs, nrefs;
int bucket =3D node->locknum;
- isc_boolean_t no_reference;
+ isc_boolean_t no_reference =3D ISC_TRUE;
=20
nodelock =3D &rbtdb->node_locks[bucket];
=20
@@ -1704,6 +1719,7 @@
NODE_WEAKUNLOCK(&nodelock->lock, isc_rwlocktype_read);
NODE_WEAKLOCK(&nodelock->lock, isc_rwlocktype_write);
}
+
dns_rbtnode_refdecrement(node, &nrefs);
INSIST((int)nrefs >=3D 0);
if (nrefs > 0) {
@@ -1713,7 +1729,7 @@
return (ISC_FALSE);
}
=20
- if (node->dirty && dns_rbtnode_refcurrent(node) =3D=3D 0) {
+ if (node->dirty) {
if (IS_CACHE(rbtdb))
clean_cache_node(rbtdb, node);
else {
@@ -1731,19 +1747,6 @@
}
}
=20
- isc_refcount_decrement(&nodelock->references, &refs);
- INSIST((int)refs >=3D 0);
-
- /*
- * XXXDCL should this only be done for cache zones?
- */
- if (node->data !=3D NULL || node->down !=3D NULL) {
- /* Restore the lock? */
- if (nlock =3D=3D isc_rwlocktype_read)
- NODE_WEAKDOWNGRADE(&nodelock->lock);
- return (ISC_TRUE);
- }
-
/*
* Attempt to switch to a write lock on the tree. If this fails,
* we will add this node to a linked list of nodes in this locking
@@ -1767,13 +1770,18 @@
} else
write_locked =3D ISC_TRUE;
=20
- no_reference =3D ISC_TRUE;
- if (write_locked && dns_rbtnode_refcurrent(node) =3D=3D 0) {
+ isc_refcount_decrement(&nodelock->references, &refs);
+ INSIST((int)refs >=3D 0);
+
+ /*
+ * XXXDCL should this only be done for cache zones?
+ */
+ if (node->data !=3D NULL || node->down !=3D NULL)
+ goto restore_locks;
+
+ if (write_locked) {
/*
- * We can now delete the node if the reference counter is
- * zero. This should be typically the case, but a different
- * thread may still gain a (new) reference just before the
- * current thread locks the tree (e.g., in findnode()).
+ * We can now delete the node.
*/
=20
/*
@@ -1825,6 +1833,7 @@
ISC_LOG_INFO,
"decrement_reference: failed to "
"allocate pruning event");
+ INSIST(node->data =3D=3D NULL);
INSIST(!ISC_LINK_LINKED(node, deadlink));
ISC_LIST_APPEND(rbtdb->deadnodes[bucket], node,
deadlink);
@@ -1847,12 +1856,13 @@
=20
delete_node(rbtdb, node);
}
- } else if (dns_rbtnode_refcurrent(node) =3D=3D 0) {
+ } else {
+ INSIST(node->data =3D=3D NULL);
INSIST(!ISC_LINK_LINKED(node, deadlink));
ISC_LIST_APPEND(rbtdb->deadnodes[bucket], node, deadlink);
- } else
- no_reference =3D ISC_FALSE;
-
+ }
+
+ restore_locks:
/* Restore the lock? */
if (nlock =3D=3D isc_rwlocktype_read)
NODE_WEAKDOWNGRADE(&nodelock->lock);
@@ -1919,11 +1929,10 @@
* from the list beforehand as we do in
* reactivate_node().
*/
- new_reference(rbtdb, parent);
- if (ISC_LINK_LINKED(parent, deadlink)) {
+ if (ISC_LINK_LINKED(parent, deadlink))
ISC_LIST_UNLINK(rbtdb->deadnodes[locknum],
parent, deadlink);
- }
+ new_reference(rbtdb, parent);
} else
parent =3D NULL;
=20
@@ -1998,9 +2007,9 @@
result =3D dns_db_findrdataset(db, origin, version, dns_rdatatype_dnskey,
0, 0, &keyset, NULL);
if (result =3D=3D ISC_R_SUCCESS) {
- dns_rdata_t keyrdata =3D DNS_RDATA_INIT;
result =3D dns_rdataset_first(&keyset);
while (result =3D=3D ISC_R_SUCCESS) {
+ dns_rdata_t keyrdata =3D DNS_RDATA_INIT;
dns_rdataset_current(&keyset, &keyrdata);
if (dns_zonekey_iszonekey(&keyrdata)) {
haszonekey =3D ISC_TRUE;
@@ -2182,6 +2191,7 @@
=20
REQUIRE(VALID_RBTDB(rbtdb));
version =3D (rbtdb_version_t *)*versionp;
+ INSIST(version->rbtdb =3D=3D rbtdb);
=20
cleanup_version =3D NULL;
ISC_LIST_INIT(cleanup_list);
@@ -2494,20 +2504,19 @@
}
=20
static isc_result_t
-findnode(dns_db_t *db, dns_name_t *name, isc_boolean_t create,
- dns_dbnode_t **nodep)
+findnodeintree(dns_rbtdb_t *rbtdb, dns_rbt_t *tree, dns_name_t *name,
+ isc_boolean_t create, dns_dbnode_t **nodep)
{
- dns_rbtdb_t *rbtdb =3D (dns_rbtdb_t *)db;
dns_rbtnode_t *node =3D NULL;
dns_name_t nodename;
isc_result_t result;
isc_rwlocktype_t locktype =3D isc_rwlocktype_read;
=20
- REQUIRE(VALID_RBTDB(rbtdb));
+ INSIST(tree =3D=3D rbtdb->tree || tree =3D=3D rbtdb->nsec3);
=20
dns_name_init(&nodename, NULL);
RWLOCK(&rbtdb->tree_lock, locktype);
- result =3D dns_rbt_findnode(rbtdb->tree, name, NULL, &node, NULL,
+ result =3D dns_rbt_findnode(tree, name, NULL, &node, NULL,
DNS_RBTFIND_EMPTYDATA, NULL, NULL);
if (result !=3D ISC_R_SUCCESS) {
RWUNLOCK(&rbtdb->tree_lock, locktype);
@@ -2523,10 +2532,10 @@
locktype =3D isc_rwlocktype_write;
RWLOCK(&rbtdb->tree_lock, locktype);
node =3D NULL;
- result =3D dns_rbt_addnode(rbtdb->tree, name, &node);
+ result =3D dns_rbt_addnode(tree, name, &node);
if (result =3D=3D ISC_R_SUCCESS) {
#ifdef BIND9
- if (rbtdb->rpz_cidr !=3D NULL) {
+ if (tree =3D=3D rbtdb->tree && rbtdb->rpz_cidr !=3D NULL) {
dns_fixedname_t fnamef;
dns_name_t *fname;
=20
@@ -2543,20 +2552,28 @@
node->locknum =3D dns_name_hash(&nodename, ISC_TRUE) %
rbtdb->node_lock_count;
#endif
- add_empty_wildcards(rbtdb, name);
-
- if (dns_name_iswildcard(name)) {
- result =3D add_wildcard_magic(rbtdb, name);
- if (result !=3D ISC_R_SUCCESS) {
- RWUNLOCK(&rbtdb->tree_lock, locktype);
- return (result);
+ if (tree =3D=3D rbtdb->tree) {
+ add_empty_wildcards(rbtdb, name);
+
+ if (dns_name_iswildcard(name)) {
+ result =3D add_wildcard_magic(rbtdb, name);
+ if (result !=3D ISC_R_SUCCESS) {
+ RWUNLOCK(&rbtdb->tree_lock, locktype);
+ return (result);
+ }
}
}
+ if (tree =3D=3D rbtdb->nsec3)
+ node->nsec =3D DNS_RBT_NSEC_NSEC3;
} else if (result !=3D ISC_R_EXISTS) {
RWUNLOCK(&rbtdb->tree_lock, locktype);
return (result);
}
}
+
+ if (tree =3D=3D rbtdb->nsec3)
+ INSIST(node->nsec =3D=3D DNS_RBT_NSEC_NSEC3);
+
reactivate_node(rbtdb, node, locktype);
RWUNLOCK(&rbtdb->tree_lock, locktype);
=20
@@ -2566,60 +2583,25 @@
}
=20
static isc_result_t
+findnode(dns_db_t *db, dns_name_t *name, isc_boolean_t create,
+ dns_dbnode_t **nodep)
+{
+ dns_rbtdb_t *rbtdb =3D (dns_rbtdb_t *)db;
+
+ REQUIRE(VALID_RBTDB(rbtdb));
+
+ return (findnodeintree(rbtdb, rbtdb->tree, name, create, nodep));
+}
+
+static isc_result_t
findnsec3node(dns_db_t *db, dns_name_t *name, isc_boolean_t create,
dns_dbnode_t **nodep)
{
dns_rbtdb_t *rbtdb =3D (dns_rbtdb_t *)db;
- dns_rbtnode_t *node =3D NULL;
- dns_name_t nodename;
- isc_result_t result;
- isc_rwlocktype_t locktype =3D isc_rwlocktype_read;
=20
REQUIRE(VALID_RBTDB(rbtdb));
=20
- dns_name_init(&nodename, NULL);
- RWLOCK(&rbtdb->tree_lock, locktype);
- result =3D dns_rbt_findnode(rbtdb->nsec3, name, NULL, &node, NULL,
- DNS_RBTFIND_EMPTYDATA, NULL, NULL);
- if (result !=3D ISC_R_SUCCESS) {
- RWUNLOCK(&rbtdb->tree_lock, locktype);
- if (!create) {
- if (result =3D=3D DNS_R_PARTIALMATCH)
- result =3D ISC_R_NOTFOUND;
- return (result);
- }
- /*
- * It would be nice to try to upgrade the lock instead of
- * unlocking then relocking.
- */
- locktype =3D isc_rwlocktype_write;
- RWLOCK(&rbtdb->tree_lock, locktype);
- node =3D NULL;
- result =3D dns_rbt_addnode(rbtdb->nsec3, name, &node);
- if (result =3D=3D ISC_R_SUCCESS) {
- dns_rbt_namefromnode(node, &nodename);
-#ifdef DNS_RBT_USEHASH
- node->locknum =3D node->hashval % rbtdb->node_lock_count;
-#else
- node->locknum =3D dns_name_hash(&nodename, ISC_TRUE) %
- rbtdb->node_lock_count;
-#endif
- node->nsec =3D DNS_RBT_NSEC_NSEC3;
- } else if (result !=3D ISC_R_EXISTS) {
- RWUNLOCK(&rbtdb->tree_lock, locktype);
- return (result);
- }
- } else {
- INSIST(node->nsec =3D=3D DNS_RBT_NSEC_NSEC3);
- }
- NODE_STRONGLOCK(&rbtdb->node_locks[node->locknum].lock);
- new_reference(rbtdb, node);
- NODE_STRONGUNLOCK(&rbtdb->node_locks[node->locknum].lock);
- RWUNLOCK(&rbtdb->tree_lock, locktype);
-
- *nodep =3D (dns_dbnode_t *)node;
-
- return (ISC_R_SUCCESS);
+ return (findnodeintree(rbtdb, rbtdb->nsec3, name, create, nodep));
}
=20
static isc_result_t
@@ -3649,6 +3631,8 @@
search.rbtdb =3D (dns_rbtdb_t *)db;
=20
REQUIRE(VALID_RBTDB(search.rbtdb));
+ INSIST(version =3D=3D NULL ||
+ ((rbtdb_version_t *)version)->rbtdb =3D=3D (dns_rbtdb_t *)db);
=20
/*
* We don't care about 'now'.
@@ -4580,15 +4564,19 @@
* Search the CDIR block tree of a response policy tree of trees for all of
* the IP addresses in an A or AAAA rdataset.
* Among the policies for all IPv4 and IPv6 addresses for a name, choose
- * the longest prefix. Among those with the longest prefix, the first
- * configured policy. Among answers for with the longest prefixes for
- * two or more IP addresses in the A and AAAA rdatasets the lexically
- * smallest address.
+ * the earliest configured policy,
+ * QNAME over IP over NSDNAME over NSIP,
+ * the longest prefix,
+ * the lexically smallest address.
+ * The caller must have already checked that any existing policy was not
+ * configured earlier than this policy zone and does not have a higher
+ * precedence type.
*/
static isc_result_t
rpz_findips(dns_rpz_zone_t *rpz, dns_rpz_type_t rpz_type,
dns_zone_t *zone, dns_db_t *db, dns_dbversion_t *version,
- dns_rdataset_t *ardataset, dns_rpz_st_t *st)
+ dns_rdataset_t *ardataset, dns_rpz_st_t *st,
+ dns_name_t *query_qname)
{
dns_rbtdb_t *rbtdb;
struct in_addr ina;
@@ -4609,8 +4597,6 @@
=20
if (rbtdb->rpz_cidr =3D=3D NULL) {
RWUNLOCK(&rbtdb->tree_lock, isc_rwlocktype_read);
- dns_db_detach(&db);
- dns_zone_detach(&zone);
return (ISC_R_UNEXPECTED);
}
=20
@@ -4645,17 +4631,19 @@
continue;
=20
/*
- * Choose the policy with the longest matching prefix.
- * Between policies with the same prefix, choose the first
- * configured.
+ * If we already have a rule, discard this new rule if
+ * is not better.
+ * The caller has checked that st->m.rpz->num > rpz->num
+ * or st->m.rpz->num =3D=3D rpz->num and st->m.type >=3D rpz_type
*/
- if (st->m.policy !=3D DNS_RPZ_POLICY_MISS) {
- if (prefix < st->m.prefix)
- continue;
- if (prefix =3D=3D st->m.prefix &&
- rpz->num > st->m.rpz->num)
- continue;
- }
+ if (st->m.policy !=3D DNS_RPZ_POLICY_MISS &&
+ st->m.rpz->num =3D=3D rpz->num &&
+ (st->m.type < rpz_type ||
+ (st->m.type =3D=3D rpz_type &&
+ (st->m.prefix > prefix ||
+ (st->m.prefix =3D=3D prefix &&
+ 0 > dns_name_rdatacompare(st->qname, qname))))))
+ continue;
=20
/*
* We have rpz_st an entry with a prefix at least as long as
@@ -4669,8 +4657,8 @@
char namebuf[DNS_NAME_FORMATSIZE];
=20
dns_name_format(qname, namebuf, sizeof(namebuf));
- isc_log_write(dns_lctx, DNS_LOGCATEGORY_DATABASE,
- DNS_LOGMODULE_CACHE, DNS_RPZ_ERROR_LEVEL,
+ isc_log_write(dns_lctx, DNS_LOGCATEGORY_RPZ,
+ DNS_LOGMODULE_RBTDB, DNS_RPZ_ERROR_LEVEL,
"rpz_findips findnode(%s): %s",
namebuf, isc_result_totext(result));
continue;
@@ -4694,7 +4682,8 @@
} else {
rpz_policy =3D dns_rpz_decode_cname(&zrdataset,
selfname);
- if (rpz_policy =3D=3D DNS_RPZ_POLICY_RECORD)
+ if (rpz_policy =3D=3D DNS_RPZ_POLICY_RECORD ||
+ rpz_policy =3D=3D DNS_RPZ_POLICY_WILDCNAME)
result =3D DNS_R_CNAME;
}
ttl =3D zrdataset.ttl;
@@ -4707,44 +4696,60 @@
/*
* Use an overriding action specified in the configuration file
*/
- if (rpz->policy !=3D DNS_RPZ_POLICY_GIVEN &&
- rpz_policy !=3D DNS_RPZ_POLICY_NO_OP)
+ if (rpz->policy !=3D DNS_RPZ_POLICY_GIVEN) {
+ /*
+ * only log DNS_RPZ_POLICY_DISABLED hits
+ */
+ if (rpz->policy =3D=3D DNS_RPZ_POLICY_DISABLED) {
+ if (isc_log_wouldlog(dns_lctx,
+ DNS_RPZ_INFO_LEVEL)) {
+ char qname_buf[DNS_NAME_FORMATSIZE];
+ char rpz_qname_buf[DNS_NAME_FORMATSIZE];
+ dns_name_format(query_qname, qname_buf,
+ sizeof(qname_buf));
+ dns_name_format(qname, rpz_qname_buf,
+ sizeof(rpz_qname_buf));
+
+ isc_log_write(dns_lctx,
+ DNS_LOGCATEGORY_RPZ,
+ DNS_LOGMODULE_RBTDB,
+ DNS_RPZ_INFO_LEVEL,
+ "disabled rpz %s %s rewrite"
+ " %s via %s",
+ dns_rpz_type2str(rpz_type),
+ dns_rpz_policy2str(rpz_policy),
+ qname_buf, rpz_qname_buf);
+ }
+ continue;
+ }
+
rpz_policy =3D rpz->policy;
-
- /*
- * We know the new prefix is at least as long as the current.
- * Prefer the new answer if the new prefix is longer.
- * Prefer the zone configured first if the prefixes are equal.
- * With two actions from the same zone, prefer the action
- * on the "smallest" name.
- */
- if (st->m.policy =3D=3D DNS_RPZ_POLICY_MISS ||
- prefix > st->m.prefix ||
- rpz->num <=3D st->m.rpz->num ||
- 0 > dns_name_compare(qname, st->qname)) {
- if (dns_rdataset_isassociated(st->m.rdataset))
- dns_rdataset_disassociate(st->m.rdataset);
- if (st->m.node !=3D NULL)
- dns_db_detachnode(st->m.db, &st->m.node);
- if (st->m.db !=3D NULL)
- dns_db_detach(&st->m.db);
- if (st->m.zone !=3D NULL)
- dns_zone_detach(&st->m.zone);
- st->m.rpz =3D rpz;
- st->m.type =3D rpz_type;
- st->m.prefix =3D prefix;
- st->m.policy =3D rpz_policy;
- st->m.ttl =3D ttl;
- st->m.result =3D result;
- dns_name_copy(qname, st->qname, NULL);
- if (rpz_policy =3D=3D DNS_RPZ_POLICY_RECORD &&
- result !=3D DNS_R_NXRRSET) {
- dns_rdataset_clone(&zrdataset,st->m.rdataset);
- dns_db_attachnode(db, node, &st->m.node);
- }
- dns_db_attach(db, &st->m.db);
- dns_zone_attach(zone, &st->m.zone);
- }
+ }
+
+ if (dns_rdataset_isassociated(st->m.rdataset))
+ dns_rdataset_disassociate(st->m.rdataset);
+ if (st->m.node !=3D NULL)
+ dns_db_detachnode(st->m.db, &st->m.node);
+ if (st->m.db !=3D NULL)
+ dns_db_detach(&st->m.db);
+ if (st->m.zone !=3D NULL)
+ dns_zone_detach(&st->m.zone);
+ st->m.rpz =3D rpz;
+ st->m.type =3D rpz_type;
+ st->m.prefix =3D prefix;
+ st->m.policy =3D rpz_policy;
+ st->m.ttl =3D ttl;
+ st->m.result =3D result;
+ dns_name_copy(qname, st->qname, NULL);
+ if ((rpz_policy =3D=3D DNS_RPZ_POLICY_RECORD ||
+ rpz_policy =3D=3D DNS_RPZ_POLICY_WILDCNAME) &&
+ result !=3D DNS_R_NXRRSET) {
+ dns_rdataset_clone(&zrdataset,st->m.rdataset);
+ dns_db_attachnode(db, node, &st->m.node);
+ }
+ dns_db_attach(db, &st->m.db);
+ st->m.version =3D version;
+ dns_zone_attach(zone, &st->m.zone);
if (dns_rdataset_isassociated(&zrdataset))
dns_rdataset_disassociate(&zrdataset);
}
@@ -5544,6 +5549,7 @@
=20
REQUIRE(VALID_RBTDB(rbtdb));
REQUIRE(type !=3D dns_rdatatype_any);
+ INSIST(rbtversion =3D=3D NULL || rbtversion->rbtdb =3D=3D rbtdb);
=20
if (rbtversion =3D=3D NULL) {
currentversion(db, (dns_dbversion_t **) (void *)(&rbtversion));
@@ -5732,6 +5738,8 @@
else {
unsigned int refs;
=20
+ INSIST(rbtversion->rbtdb =3D=3D rbtdb);
+
isc_refcount_increment(&rbtversion->references,
&refs);
INSIST(refs > 1);
@@ -6122,6 +6130,19 @@
addedrdataset);
return (ISC_R_SUCCESS);
}
+ /*
+ * If we have will be replacing a NS RRset force its TTL
+ * to be no more than the current NS RRset's TTL. This
+ * ensures the delegations that are withdrawn are honoured.
+ */
+ if (IS_CACHE(rbtdb) && header->rdh_ttl > now &&
+ header->type =3D=3D dns_rdatatype_ns &&
+ !header_nx && !newheader_nx &&
+ header->trust <=3D newheader->trust) {
+ if (newheader->rdh_ttl > header->rdh_ttl) {
+ newheader->rdh_ttl =3D header->rdh_ttl;
+ }
+ }
if (IS_CACHE(rbtdb) && header->rdh_ttl > now &&
(header->type =3D=3D dns_rdatatype_a ||
header->type =3D=3D dns_rdatatype_aaaa) &&
@@ -6401,6 +6422,7 @@
isc_boolean_t cache_is_overmem =3D ISC_FALSE;
=20
REQUIRE(VALID_RBTDB(rbtdb));
+ INSIST(rbtversion =3D=3D NULL || rbtversion->rbtdb =3D=3D rbtdb);
=20
if (rbtdb->common.methods =3D=3D &zone_methods)
REQUIRE(((rbtnode->nsec =3D=3D DNS_RBT_NSEC_NSEC3 &&
@@ -6417,8 +6439,7 @@
now =3D 0;
=20
result =3D dns_rdataslab_fromrdataset(rdataset, rbtdb->common.mctx,
- ®ion,
- sizeof(rdatasetheader_t));
+ ®ion, sizeof(rdatasetheader_t));
if (result !=3D ISC_R_SUCCESS)
return (result);
=20
@@ -6591,6 +6612,7 @@
rbtdb_changed_t *changed;
=20
REQUIRE(VALID_RBTDB(rbtdb));
+ REQUIRE(rbtversion !=3D NULL && rbtversion->rbtdb =3D=3D rbtdb);
=20
if (rbtdb->common.methods =3D=3D &zone_methods)
REQUIRE(((rbtnode->nsec =3D=3D DNS_RBT_NSEC_NSEC3 &&
@@ -6771,6 +6793,7 @@
rdatasetheader_t *newheader;
=20
REQUIRE(VALID_RBTDB(rbtdb));
+ INSIST(rbtversion =3D=3D NULL || rbtversion->rbtdb =3D=3D rbtdb);
=20
if (type =3D=3D dns_rdatatype_any)
return (ISC_R_NOTIMPLEMENTED);
@@ -7064,10 +7087,12 @@
dump(dns_db_t *db, dns_dbversion_t *version, const char *filename,
dns_masterformat_t masterformat) {
dns_rbtdb_t *rbtdb;
+ rbtdb_version_t *rbtversion =3D version;
=20
rbtdb =3D (dns_rbtdb_t *)db;
=20
REQUIRE(VALID_RBTDB(rbtdb));
+ INSIST(rbtversion =3D=3D NULL || rbtversion->rbtdb =3D=3D rbtdb);
=20
#ifdef BIND9
return (dns_master_dump2(rbtdb->common.mctx, db, version,
@@ -7206,6 +7231,7 @@
rbtdb =3D (dns_rbtdb_t *)db;
=20
REQUIRE(VALID_RBTDB(rbtdb));
+ INSIST(rbtversion =3D=3D NULL || rbtversion->rbtdb =3D=3D rbtdb);
=20
RWLOCK(&rbtdb->tree_lock, isc_rwlocktype_read);
=20
@@ -7335,11 +7361,16 @@
=20
REQUIRE(VALID_RBTDB(rbtdb));
REQUIRE(rdataset !=3D NULL);
+ REQUIRE(rdataset->methods =3D=3D &rdataset_methods);
REQUIRE(rbtdb->future_version =3D=3D rbtversion);
+ REQUIRE(rbtversion !=3D NULL);
REQUIRE(rbtversion->writer);
+ REQUIRE(rbtversion->rbtdb =3D=3D rbtdb);
=20
node =3D rdataset->private2;
+ INSIST(node !=3D NULL);
header =3D rdataset->private3;
+ INSIST(header !=3D NULL);
header--;
=20
RWLOCK(&rbtdb->tree_lock, isc_rwlocktype_write);
@@ -7750,6 +7781,7 @@
free_rbtdb(rbtdb, ISC_FALSE, NULL);
return (ISC_R_NOMEMORY);
}
+ rbtdb->current_version->rbtdb =3D rbtdb;
rbtdb->current_version->secure =3D dns_db_insecure;
rbtdb->current_version->havensec3 =3D ISC_FALSE;
rbtdb->current_version->flags =3D 0;
@@ -8480,7 +8512,7 @@
=20
static isc_result_t
dbiterator_seek(dns_dbiterator_t *iterator, dns_name_t *name) {
- isc_result_t result;
+ isc_result_t result, tresult;
rbtdb_dbiterator_t *rbtdbiter =3D (rbtdb_dbiterator_t *)iterator;
dns_rbtdb_t *rbtdb =3D (dns_rbtdb_t *)iterator->db;
dns_name_t *iname, *origin;
@@ -8523,13 +8555,14 @@
DNS_RBTFIND_EMPTYDATA, NULL, NULL);
if (result =3D=3D DNS_R_PARTIALMATCH) {
dns_rbtnode_t *node =3D NULL;
- result =3D dns_rbt_findnode(rbtdb->nsec3, name, NULL,
+ tresult =3D dns_rbt_findnode(rbtdb->nsec3, name, NULL,
&node, &rbtdbiter->nsec3chain,
DNS_RBTFIND_EMPTYDATA,
NULL, NULL);
- if (result =3D=3D ISC_R_SUCCESS) {
+ if (tresult =3D=3D ISC_R_SUCCESS) {
rbtdbiter->node =3D node;
rbtdbiter->current =3D &rbtdbiter->nsec3chain;
+ result =3D tresult;
}
}
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rbtdb.h
--- a/head/contrib/bind9/lib/dns/rbtdb.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rbtdb.h Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2011 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rbtdb.h,v 1.18.814.2 2011-03-03 23:47:09 tbox Exp $ */
+/* $Id$ */
=20
#ifndef DNS_RBTDB_H
#define DNS_RBTDB_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rbtdb64.c
--- a/head/contrib/bind9/lib/dns/rbtdb64.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rbtdb64.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rbtdb64.c,v 1.11 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: rbtdb64.c,v 1.11 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rbtdb64.h
--- a/head/contrib/bind9/lib/dns/rbtdb64.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rbtdb64.h Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rbtdb64.h,v 1.17 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: rbtdb64.h,v 1.17 2007/06/19 23:47:16 tbox Exp $ */
=20
#ifndef DNS_RBTDB64_H
#define DNS_RBTDB64_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rcode.c
--- a/head/contrib/bind9/lib/dns/rcode.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rcode.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1998-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rcode.c,v 1.16.14.2 2011-02-28 01:20:02 tbox Exp $ */
+/* $Id$ */
=20
#include <config.h>
#include <ctype.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata.c
--- a/head/contrib/bind9/lib/dns/rdata.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1998-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rdata.c,v 1.209.8.2 2011-03-11 06:47:05 marka Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -208,6 +208,10 @@
static isc_uint16_t
uint16_consume_fromregion(isc_region_t *region);
=20
+static isc_result_t
+unknown_totext(dns_rdata_t *rdata, dns_rdata_textctx_t *tctx,
+ isc_buffer_t *target);
+
static inline int
getquad(const void *src, struct in_addr *dst,
isc_lex_t *lexer, dns_rdatacallbacks_t *callbacks)
@@ -621,8 +625,7 @@
if (result !=3D ISC_R_SUCCESS) {
name =3D isc_lex_getsourcename(lexer);
line =3D isc_lex_getsourceline(lexer);
- fromtext_error(callback, callbacks, name, line,
- &token, result);
+ fromtext_error(callback, callbacks, name, line, NULL, result);
return (result);
}
=20
@@ -683,13 +686,53 @@
}
=20
static isc_result_t
+unknown_totext(dns_rdata_t *rdata, dns_rdata_textctx_t *tctx,
+ isc_buffer_t *target)
+{
+ isc_result_t result;
+ char buf[sizeof("65535")];
+ isc_region_t sr;
+
+ strlcpy(buf, "\\# ", sizeof(buf));
+ result =3D str_totext(buf, target);
+ if (result !=3D ISC_R_SUCCESS)
+ return (result);
+
+ dns_rdata_toregion(rdata, &sr);
+ INSIST(sr.length < 65536);
+ snprintf(buf, sizeof(buf), "%u", sr.length);
+ result =3D str_totext(buf, target);
+ if (result !=3D ISC_R_SUCCESS)
+ return (result);
+
+ if (sr.length !=3D 0U) {
+ if ((tctx->flags & DNS_STYLEFLAG_MULTILINE) !=3D 0)
+ result =3D str_totext(" ( ", target);
+ else
+ result =3D str_totext(" ", target);
+
+ if (result !=3D ISC_R_SUCCESS)
+ return (result);
+
+ if (tctx->width =3D=3D 0) /* No splitting */
+ result =3D isc_hex_totext(&sr, 0, "", target);
+ else
+ result =3D isc_hex_totext(&sr, tctx->width - 2,
+ tctx->linebreak,
+ target);
+ if (result =3D=3D ISC_R_SUCCESS &&
+ (tctx->flags & DNS_STYLEFLAG_MULTILINE) !=3D 0)
+ result =3D str_totext(" )", target);
+ }
+ return (result);
+}
+
+static isc_result_t
rdata_totext(dns_rdata_t *rdata, dns_rdata_textctx_t *tctx,
isc_buffer_t *target)
{
isc_result_t result =3D ISC_R_NOTIMPLEMENTED;
isc_boolean_t use_default =3D ISC_FALSE;
- char buf[sizeof("65535")];
- isc_region_t sr;
=20
REQUIRE(rdata !=3D NULL);
REQUIRE(tctx->origin =3D=3D NULL ||
@@ -705,28 +748,8 @@
=20
TOTEXTSWITCH
=20
- if (use_default) {
- strlcpy(buf, "\\# ", sizeof(buf));
- result =3D str_totext(buf, target);
- INSIST(result =3D=3D ISC_R_SUCCESS);
- dns_rdata_toregion(rdata, &sr);
- INSIST(sr.length < 65536);
- snprintf(buf, sizeof(buf), "%u", sr.length);
- result =3D str_totext(buf, target);
- if (sr.length !=3D 0 && result =3D=3D ISC_R_SUCCESS) {
- if ((tctx->flags & DNS_STYLEFLAG_MULTILINE) !=3D 0)
- result =3D str_totext(" ( ", target);
- else
- result =3D str_totext(" ", target);
- if (result =3D=3D ISC_R_SUCCESS)
- result =3D isc_hex_totext(&sr, tctx->width - 2,
- tctx->linebreak,
- target);
- if (result =3D=3D ISC_R_SUCCESS &&
- (tctx->flags & DNS_STYLEFLAG_MULTILINE) !=3D 0)
- result =3D str_totext(" )", target);
- }
- }
+ if (use_default)
+ result =3D unknown_totext(rdata, tctx, target);
=20
return (result);
}
@@ -1099,7 +1122,8 @@
}
escape =3D ISC_FALSE;
if (nrem =3D=3D 0)
- return (ISC_R_NOSPACE);
+ return ((tregion.length <=3D 256U) ?
+ ISC_R_NOSPACE : DNS_R_SYNTAX);
*t++ =3D c;
nrem--;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/any_2=
55/tsig_250.c
--- a/head/contrib/bind9/lib/dns/rdata/any_255/tsig_250.c Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/any_255/tsig_250.c Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2009 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2009, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: tsig_250.c,v 1.65 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id$ */
=20
/* Reviewed: Thu Mar 16 13:39:43 PST 2000 by gson */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/any_2=
55/tsig_250.h
--- a/head/contrib/bind9/lib/dns/rdata/any_255/tsig_250.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/any_255/tsig_250.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: tsig_250.h,v 1.25 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: tsig_250.h,v 1.25 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef ANY_255_TSIG_250_H
#define ANY_255_TSIG_250_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/ch_3/=
a_1.c
--- a/head/contrib/bind9/lib/dns/rdata/ch_3/a_1.c Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/dns/rdata/ch_3/a_1.c Tue Apr 17 11:51:51 2012 =
+0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: a_1.c,v 1.8 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: a_1.c,v 1.8 2009/12/04 22:06:37 tbox Exp $ */
=20
/* by Bjorn.Victor at it.uu.se, 2005-05-07 */
/* Based on generic/soa_6.c and generic/mx_15.c */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/ch_3/=
a_1.h
--- a/head/contrib/bind9/lib/dns/rdata/ch_3/a_1.h Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/dns/rdata/ch_3/a_1.h Tue Apr 17 11:51:51 2012 =
+0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: a_1.h,v 1.5 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: a_1.h,v 1.5 2007/06/19 23:47:17 tbox Exp $ */
=20
/* by Bjorn.Victor at it.uu.se, 2005-05-07 */
/* Based on generic/mx_15.h */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/afsdb_18.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/afsdb_18.c Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/afsdb_18.c Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: afsdb_18.c,v 1.49 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: afsdb_18.c,v 1.49 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Wed Mar 15 14:59:00 PST 2000 by explorer */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/afsdb_18.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/afsdb_18.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/afsdb_18.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_AFSDB_18_H
#define GENERIC_AFSDB_18_H 1
=20
-/* $Id: afsdb_18.h,v 1.20 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: afsdb_18.h,v 1.20 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \brief Per RFC1183 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/cert_37.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/cert_37.c Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/cert_37.c Tue Apr 17 11:51:5=
1 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2009 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2009, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: cert_37.c,v 1.52 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id$ */
=20
/* Reviewed: Wed Mar 15 21:14:32 EST 2000 by tale */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/cert_37.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/cert_37.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/cert_37.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: cert_37.h,v 1.20 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: cert_37.h,v 1.20 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef GENERIC_CERT_37_H
#define GENERIC_CERT_37_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/cname_5.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/cname_5.c Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/cname_5.c Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: cname_5.c,v 1.49 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: cname_5.c,v 1.49 2009/12/04 22:06:37 tbox Exp $ */
=20
/* reviewed: Wed Mar 15 16:48:45 PST 2000 by brister */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/cname_5.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/cname_5.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/cname_5.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: cname_5.h,v 1.26 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: cname_5.h,v 1.26 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef GENERIC_CNAME_5_H
#define GENERIC_CNAME_5_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/dlv_32769.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/dlv_32769.c Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/dlv_32769.c Tue Apr 17 11:51=
:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2006, 2007, 2009, 2010 Internet Systems Consortium=
, Inc. ("ISC")
+ * Copyright (C) 2004, 2006, 2007, 2009, 2010, 2012 Internet Systems Cons=
ortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dlv_32769.c,v 1.10 2010-12-23 23:47:08 tbox Exp $ */
+/* $Id$ */
=20
/* draft-ietf-dnsext-delegation-signer-05.txt */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/dlv_32769.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/dlv_32769.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/dlv_32769.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dlv_32769.h,v 1.5 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: dlv_32769.h,v 1.5 2007/06/19 23:47:17 tbox Exp $ */
=20
/* draft-ietf-dnsext-delegation-signer-05.txt */
#ifndef GENERIC_DLV_32769_H
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/dname_39.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/dname_39.c Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/dname_39.c Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dname_39.c,v 1.40 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: dname_39.c,v 1.40 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Wed Mar 15 16:52:38 PST 2000 by explorer */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/dname_39.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/dname_39.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/dname_39.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_DNAME_39_H
#define GENERIC_DNAME_39_H 1
=20
-/* $Id: dname_39.h,v 1.21 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: dname_39.h,v 1.21 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!=20
* \brief per RFC2672 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/dnskey_48.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/dnskey_48.c Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/dnskey_48.c Tue Apr 17 11:51=
:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2009 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2009, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dnskey_48.c,v 1.10 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id$ */
=20
/*
* Reviewed: Wed Mar 15 16:47:10 PST 2000 by halley.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/dnskey_48.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/dnskey_48.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/dnskey_48.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_DNSKEY_48_H
#define GENERIC_DNSKEY_48_H 1
=20
-/* $Id: dnskey_48.h,v 1.7 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: dnskey_48.h,v 1.7 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \brief per RFC2535 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/ds_43.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/ds_43.c Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/ds_43.c Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2009, 2010 Internet Systems Consortium=
, Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2009, 2010, 2012 Internet Systems Cons=
ortium, Inc. ("ISC")
* Copyright (C) 2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ds_43.c,v 1.16 2010-12-23 23:47:08 tbox Exp $ */
+/* $Id$ */
=20
/* draft-ietf-dnsext-delegation-signer-05.txt */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/ds_43.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/ds_43.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/ds_43.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ds_43.h,v 1.7 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: ds_43.h,v 1.7 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef GENERIC_DS_43_H
#define GENERIC_DS_43_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/gpos_27.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/gpos_27.c Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/gpos_27.c Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: gpos_27.c,v 1.43 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: gpos_27.c,v 1.43 2009/12/04 22:06:37 tbox Exp $ */
=20
/* reviewed: Wed Mar 15 16:48:45 PST 2000 by brister */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/gpos_27.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/gpos_27.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/gpos_27.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_GPOS_27_H
#define GENERIC_GPOS_27_H 1
=20
-/* $Id: gpos_27.h,v 1.17 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: gpos_27.h,v 1.17 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \brief per RFC1712 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/hinfo_13.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/hinfo_13.c Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/hinfo_13.c Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: hinfo_13.c,v 1.46 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: hinfo_13.c,v 1.46 2009/12/04 22:06:37 tbox Exp $ */
=20
/*
* Reviewed: Wed Mar 15 16:47:10 PST 2000 by halley.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/hinfo_13.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/hinfo_13.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/hinfo_13.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_HINFO_13_H
#define GENERIC_HINFO_13_H 1
=20
-/* $Id: hinfo_13.h,v 1.25 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: hinfo_13.h,v 1.25 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_hinfo {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/hip_55.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/hip_55.c Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/hip_55.c Tue Apr 17 11:51:51=
2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: hip_55.c,v 1.8 2011-01-13 04:59:26 tbox Exp $ */
+/* $Id: hip_55.c,v 1.8 2011/01/13 04:59:26 tbox Exp $ */
=20
/* reviewed: TBC */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/hip_55.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/hip_55.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/hip_55.h Tue Apr 17 11:51:51=
2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: hip_55.h,v 1.2 2009-02-26 06:09:19 marka Exp $ */
+/* $Id: hip_55.h,v 1.2 2009/02/26 06:09:19 marka Exp $ */
=20
#ifndef GENERIC_HIP_5_H
#define GENERIC_HIP_5_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/ipseckey_45.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/ipseckey_45.c Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/ipseckey_45.c Tue Apr 17 11:=
51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2005, 2007, 2009, 2011 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2005, 2007, 2009, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ipseckey_45.c,v 1.11 2011-01-13 04:59:26 tbox Exp $ */
+/* $Id$ */
=20
#ifndef RDATA_GENERIC_IPSECKEY_45_C
#define RDATA_GENERIC_IPSECKEY_45_C
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/ipseckey_45.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/ipseckey_45.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/ipseckey_45.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ipseckey_45.h,v 1.4 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: ipseckey_45.h,v 1.4 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef GENERIC_IPSECKEY_45_H
#define GENERIC_IPSECKEY_45_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/isdn_20.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/isdn_20.c Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/isdn_20.c Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: isdn_20.c,v 1.40 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: isdn_20.c,v 1.40 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Wed Mar 15 16:53:11 PST 2000 by bwelling */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/isdn_20.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/isdn_20.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/isdn_20.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_ISDN_20_H
#define GENERIC_ISDN_20_H 1
=20
-/* $Id: isdn_20.h,v 1.18 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: isdn_20.h,v 1.18 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \brief Per RFC1183 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/key_25.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/key_25.c Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/key_25.c Tue Apr 17 11:51:51=
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2009 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2009, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: key_25.c,v 1.53 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id$ */
=20
/*
* Reviewed: Wed Mar 15 16:47:10 PST 2000 by halley.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/key_25.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/key_25.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/key_25.h Tue Apr 17 11:51:51=
2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_KEY_25_H
#define GENERIC_KEY_25_H 1
=20
-/* $Id: key_25.h,v 1.19 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: key_25.h,v 1.19 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \brief Per RFC2535 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/keydata_65533.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/keydata_65533.c Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/keydata_65533.c Tue Apr 17 1=
1:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009, 2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: keydata_65533.c,v 1.3 2009-12-04 21:09:33 marka Exp $ */
+/* $Id$ */
=20
#ifndef GENERIC_KEYDATA_65533_C
#define GENERIC_KEYDATA_65533_C 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/keydata_65533.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/keydata_65533.h Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/keydata_65533.h Tue Apr 17 1=
1:51:51 2012 +0300
@@ -17,7 +17,7 @@
#ifndef GENERIC_KEYDATA_65533_H
#define GENERIC_KEYDATA_65533_H 1
=20
-/* $Id: keydata_65533.h,v 1.2 2009-06-30 02:52:32 each Exp $ */
+/* $Id: keydata_65533.h,v 1.2 2009/06/30 02:52:32 each Exp $ */
=20
typedef struct dns_rdata_keydata {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/loc_29.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/loc_29.c Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/loc_29.c Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: loc_29.c,v 1.50 2009-12-04 21:09:33 marka Exp $ */
+/* $Id: loc_29.c,v 1.50 2009/12/04 21:09:33 marka Exp $ */
=20
/* Reviewed: Wed Mar 15 18:13:09 PST 2000 by explorer */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/loc_29.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/loc_29.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/loc_29.h Tue Apr 17 11:51:51=
2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_LOC_29_H
#define GENERIC_LOC_29_H 1
=20
-/* $Id: loc_29.h,v 1.19 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: loc_29.h,v 1.19 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \brief Per RFC1876 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/mb_7.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/mb_7.c Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/mb_7.c Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: mb_7.c,v 1.47 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: mb_7.c,v 1.47 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Wed Mar 15 17:31:26 PST 2000 by bwelling */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/mb_7.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/mb_7.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/mb_7.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -19,7 +19,7 @@
#ifndef GENERIC_MB_7_H
#define GENERIC_MB_7_H 1
=20
-/* $Id: mb_7.h,v 1.27 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: mb_7.h,v 1.27 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_mb {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/md_3.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/md_3.c Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/md_3.c Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: md_3.c,v 1.49 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: md_3.c,v 1.49 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Wed Mar 15 17:48:20 PST 2000 by bwelling */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/md_3.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/md_3.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/md_3.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -19,7 +19,7 @@
#ifndef GENERIC_MD_3_H
#define GENERIC_MD_3_H 1
=20
-/* $Id: md_3.h,v 1.28 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: md_3.h,v 1.28 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_md {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/mf_4.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/mf_4.c Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/mf_4.c Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: mf_4.c,v 1.47 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: mf_4.c,v 1.47 2009/12/04 22:06:37 tbox Exp $ */
=20
/* reviewed: Wed Mar 15 17:47:33 PST 2000 by brister */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/mf_4.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/mf_4.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/mf_4.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -19,7 +19,7 @@
#ifndef GENERIC_MF_4_H
#define GENERIC_MF_4_H 1
=20
-/* $Id: mf_4.h,v 1.26 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: mf_4.h,v 1.26 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_mf {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/mg_8.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/mg_8.c Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/mg_8.c Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: mg_8.c,v 1.45 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: mg_8.c,v 1.45 2009/12/04 22:06:37 tbox Exp $ */
=20
/* reviewed: Wed Mar 15 17:49:21 PST 2000 by brister */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/mg_8.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/mg_8.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/mg_8.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -19,7 +19,7 @@
#ifndef GENERIC_MG_8_H
#define GENERIC_MG_8_H 1
=20
-/* $Id: mg_8.h,v 1.26 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: mg_8.h,v 1.26 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_mg {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/minfo_14.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/minfo_14.c Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/minfo_14.c Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: minfo_14.c,v 1.47 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: minfo_14.c,v 1.47 2009/12/04 22:06:37 tbox Exp $ */
=20
/* reviewed: Wed Mar 15 17:45:32 PST 2000 by brister */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/minfo_14.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/minfo_14.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/minfo_14.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -19,7 +19,7 @@
#ifndef GENERIC_MINFO_14_H
#define GENERIC_MINFO_14_H 1
=20
-/* $Id: minfo_14.h,v 1.27 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: minfo_14.h,v 1.27 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_minfo {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/mr_9.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/mr_9.c Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/mr_9.c Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: mr_9.c,v 1.44 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: mr_9.c,v 1.44 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Wed Mar 15 21:30:35 EST 2000 by tale */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/mr_9.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/mr_9.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/mr_9.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -19,7 +19,7 @@
#ifndef GENERIC_MR_9_H
#define GENERIC_MR_9_H 1
=20
-/* $Id: mr_9.h,v 1.26 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: mr_9.h,v 1.26 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_mr {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/mx_15.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/mx_15.c Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/mx_15.c Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: mx_15.c,v 1.58 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: mx_15.c,v 1.58 2009/12/04 22:06:37 tbox Exp $ */
=20
/* reviewed: Wed Mar 15 18:05:46 PST 2000 by brister */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/mx_15.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/mx_15.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/mx_15.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -19,7 +19,7 @@
#ifndef GENERIC_MX_15_H
#define GENERIC_MX_15_H 1
=20
-/* $Id: mx_15.h,v 1.29 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: mx_15.h,v 1.29 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_mx {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/ns_2.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/ns_2.c Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/ns_2.c Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ns_2.c,v 1.48 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: ns_2.c,v 1.48 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Wed Mar 15 18:15:00 PST 2000 by bwelling */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/ns_2.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/ns_2.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/ns_2.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -19,7 +19,7 @@
#ifndef GENERIC_NS_2_H
#define GENERIC_NS_2_H 1
=20
-/* $Id: ns_2.h,v 1.27 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: ns_2.h,v 1.27 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_ns {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/nsec3_50.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/nsec3_50.c Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/nsec3_50.c Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2008, 2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2008, 2009, 2012 Internet Systems Consortium, Inc. ("ISC=
")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: nsec3_50.c,v 1.7 2009-12-04 21:09:34 marka Exp $ */
+/* $Id$ */
=20
/*
* Copyright (C) 2004 Nominet, Ltd.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/nsec3_50.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/nsec3_50.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/nsec3_50.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2008 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2008, 2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -18,7 +18,7 @@
#ifndef GENERIC_NSEC3_50_H
#define GENERIC_NSEC3_50_H 1
=20
-/* $Id: nsec3_50.h,v 1.4 2008-09-25 04:02:39 tbox Exp $ */
+/* $Id$ */
=20
/*!
* \brief Per RFC 5155 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/nsec3param_51.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/nsec3param_51.c Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/nsec3param_51.c Tue Apr 17 1=
1:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: nsec3param_51.c,v 1.7 2009-12-04 21:09:34 marka Exp $ */
+/* $Id: nsec3param_51.c,v 1.7 2009/12/04 21:09:34 marka Exp $ */
=20
/*
* Copyright (C) 2004 Nominet, Ltd.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/nsec3param_51.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/nsec3param_51.h Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/nsec3param_51.h Tue Apr 17 1=
1:51:51 2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_NSEC3PARAM_51_H
#define GENERIC_NSEC3PARAM_51_H 1
=20
-/* $Id: nsec3param_51.h,v 1.4 2008-09-25 04:02:39 tbox Exp $ */
+/* $Id: nsec3param_51.h,v 1.4 2008/09/25 04:02:39 tbox Exp $ */
=20
/*!
* \brief Per RFC 5155 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/nsec_47.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/nsec_47.c Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/nsec_47.c Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: nsec_47.c,v 1.15 2011-01-13 04:59:26 tbox Exp $ */
+/* $Id: nsec_47.c,v 1.15 2011/01/13 04:59:26 tbox Exp $ */
=20
/* reviewed: Wed Mar 15 18:21:15 PST 2000 by brister */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/nsec_47.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/nsec_47.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/nsec_47.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_NSEC_47_H
#define GENERIC_NSEC_47_H 1
=20
-/* $Id: nsec_47.h,v 1.10 2008-07-15 23:47:21 tbox Exp $ */
+/* $Id: nsec_47.h,v 1.10 2008/07/15 23:47:21 tbox Exp $ */
=20
/*!
* \brief Per RFC 3845 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/null_10.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/null_10.c Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/null_10.c Tue Apr 17 11:51:5=
1 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2007, 2009 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2007, 2009, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1998-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: null_10.c,v 1.44 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id$ */
=20
/* Reviewed: Thu Mar 16 13:57:50 PST 2000 by explorer */
=20
@@ -43,11 +43,7 @@
totext_null(ARGS_TOTEXT) {
REQUIRE(rdata->type =3D=3D 10);
=20
- UNUSED(rdata);
- UNUSED(tctx);
- UNUSED(target);
-
- return (DNS_R_SYNTAX);
+ return (unknown_totext(rdata, tctx, target));
}
=20
static inline isc_result_t
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/null_10.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/null_10.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/null_10.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -19,7 +19,7 @@
#ifndef GENERIC_NULL_10_H
#define GENERIC_NULL_10_H 1
=20
-/* $Id: null_10.h,v 1.25 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: null_10.h,v 1.25 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_null {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/nxt_30.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/nxt_30.c Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/nxt_30.c Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: nxt_30.c,v 1.65 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: nxt_30.c,v 1.65 2009/12/04 22:06:37 tbox Exp $ */
=20
/* reviewed: Wed Mar 15 18:21:15 PST 2000 by brister */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/nxt_30.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/nxt_30.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/nxt_30.h Tue Apr 17 11:51:51=
2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_NXT_30_H
#define GENERIC_NXT_30_H 1
=20
-/* $Id: nxt_30.h,v 1.25 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: nxt_30.h,v 1.25 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \brief RFC2535 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/opt_41.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/opt_41.c Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/opt_41.c Tue Apr 17 11:51:51=
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2009 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2009, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1998-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: opt_41.c,v 1.35 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id$ */
=20
/* Reviewed: Thu Mar 16 14:06:44 PST 2000 by gson */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/opt_41.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/opt_41.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/opt_41.h Tue Apr 17 11:51:51=
2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_OPT_41_H
#define GENERIC_OPT_41_H 1
=20
-/* $Id: opt_41.h,v 1.18 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: opt_41.h,v 1.18 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \brief Per RFC2671 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/proforma.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/proforma.c Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/proforma.c Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: proforma.c,v 1.38 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: proforma.c,v 1.38 2009/12/04 22:06:37 tbox Exp $ */
=20
#ifndef RDATA_GENERIC_#_#_C
#define RDATA_GENERIC_#_#_C
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/proforma.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/proforma.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/proforma.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -19,7 +19,7 @@
#ifndef GENERIC_PROFORMA_H
#define GENERIC_PROFORMA_H 1
=20
-/* $Id: proforma.h,v 1.23 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: proforma.h,v 1.23 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_# {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/ptr_12.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/ptr_12.c Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/ptr_12.c Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ptr_12.c,v 1.45 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: ptr_12.c,v 1.45 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Thu Mar 16 14:05:12 PST 2000 by explorer */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/ptr_12.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/ptr_12.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/ptr_12.h Tue Apr 17 11:51:51=
2012 +0300
@@ -19,7 +19,7 @@
#ifndef GENERIC_PTR_12_H
#define GENERIC_PTR_12_H 1
=20
-/* $Id: ptr_12.h,v 1.27 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: ptr_12.h,v 1.27 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_ptr {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/rp_17.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/rp_17.c Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/rp_17.c Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rp_17.c,v 1.44 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: rp_17.c,v 1.44 2009/12/04 22:06:37 tbox Exp $ */
=20
/* RFC1183 */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/rp_17.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/rp_17.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/rp_17.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_RP_17_H
#define GENERIC_RP_17_H 1
=20
-/* $Id: rp_17.h,v 1.21 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: rp_17.h,v 1.21 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \brief Per RFC1183 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/rrsig_46.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/rrsig_46.c Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/rrsig_46.c Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2009, 2011 Internet Systems Consortium=
, Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2009, 2011, 2012 Internet Systems Cons=
ortium, Inc. ("ISC")
* Copyright (C) 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rrsig_46.c,v 1.14 2011-01-13 04:59:26 tbox Exp $ */
+/* $Id$ */
=20
/* Reviewed: Fri Mar 17 09:05:02 PST 2000 by gson */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/rrsig_46.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/rrsig_46.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/rrsig_46.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_DNSSIG_46_H
#define GENERIC_DNSSIG_46_H 1
=20
-/* $Id: rrsig_46.h,v 1.7 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: rrsig_46.h,v 1.7 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \brief Per RFC2535 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/rt_21.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/rt_21.c Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/rt_21.c Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rt_21.c,v 1.48 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: rt_21.c,v 1.48 2009/12/04 22:06:37 tbox Exp $ */
=20
/* reviewed: Thu Mar 16 15:02:31 PST 2000 by brister */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/rt_21.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/rt_21.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/rt_21.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_RT_21_H
#define GENERIC_RT_21_H 1
=20
-/* $Id: rt_21.h,v 1.21 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: rt_21.h,v 1.21 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \brief Per RFC1183 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/sig_24.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/sig_24.c Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/sig_24.c Tue Apr 17 11:51:51=
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2009 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2009, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sig_24.c,v 1.68 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id$ */
=20
/* Reviewed: Fri Mar 17 09:05:02 PST 2000 by gson */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/sig_24.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/sig_24.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/sig_24.h Tue Apr 17 11:51:51=
2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_SIG_24_H
#define GENERIC_SIG_24_H 1
=20
-/* $Id: sig_24.h,v 1.26 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: sig_24.h,v 1.26 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \brief Per RFC2535 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/soa_6.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/soa_6.c Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/soa_6.c Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2007, 2009 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2007, 2009, 2012 Internet Systems Consortium, Inc.=
("ISC")
* Copyright (C) 1998-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: soa_6.c,v 1.64 2009-12-04 21:09:34 marka Exp $ */
+/* $Id$ */
=20
/* Reviewed: Thu Mar 16 15:18:32 PST 2000 by explorer */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/soa_6.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/soa_6.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/soa_6.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -19,7 +19,7 @@
#ifndef GENERIC_SOA_6_H
#define GENERIC_SOA_6_H 1
=20
-/* $Id: soa_6.h,v 1.32 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: soa_6.h,v 1.32 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_soa {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/spf_99.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/spf_99.c Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/spf_99.c Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: spf_99.c,v 1.6 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: spf_99.c,v 1.6 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Thu Mar 16 15:40:00 PST 2000 by bwelling */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/spf_99.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/spf_99.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/spf_99.h Tue Apr 17 11:51:51=
2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_SPF_99_H
#define GENERIC_SPF_99_H 1
=20
-/* $Id: spf_99.h,v 1.4 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: spf_99.h,v 1.4 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_spf_string {
isc_uint8_t length;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/sshfp_44.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/sshfp_44.c Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/sshfp_44.c Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2006, 2007, 2009 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2006, 2007, 2009, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sshfp_44.c,v 1.9 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id$ */
=20
/* RFC 4255 */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/sshfp_44.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/sshfp_44.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/sshfp_44.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sshfp_44.h,v 1.8 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: sshfp_44.h,v 1.8 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \brief Per RFC 4255 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/tkey_249.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/tkey_249.c Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/tkey_249.c Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2007, 2009 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2007, 2009, 2012 Internet Systems Consortium, Inc.=
("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: tkey_249.c,v 1.59 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id$ */
=20
/*
* Reviewed: Thu Mar 16 17:35:30 PST 2000 by halley.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/tkey_249.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/tkey_249.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/tkey_249.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_TKEY_249_H
#define GENERIC_TKEY_249_H 1
=20
-/* $Id: tkey_249.h,v 1.24 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: tkey_249.h,v 1.24 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \brief Per draft-ietf-dnsind-tkey-00.txt */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/txt_16.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/txt_16.c Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/txt_16.c Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: txt_16.c,v 1.47 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: txt_16.c,v 1.47 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Thu Mar 16 15:40:00 PST 2000 by bwelling */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/txt_16.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/txt_16.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/txt_16.h Tue Apr 17 11:51:51=
2012 +0300
@@ -19,7 +19,7 @@
#ifndef GENERIC_TXT_16_H
#define GENERIC_TXT_16_H 1
=20
-/* $Id: txt_16.h,v 1.28 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: txt_16.h,v 1.28 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_txt_string {
isc_uint8_t length;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/unspec_103.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/unspec_103.c Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/unspec_103.c Tue Apr 17 11:5=
1:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: unspec_103.c,v 1.37 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: unspec_103.c,v 1.37 2009/12/04 22:06:37 tbox Exp $ */
=20
#ifndef RDATA_GENERIC_UNSPEC_103_C
#define RDATA_GENERIC_UNSPEC_103_C
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/unspec_103.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/unspec_103.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/unspec_103.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -19,7 +19,7 @@
#ifndef GENERIC_UNSPEC_103_H
#define GENERIC_UNSPEC_103_H 1
=20
-/* $Id: unspec_103.h,v 1.17 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: unspec_103.h,v 1.17 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_unspec_t {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/x25_19.c
--- a/head/contrib/bind9/lib/dns/rdata/generic/x25_19.c Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/x25_19.c Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: x25_19.c,v 1.41 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: x25_19.c,v 1.41 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Thu Mar 16 16:15:57 PST 2000 by bwelling */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/gener=
ic/x25_19.h
--- a/head/contrib/bind9/lib/dns/rdata/generic/x25_19.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/generic/x25_19.h Tue Apr 17 11:51:51=
2012 +0300
@@ -18,7 +18,7 @@
#ifndef GENERIC_X25_19_H
#define GENERIC_X25_19_H 1
=20
-/* $Id: x25_19.h,v 1.18 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: x25_19.h,v 1.18 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \brief Per RFC1183 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/hs_4/=
a_1.c
--- a/head/contrib/bind9/lib/dns/rdata/hs_4/a_1.c Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/dns/rdata/hs_4/a_1.c Tue Apr 17 11:51:51 2012 =
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: a_1.c,v 1.33 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: a_1.c,v 1.33 2009/12/04 22:06:37 tbox Exp $ */
=20
/* reviewed: Thu Mar 16 15:58:36 PST 2000 by brister */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/hs_4/=
a_1.h
--- a/head/contrib/bind9/lib/dns/rdata/hs_4/a_1.h Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/dns/rdata/hs_4/a_1.h Tue Apr 17 11:51:51 2012 =
+0300
@@ -19,7 +19,7 @@
#ifndef HS_4_A_1_H
#define HS_4_A_1_H 1
=20
-/* $Id: a_1.h,v 1.12 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: a_1.h,v 1.12 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_hs_a {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
a6_38.c
--- a/head/contrib/bind9/lib/dns/rdata/in_1/a6_38.c Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/a6_38.c Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: a6_38.c,v 1.56 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: a6_38.c,v 1.56 2009/12/04 22:06:37 tbox Exp $ */
=20
/* RFC2874 */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
a6_38.h
--- a/head/contrib/bind9/lib/dns/rdata/in_1/a6_38.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/a6_38.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -18,7 +18,7 @@
#ifndef IN_1_A6_38_H
#define IN_1_A6_38_H 1
=20
-/* $Id: a6_38.h,v 1.24 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: a6_38.h,v 1.24 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!=20
* \brief Per RFC2874 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
a_1.c
--- a/head/contrib/bind9/lib/dns/rdata/in_1/a_1.c Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/a_1.c Tue Apr 17 11:51:51 2012 =
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: a_1.c,v 1.55 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: a_1.c,v 1.55 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Thu Mar 16 16:52:50 PST 2000 by bwelling */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
a_1.h
--- a/head/contrib/bind9/lib/dns/rdata/in_1/a_1.h Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/a_1.h Tue Apr 17 11:51:51 2012 =
+0300
@@ -19,7 +19,7 @@
#ifndef IN_1_A_1_H
#define IN_1_A_1_H 1
=20
-/* $Id: a_1.h,v 1.28 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: a_1.h,v 1.28 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_in_a {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
aaaa_28.c
--- a/head/contrib/bind9/lib/dns/rdata/in_1/aaaa_28.c Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/aaaa_28.c Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: aaaa_28.c,v 1.47 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: aaaa_28.c,v 1.47 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Thu Mar 16 16:52:50 PST 2000 by bwelling */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
aaaa_28.h
--- a/head/contrib/bind9/lib/dns/rdata/in_1/aaaa_28.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/aaaa_28.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -18,7 +18,7 @@
#ifndef IN_1_AAAA_28_H
#define IN_1_AAAA_28_H 1
=20
-/* $Id: aaaa_28.h,v 1.21 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: aaaa_28.h,v 1.21 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!=20
* \brief Per RFC1886 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
apl_42.c
--- a/head/contrib/bind9/lib/dns/rdata/in_1/apl_42.c Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/apl_42.c Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: apl_42.c,v 1.16 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: apl_42.c,v 1.16 2009/12/04 22:06:37 tbox Exp $ */
=20
/* RFC3123 */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
apl_42.h
--- a/head/contrib/bind9/lib/dns/rdata/in_1/apl_42.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/apl_42.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -19,7 +19,7 @@
#ifndef IN_1_APL_42_H
#define IN_1_APL_42_H 1
=20
-/* $Id: apl_42.h,v 1.6 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: apl_42.h,v 1.6 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_apl_ent {
isc_boolean_t negative;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
dhcid_49.c
--- a/head/contrib/bind9/lib/dns/rdata/in_1/dhcid_49.c Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/dhcid_49.c Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2006, 2007, 2009 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2006, 2007, 2009, 2012 Internet Systems Consortium, Inc.=
("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dhcid_49.c,v 1.7 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id$ */
=20
/* RFC 4701 */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
dhcid_49.h
--- a/head/contrib/bind9/lib/dns/rdata/in_1/dhcid_49.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/dhcid_49.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -18,7 +18,7 @@
#ifndef IN_1_DHCID_49_H
#define IN_1_DHCID_49_H 1
=20
-/* $Id: dhcid_49.h,v 1.5 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: dhcid_49.h,v 1.5 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_in_dhcid {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
kx_36.c
--- a/head/contrib/bind9/lib/dns/rdata/in_1/kx_36.c Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/kx_36.c Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: kx_36.c,v 1.47 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: kx_36.c,v 1.47 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Thu Mar 16 17:24:54 PST 2000 by explorer */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
kx_36.h
--- a/head/contrib/bind9/lib/dns/rdata/in_1/kx_36.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/kx_36.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -18,7 +18,7 @@
#ifndef IN_1_KX_36_H
#define IN_1_KX_36_H 1
=20
-/* $Id: kx_36.h,v 1.20 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: kx_36.h,v 1.20 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!=20
* \brief Per RFC2230 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
naptr_35.c
--- a/head/contrib/bind9/lib/dns/rdata/in_1/naptr_35.c Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/naptr_35.c Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007-2009 Internet Systems Consortium, Inc. =
("ISC")
+ * Copyright (C) 2004, 2005, 2007-2009, 2012 Internet Systems Consortium,=
Inc. ("ISC")
* Copyright (C) 1999-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: naptr_35.c,v 1.56 2009-12-04 21:09:34 marka Exp $ */
+/* $Id$ */
=20
/* Reviewed: Thu Mar 16 16:52:50 PST 2000 by bwelling */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
naptr_35.h
--- a/head/contrib/bind9/lib/dns/rdata/in_1/naptr_35.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/naptr_35.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
* Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -18,9 +18,9 @@
#ifndef IN_1_NAPTR_35_H
#define IN_1_NAPTR_35_H 1
=20
-/* $Id: naptr_35.h,v 1.23 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id$ */
=20
-/*!=20
+/*!
* \brief Per RFC2915 */
=20
typedef struct dns_rdata_in_naptr {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
nsap-ptr_23.c
--- a/head/contrib/bind9/lib/dns/rdata/in_1/nsap-ptr_23.c Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/nsap-ptr_23.c Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: nsap-ptr_23.c,v 1.40 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: nsap-ptr_23.c,v 1.40 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Fri Mar 17 10:16:02 PST 2000 by gson */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
nsap-ptr_23.h
--- a/head/contrib/bind9/lib/dns/rdata/in_1/nsap-ptr_23.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/nsap-ptr_23.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -18,7 +18,7 @@
#ifndef IN_1_NSAP_PTR_23_H
#define IN_1_NSAP_PTR_23_H 1
=20
-/* $Id: nsap-ptr_23.h,v 1.19 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: nsap-ptr_23.h,v 1.19 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!=20
* \brief Per RFC1348. Obsoleted in RFC 1706 - use PTR instead. */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
nsap_22.c
--- a/head/contrib/bind9/lib/dns/rdata/in_1/nsap_22.c Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/nsap_22.c Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: nsap_22.c,v 1.44 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: nsap_22.c,v 1.44 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Fri Mar 17 10:41:07 PST 2000 by gson */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
nsap_22.h
--- a/head/contrib/bind9/lib/dns/rdata/in_1/nsap_22.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/nsap_22.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -18,7 +18,7 @@
#ifndef IN_1_NSAP_22_H
#define IN_1_NSAP_22_H 1
=20
-/* $Id: nsap_22.h,v 1.18 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: nsap_22.h,v 1.18 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!=20
* \brief Per RFC1706 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
px_26.c
--- a/head/contrib/bind9/lib/dns/rdata/in_1/px_26.c Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/px_26.c Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: px_26.c,v 1.45 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: px_26.c,v 1.45 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Mon Mar 20 10:44:27 PST 2000 */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
px_26.h
--- a/head/contrib/bind9/lib/dns/rdata/in_1/px_26.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/px_26.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -18,7 +18,7 @@
#ifndef IN_1_PX_26_H
#define IN_1_PX_26_H 1
=20
-/* $Id: px_26.h,v 1.19 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: px_26.h,v 1.19 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!=20
* \brief Per RFC2163 */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
srv_33.c
--- a/head/contrib/bind9/lib/dns/rdata/in_1/srv_33.c Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/srv_33.c Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: srv_33.c,v 1.47 2009-12-04 22:06:37 tbox Exp $ */
+/* $Id: srv_33.c,v 1.47 2009/12/04 22:06:37 tbox Exp $ */
=20
/* Reviewed: Fri Mar 17 13:01:00 PST 2000 by bwelling */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
srv_33.h
--- a/head/contrib/bind9/lib/dns/rdata/in_1/srv_33.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/srv_33.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -18,7 +18,7 @@
#ifndef IN_1_SRV_33_H
#define IN_1_SRV_33_H 1
=20
-/* $Id: srv_33.h,v 1.19 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: srv_33.h,v 1.19 2007/06/19 23:47:17 tbox Exp $ */
=20
/* Reviewed: Fri Mar 17 13:01:00 PST 2000 by bwelling */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
wks_11.c
--- a/head/contrib/bind9/lib/dns/rdata/in_1/wks_11.c Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/wks_11.c Tue Apr 17 11:51:51 20=
12 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2007, 2009 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2007, 2009, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: wks_11.c,v 1.57 2009-12-04 21:09:34 marka Exp $ */
+/* $Id$ */
=20
/* Reviewed: Fri Mar 17 15:01:49 PST 2000 by explorer */
=20
@@ -27,16 +27,46 @@
=20
#include <isc/net.h>
#include <isc/netdb.h>
+#include <isc/once.h>
=20
#define RRTYPE_WKS_ATTRIBUTES (0)
=20
+static isc_mutex_t wks_lock;
+
+static void init_lock(void) {
+ RUNTIME_CHECK(isc_mutex_init(&wks_lock) =3D=3D ISC_R_SUCCESS);
+}
+
+static isc_boolean_t
+mygetprotobyname(const char *name, long *proto) {
+ struct protoent *pe;
+
+ LOCK(&wks_lock);
+ pe =3D getprotobyname(name);
+ if (pe !=3D NULL)
+ *proto =3D pe->p_proto;
+ UNLOCK(&wks_lock);
+ return (ISC_TF(pe !=3D NULL));
+}
+
+static isc_boolean_t
+mygetservbyname(const char *name, const char *proto, long *port) {
+ struct servent *se;
+
+ LOCK(&wks_lock);
+ se =3D getservbyname(name, proto);
+ if (se !=3D NULL)
+ *port =3D ntohs(se->s_port);
+ UNLOCK(&wks_lock);
+ return (ISC_TF(se !=3D NULL));
+}
+
static inline isc_result_t
fromtext_in_wks(ARGS_FROMTEXT) {
+ static isc_once_t once =3D ISC_ONCE_INIT;
isc_token_t token;
isc_region_t region;
struct in_addr addr;
- struct protoent *pe;
- struct servent *se;
char *e;
long proto;
unsigned char bm[8*1024]; /* 64k bits */
@@ -55,6 +85,8 @@
UNUSED(options);
UNUSED(rdclass);
=20
+ RUNTIME_CHECK(isc_once_do(&once, init_lock) =3D=3D ISC_R_SUCCESS);
+
/*
* IPv4 dotted quad.
*/
@@ -78,10 +110,9 @@
proto =3D strtol(DNS_AS_STR(token), &e, 10);
if (*e =3D=3D 0)
;
- else if ((pe =3D getprotobyname(DNS_AS_STR(token))) !=3D NULL)
- proto =3D pe->p_proto;
- else
+ else if (!mygetprotobyname(DNS_AS_STR(token), &proto))
RETTOK(DNS_R_UNKNOWNPROTO);
+
if (proto < 0 || proto > 0xff)
RETTOK(ISC_R_RANGE);
=20
@@ -112,12 +143,8 @@
port =3D strtol(DNS_AS_STR(token), &e, 10);
if (*e =3D=3D 0)
;
- else if ((se =3D getservbyname(service, ps)) !=3D NULL)
- port =3D ntohs(se->s_port);
- else if ((se =3D getservbyname(DNS_AS_STR(token), ps))
- !=3D NULL)
- port =3D ntohs(se->s_port);
- else
+ else if (!mygetservbyname(service, ps, &port) &&
+ !mygetservbyname(DNS_AS_STR(token), ps, &port))
RETTOK(DNS_R_UNKNOWNSERVICE);
if (port < 0 || port > 0xffff)
RETTOK(ISC_R_RANGE);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/in_1/=
wks_11.h
--- a/head/contrib/bind9/lib/dns/rdata/in_1/wks_11.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/in_1/wks_11.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -18,7 +18,7 @@
#ifndef IN_1_WKS_11_H
#define IN_1_WKS_11_H 1
=20
-/* $Id: wks_11.h,v 1.22 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: wks_11.h,v 1.22 2007/06/19 23:47:17 tbox Exp $ */
=20
typedef struct dns_rdata_in_wks {
dns_rdatacommon_t common;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/rdata=
structpre.h
--- a/head/contrib/bind9/lib/dns/rdata/rdatastructpre.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/rdatastructpre.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rdatastructpre.h,v 1.16 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: rdatastructpre.h,v 1.16 2007/06/19 23:47:17 tbox Exp $ */
=20
#ifndef DNS_RDATASTRUCT_H
#define DNS_RDATASTRUCT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdata/rdata=
structsuf.h
--- a/head/contrib/bind9/lib/dns/rdata/rdatastructsuf.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdata/rdatastructsuf.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rdatastructsuf.h,v 1.10 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: rdatastructsuf.h,v 1.10 2007/06/19 23:47:17 tbox Exp $ */
=20
ISC_LANG_ENDDECLS
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdatalist.c
--- a/head/contrib/bind9/lib/dns/rdatalist.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdatalist.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2008, 2010, 2011 Internet Systems Cons=
ortium, Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2008, 2010-2012 Internet Systems Conso=
rtium, Inc. ("ISC")
* Copyright (C) 1999-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rdatalist.c,v 1.40.40.2 2011-02-28 01:20:02 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdatalist_p=
.h
--- a/head/contrib/bind9/lib/dns/rdatalist_p.h Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/dns/rdatalist_p.h Tue Apr 17 11:51:51 2012 +03=
00
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rdatalist_p.h,v 1.11 2008-09-25 04:02:38 tbox Exp $ */
+/* $Id: rdatalist_p.h,v 1.11 2008/09/25 04:02:38 tbox Exp $ */
=20
#ifndef DNS_RDATALIST_P_H
#define DNS_RDATALIST_P_H
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdataset.c
--- a/head/contrib/bind9/lib/dns/rdataset.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdataset.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rdataset.c,v 1.86.148.4 2011-06-08 23:02:42 each Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -442,11 +442,11 @@
j =3D val % count;
for (i =3D 0; i < count; i++) {
if (order !=3D NULL)
- sorted[j].key =3D (*order)(&shuffled[i],
+ sorted[i].key =3D (*order)(&shuffled[j],
order_arg);
else
- sorted[j].key =3D 0; /* Unused */
- sorted[j].rdata =3D &shuffled[i];
+ sorted[i].key =3D 0; /* Unused */
+ sorted[i].rdata =3D &shuffled[j];
j++;
if (j =3D=3D count)
j =3D 0; /* Wrap around. */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdatasetite=
r.c
--- a/head/contrib/bind9/lib/dns/rdatasetiter.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/dns/rdatasetiter.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rdatasetiter.c,v 1.16 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: rdatasetiter.c,v 1.16 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rdataslab.c
--- a/head/contrib/bind9/lib/dns/rdataslab.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rdataslab.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rdataslab.c,v 1.52.148.2 2011-02-28 01:20:02 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -53,6 +53,7 @@
* record count (2 bytes)
* data records
* data length (2 bytes)
+ * meta data (1 byte for RRSIG's)
* data (data length bytes)
*
* Offsets are from the end of the header.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/request.c
--- a/head/contrib/bind9/lib/dns/request.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/request.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 2000-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: request.c,v 1.87.148.2 2011-03-12 04:59:17 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -1133,9 +1133,7 @@
*/
static void
send_if_done(dns_request_t *request, isc_result_t result) {
- if (!DNS_REQUEST_CONNECTING(request) &&
- !DNS_REQUEST_SENDING(request) &&
- !request->canceling)
+ if (request->event !=3D NULL && !request->canceling)
req_sendevent(request, result);
}
=20
@@ -1319,8 +1317,8 @@
else
send_if_done(request, ISC_R_CANCELED);
} else if (sevent->result !=3D ISC_R_SUCCESS) {
- req_cancel(request);
- send_if_done(request, ISC_R_CANCELED);
+ req_cancel(request);
+ send_if_done(request, ISC_R_CANCELED);
}
UNLOCK(&request->requestmgr->locks[request->hash]);
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/resolver.c
--- a/head/contrib/bind9/lib/dns/resolver.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/resolver.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: resolver.c,v 1.428.6.7 2011-06-08 23:02:43 each Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -216,6 +216,8 @@
ISC_LIST(dns_validator_t) validators;
dns_db_t * cache;
dns_adb_t * adb;
+ isc_boolean_t ns_ttl_ok;
+ isc_uint32_t ns_ttl;
=20
/*%
* The number of events we're waiting for.
@@ -453,7 +455,7 @@
dns_rdataset_t *ardataset,
isc_result_t *eresultp);
static void validated(isc_task_t *task, isc_event_t *event);
-static void maybe_destroy(fetchctx_t *fctx);
+static isc_boolean_t maybe_destroy(fetchctx_t *fctx, isc_boolean_t locked);
static void add_bad(fetchctx_t *fctx, dns_adbaddrinfo_t *addrinfo,
isc_result_t reason, badnstype_t badtype);
=20
@@ -746,8 +748,11 @@
INSIST(query->tcpsocket =3D=3D NULL);
=20
query->fctx->nqueries--;
- if (SHUTTINGDOWN(query->fctx))
- maybe_destroy(query->fctx); /* Locks bucket. */
+ if (SHUTTINGDOWN(query->fctx)) {
+ dns_resolver_t *res =3D query->fctx->res;
+ if (maybe_destroy(query->fctx, ISC_FALSE))
+ empty_bucket(res);
+ }
query->magic =3D 0;
isc_mem_put(query->mctx, query, sizeof(*query));
*queryp =3D NULL;
@@ -1562,9 +1567,11 @@
dns_dispatch_detach(&query->dispatch);
=20
cleanup_query:
- query->magic =3D 0;
- isc_mem_put(res->buckets[fctx->bucketnum].mctx,
- query, sizeof(*query));
+ if (query->connects =3D=3D 0) {
+ query->magic =3D 0;
+ isc_mem_put(res->buckets[fctx->bucketnum].mctx,
+ query, sizeof(*query));
+ }
=20
stop_idle_timer:
RUNTIME_CHECK(fctx_stopidletimer(fctx) =3D=3D ISC_R_SUCCESS);
@@ -1682,6 +1689,7 @@
dns_compress_t cctx;
isc_boolean_t cleanup_cctx =3D ISC_FALSE;
isc_boolean_t secure_domain;
+ isc_boolean_t connecting =3D ISC_FALSE;
=20
fctx =3D query->fctx;
QTRACE("send");
@@ -1972,6 +1980,7 @@
query);
if (result !=3D ISC_R_SUCCESS)
goto cleanup_message;
+ connecting =3D ISC_TRUE;
query->connects++;
}
}
@@ -1983,8 +1992,19 @@
*/
result =3D isc_socket_sendto(socket, &r, task, resquery_senddone,
query, address, NULL);
- if (result !=3D ISC_R_SUCCESS)
+ if (result !=3D ISC_R_SUCCESS) {
+ if (connecting) {
+ /*
+ * This query is still connecting.
+ * Mark it as canceled so that it will just be
+ * cleaned up when the connected event is received.
+ * Keep fctx around until the event is processed.
+ */
+ query->fctx->nqueries++;
+ query->attributes |=3D RESQUERY_ATTR_CANCELED;
+ }
goto cleanup_message;
+ }
=20
query->sends++;
=20
@@ -2146,6 +2166,7 @@
isc_boolean_t want_try =3D ISC_FALSE;
isc_boolean_t want_done =3D ISC_FALSE;
isc_boolean_t bucket_empty =3D ISC_FALSE;
+ isc_boolean_t destroy =3D ISC_FALSE;
unsigned int bucketnum;
=20
find =3D event->ev_sender;
@@ -2157,6 +2178,9 @@
=20
FCTXTRACE("finddone");
=20
+ bucketnum =3D fctx->bucketnum;
+ LOCK(&res->buckets[bucketnum].lock);
+
INSIST(fctx->pending > 0);
fctx->pending--;
=20
@@ -2181,17 +2205,17 @@
}
} else if (SHUTTINGDOWN(fctx) && fctx->pending =3D=3D 0 &&
fctx->nqueries =3D=3D 0 && ISC_LIST_EMPTY(fctx->validators)) {
- bucketnum =3D fctx->bucketnum;
- LOCK(&res->buckets[bucketnum].lock);
/*
* Note that we had to wait until we had the lock before
* looking at fctx->references.
*/
if (fctx->references =3D=3D 0)
- bucket_empty =3D fctx_destroy(fctx);
- UNLOCK(&res->buckets[bucketnum].lock);
- }
-
+ destroy =3D ISC_TRUE;
+ }
+ UNLOCK(&res->buckets[bucketnum].lock);
+
+ if (destroy)
+ bucket_empty =3D fctx_destroy(fctx);
isc_event_free(&event);
dns_adb_destroyfind(&find);
=20
@@ -3421,6 +3445,20 @@
return (ISC_R_SUCCESS);
}
=20
+static inline void
+log_ns_ttl(fetchctx_t *fctx, const char *where) {
+ char namebuf[DNS_NAME_FORMATSIZE];
+ char domainbuf[DNS_NAME_FORMATSIZE];
+
+ dns_name_format(&fctx->name, namebuf, sizeof(namebuf));
+ dns_name_format(&fctx->domain, domainbuf, sizeof(domainbuf));
+ isc_log_write(dns_lctx, DNS_LOGCATEGORY_RESOLVER,
+ DNS_LOGMODULE_RESOLVER, ISC_LOG_DEBUG(10),
+ "log_ns_ttl: fctx %p: %s: %s (in '%s'?): %u %u",
+ fctx, where, namebuf, domainbuf,
+ fctx->ns_ttl_ok, fctx->ns_ttl);
+}
+
static isc_result_t
fctx_create(dns_resolver_t *res, dns_name_t *name, dns_rdatatype_t type,
dns_name_t *domain, dns_rdataset_t *nameservers,
@@ -3514,6 +3552,8 @@
fctx->timeout =3D ISC_FALSE;
fctx->addrinfo =3D NULL;
fctx->client =3D NULL;
+ fctx->ns_ttl =3D 0;
+ fctx->ns_ttl_ok =3D ISC_FALSE;
=20
dns_name_init(&fctx->nsname, NULL);
fctx->nsfetch =3D NULL;
@@ -3563,6 +3603,8 @@
dns_rdataset_disassociate(&fctx->nameservers);
goto cleanup_name;
}
+ fctx->ns_ttl =3D fctx->nameservers.ttl;
+ fctx->ns_ttl_ok =3D ISC_TRUE;
} else {
/*
* We're in forward-only mode. Set the query domain.
@@ -3580,7 +3622,11 @@
if (result !=3D ISC_R_SUCCESS)
goto cleanup_name;
dns_rdataset_clone(nameservers, &fctx->nameservers);
- }
+ fctx->ns_ttl =3D fctx->nameservers.ttl;
+ fctx->ns_ttl_ok =3D ISC_TRUE;
+ }
+
+ log_ns_ttl(fctx, "fctx_create");
=20
INSIST(dns_name_issubdomain(&fctx->name, &fctx->domain));
=20
@@ -3874,14 +3920,16 @@
=20
/*
* Destroy '*fctx' if it is ready to be destroyed (i.e., if it has
- * no references and is no longer waiting for any events). If this
- * was the last fctx in the resolver, destroy the resolver.
+ * no references and is no longer waiting for any events).
*
* Requires:
* '*fctx' is shutting down.
+ *
+ * Returns:
+ * true if the resolver is exiting and this is the last fctx in the bucket.
*/
-static void
-maybe_destroy(fetchctx_t *fctx) {
+static isc_boolean_t
+maybe_destroy(fetchctx_t *fctx, isc_boolean_t locked) {
unsigned int bucketnum;
isc_boolean_t bucket_empty =3D ISC_FALSE;
dns_resolver_t *res =3D fctx->res;
@@ -3889,8 +3937,11 @@
=20
REQUIRE(SHUTTINGDOWN(fctx));
=20
+ bucketnum =3D fctx->bucketnum;
+ if (!locked)
+ LOCK(&res->buckets[bucketnum].lock);
if (fctx->pending !=3D 0 || fctx->nqueries !=3D 0)
- return;
+ goto unlock;
=20
for (validator =3D ISC_LIST_HEAD(fctx->validators);
validator !=3D NULL; validator =3D next_validator) {
@@ -3898,14 +3949,12 @@
dns_validator_cancel(validator);
}
=20
- bucketnum =3D fctx->bucketnum;
- LOCK(&res->buckets[bucketnum].lock);
if (fctx->references =3D=3D 0 && ISC_LIST_EMPTY(fctx->validators))
bucket_empty =3D fctx_destroy(fctx);
- UNLOCK(&res->buckets[bucketnum].lock);
-
- if (bucket_empty)
- empty_bucket(res);
+ unlock:
+ if (!locked)
+ UNLOCK(&res->buckets[bucketnum].lock);
+ return (bucket_empty);
}
=20
/*
@@ -3913,31 +3962,33 @@
*/
static void
validated(isc_task_t *task, isc_event_t *event) {
- isc_result_t result =3D ISC_R_SUCCESS;
- isc_result_t eresult =3D ISC_R_SUCCESS;
- isc_stdtime_t now;
- fetchctx_t *fctx;
- dns_validatorevent_t *vevent;
+ dns_adbaddrinfo_t *addrinfo;
+ dns_dbnode_t *node =3D NULL;
+ dns_dbnode_t *nsnode =3D NULL;
dns_fetchevent_t *hevent;
+ dns_name_t *name;
dns_rdataset_t *ardataset =3D NULL;
dns_rdataset_t *asigrdataset =3D NULL;
- dns_dbnode_t *node =3D NULL;
- isc_boolean_t negative;
- isc_boolean_t chaining;
- isc_boolean_t sentresponse;
- isc_uint32_t ttl;
- dns_dbnode_t *nsnode =3D NULL;
- dns_name_t *name;
dns_rdataset_t *rdataset;
dns_rdataset_t *sigrdataset;
+ dns_resolver_t *res;
dns_valarg_t *valarg;
- dns_adbaddrinfo_t *addrinfo;
+ dns_validatorevent_t *vevent;
+ fetchctx_t *fctx;
+ isc_boolean_t chaining;
+ isc_boolean_t negative;
+ isc_boolean_t sentresponse;
+ isc_result_t eresult =3D ISC_R_SUCCESS;
+ isc_result_t result =3D ISC_R_SUCCESS;
+ isc_stdtime_t now;
+ isc_uint32_t ttl;
=20
UNUSED(task); /* for now */
=20
REQUIRE(event->ev_type =3D=3D DNS_EVENT_VALIDATORDONE);
valarg =3D event->ev_arg;
fctx =3D valarg->fctx;
+ res =3D fctx->res;
addrinfo =3D valarg->addrinfo;
REQUIRE(VALID_FCTX(fctx));
REQUIRE(!ISC_LIST_EMPTY(fctx->validators));
@@ -3947,6 +3998,8 @@
=20
FCTXTRACE("received validation completion event");
=20
+ LOCK(&res->buckets[fctx->bucketnum].lock);
+
ISC_LIST_UNLINK(fctx->validators, vevent->validator, link);
fctx->validator =3D NULL;
=20
@@ -3955,7 +4008,7 @@
* destroy the fctx if necessary.
*/
dns_validator_destroy(&vevent->validator);
- isc_mem_put(fctx->res->buckets[fctx->bucketnum].mctx,
+ isc_mem_put(res->buckets[fctx->bucketnum].mctx,
valarg, sizeof(*valarg));
=20
negative =3D ISC_TF(vevent->rdataset =3D=3D NULL);
@@ -3968,12 +4021,15 @@
* so, destroy the fctx.
*/
if (SHUTTINGDOWN(fctx) && !sentresponse) {
- maybe_destroy(fctx); /* Locks bucket. */
+ isc_uint32_t bucketnum =3D fctx->bucketnum;
+ isc_boolean_t bucket_empty;
+ bucket_empty =3D maybe_destroy(fctx, ISC_TRUE);
+ UNLOCK(&res->buckets[bucketnum].lock);
+ if (bucket_empty)
+ empty_bucket(res);
goto cleanup_event;
}
=20
- LOCK(&fctx->res->buckets[fctx->bucketnum].lock);
-
isc_stdtime_get(&now);
=20
/*
@@ -4019,7 +4075,7 @@
=20
if (vevent->result !=3D ISC_R_SUCCESS) {
FCTXTRACE("validation failed");
- inc_stats(fctx->res, dns_resstatscounter_valfail);
+ inc_stats(res, dns_resstatscounter_valfail);
fctx->valfail++;
fctx->vresult =3D vevent->result;
if (fctx->vresult !=3D DNS_R_BROKENCHAIN) {
@@ -4068,7 +4124,7 @@
result =3D fctx->vresult;
add_bad(fctx, addrinfo, result, badns_validation);
isc_event_free(&event);
- UNLOCK(&fctx->res->buckets[fctx->bucketnum].lock);
+ UNLOCK(&res->buckets[fctx->bucketnum].lock);
INSIST(fctx->validator =3D=3D NULL);
fctx->validator =3D ISC_LIST_HEAD(fctx->validators);
if (fctx->validator !=3D NULL)
@@ -4087,8 +4143,7 @@
fctx->type =3D=3D dns_rdatatype_dlv ||
fctx->type =3D=3D dns_rdatatype_ds) &&
tresult =3D=3D ISC_R_SUCCESS)
- dns_resolver_addbadcache(fctx->res,
- &fctx->name,
+ dns_resolver_addbadcache(res, &fctx->name,
fctx->type, &expire);
fctx_done(fctx, result, __LINE__); /* Locks bucket. */
} else
@@ -4101,7 +4156,7 @@
dns_rdatatype_t covers;
FCTXTRACE("nonexistence validation OK");
=20
- inc_stats(fctx->res, dns_resstatscounter_valnegsuccess);
+ inc_stats(res, dns_resstatscounter_valnegsuccess);
=20
if (fctx->rmessage->rcode =3D=3D dns_rcode_nxdomain)
covers =3D dns_rdatatype_any;
@@ -4118,10 +4173,9 @@
* to zero to facilitate locating the containing zone of
* a arbitrary zone.
*/
- ttl =3D fctx->res->view->maxncachettl;
+ ttl =3D res->view->maxncachettl;
if (fctx->type =3D=3D dns_rdatatype_soa &&
- covers =3D=3D dns_rdatatype_any &&
- fctx->res->zero_no_soa_ttl)
+ covers =3D=3D dns_rdatatype_any && res->zero_no_soa_ttl)
ttl =3D 0;
=20
result =3D ncache_adderesult(fctx->rmessage, fctx->cache, node,
@@ -4131,7 +4185,7 @@
goto noanswer_response;
goto answer_response;
} else
- inc_stats(fctx->res, dns_resstatscounter_valsuccess);
+ inc_stats(res, dns_resstatscounter_valsuccess);
=20
FCTXTRACE("validation OK");
=20
@@ -4179,14 +4233,17 @@
}
=20
if (sentresponse) {
+ isc_boolean_t bucket_empty =3D ISC_FALSE;
/*
* If we only deferred the destroy because we wanted to cache
* the data, destroy now.
*/
dns_db_detachnode(fctx->cache, &node);
- UNLOCK(&fctx->res->buckets[fctx->bucketnum].lock);
if (SHUTTINGDOWN(fctx))
- maybe_destroy(fctx); /* Locks bucket. */
+ bucket_empty =3D maybe_destroy(fctx, ISC_TRUE);
+ UNLOCK(&res->buckets[fctx->bucketnum].lock);
+ if (bucket_empty)
+ empty_bucket(res);
goto cleanup_event;
}
=20
@@ -4201,7 +4258,7 @@
* be validated.
*/
dns_db_detachnode(fctx->cache, &node);
- UNLOCK(&fctx->res->buckets[fctx->bucketnum].lock);
+ UNLOCK(&res->buckets[fctx->bucketnum].lock);
dns_validator_send(ISC_LIST_HEAD(fctx->validators));
goto cleanup_event;
}
@@ -4276,8 +4333,7 @@
if (node !=3D NULL)
dns_db_detachnode(fctx->cache, &node);
=20
- UNLOCK(&fctx->res->buckets[fctx->bucketnum].lock);
-
+ UNLOCK(&res->buckets[fctx->bucketnum].lock);
fctx_done(fctx, result, __LINE__); /* Locks bucket. */
=20
cleanup_event:
@@ -5248,6 +5304,26 @@
return (ISC_TRUE);
}
=20
+static void
+trim_ns_ttl(fetchctx_t *fctx, dns_name_t *name, dns_rdataset_t *rdataset) {
+ char ns_namebuf[DNS_NAME_FORMATSIZE];
+ char namebuf[DNS_NAME_FORMATSIZE];
+ char tbuf[DNS_RDATATYPE_FORMATSIZE];
+
+ if (fctx->ns_ttl_ok && rdataset->ttl > fctx->ns_ttl) {
+ dns_name_format(name, ns_namebuf, sizeof(ns_namebuf));
+ dns_name_format(&fctx->name, namebuf, sizeof(namebuf));
+ dns_rdatatype_format(fctx->type, tbuf, sizeof(tbuf));
+
+ isc_log_write(dns_lctx, DNS_LOGCATEGORY_RESOLVER,
+ DNS_LOGMODULE_RESOLVER, ISC_LOG_DEBUG(10),
+ "fctx %p: trimming ttl of %s/NS for %s/%s: "
+ "%u -> %u", fctx, ns_namebuf, namebuf, tbuf,
+ rdataset->ttl, fctx->ns_ttl);
+ rdataset->ttl =3D fctx->ns_ttl;
+ }
+}
+
/*
* Handle a no-answer response (NXDOMAIN, NXRRSET, or referral).
* If look_in_options has LOOK_FOR_NS_IN_ANSWER then we look in the answer
@@ -5418,6 +5494,9 @@
if (aa)
rdataset->trust =3D
dns_trust_authauthority;
+ else if (ISFORWARDER(fctx->addrinfo))
+ rdataset->trust =3D
+ dns_trust_answer;
else
rdataset->trust =3D
dns_trust_additional;
@@ -5431,6 +5510,12 @@
return (result);
}
=20
+ log_ns_ttl(fctx, "noanswer_response");
+
+ if (ns_rdataset !=3D NULL && dns_name_equal(&fctx->domain, ns_name) &&
+ !dns_name_equal(ns_name, dns_rootname))
+ trim_ns_ttl(fctx, ns_name, ns_rdataset);
+
/*
* A negative response has a SOA record (Type 2)
* and a optional NS RRset (Type 1) or it has neither
@@ -5471,6 +5556,9 @@
if (aa)
rdataset->trust =3D
dns_trust_authauthority;
+ else if (ISFORWARDER(fctx->addrinfo))
+ rdataset->trust =3D
+ dns_trust_answer;
else
rdataset->trust =3D
dns_trust_additional;
@@ -5512,6 +5600,9 @@
if (aa)
rdataset->trust =3D
dns_trust_authauthority;
+ else if (ISFORWARDER(fctx->addrinfo))
+ rdataset->trust =3D
+ dns_trust_answer;
else
rdataset->trust =3D
dns_trust_additional;
@@ -5643,6 +5734,8 @@
if (result !=3D ISC_R_SUCCESS)
return (result);
fctx->attributes |=3D FCTX_ATTR_WANTCACHE;
+ fctx->ns_ttl_ok =3D ISC_FALSE;
+ log_ns_ttl(fctx, "DELEGATION");
return (DNS_R_DELEGATION);
}
=20
@@ -5663,8 +5756,8 @@
answer_response(fetchctx_t *fctx) {
isc_result_t result;
dns_message_t *message;
- dns_name_t *name, *qname, tname;
- dns_rdataset_t *rdataset;
+ dns_name_t *name, *qname, tname, *ns_name;
+ dns_rdataset_t *rdataset, *ns_rdataset;
isc_boolean_t done, external, chaining, aa, found, want_chaining;
isc_boolean_t have_answer, found_cname, found_type, wanted_chaining;
unsigned int aflag;
@@ -6064,6 +6157,8 @@
* in this section, and we expect that it is not external.
*/
done =3D ISC_FALSE;
+ ns_name =3D NULL;
+ ns_rdataset =3D NULL;
result =3D dns_message_firstname(message, DNS_SECTION_AUTHORITY);
while (!done && result =3D=3D ISC_R_SUCCESS) {
name =3D NULL;
@@ -6091,6 +6186,10 @@
rdataset->trust =3D
dns_trust_additional;
=20
+ if (rdataset->type =3D=3D dns_rdatatype_ns) {
+ ns_name =3D name;
+ ns_rdataset =3D rdataset;
+ }
/*
* Mark any additional data related
* to this rdataset.
@@ -6108,6 +6207,12 @@
if (result =3D=3D ISC_R_NOMORE)
result =3D ISC_R_SUCCESS;
=20
+ log_ns_ttl(fctx, "answer_response");
+
+ if (ns_rdataset !=3D NULL && dns_name_equal(&fctx->domain, ns_name) &&
+ !dns_name_equal(ns_name, dns_rootname))
+ trim_ns_ttl(fctx, ns_name, ns_rdataset);
+
return (result);
}
=20
@@ -6179,6 +6284,9 @@
if (dns_rdataset_isassociated(&fctx->nameservers))
dns_rdataset_disassociate(&fctx->nameservers);
dns_rdataset_clone(fevent->rdataset, &fctx->nameservers);
+ fctx->ns_ttl =3D fctx->nameservers.ttl;
+ fctx->ns_ttl_ok =3D ISC_TRUE;
+ log_ns_ttl(fctx, "resume_dslookup");
dns_name_free(&fctx->domain,
fctx->res->buckets[bucketnum].mctx);
dns_name_init(&fctx->domain, NULL);
@@ -7112,6 +7220,8 @@
fctx_done(fctx, DNS_R_SERVFAIL, __LINE__);
return;
}
+ fctx->ns_ttl =3D fctx->nameservers.ttl;
+ fctx->ns_ttl_ok =3D ISC_TRUE;
fctx_cancelqueries(fctx, ISC_TRUE);
fctx_cleanupfinds(fctx);
fctx_cleanupaltfinds(fctx);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/result.c
--- a/head/contrib/bind9/lib/dns/result.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/result.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007-2011 Internet Systems Consortium, Inc. =
("ISC")
+ * Copyright (C) 2004, 2005, 2007-2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 1998-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: result.c,v 1.132 2011-01-11 23:47:13 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rootns.c
--- a/head/contrib/bind9/lib/dns/rootns.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rootns.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rootns.c,v 1.40 2010-06-18 05:36:24 marka Exp $ */
+/* $Id: rootns.c,v 1.40 2010/06/18 05:36:24 marka Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rpz.c
--- a/head/contrib/bind9/lib/dns/rpz.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rpz.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2011, 2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rpz.c,v 1.7 2011-01-17 04:27:23 marka Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -116,20 +116,17 @@
=20
struct dns_rpz_cidr {
isc_mem_t *mctx;
- isc_boolean_t had_nsdname;
+ isc_boolean_t have_nsdname; /* zone has NSDNAME record */
dns_rpz_cidr_node_t *root;
- dns_name_t ip_name; /* RPZ_IP_ZONE.LOCALHOST. */
+ dns_name_t ip_name; /* RPZ_IP_ZONE.LOCALHOST. */
dns_name_t nsip_name; /* RPZ_NSIP_ZONE.LOCALHOST. */
dns_name_t nsdname_name; /* RPZ_NSDNAME_ZONE.LOCALHOST */
};
=20
-
static isc_boolean_t have_rpz_zones =3D ISC_FALSE;
=20
-
const char *
-dns_rpz_type2str(dns_rpz_type_t type)
-{
+dns_rpz_type2str(dns_rpz_type_t type) {
switch (type) {
case DNS_RPZ_TYPE_QNAME:
return ("QNAME");
@@ -143,31 +140,61 @@
break;
}
FATAL_ERROR(__FILE__, __LINE__,
- "impossible response policy zone type %d", type);
+ "impossible rpz type %d", type);
return ("impossible");
}
=20
-
-
dns_rpz_policy_t
-dns_rpz_str2policy(const char *str)
-{
+dns_rpz_str2policy(const char *str) {
if (str =3D=3D NULL)
return (DNS_RPZ_POLICY_ERROR);
if (!strcasecmp(str, "given"))
return (DNS_RPZ_POLICY_GIVEN);
- if (!strcasecmp(str, "no-op"))
- return (DNS_RPZ_POLICY_NO_OP);
+ if (!strcasecmp(str, "disabled"))
+ return (DNS_RPZ_POLICY_DISABLED);
+ if (!strcasecmp(str, "passthru"))
+ return (DNS_RPZ_POLICY_PASSTHRU);
if (!strcasecmp(str, "nxdomain"))
return (DNS_RPZ_POLICY_NXDOMAIN);
if (!strcasecmp(str, "nodata"))
return (DNS_RPZ_POLICY_NODATA);
if (!strcasecmp(str, "cname"))
return (DNS_RPZ_POLICY_CNAME);
+ /*
+ * Obsolete
+ */
+ if (!strcasecmp(str, "no-op"))
+ return (DNS_RPZ_POLICY_PASSTHRU);
return (DNS_RPZ_POLICY_ERROR);
}
=20
+const char *
+dns_rpz_policy2str(dns_rpz_policy_t policy) {
+ const char *str;
=20
+ switch (policy) {
+ case DNS_RPZ_POLICY_PASSTHRU:
+ str =3D "PASSTHRU";
+ break;
+ case DNS_RPZ_POLICY_NXDOMAIN:
+ str =3D "NXDOMAIN";
+ break;
+ case DNS_RPZ_POLICY_NODATA:
+ str =3D "NODATA";
+ break;
+ case DNS_RPZ_POLICY_RECORD:
+ str =3D "records";
+ break;
+ case DNS_RPZ_POLICY_CNAME:
+ case DNS_RPZ_POLICY_WILDCNAME:
+ str =3D "CNAME";
+ break;
+ default:
+ str =3D "";
+ INSIST(0);
+ }
+ return (str);
+}
=20
/*
* Free the radix tree of a response policy database.
@@ -214,8 +241,6 @@
*cidrp =3D NULL;
}
=20
-
-
/*
* Forget a view's list of policy zones.
*/
@@ -244,20 +269,15 @@
* zone is in at least one view's list of policy zones.
*/
void
-dns_rpz_set_need(isc_boolean_t need)
-{
+dns_rpz_set_need(isc_boolean_t need) {
have_rpz_zones =3D need;
}
=20
-
isc_boolean_t
-dns_rpz_needed(void)
-{
+dns_rpz_needed(void) {
return (have_rpz_zones);
}
=20
-
-
/*
* Start a new radix tree for a response policy zone.
*/
@@ -313,12 +333,13 @@
return (ISC_R_SUCCESS);
}
=20
-
/*
* See if a policy zone has IP, NSIP, or NSDNAME rules or records.
*/
void
dns_rpz_enabled(dns_rpz_cidr_t *cidr, dns_rpz_st_t *st) {
+ if (cidr =3D=3D NULL)
+ return;
if (cidr->root !=3D NULL &&
(cidr->root->flags & DNS_RPZ_CIDR_FG_IP) !=3D 0)
st->state |=3D DNS_RPZ_HAVE_IP;
@@ -328,8 +349,8 @@
if (cidr->root !=3D NULL &&
(cidr->root->flags & DNS_RPZ_CIDR_FG_NSIPv6) !=3D 0)
st->state |=3D DNS_RPZ_HAVE_NSIPv6;
- if (cidr->had_nsdname)
- st->state |=3D DNS_RPZ_HAD_NSDNAME;
+ if (cidr->have_nsdname)
+ st->state |=3D DNS_RPZ_HAVE_NSDNAME;
}
=20
static inline dns_rpz_cidr_flags_t
@@ -350,8 +371,6 @@
}
}
=20
-
-
/*
* Mark a node as having IP or NSIP data and all of its parents
* as members of the IP or NSIP tree.
@@ -371,8 +390,6 @@
}
}
=20
-
-
/*
* Make a radix tree node.
*/
@@ -409,24 +426,18 @@
return (node);
}
=20
-
-
static void
-badname(int level, dns_name_t *name, const char *comment)
-{
+badname(int level, dns_name_t *name, const char *comment) {
char printname[DNS_NAME_FORMATSIZE];
=20
if (isc_log_wouldlog(dns_lctx, level)) {
dns_name_format(name, printname, sizeof(printname));
- isc_log_write(dns_lctx, DNS_LOGCATEGORY_DATABASE,
+ isc_log_write(dns_lctx, DNS_LOGCATEGORY_RPZ,
DNS_LOGMODULE_RBTDB, level,
- "invalid response policy name \"%s\"%s",
- printname, comment);
+ "invalid rpz \"%s\"%s", printname, comment);
}
}
=20
-
-
/*
* Convert an IP address from radix tree binary (host byte order) to
* to its canonical response policy domain name and its name in the
@@ -520,8 +531,6 @@
return (ISC_R_SUCCESS);
}
=20
-
-
/*
* Decide which kind of IP address response policy zone a name is in.
*/
@@ -548,8 +557,6 @@
return (DNS_RPZ_TYPE_QNAME);
}
=20
-
-
/*
* Convert an IP address from canonical response policy domain name form
* to radix tree binary (host byte order).
@@ -695,26 +702,37 @@
return (ISC_R_SUCCESS);
}
=20
-
-
/*
- * find first differing bit
+ * Find first differing bit.
*/
static int
ffbit(dns_rpz_cidr_word_t w) {
int bit;
=20
- if (w =3D=3D 0)
- return (DNS_RPZ_CIDR_WORD_BITS);
- for (bit =3D 0; (w & (1U << (DNS_RPZ_CIDR_WORD_BITS-1))) =3D=3D 0; bit++)
- w <<=3D 1;
+ bit =3D DNS_RPZ_CIDR_WORD_BITS-1;
+ if ((w & 0xffff0000) !=3D 0) {
+ w >>=3D 16;
+ bit -=3D 16;
+ }
+ if ((w & 0xff00) !=3D 0) {
+ w >>=3D 8;
+ bit -=3D 8;
+ }
+ if ((w & 0xf0) !=3D 0) {
+ w >>=3D 4;
+ bit -=3D 4;
+ }
+ if ((w & 0xc) !=3D 0) {
+ w >>=3D 2;
+ bit -=3D 2;
+ }
+ if ((w & 2) !=3D 0)
+ --bit;
return (bit);
}
=20
-
-
/*
- * find the first differing bit in two keys
+ * Find the first differing bit in two keys.
*/
static int
diff_keys(const dns_rpz_cidr_key_t *key1, dns_rpz_cidr_bits_t bits1,
@@ -741,14 +759,12 @@
return (ISC_MIN(bit, maxbit));
}
=20
-
-
/*
* Search a radix tree for an IP address for ordinary lookup
* or for a CIDR block adding or deleting an entry
* The tree read (for simple search) or write lock must be held by the cal=
ler.
*
- * return ISC_R_SUCCESS, ISC_R_NOTFOUND, DNS_R_PARTIALMATCH, ISC_R_EXISTS,
+ * Return ISC_R_SUCCESS, ISC_R_NOTFOUND, DNS_R_PARTIALMATCH, ISC_R_EXISTS,
* ISC_R_NOMEMORY
*/
static isc_result_t
@@ -912,15 +928,12 @@
}
}
=20
-
-
/*
* Add an IP address to the radix tree of a response policy database.
* The tree write lock must be held by the caller.
*/
void
-dns_rpz_cidr_addip(dns_rpz_cidr_t *cidr, dns_name_t *name)
-{
+dns_rpz_cidr_addip(dns_rpz_cidr_t *cidr, dns_name_t *name) {
dns_rpz_cidr_key_t tgt_ip;
dns_rpz_cidr_bits_t tgt_prefix;
dns_rpz_type_t type;
@@ -929,7 +942,7 @@
return;
=20
/*
- * no worries if the new name is not an IP address
+ * No worries if the new name is not an IP address.
*/
type =3D set_type(cidr, name);
switch (type) {
@@ -937,7 +950,7 @@
case DNS_RPZ_TYPE_NSIP:
break;
case DNS_RPZ_TYPE_NSDNAME:
- cidr->had_nsdname =3D ISC_TRUE;
+ cidr->have_nsdname =3D ISC_TRUE;
return;
case DNS_RPZ_TYPE_QNAME:
case DNS_RPZ_TYPE_BAD:
@@ -953,15 +966,12 @@
char printname[DNS_NAME_FORMATSIZE];
=20
dns_name_format(name, printname, sizeof(printname));
- isc_log_write(dns_lctx, DNS_LOGCATEGORY_DATABASE,
+ isc_log_write(dns_lctx, DNS_LOGCATEGORY_RPZ,
DNS_LOGMODULE_RBTDB, DNS_RPZ_ERROR_LEVEL,
- "duplicate response policy name \"%s\"",
- printname);
+ "duplicate rpz name \"%s\"", printname);
}
}
=20
-
-
/*
* Delete an IP address from the radix tree of a response policy database.
* The tree write lock must be held by the caller.
@@ -1000,7 +1010,7 @@
/*
* Do not get excited about the deletion of interior rbt nodes.
*/
- if (ISC_R_SUCCESS !=3D name2ipkey(cidr, DNS_RPZ_DEBUG_LEVEL2, name,
+ if (ISC_R_SUCCESS !=3D name2ipkey(cidr, DNS_RPZ_DEBUG_LEVEL3, name,
type, &tgt_ip, &tgt_prefix))
return;
if (ISC_R_SUCCESS !=3D search(cidr, &tgt_ip, tgt_prefix, type,
@@ -1009,10 +1019,9 @@
char printname[DNS_NAME_FORMATSIZE];
=20
dns_name_format(name, printname, sizeof(printname));
- isc_log_write(dns_lctx, DNS_LOGCATEGORY_DATABASE,
+ isc_log_write(dns_lctx, DNS_LOGCATEGORY_RPZ,
DNS_LOGMODULE_RBTDB, DNS_RPZ_ERROR_LEVEL,
- "missing response policy node \"%s\"",
- printname);
+ "missing rpz node \"%s\"", printname);
}
return;
}
@@ -1073,8 +1082,6 @@
} while (tgt !=3D NULL);
}
=20
-
-
/*
* Caller must hold tree lock.
* Return ISC_R_NOTFOUND
@@ -1124,8 +1131,6 @@
canon_name, search_name));
}
=20
-
-
/*
* Translate CNAME rdata to a QNAME response policy action.
*/
@@ -1148,21 +1153,31 @@
if (dns_name_equal(&cname.cname, dns_rootname))
return (DNS_RPZ_POLICY_NXDOMAIN);
=20
- /*
- * CNAME *. means NODATA
- */
- if (dns_name_countlabels(&cname.cname) =3D=3D 2
- && dns_name_iswildcard(&cname.cname))
- return (DNS_RPZ_POLICY_NODATA);
+ if (dns_name_iswildcard(&cname.cname)) {
+ /*
+ * CNAME *. means NODATA
+ */
+ if (dns_name_countlabels(&cname.cname) =3D=3D 2)
+ return (DNS_RPZ_POLICY_NODATA);
+
+ /*
+ * A qname of www.evil.com and a policy of
+ * *.evil.com CNAME *.garden.net
+ * gives a result of
+ * evil.com CNAME evil.com.garden.net
+ */
+ if (dns_name_countlabels(&cname.cname) > 2)
+ return (DNS_RPZ_POLICY_WILDCNAME);
+ }
=20
/*
* 128.1.0.127.rpz-ip CNAME 128.1.0.0.127. means "do not rewrite"
*/
if (selfname !=3D NULL && dns_name_equal(&cname.cname, selfname))
- return (DNS_RPZ_POLICY_NO_OP);
+ return (DNS_RPZ_POLICY_PASSTHRU);
=20
/*
- * evil.com CNAME garden.net rewrites www.evil.com to www.garden.net.
+ * Any other rdata gives a response consisting of the rdata.
*/
return (DNS_RPZ_POLICY_RECORD);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/rriterator.c
--- a/head/contrib/bind9/lib/dns/rriterator.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/rriterator.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009, 2011, 2012 Internet Systems Consortium, Inc. ("ISC=
")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rriterator.c,v 1.2 2009-06-30 02:52:32 each Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -187,6 +187,8 @@
REQUIRE(name !=3D NULL && *name =3D=3D NULL);
REQUIRE(VALID_RRITERATOR(it));
REQUIRE(it->result =3D=3D ISC_R_SUCCESS);
+ REQUIRE(rdataset =3D=3D NULL || *rdataset =3D=3D NULL);
+ REQUIRE(rdata =3D=3D NULL || *rdata =3D=3D NULL);
=20
*name =3D dns_fixedname_name(&it->fixedname);
*ttl =3D it->rdataset.ttl;
@@ -194,9 +196,9 @@
dns_rdata_reset(&it->rdata);
dns_rdataset_current(&it->rdataset, &it->rdata);
=20
- if (rdataset)
+ if (rdataset !=3D NULL)
*rdataset =3D &it->rdataset;
=20
- if (rdata)
+ if (rdata !=3D NULL)
*rdata =3D &it->rdata;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/sdb.c
--- a/head/contrib/bind9/lib/dns/sdb.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/sdb.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 2000, 2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sdb.c,v 1.76.8.1 2011-03-14 13:40:14 fdupont Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/sdlz.c
--- a/head/contrib/bind9/lib/dns/sdlz.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/sdlz.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Portions Copyright (C) 2005-2011 Internet Systems Consortium, Inc. ("I=
SC")
+ * Portions Copyright (C) 2005-2012 Internet Systems Consortium, Inc. ("I=
SC")
* Portions Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -50,7 +50,7 @@
* USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sdlz.c,v 1.31.8.2 2011-03-21 19:53:34 each Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -1836,7 +1836,11 @@
&lookup->callbacks);
if (result !=3D ISC_R_SUCCESS)
isc_buffer_free(&rdatabuf);
+ if (size >=3D 65535)
+ break;
size *=3D 2;
+ if (size >=3D 65535)
+ size =3D 65535;
} while (result =3D=3D ISC_R_NOSPACE);
=20
if (result !=3D ISC_R_SUCCESS)
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/soa.c
--- a/head/contrib/bind9/lib/dns/soa.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/soa.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: soa.c,v 1.12 2009-09-10 02:18:40 each Exp $ */
+/* $Id: soa.c,v 1.12 2009/09/10 02:18:40 each Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/spnego.asn1
--- a/head/contrib/bind9/lib/dns/spnego.asn1 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/spnego.asn1 Tue Apr 17 11:51:51 2012 +0300
@@ -4,7 +4,7 @@
=20
-- (The above copyright notice is per RFC 3978 5.6 (a), q.v.)
=20
--- $Id: spnego.asn1,v 1.2 2006-12-04 01:52:46 marka Exp $
+-- $Id: spnego.asn1,v 1.2 2006/12/04 01:52:46 marka Exp $
=20
-- This is the SPNEGO ASN.1 module from RFC 4178, tweaked
-- to get the Heimdal ASN.1 compiler to accept it.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/spnego.c
--- a/head/contrib/bind9/lib/dns/spnego.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/spnego.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2006-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2006-2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: spnego.c,v 1.16.10.2 2011-04-04 11:10:57 marka Exp $ */
+/* $Id$ */
=20
/*! \file
* \brief
@@ -948,8 +948,9 @@
e =3D der_get_length(p, len, length_ret, &l);
if (e)
return (e);
- p +=3D l;
+ /* p +=3D l; */
len -=3D l;
+ POST(len);
ret +=3D l;
if (size)
*size =3D ret;
@@ -980,6 +981,7 @@
return (e);
p +=3D l;
len -=3D l;
+ POST(p); POST(len);
ret +=3D l;
if (size)
*size =3D ret;
@@ -1016,6 +1018,7 @@
return (e);
p +=3D l;
len -=3D l;
+ POST(p); POST(len);
ret +=3D l;
if (size)
*size =3D ret;
@@ -1052,6 +1055,7 @@
return (e);
p +=3D l;
len -=3D l;
+ POST(p); POST(len);
ret +=3D l;
if (size)
*size =3D ret;
@@ -1198,6 +1202,7 @@
return (ASN1_OVERFLOW);
p -=3D data->length;
len -=3D data->length;
+ POST(len);
memcpy(p + 1, data->data, data->length);
*size =3D data->length;
return (0);
@@ -1263,6 +1268,7 @@
return (e);
p -=3D l;
len -=3D l;
+ POST(p); POST(len);
ret +=3D l;
*size =3D ret;
return (0);
@@ -1287,6 +1293,7 @@
return (e);
p -=3D l;
len -=3D l;
+ POST(p); POST(len);
ret +=3D l;
*size =3D ret;
return (0);
@@ -1311,6 +1318,7 @@
return (e);
p -=3D l;
len -=3D l;
+ POST(p); POST(len);
ret +=3D l;
*size =3D ret;
return (0);
@@ -1335,6 +1343,7 @@
return (e);
p -=3D l;
len -=3D l;
+ POST(p); POST(len);
ret +=3D l;
*size =3D ret;
return (0);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/spnego.h
--- a/head/contrib/bind9/lib/dns/spnego.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/spnego.h Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: spnego.h,v 1.4 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: spnego.h,v 1.4 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file
* \brief
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/spnego_asn1=
.c
--- a/head/contrib/bind9/lib/dns/spnego_asn1.c Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/dns/spnego_asn1.c Tue Apr 17 11:51:51 2012 +03=
00
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: spnego_asn1.c,v 1.4 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: spnego_asn1.c,v 1.4 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file
* \brief Method routines generated from SPNEGO ASN.1 module.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/spnego_asn1=
.pl
--- a/head/contrib/bind9/lib/dns/spnego_asn1.pl Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/dns/spnego_asn1.pl Tue Apr 17 11:51:51 2012 +0=
300
@@ -14,7 +14,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: spnego_asn1.pl,v 1.4 2007-06-19 23:47:16 tbox Exp $
+# $Id: spnego_asn1.pl,v 1.4 2007/06/19 23:47:16 tbox Exp $
=20
# Our SPNEGO implementation uses some functions generated by the
# Heimdal ASN.1 compiler, which this script then whacks a bit to make
@@ -99,7 +99,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: spnego_asn1.pl,v 1.4 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: spnego_asn1.pl,v 1.4 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file
* \brief Method routines generated from SPNEGO ASN.1 module.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/ssu.c
--- a/head/contrib/bind9/lib/dns/ssu.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/ssu.c Tue Apr 17 11:51:51 2012 +0300
@@ -17,7 +17,7 @@
=20
/*! \file */
/*
- * $Id: ssu.c,v 1.38 2011-01-06 23:47:00 tbox Exp $
+ * $Id: ssu.c,v 1.38 2011/01/06 23:47:00 tbox Exp $
* Principal Author: Brian Wellington
*/
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/ssu_externa=
l.c
--- a/head/contrib/bind9/lib/dns/ssu_external.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/dns/ssu_external.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2011, 2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ssu_external.c,v 1.7.8.1 2011-03-21 19:53:34 each Exp $ */
+/* $Id$ */
=20
/*
* This implements external update-policy rules. This allows permission
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/stats.c
--- a/head/contrib/bind9/lib/dns/stats.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/stats.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: stats.c,v 1.18 2009-01-27 23:47:54 tbox Exp $ */
+/* $Id: stats.c,v 1.18 2009/01/27 23:47:54 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/tcpmsg.c
--- a/head/contrib/bind9/lib/dns/tcpmsg.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/tcpmsg.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: tcpmsg.c,v 1.31 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: tcpmsg.c,v 1.31 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/time.c
--- a/head/contrib/bind9/lib/dns/time.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/time.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2009-2011 Internet Systems Consortium,=
Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2009-2012 Internet Systems Consortium,=
Inc. ("ISC")
* Copyright (C) 1998-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: time.c,v 1.35.132.2 2011-03-09 23:46:55 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -103,8 +103,8 @@
return (ISC_R_SUCCESS);
}
=20
-isc_result_t
-dns_time32_totext(isc_uint32_t value, isc_buffer_t *target) {
+isc_int64_t
+dns_time64_from32(isc_uint32_t value) {
isc_stdtime_t now;
isc_int64_t start;
isc_int64_t t;
@@ -121,7 +121,13 @@
t =3D start + (value - now);
else
t =3D start - (now - value);
- return (dns_time64_totext(t, target));
+
+ return (t);
+}
+
+isc_result_t
+dns_time32_totext(isc_uint32_t value, isc_buffer_t *target) {
+ return (dns_time64_totext(dns_time64_from32(value), target));
}
=20
isc_result_t
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/timer.c
--- a/head/contrib/bind9/lib/dns/timer.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/timer.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: timer.c,v 1.7 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: timer.c,v 1.7 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/tkey.c
--- a/head/contrib/bind9/lib/dns/tkey.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/tkey.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -16,7 +16,7 @@
*/
=20
/*
- * $Id: tkey.c,v 1.100.12.1 2011-03-11 06:47:05 marka Exp $
+ * $Id$
*/
/*! \file */
#include <config.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/tsec.c
--- a/head/contrib/bind9/lib/dns/tsec.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/tsec.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: tsec.c,v 1.7 2010-12-09 00:54:34 marka Exp $ */
+/* $Id: tsec.c,v 1.7 2010/12/09 00:54:34 marka Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/tsig.c
--- a/head/contrib/bind9/lib/dns/tsig.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/tsig.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -16,7 +16,7 @@
*/
=20
/*
- * $Id: tsig.c,v 1.147.10.1 2011-03-21 19:53:34 each Exp $
+ * $Id$
*/
/*! \file */
#include <config.h>
@@ -889,6 +889,7 @@
isc_result_t ret;
unsigned char badtimedata[BADTIMELEN];
unsigned int sigsize =3D 0;
+ isc_boolean_t response =3D is_response(msg);
=20
REQUIRE(msg !=3D NULL);
REQUIRE(VALID_TSIG_KEY(dns_message_gettsigkey(msg)));
@@ -896,7 +897,7 @@
/*
* If this is a response, there should be a query tsig.
*/
- if (is_response(msg) && msg->querytsig =3D=3D NULL)
+ if (response && msg->querytsig =3D=3D NULL)
return (DNS_R_EXPECTEDTSIG);
=20
dynbuf =3D NULL;
@@ -919,7 +920,7 @@
=20
isc_buffer_init(&databuf, data, sizeof(data));
=20
- if (is_response(msg))
+ if (response)
tsig.error =3D msg->querytsigstatus;
else
tsig.error =3D dns_rcode_noerror;
@@ -948,7 +949,7 @@
/*
* If this is a response, digest the query signature.
*/
- if (is_response(msg)) {
+ if (response) {
dns_rdata_t querytsigrdata =3D DNS_RDATA_INIT;
=20
ret =3D dns_rdataset_first(msg->querytsig);
@@ -1017,8 +1018,10 @@
}
/* Digest the timesigned and fudge */
isc_buffer_clear(&databuf);
- if (tsig.error =3D=3D dns_tsigerror_badtime)
+ if (tsig.error =3D=3D dns_tsigerror_badtime) {
+ INSIST(response);
tsig.timesigned =3D querytsig.timesigned;
+ }
isc_buffer_putuint48(&databuf, tsig.timesigned);
isc_buffer_putuint16(&databuf, tsig.fudge);
isc_buffer_usedregion(&databuf, &r);
@@ -1040,7 +1043,7 @@
goto cleanup_context;
=20
/*
- * Digest the error and other data.
+ * Digest other data.
*/
if (tsig.otherlen > 0) {
r.length =3D tsig.otherlen;
@@ -1068,7 +1071,7 @@
digestbits =3D dst_key_getbits(key->key);
if (digestbits !=3D 0) {
unsigned int bytes =3D (digestbits + 1) / 8;
- if (is_response(msg) && bytes < querytsig.siglen)
+ if (response && bytes < querytsig.siglen)
bytes =3D querytsig.siglen;
if (bytes > isc_buffer_usedlength(&sigbuf))
bytes =3D isc_buffer_usedlength(&sigbuf);
@@ -1170,10 +1173,12 @@
isc_uint16_t addcount, id;
unsigned int siglen;
unsigned int alg;
+ isc_boolean_t response;
=20
REQUIRE(source !=3D NULL);
REQUIRE(DNS_MESSAGE_VALID(msg));
tsigkey =3D dns_message_gettsigkey(msg);
+ response =3D is_response(msg);
=20
REQUIRE(tsigkey =3D=3D NULL || VALID_TSIG_KEY(tsigkey));
=20
@@ -1195,8 +1200,7 @@
* If this is a response and there's no key or query TSIG, there
* shouldn't be one on the response.
*/
- if (is_response(msg) &&
- (tsigkey =3D=3D NULL || msg->querytsig =3D=3D NULL))
+ if (response && (tsigkey =3D=3D NULL || msg->querytsig =3D=3D NULL))
return (DNS_R_UNEXPECTEDTSIG);
=20
mctx =3D msg->mctx;
@@ -1215,7 +1219,7 @@
if (ret !=3D ISC_R_SUCCESS)
return (ret);
dns_rdata_reset(&rdata);
- if (is_response(msg)) {
+ if (response) {
ret =3D dns_rdataset_first(msg->querytsig);
if (ret !=3D ISC_R_SUCCESS)
return (ret);
@@ -1228,7 +1232,7 @@
/*
* Do the key name and algorithm match that of the query?
*/
- if (is_response(msg) &&
+ if (response &&
(!dns_name_equal(keyname, &tsigkey->name) ||
!dns_name_equal(&tsig.algorithm, &querytsig.algorithm))) {
msg->tsigstatus =3D dns_tsigerror_badkey;
@@ -1326,7 +1330,7 @@
if (ret !=3D ISC_R_SUCCESS)
return (ret);
=20
- if (is_response(msg)) {
+ if (response) {
isc_buffer_init(&databuf, data, sizeof(data));
isc_buffer_putuint16(&databuf, querytsig.siglen);
isc_buffer_usedregion(&databuf, &r);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/ttl.c
--- a/head/contrib/bind9/lib/dns/ttl.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/ttl.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2011 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ttl.c,v 1.29.814.2 2011-03-12 04:59:18 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/validator.c
--- a/head/contrib/bind9/lib/dns/validator.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/validator.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 2000-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: validator.c,v 1.197.14.7 2011-06-08 23:02:43 each Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
@@ -846,7 +846,7 @@
* Return ISC_R_IGNORE when the NSEC is not the appropriate one.
*/
static isc_result_t
-nsecnoexistnodata(dns_validator_t *val, dns_name_t* name, dns_name_t *nsec=
name,
+nsecnoexistnodata(dns_validator_t *val, dns_name_t *name, dns_name_t *nsec=
name,
dns_rdataset_t *nsecset, isc_boolean_t *exists,
isc_boolean_t *data, dns_name_t *wild)
{
@@ -887,9 +887,11 @@
=20
if (order =3D=3D 0) {
/*
- * The names are the same.
+ * The names are the same. If we are validating "."
+ * then atparent should not be set as there is no parent.
*/
- atparent =3D dns_rdatatype_atparent(val->event->type);
+ atparent =3D (olabels !=3D 1) &&
+ dns_rdatatype_atparent(val->event->type);
ns =3D dns_nsec_typepresent(&rdata, dns_rdatatype_ns);
soa =3D dns_nsec_typepresent(&rdata, dns_rdatatype_soa);
if (ns && !soa) {
@@ -1920,14 +1922,17 @@
isc_result_t result;
dns_fixedname_t fixed;
isc_boolean_t ignore =3D ISC_FALSE;
+ dns_name_t *wild;
=20
val->attributes |=3D VALATTR_TRIEDVERIFY;
dns_fixedname_init(&fixed);
+ wild =3D dns_fixedname_name(&fixed);
again:
result =3D dns_dnssec_verify2(val->event->name, val->event->rdataset,
- key, ignore, val->view->mctx, rdata,
- dns_fixedname_name(&fixed));
- if (result =3D=3D DNS_R_SIGEXPIRED && val->view->acceptexpired) {
+ key, ignore, val->view->mctx, rdata, wild);
+ if ((result =3D=3D DNS_R_SIGEXPIRED || result =3D=3D DNS_R_SIGFUTURE) &&
+ val->view->acceptexpired)
+ {
ignore =3D ISC_TRUE;
goto again;
}
@@ -1936,14 +1941,29 @@
"accepted expired %sRRSIG (keyid=3D%u)",
(result =3D=3D DNS_R_FROMWILDCARD) ?
"wildcard " : "", keyid);
+ else if (result =3D=3D DNS_R_SIGEXPIRED || result =3D=3D DNS_R_SIGFUTURE)
+ validator_log(val, ISC_LOG_INFO,
+ "verify failed due to bad signature (keyid=3D%u): "
+ "%s", keyid, isc_result_totext(result));
else
validator_log(val, ISC_LOG_DEBUG(3),
"verify rdataset (keyid=3D%u): %s",
keyid, isc_result_totext(result));
if (result =3D=3D DNS_R_FROMWILDCARD) {
- if (!dns_name_equal(val->event->name,
- dns_fixedname_name(&fixed)))
+ if (!dns_name_equal(val->event->name, wild)) {
+ dns_name_t *closest;
+ unsigned int labels;
+
+ /*
+ * Compute the closest encloser in case we need it
+ * for the NSEC3 NOQNAME proof.
+ */
+ closest =3D dns_fixedname_name(&val->closest);
+ dns_name_copy(wild, closest, NULL);
+ labels =3D dns_name_countlabels(closest) - 1;
+ dns_name_getlabelsequence(closest, 1, labels, closest);
val->attributes |=3D VALATTR_NEEDNOQNAME;
+ }
result =3D ISC_R_SUCCESS;
}
return (result);
@@ -2871,9 +2891,9 @@
dns_name_t *name, tname;
isc_result_t result;
isc_boolean_t exists, data, optout, unknown;
- isc_boolean_t setclosest, setnearest;
+ isc_boolean_t setclosest, setnearest, *setclosestp;
dns_fixedname_t fclosest, fnearest, fzonename;
- dns_name_t *closest, *nearest, *zonename;
+ dns_name_t *closest, *nearest, *zonename, *closestp;
dns_name_t **proofs =3D val->event->proofs;
dns_rdataset_t *rdataset, trdataset;
=20
@@ -2920,6 +2940,25 @@
if (dns_name_countlabels(zonename) =3D=3D 0)
return (ISC_R_SUCCESS);
=20
+ /*
+ * If the val->closest is set then we want to use it otherwise
+ * we need to discover it.
+ */
+ if (dns_name_countlabels(dns_fixedname_name(&val->closest)) !=3D 0) {
+ char namebuf[DNS_NAME_FORMATSIZE];
+
+ dns_name_format(dns_fixedname_name(&val->closest),
+ namebuf, sizeof(namebuf));
+ validator_log(val, ISC_LOG_DEBUG(3), "closest encloser from "
+ "wildcard signature '%s'", namebuf);
+ dns_name_copy(dns_fixedname_name(&val->closest), closest, NULL);
+ closestp =3D NULL;
+ setclosestp =3D NULL;
+ } else {
+ closestp =3D closest;
+ setclosestp =3D &setclosest;
+ }
+
for (result =3D val_rdataset_first(val, &name, &rdataset);
result =3D=3D ISC_R_SUCCESS;
result =3D val_rdataset_next(val, &name, &rdataset))
@@ -2937,8 +2976,8 @@
unknown =3D ISC_FALSE;
(void)nsec3noexistnodata(val, val->event->name, name, rdataset,
zonename, &exists, &data, &optout,
- &unknown, &setclosest, &setnearest,
- closest, nearest);
+ &unknown, setclosestp, &setnearest,
+ closestp, nearest);
if (setclosest)
proofs[DNS_VALIDATOR_CLOSESTENCLOSER] =3D name;
if (unknown)
@@ -3704,9 +3743,8 @@
result =3D ISC_R_SUCCESS;
goto out;
}
- result =3D startfinddlvsep(val,
- dns_fixedname_name(&val->fname));
- goto out;
+ return(startfinddlvsep(val,
+ dns_fixedname_name(&val->fname)));
}
val->labels++;
}
@@ -3842,8 +3880,7 @@
result =3D ISC_R_SUCCESS;
goto out;
}
- result =3D startfinddlvsep(val, tname);
- goto out;
+ return(startfinddlvsep(val, tname));
}
continue;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/version.c
--- a/head/contrib/bind9/lib/dns/version.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/version.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: version.c,v 1.15 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: version.c,v 1.15 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/view.c
--- a/head/contrib/bind9/lib/dns/view.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/view.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: view.c,v 1.178.8.1 2011-03-11 06:47:06 marka Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -1713,6 +1713,9 @@
dns_view_issecuredomain(dns_view_t *view, dns_name_t *name,
isc_boolean_t *secure_domain) {
REQUIRE(DNS_VIEW_VALID(view));
+
+ if (view->secroots_priv =3D=3D NULL)
+ return (ISC_R_NOTFOUND);
return (dns_keytable_issecuredomain(view->secroots_priv, name,
secure_domain));
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/xfrin.c
--- a/head/contrib/bind9/lib/dns/xfrin.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/xfrin.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2008, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2008, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: xfrin.c,v 1.166.522.4 2011-03-11 06:47:06 marka Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/zone.c
--- a/head/contrib/bind9/lib/dns/zone.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/zone.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: zone.c,v 1.582.8.26 2011-08-09 02:34:24 marka Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -74,6 +74,7 @@
#include <dns/soa.h>
#include <dns/ssu.h>
#include <dns/stats.h>
+#include <dns/time.h>
#include <dns/tsig.h>
#include <dns/xfrin.h>
#include <dns/zone.h>
@@ -136,6 +137,7 @@
typedef struct dns_stub dns_stub_t;
typedef struct dns_load dns_load_t;
typedef struct dns_forward dns_forward_t;
+typedef ISC_LIST(dns_forward_t) dns_forwardlist_t;
typedef struct dns_io dns_io_t;
typedef ISC_LIST(dns_io_t) dns_iolist_t;
typedef struct dns_signing dns_signing_t;
@@ -336,6 +338,11 @@
* whether a rpz radix was needed when last loaded
*/
isc_boolean_t rpz_zone;
+
+ /*%
+ * Outstanding forwarded UPDATE requests.
+ */
+ dns_forwardlist_t forwards;
};
=20
#define DNS_ZONE_FLAG(z,f) (ISC_TF(((z)->flags & (f)) !=3D 0))
@@ -500,6 +507,7 @@
isc_sockaddr_t addr;
dns_updatecallback_t callback;
void *callback_arg;
+ ISC_LINK(dns_forward_t) link;
};
=20
/*%
@@ -659,10 +667,6 @@
static void zone_maintenance(dns_zone_t *zone);
static void zone_notify(dns_zone_t *zone, isc_time_t *now);
static void dump_done(void *arg, isc_result_t result);
-static isc_boolean_t dns_zonemgr_unreachable(dns_zonemgr_t *zmgr,
- isc_sockaddr_t *remote,
- isc_sockaddr_t *local,
- isc_time_t *now);
static isc_result_t zone_signwithkey(dns_zone_t *zone, dns_secalg_t algori=
thm,
isc_uint16_t keyid, isc_boolean_t delete);
static isc_result_t delete_nsec(dns_db_t *db, dns_dbversion_t *ver,
@@ -851,6 +855,7 @@
zone->privatetype =3D (dns_rdatatype_t)0xffffU;
zone->added =3D ISC_FALSE;
zone->rpz_zone =3D ISC_FALSE;
+ ISC_LIST_INIT(zone->forwards);
=20
zone->magic =3D ZONE_MAGIC;
=20
@@ -3183,7 +3188,7 @@
for (result =3D dns_rriterator_first(&rrit);
result =3D=3D ISC_R_SUCCESS;
result =3D dns_rriterator_nextrrset(&rrit)) {
- dns_rdataset_t *rdataset;
+ dns_rdataset_t *rdataset =3D NULL;
dns_name_t *rrname =3D NULL;
isc_uint32_t ttl;
=20
@@ -3319,7 +3324,11 @@
zone->masterfile,
dns_result_totext(result));
} else {
- dns_zone_log(zone, ISC_LOG_ERROR,
+ int level =3D ISC_LOG_ERROR;
+ if (zone->type =3D=3D dns_zone_key &&
+ result =3D=3D ISC_R_FILENOTFOUND)
+ level =3D ISC_LOG_DEBUG(1);
+ dns_zone_log(zone, level,
"loading from master file %s failed: %s",
zone->masterfile,
dns_result_totext(result));
@@ -3388,9 +3397,7 @@
needdump =3D ISC_TRUE;
}
=20
- zone->loadtime =3D loadtime;
-
- dns_zone_log(zone, ISC_LOG_DEBUG(1), "loaded");
+ dns_zone_log(zone, ISC_LOG_DEBUG(1), "loaded; checking validity");
/*
* Obtain ns, soa and cname counts for top of zone.
*/
@@ -3635,6 +3642,7 @@
dns_zone_log(zone, ISC_LOG_INFO, "loaded serial %u%s", serial,
dns_db_issecure(db) ? " (DNSSEC signed)" : "");
=20
+ zone->loadtime =3D loadtime;
return (result);
=20
cleanup:
@@ -3988,6 +3996,26 @@
UNLOCK_ZONE(source);
}
=20
+isc_result_t
+dns_zone_synckeyzone(dns_zone_t *zone) {
+ isc_result_t result;
+ dns_db_t *db =3D NULL;
+
+ if (zone->type !=3D dns_zone_key)
+ return (DNS_R_BADZONE);
+
+ CHECK(dns_zone_getdb(zone, &db));
+
+ LOCK_ZONE(zone);
+ result =3D sync_keyzone(zone, db);
+ UNLOCK_ZONE(zone);
+
+ failure:
+ if (db !=3D NULL)
+ dns_db_detach(&db);
+ return (result);
+}
+
static void
zone_iattach(dns_zone_t *source, dns_zone_t **target) {
=20
@@ -4486,8 +4514,6 @@
return (dumping);
}
=20
-#define MAXZONEKEYS 10
-
static isc_result_t
find_zone_keys(dns_zone_t *zone, dns_db_t *db, dns_dbversion_t *ver,
isc_mem_t *mctx, unsigned int maxkeys,
@@ -4604,11 +4630,10 @@
isc_result_t result;
dns_dbnode_t *node =3D NULL;
dns_rdataset_t rdataset;
- dns_rdata_t rdata =3D DNS_RDATA_INIT;
unsigned int i;
dns_rdata_rrsig_t rrsig;
isc_boolean_t found, changed;
- isc_stdtime_t warn =3D 0, maybe =3D 0;
+ isc_int64_t warn =3D 0, maybe =3D 0;
=20
dns_rdataset_init(&rdataset);
=20
@@ -4637,6 +4662,8 @@
for (result =3D dns_rdataset_first(&rdataset);
result =3D=3D ISC_R_SUCCESS;
result =3D dns_rdataset_next(&rdataset)) {
+ dns_rdata_t rdata =3D DNS_RDATA_INIT;
+
dns_rdataset_current(&rdataset, &rdata);
result =3D dns_rdata_tostruct(&rdata, &rrsig, NULL);
RUNTIME_CHECK(result =3D=3D ISC_R_SUCCESS);
@@ -4648,7 +4675,6 @@
rdataset.ttl, &rdata);
if (incremental)
changed =3D ISC_TRUE;
- dns_rdata_reset(&rdata);
if (result !=3D ISC_R_SUCCESS)
break;
} else {
@@ -4709,21 +4735,20 @@
* iff there is a new offline signature.
*/
if (!dst_key_isprivate(keys[i])) {
- if (warn !=3D 0 &&
- warn > rrsig.timeexpire)
- warn =3D rrsig.timeexpire;
+ isc_int64_t timeexpire =3D
+ dns_time64_from32(rrsig.timeexpire);
+ if (warn !=3D 0 && warn > timeexpire)
+ warn =3D timeexpire;
if (rdata.flags & DNS_RDATA_OFFLINE) {
if (maybe =3D=3D 0 ||
- maybe > rrsig.timeexpire)
- maybe =3D
- rrsig.timeexpire;
+ maybe > timeexpire)
+ maybe =3D timeexpire;
break;
}
if (warn =3D=3D 0)
warn =3D maybe;
- if (warn =3D=3D 0 ||
- warn > rrsig.timeexpire)
- warn =3D rrsig.timeexpire;
+ if (warn =3D=3D 0 || warn > timeexpire)
+ warn =3D timeexpire;
result =3D offline(db, ver, diff, name,
rdataset.ttl, &rdata);
break;
@@ -4744,7 +4769,6 @@
result =3D update_one_rr(db, ver, diff,
DNS_DIFFOP_DELRESIGN, name,
rdataset.ttl, &rdata);
- dns_rdata_reset(&rdata);
if (result !=3D ISC_R_SUCCESS)
break;
}
@@ -4755,8 +4779,18 @@
dns_rdataset_disassociate(&rdataset);
if (result =3D=3D ISC_R_NOMORE)
result =3D ISC_R_SUCCESS;
- if (warn !=3D 0)
- set_key_expiry_warning(zone, warn, now);
+ if (warn > 0) {
+#if defined(STDTIME_ON_32BITS)
+ isc_stdtime_t stdwarn =3D (isc_stdtime_t)warn;
+ if (warn =3D=3D stdwarn)
+#endif
+ set_key_expiry_warning(zone, (isc_stdtime_t)warn, now);
+#if defined(STDTIME_ON_32BITS)
+ else
+ dns_zone_log(zone, ISC_LOG_ERROR,
+ "key expiry warning time out of range");
+#endif
+ }
failure:
if (node !=3D NULL)
dns_db_detachnode(db, &node);
@@ -4869,7 +4903,7 @@
dns_name_t *name;
dns_rdataset_t rdataset;
dns_rdatatype_t covers;
- dst_key_t *zone_keys[MAXZONEKEYS];
+ dst_key_t *zone_keys[DNS_MAXZONEKEYS];
isc_boolean_t check_ksk, keyset_kskonly =3D ISC_FALSE;
isc_result_t result;
isc_stdtime_t now, inception, soaexpire, expire, stop;
@@ -4903,7 +4937,7 @@
goto failure;
}
=20
- result =3D find_zone_keys(zone, db, version, zone->mctx, MAXZONEKEYS,
+ result =3D find_zone_keys(zone, db, version, zone->mctx, DNS_MAXZONEKEYS,
zone_keys, &nkeys);
if (result !=3D ISC_R_SUCCESS) {
dns_zone_log(zone, ISC_LOG_ERROR,
@@ -5761,7 +5795,7 @@
dns_rdataset_t rdataset;
dns_nsec3chain_t *nsec3chain =3D NULL, *nextnsec3chain;
dns_nsec3chainlist_t cleanup;
- dst_key_t *zone_keys[MAXZONEKEYS];
+ dst_key_t *zone_keys[DNS_MAXZONEKEYS];
isc_int32_t signatures;
isc_boolean_t check_ksk, keyset_kskonly;
isc_boolean_t delegation;
@@ -5813,7 +5847,7 @@
}
=20
result =3D find_zone_keys(zone, db, version, zone->mctx,
- MAXZONEKEYS, zone_keys, &nkeys);
+ DNS_MAXZONEKEYS, zone_keys, &nkeys);
if (result !=3D ISC_R_SUCCESS) {
dns_zone_log(zone, ISC_LOG_ERROR,
"zone_nsec3chain:find_zone_keys -> %s\n",
@@ -6592,7 +6626,7 @@
dns_rdataset_t rdataset;
dns_signing_t *signing, *nextsigning;
dns_signinglist_t cleanup;
- dst_key_t *zone_keys[MAXZONEKEYS];
+ dst_key_t *zone_keys[DNS_MAXZONEKEYS];
isc_int32_t signatures;
isc_boolean_t check_ksk, keyset_kskonly, is_ksk;
isc_boolean_t commit =3D ISC_FALSE;
@@ -6638,7 +6672,7 @@
}
=20
result =3D find_zone_keys(zone, db, version, zone->mctx,
- MAXZONEKEYS, zone_keys, &nkeys);
+ DNS_MAXZONEKEYS, zone_keys, &nkeys);
if (result !=3D ISC_R_SUCCESS) {
dns_zone_log(zone, ISC_LOG_ERROR,
"zone_sign:find_zone_keys -> %s\n",
@@ -7272,8 +7306,7 @@
=20
if (dst_key_alg(dstkey) =3D=3D sig.algorithm &&
(dst_key_id(dstkey) =3D=3D sig.keyid ||
- (sig.algorithm !=3D 1 && sig.keyid =3D=3D
- ((dst_key_id(dstkey) + 128) & 0xffff)))) {
+ dst_key_rid(dstkey) =3D=3D sig.keyid)) {
result =3D dns_dnssec_verify2(keyname,
&kfetch->dnskeyset,
dstkey, ISC_FALSE, mctx, &sigrr,
@@ -7771,6 +7804,7 @@
dns_rdata_keydata_t kd;
isc_stdtime_t now;
isc_boolean_t commit =3D ISC_FALSE;
+ isc_boolean_t fetching =3D ISC_FALSE, fetch_err =3D ISC_FALSE;
=20
ENTER;
REQUIRE(zone->db !=3D NULL);
@@ -7799,16 +7833,14 @@
result =3D=3D ISC_R_SUCCESS;
result =3D dns_rriterator_nextrrset(&rrit)) {
isc_stdtime_t timer =3D 0xffffffff;
+ dns_name_t *name =3D NULL, *kname =3D NULL;
+ dns_rdataset_t *kdset =3D NULL;
dns_keyfetch_t *kfetch;
- dns_rdataset_t *kdset;
- dns_name_t *name =3D NULL;
isc_uint32_t ttl;
=20
dns_rriterator_current(&rrit, &name, &ttl, &kdset, NULL);
- if (!dns_rdataset_isassociated(kdset))
- continue;
-
- if (kdset->type !=3D dns_rdatatype_keydata)
+ if (kdset =3D=3D NULL || kdset->type !=3D dns_rdatatype_keydata ||
+ !dns_rdataset_isassociated(kdset))
continue;
=20
/*
@@ -7843,15 +7875,19 @@
if (timer > now)
continue;
=20
+ kfetch =3D isc_mem_get(zone->mctx, sizeof(dns_keyfetch_t));
+ if (kfetch =3D=3D NULL) {
+ fetch_err =3D ISC_TRUE;
+ goto failure;
+ }
+
zone->refreshkeycount++;
-
- kfetch =3D isc_mem_get(zone->mctx, sizeof(dns_keyfetch_t));
kfetch->zone =3D zone;
zone->irefs++;
INSIST(zone->irefs !=3D 0);
dns_fixedname_init(&kfetch->name);
- dns_name_dup(name, zone->mctx,
- dns_fixedname_name(&kfetch->name));
+ kname =3D dns_fixedname_name(&kfetch->name);
+ dns_name_dup(name, zone->mctx, kname);
dns_rdataset_init(&kfetch->dnskeyset);
dns_rdataset_init(&kfetch->dnskeysigset);
dns_rdataset_init(&kfetch->keydataset);
@@ -7860,25 +7896,59 @@
dns_db_attach(db, &kfetch->db);
kfetch->fetch =3D NULL;
=20
- dns_resolver_createfetch(zone->view->resolver,
- dns_fixedname_name(&kfetch->name),
- dns_rdatatype_dnskey,
- NULL, NULL, NULL,
- DNS_FETCHOPT_NOVALIDATE,
- zone->task, keyfetch_done, kfetch,
- &kfetch->dnskeyset,
- &kfetch->dnskeysigset,
- &kfetch->fetch);
+ result =3D dns_resolver_createfetch(zone->view->resolver,
+ kname, dns_rdatatype_dnskey,
+ NULL, NULL, NULL,
+ DNS_FETCHOPT_NOVALIDATE,
+ zone->task,
+ keyfetch_done, kfetch,
+ &kfetch->dnskeyset,
+ &kfetch->dnskeysigset,
+ &kfetch->fetch);
+ if (result =3D=3D ISC_R_SUCCESS)
+ fetching =3D ISC_TRUE;
+ else {
+ zone->refreshkeycount--;
+ zone->irefs--;
+ dns_db_detach(&kfetch->db);
+ dns_rdataset_disassociate(&kfetch->keydataset);
+ dns_name_free(kname, zone->mctx);
+ isc_mem_put(zone->mctx, kfetch, sizeof(dns_keyfetch_t));
+ dns_zone_log(zone, ISC_LOG_WARNING,
+ "Failed to create fetch for "
+ "DNSKEY update");
+ fetch_err =3D ISC_TRUE;
+ }
}
if (!ISC_LIST_EMPTY(diff.tuples)) {
CHECK(increment_soa_serial(db, ver, &diff, zone->mctx));
- CHECK(zone_journal(zone, &diff, "sync_keyzone"));
+ CHECK(zone_journal(zone, &diff, "zone_refreshkeys"));
commit =3D ISC_TRUE;
DNS_ZONE_SETFLAG(zone, DNS_ZONEFLG_LOADED);
zone_needdump(zone, 30);
}
=20
failure:
+ if (fetch_err) {
+ /*
+ * Error during a key fetch; retry in an hour.
+ */
+ isc_time_t timenow, timethen;
+ char timebuf[80];
+
+ TIME_NOW(&timenow);
+ DNS_ZONE_TIME_ADD(&timenow, HOUR, &timethen);
+ zone->refreshkeytime =3D timethen;
+ zone_settimer(zone, &timenow);
+
+ isc_time_formattimestamp(&zone->refreshkeytime, timebuf, 80);
+ dns_zone_log(zone, ISC_LOG_DEBUG(1), "retry key refresh: %s",
+ timebuf);
+
+ if (!fetching)
+ DNS_ZONE_CLRFLAG(zone, DNS_ZONEFLG_REFRESHING);
+ }
+
UNLOCK_ZONE(zone);
=20
dns_diff_clear(&diff);
@@ -7903,7 +7973,7 @@
* Configuring the view of this zone may have
* failed, for example because the config file
* had a syntax error. In that case, the view
- * adb or resolver, and we had better not try
+ * db or resolver will be NULL, and we had better not try
* to do maintenance on it.
*/
if (zone->view =3D=3D NULL || zone->view->adb =3D=3D NULL)
@@ -8435,6 +8505,24 @@
}
=20
static void
+forward_cancel(dns_zone_t *zone) {
+ dns_forward_t *forward;
+
+ /*
+ * 'zone' locked by caller.
+ */
+
+ REQUIRE(LOCKED_ZONE(zone));
+
+ for (forward =3D ISC_LIST_HEAD(zone->forwards);
+ forward !=3D NULL;
+ forward =3D ISC_LIST_NEXT(forward, link)) {
+ if (forward->request !=3D NULL)
+ dns_request_cancel(forward->request);
+ }
+}
+
+static void
zone_unload(dns_zone_t *zone) {
=20
/*
@@ -9404,7 +9492,7 @@
dns_rdata_t rdata =3D DNS_RDATA_INIT;
dns_rdata_soa_t soa;
isc_result_t result;
- isc_uint32_t serial, oldserial;
+ isc_uint32_t serial, oldserial =3D 0;
unsigned int j;
=20
zone =3D revent->ev_arg;
@@ -9446,7 +9534,8 @@
if (!dns_zonemgr_unreachable(zone->zmgr,
&zone->masteraddr,
&zone->sourceaddr,
- &now)) {
+ &now))
+ {
LOCK_ZONE(zone);
DNS_ZONE_SETFLAG(zone,
DNS_ZONEFLG_SOABEFOREAXFR);
@@ -9640,7 +9729,8 @@
DNS_ZONE_FLAG(zone, DNS_ZONEFLG_FORCEXFER) ||
isc_serial_gt(serial, oldserial)) {
if (dns_zonemgr_unreachable(zone->zmgr, &zone->masteraddr,
- &zone->sourceaddr, &now)) {
+ &zone->sourceaddr, &now))
+ {
dns_zone_log(zone, ISC_LOG_INFO,
"refresh: skipping %s as master %s "
"(source %s) is unreachable (cached)",
@@ -10344,6 +10434,7 @@
REQUIRE(DNS_ZONE_VALID(zone));
INSIST(event->ev_type =3D=3D DNS_EVENT_ZONECONTROL);
INSIST(isc_refcount_current(&zone->erefs) =3D=3D 0);
+
zone_debuglog(zone, "zone_shutdown", 3, "shutting down");
=20
/*
@@ -10402,6 +10493,8 @@
=20
notify_cancel(zone);
=20
+ forward_cancel(zone);
+
if (zone->timer !=3D NULL) {
isc_timer_detach(&zone->timer);
INSIST(zone->irefs > 0);
@@ -10744,6 +10837,7 @@
char fromtext[ISC_SOCKADDR_FORMATSIZE];
int match =3D 0;
isc_netaddr_t netaddr;
+ isc_sockaddr_t local, remote;
=20
REQUIRE(DNS_ZONE_VALID(zone));
=20
@@ -10894,7 +10988,10 @@
return (ISC_R_SUCCESS);
}
zone->notifyfrom =3D *from;
- UNLOCK_ZONE(zone);
+ local =3D zone->masteraddr;
+ remote =3D zone->sourceaddr;
+ UNLOCK_ZONE(zone);
+ dns_zonemgr_unreachabledel(zone->zmgr, &local, &remote);
dns_zone_refresh(zone);
return (ISC_R_SUCCESS);
}
@@ -11916,11 +12013,13 @@
* This transfer finishing freed up a transfer quota slot.
* Let any other zones waiting for quota have it.
*/
+ UNLOCK_ZONE(zone);
RWLOCK(&zone->zmgr->rwlock, isc_rwlocktype_write);
ISC_LIST_UNLINK(zone->zmgr->xfrin_in_progress, zone, statelink);
zone->statelist =3D NULL;
zmgr_resume_xfrs(zone->zmgr, ISC_FALSE);
RWUNLOCK(&zone->zmgr->rwlock, isc_rwlocktype_write);
+ LOCK_ZONE(zone);
=20
/*
* Retry with a different server if necessary.
@@ -12087,7 +12186,8 @@
=20
isc_sockaddr_format(&zone->masteraddr, master, sizeof(master));
if (dns_zonemgr_unreachable(zone->zmgr, &zone->masteraddr,
- &zone->sourceaddr, &now)) {
+ &zone->sourceaddr, &now))
+ {
isc_sockaddr_format(&zone->sourceaddr, source, sizeof(source));
dns_zone_log(zone, ISC_LOG_INFO,
"got_transfer_quota: skipping zone transfer as "
@@ -12227,8 +12327,13 @@
dns_request_destroy(&forward->request);
if (forward->msgbuf !=3D NULL)
isc_buffer_free(&forward->msgbuf);
- if (forward->zone !=3D NULL)
+ if (forward->zone !=3D NULL) {
+ LOCK(&forward->zone->lock);
+ if (ISC_LINK_LINKED(forward, link))
+ ISC_LIST_UNLINK(forward->zone->forwards, forward, link);
+ UNLOCK(&forward->zone->lock);
dns_zone_idetach(&forward->zone);
+ }
isc_mem_putanddetach(&forward->mctx, forward, sizeof(*forward));
}
=20
@@ -12238,6 +12343,12 @@
isc_sockaddr_t src;
=20
LOCK_ZONE(forward->zone);
+
+ if (DNS_ZONE_FLAG(forward->zone, DNS_ZONEFLG_EXITING)) {
+ UNLOCK_ZONE(forward->zone);
+ return (ISC_R_CANCELED);
+ }
+
if (forward->which >=3D forward->zone->masterscnt) {
UNLOCK_ZONE(forward->zone);
return (ISC_R_NOMORE);
@@ -12268,6 +12379,11 @@
forward->zone->task,
forward_callback, forward,
&forward->request);
+ if (result =3D=3D ISC_R_SUCCESS) {
+ if (!ISC_LINK_LINKED(forward, link))
+ ISC_LIST_APPEND(forward->zone->forwards, forward, link);
+ }
+
unlock:
UNLOCK_ZONE(forward->zone);
return (result);
@@ -12394,6 +12510,7 @@
forward->mctx =3D 0;
forward->callback =3D callback;
forward->callback_arg =3D callback_arg;
+ ISC_LINK_INIT(forward, link);
forward->magic =3D FORWARD_MAGIC;
=20
mr =3D dns_message_getrawmessage(msg);
@@ -12676,6 +12793,8 @@
=20
void
dns_zonemgr_shutdown(dns_zonemgr_t *zmgr) {
+ dns_zone_t *zone;
+
REQUIRE(DNS_ZONEMGR_VALID(zmgr));
=20
isc_ratelimiter_shutdown(zmgr->rl);
@@ -12684,6 +12803,18 @@
isc_task_destroy(&zmgr->task);
if (zmgr->zonetasks !=3D NULL)
isc_taskpool_destroy(&zmgr->zonetasks);
+
+ RWLOCK(&zmgr->rwlock, isc_rwlocktype_read);
+ for (zone =3D ISC_LIST_HEAD(zmgr->zones);
+ zone !=3D NULL;
+ zone =3D ISC_LIST_NEXT(zone, link))
+ {
+ LOCK_ZONE(zone);
+ forward_cancel(zone);
+ UNLOCK_ZONE(zone);
+ }
+ RWUNLOCK(&zmgr->rwlock, isc_rwlocktype_read);
+
}
=20
isc_result_t
@@ -12827,12 +12958,22 @@
isc_event_t *e;
=20
/*
+ * If we are exiting just pretend we got quota so the zone will
+ * be cleaned up in the zone's task context.
+ */
+ LOCK_ZONE(zone);
+ if (DNS_ZONE_FLAG(zone, DNS_ZONEFLG_EXITING)) {
+ UNLOCK_ZONE(zone);
+ goto gotquota;
+ }
+
+ /*
* Find any configured information about the server we'd
* like to transfer this zone from.
*/
isc_netaddr_fromsockaddr(&masterip, &zone->masteraddr);
- (void)dns_peerlist_peerbyaddr(zone->view->peers,
- &masterip, &peer);
+ (void)dns_peerlist_peerbyaddr(zone->view->peers, &masterip, &peer);
+ UNLOCK_ZONE(zone);
=20
/*
* Determine the total maximum number of simultaneous
@@ -12856,7 +12997,11 @@
x =3D ISC_LIST_NEXT(x, statelink))
{
isc_netaddr_t xip;
+
+ LOCK_ZONE(x);
isc_netaddr_fromsockaddr(&xip, &x->masteraddr);
+ UNLOCK_ZONE(x);
+
nxfrsin++;
if (isc_netaddr_equal(&xip, &masterip))
nxfrsperns++;
@@ -12869,15 +13014,14 @@
if (nxfrsperns >=3D maxtransfersperns)
return (ISC_R_QUOTA);
=20
+ gotquota:
/*
* We have sufficient quota. Move the zone to the "xfrin_in_progress"
* list and send it an event to let it start the actual transfer in the
* context of its own task.
*/
- e =3D isc_event_allocate(zmgr->mctx, zmgr,
- DNS_EVENT_ZONESTARTXFRIN,
- got_transfer_quota, zone,
- sizeof(isc_event_t));
+ e =3D isc_event_allocate(zmgr->mctx, zmgr, DNS_EVENT_ZONESTARTXFRIN,
+ got_transfer_quota, zone, sizeof(isc_event_t));
if (e =3D=3D NULL)
return (ISC_R_NOMEMORY);
=20
@@ -13049,8 +13193,9 @@
if (result !=3D ISC_R_SUCCESS)
goto cleanup;
=20
- dns_zone_log(zone, ISC_LOG_WARNING, "saved '%s' as '%s'",
- path, buf);
+ dns_zone_log(zone, ISC_LOG_WARNING, "unable to load from '%s'; "
+ "renaming file to '%s' for failure analysis and "
+ "retransferring.", path, buf);
=20
cleanup:
isc_mem_put(zone->mctx, buf, buflen);
@@ -13113,7 +13258,7 @@
return (zmgr->serialqueryrate);
}
=20
-static isc_boolean_t
+isc_boolean_t
dns_zonemgr_unreachable(dns_zonemgr_t *zmgr, isc_sockaddr_t *remote,
isc_sockaddr_t *local, isc_time_t *now)
{
@@ -13143,6 +13288,43 @@
}
=20
void
+dns_zonemgr_unreachabledel(dns_zonemgr_t *zmgr, isc_sockaddr_t *remote,
+ isc_sockaddr_t *local)
+{
+ unsigned int i;
+ isc_rwlocktype_t locktype;
+ isc_result_t result;
+
+ char master[ISC_SOCKADDR_FORMATSIZE];
+ char source[ISC_SOCKADDR_FORMATSIZE];
+
+ isc_sockaddr_format(remote, master, sizeof(master));
+ isc_sockaddr_format(local, source, sizeof(source));
+
+ REQUIRE(DNS_ZONEMGR_VALID(zmgr));
+
+ locktype =3D isc_rwlocktype_read;
+ RWLOCK(&zmgr->rwlock, locktype);
+ for (i =3D 0; i < UNREACH_CHACHE_SIZE; i++) {
+ if (isc_sockaddr_equal(&zmgr->unreachable[i].remote, remote) &&
+ isc_sockaddr_equal(&zmgr->unreachable[i].local, local)) {
+ result =3D isc_rwlock_tryupgrade(&zmgr->rwlock);
+ if (result =3D=3D ISC_R_SUCCESS) {
+ locktype =3D isc_rwlocktype_write;
+ zmgr->unreachable[i].expire =3D 0;
+ isc_log_write(dns_lctx, DNS_LOGCATEGORY_GENERAL,
+ DNS_LOGMODULE_ZONE, ISC_LOG_INFO,
+ "master %s (source %s) deleted "
+ "from unreachable cache",
+ master, source);
+ }
+ break;
+ }
+ }
+ RWUNLOCK(&zmgr->rwlock, locktype);
+}
+
+void
dns_zonemgr_unreachableadd(dns_zonemgr_t *zmgr, isc_sockaddr_t *remote,
isc_sockaddr_t *local, isc_time_t *now)
{
@@ -13802,11 +13984,11 @@
isc_result_t result;
isc_stdtime_t now, inception, soaexpire;
isc_boolean_t check_ksk, keyset_kskonly;
- dst_key_t *zone_keys[MAXZONEKEYS];
+ dst_key_t *zone_keys[DNS_MAXZONEKEYS];
unsigned int nkeys =3D 0, i;
dns_difftuple_t *tuple;
=20
- result =3D find_zone_keys(zone, db, ver, zone->mctx, MAXZONEKEYS,
+ result =3D find_zone_keys(zone, db, ver, zone->mctx, DNS_MAXZONEKEYS,
zone_keys, &nkeys);
if (result !=3D ISC_R_SUCCESS) {
dns_zone_log(zone, ISC_LOG_ERROR,
@@ -14043,6 +14225,9 @@
CHECK(dns_db_newversion(db, &ver));
CHECK(dns_db_getoriginnode(db, &node));
=20
+ TIME_NOW(&timenow);
+ now =3D isc_time_seconds(&timenow);
+
dns_zone_log(zone, ISC_LOG_INFO, "reconfiguring zone keys");
=20
/* Get the SOA record's TTL */
@@ -14092,7 +14277,8 @@
goto trylater;
}
=20
- /* See if any pre-existing keys have newly become active;
+ /*
+ * See if any pre-existing keys have newly become active;
* also, see if any new key is for a new algorithm, as in that
* event, we need to sign the zone fully. (If there's a new
* key, but it's for an already-existing algorithm, then
@@ -14142,7 +14328,6 @@
dns_db_closeversion(db, &ver, commit);
=20
if (commit) {
- isc_time_t timenow;
dns_difftuple_t *tuple;
=20
LOCK_ZONE(zone);
@@ -14150,7 +14335,6 @@
=20
zone_needdump(zone, DNS_DUMP_DELAY);
=20
- TIME_NOW(&timenow);
zone_settimer(zone, &timenow);
=20
/* Remove any signatures from removed keys. */
@@ -14260,13 +14444,6 @@
UNLOCK_ZONE(zone);
}
=20
- /*
- * If we are doing automatic key maintenance and the key metadata
- * indicates there is a key change event scheduled in the future,
- * set the key refresh timer.
- */
- isc_stdtime_get(&now);
- TIME_NOW(&timenow);
isc_time_settoepoch(&zone->refreshkeytime);
=20
/*
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/zonekey.c
--- a/head/contrib/bind9/lib/dns/zonekey.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/zonekey.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: zonekey.c,v 1.9 2007-06-19 23:47:16 tbox Exp $ */
+/* $Id: zonekey.c,v 1.9 2007/06/19 23:47:16 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/dns/zt.c
--- a/head/contrib/bind9/lib/dns/zt.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/dns/zt.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2007, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: zt.c,v 1.47.814.3 2011-03-19 23:47:24 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/Makefile=
.in
--- a/head/contrib/bind9/lib/export/Makefile.in Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/export/Makefile.in Tue Apr 17 11:51:51 2012 +0=
300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.3 2009-09-02 23:48:02 tbox Exp $
+# $Id: Makefile.in,v 1.3 2009/09/02 23:48:02 tbox Exp $
=20
srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/dns/Make=
file.in
--- a/head/contrib/bind9/lib/export/dns/Makefile.in Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/export/dns/Makefile.in Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2009-2011 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2009-2012 Internet Systems Consortium, Inc. ("ISC")
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.8.14.2 2011-05-16 23:47:16 tbox Exp $
+# $Id$
=20
top_srcdir =3D @top_srcdir@
srcdir =3D @top_srcdir@/lib/dns
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/dns/incl=
ude/Makefile.in
--- a/head/contrib/bind9/lib/export/dns/include/Makefile.in Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/dns/include/Makefile.in Tue Apr 17 11:5=
1:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.3 2009-09-02 23:48:02 tbox Exp $
+# $Id: Makefile.in,v 1.3 2009/09/02 23:48:02 tbox Exp $
=20
srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/dns/incl=
ude/dns/Makefile.in
--- a/head/contrib/bind9/lib/export/dns/include/dns/Makefile.in Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/dns/include/dns/Makefile.in Tue Apr 17 =
11:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.4 2009-09-18 07:18:04 jinmei Exp $
+# $Id: Makefile.in,v 1.4 2009/09/18 07:18:04 jinmei Exp $
=20
srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/dns/incl=
ude/dst/Makefile.in
--- a/head/contrib/bind9/lib/export/dns/include/dst/Makefile.in Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/dns/include/dst/Makefile.in Tue Apr 17 =
11:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.3 2009-09-02 23:48:02 tbox Exp $
+# $Id: Makefile.in,v 1.3 2009/09/02 23:48:02 tbox Exp $
=20
srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/irs/Make=
file.in
--- a/head/contrib/bind9/lib/export/irs/Makefile.in Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/export/irs/Makefile.in Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2009, 2011 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2009, 2011, 2012 Internet Systems Consortium, Inc. ("ISC")
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.4.244.2 2011-05-16 23:47:16 tbox Exp $
+# $Id$
=20
top_srcdir =3D @top_srcdir@
srcdir =3D @top_srcdir@/lib/irs
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/irs/incl=
ude/Makefile.in
--- a/head/contrib/bind9/lib/export/irs/include/Makefile.in Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/irs/include/Makefile.in Tue Apr 17 11:5=
1:51 2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2009, 2011, 2012 Internet Systems Consortium, Inc. ("ISC")
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
@@ -12,9 +12,9 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2009-09-01 00:22:27 jinmei Exp $
+# $Id$
=20
-srcdir =3D @srdir@
+srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
=20
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/irs/incl=
ude/irs/Makefile.in
--- a/head/contrib/bind9/lib/export/irs/include/irs/Makefile.in Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/irs/include/irs/Makefile.in Tue Apr 17 =
11:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.3 2009-09-02 23:48:02 tbox Exp $
+# $Id: Makefile.in,v 1.3 2009/09/02 23:48:02 tbox Exp $
=20
srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isc/Make=
file.in
--- a/head/contrib/bind9/lib/export/isc/Makefile.in Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/export/isc/Makefile.in Tue Apr 17 11:51:51 201=
2 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.8 2010-06-09 23:50:58 tbox Exp $
+# $Id: Makefile.in,v 1.8 2010/06/09 23:50:58 tbox Exp $
=20
top_srcdir =3D @top_srcdir@
srcdir =3D @top_srcdir@/lib/isc
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isc/incl=
ude/Makefile.in
--- a/head/contrib/bind9/lib/export/isc/include/Makefile.in Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/isc/include/Makefile.in Tue Apr 17 11:5=
1:51 2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2009, 2011, 2012 Internet Systems Consortium, Inc. ("ISC")
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
@@ -12,9 +12,9 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2009-09-01 00:22:27 jinmei Exp $
+# $Id$
=20
-srcdir =3D @srdir@
+srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
=20
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isc/incl=
ude/isc/Makefile.in
--- a/head/contrib/bind9/lib/export/isc/include/isc/Makefile.in Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/isc/include/isc/Makefile.in Tue Apr 17 =
11:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.3 2009-12-05 23:31:41 each Exp $
+# $Id: Makefile.in,v 1.3 2009/12/05 23:31:41 each Exp $
=20
srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isc/incl=
ude/isc/bind9.h
--- a/head/contrib/bind9/lib/export/isc/include/isc/bind9.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/isc/include/isc/bind9.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: bind9.h,v 1.2 2009-12-05 23:31:41 each Exp $ */
+/* $Id: bind9.h,v 1.2 2009/12/05 23:31:41 each Exp $ */
=20
#ifndef ISC_BIND9_H
#define ISC_BIND9_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isc/nls/=
Makefile.in
--- a/head/contrib/bind9/lib/export/isc/nls/Makefile.in Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/export/isc/nls/Makefile.in Tue Apr 17 11:51:51=
2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.3 2009-09-02 23:48:02 tbox Exp $
+# $Id: Makefile.in,v 1.3 2009/09/02 23:48:02 tbox Exp $
=20
top_srcdir =3D @top_srcdir@
srcdir =3D @top_srcdir@/lib/isc/nls
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isc/noth=
reads/Makefile.in
--- a/head/contrib/bind9/lib/export/isc/nothreads/Makefile.in Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/isc/nothreads/Makefile.in Tue Apr 17 11=
:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.5 2010-06-09 23:50:58 tbox Exp $
+# $Id: Makefile.in,v 1.5 2010/06/09 23:50:58 tbox Exp $
=20
top_srcdir =3D @top_srcdir@
srcdir =3D @top_srcdir@/lib/isc/nothreads
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isc/noth=
reads/include/Makefile.in
--- a/head/contrib/bind9/lib/export/isc/nothreads/include/Makefile.in Tue A=
pr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/isc/nothreads/include/Makefile.in Tue A=
pr 17 11:51:51 2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2009, 2011, 2012 Internet Systems Consortium, Inc. ("ISC")
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
@@ -12,9 +12,9 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2009-09-01 00:22:27 jinmei Exp $
+# $Id$
=20
-srcdir =3D @srdir@
+srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
=20
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isc/noth=
reads/include/isc/Makefile.in
--- a/head/contrib/bind9/lib/export/isc/nothreads/include/isc/Makefile.in T=
ue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/isc/nothreads/include/isc/Makefile.in T=
ue Apr 17 11:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2009-09-01 00:22:27 jinmei Exp $
+# $Id: Makefile.in,v 1.2 2009/09/01 00:22:27 jinmei Exp $
=20
srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isc/pthr=
eads/Makefile.in
--- a/head/contrib/bind9/lib/export/isc/pthreads/Makefile.in Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/isc/pthreads/Makefile.in Tue Apr 17 11:=
51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.3 2009-09-02 23:48:02 tbox Exp $
+# $Id: Makefile.in,v 1.3 2009/09/02 23:48:02 tbox Exp $
=20
top_srcdir =3D @top_srcdir@
srcdir =3D @top_srcdir@/lib/isc/pthreads
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isc/pthr=
eads/include/Makefile.in
--- a/head/contrib/bind9/lib/export/isc/pthreads/include/Makefile.in Tue Ap=
r 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/isc/pthreads/include/Makefile.in Tue Ap=
r 17 11:51:51 2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2009, 2011, 2012 Internet Systems Consortium, Inc. ("ISC")
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
@@ -12,9 +12,9 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2009-09-01 00:22:27 jinmei Exp $
+# $Id$
=20
-srcdir =3D @srdir@
+srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
=20
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isc/pthr=
eads/include/isc/Makefile.in
--- a/head/contrib/bind9/lib/export/isc/pthreads/include/isc/Makefile.in Tu=
e Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/isc/pthreads/include/isc/Makefile.in Tu=
e Apr 17 11:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2009-09-01 00:22:27 jinmei Exp $
+# $Id: Makefile.in,v 1.2 2009/09/01 00:22:27 jinmei Exp $
=20
srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isc/unix=
/Makefile.in
--- a/head/contrib/bind9/lib/export/isc/unix/Makefile.in Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/export/isc/unix/Makefile.in Tue Apr 17 11:51:5=
1 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.3 2009-09-02 23:48:02 tbox Exp $
+# $Id: Makefile.in,v 1.3 2009/09/02 23:48:02 tbox Exp $
=20
top_srcdir =3D @top_srcdir@
srcdir =3D @top_srcdir@/lib/isc/unix
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isc/unix=
/include/Makefile.in
--- a/head/contrib/bind9/lib/export/isc/unix/include/Makefile.in Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/isc/unix/include/Makefile.in Tue Apr 17=
11:51:51 2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2009, 2011, 2012 Internet Systems Consortium, Inc. ("ISC")
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
@@ -12,9 +12,9 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2009-09-01 00:22:27 jinmei Exp $
+# $Id$
=20
-srcdir =3D @srdir@
+srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
=20
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isc/unix=
/include/isc/Makefile.in
--- a/head/contrib/bind9/lib/export/isc/unix/include/isc/Makefile.in Tue Ap=
r 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/isc/unix/include/isc/Makefile.in Tue Ap=
r 17 11:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2009-09-01 00:22:27 jinmei Exp $
+# $Id: Makefile.in,v 1.2 2009/09/01 00:22:27 jinmei Exp $
=20
srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isccfg/M=
akefile.in
--- a/head/contrib/bind9/lib/export/isccfg/Makefile.in Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/export/isccfg/Makefile.in Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2009, 2011 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2009, 2011, 2012 Internet Systems Consortium, Inc. ("ISC")
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.4.244.2 2011-05-16 23:47:17 tbox Exp $
+# $Id$
=20
top_srcdir =3D @top_srcdir@
srcdir =3D @top_srcdir@/lib/isccfg
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isccfg/i=
nclude/Makefile.in
--- a/head/contrib/bind9/lib/export/isccfg/include/Makefile.in Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/isccfg/include/Makefile.in Tue Apr 17 1=
1:51:51 2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2009, 2011, 2012 Internet Systems Consortium, Inc. ("ISC")
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
@@ -12,9 +12,9 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2009-09-01 00:22:27 jinmei Exp $
+# $Id$
=20
-srcdir =3D @srdir@
+srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
=20
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/isccfg/i=
nclude/isccfg/Makefile.in
--- a/head/contrib/bind9/lib/export/isccfg/include/isccfg/Makefile.in Tue A=
pr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/isccfg/include/isccfg/Makefile.in Tue A=
pr 17 11:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.3 2009-09-02 23:48:02 tbox Exp $
+# $Id: Makefile.in,v 1.3 2009/09/02 23:48:02 tbox Exp $
=20
srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/samples/=
Makefile-postinstall.in
--- a/head/contrib/bind9/lib/export/samples/Makefile-postinstall.in Tue Apr=
17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/samples/Makefile-postinstall.in Tue Apr=
17 11:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile-postinstall.in,v 1.3 2009-09-02 23:48:02 tbox Exp $
+# $Id: Makefile-postinstall.in,v 1.3 2009/09/02 23:48:02 tbox Exp $
=20
srcdir =3D @srcdir@
#prefix =3D @prefix@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/samples/=
Makefile.in
--- a/head/contrib/bind9/lib/export/samples/Makefile.in Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/export/samples/Makefile.in Tue Apr 17 11:51:51=
2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.4 2009-12-05 23:31:41 each Exp $
+# $Id: Makefile.in,v 1.4 2009/12/05 23:31:41 each Exp $
=20
srcdir =3D @srcdir@
top_srcdir =3D @top_srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/samples/=
nsprobe.c
--- a/head/contrib/bind9/lib/export/samples/nsprobe.c Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/export/samples/nsprobe.c Tue Apr 17 11:51:51 2=
012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009-2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: nsprobe.c,v 1.7.180.3 2011-04-05 06:35:00 marka Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/samples/=
sample-async.c
--- a/head/contrib/bind9/lib/export/samples/sample-async.c Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/samples/sample-async.c Tue Apr 17 11:51=
:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sample-async.c,v 1.5 2009-09-29 15:06:07 fdupont Exp $ */
+/* $Id: sample-async.c,v 1.5 2009/09/29 15:06:07 fdupont Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/samples/=
sample-gai.c
--- a/head/contrib/bind9/lib/export/samples/sample-gai.c Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/export/samples/sample-gai.c Tue Apr 17 11:51:5=
1 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sample-gai.c,v 1.4 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: sample-gai.c,v 1.4 2009/09/02 23:48:02 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/samples/=
sample-request.c
--- a/head/contrib/bind9/lib/export/samples/sample-request.c Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/samples/sample-request.c Tue Apr 17 11:=
51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sample-request.c,v 1.5 2009-09-29 15:06:07 fdupont Exp $ */
+/* $Id: sample-request.c,v 1.5 2009/09/29 15:06:07 fdupont Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/samples/=
sample-update.c
--- a/head/contrib/bind9/lib/export/samples/sample-update.c Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/export/samples/sample-update.c Tue Apr 17 11:5=
1:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sample-update.c,v 1.10 2010-12-09 00:54:34 marka Exp $ */
+/* $Id: sample-update.c,v 1.10 2010/12/09 00:54:34 marka Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/export/samples/=
sample.c
--- a/head/contrib/bind9/lib/export/samples/sample.c Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/export/samples/sample.c Tue Apr 17 11:51:51 20=
12 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sample.c,v 1.5 2009-09-29 15:06:07 fdupont Exp $ */
+/* $Id: sample.c,v 1.5 2009/09/29 15:06:07 fdupont Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/Makefile.in
--- a/head/contrib/bind9/lib/irs/Makefile.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/irs/Makefile.in Tue Apr 17 11:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.3 2009-09-02 23:48:02 tbox Exp $
+# $Id: Makefile.in,v 1.3 2009/09/02 23:48:02 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/api
--- a/head/contrib/bind9/lib/irs/api Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/irs/api Tue Apr 17 11:51:51 2012 +0300
@@ -1,3 +1,8 @@
+# LIBINTERFACE ranges
+# 9.6: 50-59, 110-119
+# 9.7: 60-79
+# 9.8: 80-89
+# 9.9: 90-109
LIBINTERFACE =3D 80
-LIBREVISION =3D 1
+LIBREVISION =3D 2
LIBAGE =3D 0
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/context.c
--- a/head/contrib/bind9/lib/irs/context.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/irs/context.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: context.c,v 1.3 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: context.c,v 1.3 2009/09/02 23:48:02 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/dnsconf.c
--- a/head/contrib/bind9/lib/irs/dnsconf.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/irs/dnsconf.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dnsconf.c,v 1.3 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: dnsconf.c,v 1.3 2009/09/02 23:48:02 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/gai_strerro=
r.c
--- a/head/contrib/bind9/lib/irs/gai_strerror.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/irs/gai_strerror.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: gai_strerror.c,v 1.5 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: gai_strerror.c,v 1.5 2009/09/02 23:48:02 tbox Exp $ */
=20
/*! \file gai_strerror.c
* gai_strerror() returns an error message corresponding to an
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/getaddrinfo=
.c
--- a/head/contrib/bind9/lib/irs/getaddrinfo.c Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/irs/getaddrinfo.c Tue Apr 17 11:51:51 2012 +03=
00
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: getaddrinfo.c,v 1.3 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: getaddrinfo.c,v 1.3 2009/09/02 23:48:02 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/getnameinfo=
.c
--- a/head/contrib/bind9/lib/irs/getnameinfo.c Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/irs/getnameinfo.c Tue Apr 17 11:51:51 2012 +03=
00
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009, 2011, 2012 Internet Systems Consortium, Inc. ("ISC=
")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: getnameinfo.c,v 1.4.346.2 2011-03-12 04:59:18 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/include/Mak=
efile.in
--- a/head/contrib/bind9/lib/irs/include/Makefile.in Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/irs/include/Makefile.in Tue Apr 17 11:51:51 20=
12 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.3 2009-09-02 23:48:02 tbox Exp $
+# $Id: Makefile.in,v 1.3 2009/09/02 23:48:02 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/include/irs=
/Makefile.in
--- a/head/contrib/bind9/lib/irs/include/irs/Makefile.in Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/irs/include/irs/Makefile.in Tue Apr 17 11:51:5=
1 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.3 2009-09-02 23:48:02 tbox Exp $
+# $Id: Makefile.in,v 1.3 2009/09/02 23:48:02 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/include/irs=
/context.h
--- a/head/contrib/bind9/lib/irs/include/irs/context.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/irs/include/irs/context.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: context.h,v 1.3 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: context.h,v 1.3 2009/09/02 23:48:02 tbox Exp $ */
=20
#ifndef IRS_CONTEXT_H
#define IRS_CONTEXT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/include/irs=
/dnsconf.h
--- a/head/contrib/bind9/lib/irs/include/irs/dnsconf.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/irs/include/irs/dnsconf.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dnsconf.h,v 1.3 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: dnsconf.h,v 1.3 2009/09/02 23:48:02 tbox Exp $ */
=20
#ifndef IRS_DNSCONF_H
#define IRS_DNSCONF_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/include/irs=
/netdb.h.in
--- a/head/contrib/bind9/lib/irs/include/irs/netdb.h.in Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/irs/include/irs/netdb.h.in Tue Apr 17 11:51:51=
2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: netdb.h.in,v 1.3 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: netdb.h.in,v 1.3 2009/09/02 23:48:02 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/include/irs=
/platform.h.in
--- a/head/contrib/bind9/lib/irs/include/irs/platform.h.in Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/irs/include/irs/platform.h.in Tue Apr 17 11:51=
:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: platform.h.in,v 1.3 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: platform.h.in,v 1.3 2009/09/02 23:48:02 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/include/irs=
/resconf.h
--- a/head/contrib/bind9/lib/irs/include/irs/resconf.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/irs/include/irs/resconf.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: resconf.h,v 1.3 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: resconf.h,v 1.3 2009/09/02 23:48:02 tbox Exp $ */
=20
#ifndef IRS_RESCONF_H
#define IRS_RESCONF_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/include/irs=
/types.h
--- a/head/contrib/bind9/lib/irs/include/irs/types.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/irs/include/irs/types.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: types.h,v 1.3 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: types.h,v 1.3 2009/09/02 23:48:02 tbox Exp $ */
=20
#ifndef IRS_TYPES_H
#define IRS_TYPES_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/include/irs=
/version.h
--- a/head/contrib/bind9/lib/irs/include/irs/version.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/irs/include/irs/version.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: version.h,v 1.3 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: version.h,v 1.3 2009/09/02 23:48:02 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/resconf.c
--- a/head/contrib/bind9/lib/irs/resconf.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/irs/resconf.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009, 2011, 2012 Internet Systems Consortium, Inc. ("ISC=
")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: resconf.c,v 1.3.346.2 2011-03-12 04:59:18 tbox Exp $ */
+/* $Id$ */
=20
/*! \file resconf.c */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/irs/version.c
--- a/head/contrib/bind9/lib/irs/version.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/irs/version.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: version.c,v 1.3 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: version.c,v 1.3 2009/09/02 23:48:02 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/Makefile.in
--- a/head/contrib/bind9/lib/isc/Makefile.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/Makefile.in Tue Apr 17 11:51:51 2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
# Copyright (C) 1998-2003 Internet Software Consortium.
#
# Permission to use, copy, modify, and/or distribute this software for any
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.109.108.2 2011-07-08 23:47:16 tbox Exp $
+# $Id$
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/alpha/Makef=
ile.in
--- a/head/contrib/bind9/lib/isc/alpha/Makefile.in Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/isc/alpha/Makefile.in Tue Apr 17 11:51:51 2012=
+0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/alpha/inclu=
de/Makefile.in
--- a/head/contrib/bind9/lib/isc/alpha/include/Makefile.in Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/alpha/include/Makefile.in Tue Apr 17 11:51=
:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/alpha/inclu=
de/isc/Makefile.in
--- a/head/contrib/bind9/lib/isc/alpha/include/isc/Makefile.in Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/alpha/include/isc/Makefile.in Tue Apr 17 1=
1:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/alpha/inclu=
de/isc/atomic.h
--- a/head/contrib/bind9/lib/isc/alpha/include/isc/atomic.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/alpha/include/isc/atomic.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: atomic.h,v 1.7 2009-04-08 06:48:23 tbox Exp $ */
+/* $Id: atomic.h,v 1.7 2009/04/08 06:48:23 tbox Exp $ */
=20
/*
* This code was written based on FreeBSD's kernel source whose copyright
@@ -46,7 +46,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: head/contrib/bind9/lib/isc/alpha/include/isc/atomic.h 224092 =
2011-07-16 11:12:09Z dougb $
+ * $FreeBSD: head/contrib/bind9/lib/isc/alpha/include/isc/atomic.h 233914 =
2012-04-05 04:29:35Z dougb $
*/
=20
#ifndef ISC_ATOMIC_H
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/api
--- a/head/contrib/bind9/lib/isc/api Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/api Tue Apr 17 11:51:51 2012 +0300
@@ -1,3 +1,8 @@
+# LIBINTERFACE ranges
+# 9.6: 50-59, 110-119
+# 9.7: 60-79
+# 9.8: 80-89
+# 9.9: 90-109
LIBINTERFACE =3D 83
-LIBREVISION =3D 1
+LIBREVISION =3D 5
LIBAGE =3D 0
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/app_api.c
--- a/head/contrib/bind9/lib/isc/app_api.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/app_api.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: app_api.c,v 1.5 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: app_api.c,v 1.5 2009/09/02 23:48:02 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/assertions.c
--- a/head/contrib/bind9/lib/isc/assertions.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/assertions.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: assertions.c,v 1.26 2009-09-29 15:06:07 fdupont Exp $ */
+/* $Id: assertions.c,v 1.26 2009/09/29 15:06:07 fdupont Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/backtrace-e=
mptytbl.c
--- a/head/contrib/bind9/lib/isc/backtrace-emptytbl.c Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/backtrace-emptytbl.c Tue Apr 17 11:51:51 2=
012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: backtrace-emptytbl.c,v 1.3 2009-09-01 20:13:44 each Exp $ */
+/* $Id: backtrace-emptytbl.c,v 1.3 2009/09/01 20:13:44 each Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/backtrace.c
--- a/head/contrib/bind9/lib/isc/backtrace.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/backtrace.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: backtrace.c,v 1.3 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: backtrace.c,v 1.3 2009/09/02 23:48:02 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/base32.c
--- a/head/contrib/bind9/lib/isc/base32.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/base32.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: base32.c,v 1.6 2009-10-21 01:22:29 each Exp $ */
+/* $Id: base32.c,v 1.6 2009/10/21 01:22:29 each Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/base64.c
--- a/head/contrib/bind9/lib/isc/base64.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/base64.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: base64.c,v 1.34 2009-10-21 23:48:05 tbox Exp $ */
+/* $Id: base64.c,v 1.34 2009/10/21 23:48:05 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/bitstring.c
--- a/head/contrib/bind9/lib/isc/bitstring.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/bitstring.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: bitstring.c,v 1.17 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: bitstring.c,v 1.17 2007/06/19 23:47:17 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/buffer.c
--- a/head/contrib/bind9/lib/isc/buffer.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/buffer.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: buffer.c,v 1.49 2008-09-25 04:02:39 tbox Exp $ */
+/* $Id: buffer.c,v 1.49 2008/09/25 04:02:39 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/bufferlist.c
--- a/head/contrib/bind9/lib/isc/bufferlist.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/bufferlist.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: bufferlist.c,v 1.17 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: bufferlist.c,v 1.17 2007/06/19 23:47:17 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/commandline=
.c
--- a/head/contrib/bind9/lib/isc/commandline.c Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/isc/commandline.c Tue Apr 17 11:51:51 2012 +03=
00
@@ -48,7 +48,7 @@
* SUCH DAMAGE.
*/
=20
-/* $Id: commandline.c,v 1.22 2008-09-25 04:02:39 tbox Exp $ */
+/* $Id: commandline.c,v 1.22 2008/09/25 04:02:39 tbox Exp $ */
=20
/*! \file
* This file was adapted from the NetBSD project's source tree, RCS ID:
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/entropy.c
--- a/head/contrib/bind9/lib/isc/entropy.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/entropy.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: entropy.c,v 1.22 2010-08-10 23:48:19 tbox Exp $ */
+/* $Id: entropy.c,v 1.22 2010/08/10 23:48:19 tbox Exp $ */
=20
/*! \file
* \brief
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/error.c
--- a/head/contrib/bind9/lib/isc/error.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/error.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: error.c,v 1.21 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: error.c,v 1.21 2007/06/19 23:47:17 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/event.c
--- a/head/contrib/bind9/lib/isc/event.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/event.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: event.c,v 1.21 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: event.c,v 1.21 2007/06/19 23:47:17 tbox Exp $ */
=20
/*!
* \file
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/fsaccess.c
--- a/head/contrib/bind9/lib/isc/fsaccess.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/fsaccess.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: fsaccess.c,v 1.10 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: fsaccess.c,v 1.10 2007/06/19 23:47:17 tbox Exp $ */
=20
/*! \file
* \brief
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/hash.c
--- a/head/contrib/bind9/lib/isc/hash.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/hash.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: hash.c,v 1.16 2009-09-01 00:22:28 jinmei Exp $ */
+/* $Id: hash.c,v 1.16 2009/09/01 00:22:28 jinmei Exp $ */
=20
/*! \file
* Some portion of this code was derived from universal hash function
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/heap.c
--- a/head/contrib/bind9/lib/isc/heap.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/heap.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2010, 2011 Internet Systems Consortium, Inc. =
("ISC")
+ * Copyright (C) 2004-2007, 2010-2012 Internet Systems Consortium, Inc. (=
"ISC")
* Copyright (C) 1997-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: heap.c,v 1.39.150.2 2011-03-03 23:47:09 tbox Exp $ */
+/* $Id$ */
=20
/*! \file
* Heap implementation of priority queues adapted from the following:
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/hex.c
--- a/head/contrib/bind9/lib/isc/hex.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/hex.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: hex.c,v 1.20 2008-09-25 04:02:39 tbox Exp $ */
+/* $Id: hex.c,v 1.20 2008/09/25 04:02:39 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/hmacmd5.c
--- a/head/contrib/bind9/lib/isc/hmacmd5.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/hmacmd5.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: hmacmd5.c,v 1.16 2009-02-06 23:47:42 tbox Exp $ */
+/* $Id: hmacmd5.c,v 1.16 2009/02/06 23:47:42 tbox Exp $ */
=20
/*! \file
* This code implements the HMAC-MD5 keyed hash algorithm
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/hmacsha.c
--- a/head/contrib/bind9/lib/isc/hmacsha.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/hmacsha.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2005-2007, 2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2005-2007, 2009, 2011, 2012 Internet Systems Consortium,=
Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: hmacsha.c,v 1.10 2009-02-06 23:47:42 tbox Exp $ */
+/* $Id$ */
=20
/*
* This code implements the HMAC-SHA1, HMAC-SHA224, HMAC-SHA256, HMAC-SHA3=
84
@@ -224,8 +224,7 @@
void
isc_hmacsha1_invalidate(isc_hmacsha1_t *ctx) {
isc_sha1_invalidate(&ctx->sha1ctx);
- memset(ctx->key, 0, sizeof(ctx->key));
- memset(ctx, 0, sizeof(ctx));
+ memset(ctx, 0, sizeof(*ctx));
}
=20
/*
@@ -292,8 +291,7 @@
=20
void
isc_hmacsha224_invalidate(isc_hmacsha224_t *ctx) {
- memset(ctx->key, 0, sizeof(ctx->key));
- memset(ctx, 0, sizeof(ctx));
+ memset(ctx, 0, sizeof(*ctx));
}
=20
/*
@@ -359,8 +357,7 @@
=20
void
isc_hmacsha256_invalidate(isc_hmacsha256_t *ctx) {
- memset(ctx->key, 0, sizeof(ctx->key));
- memset(ctx, 0, sizeof(ctx));
+ memset(ctx, 0, sizeof(*ctx));
}
=20
/*
@@ -426,8 +423,7 @@
=20
void
isc_hmacsha384_invalidate(isc_hmacsha384_t *ctx) {
- memset(ctx->key, 0, sizeof(ctx->key));
- memset(ctx, 0, sizeof(ctx));
+ memset(ctx, 0, sizeof(*ctx));
}
=20
/*
@@ -493,8 +489,7 @@
=20
void
isc_hmacsha512_invalidate(isc_hmacsha512_t *ctx) {
- memset(ctx->key, 0, sizeof(ctx->key));
- memset(ctx, 0, sizeof(ctx));
+ memset(ctx, 0, sizeof(*ctx));
}
=20
/*
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/httpd.c
--- a/head/contrib/bind9/lib/isc/httpd.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/httpd.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2006-2008, 2010, 2011 Internet Systems Consortium, Inc. =
("ISC")
+ * Copyright (C) 2006-2008, 2010-2012 Internet Systems Consortium, Inc. (=
"ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: httpd.c,v 1.20.40.3 2011-03-11 06:47:07 marka Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/ia64/Makefi=
le.in
--- a/head/contrib/bind9/lib/isc/ia64/Makefile.in Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/isc/ia64/Makefile.in Tue Apr 17 11:51:51 2012 =
+0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/ia64/includ=
e/Makefile.in
--- a/head/contrib/bind9/lib/isc/ia64/include/Makefile.in Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/ia64/include/Makefile.in Tue Apr 17 11:51:=
51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/ia64/includ=
e/isc/Makefile.in
--- a/head/contrib/bind9/lib/isc/ia64/include/isc/Makefile.in Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/ia64/include/isc/Makefile.in Tue Apr 17 11=
:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/ia64/includ=
e/isc/atomic.h
--- a/head/contrib/bind9/lib/isc/ia64/include/isc/atomic.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/ia64/include/isc/atomic.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: atomic.h,v 1.7 2009-06-24 02:22:50 marka Exp $ */
+/* $Id: atomic.h,v 1.7 2009/06/24 02:22:50 marka Exp $ */
=20
#ifndef ISC_ATOMIC_H
#define ISC_ATOMIC_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/Mak=
efile.in
--- a/head/contrib/bind9/lib/isc/include/Makefile.in Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/include/Makefile.in Tue Apr 17 11:51:51 20=
12 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.13 2007-06-19 23:47:18 tbox Exp $
+# $Id: Makefile.in,v 1.13 2007/06/19 23:47:18 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/Makefile.in
--- a/head/contrib/bind9/lib/isc/include/isc/Makefile.in Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/Makefile.in Tue Apr 17 11:51:5=
1 2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2004-2009 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2004-2009, 2012 Internet Systems Consortium, Inc. ("ISC")
# Copyright (C) 1998-2001, 2003 Internet Software Consortium.
#
# Permission to use, copy, modify, and/or distribute this software for any
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.68 2009-12-05 23:31:41 each Exp $
+# $Id$
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
@@ -29,7 +29,7 @@
HEADERS =3D app.h assertions.h base64.h bind9.h bitstring.h boolean.h \
buffer.h bufferlist.h commandline.h entropy.h error.h event.h \
eventclass.h file.h formatcheck.h fsaccess.h \
- hash.h heap.h hex.h hmacmd5.h \
+ hash.h heap.h hex.h hmacmd5.h hmacsha.h \
httpd.h \
interfaceiter.h @ISC_IPV6_H@ iterated_hash.h lang.h lex.h \
lfsr.h lib.h list.h log.h \
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/app.h
--- a/head/contrib/bind9/lib/isc/include/isc/app.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/isc/include/isc/app.h Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: app.h,v 1.11 2009-09-02 23:48:03 tbox Exp $ */
+/* $Id: app.h,v 1.11 2009/09/02 23:48:03 tbox Exp $ */
=20
#ifndef ISC_APP_H
#define ISC_APP_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/assertions.h
--- a/head/contrib/bind9/lib/isc/include/isc/assertions.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/assertions.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -16,7 +16,7 @@
*/
=20
/*
- * $Id: assertions.h,v 1.28 2009-09-29 23:48:04 tbox Exp $
+ * $Id: assertions.h,v 1.28 2009/09/29 23:48:04 tbox Exp $
*/
/*! \file isc/assertions.h
*/
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/backtrace.h
--- a/head/contrib/bind9/lib/isc/include/isc/backtrace.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/backtrace.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: backtrace.h,v 1.2 2009-09-01 18:40:25 jinmei Exp $ */
+/* $Id: backtrace.h,v 1.2 2009/09/01 18:40:25 jinmei Exp $ */
=20
/*! \file isc/backtrace.h
* \brief provide a back trace of the running process to help debug proble=
ms.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/base32.h
--- a/head/contrib/bind9/lib/isc/include/isc/base32.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/base32.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: base32.h,v 1.3 2008-09-25 04:02:39 tbox Exp $ */
+/* $Id: base32.h,v 1.3 2008/09/25 04:02:39 tbox Exp $ */
=20
#ifndef ISC_BASE32_H
#define ISC_BASE32_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/base64.h
--- a/head/contrib/bind9/lib/isc/include/isc/base64.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/base64.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: base64.h,v 1.22 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: base64.h,v 1.22 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_BASE64_H
#define ISC_BASE64_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/bind9.h
--- a/head/contrib/bind9/lib/isc/include/isc/bind9.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/bind9.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: bind9.h,v 1.2 2009-12-05 23:31:41 each Exp $ */
+/* $Id: bind9.h,v 1.2 2009/12/05 23:31:41 each Exp $ */
=20
#ifndef ISC_BIND9_H
#define ISC_BIND9_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/bitstring.h
--- a/head/contrib/bind9/lib/isc/include/isc/bitstring.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/bitstring.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: bitstring.h,v 1.14 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: bitstring.h,v 1.14 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_BITSTRING_H
#define ISC_BITSTRING_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/boolean.h
--- a/head/contrib/bind9/lib/isc/include/isc/boolean.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/boolean.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: boolean.h,v 1.19 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: boolean.h,v 1.19 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_BOOLEAN_H
#define ISC_BOOLEAN_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/buffer.h
--- a/head/contrib/bind9/lib/isc/include/isc/buffer.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/buffer.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: buffer.h,v 1.55 2010-12-20 23:47:21 tbox Exp $ */
+/* $Id: buffer.h,v 1.55 2010/12/20 23:47:21 tbox Exp $ */
=20
#ifndef ISC_BUFFER_H
#define ISC_BUFFER_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/bufferlist.h
--- a/head/contrib/bind9/lib/isc/include/isc/bufferlist.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/bufferlist.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: bufferlist.h,v 1.17 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: bufferlist.h,v 1.17 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_BUFFERLIST_H
#define ISC_BUFFERLIST_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/commandline.h
--- a/head/contrib/bind9/lib/isc/include/isc/commandline.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/commandline.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: commandline.h,v 1.16 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: commandline.h,v 1.16 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_COMMANDLINE_H
#define ISC_COMMANDLINE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/entropy.h
--- a/head/contrib/bind9/lib/isc/include/isc/entropy.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/entropy.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: entropy.h,v 1.35 2009-10-19 02:37:08 marka Exp $ */
+/* $Id: entropy.h,v 1.35 2009/10/19 02:37:08 marka Exp $ */
=20
#ifndef ISC_ENTROPY_H
#define ISC_ENTROPY_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/error.h
--- a/head/contrib/bind9/lib/isc/include/isc/error.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/error.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: error.h,v 1.22 2009-09-29 23:48:04 tbox Exp $ */
+/* $Id: error.h,v 1.22 2009/09/29 23:48:04 tbox Exp $ */
=20
#ifndef ISC_ERROR_H
#define ISC_ERROR_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/event.h
--- a/head/contrib/bind9/lib/isc/include/isc/event.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/event.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: event.h,v 1.34 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: event.h,v 1.34 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_EVENT_H
#define ISC_EVENT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/eventclass.h
--- a/head/contrib/bind9/lib/isc/include/isc/eventclass.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/eventclass.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: eventclass.h,v 1.18 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: eventclass.h,v 1.18 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_EVENTCLASS_H
#define ISC_EVENTCLASS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/file.h
--- a/head/contrib/bind9/lib/isc/include/isc/file.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/file.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2009, 2011 Internet Systems Consortium, Inc. =
("ISC")
+ * Copyright (C) 2004-2007, 2009, 2011, 2012 Internet Systems Consortium,=
Inc. ("ISC")
* Copyright (C) 2000, 2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: file.h,v 1.39.10.2 2011-03-04 23:47:28 tbox Exp $ */
+/* $Id$ */
=20
#ifndef ISC_FILE_H
#define ISC_FILE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/formatcheck.h
--- a/head/contrib/bind9/lib/isc/include/isc/formatcheck.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/formatcheck.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: formatcheck.h,v 1.13 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: formatcheck.h,v 1.13 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_FORMATCHECK_H
#define ISC_FORMATCHECK_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/fsaccess.h
--- a/head/contrib/bind9/lib/isc/include/isc/fsaccess.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/fsaccess.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: fsaccess.h,v 1.16 2009-01-17 23:47:43 tbox Exp $ */
+/* $Id: fsaccess.h,v 1.16 2009/01/17 23:47:43 tbox Exp $ */
=20
#ifndef ISC_FSACCESS_H
#define ISC_FSACCESS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/hash.h
--- a/head/contrib/bind9/lib/isc/include/isc/hash.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/hash.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: hash.h,v 1.12 2009-01-17 23:47:43 tbox Exp $ */
+/* $Id: hash.h,v 1.12 2009/01/17 23:47:43 tbox Exp $ */
=20
#ifndef ISC_HASH_H
#define ISC_HASH_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/heap.h
--- a/head/contrib/bind9/lib/isc/include/isc/heap.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/heap.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: heap.h,v 1.26 2009-01-17 23:47:43 tbox Exp $ */
+/* $Id: heap.h,v 1.26 2009/01/17 23:47:43 tbox Exp $ */
=20
#ifndef ISC_HEAP_H
#define ISC_HEAP_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/hex.h
--- a/head/contrib/bind9/lib/isc/include/isc/hex.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/isc/include/isc/hex.h Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: hex.h,v 1.13 2008-09-25 04:02:39 tbox Exp $ */
+/* $Id: hex.h,v 1.13 2008/09/25 04:02:39 tbox Exp $ */
=20
#ifndef ISC_HEX_H
#define ISC_HEX_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/hmacmd5.h
--- a/head/contrib/bind9/lib/isc/include/isc/hmacmd5.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/hmacmd5.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: hmacmd5.h,v 1.14 2009-02-06 23:47:42 tbox Exp $ */
+/* $Id: hmacmd5.h,v 1.14 2009/02/06 23:47:42 tbox Exp $ */
=20
/*! \file isc/hmacmd5.h
* \brief This is the header file for the HMAC-MD5 keyed hash algorithm
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/hmacsha.h
--- a/head/contrib/bind9/lib/isc/include/isc/hmacsha.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/hmacsha.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: hmacsha.h,v 1.9 2009-02-06 23:47:42 tbox Exp $ */
+/* $Id: hmacsha.h,v 1.9 2009/02/06 23:47:42 tbox Exp $ */
=20
/*! \file isc/hmacsha.h
* This is the header file for the HMAC-SHA1, HMAC-SHA224, HMAC-SHA256,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/httpd.h
--- a/head/contrib/bind9/lib/isc/include/isc/httpd.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/httpd.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: httpd.h,v 1.9 2008-08-08 05:06:49 marka Exp $ */
+/* $Id: httpd.h,v 1.9 2008/08/08 05:06:49 marka Exp $ */
=20
#ifndef ISC_HTTPD_H
#define ISC_HTTPD_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/interfaceiter.h
--- a/head/contrib/bind9/lib/isc/include/isc/interfaceiter.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/interfaceiter.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: interfaceiter.h,v 1.17 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: interfaceiter.h,v 1.17 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_INTERFACEITER_H
#define ISC_INTERFACEITER_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/ipv6.h
--- a/head/contrib/bind9/lib/isc/include/isc/ipv6.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/ipv6.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ipv6.h,v 1.24 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: ipv6.h,v 1.24 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_IPV6_H
#define ISC_IPV6_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/iterated_hash.h
--- a/head/contrib/bind9/lib/isc/include/isc/iterated_hash.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/iterated_hash.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: iterated_hash.h,v 1.3 2008-09-25 04:02:39 tbox Exp $ */
+/* $Id: iterated_hash.h,v 1.3 2008/09/25 04:02:39 tbox Exp $ */
=20
#ifndef ISC_ITERATED_HASH_H
#define ISC_ITERATED_HASH_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/lang.h
--- a/head/contrib/bind9/lib/isc/include/isc/lang.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/lang.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lang.h,v 1.13 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: lang.h,v 1.13 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_LANG_H
#define ISC_LANG_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/lex.h
--- a/head/contrib/bind9/lib/isc/include/isc/lex.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/isc/include/isc/lex.h Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lex.h,v 1.37 2008-05-30 23:47:01 tbox Exp $ */
+/* $Id: lex.h,v 1.37 2008/05/30 23:47:01 tbox Exp $ */
=20
#ifndef ISC_LEX_H
#define ISC_LEX_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/lfsr.h
--- a/head/contrib/bind9/lib/isc/include/isc/lfsr.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/lfsr.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lfsr.h,v 1.17 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: lfsr.h,v 1.17 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_LFSR_H
#define ISC_LFSR_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/lib.h
--- a/head/contrib/bind9/lib/isc/include/isc/lib.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/isc/include/isc/lib.h Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lib.h,v 1.16 2009-09-02 23:48:03 tbox Exp $ */
+/* $Id: lib.h,v 1.16 2009/09/02 23:48:03 tbox Exp $ */
=20
#ifndef ISC_LIB_H
#define ISC_LIB_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/list.h
--- a/head/contrib/bind9/lib/isc/include/isc/list.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/list.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2006, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2006, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
* Copyright (C) 1997-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: list.h,v 1.24 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id$ */
=20
#ifndef ISC_LIST_H
#define ISC_LIST_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/log.h
--- a/head/contrib/bind9/lib/isc/include/isc/log.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/isc/include/isc/log.h Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: log.h,v 1.59 2009-02-16 02:01:16 marka Exp $ */
+/* $Id: log.h,v 1.59 2009/02/16 02:01:16 marka Exp $ */
=20
#ifndef ISC_LOG_H
#define ISC_LOG_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/magic.h
--- a/head/contrib/bind9/lib/isc/include/isc/magic.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/magic.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: magic.h,v 1.18 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: magic.h,v 1.18 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_MAGIC_H
#define ISC_MAGIC_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/md5.h
--- a/head/contrib/bind9/lib/isc/include/isc/md5.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/isc/include/isc/md5.h Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: md5.h,v 1.20 2010-01-07 23:48:54 tbox Exp $ */
+/* $Id: md5.h,v 1.20 2010/01/07 23:48:54 tbox Exp $ */
=20
/*! \file isc/md5.h
* \brief This is the header file for the MD5 message-digest algorithm.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/mem.h
--- a/head/contrib/bind9/lib/isc/include/isc/mem.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/isc/include/isc/mem.h Tue Apr 17 11:51:51 2012=
+0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2010 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2010, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1997-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: mem.h,v 1.89 2010-08-11 22:54:58 jinmei Exp $ */
+/* $Id$ */
=20
#ifndef ISC_MEM_H
#define ISC_MEM_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/msgcat.h
--- a/head/contrib/bind9/lib/isc/include/isc/msgcat.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/msgcat.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: msgcat.h,v 1.13 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: msgcat.h,v 1.13 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_MSGCAT_H
#define ISC_MSGCAT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/msgs.h
--- a/head/contrib/bind9/lib/isc/include/isc/msgs.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/msgs.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: msgs.h,v 1.19 2009-10-01 23:48:08 tbox Exp $ */
+/* $Id: msgs.h,v 1.19 2009/10/01 23:48:08 tbox Exp $ */
=20
#ifndef ISC_MSGS_H
#define ISC_MSGS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/mutexblock.h
--- a/head/contrib/bind9/lib/isc/include/isc/mutexblock.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/mutexblock.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: mutexblock.h,v 1.17 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: mutexblock.h,v 1.17 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_MUTEXBLOCK_H
#define ISC_MUTEXBLOCK_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/namespace.h
--- a/head/contrib/bind9/lib/isc/include/isc/namespace.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/namespace.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009, 2010 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009, 2010, 2012 Internet Systems Consortium, Inc. ("ISC=
")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: namespace.h,v 1.9 2010-12-04 13:25:59 marka Exp $ */
+/* $Id$ */
=20
#ifndef ISCAPI_NAMESPACE_H
#define ISCAPI_NAMESPACE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/netaddr.h
--- a/head/contrib/bind9/lib/isc/include/isc/netaddr.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/netaddr.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: netaddr.h,v 1.37 2009-01-17 23:47:43 tbox Exp $ */
+/* $Id: netaddr.h,v 1.37 2009/01/17 23:47:43 tbox Exp $ */
=20
#ifndef ISC_NETADDR_H
#define ISC_NETADDR_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/netscope.h
--- a/head/contrib/bind9/lib/isc/include/isc/netscope.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/netscope.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: netscope.h,v 1.13 2009-06-25 23:48:02 tbox Exp $ */
+/* $Id: netscope.h,v 1.13 2009/06/25 23:48:02 tbox Exp $ */
=20
#ifndef ISC_NETSCOPE_H
#define ISC_NETSCOPE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/ondestroy.h
--- a/head/contrib/bind9/lib/isc/include/isc/ondestroy.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/ondestroy.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ondestroy.h,v 1.14 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: ondestroy.h,v 1.14 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_ONDESTROY_H
#define ISC_ONDESTROY_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/os.h
--- a/head/contrib/bind9/lib/isc/include/isc/os.h Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/isc/include/isc/os.h Tue Apr 17 11:51:51 2012 =
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: os.h,v 1.12 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: os.h,v 1.12 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_OS_H
#define ISC_OS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/parseint.h
--- a/head/contrib/bind9/lib/isc/include/isc/parseint.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/parseint.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: parseint.h,v 1.9 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: parseint.h,v 1.9 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_PARSEINT_H
#define ISC_PARSEINT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/platform.h.in
--- a/head/contrib/bind9/lib/isc/include/isc/platform.h.in Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/platform.h.in Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: platform.h.in,v 1.56 2010-12-18 01:56:23 each Exp $ */
+/* $Id: platform.h.in,v 1.56 2010/12/18 01:56:23 each Exp $ */
=20
#ifndef ISC_PLATFORM_H
#define ISC_PLATFORM_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/portset.h
--- a/head/contrib/bind9/lib/isc/include/isc/portset.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/portset.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: portset.h,v 1.6 2009-06-25 05:28:34 marka Exp $ */
+/* $Id: portset.h,v 1.6 2009/06/25 05:28:34 marka Exp $ */
=20
/*! \file isc/portset.h
* \brief Transport Protocol Port Manipulation Module
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/print.h
--- a/head/contrib/bind9/lib/isc/include/isc/print.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/print.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: print.h,v 1.26 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: print.h,v 1.26 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_PRINT_H
#define ISC_PRINT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/quota.h
--- a/head/contrib/bind9/lib/isc/include/isc/quota.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/quota.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: quota.h,v 1.16 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: quota.h,v 1.16 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_QUOTA_H
#define ISC_QUOTA_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/radix.h
--- a/head/contrib/bind9/lib/isc/include/isc/radix.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/radix.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: radix.h,v 1.13 2008-12-01 23:47:45 tbox Exp $ */
+/* $Id: radix.h,v 1.13 2008/12/01 23:47:45 tbox Exp $ */
=20
/*
* This source was adapted from MRT's RCS Ids:
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/random.h
--- a/head/contrib/bind9/lib/isc/include/isc/random.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/random.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: random.h,v 1.20 2009-01-17 23:47:43 tbox Exp $ */
+/* $Id: random.h,v 1.20 2009/01/17 23:47:43 tbox Exp $ */
=20
#ifndef ISC_RANDOM_H
#define ISC_RANDOM_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/ratelimiter.h
--- a/head/contrib/bind9/lib/isc/include/isc/ratelimiter.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/ratelimiter.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ratelimiter.h,v 1.23 2009-01-18 23:48:14 tbox Exp $ */
+/* $Id: ratelimiter.h,v 1.23 2009/01/18 23:48:14 tbox Exp $ */
=20
#ifndef ISC_RATELIMITER_H
#define ISC_RATELIMITER_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/refcount.h
--- a/head/contrib/bind9/lib/isc/include/isc/refcount.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/refcount.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: refcount.h,v 1.17 2009-09-29 23:48:04 tbox Exp $ */
+/* $Id: refcount.h,v 1.17 2009/09/29 23:48:04 tbox Exp $ */
=20
#ifndef ISC_REFCOUNT_H
#define ISC_REFCOUNT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/region.h
--- a/head/contrib/bind9/lib/isc/include/isc/region.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/region.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: region.h,v 1.25 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: region.h,v 1.25 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_REGION_H
#define ISC_REGION_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/resource.h
--- a/head/contrib/bind9/lib/isc/include/isc/resource.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/resource.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: resource.h,v 1.13 2008-07-11 23:47:09 tbox Exp $ */
+/* $Id: resource.h,v 1.13 2008/07/11 23:47:09 tbox Exp $ */
=20
#ifndef ISC_RESOURCE_H
#define ISC_RESOURCE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/result.h
--- a/head/contrib/bind9/lib/isc/include/isc/result.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/result.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1998-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: result.h,v 1.73 2009-09-02 23:48:03 tbox Exp $ */
+/* $Id$ */
=20
#ifndef ISC_RESULT_H
#define ISC_RESULT_H 1
@@ -87,9 +87,10 @@
#define ISC_R_MAXSIZE 58 /*%< max size */
#define ISC_R_BADADDRESSFORM 59 /*%< invalid address format */
#define ISC_R_BADBASE32 60 /*%< bad base32 encoding */
+#define ISC_R_UNSET 61 /*%< unset */
=20
/*% Not a result code: the number of results. */
-#define ISC_R_NRESULTS 61
+#define ISC_R_NRESULTS 62
=20
ISC_LANG_BEGINDECLS
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/resultclass.h
--- a/head/contrib/bind9/lib/isc/include/isc/resultclass.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/resultclass.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: resultclass.h,v 1.20 2009-09-02 23:48:03 tbox Exp $ */
+/* $Id: resultclass.h,v 1.20 2009/09/02 23:48:03 tbox Exp $ */
=20
#ifndef ISC_RESULTCLASS_H
#define ISC_RESULTCLASS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/rwlock.h
--- a/head/contrib/bind9/lib/isc/include/isc/rwlock.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/rwlock.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rwlock.h,v 1.28 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: rwlock.h,v 1.28 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_RWLOCK_H
#define ISC_RWLOCK_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/serial.h
--- a/head/contrib/bind9/lib/isc/include/isc/serial.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/serial.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: serial.h,v 1.18 2009-01-18 23:48:14 tbox Exp $ */
+/* $Id: serial.h,v 1.18 2009/01/18 23:48:14 tbox Exp $ */
=20
#ifndef ISC_SERIAL_H
#define ISC_SERIAL_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/sha1.h
--- a/head/contrib/bind9/lib/isc/include/isc/sha1.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/sha1.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -18,7 +18,7 @@
#ifndef ISC_SHA1_H
#define ISC_SHA1_H 1
=20
-/* $Id: sha1.h,v 1.19 2009-02-06 23:47:42 tbox Exp $ */
+/* $Id: sha1.h,v 1.19 2009/02/06 23:47:42 tbox Exp $ */
=20
/* $NetBSD: sha1.h,v 1.2 1998/05/29 22:55:44 thorpej Exp $ */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/sha2.h
--- a/head/contrib/bind9/lib/isc/include/isc/sha2.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/sha2.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -14,9 +14,9 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sha2.h,v 1.12 2009-10-22 02:21:31 each Exp $ */
+/* $Id: sha2.h,v 1.12 2009/10/22 02:21:31 each Exp $ */
=20
-/* $FreeBSD: head/contrib/bind9/lib/isc/include/isc/sha2.h 224092 2011-07-=
16 11:12:09Z dougb $ */
+/* $FreeBSD: head/contrib/bind9/lib/isc/include/isc/sha2.h 233914 2012-04-=
05 04:29:35Z dougb $ */
/* $KAME: sha2.h,v 1.3 2001/03/12 08:27:48 itojun Exp $ */
=20
/*
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/sockaddr.h
--- a/head/contrib/bind9/lib/isc/include/isc/sockaddr.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/sockaddr.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sockaddr.h,v 1.57 2009-01-18 23:48:14 tbox Exp $ */
+/* $Id: sockaddr.h,v 1.57 2009/01/18 23:48:14 tbox Exp $ */
=20
#ifndef ISC_SOCKADDR_H
#define ISC_SOCKADDR_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/socket.h
--- a/head/contrib/bind9/lib/isc/include/isc/socket.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/socket.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1998-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: socket.h,v 1.94 2009-10-01 01:30:01 sar Exp $ */
+/* $Id$ */
=20
#ifndef ISC_SOCKET_H
#define ISC_SOCKET_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/stats.h
--- a/head/contrib/bind9/lib/isc/include/isc/stats.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/stats.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009, 2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: stats.h,v 1.4 2009-01-29 01:03:56 jinmei Exp $ */
+/* $Id$ */
=20
#ifndef ISC_STATS_H
#define ISC_STATS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/stdio.h
--- a/head/contrib/bind9/lib/isc/include/isc/stdio.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/stdio.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: stdio.h,v 1.13 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: stdio.h,v 1.13 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_STDIO_H
#define ISC_STDIO_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/stdlib.h
--- a/head/contrib/bind9/lib/isc/include/isc/stdlib.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/stdlib.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: stdlib.h,v 1.8 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: stdlib.h,v 1.8 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_STDLIB_H
#define ISC_STDLIB_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/string.h
--- a/head/contrib/bind9/lib/isc/include/isc/string.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/string.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: string.h,v 1.23 2007-09-13 04:48:16 each Exp $ */
+/* $Id: string.h,v 1.23 2007/09/13 04:48:16 each Exp $ */
=20
#ifndef ISC_STRING_H
#define ISC_STRING_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/symtab.h
--- a/head/contrib/bind9/lib/isc/include/isc/symtab.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/symtab.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2007, 2009, 2011, 2012 Internet Systems Consortium,=
Inc. ("ISC")
* Copyright (C) 1996-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: symtab.h,v 1.26 2009-01-18 23:48:14 tbox Exp $ */
+/* $Id$ */
=20
#ifndef ISC_SYMTAB_H
#define ISC_SYMTAB_H 1
@@ -57,6 +57,14 @@
* undefined. It can be used to free memory associated with keys and/or
* values.
*
+ * A symbol table is implemented as a hash table of lists; the size of the
+ * hash table is set by the 'size' parameter to isc_symtbl_create(). When
+ * the number of entries in the symbol table reaches three quarters of this
+ * value, the hash table is reallocated with size doubled, in order to
+ * optimize lookup performance. This has a negative effect on insertion
+ * performance, which can be mitigated by sizing the table appropriately
+ * when creating it.
+ *
* \li MP:
* The callers of this module must ensure any required synchronization.
*
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/task.h
--- a/head/contrib/bind9/lib/isc/include/isc/task.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/task.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2009-2011 Internet Systems Consortium, Inc. (=
"ISC")
+ * Copyright (C) 2004-2007, 2009-2012 Internet Systems Consortium, Inc. (=
"ISC")
* Copyright (C) 1998-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: task.h,v 1.69.14.2 2011-02-28 01:20:04 tbox Exp $ */
+/* $Id$ */
=20
#ifndef ISC_TASK_H
#define ISC_TASK_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/taskpool.h
--- a/head/contrib/bind9/lib/isc/include/isc/taskpool.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/taskpool.h Tue Apr 17 11:51:51=
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2007, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: taskpool.h,v 1.15.814.2 2011-07-08 23:47:16 tbox Exp $ */
+/* $Id$ */
=20
#ifndef ISC_TASKPOOL_H
#define ISC_TASKPOOL_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/timer.h
--- a/head/contrib/bind9/lib/isc/include/isc/timer.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/timer.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: timer.h,v 1.43 2009-09-02 23:48:03 tbox Exp $ */
+/* $Id: timer.h,v 1.43 2009/09/02 23:48:03 tbox Exp $ */
=20
#ifndef ISC_TIMER_H
#define ISC_TIMER_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/types.h
--- a/head/contrib/bind9/lib/isc/include/isc/types.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/types.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2009, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: types.h,v 1.52 2009-12-05 23:31:41 each Exp $ */
+/* $Id$ */
=20
#ifndef ISC_TYPES_H
#define ISC_TYPES_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/util.h
--- a/head/contrib/bind9/lib/isc/include/isc/util.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/util.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2010, 2011 Internet Systems Consortium, Inc. =
("ISC")
+ * Copyright (C) 2004-2007, 2010-2012 Internet Systems Consortium, Inc. (=
"ISC")
* Copyright (C) 1998-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: util.h,v 1.32.170.2 2011-03-12 04:59:19 tbox Exp $ */
+/* $Id$ */
=20
#ifndef ISC_UTIL_H
#define ISC_UTIL_H 1
@@ -235,14 +235,4 @@
*/
#define TIME_NOW(tp) RUNTIME_CHECK(isc_time_now((tp)) =3D=3D ISC_R_SUCCES=
S)
=20
-/*%
- * Prevent Linux spurious warnings
- */
-#if defined(__GNUC__) && (__GNUC__ > 3)
-#define isc_util_fwrite(a, b, c, d) \
- __builtin_expect(fwrite((a), (b), (c), (d)), (c))
-#else
-#define isc_util_fwrite(a, b, c, d) fwrite((a), (b), (c), (d))
-#endif
-
#endif /* ISC_UTIL_H */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/version.h
--- a/head/contrib/bind9/lib/isc/include/isc/version.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/isc/include/isc/version.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: version.h,v 1.9 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: version.h,v 1.9 2007/06/19 23:47:18 tbox Exp $ */
=20
/*! \file isc/version.h */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/include/isc=
/xml.h
--- a/head/contrib/bind9/lib/isc/include/isc/xml.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/isc/include/isc/xml.h Tue Apr 17 11:51:51 2012=
+0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: xml.h,v 1.4 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: xml.h,v 1.4 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_XML_H
#define ISC_XML_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/inet_aton.c
--- a/head/contrib/bind9/lib/isc/inet_aton.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/inet_aton.c Tue Apr 17 11:51:51 2012 +0300
@@ -71,7 +71,7 @@
=20
#if defined(LIBC_SCCS) && !defined(lint)
static char sccsid[] =3D "@(#)inet_addr.c 8.1 (Berkeley) 6/17/93";
-static char rcsid[] =3D "$Id: inet_aton.c,v 1.23 2008-12-01 23:47:45 tbox =
Exp $";
+static char rcsid[] =3D "$Id: inet_aton.c,v 1.23 2008/12/01 23:47:45 tbox =
Exp $";
#endif /* LIBC_SCCS and not lint */
=20
#include <config.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/inet_ntop.c
--- a/head/contrib/bind9/lib/isc/inet_ntop.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/inet_ntop.c Tue Apr 17 11:51:51 2012 +0300
@@ -19,7 +19,7 @@
=20
#if defined(LIBC_SCCS) && !defined(lint)
static char rcsid[] =3D
- "$Id: inet_ntop.c,v 1.21 2009-07-17 23:47:41 tbox Exp $";
+ "$Id: inet_ntop.c,v 1.21 2009/07/17 23:47:41 tbox Exp $";
#endif /* LIBC_SCCS and not lint */
=20
#include <config.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/inet_pton.c
--- a/head/contrib/bind9/lib/isc/inet_pton.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/inet_pton.c Tue Apr 17 11:51:51 2012 +0300
@@ -19,7 +19,7 @@
=20
#if defined(LIBC_SCCS) && !defined(lint)
static char rcsid[] =3D
- "$Id: inet_pton.c,v 1.19 2007-06-19 23:47:17 tbox Exp $";
+ "$Id: inet_pton.c,v 1.19 2007/06/19 23:47:17 tbox Exp $";
#endif /* LIBC_SCCS and not lint */
=20
#include <config.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/iterated_ha=
sh.c
--- a/head/contrib/bind9/lib/isc/iterated_hash.c Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/lib/isc/iterated_hash.c Tue Apr 17 11:51:51 2012 +=
0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: iterated_hash.c,v 1.6 2009-02-18 23:47:48 tbox Exp $ */
+/* $Id: iterated_hash.c,v 1.6 2009/02/18 23:47:48 tbox Exp $ */
=20
#include "config.h"
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/lex.c
--- a/head/contrib/bind9/lib/isc/lex.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/lex.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lex.c,v 1.86 2007-09-17 09:56:29 shane Exp $ */
+/* $Id: lex.c,v 1.86 2007/09/17 09:56:29 shane Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/lfsr.c
--- a/head/contrib/bind9/lib/isc/lfsr.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/lfsr.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lfsr.c,v 1.20 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: lfsr.c,v 1.20 2007/06/19 23:47:17 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/lib.c
--- a/head/contrib/bind9/lib/isc/lib.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/lib.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lib.c,v 1.16 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: lib.c,v 1.16 2009/09/02 23:48:02 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/log.c
--- a/head/contrib/bind9/lib/isc/log.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/log.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2009, 2011 Internet Systems Consortium, Inc. =
("ISC")
+ * Copyright (C) 2004-2007, 2009, 2011, 2012 Internet Systems Consortium,=
Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: log.c,v 1.99.404.2 2011-03-12 04:59:18 tbox Exp $ */
+/* $Id$ */
=20
/*! \file
* \author Principal Authors: DCL */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/md5.c
--- a/head/contrib/bind9/lib/isc/md5.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/md5.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: md5.c,v 1.16 2009-02-06 23:47:42 tbox Exp $ */
+/* $Id: md5.c,v 1.16 2009/02/06 23:47:42 tbox Exp $ */
=20
/*! \file
* This code implements the MD5 message-digest algorithm.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/mem.c
--- a/head/contrib/bind9/lib/isc/mem.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/mem.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2010 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2010, 2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1997-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: mem.c,v 1.160 2010-12-08 02:46:16 marka Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/mem_api.c
--- a/head/contrib/bind9/lib/isc/mem_api.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/mem_api.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: mem_api.c,v 1.8 2010-08-12 21:30:26 jinmei Exp $ */
+/* $Id: mem_api.c,v 1.8 2010/08/12 21:30:26 jinmei Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/mips/Makefi=
le.in
--- a/head/contrib/bind9/lib/isc/mips/Makefile.in Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/isc/mips/Makefile.in Tue Apr 17 11:51:51 2012 =
+0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/mips/includ=
e/Makefile.in
--- a/head/contrib/bind9/lib/isc/mips/include/Makefile.in Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/mips/include/Makefile.in Tue Apr 17 11:51:=
51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/mips/includ=
e/isc/Makefile.in
--- a/head/contrib/bind9/lib/isc/mips/include/isc/Makefile.in Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/mips/include/isc/Makefile.in Tue Apr 17 11=
:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/mips/includ=
e/isc/atomic.h
--- a/head/contrib/bind9/lib/isc/mips/include/isc/atomic.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/mips/include/isc/atomic.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: atomic.h,v 1.3 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: atomic.h,v 1.3 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_ATOMIC_H
#define ISC_ATOMIC_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/mutexblock.c
--- a/head/contrib/bind9/lib/isc/mutexblock.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/mutexblock.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2005, 2007, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: mutexblock.c,v 1.20 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -32,10 +32,9 @@
for (i =3D 0; i < count; i++) {
result =3D isc_mutex_init(&block[i]);
if (result !=3D ISC_R_SUCCESS) {
- i--;
- while (i > 0) {
+ while (i > 0U) {
+ i--;
DESTROYLOCK(&block[i]);
- i--;
}
return (result);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/netaddr.c
--- a/head/contrib/bind9/lib/isc/netaddr.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/netaddr.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2010, 2011 Internet Systems Consortium=
, Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2010-2012 Internet Systems Consortium,=
Inc. ("ISC")
* Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: netaddr.c,v 1.41.38.3 2011-03-11 06:47:07 marka Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/netscope.c
--- a/head/contrib/bind9/lib/isc/netscope.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/netscope.c Tue Apr 17 11:51:51 2012 +0300
@@ -19,7 +19,7 @@
=20
#if defined(LIBC_SCCS) && !defined(lint)
static char rcsid[] =3D
- "$Id: netscope.c,v 1.13 2007-06-19 23:47:17 tbox Exp $";
+ "$Id: netscope.c,v 1.13 2007/06/19 23:47:17 tbox Exp $";
#endif /* LIBC_SCCS and not lint */
=20
#include <config.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/nls/Makefil=
e.in
--- a/head/contrib/bind9/lib/isc/nls/Makefile.in Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/lib/isc/nls/Makefile.in Tue Apr 17 11:51:51 2012 +=
0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.17 2009-12-05 23:31:41 each Exp $
+# $Id: Makefile.in,v 1.17 2009/12/05 23:31:41 each Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/nls/msgcat.c
--- a/head/contrib/bind9/lib/isc/nls/msgcat.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/nls/msgcat.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: msgcat.c,v 1.18 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: msgcat.c,v 1.18 2007/06/19 23:47:18 tbox Exp $ */
=20
/*! \file msgcat.c
*
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/noatomic/Ma=
kefile.in
--- a/head/contrib/bind9/lib/isc/noatomic/Makefile.in Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/noatomic/Makefile.in Tue Apr 17 11:51:51 2=
012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/noatomic/in=
clude/Makefile.in
--- a/head/contrib/bind9/lib/isc/noatomic/include/Makefile.in Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/noatomic/include/Makefile.in Tue Apr 17 11=
:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/noatomic/in=
clude/isc/Makefile.in
--- a/head/contrib/bind9/lib/isc/noatomic/include/isc/Makefile.in Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/noatomic/include/isc/Makefile.in Tue Apr 1=
7 11:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/noatomic/in=
clude/isc/atomic.h
--- a/head/contrib/bind9/lib/isc/noatomic/include/isc/atomic.h Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/noatomic/include/isc/atomic.h Tue Apr 17 1=
1:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: atomic.h,v 1.4 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: atomic.h,v 1.4 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_ATOMIC_H
#define ISC_ATOMIC_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/nothreads/M=
akefile.in
--- a/head/contrib/bind9/lib/isc/nothreads/Makefile.in Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/isc/nothreads/Makefile.in Tue Apr 17 11:51:51 =
2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.12 2010-06-09 23:50:58 tbox Exp $
+# $Id: Makefile.in,v 1.12 2010/06/09 23:50:58 tbox Exp $
=20
top_srcdir =3D @top_srcdir@
srcdir =3D @top_srcdir@/lib/isc/nothreads
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/nothreads/c=
ondition.c
--- a/head/contrib/bind9/lib/isc/nothreads/condition.c Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/isc/nothreads/condition.c Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: condition.c,v 1.10 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: condition.c,v 1.10 2007/06/19 23:47:18 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/nothreads/i=
nclude/Makefile.in
--- a/head/contrib/bind9/lib/isc/nothreads/include/Makefile.in Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/nothreads/include/Makefile.in Tue Apr 17 1=
1:51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.5 2007-06-19 23:47:18 tbox Exp $
+# $Id: Makefile.in,v 1.5 2007/06/19 23:47:18 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/nothreads/i=
nclude/isc/Makefile.in
--- a/head/contrib/bind9/lib/isc/nothreads/include/isc/Makefile.in Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/nothreads/include/isc/Makefile.in Tue Apr =
17 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.7 2007-06-19 23:47:18 tbox Exp $
+# $Id: Makefile.in,v 1.7 2007/06/19 23:47:18 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/nothreads/i=
nclude/isc/condition.h
--- a/head/contrib/bind9/lib/isc/nothreads/include/isc/condition.h Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/nothreads/include/isc/condition.h Tue Apr =
17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: condition.h,v 1.6 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: condition.h,v 1.6 2007/06/19 23:47:18 tbox Exp $ */
=20
/*
* This provides a limited subset of the isc_condition_t
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/nothreads/i=
nclude/isc/mutex.h
--- a/head/contrib/bind9/lib/isc/nothreads/include/isc/mutex.h Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/nothreads/include/isc/mutex.h Tue Apr 17 1=
1:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: mutex.h,v 1.6 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: mutex.h,v 1.6 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_MUTEX_H
#define ISC_MUTEX_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/nothreads/i=
nclude/isc/once.h
--- a/head/contrib/bind9/lib/isc/nothreads/include/isc/once.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/nothreads/include/isc/once.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: once.h,v 1.6 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: once.h,v 1.6 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_ONCE_H
#define ISC_ONCE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/nothreads/i=
nclude/isc/thread.h
--- a/head/contrib/bind9/lib/isc/nothreads/include/isc/thread.h Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/nothreads/include/isc/thread.h Tue Apr 17 =
11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: thread.h,v 1.6 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: thread.h,v 1.6 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_THREAD_H
#define ISC_THREAD_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/nothreads/m=
utex.c
--- a/head/contrib/bind9/lib/isc/nothreads/mutex.c Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/isc/nothreads/mutex.c Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: mutex.c,v 1.10 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: mutex.c,v 1.10 2007/06/19 23:47:18 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/nothreads/t=
hread.c
--- a/head/contrib/bind9/lib/isc/nothreads/thread.c Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/isc/nothreads/thread.c Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: thread.c,v 1.5 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: thread.c,v 1.5 2007/06/19 23:47:18 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/ondestroy.c
--- a/head/contrib/bind9/lib/isc/ondestroy.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/ondestroy.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ondestroy.c,v 1.16 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: ondestroy.c,v 1.16 2007/06/19 23:47:17 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/parseint.c
--- a/head/contrib/bind9/lib/isc/parseint.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/parseint.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: parseint.c,v 1.8 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: parseint.c,v 1.8 2007/06/19 23:47:17 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/portset.c
--- a/head/contrib/bind9/lib/isc/portset.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/portset.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: portset.c,v 1.4 2008-06-24 23:24:35 marka Exp $ */
+/* $Id: portset.c,v 1.4 2008/06/24 23:24:35 marka Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/powerpc/Mak=
efile.in
--- a/head/contrib/bind9/lib/isc/powerpc/Makefile.in Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/powerpc/Makefile.in Tue Apr 17 11:51:51 20=
12 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/powerpc/inc=
lude/Makefile.in
--- a/head/contrib/bind9/lib/isc/powerpc/include/Makefile.in Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/powerpc/include/Makefile.in Tue Apr 17 11:=
51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/powerpc/inc=
lude/isc/Makefile.in
--- a/head/contrib/bind9/lib/isc/powerpc/include/isc/Makefile.in Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/powerpc/include/isc/Makefile.in Tue Apr 17=
11:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/powerpc/inc=
lude/isc/atomic.h
--- a/head/contrib/bind9/lib/isc/powerpc/include/isc/atomic.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/powerpc/include/isc/atomic.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2005, 2007, 2009, 2011 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2005, 2007, 2009, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: atomic.h,v 1.8.284.3 2011-03-08 00:52:21 marka Exp $ */
+/* $Id$ */
=20
#ifndef ISC_ATOMIC_H
#define ISC_ATOMIC_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/print.c
--- a/head/contrib/bind9/lib/isc/print.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/print.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: print.c,v 1.37 2010-10-18 23:47:08 tbox Exp $ */
+/* $Id: print.c,v 1.37 2010/10/18 23:47:08 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/pthreads/Ma=
kefile.in
--- a/head/contrib/bind9/lib/isc/pthreads/Makefile.in Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/pthreads/Makefile.in Tue Apr 17 11:51:51 2=
012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.22 2009-12-05 23:31:41 each Exp $
+# $Id: Makefile.in,v 1.22 2009/12/05 23:31:41 each Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/pthreads/co=
ndition.c
--- a/head/contrib/bind9/lib/isc/pthreads/condition.c Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/pthreads/condition.c Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: condition.c,v 1.36 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: condition.c,v 1.36 2007/06/19 23:47:18 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/pthreads/in=
clude/Makefile.in
--- a/head/contrib/bind9/lib/isc/pthreads/include/Makefile.in Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/pthreads/include/Makefile.in Tue Apr 17 11=
:51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.14 2007-06-19 23:47:18 tbox Exp $
+# $Id: Makefile.in,v 1.14 2007/06/19 23:47:18 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/pthreads/in=
clude/isc/Makefile.in
--- a/head/contrib/bind9/lib/isc/pthreads/include/isc/Makefile.in Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/pthreads/include/isc/Makefile.in Tue Apr 1=
7 11:51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.16 2007-06-19 23:47:18 tbox Exp $
+# $Id: Makefile.in,v 1.16 2007/06/19 23:47:18 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/pthreads/in=
clude/isc/condition.h
--- a/head/contrib/bind9/lib/isc/pthreads/include/isc/condition.h Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/pthreads/include/isc/condition.h Tue Apr 1=
7 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: condition.h,v 1.26 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: condition.h,v 1.26 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_CONDITION_H
#define ISC_CONDITION_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/pthreads/in=
clude/isc/mutex.h
--- a/head/contrib/bind9/lib/isc/pthreads/include/isc/mutex.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/pthreads/include/isc/mutex.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: mutex.h,v 1.30 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: mutex.h,v 1.30 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_MUTEX_H
#define ISC_MUTEX_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/pthreads/in=
clude/isc/once.h
--- a/head/contrib/bind9/lib/isc/pthreads/include/isc/once.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/pthreads/include/isc/once.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: once.h,v 1.13 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: once.h,v 1.13 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_ONCE_H
#define ISC_ONCE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/pthreads/in=
clude/isc/thread.h
--- a/head/contrib/bind9/lib/isc/pthreads/include/isc/thread.h Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/pthreads/include/isc/thread.h Tue Apr 17 1=
1:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: thread.h,v 1.26 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: thread.h,v 1.26 2007/06/19 23:47:18 tbox Exp $ */
=20
#ifndef ISC_THREAD_H
#define ISC_THREAD_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/pthreads/mu=
tex.c
--- a/head/contrib/bind9/lib/isc/pthreads/mutex.c Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/isc/pthreads/mutex.c Tue Apr 17 11:51:51 2012 =
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: mutex.c,v 1.18 2011-01-04 23:47:14 tbox Exp $ */
+/* $Id: mutex.c,v 1.18 2011/01/04 23:47:14 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/pthreads/th=
read.c
--- a/head/contrib/bind9/lib/isc/pthreads/thread.c Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/isc/pthreads/thread.c Tue Apr 17 11:51:51 2012=
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: thread.c,v 1.17 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: thread.c,v 1.17 2007/06/19 23:47:18 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/quota.c
--- a/head/contrib/bind9/lib/isc/quota.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/quota.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: quota.c,v 1.18 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: quota.c,v 1.18 2007/06/19 23:47:17 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/radix.c
--- a/head/contrib/bind9/lib/isc/radix.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/radix.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2007-2009, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2007-2009, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: radix.c,v 1.23.426.2 2011-03-12 04:59:18 tbox Exp $ */
+/* $Id$ */
=20
/*
* This source was adapted from MRT's RCS Ids:
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/random.c
--- a/head/contrib/bind9/lib/isc/random.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/random.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: random.c,v 1.28 2009-07-16 05:52:46 marka Exp $ */
+/* $Id: random.c,v 1.28 2009/07/16 05:52:46 marka Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/ratelimiter=
.c
--- a/head/contrib/bind9/lib/isc/ratelimiter.c Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/isc/ratelimiter.c Tue Apr 17 11:51:51 2012 +03=
00
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ratelimiter.c,v 1.25 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: ratelimiter.c,v 1.25 2007/06/19 23:47:17 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/refcount.c
--- a/head/contrib/bind9/lib/isc/refcount.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/refcount.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: refcount.c,v 1.5 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: refcount.c,v 1.5 2007/06/19 23:47:17 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/region.c
--- a/head/contrib/bind9/lib/isc/region.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/region.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: region.c,v 1.7 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: region.c,v 1.7 2007/06/19 23:47:17 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/result.c
--- a/head/contrib/bind9/lib/isc/result.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/result.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2008 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2008, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1998-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: result.c,v 1.71 2008-09-25 04:02:39 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -102,6 +102,7 @@
"max size", /*%< 58 */
"invalid address format", /*%< 59 */
"bad base32 encoding", /*%< 60 */
+ "unset", /*%< 61 */
};
=20
#define ISC_RESULT_RESULTSET 2
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/rwlock.c
--- a/head/contrib/bind9/lib/isc/rwlock.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/rwlock.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2009, 2011 Internet Systems Consortium=
, Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2009, 2011, 2012 Internet Systems Cons=
ortium, Inc. ("ISC")
* Copyright (C) 1998-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: rwlock.c,v 1.46.426.2 2011-03-12 04:59:18 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/serial.c
--- a/head/contrib/bind9/lib/isc/serial.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/serial.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: serial.c,v 1.12 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: serial.c,v 1.12 2007/06/19 23:47:17 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/sha1.c
--- a/head/contrib/bind9/lib/isc/sha1.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/sha1.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2009, 2011 Internet Systems Consortium=
, Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2009, 2011, 2012 Internet Systems Cons=
ortium, Inc. ("ISC")
* Copyright (C) 2000, 2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sha1.c,v 1.20.408.2 2011-03-12 04:59:18 tbox Exp $ */
+/* $Id$ */
=20
/* $NetBSD: sha1.c,v 1.5 2000/01/22 22:19:14 mycroft Exp $ */
/* $OpenBSD: sha1.c,v 1.9 1997/07/23 21:12:32 kstailey Exp $ */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/sha2.c
--- a/head/contrib/bind9/lib/isc/sha2.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/sha2.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2005-2007, 2009, 2011 Internet Systems Consortium, Inc. =
("ISC")
+ * Copyright (C) 2005-2007, 2009, 2011, 2012 Internet Systems Consortium,=
Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,9 +14,9 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sha2.c,v 1.18.280.2 2011-03-12 04:59:18 tbox Exp $ */
+/* $Id$ */
=20
-/* $FreeBSD: head/contrib/bind9/lib/isc/sha2.c 225361 2011-09-03 07:13:45Z=
dougb $ */
+/* $FreeBSD: head/contrib/bind9/lib/isc/sha2.c 233914 2012-04-05 04:29:35Z=
dougb $ */
/* $KAME: sha2.c,v 1.8 2001/11/08 01:07:52 itojun Exp $ */
=20
/*
@@ -905,7 +905,7 @@
}
=20
/* Clean up state data: */
- memset(context, 0, sizeof(context));
+ memset(context, 0, sizeof(*context));
usedspace =3D 0;
POST(usedspace);
}
@@ -1229,7 +1229,7 @@
}
=20
/* Zero out state data */
- memset(context, 0, sizeof(context));
+ memset(context, 0, sizeof(*context));
}
=20
=20
@@ -1282,7 +1282,7 @@
}
=20
/* Zero out state data */
- memset(context, 0, sizeof(context));
+ memset(context, 0, sizeof(*context));
}
#endif /* !ISC_PLATFORM_OPENSSLHASH */
=20
@@ -1313,7 +1313,7 @@
#ifdef ISC_PLATFORM_OPENSSLHASH
EVP_MD_CTX_cleanup(context);
#else
- memset(context, 0, sizeof(context));
+ memset(context, 0, sizeof(*context));
#endif
}
memset(digest, 0, ISC_SHA224_DIGESTLENGTH);
@@ -1352,7 +1352,7 @@
#ifdef ISC_PLATFORM_OPENSSLHASH
EVP_MD_CTX_cleanup(context);
#else
- memset(context, 0, sizeof(context));
+ memset(context, 0, sizeof(*context));
#endif
}
memset(digest, 0, ISC_SHA256_DIGESTLENGTH);
@@ -1391,7 +1391,7 @@
#ifdef ISC_PLATFORM_OPENSSLHASH
EVP_MD_CTX_cleanup(context);
#else
- memset(context, 0, sizeof(context));
+ memset(context, 0, sizeof(*context));
#endif
}
memset(digest, 0, ISC_SHA512_DIGESTLENGTH);
@@ -1430,7 +1430,7 @@
#ifdef ISC_PLATFORM_OPENSSLHASH
EVP_MD_CTX_cleanup(context);
#else
- memset(context, 0, sizeof(context));
+ memset(context, 0, sizeof(*context));
#endif
}
memset(digest, 0, ISC_SHA384_DIGESTLENGTH);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/sockaddr.c
--- a/head/contrib/bind9/lib/isc/sockaddr.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/sockaddr.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2010, 2011 Internet Systems Consortium, Inc. =
("ISC")
+ * Copyright (C) 2004-2007, 2010-2012 Internet Systems Consortium, Inc. (=
"ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sockaddr.c,v 1.73.38.2 2011-02-28 01:20:03 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/socket_api.c
--- a/head/contrib/bind9/lib/isc/socket_api.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/socket_api.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009, 2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: socket_api.c,v 1.5 2009-10-01 01:30:01 sar Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/sparc64/Mak=
efile.in
--- a/head/contrib/bind9/lib/isc/sparc64/Makefile.in Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/sparc64/Makefile.in Tue Apr 17 11:51:51 20=
12 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/sparc64/inc=
lude/Makefile.in
--- a/head/contrib/bind9/lib/isc/sparc64/include/Makefile.in Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/sparc64/include/Makefile.in Tue Apr 17 11:=
51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/sparc64/inc=
lude/isc/Makefile.in
--- a/head/contrib/bind9/lib/isc/sparc64/include/isc/Makefile.in Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/sparc64/include/isc/Makefile.in Tue Apr 17=
11:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/sparc64/inc=
lude/isc/atomic.h
--- a/head/contrib/bind9/lib/isc/sparc64/include/isc/atomic.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/sparc64/include/isc/atomic.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: atomic.h,v 1.5 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: atomic.h,v 1.5 2007/06/19 23:47:18 tbox Exp $ */
=20
/*
* This code was written based on FreeBSD's kernel source whose copyright
@@ -48,7 +48,7 @@
* SUCH DAMAGE.
*
* from: FreeBSD: src/sys/i386/include/atomic.h,v 1.20 2001/02/11
- * $FreeBSD: head/contrib/bind9/lib/isc/sparc64/include/isc/atomic.h 22381=
1 2011-07-06 00:47:27Z dougb $
+ * $FreeBSD: head/contrib/bind9/lib/isc/sparc64/include/isc/atomic.h 23391=
4 2012-04-05 04:29:35Z dougb $
*/
=20
#ifndef ISC_ATOMIC_H
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/stats.c
--- a/head/contrib/bind9/lib/isc/stats.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/stats.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009, 2012 Internet Systems Consortium, Inc. ("ISC")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: stats.c,v 1.3 2009-01-27 23:47:54 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/string.c
--- a/head/contrib/bind9/lib/isc/string.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/string.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2007, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 1999-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: string.c,v 1.20.814.2 2011-03-12 04:59:18 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/strtoul.c
--- a/head/contrib/bind9/lib/isc/strtoul.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/strtoul.c Tue Apr 17 11:51:51 2012 +0300
@@ -53,7 +53,7 @@
static char sccsid[] =3D "@(#)strtoul.c 8.1 (Berkeley) 6/4/93";
#endif /* LIBC_SCCS and not lint */
=20
-/* $Id: strtoul.c,v 1.7 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: strtoul.c,v 1.7 2007/06/19 23:47:17 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/symtab.c
--- a/head/contrib/bind9/lib/isc/symtab.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/symtab.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2005, 2007, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1996-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: symtab.c,v 1.30 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -46,6 +46,8 @@
unsigned int magic;
isc_mem_t * mctx;
unsigned int size;
+ unsigned int count;
+ unsigned int maxload;
eltlist_t * table;
isc_symtabaction_t undefine_action;
void * undefine_arg;
@@ -79,6 +81,8 @@
INIT_LIST(symtab->table[i]);
symtab->mctx =3D mctx;
symtab->size =3D size;
+ symtab->count =3D 0;
+ symtab->maxload =3D size * 3 / 4;
symtab->undefine_action =3D undefine_action;
symtab->undefine_arg =3D undefine_arg;
symtab->case_sensitive =3D case_sensitive;
@@ -181,6 +185,46 @@
return (ISC_R_SUCCESS);
}
=20
+static void
+grow_table(isc_symtab_t *symtab) {
+ eltlist_t *newtable;
+ unsigned int i, newsize, newmax;
+
+ REQUIRE(symtab !=3D NULL);
+
+ newsize =3D symtab->size * 2;
+ newmax =3D newsize * 3 / 4;
+ INSIST(newsize > 0U && newmax > 0U);
+
+ newtable =3D isc_mem_get(symtab->mctx, newsize * sizeof(eltlist_t));
+ if (newtable =3D=3D NULL)
+ return;
+
+ for (i =3D 0; i < newsize; i++)
+ INIT_LIST(newtable[i]);
+
+ for (i =3D 0; i < symtab->size; i++) {
+ elt_t *elt, *nelt;
+
+ for (elt =3D HEAD(symtab->table[i]); elt !=3D NULL; elt =3D nelt) {
+ unsigned int hv;
+
+ nelt =3D NEXT(elt, link);
+
+ UNLINK(symtab->table[i], elt, link);
+ hv =3D hash(elt->key, symtab->case_sensitive);
+ APPEND(newtable[hv % newsize], elt, link);
+ }
+ }
+
+ isc_mem_put(symtab->mctx, symtab->table,
+ symtab->size * sizeof(eltlist_t));
+
+ symtab->table =3D newtable;
+ symtab->size =3D newsize;
+ symtab->maxload =3D newmax;
+}
+
isc_result_t
isc_symtab_define(isc_symtab_t *symtab, const char *key, unsigned int type,
isc_symvalue_t value, isc_symexists_t exists_policy)
@@ -208,6 +252,7 @@
if (elt =3D=3D NULL)
return (ISC_R_NOMEMORY);
ISC_LINK_INIT(elt, link);
+ symtab->count++;
}
=20
/*
@@ -226,6 +271,9 @@
*/
PREPEND(symtab->table[bucket], elt, link);
=20
+ if (symtab->count > symtab->maxload)
+ grow_table(symtab);
+
return (ISC_R_SUCCESS);
}
=20
@@ -247,6 +295,7 @@
elt->value, symtab->undefine_arg);
UNLINK(symtab->table[bucket], elt, link);
isc_mem_put(symtab->mctx, elt, sizeof(*elt));
+ symtab->count--;
=20
return (ISC_R_SUCCESS);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/task.c
--- a/head/contrib/bind9/lib/isc/task.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/task.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1998-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: task.c,v 1.115.14.2 2011-02-28 01:20:03 tbox Exp $ */
+/* $Id$ */
=20
/*! \file
* \author Principal Author: Bob Halley
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/task_api.c
--- a/head/contrib/bind9/lib/isc/task_api.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/task_api.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2009, 2010 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2009, 2010, 2012 Internet Systems Consortium, Inc. ("ISC=
")
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: task_api.c,v 1.7 2010-12-22 23:46:59 tbox Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/task_p.h
--- a/head/contrib/bind9/lib/isc/task_p.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/task_p.h Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2009 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2009, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 2000, 2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: task_p.h,v 1.13 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id$ */
=20
#ifndef ISC_TASK_P_H
#define ISC_TASK_P_H
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/taskpool.c
--- a/head/contrib/bind9/lib/isc/taskpool.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/taskpool.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2011 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: taskpool.c,v 1.18.814.2 2011-07-08 23:47:16 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/timer.c
--- a/head/contrib/bind9/lib/isc/timer.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/timer.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007-2009, 2011 Internet Systems Consortium,=
Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007-2009, 2011, 2012 Internet Systems Conso=
rtium, Inc. ("ISC")
* Copyright (C) 1998-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: timer.c,v 1.95.302.3 2011-03-11 06:47:08 marka Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/timer_api.c
--- a/head/contrib/bind9/lib/isc/timer_api.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/timer_api.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: timer_api.c,v 1.4 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: timer_api.c,v 1.4 2009/09/02 23:48:02 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/timer_p.h
--- a/head/contrib/bind9/lib/isc/timer_p.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/timer_p.h Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: timer_p.h,v 1.12 2009-09-02 23:48:02 tbox Exp $ */
+/* $Id: timer_p.h,v 1.12 2009/09/02 23:48:02 tbox Exp $ */
=20
#ifndef ISC_TIMER_P_H
#define ISC_TIMER_P_H
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/Makefi=
le.in
--- a/head/contrib/bind9/lib/isc/unix/Makefile.in Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/isc/unix/Makefile.in Tue Apr 17 11:51:51 2012 =
+0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.44 2009-12-05 23:31:41 each Exp $
+# $Id: Makefile.in,v 1.44 2009/12/05 23:31:41 each Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/app.c
--- a/head/contrib/bind9/lib/isc/unix/app.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/app.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: app.c,v 1.64 2009-11-04 05:58:46 marka Exp $ */
+/* $Id: app.c,v 1.64 2009/11/04 05:58:46 marka Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/dir.c
--- a/head/contrib/bind9/lib/isc/unix/dir.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/dir.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007-2009, 2011 Internet Systems Consortium,=
Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007-2009, 2011, 2012 Internet Systems Conso=
rtium, Inc. ("ISC")
* Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dir.c,v 1.29.404.2 2011-03-12 04:59:19 tbox Exp $ */
+/* $Id$ */
=20
/*! \file
* \author Principal Authors: DCL */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/entrop=
y.c
--- a/head/contrib/bind9/lib/isc/unix/entropy.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/isc/unix/entropy.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: entropy.c,v 1.82 2008-12-01 23:47:45 tbox Exp $ */
+/* $Id: entropy.c,v 1.82 2008/12/01 23:47:45 tbox Exp $ */
=20
/* \file unix/entropy.c
* \brief
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/errno2=
result.c
--- a/head/contrib/bind9/lib/isc/unix/errno2result.c Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/unix/errno2result.c Tue Apr 17 11:51:51 20=
12 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2005, 2007, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 2000-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: errno2result.c,v 1.17 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -34,7 +34,7 @@
* not already there.
*/
isc_result_t
-isc__errno2result(int posixerrno) {
+isc___errno2result(int posixerrno, const char *file, unsigned int line) {
char strbuf[ISC_STRERRORSIZE];
=20
switch (posixerrno) {
@@ -55,7 +55,7 @@
return (ISC_R_IOERROR);
case ENOMEM:
return (ISC_R_NOMEMORY);
- case ENFILE:=09
+ case ENFILE:
case EMFILE:
return (ISC_R_TOOMANYOPENFILES);
case EPIPE:
@@ -108,8 +108,7 @@
return (ISC_R_CONNREFUSED);
default:
isc__strerror(posixerrno, strbuf, sizeof(strbuf));
- UNEXPECTED_ERROR(__FILE__, __LINE__,
- "unable to convert errno "
+ UNEXPECTED_ERROR(file, line, "unable to convert errno "
"to isc_result: %d: %s",
posixerrno, strbuf);
/*
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/errno2=
result.h
--- a/head/contrib/bind9/lib/isc/unix/errno2result.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/unix/errno2result.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2005, 2007, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 2000, 2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: errno2result.h,v 1.12 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id$ */
=20
#ifndef UNIX_ERRNO2RESULT_H
#define UNIX_ERRNO2RESULT_H 1
@@ -31,8 +31,10 @@
=20
ISC_LANG_BEGINDECLS
=20
+#define isc__errno2result(x) isc___errno2result(x, __FILE__, __LINE__)
+
isc_result_t
-isc__errno2result(int posixerrno);
+isc___errno2result(int posixerrno, const char *file, unsigned int line);
=20
ISC_LANG_ENDDECLS
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/file.c
--- a/head/contrib/bind9/lib/isc/unix/file.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/file.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2009, 2011 Internet Systems Consortium=
, Inc. ("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2009, 2011, 2012 Internet Systems Cons=
ortium, Inc. ("ISC")
* Copyright (C) 2000-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -48,7 +48,7 @@
* SUCH DAMAGE.
*/
=20
-/* $Id: file.c,v 1.57.10.1 2011-03-04 14:10:13 smann Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/fsacce=
ss.c
--- a/head/contrib/bind9/lib/isc/unix/fsaccess.c Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/lib/isc/unix/fsaccess.c Tue Apr 17 11:51:51 2012 +=
0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: fsaccess.c,v 1.13 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: fsaccess.c,v 1.13 2007/06/19 23:47:18 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/ifiter=
_getifaddrs.c
--- a/head/contrib/bind9/lib/isc/unix/ifiter_getifaddrs.c Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/ifiter_getifaddrs.c Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ifiter_getifaddrs.c,v 1.13 2009-09-24 23:48:13 tbox Exp $ */
+/* $Id: ifiter_getifaddrs.c,v 1.13 2009/09/24 23:48:13 tbox Exp $ */
=20
/*! \file
* \brief
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/ifiter=
_ioctl.c
--- a/head/contrib/bind9/lib/isc/unix/ifiter_ioctl.c Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/isc/unix/ifiter_ioctl.c Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ifiter_ioctl.c,v 1.62 2009-01-18 23:48:14 tbox Exp $ */
+/* $Id: ifiter_ioctl.c,v 1.62 2009/01/18 23:48:14 tbox Exp $ */
=20
/*! \file
* \brief
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/ifiter=
_sysctl.c
--- a/head/contrib/bind9/lib/isc/unix/ifiter_sysctl.c Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/ifiter_sysctl.c Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ifiter_sysctl.c,v 1.25 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: ifiter_sysctl.c,v 1.25 2007/06/19 23:47:18 tbox Exp $ */
=20
/*! \file
* \brief
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/includ=
e/Makefile.in
--- a/head/contrib/bind9/lib/isc/unix/include/Makefile.in Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/include/Makefile.in Tue Apr 17 11:51:=
51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.14 2007-06-19 23:47:18 tbox Exp $
+# $Id: Makefile.in,v 1.14 2007/06/19 23:47:18 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/includ=
e/isc/Makefile.in
--- a/head/contrib/bind9/lib/isc/unix/include/isc/Makefile.in Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/include/isc/Makefile.in Tue Apr 17 11=
:51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.30 2007-06-19 23:47:19 tbox Exp $
+# $Id: Makefile.in,v 1.30 2007/06/19 23:47:19 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/includ=
e/isc/dir.h
--- a/head/contrib/bind9/lib/isc/unix/include/isc/dir.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/include/isc/dir.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dir.h,v 1.21 2007-06-19 23:47:19 tbox Exp $ */
+/* $Id: dir.h,v 1.21 2007/06/19 23:47:19 tbox Exp $ */
=20
/* Principal Authors: DCL */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/includ=
e/isc/int.h
--- a/head/contrib/bind9/lib/isc/unix/include/isc/int.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/include/isc/int.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: int.h,v 1.16 2007-06-19 23:47:19 tbox Exp $ */
+/* $Id: int.h,v 1.16 2007/06/19 23:47:19 tbox Exp $ */
=20
#ifndef ISC_INT_H
#define ISC_INT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/includ=
e/isc/keyboard.h
--- a/head/contrib/bind9/lib/isc/unix/include/isc/keyboard.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/include/isc/keyboard.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: keyboard.h,v 1.11 2007-06-19 23:47:19 tbox Exp $ */
+/* $Id: keyboard.h,v 1.11 2007/06/19 23:47:19 tbox Exp $ */
=20
#ifndef ISC_KEYBOARD_H
#define ISC_KEYBOARD_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/includ=
e/isc/net.h
--- a/head/contrib/bind9/lib/isc/unix/include/isc/net.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/include/isc/net.h Tue Apr 17 11:51:51=
2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2008 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2008, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: net.h,v 1.50 2008-12-01 04:14:54 marka Exp $ */
+/* $Id$ */
=20
#ifndef ISC_NET_H
#define ISC_NET_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/includ=
e/isc/netdb.h
--- a/head/contrib/bind9/lib/isc/unix/include/isc/netdb.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/include/isc/netdb.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: netdb.h,v 1.11 2007-06-19 23:47:19 tbox Exp $ */
+/* $Id: netdb.h,v 1.11 2007/06/19 23:47:19 tbox Exp $ */
=20
#ifndef ISC_NETDB_H
#define ISC_NETDB_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/includ=
e/isc/offset.h
--- a/head/contrib/bind9/lib/isc/unix/include/isc/offset.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/include/isc/offset.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: offset.h,v 1.17 2008-12-01 23:47:45 tbox Exp $ */
+/* $Id: offset.h,v 1.17 2008/12/01 23:47:45 tbox Exp $ */
=20
#ifndef ISC_OFFSET_H
#define ISC_OFFSET_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/includ=
e/isc/stat.h
--- a/head/contrib/bind9/lib/isc/unix/include/isc/stat.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/include/isc/stat.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: stat.h,v 1.5 2007-06-19 23:47:19 tbox Exp $ */
+/* $Id: stat.h,v 1.5 2007/06/19 23:47:19 tbox Exp $ */
=20
#ifndef ISC_STAT_H
#define ISC_STAT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/includ=
e/isc/stdtime.h
--- a/head/contrib/bind9/lib/isc/unix/include/isc/stdtime.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/include/isc/stdtime.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2011 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: stdtime.h,v 1.14.814.2 2011-03-18 23:47:15 tbox Exp $ */
+/* $Id$ */
=20
#ifndef ISC_STDTIME_H
#define ISC_STDTIME_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/includ=
e/isc/strerror.h
--- a/head/contrib/bind9/lib/isc/unix/include/isc/strerror.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/include/isc/strerror.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: strerror.h,v 1.10 2008-12-01 23:47:45 tbox Exp $ */
+/* $Id: strerror.h,v 1.10 2008/12/01 23:47:45 tbox Exp $ */
=20
#ifndef ISC_STRERROR_H
#define ISC_STRERROR_H
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/includ=
e/isc/syslog.h
--- a/head/contrib/bind9/lib/isc/unix/include/isc/syslog.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/include/isc/syslog.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: syslog.h,v 1.7 2007-06-19 23:47:19 tbox Exp $ */
+/* $Id: syslog.h,v 1.7 2007/06/19 23:47:19 tbox Exp $ */
=20
#ifndef ISC_SYSLOG_H
#define ISC_SYSLOG_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/includ=
e/isc/time.h
--- a/head/contrib/bind9/lib/isc/unix/include/isc/time.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/include/isc/time.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: time.h,v 1.40 2009-01-05 23:47:54 tbox Exp $ */
+/* $Id: time.h,v 1.40 2009/01/05 23:47:54 tbox Exp $ */
=20
#ifndef ISC_TIME_H
#define ISC_TIME_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/interf=
aceiter.c
--- a/head/contrib/bind9/lib/isc/unix/interfaceiter.c Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/interfaceiter.c Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: interfaceiter.c,v 1.45 2008-12-01 03:51:47 marka Exp $ */
+/* $Id: interfaceiter.c,v 1.45 2008/12/01 03:51:47 marka Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/ipv6.c
--- a/head/contrib/bind9/lib/isc/unix/ipv6.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/ipv6.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ipv6.c,v 1.14 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: ipv6.c,v 1.14 2007/06/19 23:47:18 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/keyboa=
rd.c
--- a/head/contrib/bind9/lib/isc/unix/keyboard.c Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/lib/isc/unix/keyboard.c Tue Apr 17 11:51:51 2012 +=
0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: keyboard.c,v 1.13 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: keyboard.c,v 1.13 2007/06/19 23:47:18 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/net.c
--- a/head/contrib/bind9/lib/isc/unix/net.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/net.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2008 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2008, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1999-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: net.c,v 1.40 2008-07-04 05:52:31 each Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/os.c
--- a/head/contrib/bind9/lib/isc/unix/os.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/os.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: os.c,v 1.18 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: os.c,v 1.18 2007/06/19 23:47:18 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/resour=
ce.c
--- a/head/contrib/bind9/lib/isc/unix/resource.c Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/lib/isc/unix/resource.c Tue Apr 17 11:51:51 2012 +=
0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: resource.c,v 1.23 2009-02-13 23:48:14 tbox Exp $ */
+/* $Id: resource.c,v 1.23 2009/02/13 23:48:14 tbox Exp $ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/socket=
.c
--- a/head/contrib/bind9/lib/isc/unix/socket.c Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/isc/unix/socket.c Tue Apr 17 11:51:51 2012 +03=
00
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1998-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: socket.c,v 1.333.14.9 2011-07-29 02:19:20 marka Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -1584,7 +1584,7 @@
if (ev =3D=3D NULL)
return (NULL);
=20
- ev->result =3D ISC_R_UNEXPECTED;
+ ev->result =3D ISC_R_UNSET;
ISC_LINK_INIT(ev, ev_link);
ISC_LIST_INIT(ev->bufferlist);
ev->region.base =3D NULL;
@@ -2037,8 +2037,6 @@
if (sock =3D=3D NULL)
return (ISC_R_NOMEMORY);
=20
- result =3D ISC_R_UNEXPECTED;
-
sock->common.magic =3D 0;
sock->common.impmagic =3D 0;
sock->references =3D 0;
@@ -2066,8 +2064,10 @@
sock->recvcmsgbuflen =3D cmsgbuflen;
if (sock->recvcmsgbuflen !=3D 0U) {
sock->recvcmsgbuf =3D isc_mem_get(manager->mctx, cmsgbuflen);
- if (sock->recvcmsgbuf =3D=3D NULL)
+ if (sock->recvcmsgbuf =3D=3D NULL) {
+ result =3D ISC_R_NOMEMORY;
goto error;
+ }
}
=20
cmsgbuflen =3D 0;
@@ -2084,8 +2084,10 @@
sock->sendcmsgbuflen =3D cmsgbuflen;
if (sock->sendcmsgbuflen !=3D 0U) {
sock->sendcmsgbuf =3D isc_mem_get(manager->mctx, cmsgbuflen);
- if (sock->sendcmsgbuf =3D=3D NULL)
+ if (sock->sendcmsgbuf =3D=3D NULL) {
+ result =3D ISC_R_NOMEMORY;
goto error;
+ }
}
=20
memset(sock->name, 0, sizeof(sock->name));
@@ -2223,6 +2225,7 @@
=20
static isc_result_t
opensocket(isc__socketmgr_t *manager, isc__socket_t *sock) {
+ isc_result_t result;
char strbuf[ISC_STRERRORSIZE];
const char *err =3D "socket";
int tries =3D 0;
@@ -2327,9 +2330,10 @@
}
}
=20
- if (make_nonblock(sock->fd) !=3D ISC_R_SUCCESS) {
+ result =3D make_nonblock(sock->fd);
+ if (result !=3D ISC_R_SUCCESS) {
(void)close(sock->fd);
- return (ISC_R_UNEXPECTED);
+ return (result);
}
=20
#ifdef SO_BSDCOMPAT
@@ -3191,10 +3195,12 @@
=20
UNLOCK(&sock->lock);
=20
- if (fd !=3D -1 && (make_nonblock(fd) !=3D ISC_R_SUCCESS)) {
- (void)close(fd);
- fd =3D -1;
- result =3D ISC_R_UNEXPECTED;
+ if (fd !=3D -1) {
+ result =3D make_nonblock(fd);
+ if (result !=3D ISC_R_SUCCESS) {
+ (void)close(fd);
+ fd =3D -1;
+ }
}
=20
/*
@@ -3729,7 +3735,6 @@
watcher(void *uap) {
isc__socketmgr_t *manager =3D uap;
isc_boolean_t done;
- int ctlfd;
int cc;
#ifdef USE_KQUEUE
const char *fnname =3D "kevent()";
@@ -3741,16 +3746,19 @@
#elif defined (USE_SELECT)
const char *fnname =3D "select()";
int maxfd;
+ int ctlfd;
#endif
char strbuf[ISC_STRERRORSIZE];
#ifdef ISC_SOCKET_USE_POLLWATCH
pollstate_t pollstate =3D poll_idle;
#endif
=20
+#if defined (USE_SELECT)
/*
* Get the control fd here. This will never change.
*/
ctlfd =3D manager->pipe_fds[0];
+#endif
done =3D ISC_FALSE;
while (!done) {
do {
@@ -4551,7 +4559,7 @@
isc__socket_t *sock =3D (isc__socket_t *)sock0;
=20
event->ev_sender =3D sock;
- event->result =3D ISC_R_UNEXPECTED;
+ event->result =3D ISC_R_UNSET;
ISC_LIST_INIT(event->bufferlist);
event->region =3D *region;
event->n =3D 0;
@@ -4765,7 +4773,7 @@
if ((flags & ISC_SOCKFLAG_NORETRY) !=3D 0)
REQUIRE(sock->type =3D=3D isc_sockettype_udp);
event->ev_sender =3D sock;
- event->result =3D ISC_R_UNEXPECTED;
+ event->result =3D ISC_R_UNSET;
ISC_LIST_INIT(event->bufferlist);
event->region =3D *region;
event->n =3D 0;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/socket=
_p.h
--- a/head/contrib/bind9/lib/isc/unix/socket_p.h Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/lib/isc/unix/socket_p.h Tue Apr 17 11:51:51 2012 +=
0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: socket_p.h,v 1.15 2009-09-02 23:48:03 tbox Exp $ */
+/* $Id: socket_p.h,v 1.15 2009/09/02 23:48:03 tbox Exp $ */
=20
#ifndef ISC_SOCKET_P_H
#define ISC_SOCKET_P_H
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/stdio.c
--- a/head/contrib/bind9/lib/isc/unix/stdio.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/stdio.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2007, 2011 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2007, 2011, 2012 Internet Systems Consortium, Inc.=
("ISC")
* Copyright (C) 2000, 2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: stdio.c,v 1.8.814.2 2011-03-05 23:52:09 tbox Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
@@ -105,12 +105,23 @@
return (isc__errno2result(errno));
}
=20
+/*
+ * OpenBSD has deprecated ENOTSUP in favor of EOPNOTSUPP.
+ */
+#if defined(EOPNOTSUPP) && !defined(ENOTSUP)
+#define ENOTSUP EOPNOTSUPP
+#endif
+
isc_result_t
isc_stdio_sync(FILE *f) {
int r;
=20
r =3D fsync(fileno(f));
- if (r =3D=3D 0)
+ /*
+ * fsync is not supported on sockets and pipes which
+ * result in EINVAL / ENOTSUP.
+ */
+ if (r =3D=3D 0 || errno =3D=3D EINVAL || errno =3D=3D ENOTSUP)
return (ISC_R_SUCCESS);
else
return (isc__errno2result(errno));
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/stdtim=
e.c
--- a/head/contrib/bind9/lib/isc/unix/stdtime.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/isc/unix/stdtime.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: stdtime.c,v 1.19 2007-06-19 23:47:18 tbox Exp $ */
+/* $Id: stdtime.c,v 1.19 2007/06/19 23:47:18 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/strerr=
or.c
--- a/head/contrib/bind9/lib/isc/unix/strerror.c Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/lib/isc/unix/strerror.c Tue Apr 17 11:51:51 2012 +=
0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: strerror.c,v 1.10 2009-02-16 23:48:04 tbox Exp $ */
+/* $Id: strerror.c,v 1.10 2009/02/16 23:48:04 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/syslog=
.c
--- a/head/contrib/bind9/lib/isc/unix/syslog.c Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/isc/unix/syslog.c Tue Apr 17 11:51:51 2012 +03=
00
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: syslog.c,v 1.8 2007-09-13 04:45:18 each Exp $ */
+/* $Id: syslog.c,v 1.8 2007/09/13 04:45:18 each Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/unix/time.c
--- a/head/contrib/bind9/lib/isc/unix/time.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/unix/time.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2008, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2008, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 1998-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: time.c,v 1.56.608.2 2011-03-12 04:59:19 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -334,7 +334,6 @@
=20
isc_result_t
isc_time_secondsastimet(const isc_time_t *t, time_t *secondsp) {
- isc_uint64_t i;
time_t seconds;
=20
REQUIRE(t !=3D NULL);
@@ -354,33 +353,16 @@
* pretty much only true if time_t is a signed integer of the same
* size as the return value of isc_time_seconds.
*
- * The use of the 64 bit integer ``i'' takes advantage of C's
- * conversion rules to either zero fill or sign extend the widened
- * type.
- *
- * Solaris 5.6 gives this warning about the left shift:
- * warning: integer overflow detected: op "<<"
- * if the U(nsigned) qualifier is not on the 1.
+ * If the paradox in the if clause below is true, t->seconds is out
+ * of range for time_t.
*/
seconds =3D (time_t)t->seconds;
=20
INSIST(sizeof(unsigned int) =3D=3D sizeof(isc_uint32_t));
INSIST(sizeof(time_t) >=3D sizeof(isc_uint32_t));
=20
- if (sizeof(time_t) =3D=3D sizeof(isc_uint32_t) && /* Same size. */
- (time_t)0.5 !=3D 0.5 && /* Not a floating point type. */
- (i =3D (time_t)-1) !=3D 4294967295u && /* Is signed. */
- (seconds &
- (1U << (sizeof(time_t) * CHAR_BIT - 1))) !=3D 0U) { /* Negative. */
- /*
- * This UNUSED() is here to shut up the IRIX compiler:
- * variable "i" was set but never used
- * when the value of i *was* used in the third test.
- * (Let's hope the compiler got the actual test right.)
- */
- UNUSED(i);
+ if (t->seconds > (~0U>>1) && seconds <=3D (time_t)(~0U>>1))
return (ISC_R_RANGE);
- }
=20
*secondsp =3D seconds;
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/version.c
--- a/head/contrib/bind9/lib/isc/version.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/version.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: version.c,v 1.15 2007-06-19 23:47:17 tbox Exp $ */
+/* $Id: version.c,v 1.15 2007/06/19 23:47:17 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/x86_32/Make=
file.in
--- a/head/contrib/bind9/lib/isc/x86_32/Makefile.in Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/isc/x86_32/Makefile.in Tue Apr 17 11:51:51 201=
2 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/x86_32/incl=
ude/Makefile.in
--- a/head/contrib/bind9/lib/isc/x86_32/include/Makefile.in Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/x86_32/include/Makefile.in Tue Apr 17 11:5=
1:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/x86_32/incl=
ude/isc/Makefile.in
--- a/head/contrib/bind9/lib/isc/x86_32/include/isc/Makefile.in Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/x86_32/include/isc/Makefile.in Tue Apr 17 =
11:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/x86_32/incl=
ude/isc/atomic.h
--- a/head/contrib/bind9/lib/isc/x86_32/include/isc/atomic.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/x86_32/include/isc/atomic.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: atomic.h,v 1.10 2008-01-24 23:47:00 tbox Exp $ */
+/* $Id: atomic.h,v 1.10 2008/01/24 23:47:00 tbox Exp $ */
=20
#ifndef ISC_ATOMIC_H
#define ISC_ATOMIC_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/x86_64/Make=
file.in
--- a/head/contrib/bind9/lib/isc/x86_64/Makefile.in Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/isc/x86_64/Makefile.in Tue Apr 17 11:51:51 201=
2 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/x86_64/incl=
ude/Makefile.in
--- a/head/contrib/bind9/lib/isc/x86_64/include/Makefile.in Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/x86_64/include/Makefile.in Tue Apr 17 11:5=
1:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:09:59 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:09:59 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/x86_64/incl=
ude/isc/Makefile.in
--- a/head/contrib/bind9/lib/isc/x86_64/include/isc/Makefile.in Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/x86_64/include/isc/Makefile.in Tue Apr 17 =
11:51:51 2012 +0300
@@ -12,7 +12,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.2 2007-09-14 04:10:00 marka Exp $
+# $Id: Makefile.in,v 1.2 2007/09/14 04:10:00 marka Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isc/x86_64/incl=
ude/isc/atomic.h
--- a/head/contrib/bind9/lib/isc/x86_64/include/isc/atomic.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isc/x86_64/include/isc/atomic.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: atomic.h,v 1.6 2008-01-24 23:47:00 tbox Exp $ */
+/* $Id: atomic.h,v 1.6 2008/01/24 23:47:00 tbox Exp $ */
=20
#ifndef ISC_ATOMIC_H
#define ISC_ATOMIC_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/Makefile.=
in
--- a/head/contrib/bind9/lib/isccc/Makefile.in Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/isccc/Makefile.in Tue Apr 17 11:51:51 2012 +03=
00
@@ -1,4 +1,4 @@
-# Copyright (C) 2004, 2007, 2009, 2011 Internet Systems Consortium, Inc. =
("ISC")
+# Copyright (C) 2004, 2007, 2009, 2011, 2012 Internet Systems Consortium,=
Inc. ("ISC")
# Copyright (C) 2001, 2003 Internet Software Consortium.
#
# Permission to use, copy, modify, and/or distribute this software for any
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.12.244.2 2011-02-28 01:20:04 tbox Exp $
+# $Id$
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/alist.c
--- a/head/contrib/bind9/lib/isccc/alist.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/alist.c Tue Apr 17 11:51:51 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: alist.c,v 1.8 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: alist.c,v 1.8 2007/08/28 07:20:43 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/api
--- a/head/contrib/bind9/lib/isccc/api Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/api Tue Apr 17 11:51:51 2012 +0300
@@ -1,3 +1,8 @@
+# LIBINTERFACE ranges
+# 9.6: 50-59, 110-119
+# 9.7: 60-79
+# 9.8: 80-89
+# 9.9: 90-109
LIBINTERFACE =3D 80
-LIBREVISION =3D 0
+LIBREVISION =3D 1
LIBAGE =3D 0
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/base64.c
--- a/head/contrib/bind9/lib/isccc/base64.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/base64.c Tue Apr 17 11:51:51 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: base64.c,v 1.8 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: base64.c,v 1.8 2007/08/28 07:20:43 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/cc.c
--- a/head/contrib/bind9/lib/isccc/cc.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/cc.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Portions Copyright (C) 2004-2007 Internet Systems Consortium, Inc. ("I=
SC")
+ * Portions Copyright (C) 2004-2007, 2012 Internet Systems Consortium, In=
c. ("ISC")
* Portions Copyright (C) 2001-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: cc.c,v 1.18 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: cc.c,v 1.18 2007/08/28 07:20:43 tbox Exp $ */
=20
/*! \file */
=20
@@ -403,16 +403,17 @@
=20
if (secret !=3D NULL) {
if (checksum_rstart !=3D NULL)
- return (verify(alist, checksum_rstart,
- (source->rend - checksum_rstart),
- secret));
- return (ISCCC_R_BADAUTH);
- }
-
- return (ISC_R_SUCCESS);
+ result =3D verify(alist, checksum_rstart,
+ (source->rend - checksum_rstart),
+ secret);
+ else
+ result =3D ISCCC_R_BADAUTH;
+ } else
+ result =3D ISC_R_SUCCESS;
=20
bad:
- isccc_sexpr_free(&alist);
+ if (result !=3D ISC_R_SUCCESS)
+ isccc_sexpr_free(&alist);
=20
return (result);
}
@@ -439,7 +440,7 @@
}
=20
*listp =3D list;
-=09
+
return (ISC_R_SUCCESS);
}
=20
@@ -455,8 +456,8 @@
return (ISC_R_UNEXPECTEDEND);
GET32(version, source->rstart);
if (version !=3D 1)
- return (ISCCC_R_UNKNOWNVERSION);=09
-=09
+ return (ISCCC_R_UNKNOWNVERSION);
+
return (table_fromwire(source, secret, alistp));
}
=20
@@ -507,7 +508,7 @@
if (to !=3D NULL &&
isccc_cc_definestring(_ctrl, "_to", to) =3D=3D NULL)
goto bad;
- =09
+
*alistp =3D alist;
=20
return (ISC_R_SUCCESS);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/ccmsg.c
--- a/head/contrib/bind9/lib/isccc/ccmsg.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/ccmsg.c Tue Apr 17 11:51:51 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ccmsg.c,v 1.10 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: ccmsg.c,v 1.10 2007/08/28 07:20:43 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/include/M=
akefile.in
--- a/head/contrib/bind9/lib/isccc/include/Makefile.in Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/isccc/include/Makefile.in Tue Apr 17 11:51:51 =
2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.5 2007-06-19 23:47:22 tbox Exp $
+# $Id: Makefile.in,v 1.5 2007/06/19 23:47:22 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/include/i=
sccc/Makefile.in
--- a/head/contrib/bind9/lib/isccc/include/isccc/Makefile.in Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/include/isccc/Makefile.in Tue Apr 17 11:=
51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.7 2007-06-19 23:47:22 tbox Exp $
+# $Id: Makefile.in,v 1.7 2007/06/19 23:47:22 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/include/i=
sccc/alist.h
--- a/head/contrib/bind9/lib/isccc/include/isccc/alist.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/include/isccc/alist.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: alist.h,v 1.10 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: alist.h,v 1.10 2007/08/28 07:20:43 tbox Exp $ */
=20
#ifndef ISCCC_ALIST_H
#define ISCCC_ALIST_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/include/i=
sccc/base64.h
--- a/head/contrib/bind9/lib/isccc/include/isccc/base64.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/include/isccc/base64.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: base64.h,v 1.10 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: base64.h,v 1.10 2007/08/28 07:20:43 tbox Exp $ */
=20
#ifndef ISCCC_BASE64_H
#define ISCCC_BASE64_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/include/i=
sccc/cc.h
--- a/head/contrib/bind9/lib/isccc/include/isccc/cc.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/isccc/include/isccc/cc.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: cc.h,v 1.11 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: cc.h,v 1.11 2007/08/28 07:20:43 tbox Exp $ */
=20
#ifndef ISCCC_CC_H
#define ISCCC_CC_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/include/i=
sccc/ccmsg.h
--- a/head/contrib/bind9/lib/isccc/include/isccc/ccmsg.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/include/isccc/ccmsg.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ccmsg.h,v 1.11 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: ccmsg.h,v 1.11 2007/08/28 07:20:43 tbox Exp $ */
=20
#ifndef ISCCC_CCMSG_H
#define ISCCC_CCMSG_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/include/i=
sccc/events.h
--- a/head/contrib/bind9/lib/isccc/include/isccc/events.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/include/isccc/events.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: events.h,v 1.10 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: events.h,v 1.10 2007/08/28 07:20:43 tbox Exp $ */
=20
#ifndef ISCCC_EVENTS_H
#define ISCCC_EVENTS_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/include/i=
sccc/lib.h
--- a/head/contrib/bind9/lib/isccc/include/isccc/lib.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/isccc/include/isccc/lib.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lib.h,v 1.11 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: lib.h,v 1.11 2007/08/28 07:20:43 tbox Exp $ */
=20
#ifndef ISCCC_LIB_H
#define ISCCC_LIB_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/include/i=
sccc/result.h
--- a/head/contrib/bind9/lib/isccc/include/isccc/result.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/include/isccc/result.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: result.h,v 1.12 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: result.h,v 1.12 2007/08/28 07:20:43 tbox Exp $ */
=20
#ifndef ISCCC_RESULT_H
#define ISCCC_RESULT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/include/i=
sccc/sexpr.h
--- a/head/contrib/bind9/lib/isccc/include/isccc/sexpr.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/include/isccc/sexpr.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sexpr.h,v 1.11 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: sexpr.h,v 1.11 2007/08/28 07:20:43 tbox Exp $ */
=20
#ifndef ISCCC_SEXPR_H
#define ISCCC_SEXPR_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/include/i=
sccc/symtab.h
--- a/head/contrib/bind9/lib/isccc/include/isccc/symtab.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/include/isccc/symtab.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: symtab.h,v 1.10 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: symtab.h,v 1.10 2007/08/28 07:20:43 tbox Exp $ */
=20
#ifndef ISCCC_SYMTAB_H
#define ISCCC_SYMTAB_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/include/i=
sccc/symtype.h
--- a/head/contrib/bind9/lib/isccc/include/isccc/symtype.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/include/isccc/symtype.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: symtype.h,v 1.10 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: symtype.h,v 1.10 2007/08/28 07:20:43 tbox Exp $ */
=20
#ifndef ISCCC_SYMTYPE_H
#define ISCCC_SYMTYPE_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/include/i=
sccc/types.h
--- a/head/contrib/bind9/lib/isccc/include/isccc/types.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/include/isccc/types.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: types.h,v 1.10 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: types.h,v 1.10 2007/08/28 07:20:43 tbox Exp $ */
=20
#ifndef ISCCC_TYPES_H
#define ISCCC_TYPES_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/include/i=
sccc/util.h
--- a/head/contrib/bind9/lib/isccc/include/isccc/util.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/isccc/include/isccc/util.h Tue Apr 17 11:51:51=
2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: util.h,v 1.11 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: util.h,v 1.11 2007/08/28 07:20:43 tbox Exp $ */
=20
#ifndef ISCCC_UTIL_H
#define ISCCC_UTIL_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/include/i=
sccc/version.h
--- a/head/contrib/bind9/lib/isccc/include/isccc/version.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/include/isccc/version.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: version.h,v 1.9 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id: version.h,v 1.9 2007/06/19 23:47:22 tbox Exp $ */
=20
/*! \file isccc/version.h */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/lib.c
--- a/head/contrib/bind9/lib/isccc/lib.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/lib.c Tue Apr 17 11:51:51 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lib.c,v 1.9 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: lib.c,v 1.9 2007/08/28 07:20:43 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/result.c
--- a/head/contrib/bind9/lib/isccc/result.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/result.c Tue Apr 17 11:51:51 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: result.c,v 1.10 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: result.c,v 1.10 2007/08/28 07:20:43 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/sexpr.c
--- a/head/contrib/bind9/lib/isccc/sexpr.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/sexpr.c Tue Apr 17 11:51:51 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: sexpr.c,v 1.9 2007-08-28 07:20:43 tbox Exp $ */
+/* $Id: sexpr.c,v 1.9 2007/08/28 07:20:43 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/symtab.c
--- a/head/contrib/bind9/lib/isccc/symtab.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/symtab.c Tue Apr 17 11:51:51 2012 +0300
@@ -29,7 +29,7 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: symtab.c,v 1.11 2007-09-13 04:45:18 each Exp $ */
+/* $Id: symtab.c,v 1.11 2007/09/13 04:45:18 each Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccc/version.c
--- a/head/contrib/bind9/lib/isccc/version.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccc/version.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: version.c,v 1.7 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id: version.c,v 1.7 2007/06/19 23:47:22 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/Makefile=
.in
--- a/head/contrib/bind9/lib/isccfg/Makefile.in Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/isccfg/Makefile.in Tue Apr 17 11:51:51 2012 +0=
300
@@ -1,4 +1,4 @@
-# Copyright (C) 2004, 2005, 2007, 2009, 2011 Internet Systems Consortium,=
Inc. ("ISC")
+# Copyright (C) 2004, 2005, 2007, 2009, 2011, 2012 Internet Systems Conso=
rtium, Inc. ("ISC")
# Copyright (C) 2001-2003 Internet Software Consortium.
#
# Permission to use, copy, modify, and/or distribute this software for any
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.21.244.3 2011-03-10 04:29:18 each Exp $
+# $Id$
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/aclconf.c
--- a/head/contrib/bind9/lib/isccfg/aclconf.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccfg/aclconf.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 1999-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: aclconf.c,v 1.29.72.2 2011-06-17 23:47:11 tbox Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
@@ -74,13 +74,11 @@
cfg_aclconfctx_detach(cfg_aclconfctx_t **actxp) {
cfg_aclconfctx_t *actx;
dns_acl_t *dacl, *next;
- isc_mem_t *mctx;
unsigned int refs;
=20
REQUIRE(actxp !=3D NULL && *actxp !=3D NULL);
=20
actx =3D *actxp;
- mctx =3D actx->mctx;
=20
isc_refcount_decrement(&actx->references, &refs);
if (refs =3D=3D 0) {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/api
--- a/head/contrib/bind9/lib/isccfg/api Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccfg/api Tue Apr 17 11:51:51 2012 +0300
@@ -1,3 +1,8 @@
+# LIBINTERFACE ranges
+# 9.6: 50-59, 110-119
+# 9.7: 60-79
+# 9.8: 80-89
+# 9.9: 90-109
LIBINTERFACE =3D 82
-LIBREVISION =3D 0
+LIBREVISION =3D 1
LIBAGE =3D 0
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/dnsconf.c
--- a/head/contrib/bind9/lib/isccfg/dnsconf.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccfg/dnsconf.c Tue Apr 17 11:51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dnsconf.c,v 1.4 2009-09-02 23:48:03 tbox Exp $ */
+/* $Id: dnsconf.c,v 1.4 2009/09/02 23:48:03 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/include/=
Makefile.in
--- a/head/contrib/bind9/lib/isccfg/include/Makefile.in Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/isccfg/include/Makefile.in Tue Apr 17 11:51:51=
2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.7 2007-06-19 23:47:22 tbox Exp $
+# $Id: Makefile.in,v 1.7 2007/06/19 23:47:22 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/include/=
isccfg/Makefile.in
--- a/head/contrib/bind9/lib/isccfg/include/isccfg/Makefile.in Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccfg/include/isccfg/Makefile.in Tue Apr 17 1=
1:51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.12 2007-06-19 23:47:22 tbox Exp $
+# $Id: Makefile.in,v 1.12 2007/06/19 23:47:22 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/include/=
isccfg/aclconf.h
--- a/head/contrib/bind9/lib/isccfg/include/isccfg/aclconf.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccfg/include/isccfg/aclconf.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2007, 2010, 2011 Internet Systems Consortium, Inc. =
("ISC")
+ * Copyright (C) 2004-2007, 2010-2012 Internet Systems Consortium, Inc. (=
"ISC")
* Copyright (C) 1999-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: aclconf.h,v 1.12.72.2 2011-06-17 23:47:12 tbox Exp $ */
+/* $Id$ */
=20
#ifndef ISCCFG_ACLCONF_H
#define ISCCFG_ACLCONF_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/include/=
isccfg/cfg.h
--- a/head/contrib/bind9/lib/isccfg/include/isccfg/cfg.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/isccfg/include/isccfg/cfg.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: cfg.h,v 1.46 2010-08-13 23:47:04 tbox Exp $ */
+/* $Id: cfg.h,v 1.46 2010/08/13 23:47:04 tbox Exp $ */
=20
#ifndef ISCCFG_CFG_H
#define ISCCFG_CFG_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/include/=
isccfg/dnsconf.h
--- a/head/contrib/bind9/lib/isccfg/include/isccfg/dnsconf.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccfg/include/isccfg/dnsconf.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -14,7 +14,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: dnsconf.h,v 1.3 2009-09-02 23:48:03 tbox Exp $ */
+/* $Id: dnsconf.h,v 1.3 2009/09/02 23:48:03 tbox Exp $ */
=20
#ifndef ISCCFG_NAMEDCONF_H
#define ISCCFG_NAMEDCONF_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/include/=
isccfg/grammar.h
--- a/head/contrib/bind9/lib/isccfg/include/isccfg/grammar.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccfg/include/isccfg/grammar.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: grammar.h,v 1.24 2011-01-04 23:47:14 tbox Exp $ */
+/* $Id: grammar.h,v 1.24 2011/01/04 23:47:14 tbox Exp $ */
=20
#ifndef ISCCFG_GRAMMAR_H
#define ISCCFG_GRAMMAR_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/include/=
isccfg/log.h
--- a/head/contrib/bind9/lib/isccfg/include/isccfg/log.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/isccfg/include/isccfg/log.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: log.h,v 1.14 2009-01-18 23:48:14 tbox Exp $ */
+/* $Id: log.h,v 1.14 2009/01/18 23:48:14 tbox Exp $ */
=20
#ifndef ISCCFG_LOG_H
#define ISCCFG_LOG_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/include/=
isccfg/namedconf.h
--- a/head/contrib/bind9/lib/isccfg/include/isccfg/namedconf.h Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccfg/include/isccfg/namedconf.h Tue Apr 17 1=
1:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: namedconf.h,v 1.18 2010-08-11 18:14:20 each Exp $ */
+/* $Id: namedconf.h,v 1.18 2010/08/11 18:14:20 each Exp $ */
=20
#ifndef ISCCFG_NAMEDCONF_H
#define ISCCFG_NAMEDCONF_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/include/=
isccfg/version.h
--- a/head/contrib/bind9/lib/isccfg/include/isccfg/version.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccfg/include/isccfg/version.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: version.h,v 1.9 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id: version.h,v 1.9 2007/06/19 23:47:22 tbox Exp $ */
=20
/*! \file isccfg/version.h */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/log.c
--- a/head/contrib/bind9/lib/isccfg/log.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccfg/log.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: log.c,v 1.11 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id: log.c,v 1.11 2007/06/19 23:47:22 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/namedcon=
f.c
--- a/head/contrib/bind9/lib/isccfg/namedconf.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/isccfg/namedconf.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 2002, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: namedconf.c,v 1.131.8.4 2011-05-23 20:56:11 each Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -1016,7 +1016,8 @@
=20
/*
* response-policy {
- * zone <string> [ policy (given|no-op|nxdomain|nodata|cname <domain> ) ];
+ * zone <string> [ policy (given|disabled|passthru|
+ * nxdomain|nodata|cname <domain> ) ];
* };
*
* this is a chimera of doc_optional_keyvalue() and cfg_doc_enum()
@@ -1084,7 +1085,8 @@
}
=20
static const char *rpz_policies[] =3D {
- "given", "no-op", "nxdomain", "nodata", "cname", NULL
+ "given", "disabled", "passthru", "no-op", "nxdomain", "nodata",
+ "cname", NULL
};
static cfg_type_t cfg_type_rpz_policylist =3D {
"policies", cfg_parse_enum, cfg_print_ustring, cfg_doc_enum,
@@ -1145,7 +1147,7 @@
static void
doc_lookaside(cfg_printer_t *pctx, const cfg_type_t *type) {
UNUSED(type);
- cfg_print_cstr(pctx, "( <string> trust-anchor <string> | auto )");
+ cfg_print_cstr(pctx, "( <string> trust-anchor <string> | auto | no )");
}
=20
static keyword_type_t trustanchor_kw =3D { "trust-anchor", &cfg_type_astri=
ng };
@@ -1349,6 +1351,7 @@
{ "also-notify", &cfg_type_portiplist, 0 },
{ "alt-transfer-source", &cfg_type_sockaddr4wild, 0 },
{ "alt-transfer-source-v6", &cfg_type_sockaddr6wild, 0 },
+ { "auto-dnssec", &cfg_type_autodnssec, 0 },
{ "check-dup-records", &cfg_type_checkmode, 0 },
{ "check-integrity", &cfg_type_boolean, 0 },
{ "check-mx", &cfg_type_checkmode, 0 },
@@ -1418,7 +1421,6 @@
*/
{ "check-names", &cfg_type_checkmode, 0 },
{ "ixfr-from-differences", &cfg_type_boolean, 0 },
- { "auto-dnssec", &cfg_type_autodnssec, 0 },
{ "server-addresses", &cfg_type_bracketed_sockaddrlist, 0 },
{ "server-names", &cfg_type_namelist, 0 },
{ NULL, NULL, 0 }
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/parser.c
--- a/head/contrib/bind9/lib/isccfg/parser.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccfg/parser.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2012 Internet Systems Consortium, Inc. ("ISC")
* Copyright (C) 2000-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: parser.c,v 1.139.14.2 2011-03-11 06:47:09 marka Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/isccfg/version.c
--- a/head/contrib/bind9/lib/isccfg/version.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/isccfg/version.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: version.c,v 1.7 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id: version.c,v 1.7 2007/06/19 23:47:22 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/Makefile.=
in
--- a/head/contrib/bind9/lib/lwres/Makefile.in Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/lwres/Makefile.in Tue Apr 17 11:51:51 2012 +03=
00
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.34 2007-06-19 23:47:22 tbox Exp $
+# $Id: Makefile.in,v 1.34 2007/06/19 23:47:22 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/api
--- a/head/contrib/bind9/lib/lwres/api Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/api Tue Apr 17 11:51:51 2012 +0300
@@ -1,3 +1,8 @@
+# LIBINTERFACE ranges
+# 9.6: 50-59, 110-119
+# 9.7: 60-79
+# 9.8: 80-89
+# 9.9: 90-109
LIBINTERFACE =3D 80
-LIBREVISION =3D 1
+LIBREVISION =3D 2
LIBAGE =3D 0
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/assert_p.h
--- a/head/contrib/bind9/lib/lwres/assert_p.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/assert_p.h Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2011 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 2000, 2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: assert_p.h,v 1.14.814.2 2011-03-12 04:59:19 tbox Exp $ */
+/* $Id$ */
=20
#ifndef LWRES_ASSERT_P_H
#define LWRES_ASSERT_P_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/context.c
--- a/head/contrib/bind9/lib/lwres/context.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/context.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: context.c,v 1.55 2009-09-02 23:48:03 tbox Exp $ */
+/* $Id: context.c,v 1.55 2009/09/02 23:48:03 tbox Exp $ */
=20
/*! \file context.c
lwres_context_create() creates a #lwres_context_t structure for use in
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/context_p=
.h
--- a/head/contrib/bind9/lib/lwres/context_p.h Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/lwres/context_p.h Tue Apr 17 11:51:51 2012 +03=
00
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: context_p.h,v 1.19 2008-12-17 23:47:58 tbox Exp $ */
+/* $Id: context_p.h,v 1.19 2008/12/17 23:47:58 tbox Exp $ */
=20
#ifndef LWRES_CONTEXT_P_H
#define LWRES_CONTEXT_P_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/gai_strer=
ror.c
--- a/head/contrib/bind9/lib/lwres/gai_strerror.c Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/lwres/gai_strerror.c Tue Apr 17 11:51:51 2012 =
+0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: gai_strerror.c,v 1.22 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id: gai_strerror.c,v 1.22 2007/06/19 23:47:22 tbox Exp $ */
=20
/*! \file gai_strerror.c
* lwres_gai_strerror() returns an error message corresponding to an
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/getaddrin=
fo.c
--- a/head/contrib/bind9/lib/lwres/getaddrinfo.c Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/lib/lwres/getaddrinfo.c Tue Apr 17 11:51:51 2012 +=
0300
@@ -18,7 +18,7 @@
* IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: getaddrinfo.c,v 1.54 2008-11-25 23:47:23 tbox Exp $ */
+/* $Id: getaddrinfo.c,v 1.54 2008/11/25 23:47:23 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/gethost.c
--- a/head/contrib/bind9/lib/lwres/gethost.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/gethost.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: gethost.c,v 1.34 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id: gethost.c,v 1.34 2007/06/19 23:47:22 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/getipnode=
.c
--- a/head/contrib/bind9/lib/lwres/getipnode.c Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/lwres/getipnode.c Tue Apr 17 11:51:51 2012 +03=
00
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: getipnode.c,v 1.47 2009-09-01 23:47:45 tbox Exp $ */
+/* $Id: getipnode.c,v 1.47 2009/09/01 23:47:45 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/getnamein=
fo.c
--- a/head/contrib/bind9/lib/lwres/getnameinfo.c Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/bind9/lib/lwres/getnameinfo.c Tue Apr 17 11:51:51 2012 +=
0300
@@ -1,5 +1,5 @@
/*
- * Portions Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, I=
nc. ("ISC")
+ * Portions Copyright (C) 2004, 2005, 2007, 2011, 2012 Internet Systems C=
onsortium, Inc. ("ISC")
* Portions Copyright (C) 1999-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: getnameinfo.c,v 1.39 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
@@ -62,51 +62,51 @@
* sockaddr sa which is salen bytes long. The hostname is of length
* hostlen and is returned via *host. The maximum length of the hostname
* is 1025 bytes: #NI_MAXHOST.
- *=20
+ *
* The name of the service associated with the port number in sa is
* returned in *serv. It is servlen bytes long. The maximum length of t=
he
* service name is #NI_MAXSERV - 32 bytes.
- *=20
+ *
* The flags argument sets the following bits:
- *=20
+ *
* \li #NI_NOFQDN:
* A fully qualified domain name is not required for local hosts.
* The local part of the fully qualified domain name is returned
* instead.
- *=20
+ *
* \li #NI_NUMERICHOST
* Return the address in numeric form, as if calling inet_ntop(),
* instead of a host name.
- *=20
+ *
* \li #NI_NAMEREQD
* A name is required. If the hostname cannot be found in the DNS
* and this flag is set, a non-zero error code is returned. If t=
he
* hostname is not found and the flag is not set, the address is
* returned in numeric form.
- *=20
+ *
* \li #NI_NUMERICSERV
* The service name is returned as a digit string representing t=
he
* port number.
- *=20
+ *
* \li #NI_DGRAM
* Specifies that the service being looked up is a datagram
* service, and causes getservbyport() to be called with a second
* argument of "udp" instead of its default of "tcp". This is
* required for the few ports (512-514) that have different
* services for UDP and TCP.
- *=20
+ *
* \section getnameinfo_return Return Values
- *=20
+ *
* lwres_getnameinfo() returns 0 on success or a non-zero error code if
* an error occurs.
- *=20
+ *
* \section getname_see See Also
- *=20
- * RFC2133, getservbyport(),=20
+ *
+ * RFC2133, getservbyport(),
* lwres_getnamebyaddr(). lwres_net_ntop().
- *=20
+ *
* \section getnameinfo_bugs Bugs
- *=20
+ *
* RFC2133 fails to define what the nonzero return values of
* getnameinfo() are.
*/
@@ -219,6 +219,7 @@
default:
port =3D 0;
addr =3D NULL;
+ POST(port); POST(addr);
INSIST(0);
}
proto =3D (flags & NI_DGRAM) ? "udp" : "tcp";
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/getrrset.c
--- a/head/contrib/bind9/lib/lwres/getrrset.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/getrrset.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: getrrset.c,v 1.18 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id: getrrset.c,v 1.18 2007/06/19 23:47:22 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/herror.c
--- a/head/contrib/bind9/lib/lwres/herror.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/herror.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Portions Copyright (C) 2004, 2005, 2007, 2011 Internet Systems Consort=
ium, Inc. ("ISC")
+ * Portions Copyright (C) 2004, 2005, 2007, 2011, 2012 Internet Systems C=
onsortium, Inc. ("ISC")
* Portions Copyright (C) 2000, 2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -72,7 +72,7 @@
#if defined(LIBC_SCCS) && !defined(lint)
static const char sccsid[] =3D "@(#)herror.c 8.1 (Berkeley) 6/4/93";
static const char rcsid[] =3D
- "$Id: herror.c,v 1.17.814.2 2011-03-12 04:59:19 tbox Exp $";
+ "$Id$";
#endif /* LIBC_SCCS and not lint */
=20
#include <config.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/include/M=
akefile.in
--- a/head/contrib/bind9/lib/lwres/include/Makefile.in Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/lwres/include/Makefile.in Tue Apr 17 11:51:51 =
2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.8 2007-06-19 23:47:22 tbox Exp $
+# $Id: Makefile.in,v 1.8 2007/06/19 23:47:22 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/include/l=
wres/Makefile.in
--- a/head/contrib/bind9/lib/lwres/include/lwres/Makefile.in Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/include/lwres/Makefile.in Tue Apr 17 11:=
51:51 2012 +0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.23 2007-06-19 23:47:22 tbox Exp $
+# $Id: Makefile.in,v 1.23 2007/06/19 23:47:22 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/include/l=
wres/context.h
--- a/head/contrib/bind9/lib/lwres/include/lwres/context.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/include/lwres/context.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: context.h,v 1.23 2008-12-17 23:47:58 tbox Exp $ */
+/* $Id: context.h,v 1.23 2008/12/17 23:47:58 tbox Exp $ */
=20
#ifndef LWRES_CONTEXT_H
#define LWRES_CONTEXT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/include/l=
wres/int.h
--- a/head/contrib/bind9/lib/lwres/include/lwres/int.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/lwres/include/lwres/int.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: int.h,v 1.14 2007-06-19 23:47:23 tbox Exp $ */
+/* $Id: int.h,v 1.14 2007/06/19 23:47:23 tbox Exp $ */
=20
#ifndef LWRES_INT_H
#define LWRES_INT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/include/l=
wres/ipv6.h
--- a/head/contrib/bind9/lib/lwres/include/lwres/ipv6.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/lwres/include/lwres/ipv6.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: ipv6.h,v 1.16 2007-06-19 23:47:23 tbox Exp $ */
+/* $Id: ipv6.h,v 1.16 2007/06/19 23:47:23 tbox Exp $ */
=20
#ifndef LWRES_IPV6_H
#define LWRES_IPV6_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/include/l=
wres/lang.h
--- a/head/contrib/bind9/lib/lwres/include/lwres/lang.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/lwres/include/lwres/lang.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lang.h,v 1.13 2007-06-19 23:47:23 tbox Exp $ */
+/* $Id: lang.h,v 1.13 2007/06/19 23:47:23 tbox Exp $ */
=20
#ifndef LWRES_LANG_H
#define LWRES_LANG_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/include/l=
wres/list.h
--- a/head/contrib/bind9/lib/lwres/include/lwres/list.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/lwres/include/lwres/list.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: list.h,v 1.14 2007-06-19 23:47:23 tbox Exp $ */
+/* $Id: list.h,v 1.14 2007/06/19 23:47:23 tbox Exp $ */
=20
#ifndef LWRES_LIST_H
#define LWRES_LIST_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/include/l=
wres/lwbuffer.h
--- a/head/contrib/bind9/lib/lwres/include/lwres/lwbuffer.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/include/lwres/lwbuffer.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwbuffer.h,v 1.22 2007-06-19 23:47:23 tbox Exp $ */
+/* $Id: lwbuffer.h,v 1.22 2007/06/19 23:47:23 tbox Exp $ */
=20
=20
/*! \file lwres/lwbuffer.h
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/include/l=
wres/lwpacket.h
--- a/head/contrib/bind9/lib/lwres/include/lwres/lwpacket.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/include/lwres/lwpacket.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwpacket.h,v 1.24 2007-06-19 23:47:23 tbox Exp $ */
+/* $Id: lwpacket.h,v 1.24 2007/06/19 23:47:23 tbox Exp $ */
=20
#ifndef LWRES_LWPACKET_H
#define LWRES_LWPACKET_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/include/l=
wres/lwres.h
--- a/head/contrib/bind9/lib/lwres/include/lwres/lwres.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/include/lwres/lwres.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwres.h,v 1.57 2007-06-19 23:47:23 tbox Exp $ */
+/* $Id: lwres.h,v 1.57 2007/06/19 23:47:23 tbox Exp $ */
=20
#ifndef LWRES_LWRES_H
#define LWRES_LWRES_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/include/l=
wres/netdb.h.in
--- a/head/contrib/bind9/lib/lwres/include/lwres/netdb.h.in Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/include/lwres/netdb.h.in Tue Apr 17 11:5=
1:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: netdb.h.in,v 1.41 2009-01-18 23:48:14 tbox Exp $ */
+/* $Id: netdb.h.in,v 1.41 2009/01/18 23:48:14 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/include/l=
wres/platform.h.in
--- a/head/contrib/bind9/lib/lwres/include/lwres/platform.h.in Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/include/lwres/platform.h.in Tue Apr 17 1=
1:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: platform.h.in,v 1.21 2007-06-19 23:47:23 tbox Exp $ */
+/* $Id: platform.h.in,v 1.21 2007/06/19 23:47:23 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/include/l=
wres/result.h
--- a/head/contrib/bind9/lib/lwres/include/lwres/result.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/include/lwres/result.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: result.h,v 1.21 2007-06-19 23:47:23 tbox Exp $ */
+/* $Id: result.h,v 1.21 2007/06/19 23:47:23 tbox Exp $ */
=20
#ifndef LWRES_RESULT_H
#define LWRES_RESULT_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/include/l=
wres/stdlib.h
--- a/head/contrib/bind9/lib/lwres/include/lwres/stdlib.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/include/lwres/stdlib.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: stdlib.h,v 1.6 2007-06-19 23:47:23 tbox Exp $ */
+/* $Id: stdlib.h,v 1.6 2007/06/19 23:47:23 tbox Exp $ */
=20
#ifndef LWRES_STDLIB_H
#define LWRES_STDLIB_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/include/l=
wres/version.h
--- a/head/contrib/bind9/lib/lwres/include/lwres/version.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/include/lwres/version.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: version.h,v 1.9 2007-06-19 23:47:23 tbox Exp $ */
+/* $Id: version.h,v 1.9 2007/06/19 23:47:23 tbox Exp $ */
=20
/*! \file lwres/version.h */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/lwbuffer.c
--- a/head/contrib/bind9/lib/lwres/lwbuffer.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/lwbuffer.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwbuffer.c,v 1.15 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id: lwbuffer.c,v 1.15 2007/06/19 23:47:22 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/lwconfig.c
--- a/head/contrib/bind9/lib/lwres/lwconfig.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/lwconfig.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004-2008, 2011 Internet Systems Consortium, Inc. ("ISC")
+ * Copyright (C) 2004-2008, 2011, 2012 Internet Systems Consortium, Inc. =
("ISC")
* Copyright (C) 2000-2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwconfig.c,v 1.48.436.2 2011-03-12 04:59:19 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/lwinetato=
n.c
--- a/head/contrib/bind9/lib/lwres/lwinetaton.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/lwres/lwinetaton.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -72,7 +72,7 @@
*/
#if defined(LIBC_SCCS) && !defined(lint)
static char sccsid[] =3D "@(#)inet_addr.c 8.1 (Berkeley) 6/17/93";
-static char rcsid[] =3D "$Id: lwinetaton.c,v 1.16 2007-06-19 23:47:22 tbox=
Exp $";
+static char rcsid[] =3D "$Id: lwinetaton.c,v 1.16 2007/06/19 23:47:22 tbox=
Exp $";
#endif /* LIBC_SCCS and not lint */
=20
#include <config.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/lwinetnto=
p.c
--- a/head/contrib/bind9/lib/lwres/lwinetntop.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/lwres/lwinetntop.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -19,7 +19,7 @@
*/
#if defined(LIBC_SCCS) && !defined(lint)
static char rcsid[] =3D
- "$Id: lwinetntop.c,v 1.18 2007-06-19 23:47:22 tbox Exp $";
+ "$Id: lwinetntop.c,v 1.18 2007/06/19 23:47:22 tbox Exp $";
#endif /* LIBC_SCCS and not lint */
=20
#include <config.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/lwinetpto=
n.c
--- a/head/contrib/bind9/lib/lwres/lwinetpton.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/lwres/lwinetpton.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2005, 2007, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1996-2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -19,7 +19,7 @@
*/
=20
#if defined(LIBC_SCCS) && !defined(lint)
-static char rcsid[] =3D "$Id: lwinetpton.c,v 1.12 2007-06-19 23:47:22 tbox=
Exp $";
+static char rcsid[] =3D "$Id$";
#endif /* LIBC_SCCS and not lint */
=20
#include <config.h>
@@ -41,7 +41,7 @@
static int inet_pton4(const char *src, unsigned char *dst);
static int inet_pton6(const char *src, unsigned char *dst);
=20
-/*!=20
+/*!
* int
* lwres_net_pton(af, src, dst)
* convert from presentation format (which usually means ASCII printable)
@@ -103,7 +103,12 @@
} else if (ch =3D=3D '.' && saw_digit) {
if (octets =3D=3D 4)
return (0);
- *++tp =3D 0;
+ /*
+ * "clang --analyse" generates warnings using:
+ * *++tp =3D 0;
+ */
+ tp++;
+ *tp =3D 0;
saw_digit =3D 0;
} else
return (0);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/lwpacket.c
--- a/head/contrib/bind9/lib/lwres/lwpacket.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/lwpacket.c Tue Apr 17 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwpacket.c,v 1.18 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id: lwpacket.c,v 1.18 2007/06/19 23:47:22 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/lwres_gab=
n.c
--- a/head/contrib/bind9/lib/lwres/lwres_gabn.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/lwres/lwres_gabn.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwres_gabn.c,v 1.33 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id: lwres_gabn.c,v 1.33 2007/06/19 23:47:22 tbox Exp $ */
=20
/*! \file lwres_gabn.c
These are low-level routines for creating and parsing lightweight
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/lwres_gnb=
a.c
--- a/head/contrib/bind9/lib/lwres/lwres_gnba.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/lwres/lwres_gnba.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwres_gnba.c,v 1.28 2007-09-24 17:18:25 each Exp $ */
+/* $Id: lwres_gnba.c,v 1.28 2007/09/24 17:18:25 each Exp $ */
=20
/*! \file lwres_gnba.c
These are low-level routines for creating and parsing lightweight
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/lwres_grb=
n.c
--- a/head/contrib/bind9/lib/lwres/lwres_grbn.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/lwres/lwres_grbn.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwres_grbn.c,v 1.10 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id: lwres_grbn.c,v 1.10 2007/06/19 23:47:22 tbox Exp $ */
=20
/*! \file lwres_grbn.c
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/lwres_noo=
p.c
--- a/head/contrib/bind9/lib/lwres/lwres_noop.c Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/bind9/lib/lwres/lwres_noop.c Tue Apr 17 11:51:51 2012 +0=
300
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwres_noop.c,v 1.19 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id: lwres_noop.c,v 1.19 2007/06/19 23:47:22 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/lwresutil=
.c
--- a/head/contrib/bind9/lib/lwres/lwresutil.c Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/lwres/lwresutil.c Tue Apr 17 11:51:51 2012 +03=
00
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: lwresutil.c,v 1.34 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id: lwresutil.c,v 1.34 2007/06/19 23:47:22 tbox Exp $ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/Makef=
ile.in
--- a/head/contrib/bind9/lib/lwres/man/Makefile.in Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/bind9/lib/lwres/man/Makefile.in Tue Apr 17 11:51:51 2012=
+0300
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.9 2007-06-19 23:47:23 tbox Exp $
+# $Id: Makefile.in,v 1.9 2007/06/19 23:47:23 tbox Exp $
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
.3
--- a/head/contrib/bind9/lib/lwres/man/lwres.3 Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/bind9/lib/lwres/man/lwres.3 Tue Apr 17 11:51:51 2012 +03=
00
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres.3,v 1.29 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres.docbook Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres.docbook Tue Apr 17 11:51:51 20=
12 +0300
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres.docbook,v 1.10 2007-06-18 23:47:51 tbox Exp $ -->
+<!-- $Id: lwres.docbook,v 1.10 2007/06/18 23:47:51 tbox Exp $ -->
<refentry>
=20
<refentryinfo>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
.html
--- a/head/contrib/bind9/lib/lwres/man/lwres.html Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres.html Tue Apr 17 11:51:51 2012 =
+0300
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres.html,v 1.24 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -22,7 +22,7 @@
<meta name=3D"generator" content=3D"DocBook XSL Stylesheets V1.71.1">
</head>
<body bgcolor=3D"white" text=3D"black" link=3D"#0000FF" vlink=3D"#840084" =
alink=3D"#0000FF"><div class=3D"refentry" lang=3D"en">
-<a name=3D"id2476275"></a><div class=3D"titlepage"></div>
+<a name=3D"id2476274"></a><div class=3D"titlepage"></div>
<div class=3D"refnamediv">
<h2>Name</h2>
<p>lwres — introduction to the lightweight resolver library</p>
@@ -32,7 +32,7 @@
<div class=3D"funcsynopsis"><pre class=3D"funcsynopsisinfo">#include <l=
wres/lwres.h></pre></div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543348"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543350"></a><h2>DESCRIPTION</h2>
<p>
The BIND 9 lightweight resolver library is a simple, name service
independent stub resolver library. It provides hostname-to-address
@@ -47,7 +47,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543361"></a><h2>OVERVIEW</h2>
+<a name=3D"id2543363"></a><h2>OVERVIEW</h2>
<p>
The lwresd library implements multiple name service APIs.
The standard
@@ -101,7 +101,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543425"></a><h2>CLIENT-SIDE LOW-LEVEL API CALL FLOW</h2>
+<a name=3D"id2543427"></a><h2>CLIENT-SIDE LOW-LEVEL API CALL FLOW</h2>
<p>
When a client program wishes to make an lwres request using the
native low-level API, it typically performs the following
@@ -149,7 +149,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543573"></a><h2>SERVER-SIDE LOW-LEVEL API CALL FLOW</h2>
+<a name=3D"id2543575"></a><h2>SERVER-SIDE LOW-LEVEL API CALL FLOW</h2>
<p>
When implementing the server side of the lightweight resolver
protocol using the lwres library, a sequence of actions like the
@@ -191,7 +191,7 @@
<p></p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543656"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543658"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">lwres_gethos=
tent</span>(3)</span>,
=20
<span class=3D"citerefentry"><span class=3D"refentrytitle">lwres_get=
ipnode</span>(3)</span>,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_buffer.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_buffer.3 Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_buffer.3 Tue Apr 17 11:51:51 2=
012 +0300
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_buffer.3,v 1.27 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_buffer.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_buffer.docbook Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_buffer.docbook Tue Apr 17 11:5=
1:51 2012 +0300
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_buffer.docbook,v 1.10 2007-06-18 23:47:51 tbox Exp $ -->
+<!-- $Id: lwres_buffer.docbook,v 1.10 2007/06/18 23:47:51 tbox Exp $ -->
<refentry>
<refentryinfo>
<date>Jun 30, 2000</date>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_buffer.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_buffer.html Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_buffer.html Tue Apr 17 11:51:5=
1 2012 +0300
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_buffer.html,v 1.22 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -262,7 +262,7 @@
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543892"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543893"></a><h2>DESCRIPTION</h2>
<p>
These functions provide bounds checked access to a region of memory
where data is being read or written.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_config.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_config.3 Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_config.3 Tue Apr 17 11:51:51 2=
012 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+.\" Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
.\" Copyright (C) 2000, 2001 Internet Software Consortium.
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_config.3,v 1.27 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -100,7 +100,7 @@
.PP
\fI/etc/resolv.conf\fR
.SH "COPYRIGHT"
-Copyright \(co 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. ("=
ISC")
.br
Copyright \(co 2000, 2001 Internet Software Consortium.
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_config.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_config.docbook Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_config.docbook Tue Apr 17 11:5=
1:51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_config.docbook,v 1.9 2007-06-18 23:47:51 tbox Exp $ -->
+<!-- $Id$ -->
<refentry>
<refentryinfo>
=20
@@ -36,6 +36,7 @@
<year>2004</year>
<year>2005</year>
<year>2007</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_config.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_config.html Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_config.html Tue Apr 17 11:51:5=
1 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_config.html,v 1.23 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -90,7 +90,7 @@
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543441"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543445"></a><h2>DESCRIPTION</h2>
<p><code class=3D"function">lwres_conf_init()</code>
creates an empty
<span class=3D"type">lwres_conf_t</span>
@@ -123,7 +123,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543508"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2543512"></a><h2>RETURN VALUES</h2>
<p><code class=3D"function">lwres_conf_parse()</code>
returns <span class=3D"errorcode">LWRES_R_SUCCESS</span>
if it successfully read and parsed
@@ -142,13 +142,13 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543545"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543549"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">stdio</span>=
(3)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">resolver<=
/span>(5)</span>.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543571"></a><h2>FILES</h2>
+<a name=3D"id2543575"></a><h2>FILES</h2>
<p><code class=3D"filename">/etc/resolv.conf</code>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_context.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_context.3 Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_context.3 Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+.\" Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
.\" Copyright (C) 2000, 2001, 2003 Internet Software Consortium.
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_context.3,v 1.29 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -164,7 +164,7 @@
\fBmalloc\fR(3),
\fBfree\fR(3).
.SH "COPYRIGHT"
-Copyright \(co 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. ("=
ISC")
.br
Copyright \(co 2000, 2001, 2003 Internet Software Consortium.
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_context.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_context.docbook Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_context.docbook Tue Apr 17 11:=
51:51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
- Copyright (C) 2000, 2001, 2003 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_context.docbook,v 1.11 2007-06-18 23:47:51 tbox Exp $ -->
+<!-- $Id$ -->
<refentry>
=20
<refentryinfo>
@@ -36,6 +36,7 @@
<year>2004</year>
<year>2005</year>
<year>2007</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_context.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_context.html Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_context.html Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
- Copyright (C) 2000, 2001, 2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_context.html,v 1.24 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -172,7 +172,7 @@
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543531"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543536"></a><h2>DESCRIPTION</h2>
<p><code class=3D"function">lwres_context_create()</code>
creates a <span class=3D"type">lwres_context_t</span> structure for =
use in
lightweight resolver operations. It holds a socket and other
@@ -258,7 +258,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543719"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2543723"></a><h2>RETURN VALUES</h2>
<p><code class=3D"function">lwres_context_create()</code>
returns <span class=3D"errorcode">LWRES_R_NOMEMORY</span> if memory =
for
the <span class=3D"type">struct lwres_context</span> could not be al=
located,
@@ -283,7 +283,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543769"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543773"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">lwres_conf_i=
nit</span>(3)</span>,
=20
<span class=3D"citerefentry"><span class=3D"refentrytitle">malloc</s=
pan>(3)</span>,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_gabn.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_gabn.3 Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_gabn.3 Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+.\" Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
.\" Copyright (C) 2000, 2001 Internet Software Consortium.
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_gabn.3,v 1.28 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -189,7 +189,7 @@
.PP
\fBlwres_packet\fR(3)
.SH "COPYRIGHT"
-Copyright \(co 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. ("=
ISC")
.br
Copyright \(co 2000, 2001 Internet Software Consortium.
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_gabn.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_gabn.docbook Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_gabn.docbook Tue Apr 17 11:51:=
51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_gabn.docbook,v 1.10 2007-06-18 23:47:51 tbox Exp $ -->
+<!-- $Id$ -->
<refentry>
=20
<refentryinfo>
@@ -36,6 +36,7 @@
<year>2004</year>
<year>2005</year>
<year>2007</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_gabn.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_gabn.html Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_gabn.html Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_gabn.html,v 1.25 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -178,7 +178,7 @@
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543522"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543526"></a><h2>DESCRIPTION</h2>
<p>
These are low-level routines for creating and parsing
lightweight resolver name-to-address lookup request and
@@ -278,7 +278,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543667"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2543671"></a><h2>RETURN VALUES</h2>
<p>
The getaddrbyname opcode functions
<code class=3D"function">lwres_gabnrequest_render()</code>,
@@ -316,7 +316,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543733"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543737"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">lwres_packet=
</span>(3)</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_gai_strerror.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_gai_strerror.3 Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_gai_strerror.3 Tue Apr 17 11:5=
1:51 2012 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+.\" Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
.\" Copyright (C) 2000, 2001 Internet Software Consortium.
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_gai_strerror.3,v 1.28 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -123,7 +123,7 @@
\fBgetaddrinfo\fR(3),
\fBRFC2133\fR().
.SH "COPYRIGHT"
-Copyright \(co 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. ("=
ISC")
.br
Copyright \(co 2000, 2001 Internet Software Consortium.
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_gai_strerror.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_gai_strerror.docbook Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_gai_strerror.docbook Tue Apr 1=
7 11:51:51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_gai_strerror.docbook,v 1.10 2007-06-18 23:47:51 tbox Exp $=
-->
+<!-- $Id$ -->
<refentry>
=20
<refentryinfo>
@@ -36,6 +36,7 @@
<year>2004</year>
<year>2005</year>
<year>2007</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_gai_strerror.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_gai_strerror.html Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_gai_strerror.html Tue Apr 17 1=
1:51:51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_gai_strerror.html,v 1.25 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -42,7 +42,7 @@
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543361"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543365"></a><h2>DESCRIPTION</h2>
<p><code class=3D"function">lwres_gai_strerror()</code>
returns an error message corresponding to an error code returned by
<code class=3D"function">getaddrinfo()</code>.
@@ -110,7 +110,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543576"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543580"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">strerror</sp=
an>(3)</span>,
=20
<span class=3D"citerefentry"><span class=3D"refentrytitle">lwres_get=
addrinfo</span>(3)</span>,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_getaddrinfo.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_getaddrinfo.3 Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_getaddrinfo.3 Tue Apr 17 11:51=
:51 2012 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+.\" Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
.\" Copyright (C) 2000, 2001, 2003 Internet Software Consortium.
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_getaddrinfo.3,v 1.32 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -240,7 +240,7 @@
\fBsendmsg\fR(2),
\fBsocket\fR(2).
.SH "COPYRIGHT"
-Copyright \(co 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. ("=
ISC")
.br
Copyright \(co 2000, 2001, 2003 Internet Software Consortium.
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_getaddrinfo.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_getaddrinfo.docbook Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_getaddrinfo.docbook Tue Apr 17=
11:51:51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
- Copyright (C) 2000, 2001, 2003 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_getaddrinfo.docbook,v 1.13 2007-06-18 23:47:51 tbox Exp $ =
-->
+<!-- $Id$ -->
<refentry>
=20
<refentryinfo>
@@ -36,6 +36,7 @@
<year>2004</year>
<year>2005</year>
<year>2007</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_getaddrinfo.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_getaddrinfo.html Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_getaddrinfo.html Tue Apr 17 11=
:51:51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
- Copyright (C) 2000, 2001, 2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_getaddrinfo.html,v 1.28 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -89,7 +89,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543412"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543416"></a><h2>DESCRIPTION</h2>
<p><code class=3D"function">lwres_getaddrinfo()</code>
is used to get a list of IP addresses and port numbers for host
<em class=3D"parameter"><code>hostname</code></em> and service
@@ -283,7 +283,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543789"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2543794"></a><h2>RETURN VALUES</h2>
<p><code class=3D"function">lwres_getaddrinfo()</code>
returns zero on success or one of the error codes listed in
<span class=3D"citerefentry"><span class=3D"refentrytitle">gai_strer=
ror</span>(3)</span>
@@ -294,7 +294,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543827"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543831"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">lwres</span>=
(3)</span>,
=20
<span class=3D"citerefentry"><span class=3D"refentrytitle">lwres_get=
addrinfo</span>(3)</span>,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_gethostent.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_gethostent.3 Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_gethostent.3 Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+.\" Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
.\" Copyright (C) 2001 Internet Software Consortium.
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_gethostent.3,v 1.30 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -309,7 +309,7 @@
or
\fBNIS\fR, consequently the above functions don't, either.
.SH "COPYRIGHT"
-Copyright \(co 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. ("=
ISC")
.br
Copyright \(co 2001 Internet Software Consortium.
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_gethostent.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_gethostent.docbook Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_gethostent.docbook Tue Apr 17 =
11:51:51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
- Copyright (C) 2001 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_gethostent.docbook,v 1.11 2007-06-18 23:47:51 tbox Exp $ -=
->
+<!-- $Id$ -->
<refentry>
=20
<refentryinfo>
@@ -36,6 +36,7 @@
<year>2004</year>
<year>2005</year>
<year>2007</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_gethostent.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_gethostent.html Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_gethostent.html Tue Apr 17 11:=
51:51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
- Copyright (C) 2001 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_gethostent.html,v 1.25 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -228,7 +228,7 @@
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543608"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543612"></a><h2>DESCRIPTION</h2>
<p>
These functions provide hostname-to-address and
address-to-hostname lookups by means of the lightweight resolver.
@@ -366,7 +366,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543959"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2543963"></a><h2>RETURN VALUES</h2>
<p>
The functions
<code class=3D"function">lwres_gethostbyname()</code>,
@@ -430,7 +430,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544193"></a><h2>SEE ALSO</h2>
+<a name=3D"id2544197"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">gethostent</=
span>(3)</span>,
=20
<span class=3D"citerefentry"><span class=3D"refentrytitle">lwres_get=
ipnode</span>(3)</span>,
@@ -439,7 +439,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2544227"></a><h2>BUGS</h2>
+<a name=3D"id2544231"></a><h2>BUGS</h2>
<p><code class=3D"function">lwres_gethostbyname()</code>,
<code class=3D"function">lwres_gethostbyname2()</code>,
<code class=3D"function">lwres_gethostbyaddr()</code>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_getipnode.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_getipnode.3 Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_getipnode.3 Tue Apr 17 11:51:5=
1 2012 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+.\" Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
.\" Copyright (C) 2000, 2001, 2003 Internet Software Consortium.
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_getipnode.3,v 1.29 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -200,7 +200,7 @@
\fBlwres_getnameinfo\fR(3),
\fBlwres_hstrerror\fR(3).
.SH "COPYRIGHT"
-Copyright \(co 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. ("=
ISC")
.br
Copyright \(co 2000, 2001, 2003 Internet Software Consortium.
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_getipnode.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_getipnode.docbook Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_getipnode.docbook Tue Apr 17 1=
1:51:51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
- Copyright (C) 2000, 2001, 2003 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_getipnode.docbook,v 1.12 2007-06-18 23:47:51 tbox Exp $ -->
+<!-- $Id$ -->
<refentry>
=20
<refentryinfo>
@@ -36,6 +36,7 @@
<year>2004</year>
<year>2005</year>
<year>2007</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_getipnode.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_getipnode.html Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_getipnode.html Tue Apr 17 11:5=
1:51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
- Copyright (C) 2000, 2001, 2003 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_getipnode.html,v 1.26 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -98,7 +98,7 @@
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543431"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543435"></a><h2>DESCRIPTION</h2>
<p>
These functions perform thread safe, protocol independent
nodename-to-address and address-to-nodename
@@ -217,7 +217,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543689"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2543693"></a><h2>RETURN VALUES</h2>
<p>
If an error occurs,
<code class=3D"function">lwres_getipnodebyname()</code>
@@ -261,7 +261,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543786"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543790"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">RFC2553</spa=
n></span>,
=20
<span class=3D"citerefentry"><span class=3D"refentrytitle">lwres</sp=
an>(3)</span>,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_getnameinfo.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_getnameinfo.3 Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_getnameinfo.3 Tue Apr 17 11:51=
:51 2012 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+.\" Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
.\" Copyright (C) 2000, 2001 Internet Software Consortium.
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_getnameinfo.3,v 1.30 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -111,7 +111,7 @@
\fBgetnameinfo\fR(3)
are.
.SH "COPYRIGHT"
-Copyright \(co 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. ("=
ISC")
.br
Copyright \(co 2000, 2001 Internet Software Consortium.
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_getnameinfo.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_getnameinfo.docbook Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_getnameinfo.docbook Tue Apr 17=
11:51:51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_getnameinfo.docbook,v 1.10 2007-06-18 23:47:51 tbox Exp $ =
-->
+<!-- $Id$ -->
<refentry>
=20
<refentryinfo>
@@ -36,6 +36,7 @@
<year>2004</year>
<year>2005</year>
<year>2007</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_getnameinfo.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_getnameinfo.html Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_getnameinfo.html Tue Apr 17 11=
:51:51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_getnameinfo.html,v 1.24 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -82,7 +82,7 @@
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543393"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543397"></a><h2>DESCRIPTION</h2>
<p>
This function is equivalent to the
<span class=3D"citerefentry"><span class=3D"refentrytitle">getnamein=
fo</span>(3)</span> function defined in RFC2133.
@@ -149,13 +149,13 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543534"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2543539"></a><h2>RETURN VALUES</h2>
<p><code class=3D"function">lwres_getnameinfo()</code>
returns 0 on success or a non-zero error code if an error occurs.
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543546"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543550"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">RFC2133</spa=
n></span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">getservby=
port</span>(3)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">lwres</sp=
an>(3)</span>,
@@ -165,7 +165,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543604"></a><h2>BUGS</h2>
+<a name=3D"id2543608"></a><h2>BUGS</h2>
<p>
RFC2133 fails to define what the nonzero return values of
<span class=3D"citerefentry"><span class=3D"refentrytitle">getnamein=
fo</span>(3)</span>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_getrrsetbyname.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_getrrsetbyname.3 Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_getrrsetbyname.3 Tue Apr 17 11=
:51:51 2012 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+.\" Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
.\" Copyright (C) 2000, 2001 Internet Software Consortium.
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_getrrsetbyname.3,v 1.26 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -158,7 +158,7 @@
.PP
\fBlwres\fR(3).
.SH "COPYRIGHT"
-Copyright \(co 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. ("=
ISC")
.br
Copyright \(co 2000, 2001 Internet Software Consortium.
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_getrrsetbyname.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_getrrsetbyname.docbook Tue Apr=
17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_getrrsetbyname.docbook Tue Apr=
17 11:51:51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_getrrsetbyname.docbook,v 1.10 2007-06-18 23:47:51 tbox Exp=
$ -->
+<!-- $Id$ -->
<refentry>
=20
<refentryinfo>
@@ -36,6 +36,7 @@
<year>2004</year>
<year>2005</year>
<year>2007</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_getrrsetbyname.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_getrrsetbyname.html Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_getrrsetbyname.html Tue Apr 17=
11:51:51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_getrrsetbyname.html,v 1.24 2009-07-11 01:12:46 tbox Exp $ =
-->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -102,7 +102,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543414"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543418"></a><h2>DESCRIPTION</h2>
<p><code class=3D"function">lwres_getrrsetbyname()</code>
gets a set of resource records associated with a
<em class=3D"parameter"><code>hostname</code></em>, <em class=3D"par=
ameter"><code>class</code></em>,
@@ -150,7 +150,7 @@
<p></p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543526"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2543530"></a><h2>RETURN VALUES</h2>
<p><code class=3D"function">lwres_getrrsetbyname()</code>
returns zero on success, and one of the following error codes if
an error occurred:
@@ -184,7 +184,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543626"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543630"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">lwres</span>=
(3)</span>.
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_gnba.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_gnba.3 Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_gnba.3 Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+.\" Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
.\" Copyright (C) 2000, 2001 Internet Software Consortium.
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_gnba.3,v 1.28 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -177,7 +177,7 @@
.PP
\fBlwres_packet\fR(3).
.SH "COPYRIGHT"
-Copyright \(co 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. ("=
ISC")
.br
Copyright \(co 2000, 2001 Internet Software Consortium.
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_gnba.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_gnba.docbook Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_gnba.docbook Tue Apr 17 11:51:=
51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_gnba.docbook,v 1.11 2007-06-18 23:47:51 tbox Exp $ -->
+<!-- $Id$ -->
<refentry>
=20
<refentryinfo>
@@ -36,6 +36,7 @@
<year>2004</year>
<year>2005</year>
<year>2007</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_gnba.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_gnba.html Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_gnba.html Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_gnba.html,v 1.25 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -183,7 +183,7 @@
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543525"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543529"></a><h2>DESCRIPTION</h2>
<p>
These are low-level routines for creating and parsing
lightweight resolver address-to-name lookup request and
@@ -270,7 +270,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543665"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2543669"></a><h2>RETURN VALUES</h2>
<p>
The getnamebyaddr opcode functions
<code class=3D"function">lwres_gnbarequest_render()</code>,
@@ -308,7 +308,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543731"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543735"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">lwres_packet=
</span>(3)</span>.
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_hstrerror.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_hstrerror.3 Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_hstrerror.3 Tue Apr 17 11:51:5=
1 2012 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+.\" Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
.\" Copyright (C) 2000, 2001 Internet Software Consortium.
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_hstrerror.3,v 1.28 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -93,7 +93,7 @@
\fBherror\fR(3),
\fBlwres_hstrerror\fR(3).
.SH "COPYRIGHT"
-Copyright \(co 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. ("=
ISC")
.br
Copyright \(co 2000, 2001 Internet Software Consortium.
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_hstrerror.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_hstrerror.docbook Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_hstrerror.docbook Tue Apr 17 1=
1:51:51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_hstrerror.docbook,v 1.11 2007-06-18 23:47:51 tbox Exp $ -->
+<!-- $Id$ -->
<refentry>
=20
<refentryinfo>
@@ -36,6 +36,7 @@
<year>2004</year>
<year>2005</year>
<year>2007</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_hstrerror.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_hstrerror.html Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_hstrerror.html Tue Apr 17 11:5=
1:51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_hstrerror.html,v 1.24 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -50,7 +50,7 @@
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543379"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543383"></a><h2>DESCRIPTION</h2>
<p><code class=3D"function">lwres_herror()</code>
prints the string <em class=3D"parameter"><code>s</code></em> on
<span class=3D"type">stderr</span> followed by the string generated =
by
@@ -84,7 +84,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543497"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2543501"></a><h2>RETURN VALUES</h2>
<p>
The string <span class=3D"errorname">Unknown resolver error</span> i=
s returned by
<code class=3D"function">lwres_hstrerror()</code>
@@ -94,7 +94,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543517"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543522"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">herror</span=
>(3)</span>,
=20
<span class=3D"citerefentry"><span class=3D"refentrytitle">lwres_hst=
rerror</span>(3)</span>.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_inetntop.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_inetntop.3 Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_inetntop.3 Tue Apr 17 11:51:51=
2012 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+.\" Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
.\" Copyright (C) 2000, 2001 Internet Software Consortium.
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_inetntop.3,v 1.27 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -71,7 +71,7 @@
\fBinet_ntop\fR(3),
\fBerrno\fR(3).
.SH "COPYRIGHT"
-Copyright \(co 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. ("=
ISC")
.br
Copyright \(co 2000, 2001 Internet Software Consortium.
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_inetntop.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_inetntop.docbook Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_inetntop.docbook Tue Apr 17 11=
:51:51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_inetntop.docbook,v 1.10 2007-06-18 23:47:51 tbox Exp $ -->
+<!-- $Id$ -->
<refentry>
=20
<refentryinfo>
@@ -36,6 +36,7 @@
<year>2004</year>
<year>2005</year>
<year>2007</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_inetntop.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_inetntop.html Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_inetntop.html Tue Apr 17 11:51=
:51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_inetntop.html,v 1.24 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -62,7 +62,7 @@
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543379"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543383"></a><h2>DESCRIPTION</h2>
<p><code class=3D"function">lwres_net_ntop()</code>
converts an IP address of protocol family
<em class=3D"parameter"><code>af</code></em> — IPv4 or IPv6 &#=
8212; at
@@ -80,7 +80,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543411"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2543415"></a><h2>RETURN VALUES</h2>
<p>
If successful, the function returns <em class=3D"parameter"><code>ds=
t</code></em>:
a pointer to a string containing the presentation format of the
@@ -93,7 +93,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543444"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543448"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">RFC1884</spa=
n></span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">inet_ntop=
</span>(3)</span>,
<span class=3D"citerefentry"><span class=3D"refentrytitle">errno</sp=
an>(3)</span>.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_noop.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_noop.3 Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_noop.3 Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+.\" Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
.\" Copyright (C) 2000, 2001 Internet Software Consortium.
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_noop.3,v 1.29 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -177,7 +177,7 @@
.PP
\fBlwres_packet\fR(3)
.SH "COPYRIGHT"
-Copyright \(co 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. ("=
ISC")
.br
Copyright \(co 2000, 2001 Internet Software Consortium.
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_noop.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_noop.docbook Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_noop.docbook Tue Apr 17 11:51:=
51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_noop.docbook,v 1.11 2007-06-18 23:47:51 tbox Exp $ -->
+<!-- $Id$ -->
<refentry>
=20
<refentryinfo>
@@ -36,6 +36,7 @@
<year>2004</year>
<year>2005</year>
<year>2007</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_noop.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_noop.html Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_noop.html Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_noop.html,v 1.26 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -179,7 +179,7 @@
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543522"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543526"></a><h2>DESCRIPTION</h2>
<p>
These are low-level routines for creating and parsing
lightweight resolver no-op request and response messages.
@@ -270,7 +270,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543672"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2543676"></a><h2>RETURN VALUES</h2>
<p>
The no-op opcode functions
<code class=3D"function">lwres_nooprequest_render()</code>,
@@ -309,7 +309,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543738"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543742"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">lwres_packet=
</span>(3)</span>
</p>
</div>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_packet.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_packet.3 Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_packet.3 Tue Apr 17 11:51:51 2=
012 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+.\" Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
.\" Copyright (C) 2000, 2001 Internet Software Consortium.
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_packet.3,v 1.30 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -164,7 +164,7 @@
both functions return
\fBLWRES_R_UNEXPECTEDEND\fR.
.SH "COPYRIGHT"
-Copyright \(co 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. ("=
ISC")
.br
Copyright \(co 2000, 2001 Internet Software Consortium.
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_packet.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_packet.docbook Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_packet.docbook Tue Apr 17 11:5=
1:51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_packet.docbook,v 1.13 2007-06-18 23:47:51 tbox Exp $ -->
+<!-- $Id$ -->
<refentry>
=20
<refentryinfo>
@@ -36,6 +36,7 @@
<year>2004</year>
<year>2005</year>
<year>2007</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_packet.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_packet.html Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_packet.html Tue Apr 17 11:51:5=
1 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_packet.html,v 1.27 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -66,7 +66,7 @@
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543389"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543394"></a><h2>DESCRIPTION</h2>
<p>
These functions rely on a
<span class=3D"type">struct lwres_lwpacket</span>
@@ -219,7 +219,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543706"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2543710"></a><h2>RETURN VALUES</h2>
<p>
Successful calls to
<code class=3D"function">lwres_lwpacket_renderheader()</code> and
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_resutil.3
--- a/head/contrib/bind9/lib/lwres/man/lwres_resutil.3 Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_resutil.3 Tue Apr 17 11:51:51 =
2012 +0300
@@ -1,4 +1,4 @@
-.\" Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+.\" Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
.\" Copyright (C) 2000, 2001 Internet Software Consortium.
.\"=20
.\" Permission to use, copy, modify, and/or distribute this software for a=
ny
@@ -13,7 +13,7 @@
.\" OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE=
OR
.\" PERFORMANCE OF THIS SOFTWARE.
.\"
-.\" $Id: lwres_resutil.3,v 1.29 2009-07-11 01:12:46 tbox Exp $
+.\" $Id$
.\"
.hy 0
.ad l
@@ -164,7 +164,7 @@
\fBlwres_buffer\fR(3),
\fBlwres_gabn\fR(3).
.SH "COPYRIGHT"
-Copyright \(co 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+Copyright \(co 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. ("=
ISC")
.br
Copyright \(co 2000, 2001 Internet Software Consortium.
.br
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_resutil.docbook
--- a/head/contrib/bind9/lib/lwres/man/lwres_resutil.docbook Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_resutil.docbook Tue Apr 17 11:=
51:51 2012 +0300
@@ -2,7 +2,7 @@
"http://www.oasis-open.org/docbook/xml/4.2/docbookx.dtd"
[<!ENTITY mdash "—">]>
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-
- Permission to use, copy, modify, and/or distribute this software for any
@@ -18,7 +18,7 @@
- PERFORMANCE OF THIS SOFTWARE.
-->
=20
-<!-- $Id: lwres_resutil.docbook,v 1.12 2007-06-18 23:47:51 tbox Exp $ -->
+<!-- $Id$ -->
<refentry>
=20
<refentryinfo>
@@ -36,6 +36,7 @@
<year>2004</year>
<year>2005</year>
<year>2007</year>
+ <year>2012</year>
<holder>Internet Systems Consortium, Inc. ("ISC")</holder>
</copyright>
<copyright>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/man/lwres=
_resutil.html
--- a/head/contrib/bind9/lib/lwres/man/lwres_resutil.html Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/man/lwres_resutil.html Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,5 +1,5 @@
<!--
- - Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+ - Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
- Copyright (C) 2000, 2001 Internet Software Consortium.
-=20
- Permission to use, copy, modify, and/or distribute this software for any
@@ -14,7 +14,7 @@
- OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE =
OR
- PERFORMANCE OF THIS SOFTWARE.
-->
-<!-- $Id: lwres_resutil.html,v 1.26 2009-07-11 01:12:46 tbox Exp $ -->
+<!-- $Id$ -->
<html>
<head>
<meta http-equiv=3D"Content-Type" content=3D"text/html; charset=3DISO-8859=
-1">
@@ -134,7 +134,7 @@
</div>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543466"></a><h2>DESCRIPTION</h2>
+<a name=3D"id2543470"></a><h2>DESCRIPTION</h2>
<p><code class=3D"function">lwres_string_parse()</code>
retrieves a DNS-encoded string starting the current pointer of
lightweight resolver buffer <em class=3D"parameter"><code>b</code></=
em>: i.e.
@@ -210,7 +210,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543605"></a><h2>RETURN VALUES</h2>
+<a name=3D"id2543609"></a><h2>RETURN VALUES</h2>
<p>
Successful calls to
<code class=3D"function">lwres_string_parse()</code>
@@ -248,7 +248,7 @@
</p>
</div>
<div class=3D"refsect1" lang=3D"en">
-<a name=3D"id2543676"></a><h2>SEE ALSO</h2>
+<a name=3D"id2543681"></a><h2>SEE ALSO</h2>
<p><span class=3D"citerefentry"><span class=3D"refentrytitle">lwres_buffer=
</span>(3)</span>,
=20
<span class=3D"citerefentry"><span class=3D"refentrytitle">lwres_gab=
n</span>(3)</span>.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/print.c
--- a/head/contrib/bind9/lib/lwres/print.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/print.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007, 2011 Internet Systems Consortium, Inc.=
("ISC")
+ * Copyright (C) 2004, 2005, 2007, 2011, 2012 Internet Systems Consortium=
, Inc. ("ISC")
* Copyright (C) 1999-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: print.c,v 1.10.814.2 2011-03-12 04:59:19 tbox Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/print_p.h
--- a/head/contrib/bind9/lib/lwres/print_p.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/print_p.h Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2007, 2010 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2007, 2010, 2012 Internet Systems Consortium, Inc.=
("ISC")
* Copyright (C) 1999-2001, 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: print_p.h,v 1.6 2010-08-16 23:46:52 tbox Exp $ */
+/* $Id$ */
=20
#ifndef LWRES_PRINT_P_H
#define LWRES_PRINT_P_H 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/strtoul.c
--- a/head/contrib/bind9/lib/lwres/strtoul.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/strtoul.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
* Copyright (C) 2003 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -53,7 +53,7 @@
static char sccsid[] =3D "@(#)strtoul.c 8.1 (Berkeley) 6/4/93";
#endif /* LIBC_SCCS and not lint */
=20
-/* $Id: strtoul.c,v 1.4 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id$ */
=20
#include <config.h>
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/unix/Make=
file.in
--- a/head/contrib/bind9/lib/lwres/unix/Makefile.in Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/bind9/lib/lwres/unix/Makefile.in Tue Apr 17 11:51:51 201=
2 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2004, 2007 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2004, 2007, 2012 Internet Systems Consortium, Inc. ("ISC")
# Copyright (C) 2001 Internet Software Consortium.
#
# Permission to use, copy, modify, and/or distribute this software for any
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.4 2007-06-19 23:47:23 tbox Exp $
+# $Id$
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/unix/incl=
ude/Makefile.in
--- a/head/contrib/bind9/lib/lwres/unix/include/Makefile.in Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/unix/include/Makefile.in Tue Apr 17 11:5=
1:51 2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2004, 2007 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2004, 2007, 2012 Internet Systems Consortium, Inc. ("ISC")
# Copyright (C) 2001 Internet Software Consortium.
#
# Permission to use, copy, modify, and/or distribute this software for any
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.4 2007-06-19 23:47:23 tbox Exp $
+# $Id$
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/unix/incl=
ude/lwres/Makefile.in
--- a/head/contrib/bind9/lib/lwres/unix/include/lwres/Makefile.in Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/unix/include/lwres/Makefile.in Tue Apr 1=
7 11:51:51 2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2004, 2007 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2004, 2007, 2012 Internet Systems Consortium, Inc. ("ISC")
# Copyright (C) 2001 Internet Software Consortium.
#
# Permission to use, copy, modify, and/or distribute this software for any
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.4 2007-06-19 23:47:23 tbox Exp $
+# $Id$
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/unix/incl=
ude/lwres/net.h
--- a/head/contrib/bind9/lib/lwres/unix/include/lwres/net.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/unix/include/lwres/net.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
* Copyright (C) 2000-2002 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: net.h,v 1.9 2007-06-19 23:47:23 tbox Exp $ */
+/* $Id$ */
=20
#ifndef LWRES_NET_H
#define LWRES_NET_H 1
@@ -65,7 +65,7 @@
#ifdef LWRES_PLATFORM_NEEDNETINET6IN6H
#include <netinet6/in6.h> /* Required on BSD/OS for in6_pktinfo. */
#endif
-#include <net/if.h>=09
+#include <net/if.h>
=20
#include <lwres/lang.h>
=20
@@ -80,7 +80,7 @@
/*!
* Required for some pre RFC2133 implementations.
* IN6ADDR_ANY_INIT and IN6ADDR_LOOPBACK_INIT were added in
- * draft-ietf-ipngwg-bsd-api-04.txt or draft-ietf-ipngwg-bsd-api-05.txt. =20
+ * draft-ietf-ipngwg-bsd-api-04.txt or draft-ietf-ipngwg-bsd-api-05.txt.
* If 's6_addr' is defined then assume that there is a union and three
* levels otherwise assume two levels required.
*/
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/lib/lwres/version.c
--- a/head/contrib/bind9/lib/lwres/version.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/lib/lwres/version.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC=
")
+ * Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc.=
("ISC")
* Copyright (C) 2000, 2001 Internet Software Consortium.
*
* Permission to use, copy, modify, and/or distribute this software for any
@@ -15,7 +15,7 @@
* PERFORMANCE OF THIS SOFTWARE.
*/
=20
-/* $Id: version.c,v 1.12 2007-06-19 23:47:22 tbox Exp $ */
+/* $Id$ */
=20
/*! \file */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/make/Makefile.in
--- a/head/contrib/bind9/make/Makefile.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/make/Makefile.in Tue Apr 17 11:51:51 2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2004, 2007 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2004, 2007, 2012 Internet Systems Consortium, Inc. ("ISC")
# Copyright (C) 1998-2001 Internet Software Consortium.
#
# Permission to use, copy, modify, and/or distribute this software for any
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: Makefile.in,v 1.16 2007-06-19 23:47:24 tbox Exp $
+# $Id$
=20
srcdir =3D @srcdir@
VPATH =3D @srcdir@
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/make/includes.in
--- a/head/contrib/bind9/make/includes.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/make/includes.in Tue Apr 17 11:51:51 2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2004, 2005, 2007 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2004, 2005, 2007, 2012 Internet Systems Consortium, Inc. =
("ISC")
# Copyright (C) 1999-2001 Internet Software Consortium.
#
# Permission to use, copy, modify, and/or distribute this software for any
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: includes.in,v 1.21 2007-06-19 23:47:24 tbox Exp $
+# $Id$
=20
# Search for machine-generated header files in the build tree,
# and for normal headers in the source tree (${top_srcdir}).
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/make/mkdep.in
--- a/head/contrib/bind9/make/mkdep.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/make/mkdep.in Tue Apr 17 11:51:51 2012 +0300
@@ -140,25 +140,37 @@
else
@MKDEPCC@ @MKDEPCFLAGS@ ${newargs} |
sed "
- s; \./; ;g
+ s; \\./; ;g
+ s; \\\\; ;g
@LIBTOOL_MKDEP_SED@
$SED" |
- awk '{
- if ($1 !=3D prev) {
+ awk '$1 ~ /:$/ {
if (rec !=3D "")
- print rec;
- rec =3D $0;
- prev =3D $1;
+ print rec;
+ if (NF =3D=3D 1)
+ rec =3D $1;
+ else
+ rec =3D $1 " " $2;
+ for (i =3D 3; i <=3D NF; i++) {
+ if (length(rec $i) > 76) {
+ print rec " \\";
+ rec =3D " " $i;
+ } else {
+ rec =3D rec " " $i;
+ }
+ }
+ next;
}
- else {
- if (length(rec $2) > 78) {
- print rec;
- rec =3D $0;
+ {
+ for (i =3D 1; i <=3D NF; i++) {
+ if (length(rec $i) > 76) {
+ print rec, "\\";
+ rec =3D " " $i;
+ } else {
+ rec =3D rec " " $i;
+ }
}
- else
- rec =3D rec " " $2
}
- }
END {
print rec
}' >> $TMP
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/make/rules.in
--- a/head/contrib/bind9/make/rules.in Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/make/rules.in Tue Apr 17 11:51:51 2012 +0300
@@ -1,4 +1,4 @@
-# Copyright (C) 2004-2009, 2011 Internet Systems Consortium, Inc. ("ISC")
+# Copyright (C) 2004-2009, 2011, 2012 Internet Systems Consortium, Inc. (=
"ISC")
# Copyright (C) 1998-2003 Internet Software Consortium.
#
# Permission to use, copy, modify, and/or distribute this software for any
@@ -13,7 +13,7 @@
# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
=20
-# $Id: rules.in,v 1.68.346.2 2011-02-28 01:20:04 tbox Exp $
+# $Id$
=20
###
### Common Makefile rules for BIND 9.
@@ -214,7 +214,21 @@
-o $@tmp2 $${BASEOBJS} $@-symtbl. at O@ $${LIBS0} ${NOSYMLIBS}; \
${MKSYMTBL_PROGRAM} ${top_srcdir}/util/mksymtbl.pl \
-o [email protected] $@tmp2; \
- diff [email protected] [email protected] || exit 1;\
+ count=3D0; \
+ until diff [email protected] [email protected] > /dev/null ; \
+ do \
+ count=3D`expr $$count + 1` ; \
+ test $$count =3D 42 && exit 1 ; \
+ rm -f [email protected] $@-symtbl. at O@; \
+ ${MKSYMTBL_PROGRAM} ${top_srcdir}/util/mksymtbl.pl \
+ -o [email protected] $@tmp2 || exit 1; \
+ $(MAKE) $@-symtbl. at O@ || exit 1; \
+ ${LIBTOOL_MODE_LINK} ${PURIFY} ${CC} ${CFLAGS} \
+ ${LDFLAGS} -o $@tmp2 $${BASEOBJS} $@-symtbl. at O@ \
+ $${LIBS0} ${NOSYMLIBS}; \
+ ${MKSYMTBL_PROGRAM} ${top_srcdir}/util/mksymtbl.pl \
+ -o [email protected] $@tmp2; \
+ done ; \
mv $@tmp2 $@; \
rm -f $@tmp0 $@tmp1 $@tmp2 [email protected]; \
fi
@@ -236,20 +250,20 @@
(cd $$i; ${MAKE} ${MAKEDEFS} DESTDIR=3D"${DESTDIR}" $@) || exit 1; \
fi; \
done
- @if [ X"${VPATH}" !=3D X ] ; then \
+ @if [ X"${srcdir}" !=3D X. ] ; then \
if [ X"${SRCS}" !=3D X -a X"${PSRCS}" !=3D X ] ; then \
- echo ${MKDEP} -vpath ${VPATH} ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${SRCS}; \
- ${MKDEP} -vpath ${VPATH} ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${SRCS}; \
- echo ${MKDEP} -vpath ${VPATH} -ap ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${PSRCS=
}; \
- ${MKDEP} -vpath ${VPATH} -ap ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${PSRCS}; \
+ echo ${MKDEP} -vpath ${srcdir} ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${SRCS}; \
+ ${MKDEP} -vpath ${srcdir} ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${SRCS}; \
+ echo ${MKDEP} -vpath ${srcdir} -ap ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${PSRC=
S}; \
+ ${MKDEP} -vpath ${srcdir} -ap ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${PSRCS}; \
${DEPENDEXTRA} \
elif [ X"${SRCS}" !=3D X ] ; then \
- echo ${MKDEP} -vpath ${VPATH} ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${SRCS}; \
- ${MKDEP} -vpath ${VPATH} ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${SRCS}; \
+ echo ${MKDEP} -vpath ${srcdir} ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${SRCS}; \
+ ${MKDEP} -vpath ${srcdir} ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${SRCS}; \
${DEPENDEXTRA} \
elif [ X"${PSRCS}" !=3D X ] ; then \
- echo ${MKDEP} -vpath ${VPATH} ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${PSRCS}; \
- ${MKDEP} -vpath ${VPATH} -p ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${PSRCS}; \
+ echo ${MKDEP} -vpath ${srcdir} ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${PSRCS}; \
+ ${MKDEP} -vpath ${srcdir} -p ${ALL_CPPFLAGS} ${ALL_CFLAGS} ${PSRCS}; \
${DEPENDEXTRA} \
fi \
else \
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/mkinstalldirs
--- a/head/contrib/bind9/mkinstalldirs Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/mkinstalldirs Tue Apr 17 11:51:51 2012 +0300
@@ -4,7 +4,7 @@
# Created: 1993-05-16
# Public domain
=20
-# $Id: mkinstalldirs,v 1.1 2000-09-20 19:05:51 gson Exp $
+# $Id$
=20
errstatus=3D0
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/bind9/version
--- a/head/contrib/bind9/version Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/bind9/version Tue Apr 17 11:51:51 2012 +0300
@@ -1,10 +1,10 @@
-# $Id: version,v 1.53.8.9.6.1 2011-11-16 09:32:07 marka Exp $
+# $Id$
#=20
# This file must follow /bin/sh rules. It is imported directly via
# configure.
#
MAJORVER=3D9
MINORVER=3D8
-PATCHVER=3D1
-RELEASETYPE=3D-P
-RELEASEVER=3D1
+PATCHVER=3D2
+RELEASETYPE=3D
+RELEASEVER=3D
diff -r 428842767fa6 -r f2935497fa04 head/contrib/com_err/com_err.3
--- a/head/contrib/com_err/com_err.3 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/com_err/com_err.3 Tue Apr 17 11:51:51 2012 +0300
@@ -1,96 +1,245 @@
-.\" Copyright (c) 1988 Massachusetts Institute of Technology,
-.\" Student Information Processing Board. All rights reserved.
+.\" Copyright (c) 2005 Kungliga Tekniska H=C3=B6gskolan
+.\" (Royal Institute of Technology, Stockholm, Sweden).
+.\" All rights reserved.
.\"
-.\" $FreeBSD$
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that the following conditions
+.\" are met:
.\"
-.TH COM_ERR 3 "22 Nov 1988" SIPB
-.SH NAME
-com_err \- common error display routine
-.SH SYNOPSIS
-.nf
- #include <com_err.h>
-.PP
-void com_err (whoami, code, format, ...);
- const char *whoami;
- long code;
- const char *format;
-.PP
-proc =3D set_com_err_hook (proc);
-.fi
-void (*
-.I proc
-) (const char *, long, const char *, va_list);
-.nf
-.PP
-proc =3D reset_com_err_hook ();
-.PP
-void initialize_XXXX_error_table ();
-.fi
-.SH DESCRIPTION
-.I Com_err
-displays an error message on the standard error stream
-.I stderr
-(see
-.IR stdio (3S))
-composed of the
-.I whoami
-string, which should specify the program name or some subportion of
-a program, followed by an error message generated from the
-.I code
-value (derived from
-.IR compile_et (1)),
+.\" 1. Redistributions of source code must retain the above copyright
+.\" notice, this list of conditions and the following disclaimer.
+.\"
+.\" 2. Redistributions in binary form must reproduce the above copyright
+.\" notice, this list of conditions and the following disclaimer in the
+.\" documentation and/or other materials provided with the distribution.
+.\"
+.\" 3. Neither the name of the Institute nor the names of its contributors
+.\" may be used to endorse or promote products derived from this softwa=
re
+.\" without specific prior written permission.
+.\"
+.\" THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' =
AND
+.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PUR=
POSE
+.\" ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LI=
ABLE
+.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUEN=
TIAL
+.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, ST=
RICT
+.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY =
WAY
+.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+.\" SUCH DAMAGE.
+.\"
+.\" $Id$
+.\"
+.\" This manpage was contributed by Gregory McGarry.
+.\"
+.Dd July 7, 2005
+.Dt COM_ERR 3
+.Os
+.Sh NAME
+.Nm com_err ,
+.Nm com_err_va ,
+.Nm error_message ,
+.Nm error_table_name ,
+.Nm init_error_table ,
+.Nm set_com_err_hook ,
+.Nm reset_com_err_hook ,
+.Nm add_to_error_table ,
+.Nm initialize_error_table_r
+.Nm free_error_table ,
+.Nm com_right
+.Nd common error display library
+.Sh LIBRARY
+Common Error Library (libcom_err, -lcom_err)
+.Sh SYNOPSIS
+.Fd #include <stdio.h>
+.Fd #include <stdarg.h>
+.Fd #include <krb5/com_err.h>
+.Fd #include \&"XXX_err.h\&"
+.Pp
+typedef void (*errf)(const char *, long, const char *, ...);
+.Ft void
+.Fn com_err "const char *whoami" "long code" "const char *format" "..."
+.Ft void
+.Fn com_err_va "const char *whoami" "long code" "const char *format" "..."
+.Ft const char *
+.Fn error_message "long code"
+.Ft const char *
+.Fn error_table_name "int num"
+.Ft int
+.Fn init_error_table "const char **msgs" "long base" "int count"
+.Ft errf
+.Fn set_com_err_hook "errf func"
+.Ft errf
+.Fn reset_com_err_hook ""
+.Ft void
+.Fn add_to_error_table "struct et_list *new_table"
+.Ft void
+.Fn initialize_error_table_r "struct et_list **et_list" "const char **msgs=
" "int base" "long count"
+.Ft void
+.Fn free_error_table "struct et_list *"
+.Ft const char *
+.Fn com_right "struct et_list *list" long code"
+.Sh DESCRIPTION
+The
+.Nm
+library provides a common error-reporting mechanism for defining and
+accessing error codes and descriptions for application software
+packages. Error descriptions are defined in a table and error codes
+are used to index the table. The error table, the descriptions and
+the error codes are generated using
+.Xr compile_et 1 .
+.Pp
+The error table is registered with the
+.Nm
+library by calling its initialisation function defined in its header
+file. The initialisation function is generally defined as
+.Fn initialize_<name>_error_table ,
+where
+.Em name
+is the name of the error table.
+.Pp
+If a thread-safe version of the library is needed
+.Fn initialize_<name>_error_table_r
+that internally calls
+.Fn initialize_error_table_r
+instead be used.
+.Pp
+Any variable which is to contain an error code should be declared
+.Em <name>_error_number
+where
+.Em name
+is the name of the error table.
+.Sh FUNCTIONS
+The following functions are available to the application developer:
+.Bl -tag -width compact
+.It Fn com_err "whoami" "code" "format" "..."
+Displays an error message on standard error composed of the
+.Fa whoami
+string, which should specify the program name, followed by an error
+message generated from
+.Fa code ,
and a string produced using the
-.I format
-string and any following arguments, in the same style as
-.IR fprintf (3).
+.Xr printf 3
+.Fa format
+string and any following arguments. If
+.Fa format
+is NULL, the formatted message will not be
+printed. The argument
+.Fa format
+may not be omitted.
+.It Fn com_err_va "whoami" "code" "format" "va_list args"
+This routine provides an interface, equivalent to
+.Fn com_err ,
+which may be used by higher-level variadic functions (functions which
+accept variable numbers of arguments).
+.It Fn error_message "code"
+Returns the character string error message associate with
+.Fa code .
+If
+.Fa code is associated with an unknown error table, or if
+.Fa code
+is associated with a known error table but is not in the table, a
+string of the form `Unknown code XXXX NN' is returned, where XXXX is
+the error table name produced by reversing the compaction performed on
+the error table number implied by that error code, and NN is the
+offset from that base value.
+.Pp
+Although this routine is available for use when needed, its use should
+be left to circumstances which render
+.Fn com_err
+unusable.
+.Pp
+.Fn com_right
+returns the error string just like
+.Fa com_err
+but in a thread-safe way.
+.Pp
+.It Fn error_table_name "num"
+Convert a machine-independent error table number
+.Fa num
+into an error table name.
+.It Fn init_error_table "msgs" "base" "count"
+Initialise the internal error table with the array of character string
+error messages in
+.Fa msgs
+of length
+.Fa count .
+The error codes are assigned incrementally from
+.Fa base .
+This function is useful for using the error-reporting mechanism with
+custom error tables that have not been generated with
+.Xr compile_et 1 .
+Although this routine is available for use when needed, its use should
+be restricted.
+.Pp
+.Fn initialize_error_table_r
+initialize the
+.Fa et_list
+in the same way as
+.Fn init_error_table ,
+but in a thread-safe way.
+.Pp
+.It Fn set_com_err_hook "func"
+Provides a hook into the
+.Nm
+library to allow the routine
+.Fa func
+to be dynamically substituted for
+.Fn com_err .
+After
+.Fn set_com_err_hook
+ has been called, calls to
+.Fn com_err
+will turn into calls to the new hook routine. This function is
+intended to be used in daemons to use a routine which calls
+.Xr syslog 3 ,
+or in a window system application to pop up a dialogue box.
+.It Fn reset_com_err_hook ""
+Turns off the hook set in
+.Fn set_com_err_hook .
+.It Fn add_to_error_table "new_table"
+Add the error table, its messages strings and error codes in
+.Fa new_table
+to the internal error table.
+.El
+.Sh EXAMPLES
+The following is an example using the table defined in
+.Xr compile_et 1 :
+.Pp
+.Bd -literal
+ #include <stdio.h>
+ #include <stdarg.h>
+ #include <syslog.h>
=20
-The behavior of
-.I com_err
-can be modified using
-.I set_com_err_hook;
-this defines a procedure which is called with the arguments passed to
-.I com_err,
-instead of the default internal procedure which sends the formatted
-text to error output. Thus the error messages from a program can all
-easily be diverted to another form of diagnostic logging, such as
-.IR syslog (3).
-.I Reset_com_err_hook
-may be used to restore the behavior of
-.I com_err
-to its default form. Both procedures return the previous ``hook''
-value. These ``hook'' procedures must have the declaration given for
-.I proc
-above in the synopsis.
+ #include "test_err.h"
=20
-The
-.I initialize_XXXX_error_table
-routine is generated mechanically by
-.IR compile_et (1)
-from a source file containing names and associated strings. Each
-table has a name of up to four characters, which is used in place of
-the
-.B XXXX
-in the name of the routine. These routines should be called before
-any of the corresponding error codes are used, so that the
-.I com_err
-library will recognize error codes from these tables when they are
-used.
+ void
+ hook(const char *whoami, long code,
+ const char *format, va_list args)
+ {
+ char buffer[BUFSIZ];
+ static int initialized =3D 0;
=20
-The
-.B com_err.h
-header file should be included in any source file that uses routines
-from the
-.I com_err
-library; executable files must be linked using
-.I ``-lcom_err''
-in order to cause the
-.I com_err
-library to be included.
+ if (!initialized) {
+ openlog(whoami, LOG_NOWAIT, LOG_DAEMON);
+ initialized =3D 1;
+ }
+ vsprintf(buffer, format, args);
+ syslog(LOG_ERR, "%s %s", error_message(code), buffer);
+ }
=20
-.\" .IR for manual entries
-.\" .PP for paragraph breaks
+ int
+ main(int argc, char *argv[])
+ {
+ char *whoami =3D argv[0];
=20
-.SH "SEE ALSO"
-compile_et (1), syslog (3).
-
-Ken Raeburn, "A Common Error Description Library for UNIX".
+ initialize_test_error_table();
+ com_err(whoami, TEST_INVAL, "before hook");
+ set_com_err_hook(hook);
+ com_err(whoami, TEST_IO, "after hook");
+ return (0);
+ }
+.Ed
+.Sh SEE ALSO
+.Xr compile_et 1
diff -r 428842767fa6 -r f2935497fa04 head/contrib/com_err/com_err.c
--- a/head/contrib/com_err/com_err.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/com_err/com_err.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,41 +1,37 @@
/*
- * Copyright (c) 1997 - 2002 Kungliga Tekniska H=F6gskolan
- * (Royal Institute of Technology, Stockholm, Sweden).=20
- * All rights reserved.=20
+ * Copyright (c) 1997 - 2002 Kungliga Tekniska H=C3=B6gskolan
+ * (Royal Institute of Technology, Stockholm, Sweden).
+ * All rights reserved.
*
- * Redistribution and use in source and binary forms, with or without=20
- * modification, are permitted provided that the following conditions=20
- * are met:=20
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
*
- * 1. Redistributions of source code must retain the above copyright=20
- * notice, this list of conditions and the following disclaimer.=20
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
*
- * 2. Redistributions in binary form must reproduce the above copyright=20
- * notice, this list of conditions and the following disclaimer in the=20
- * documentation and/or other materials provided with the distribution.=20
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of the Institute nor the names of its contributors=20
- * may be used to endorse or promote products derived from this softwar=
e=20
- * without specific prior written permission.=20
+ * 3. Neither the name of the Institute nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND=20
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE=20
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE=20
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE=20
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL=20
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS=20
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)=20
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT=20
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY=20
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF=20
- * SUCH DAMAGE.=20
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
*/
-/* $FreeBSD$ */
=20
-#ifdef HAVE_CONFIG_H
-#include <config.h>
-RCSID("$Id: com_err.c 14930 2005-04-24 19:43:06Z lha $");
-#endif
+
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
@@ -44,7 +40,7 @@
struct et_list *_et_list =3D NULL;
=20
=20
-const char *
+KRB5_LIB_FUNCTION const char * KRB5_LIB_CALL
error_message (long code)
{
static char msg[128];
@@ -57,23 +53,23 @@
}
if (p !=3D NULL && *p !=3D '\0') {
strlcpy(msg, p, sizeof(msg));
- } else=20
+ } else
snprintf(msg, sizeof(msg), "Unknown error %ld", code);
return msg;
}
=20
-int
+KRB5_LIB_FUNCTION int KRB5_LIB_CALL
init_error_table(const char **msgs, long base, int count)
{
initialize_error_table_r(&_et_list, msgs, count, base);
return 0;
}
=20
-static void
+static void KRB5_CALLCONV
default_proc (const char *whoami, long code, const char *fmt, va_list args)
__attribute__((__format__(__printf__, 3, 0)));
-=20
-static void
+
+static void KRB5_CALLCONV
default_proc (const char *whoami, long code, const char *fmt, va_list args)
{
if (whoami)
@@ -87,19 +83,19 @@
=20
static errf com_err_hook =3D default_proc;
=20
-void=20
-com_err_va (const char *whoami,=20
- long code,=20
- const char *fmt,=20
+KRB5_LIB_FUNCTION void KRB5_LIB_CALL
+com_err_va (const char *whoami,
+ long code,
+ const char *fmt,
va_list args)
{
(*com_err_hook) (whoami, code, fmt, args);
}
=20
-void
+KRB5_LIB_FUNCTION void KRB5_LIB_CALL
com_err (const char *whoami,
long code,
- const char *fmt,=20
+ const char *fmt,
...)
{
va_list ap;
@@ -108,7 +104,7 @@
va_end(ap);
}
=20
-errf
+KRB5_LIB_FUNCTION errf KRB5_LIB_CALL
set_com_err_hook (errf new)
{
errf old =3D com_err_hook;
@@ -117,12 +113,12 @@
com_err_hook =3D new;
else
com_err_hook =3D default_proc;
- =20
+
return old;
}
=20
-errf
-reset_com_err_hook (void)=20
+KRB5_LIB_FUNCTION errf KRB5_LIB_CALL
+reset_com_err_hook (void)
{
return set_com_err_hook(NULL);
}
@@ -135,7 +131,7 @@
=20
static char buf[6];
=20
-const char *
+KRB5_LIB_FUNCTION const char * KRB5_LIB_CALL
error_table_name(int num)
{
int ch;
@@ -157,7 +153,7 @@
return(buf);
}
=20
-void
+KRB5_LIB_FUNCTION void KRB5_LIB_CALL
add_to_error_table(struct et_list *new_table)
{
struct et_list *et;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/com_err/com_err.h
--- a/head/contrib/com_err/com_err.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/com_err/com_err.h Tue Apr 17 11:51:51 2012 +0300
@@ -1,66 +1,76 @@
/*
- * Copyright (c) 1997 - 2001 Kungliga Tekniska H=F6gskolan
- * (Royal Institute of Technology, Stockholm, Sweden).=20
- * All rights reserved.=20
+ * Copyright (c) 1997 - 2001 Kungliga Tekniska H=C3=B6gskolan
+ * (Royal Institute of Technology, Stockholm, Sweden).
+ * All rights reserved.
*
- * Redistribution and use in source and binary forms, with or without=20
- * modification, are permitted provided that the following conditions=20
- * are met:=20
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
*
- * 1. Redistributions of source code must retain the above copyright=20
- * notice, this list of conditions and the following disclaimer.=20
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
*
- * 2. Redistributions in binary form must reproduce the above copyright=20
- * notice, this list of conditions and the following disclaimer in the=20
- * documentation and/or other materials provided with the distribution.=20
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of the Institute nor the names of its contributors=20
- * may be used to endorse or promote products derived from this softwar=
e=20
- * without specific prior written permission.=20
+ * 3. Neither the name of the Institute nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND=20
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE=20
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE=20
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE=20
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL=20
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS=20
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)=20
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT=20
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY=20
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF=20
- * SUCH DAMAGE.=20
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
*/
=20
-/* $FreeBSD$ */
-/* $Id: com_err.h 15566 2005-07-07 14:58:07Z lha $ */
+/* $Id$ */
=20
/* MIT compatible com_err library */
=20
#ifndef __COM_ERR_H__
#define __COM_ERR_H__
=20
-#include <sys/cdefs.h>
-#include <stdarg.h>
-
#include <com_right.h>
#include <stdarg.h>
=20
-typedef void (*errf) __P((const char *, long, const char *, va_list));
+#if !defined(__GNUC__) && !defined(__attribute__)
+#define __attribute__(X)
+#endif
=20
-const char * error_message (long);
-int init_error_table (const char**, long, int);
+typedef void (KRB5_CALLCONV *errf) (const char *, long, const char *, va_l=
ist);
=20
-void com_err_va __P((const char *, long, const char *, va_list))
- __printflike(3, 0);
+KRB5_LIB_FUNCTION const char * KRB5_LIB_CALL
+error_message (long);
=20
-void com_err __P((const char *, long, const char *, ...))
- __printflike(3, 4);
+KRB5_LIB_FUNCTION int KRB5_LIB_CALL
+init_error_table (const char**, long, int);
=20
-errf set_com_err_hook (errf);
-errf reset_com_err_hook (void);
+KRB5_LIB_FUNCTION void KRB5_LIB_CALL
+com_err_va (const char *, long, const char *, va_list)
+ __attribute__((format(printf, 3, 0)));
=20
-const char *error_table_name (int num);
+KRB5_LIB_FUNCTION void KRB5_LIB_CALL
+com_err (const char *, long, const char *, ...)
+ __attribute__((format(printf, 3, 4)));
=20
-void add_to_error_table (struct et_list *new_table);
+KRB5_LIB_FUNCTION errf KRB5_LIB_CALL
+set_com_err_hook (errf);
+
+KRB5_LIB_FUNCTION errf KRB5_LIB_CALL
+reset_com_err_hook (void);
+
+KRB5_LIB_FUNCTION const char * KRB5_LIB_CALL
+error_table_name (int num);
+
+KRB5_LIB_FUNCTION void KRB5_LIB_CALL
+add_to_error_table (struct et_list *new_table);
=20
#endif /* __COM_ERR_H__ */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/com_err/com_right.h
--- a/head/contrib/com_err/com_right.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/com_err/com_right.h Tue Apr 17 11:51:51 2012 +0300
@@ -1,44 +1,76 @@
/*
- * Copyright (c) 1997 - 2000 Kungliga Tekniska H=F6gskolan
- * (Royal Institute of Technology, Stockholm, Sweden).=20
- * All rights reserved.=20
+ * Copyright (c) 1997 - 2000 Kungliga Tekniska H=C3=B6gskolan
+ * (Royal Institute of Technology, Stockholm, Sweden).
+ * All rights reserved.
*
- * Redistribution and use in source and binary forms, with or without=20
- * modification, are permitted provided that the following conditions=20
- * are met:=20
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
*
- * 1. Redistributions of source code must retain the above copyright=20
- * notice, this list of conditions and the following disclaimer.=20
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
*
- * 2. Redistributions in binary form must reproduce the above copyright=20
- * notice, this list of conditions and the following disclaimer in the=20
- * documentation and/or other materials provided with the distribution.=20
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of the Institute nor the names of its contributors=20
- * may be used to endorse or promote products derived from this softwar=
e=20
- * without specific prior written permission.=20
+ * 3. Neither the name of the Institute nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND=20
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE=20
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE=20
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE=20
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL=20
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS=20
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)=20
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT=20
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY=20
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF=20
- * SUCH DAMAGE.=20
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
*/
=20
-/* $Id: com_right.h 14551 2005-02-03 08:45:13Z lha $ */
-/* $FreeBSD$ */
+/* $Id$ */
=20
#ifndef __COM_RIGHT_H__
#define __COM_RIGHT_H__
=20
+#ifndef KRB5_LIB_FUNCTION
+#if defined(_WIN32)
+#define KRB5_LIB_FUNCTION __declspec(dllimport)
+#else
+#define KRB5_LIB_FUNCTION
+#endif
+#endif
+
+#ifndef KRB5_LIB_CALL
+#if defined(_WIN32)
+#define KRB5_LIB_CALL __stdcall
+#else
+#define KRB5_LIB_CALL
+#endif
+#endif
+
+#ifndef KRB5_LIB_VARIABLE
+#if defined(_WIN32)
+#define KRB5_LIB_VARIABLE __declspec(dllimport)
+#else
+#define KRB5_LIB_VARIABLE
+#endif
+#endif
+
+#ifdef _WIN32
+#define KRB5_CALLCONV __stdcall
+#else
+#define KRB5_CALLCONV
+#endif
+
#include <sys/cdefs.h>
+
+#ifdef __STDC__
#include <stdarg.h>
+#endif
=20
struct error_table {
char const * const * msgs;
@@ -51,8 +83,16 @@
};
extern struct et_list *_et_list;
=20
-const char *com_right (struct et_list *list, long code);
-void initialize_error_table_r (struct et_list **, const char **, int, long=
);
-void free_error_table (struct et_list *);
+KRB5_LIB_FUNCTION const char * KRB5_LIB_CALL
+com_right (struct et_list *list, long code);
+
+KRB5_LIB_FUNCTION const char * KRB5_LIB_CALL
+com_right_r (struct et_list *list, long code, char *, size_t);
+
+KRB5_LIB_FUNCTION void KRB5_LIB_CALL
+initialize_error_table_r (struct et_list **, const char **, int, long);
+
+KRB5_LIB_FUNCTION void KRB5_LIB_CALL
+free_error_table (struct et_list *);
=20
#endif /* __COM_RIGHT_H__ */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/com_err/compile_et.c
--- a/head/contrib/com_err/compile_et.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/com_err/compile_et.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,45 +1,44 @@
/*
- * Copyright (c) 1998-2002 Kungliga Tekniska H=F6gskolan
- * (Royal Institute of Technology, Stockholm, Sweden).=20
- * All rights reserved.=20
+ * Copyright (c) 1998-2002 Kungliga Tekniska H=C3=B6gskolan
+ * (Royal Institute of Technology, Stockholm, Sweden).
+ * All rights reserved.
*
- * Redistribution and use in source and binary forms, with or without=20
- * modification, are permitted provided that the following conditions=20
- * are met:=20
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
*
- * 1. Redistributions of source code must retain the above copyright=20
- * notice, this list of conditions and the following disclaimer.=20
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
*
- * 2. Redistributions in binary form must reproduce the above copyright=20
- * notice, this list of conditions and the following disclaimer in the=20
- * documentation and/or other materials provided with the distribution.=20
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of the Institute nor the names of its contributors=20
- * may be used to endorse or promote products derived from this softwar=
e=20
- * without specific prior written permission.=20
+ * 3. Neither the name of the Institute nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND=20
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE=20
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE=20
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE=20
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL=20
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS=20
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)=20
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT=20
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY=20
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF=20
- * SUCH DAMAGE.=20
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
*/
-/* $FreeBSD$ */
=20
#undef ROKEN_RENAME
+
+#define rk_PATH_DELIM '/'
+
#include "compile_et.h"
#include <getarg.h>
=20
-#if 0
-RCSID("$Id: compile_et.c 15426 2005-06-16 19:21:42Z lha $");
-#endif
-
+#include <roken.h>
#include <err.h>
#include "parse.h"
=20
@@ -77,13 +76,15 @@
return 1;
=20
fprintf(c_file, "/* Generated from %s */\n", filename);
- if(id_str)=20
+ if(id_str)
fprintf(c_file, "/* %s */\n", id_str);
fprintf(c_file, "\n");
fprintf(c_file, "#include <stddef.h>\n");
fprintf(c_file, "#include <com_err.h>\n");
fprintf(c_file, "#include \"%s\"\n", hfn);
fprintf(c_file, "\n");
+ fprintf(c_file, "#define N_(x) (x)\n");
+ fprintf(c_file, "\n");
=20
fprintf(c_file, "static const char *%s_error_strings[] =3D {\n", name);
=20
@@ -92,9 +93,10 @@
fprintf(c_file, "\t/* %03d */ \"Reserved %s error (%d)\",\n",
n, name, n);
n++;
- =20
+
}
- fprintf(c_file, "\t/* %03d */ \"%s\",\n", ec->number, ec->string);
+ fprintf(c_file, "\t/* %03d */ N_(\"%s\"),\n",
+ ec->number, ec->string);
}
=20
fprintf(c_file, "\tNULL\n");
@@ -102,11 +104,11 @@
fprintf(c_file, "\n");
fprintf(c_file, "#define num_errors %d\n", number);
fprintf(c_file, "\n");
- fprintf(c_file,=20
- "void initialize_%s_error_table_r(struct et_list **list)\n",=20
+ fprintf(c_file,
+ "void initialize_%s_error_table_r(struct et_list **list)\n",
name);
fprintf(c_file, "{\n");
- fprintf(c_file,=20
+ fprintf(c_file,
" initialize_error_table_r(list, %s_error_strings, "
"num_errors, ERROR_TABLE_BASE_%s);\n", name, name);
fprintf(c_file, "}\n");
@@ -137,9 +139,9 @@
for(p =3D fn; *p; p++)
if(!isalnum((unsigned char)*p))
*p =3D '_';
- =20
+
fprintf(h_file, "/* Generated from %s */\n", filename);
- if(id_str)=20
+ if(id_str)
fprintf(h_file, "/* %s */\n", id_str);
fprintf(h_file, "\n");
fprintf(h_file, "#ifndef %s\n", fn);
@@ -147,18 +149,18 @@
fprintf(h_file, "\n");
fprintf(h_file, "struct et_list;\n");
fprintf(h_file, "\n");
- fprintf(h_file,=20
+ fprintf(h_file,
"void initialize_%s_error_table_r(struct et_list **);\n",
name);
fprintf(h_file, "\n");
fprintf(h_file, "void initialize_%s_error_table(void);\n", name);
- fprintf(h_file, "#define init_%s_err_tbl initialize_%s_error_table\n",=20
+ fprintf(h_file, "#define init_%s_err_tbl initialize_%s_error_table\n",
name, name);
fprintf(h_file, "\n");
fprintf(h_file, "typedef enum %s_error_number{\n", name);
=20
for(ec =3D codes; ec; ec =3D ec->next) {
- fprintf(h_file, "\t%s =3D %ld%s\n", ec->name, base_id + ec->number,=20
+ fprintf(h_file, "\t%s =3D %ld%s\n", ec->name, base_id + ec->number,
(ec->next !=3D NULL) ? "," : "");
}
=20
@@ -166,6 +168,8 @@
fprintf(h_file, "\n");
fprintf(h_file, "#define ERROR_TABLE_BASE_%s %ld\n", name, base_id);
fprintf(h_file, "\n");
+ fprintf(h_file, "#define COM_ERR_BINDDOMAIN_%s \"heim_com_err%ld\"\n",=
name, base_id);
+ fprintf(h_file, "\n");
fprintf(h_file, "#endif /* %s */\n", fn);
=20
=20
@@ -179,8 +183,10 @@
return generate_c() || generate_h();
}
=20
+int version_flag;
int help_flag;
struct getargs args[] =3D {
+ { "version", 0, arg_flag, &version_flag },
{ "help", 0, arg_flag, &help_flag }
};
int num_args =3D sizeof(args) / sizeof(args[0]);
@@ -203,27 +209,31 @@
usage(1);
if(help_flag)
usage(0);
+ if(version_flag) {
+ print_version(NULL);
+ exit(0);
+ }
=20
- if(optidx =3D=3D argc)=20
+ if(optidx =3D=3D argc)
usage(1);
filename =3D argv[optidx];
yyin =3D fopen(filename, "r");
if(yyin =3D=3D NULL)
err(1, "%s", filename);
-=09
- =20
- p =3D strrchr(filename, '/');
+
+
+ p =3D strrchr(filename, rk_PATH_DELIM);
if(p)
p++;
else
p =3D filename;
strlcpy(Basename, p, sizeof(Basename));
- =20
+
Basename[strcspn(Basename, ".")] =3D '\0';
- =20
+
snprintf(hfn, sizeof(hfn), "%s.h", Basename);
snprintf(cfn, sizeof(cfn), "%s.c", Basename);
- =20
+
yyparse();
if(numerror)
return 1;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/com_err/compile_et.h
--- a/head/contrib/com_err/compile_et.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/com_err/compile_et.h Tue Apr 17 11:51:51 2012 +0300
@@ -1,46 +1,41 @@
/*
- * Copyright (c) 1998 - 2000 Kungliga Tekniska H=F6gskolan
- * (Royal Institute of Technology, Stockholm, Sweden).=20
- * All rights reserved.=20
+ * Copyright (c) 1998 - 2000 Kungliga Tekniska H=C3=B6gskolan
+ * (Royal Institute of Technology, Stockholm, Sweden).
+ * All rights reserved.
*
- * Redistribution and use in source and binary forms, with or without=20
- * modification, are permitted provided that the following conditions=20
- * are met:=20
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
*
- * 1. Redistributions of source code must retain the above copyright=20
- * notice, this list of conditions and the following disclaimer.=20
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
*
- * 2. Redistributions in binary form must reproduce the above copyright=20
- * notice, this list of conditions and the following disclaimer in the=20
- * documentation and/or other materials provided with the distribution.=20
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of the Institute nor the names of its contributors=20
- * may be used to endorse or promote products derived from this softwar=
e=20
- * without specific prior written permission.=20
+ * 3. Neither the name of the Institute nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND=20
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE=20
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE=20
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE=20
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL=20
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS=20
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)=20
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT=20
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY=20
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF=20
- * SUCH DAMAGE.=20
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
*/
=20
-/* $Id: compile_et.h 15426 2005-06-16 19:21:42Z lha $ */
-/* $FreeBSD$ */
+/* $Id$ */
=20
#ifndef __COMPILE_ET_H__
#define __COMPILE_ET_H__
=20
-#ifdef HAVE_CONFIG_H
-#include <config.h>
-#endif
-
#include <err.h>
#include <stdio.h>
#include <string.h>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/com_err/error.c
--- a/head/contrib/com_err/error.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/com_err/error.c Tue Apr 17 11:51:51 2012 +0300
@@ -1,52 +1,72 @@
/*
- * Copyright (c) 1997, 1998, 2001 Kungliga Tekniska H=F6gskolan
- * (Royal Institute of Technology, Stockholm, Sweden).=20
- * All rights reserved.=20
+ * Copyright (c) 1997, 1998, 2001 Kungliga Tekniska H=C3=B6gskolan
+ * (Royal Institute of Technology, Stockholm, Sweden).
+ * All rights reserved.
*
- * Redistribution and use in source and binary forms, with or without=20
- * modification, are permitted provided that the following conditions=20
- * are met:=20
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
*
- * 1. Redistributions of source code must retain the above copyright=20
- * notice, this list of conditions and the following disclaimer.=20
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
*
- * 2. Redistributions in binary form must reproduce the above copyright=20
- * notice, this list of conditions and the following disclaimer in the=20
- * documentation and/or other materials provided with the distribution.=20
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of the Institute nor the names of its contributors=20
- * may be used to endorse or promote products derived from this softwar=
e=20
- * without specific prior written permission.=20
+ * 3. Neither the name of the Institute nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND=20
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE=20
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE=20
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE=20
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL=20
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS=20
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)=20
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT=20
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY=20
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF=20
- * SUCH DAMAGE.=20
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
*/
=20
-#ifdef HAVE_CONFIG_H
-#include <config.h>
-RCSID("$Id: error.c 9724 2001-02-28 20:00:13Z joda $");
-#endif
+
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <com_right.h>
=20
-const char *
+#ifdef LIBINTL
+#include <libintl.h>
+#else
+#define dgettext(d,s) (s)
+#endif
+
+KRB5_LIB_FUNCTION const char * KRB5_LIB_CALL
com_right(struct et_list *list, long code)
{
struct et_list *p;
- for (p =3D list; p; p =3D p->next) {
+ for (p =3D list; p; p =3D p->next)
if (code >=3D p->table->base && code < p->table->base + p->table->n_msgs)
return p->table->msgs[code - p->table->base];
+ return NULL;
+}
+
+KRB5_LIB_FUNCTION const char * KRB5_LIB_CALL
+com_right_r(struct et_list *list, long code, char *str, size_t len)
+{
+ struct et_list *p;
+ for (p =3D list; p; p =3D p->next) {
+ if (code >=3D p->table->base && code < p->table->base + p->table->n_msgs)=
{
+ const char *msg =3D p->table->msgs[code - p->table->base];
+#ifdef LIBINTL
+ char domain[12 + 20];
+ snprintf(domain, sizeof(domain), "heim_com_err%d", p->table->base);
+#endif
+ strlcpy(str, dgettext(domain, msg), len);
+ return str;
+ }
}
return NULL;
}
@@ -56,9 +76,9 @@
struct error_table et;
};
=20
-void
-initialize_error_table_r(struct et_list **list,=20
- const char **messages,=20
+KRB5_LIB_FUNCTION void KRB5_LIB_CALL
+initialize_error_table_r(struct et_list **list,
+ const char **messages,
int num_errors,
long base)
{
@@ -78,9 +98,9 @@
et->next =3D NULL;
*end =3D et;
}
- =09
=20
-void
+
+KRB5_LIB_FUNCTION void KRB5_LIB_CALL
free_error_table(struct et_list *et)
{
while(et){
diff -r 428842767fa6 -r f2935497fa04 head/contrib/com_err/lex.h
--- a/head/contrib/com_err/lex.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/com_err/lex.h Tue Apr 17 11:51:51 2012 +0300
@@ -1,39 +1,39 @@
/*
- * Copyright (c) 1997 - 2000 Kungliga Tekniska H=F6gskolan
- * (Royal Institute of Technology, Stockholm, Sweden).=20
- * All rights reserved.=20
+ * Copyright (c) 1997 - 2000 Kungliga Tekniska H=C3=B6gskolan
+ * (Royal Institute of Technology, Stockholm, Sweden).
+ * All rights reserved.
*
- * Redistribution and use in source and binary forms, with or without=20
- * modification, are permitted provided that the following conditions=20
- * are met:=20
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
*
- * 1. Redistributions of source code must retain the above copyright=20
- * notice, this list of conditions and the following disclaimer.=20
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
*
- * 2. Redistributions in binary form must reproduce the above copyright=20
- * notice, this list of conditions and the following disclaimer in the=20
- * documentation and/or other materials provided with the distribution.=20
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of the Institute nor the names of its contributors=20
- * may be used to endorse or promote products derived from this softwar=
e=20
- * without specific prior written permission.=20
+ * 3. Neither the name of the Institute nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND=20
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE=20
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE=20
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE=20
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL=20
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS=20
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)=20
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT=20
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY=20
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF=20
- * SUCH DAMAGE.=20
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
*/
=20
-/* $Id: lex.h 8451 2000-06-22 00:42:52Z assar $ */
+/* $Id$ */
=20
-void error_message (const char *, ...)
+void _lex_error_message (const char *, ...)
__attribute__ ((format (printf, 1, 2)));
=20
int yylex(void);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/com_err/lex.l
--- a/head/contrib/com_err/lex.l Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/com_err/lex.l Tue Apr 17 11:51:51 2012 +0300
@@ -1,37 +1,36 @@
%{
/*
- * Copyright (c) 1998 - 2000 Kungliga Tekniska H=F6gskolan
- * (Royal Institute of Technology, Stockholm, Sweden).=20
- * All rights reserved.=20
+ * Copyright (c) 1998 - 2000 Kungliga Tekniska H=C3=B6gskolan
+ * (Royal Institute of Technology, Stockholm, Sweden).
+ * All rights reserved.
*
- * Redistribution and use in source and binary forms, with or without=20
- * modification, are permitted provided that the following conditions=20
- * are met:=20
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
*
- * 1. Redistributions of source code must retain the above copyright=20
- * notice, this list of conditions and the following disclaimer.=20
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
*
- * 2. Redistributions in binary form must reproduce the above copyright=20
- * notice, this list of conditions and the following disclaimer in the=20
- * documentation and/or other materials provided with the distribution.=20
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of the Institute nor the names of its contributors=20
- * may be used to endorse or promote products derived from this softwar=
e=20
- * without specific prior written permission.=20
+ * 3. Neither the name of the Institute nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND=20
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE=20
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE=20
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE=20
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL=20
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS=20
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)=20
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT=20
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY=20
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF=20
- * SUCH DAMAGE.=20
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
*/
-/* $FreeBSD$ */
=20
/*
* This is to handle the definition of this symbol in some AIX
@@ -45,10 +44,6 @@
#include "parse.h"
#include "lex.h"
=20
-#if 0
-RCSID("$Id: lex.l 15143 2005-05-16 08:52:54Z lha $");
-#endif
-
static unsigned lineno =3D 1;
static int getstring(void);
=20
@@ -58,6 +53,7 @@
=20
%}
=20
+%option nounput
=20
%%
et { return ET; }
@@ -79,7 +75,7 @@
=20
#ifndef yywrap /* XXX */
int
-yywrap ()=20
+yywrap ()
{
return 1;
}
@@ -99,7 +95,7 @@
continue;
}
if(c =3D=3D '\n'){
- error_message("unterminated string");
+ _lex_error_message("unterminated string");
lineno++;
break;
}
@@ -119,7 +115,7 @@
}
=20
void
-error_message (const char *format, ...)
+_lex_error_message (const char *format, ...)
{
va_list args;
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/com_err/parse.y
--- a/head/contrib/com_err/parse.y Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/com_err/parse.y Tue Apr 17 11:51:51 2012 +0300
@@ -1,43 +1,39 @@
%{
/*
- * Copyright (c) 1998 - 2000 Kungliga Tekniska H=F6gskolan
- * (Royal Institute of Technology, Stockholm, Sweden).=20
- * All rights reserved.=20
+ * Copyright (c) 1998 - 2000 Kungliga Tekniska H=C3=B6gskolan
+ * (Royal Institute of Technology, Stockholm, Sweden).
+ * All rights reserved.
*
- * Redistribution and use in source and binary forms, with or without=20
- * modification, are permitted provided that the following conditions=20
- * are met:=20
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
*
- * 1. Redistributions of source code must retain the above copyright=20
- * notice, this list of conditions and the following disclaimer.=20
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
*
- * 2. Redistributions in binary form must reproduce the above copyright=20
- * notice, this list of conditions and the following disclaimer in the=20
- * documentation and/or other materials provided with the distribution.=20
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of the Institute nor the names of its contributors=20
- * may be used to endorse or promote products derived from this softwar=
e=20
- * without specific prior written permission.=20
+ * 3. Neither the name of the Institute nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND=20
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE=20
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE=20
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE=20
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL=20
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS=20
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)=20
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT=20
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY=20
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF=20
- * SUCH DAMAGE.=20
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
*/
-/* $FreeBSD$ */
=20
#include "compile_et.h"
#include "lex.h"
-#if 0
-RCSID("$Id: parse.y 15426 2005-06-16 19:21:42Z lha $");
-#endif
=20
void yyerror (char *s);
static long name2number(const char *str);
@@ -50,6 +46,9 @@
#define alloca(x) malloc(x)
#endif
=20
+#define YYMALLOC malloc
+#define YYFREE free
+
%}
=20
%union {
@@ -63,7 +62,7 @@
=20
%%
=20
-file : /* */=20
+file : /* */
| header statements
;
=20
@@ -96,7 +95,7 @@
| statements statement
;
=20
-statement : INDEX NUMBER=20
+statement : INDEX NUMBER
{
number =3D $2;
}
@@ -118,7 +117,7 @@
| EC STRING ',' STRING
{
struct error_code *ec =3D malloc(sizeof(*ec));
- =20
+
if (ec =3D=3D NULL)
errx(1, "malloc");
=20
@@ -171,5 +170,5 @@
void
yyerror (char *s)
{
- error_message ("%s\n", s);
+ _lex_error_message ("%s\n", s);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/com_err/roken_rename.h
--- a/head/contrib/com_err/roken_rename.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/com_err/roken_rename.h Tue Apr 17 11:51:51 2012 +0300
@@ -1,61 +1,61 @@
/*
- * Copyright (c) 1998 Kungliga Tekniska H=F6gskolan
- * (Royal Institute of Technology, Stockholm, Sweden).=20
- * All rights reserved.=20
+ * Copyright (c) 1998 Kungliga Tekniska H=C3=B6gskolan
+ * (Royal Institute of Technology, Stockholm, Sweden).
+ * All rights reserved.
*
- * Redistribution and use in source and binary forms, with or without=20
- * modification, are permitted provided that the following conditions=20
- * are met:=20
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
*
- * 1. Redistributions of source code must retain the above copyright=20
- * notice, this list of conditions and the following disclaimer.=20
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
*
- * 2. Redistributions in binary form must reproduce the above copyright=20
- * notice, this list of conditions and the following disclaimer in the=20
- * documentation and/or other materials provided with the distribution.=20
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of the Institute nor the names of its contributors=20
- * may be used to endorse or promote products derived from this softwar=
e=20
- * without specific prior written permission.=20
+ * 3. Neither the name of the Institute nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND=20
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE=20
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE=20
- * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE=20
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL=20
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS=20
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)=20
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT=20
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY=20
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF=20
- * SUCH DAMAGE.=20
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' A=
ND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP=
OSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIA=
BLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENT=
IAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STR=
ICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY W=
AY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
*/
=20
-/* $Id: roken_rename.h 14930 2005-04-24 19:43:06Z lha $ */
+/* $Id$ */
=20
#ifndef __roken_rename_h__
#define __roken_rename_h__
=20
#ifndef HAVE_SNPRINTF
-#define snprintf _com_err_snprintf
+#define rk_snprintf _com_err_snprintf
#endif
#ifndef HAVE_VSNPRINTF
-#define vsnprintf _com_err_vsnprintf
+#define rk_vsnprintf _com_err_vsnprintf
#endif
#ifndef HAVE_ASPRINTF
-#define asprintf _com_err_asprintf
+#define rk_asprintf _com_err_asprintf
#endif
#ifndef HAVE_ASNPRINTF
-#define asnprintf _com_err_asnprintf
+#define rk_asnprintf _com_err_asnprintf
#endif
#ifndef HAVE_VASPRINTF
-#define vasprintf _com_err_vasprintf
+#define rk_vasprintf _com_err_vasprintf
#endif
#ifndef HAVE_VASNPRINTF
-#define vasnprintf _com_err_vasnprintf
+#define rk_vasnprintf _com_err_vasnprintf
#endif
#ifndef HAVE_STRLCPY
-#define strlcpy _com_err_strlcpy
+#define rk_strlcpy _com_err_strlcpy
#endif
=20
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/com_err/version-script.map
--- a/head/contrib/com_err/version-script.map Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/com_err/version-script.map Tue Apr 17 11:51:51 2012 +0300
@@ -3,6 +3,7 @@
HEIMDAL_COM_ERR_1.0 {
global:
com_right;
+ com_right_r;
free_error_table;
initialize_error_table_r;
add_to_error_table;
@@ -13,6 +14,7 @@
init_error_table;
reset_com_err_hook;
set_com_err_hook;
+ _et_list;
local:
*;
};
diff -r 428842767fa6 -r f2935497fa04 head/contrib/gcc/ChangeLog.gcc43
--- a/head/contrib/gcc/ChangeLog.gcc43 Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/gcc/ChangeLog.gcc43 Tue Apr 17 11:51:51 2012 +0300
@@ -169,3 +169,8 @@
* doc/extend.texi: Document SSSE3 built-in functions.
=20
* doc/invoke.texi: Document -mssse3/-mno-ssse3 switches.
+
+2006-10-21 Richard Guenther <rguenther at suse.de>
+
+ * builtins.c (fold_builtin_classify): Fix typo.
+
diff -r 428842767fa6 -r f2935497fa04 head/contrib/gcc/builtins.c
--- a/head/contrib/gcc/builtins.c Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/gcc/builtins.c Tue Apr 17 11:51:51 2012 +0300
@@ -8738,7 +8738,7 @@
case BUILT_IN_FINITE:
if (!HONOR_NANS (TYPE_MODE (TREE_TYPE (arg)))
&& !HONOR_INFINITIES (TYPE_MODE (TREE_TYPE (arg))))
- return omit_one_operand (type, integer_zero_node, arg);
+ return omit_one_operand (type, integer_one_node, arg);
=20
if (TREE_CODE (arg) =3D=3D REAL_CST)
{
diff -r 428842767fa6 -r f2935497fa04 head/contrib/gcc/config/mips/freebsd.h
--- a/head/contrib/gcc/config/mips/freebsd.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/gcc/config/mips/freebsd.h Tue Apr 17 11:51:51 2012 +0300
@@ -19,7 +19,7 @@
the Free Software Foundation, 51 Franklin Street, Fifth Floor,
Boston, MA 02110-1301, USA. */
=20
-/* $FreeBSD$ */
+/* $FreeBSD: head/contrib/gcc/config/mips/freebsd.h 233397 2012-03-23 21:0=
7:10Z gonzo $ */
=20
/* This defines which switch letters take arguments. -G is a MIPS
special. */
@@ -351,4 +351,5 @@
#endif
=20
/************************[ Debugger stuff ]*****************************=
****/
-
+#undef DBX_DEBUGGING_INFO
+#undef MIPS_DEBUGGING_INFO
diff -r 428842767fa6 -r f2935497fa04 head/contrib/libcxxrt/dynamic_cast.cc
--- a/head/contrib/libcxxrt/dynamic_cast.cc Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/libcxxrt/dynamic_cast.cc Tue Apr 17 11:51:51 2012 +0300
@@ -46,9 +46,65 @@
*/
#define ADD_TO_PTR(x, off) (__typeof__(x))(((char*)x) + off)
=20
-bool __class_type_info::can_cast_to(const struct __class_type_info *other)=
const
+bool std::type_info::__do_catch(std::type_info const *ex_type,
+ void **exception_object,
+ unsigned int outer) const
{
- return this =3D=3D other;
+ const type_info *type =3D this;
+
+ if (type =3D=3D ex_type)
+ {
+ return true;
+ }
+ if (const __class_type_info *cti =3D dynamic_cast<const __class_type_info=
*>(type))
+ {
+ return ex_type->__do_upcast(cti, exception_object);
+ }
+ return false;
+}
+
+bool __pbase_type_info::__do_catch(std::type_info const *ex_type,
+ void **exception_object,
+ unsigned int outer) const
+{
+ if (ex_type =3D=3D this)
+ {
+ return true;
+ }
+ if (!ex_type->__is_pointer_p())
+ {
+ // Can't catch a non-pointer type in a pointer catch
+ return false;
+ }
+
+ if (!(outer & 1))
+ {
+ // If the low bit is cleared on this means that we've gone
+ // through a pointer that is not const qualified.
+ return false;
+ }
+ // Clear the low bit on outer if we're not const qualified.
+ if (!(__flags & __const_mask))
+ {
+ outer &=3D ~1;
+ }
+
+ const __pbase_type_info *ptr_type =3D
+ static_cast<const __pbase_type_info*>(ex_type);
+
+ if (ptr_type->__flags & ~__flags)
+ {
+ // Handler pointer is less qualified
+ return false;
+ }
+
+ // Special case for void* handler. =20
+ if(*__pointee =3D=3D typeid(void))
+ {
+ return true;
+ }
+
+ return __pointee->__do_catch(ptr_type->__pointee, exception_object, outer=
);
}
=20
void *__class_type_info::cast_to(void *obj, const struct __class_type_info=
*other) const
@@ -60,12 +116,6 @@
return 0;
}
=20
-
-bool __si_class_type_info::can_cast_to(const struct __class_type_info *oth=
er) const
-{
- return this =3D=3D other || __base_type->can_cast_to(other);
-}
-
void *__si_class_type_info::cast_to(void *obj, const struct __class_type_i=
nfo *other) const
{
if (this =3D=3D other)
@@ -74,31 +124,32 @@
}
return __base_type->cast_to(obj, other);
}
-
-
-bool __vmi_class_type_info::can_cast_to(const struct __class_type_info *ot=
her) const
+bool __si_class_type_info::__do_upcast(const __class_type_info *target,
+ void **thrown_object) const
{
- if (this =3D=3D other)
+ if (this =3D=3D target)
{
return true;
}
- for (unsigned int i=3D0 ; i<__base_count ; i++)
- {
- const __base_class_type_info *info =3D &__base_info[i];
- if(info->isPublic() && info->__base_type->can_cast_to(other))
- {
- return true;
- }
- }
- return false;
+ return __base_type->__do_upcast(target, thrown_object);
}
=20
void *__vmi_class_type_info::cast_to(void *obj, const struct __class_type_=
info *other) const
{
- if (this =3D=3D other)
+ if (__do_upcast(other, &obj))
{
return obj;
}
+ return 0;
+}
+
+bool __vmi_class_type_info::__do_upcast(const __class_type_info *target,
+ void **thrown_object) const
+{
+ if (this =3D=3D target)
+ {
+ return true;
+ }
for (unsigned int i=3D0 ; i<__base_count ; i++)
{
const __base_class_type_info *info =3D &__base_info[i];
@@ -111,6 +162,7 @@
// virtual table of the virtual base offset for the virtual base
// referenced (negative).'
=20
+ void *obj =3D *thrown_object;
if (info->isVirtual())
{
// Object's vtable
@@ -121,18 +173,17 @@
}
void *cast =3D ADD_TO_PTR(obj, offset);
=20
- if (info->__base_type =3D=3D other)
+ if (info->__base_type =3D=3D target ||
+ (info->__base_type->__do_upcast(target, &cast)))
{
- return cast;
- }
- if ((cast =3D info->__base_type->cast_to(cast, other)))
- {
- return cast;
+ *thrown_object =3D cast;
+ return true;
}
}
return 0;
}
=20
+
/**
* ABI function used to implement the dynamic_cast<> operator. Some cases=
of
* this operator are implemented entirely in the compiler (e.g. to void*).
diff -r 428842767fa6 -r f2935497fa04 head/contrib/libcxxrt/exception.cc
--- a/head/contrib/libcxxrt/exception.cc Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/libcxxrt/exception.cc Tue Apr 17 11:51:51 2012 +0300
@@ -847,14 +847,11 @@
const std::type_info *type,
void *&adjustedPtr)
{
- // TODO: For compatibility with the GNU implementation, we should move th=
is
- // out into a __do_catch() virtual function in std::type_info
void *exception_ptr =3D (void*)(ex+1);
- const std::type_info *ex_type =3D ex->exceptionType;
+ const std::type_info *ex_type =3D ex->exceptionType;
=20
- const __pointer_type_info *ptr_type =3D
- dynamic_cast<const __pointer_type_info*>(ex_type);
- if (0 !=3D ptr_type)
+ bool is_ptr =3D ex_type->__is_pointer_p();
+ if (is_ptr)
{
exception_ptr =3D *(void**)exception_ptr;
}
@@ -862,11 +859,6 @@
//
// Note: A 0 here is a catchall, not a cleanup, so we return true to
// indicate that we found a catch.
- //
- // TODO: Provide a class for matching against foreign exceptions. This is
- // already done in libobjc2, allowing C++ exceptions to be boxed as
- // Objective-C objects. We should do something similar, allowing foreign
- // exceptions to be wrapped in a C++ exception and delivered.
if (0 =3D=3D type)
{
if (ex)
@@ -878,28 +870,6 @@
=20
if (0 =3D=3D ex) { return false; }
=20
- const __pointer_type_info *target_ptr_type =3D
- dynamic_cast<const __pointer_type_info*>(type);
-
- if (0 !=3D ptr_type && 0 !=3D target_ptr_type)
- {
- if (ptr_type->__flags & ~target_ptr_type->__flags)
- {
- // Handler pointer is less qualified
- return false;
- }
-
- // Special case for void* handler. =20
- if(*target_ptr_type->__pointee =3D=3D typeid(void))
- {
- adjustedPtr =3D exception_ptr;
- return true;
- }
-
- ex_type =3D ptr_type->__pointee;
- type =3D target_ptr_type->__pointee;
- }
-
// If the types are the same, no casting is needed.
if (*type =3D=3D *ex_type)
{
@@ -907,18 +877,13 @@
return true;
}
=20
- const __class_type_info *cls_type =3D
- dynamic_cast<const __class_type_info*>(ex_type);
- const __class_type_info *target_cls_type =3D
- dynamic_cast<const __class_type_info*>(type);
=20
- if (0 !=3D cls_type &&
- 0 !=3D target_cls_type &&
- cls_type->can_cast_to(target_cls_type))
+ if (type->__do_catch(ex_type, &exception_ptr, 1))
{
- adjustedPtr =3D cls_type->cast_to(exception_ptr, target_cls_type);
+ adjustedPtr =3D exception_ptr;
return true;
}
+
return false;
}
/**
diff -r 428842767fa6 -r f2935497fa04 head/contrib/libcxxrt/typeinfo.h
--- a/head/contrib/libcxxrt/typeinfo.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/libcxxrt/typeinfo.h Tue Apr 17 11:51:51 2012 +0300
@@ -26,7 +26,86 @@
=20
#include <stddef.h>
#include "abi_namespace.h"
-#include "typeinfo"
+
+namespace ABI_NAMESPACE
+{
+ struct __class_type_info;
+}
+namespace std
+{
+ /**
+ * Standard type info class. The layout of this class is specified by t=
he
+ * ABI. The layout of the vtable is not, but is intended to be
+ * compatible with the GNU ABI.
+ *
+ * Unlike the GNU version, the vtable layout is considered semi-private.
+ */
+ class type_info
+ {
+ public:
+ /**
+ * Virtual destructor. This class must have one virtual function to
+ * ensure that it has a vtable.
+ */
+ virtual ~type_info();
+ bool operator=3D=3D(const type_info &) const;
+ bool operator!=3D(const type_info &) const;
+ bool before(const type_info &) const;
+ const char* name() const;
+ type_info();
+ private:
+ type_info(const type_info& rhs);
+ type_info& operator=3D (const type_info& rhs);
+ const char *__type_name;
+ /*
+ * The following functions are in this order to match the
+ * vtable layout of libsupc++. This allows libcxxrt to be used
+ * with libraries that depend on this.
+ *
+ * These functions are in the public headers for libstdc++, so
+ * we have to assume that someone will probably call them and
+ * expect them to work. Their names must also match the names used in
+ * libsupc++, so that code linking against this library can subclass
+ * type_info and correctly fill in the values in the vtables.
+ */
+ public:
+ /**
+ * Catch function. Allows external libraries to implement
+ * their own basic types. This is used, for example, in the
+ * GNUstep Objective-C runtime to allow Objective-C types to be
+ * caught in G++ catch blocks.
+ *
+ * The outer parameter indicates the number of outer pointers
+ * in the high bits. The low bit indicates whether the
+ * pointers are const qualified.
+ */
+ virtual bool __do_catch(const type_info *thrown_type,
+ void **thrown_object,
+ unsigned outer) const;
+ /**
+ * Performs an upcast. This is used in exception handling to
+ * cast from subclasses to superclasses. If the upcast is
+ * possible, it returns true and adjusts the pointer. If the
+ * upcast is not possible, it returns false and does not adjust
+ * the pointer.
+ */
+ virtual bool __do_upcast(
+ const ABI_NAMESPACE::__class_type_info *target,
+ void **thrown_object) const
+ {
+ return false;
+ }
+ /**
+ * Returns true if this is some pointer type, false otherwise.
+ */
+ virtual bool __is_pointer_p() const { return false; }
+ /**
+ * Returns true if this is some function type, false otherwise.
+ */
+ virtual bool __is_function_p() const { return false; }
+ };
+}
+
=20
namespace ABI_NAMESPACE
{
@@ -50,6 +129,7 @@
struct __function_type_info : public std::type_info
{
virtual ~__function_type_info();
+ virtual bool __is_function_p() const { return true; }
};
/**
* Type info for enums.
@@ -68,13 +148,12 @@
/**
* Function implementing dynamic casts.
*/
- virtual void *cast_to(void *obj,
- const struct __class_type_info *other) const;
- /**
- * Function returning whether a cast from this type to another type is
- * possible.
- */
- virtual bool can_cast_to(const struct __class_type_info *other) const;
+ virtual void *cast_to(void *obj, const struct __class_type_info *other) =
const;
+ virtual bool __do_upcast(const __class_type_info *target,
+ void **thrown_object) const
+ {
+ return this =3D=3D target;
+ }
};
=20
/**
@@ -85,8 +164,10 @@
{
virtual ~__si_class_type_info();
const __class_type_info *__base_type;
+ virtual bool __do_upcast(
+ const ABI_NAMESPACE::__class_type_info *target,
+ void **thrown_object) const;
virtual void *cast_to(void *obj, const struct __class_type_info *other) =
const;
- virtual bool can_cast_to(const struct __class_type_info *other) co=
nst;
};
=20
/**
@@ -166,8 +247,10 @@
/** The class is diamond shaped. */
__diamond_shaped_mask =3D 0x2
};
+ virtual bool __do_upcast(
+ const ABI_NAMESPACE::__class_type_info *target,
+ void **thrown_object) const;
virtual void *cast_to(void *obj, const struct __class_type_info *other) =
const;
- virtual bool can_cast_to(const struct __class_type_info *other) co=
nst;
};
=20
/**
@@ -201,6 +284,10 @@
/** Pointer is a pointer to a member of an incomplete class. */
__incomplete_class_mask =3D 0x10
};
+ virtual bool __is_pointer_p() const { return true; }
+ virtual bool __do_catch(const type_info *thrown_type,
+ void **thrown_object,
+ unsigned outer) const;
};
=20
/**
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/LICENSE.TXT
--- a/head/contrib/llvm/LICENSE.TXT Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/LICENSE.TXT Tue Apr 17 11:51:51 2012 +0300
@@ -4,7 +4,7 @@
University of Illinois/NCSA
Open Source License
=20
-Copyright (c) 2003-2011 University of Illinois at Urbana-Champaign.
+Copyright (c) 2003-2012 University of Illinois at Urbana-Champaign.
All rights reserved.
=20
Developed by:
@@ -67,3 +67,4 @@
CellSPU backend llvm/lib/Target/CellSPU/README.txt
Google Test llvm/utils/unittest/googletest
OpenBSD regex llvm/lib/Support/{reg*, COPYRIGHT.regex}
+pyyaml tests llvm/test/YAMLParser/{*.data, LICENSE.TXT}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm-c/Analy=
sis.h
--- a/head/contrib/llvm/include/llvm-c/Analysis.h Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/llvm/include/llvm-c/Analysis.h Tue Apr 17 11:51:51 2012 =
+0300
@@ -25,6 +25,12 @@
extern "C" {
#endif
=20
+/**
+ * @defgroup LLVMCAnalysis Analysis
+ * @ingroup LLVMC
+ *
+ * @{
+ */
=20
typedef enum {
LLVMAbortProcessAction, /* verifier will print to stderr and abort() */
@@ -48,6 +54,10 @@
void LLVMViewFunctionCFG(LLVMValueRef Fn);
void LLVMViewFunctionCFGOnly(LLVMValueRef Fn);
=20
+/**
+ * @}
+ */
+
#ifdef __cplusplus
}
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm-c/BitRe=
ader.h
--- a/head/contrib/llvm/include/llvm-c/BitReader.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/include/llvm-c/BitReader.h Tue Apr 17 11:51:51 2012=
+0300
@@ -25,6 +25,12 @@
extern "C" {
#endif
=20
+/**
+ * @defgroup LLVMCBitReader Bit Reader
+ * @ingroup LLVMC
+ *
+ * @{
+ */
=20
/* Builds a module from the bitcode in the specified memory buffer, return=
ing a
reference to the module via the OutModule parameter. Returns 0 on succe=
ss.
@@ -59,6 +65,10 @@
LLVMModuleProviderRef *OutMP,
char **OutMessage);
=20
+/**
+ * @}
+ */
+
#ifdef __cplusplus
}
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm-c/BitWr=
iter.h
--- a/head/contrib/llvm/include/llvm-c/BitWriter.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/include/llvm-c/BitWriter.h Tue Apr 17 11:51:51 2012=
+0300
@@ -25,6 +25,12 @@
extern "C" {
#endif
=20
+/**
+ * @defgroup LLVMCBitWriter Bit Writer
+ * @ingroup LLVMC
+ *
+ * @{
+ */
=20
/*=3D=3D=3D-- Operations on modules --------------------------------------=
-------=3D=3D=3D*/
=20
@@ -39,6 +45,10 @@
descriptor. Returns 0 on success. Closes the Handle. */=20
int LLVMWriteBitcodeToFileHandle(LLVMModuleRef M, int Handle);
=20
+/**
+ * @}
+ */
+
#ifdef __cplusplus
}
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm-c/Core.h
--- a/head/contrib/llvm/include/llvm-c/Core.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm-c/Core.h Tue Apr 17 11:51:51 2012 +0300
@@ -10,24 +10,6 @@
|* This header declares the C interface to libLLVMCore.a, which implements=
*|
|* the LLVM intermediate representation. =
*|
|* =
*|
-|* LLVM uses a polymorphic type hierarchy which C cannot represent, theref=
ore *|
-|* parameters must be passed as base types. Despite the declared types, mo=
st *|
-|* of the functions provided operate only on branches of the type hierarch=
y. *|
-|* The declared parameter names are descriptive and specify which type is =
*|
-|* required. Additionally, each type hierarchy is documented along with th=
e *|
-|* functions that operate upon it. For more detail, refer to LLVM's C++ co=
de. *|
-|* If in doubt, refer to Core.cpp, which performs paramter downcasts in th=
e *|
-|* form unwrap<RequiredType>(Param). =
*|
-|* =
*|
-|* Many exotic languages can interoperate with C code but have a harder ti=
me *|
-|* with C++ due to name mangling. So in addition to C, this interface enab=
les *|
-|* tools written in such languages. =
*|
-|* =
*|
-|* When included into a C++ source file, also declares 'wrap' and 'unwrap'=
*|
-|* helpers to perform opaque reference<-->pointer conversions. These helpe=
rs *|
-|* are shorter and more tightly typed than writing the casts by hand when =
*|
-|* authoring bindings. In assert builds, they will do runtime type checkin=
g. *|
-|* =
*|
\*=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D*/
=20
#ifndef LLVM_C_CORE_H
@@ -46,50 +28,121 @@
extern "C" {
#endif
=20
+/**
+ * @defgroup LLVMC LLVM-C: C interface to LLVM
+ *
+ * This module exposes parts of the LLVM library as a C API.
+ *
+ * @{
+ */
+
+/**
+ * @defgroup LLVMCTransforms Transforms
+ */
+
+/**
+ * @defgroup LLVMCCore Core
+ *
+ * This modules provide an interface to libLLVMCore, which implements
+ * the LLVM intermediate representation as well as other related types
+ * and utilities.
+ *
+ * LLVM uses a polymorphic type hierarchy which C cannot represent, theref=
ore
+ * parameters must be passed as base types. Despite the declared types, mo=
st
+ * of the functions provided operate only on branches of the type hierarch=
y.
+ * The declared parameter names are descriptive and specify which type is
+ * required. Additionally, each type hierarchy is documented along with the
+ * functions that operate upon it. For more detail, refer to LLVM's C++ co=
de.
+ * If in doubt, refer to Core.cpp, which performs paramter downcasts in the
+ * form unwrap<RequiredType>(Param).
+ *
+ * Many exotic languages can interoperate with C code but have a harder ti=
me
+ * with C++ due to name mangling. So in addition to C, this interface enab=
les
+ * tools written in such languages.
+ *
+ * When included into a C++ source file, also declares 'wrap' and 'unwrap'
+ * helpers to perform opaque reference<-->pointer conversions. These helpe=
rs
+ * are shorter and more tightly typed than writing the casts by hand when
+ * authoring bindings. In assert builds, they will do runtime type checkin=
g.
+ *
+ * @{
+ */
+
+/**
+ * @defgroup LLVMCCoreTypes Types and Enumerations
+ *
+ * @{
+ */
=20
typedef int LLVMBool;
=20
/* Opaque types. */
=20
/**
- * The top-level container for all LLVM global data. See the LLVMContext =
class.
+ * The top-level container for all LLVM global data. See the LLVMContext c=
lass.
*/
typedef struct LLVMOpaqueContext *LLVMContextRef;
=20
/**
* The top-level container for all other LLVM Intermediate Representation =
(IR)
- * objects. See the llvm::Module class.
+ * objects.
+ *
+ * @see llvm::Module
*/
typedef struct LLVMOpaqueModule *LLVMModuleRef;
=20
/**
- * Each value in the LLVM IR has a type, an LLVMTypeRef. See the llvm::Type
- * class.
+ * Each value in the LLVM IR has a type, an LLVMTypeRef.
+ *
+ * @see llvm::Type
*/
typedef struct LLVMOpaqueType *LLVMTypeRef;
=20
+/**
+ * Represents an individual value in LLVM IR.
+ *
+ * This models llvm::Value.
+ */
typedef struct LLVMOpaqueValue *LLVMValueRef;
+
+/**
+ * Represents a basic block of instruction in LLVM IR.
+ *
+ * This models llvm::BasicBlock.
+ */
typedef struct LLVMOpaqueBasicBlock *LLVMBasicBlockRef;
+
+/**
+ * Represents an LLVM basic block builder.
+ *
+ * This models llvm::IRBuilder.
+ */
typedef struct LLVMOpaqueBuilder *LLVMBuilderRef;
=20
-/* Interface used to provide a module to JIT or interpreter. This is now =
just a
- * synonym for llvm::Module, but we have to keep using the different type =
to
- * keep binary compatibility.
+/**
+ * Interface used to provide a module to JIT or interpreter.
+ * This is now just a synonym for llvm::Module, but we have to keep using =
the
+ * different type to keep binary compatibility.
*/
typedef struct LLVMOpaqueModuleProvider *LLVMModuleProviderRef;
=20
-/* Used to provide a module to JIT or interpreter.
- * See the llvm::MemoryBuffer class.
+/**
+ * Used to provide a module to JIT or interpreter.
+ *
+ * @see llvm::MemoryBuffer
*/
typedef struct LLVMOpaqueMemoryBuffer *LLVMMemoryBufferRef;
=20
-/** See the llvm::PassManagerBase class. */
+/** @see llvm::PassManagerBase */
typedef struct LLVMOpaquePassManager *LLVMPassManagerRef;
=20
-/** See the llvm::PassRegistry class. */
+/** @see llvm::PassRegistry */
typedef struct LLVMOpaquePassRegistry *LLVMPassRegistryRef;
=20
-/** Used to get the users and usees of a Value. See the llvm::Use class. */
+/**
+ * Used to get the users and usees of a Value.
+ *
+ * @see llvm::Use */
typedef struct LLVMOpaqueUse *LLVMUseRef;
=20
typedef enum {
@@ -119,6 +172,11 @@
LLVMReturnsTwice =3D 1 << 29,
LLVMUWTable =3D 1 << 30,
LLVMNonLazyBind =3D 1 << 31
+
+ // FIXME: This attribute is currently not included in the C API as
+ // a temporary measure until the API/ABI impact to the C API is unders=
tood
+ // and the path forward agreed upon.
+ //LLVMAddressSafety =3D 1ULL << 32
} LLVMAttribute;
=20
typedef enum {
@@ -195,14 +253,13 @@
=20
/* Exception Handling Operators */
LLVMResume =3D 58,
- LLVMLandingPad =3D 59,
- LLVMUnwind =3D 60
-
+ LLVMLandingPad =3D 59
=20
} LLVMOpcode;
=20
typedef enum {
LLVMVoidTypeKind, /**< type with no size */
+ LLVMHalfTypeKind, /**< 16 bit floating point type */
LLVMFloatTypeKind, /**< 32 bit floating point type */
LLVMDoubleTypeKind, /**< 64 bit floating point type */
LLVMX86_FP80TypeKind, /**< 80 bit floating point type (X87) */
@@ -294,6 +351,10 @@
LLVMLandingPadFilter /**< A filter clause */
} LLVMLandingPadClauseTy;
=20
+/**
+ * @}
+ */
+
void LLVMInitializeCore(LLVMPassRegistryRef R);
=20
=20
@@ -302,49 +363,233 @@
void LLVMDisposeMessage(char *Message);
=20
=20
-/*=3D=3D=3D-- Contexts ---------------------------------------------------=
-------=3D=3D=3D*/
+/**
+ * @defgroup LLVMCCoreContext Contexts
+ *
+ * Contexts are execution states for the core LLVM IR system.
+ *
+ * Most types are tied to a context instance. Multiple contexts can
+ * exist simultaneously. A single context is not thread safe. However,
+ * different contexts can execute on different threads simultaneously.
+ *
+ * @{
+ */
=20
-/* Create and destroy contexts. */
+/**
+ * Create a new context.
+ *
+ * Every call to this function should be paired with a call to
+ * LLVMContextDispose() or the context will leak memory.
+ */
LLVMContextRef LLVMContextCreate(void);
+
+/**
+ * Obtain the global context instance.
+ */
LLVMContextRef LLVMGetGlobalContext(void);
+
+/**
+ * Destroy a context instance.
+ *
+ * This should be called for every call to LLVMContextCreate() or memory
+ * will be leaked.
+ */
void LLVMContextDispose(LLVMContextRef C);
=20
unsigned LLVMGetMDKindIDInContext(LLVMContextRef C, const char* Name,
unsigned SLen);
unsigned LLVMGetMDKindID(const char* Name, unsigned SLen);
=20
-/*=3D=3D=3D-- Modules ----------------------------------------------------=
-------=3D=3D=3D*/
+/**
+ * @}
+ */
=20
-/* Create and destroy modules. */=20
-/** See llvm::Module::Module. */
+/**
+ * @defgroup LLVMCCoreModule Modules
+ *
+ * Modules represent the top-level structure in a LLVM program. An LLVM
+ * module is effectively a translation unit or a collection of
+ * translation units merged together.
+ *
+ * @{
+ */
+
+/**
+ * Create a new, empty module in the global context.
+ *
+ * This is equivalent to calling LLVMModuleCreateWithNameInContext with
+ * LLVMGetGlobalContext() as the context parameter.
+ *
+ * Every invocation should be paired with LLVMDisposeModule() or memory
+ * will be leaked.
+ */
LLVMModuleRef LLVMModuleCreateWithName(const char *ModuleID);
+
+/**
+ * Create a new, empty module in a specific context.
+ *
+ * Every invocation should be paired with LLVMDisposeModule() or memory
+ * will be leaked.
+ */
LLVMModuleRef LLVMModuleCreateWithNameInContext(const char *ModuleID,
LLVMContextRef C);
=20
-/** See llvm::Module::~Module. */
+/**
+ * Destroy a module instance.
+ *
+ * This must be called for every created module or memory will be
+ * leaked.
+ */
void LLVMDisposeModule(LLVMModuleRef M);
=20
-/** Data layout. See Module::getDataLayout. */
+/**
+ * Obtain the data layout for a module.
+ *
+ * @see Module::getDataLayout()
+ */
const char *LLVMGetDataLayout(LLVMModuleRef M);
+
+/**
+ * Set the data layout for a module.
+ *
+ * @see Module::setDataLayout()
+ */
void LLVMSetDataLayout(LLVMModuleRef M, const char *Triple);
=20
-/** Target triple. See Module::getTargetTriple. */
+/**
+ * Obtain the target triple for a module.
+ *
+ * @see Module::getTargetTriple()
+ */
const char *LLVMGetTarget(LLVMModuleRef M);
+
+/**
+ * Set the target triple for a module.
+ *
+ * @see Module::setTargetTriple()
+ */
void LLVMSetTarget(LLVMModuleRef M, const char *Triple);
=20
-/** See Module::dump. */
+/**
+ * Dump a representation of a module to stderr.
+ *
+ * @see Module::dump()
+ */
void LLVMDumpModule(LLVMModuleRef M);
=20
-/** See Module::setModuleInlineAsm. */
+/**
+ * Set inline assembly for a module.
+ *
+ * @see Module::setModuleInlineAsm()
+ */
void LLVMSetModuleInlineAsm(LLVMModuleRef M, const char *Asm);
=20
-/** See Module::getContext. */
+/**
+ * Obtain the context to which this module is associated.
+ *
+ * @see Module::getContext()
+ */
LLVMContextRef LLVMGetModuleContext(LLVMModuleRef M);
=20
-/*=3D=3D=3D-- Types ------------------------------------------------------=
-------=3D=3D=3D*/
+/**
+ * Obtain a Type from a module by its registered name.
+ */
+LLVMTypeRef LLVMGetTypeByName(LLVMModuleRef M, const char *Name);
=20
-/* LLVM types conform to the following hierarchy:
- *=20
+/**
+ * Obtain the number of operands for named metadata in a module.
+ *
+ * @see llvm::Module::getNamedMetadata()
+ */
+unsigned LLVMGetNamedMetadataNumOperands(LLVMModuleRef M, const char* name=
);
+
+/**
+ * Obtain the named metadata operands for a module.
+ *
+ * The passed LLVMValueRef pointer should refer to an array of
+ * LLVMValueRef at least LLVMGetNamedMetadataNumOperands long. This
+ * array will be populated with the LLVMValueRef instances. Each
+ * instance corresponds to a llvm::MDNode.
+ *
+ * @see llvm::Module::getNamedMetadata()
+ * @see llvm::MDNode::getOperand()
+ */
+void LLVMGetNamedMetadataOperands(LLVMModuleRef M, const char* name, LLVMV=
alueRef *Dest);
+
+/**
+ * Add an operand to named metadata.
+ *
+ * @see llvm::Module::getNamedMetadata()
+ * @see llvm::MDNode::addOperand()
+ */
+void LLVMAddNamedMetadataOperand(LLVMModuleRef M, const char* name,
+ LLVMValueRef Val);
+
+/**
+ * Add a function to a module under a specified name.
+ *
+ * @see llvm::Function::Create()
+ */
+LLVMValueRef LLVMAddFunction(LLVMModuleRef M, const char *Name,
+ LLVMTypeRef FunctionTy);
+
+/**
+ * Obtain a Function value from a Module by its name.
+ *
+ * The returned value corresponds to a llvm::Function value.
+ *
+ * @see llvm::Module::getFunction()
+ */
+LLVMValueRef LLVMGetNamedFunction(LLVMModuleRef M, const char *Name);
+
+/**
+ * Obtain an iterator to the first Function in a Module.
+ *
+ * @see llvm::Module::begin()
+ */
+LLVMValueRef LLVMGetFirstFunction(LLVMModuleRef M);
+
+/**
+ * Obtain an iterator to the last Function in a Module.
+ *
+ * @see llvm::Module::end()
+ */
+LLVMValueRef LLVMGetLastFunction(LLVMModuleRef M);
+
+/**
+ * Advance a Function iterator to the next Function.
+ *
+ * Returns NULL if the iterator was already at the end and there are no mo=
re
+ * functions.
+ */
+LLVMValueRef LLVMGetNextFunction(LLVMValueRef Fn);
+
+/**
+ * Decrement a Function iterator to the previous Function.
+ *
+ * Returns NULL if the iterator was already at the beginning and there are
+ * no previous functions.
+ */
+LLVMValueRef LLVMGetPreviousFunction(LLVMValueRef Fn);
+
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreType Types
+ *
+ * Types represent the type of a value.
+ *
+ * Types are associated with a context instance. The context internally
+ * deduplicates types so there is only 1 instance of a specific type
+ * alive at a time. In other words, a unique type is shared among all
+ * consumers within a context.
+ *
+ * A Type in the C API corresponds to llvm::Type.
+ *
+ * Types have the following hierarchy:
+ *
* types:
* integer type
* real type
@@ -356,16 +601,44 @@
* void type
* label type
* opaque type
+ *
+ * @{
*/
=20
-/** See llvm::LLVMTypeKind::getTypeID. */
+/**
+ * Obtain the enumerated type of a Type instance.
+ *
+ * @see llvm::Type:getTypeID()
+ */
LLVMTypeKind LLVMGetTypeKind(LLVMTypeRef Ty);
+
+/**
+ * Whether the type has a known size.
+ *
+ * Things that don't have a size are abstract types, labels, and void.a
+ *
+ * @see llvm::Type::isSized()
+ */
LLVMBool LLVMTypeIsSized(LLVMTypeRef Ty);
=20
-/** See llvm::LLVMType::getContext. */
+/**
+ * Obtain the context to which this type instance is associated.
+ *
+ * @see llvm::Type::getContext()
+ */
LLVMContextRef LLVMGetTypeContext(LLVMTypeRef Ty);
=20
-/* Operations on integer types */
+/**
+ * @defgroup LLVMCCoreTypeInt Integer Types
+ *
+ * Functions in this section operate on integer types.
+ *
+ * @{
+ */
+
+/**
+ * Obtain an integer type from a context with specified bit width.
+ */
LLVMTypeRef LLVMInt1TypeInContext(LLVMContextRef C);
LLVMTypeRef LLVMInt8TypeInContext(LLVMContextRef C);
LLVMTypeRef LLVMInt16TypeInContext(LLVMContextRef C);
@@ -373,6 +646,10 @@
LLVMTypeRef LLVMInt64TypeInContext(LLVMContextRef C);
LLVMTypeRef LLVMIntTypeInContext(LLVMContextRef C, unsigned NumBits);
=20
+/**
+ * Obtain an integer type from the global context with a specified bit
+ * width.
+ */
LLVMTypeRef LLVMInt1Type(void);
LLVMTypeRef LLVMInt8Type(void);
LLVMTypeRef LLVMInt16Type(void);
@@ -381,68 +658,336 @@
LLVMTypeRef LLVMIntType(unsigned NumBits);
unsigned LLVMGetIntTypeWidth(LLVMTypeRef IntegerTy);
=20
-/* Operations on real types */
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreTypeFloat Floating Point Types
+ *
+ * @{
+ */
+
+/**
+ * Obtain a 16-bit floating point type from a context.
+ */
+LLVMTypeRef LLVMHalfTypeInContext(LLVMContextRef C);
+
+/**
+ * Obtain a 32-bit floating point type from a context.
+ */
LLVMTypeRef LLVMFloatTypeInContext(LLVMContextRef C);
+
+/**
+ * Obtain a 64-bit floating point type from a context.
+ */
LLVMTypeRef LLVMDoubleTypeInContext(LLVMContextRef C);
+
+/**
+ * Obtain a 80-bit floating point type (X87) from a context.
+ */
LLVMTypeRef LLVMX86FP80TypeInContext(LLVMContextRef C);
+
+/**
+ * Obtain a 128-bit floating point type (112-bit mantissa) from a
+ * context.
+ */
LLVMTypeRef LLVMFP128TypeInContext(LLVMContextRef C);
+
+/**
+ * Obtain a 128-bit floating point type (two 64-bits) from a context.
+ */
LLVMTypeRef LLVMPPCFP128TypeInContext(LLVMContextRef C);
=20
+/**
+ * Obtain a floating point type from the global context.
+ *
+ * These map to the functions in this group of the same name.
+ */
+LLVMTypeRef LLVMHalfType(void);
LLVMTypeRef LLVMFloatType(void);
LLVMTypeRef LLVMDoubleType(void);
LLVMTypeRef LLVMX86FP80Type(void);
LLVMTypeRef LLVMFP128Type(void);
LLVMTypeRef LLVMPPCFP128Type(void);
=20
-/* Operations on function types */
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreTypeFunction Function Types
+ *
+ * @{
+ */
+
+/**
+ * Obtain a function type consisting of a specified signature.
+ *
+ * The function is defined as a tuple of a return Type, a list of
+ * parameter types, and whether the function is variadic.
+ */
LLVMTypeRef LLVMFunctionType(LLVMTypeRef ReturnType,
LLVMTypeRef *ParamTypes, unsigned ParamCount,
LLVMBool IsVarArg);
+
+/**
+ * Returns whether a function type is variadic.
+ */
LLVMBool LLVMIsFunctionVarArg(LLVMTypeRef FunctionTy);
+
+/**
+ * Obtain the Type this function Type returns.
+ */
LLVMTypeRef LLVMGetReturnType(LLVMTypeRef FunctionTy);
+
+/**
+ * Obtain the number of parameters this function accepts.
+ */
unsigned LLVMCountParamTypes(LLVMTypeRef FunctionTy);
+
+/**
+ * Obtain the types of a function's parameters.
+ *
+ * The Dest parameter should point to a pre-allocated array of
+ * LLVMTypeRef at least LLVMCountParamTypes() large. On return, the
+ * first LLVMCountParamTypes() entries in the array will be populated
+ * with LLVMTypeRef instances.
+ *
+ * @param FunctionTy The function type to operate on.
+ * @param Dest Memory address of an array to be filled with result.
+ */
void LLVMGetParamTypes(LLVMTypeRef FunctionTy, LLVMTypeRef *Dest);
=20
-/* Operations on struct types */
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreTypeStruct Structure Types
+ *
+ * These functions relate to LLVMTypeRef instances.
+ *
+ * @see llvm::StructType
+ *
+ * @{
+ */
+
+/**
+ * Create a new structure type in a context.
+ *
+ * A structure is specified by a list of inner elements/types and
+ * whether these can be packed together.
+ *
+ * @see llvm::StructType::create()
+ */
LLVMTypeRef LLVMStructTypeInContext(LLVMContextRef C, LLVMTypeRef *Element=
Types,
unsigned ElementCount, LLVMBool Packed=
);
+
+/**
+ * Create a new structure type in the global context.
+ *
+ * @see llvm::StructType::create()
+ */
LLVMTypeRef LLVMStructType(LLVMTypeRef *ElementTypes, unsigned ElementCoun=
t,
LLVMBool Packed);
+
+/**
+ * Create an empty structure in a context having a specified name.
+ *
+ * @see llvm::StructType::create()
+ */
LLVMTypeRef LLVMStructCreateNamed(LLVMContextRef C, const char *Name);
+
+/**
+ * Obtain the name of a structure.
+ *
+ * @see llvm::StructType::getName()
+ */
const char *LLVMGetStructName(LLVMTypeRef Ty);
+
+/**
+ * Set the contents of a structure type.
+ *
+ * @see llvm::StructType::setBody()
+ */
void LLVMStructSetBody(LLVMTypeRef StructTy, LLVMTypeRef *ElementTypes,
unsigned ElementCount, LLVMBool Packed);
=20
+/**
+ * Get the number of elements defined inside the structure.
+ *
+ * @see llvm::StructType::getNumElements()
+ */
unsigned LLVMCountStructElementTypes(LLVMTypeRef StructTy);
+
+/**
+ * Get the elements within a structure.
+ *
+ * The function is passed the address of a pre-allocated array of
+ * LLVMTypeRef at least LLVMCountStructElementTypes() long. After
+ * invocation, this array will be populated with the structure's
+ * elements. The objects in the destination array will have a lifetime
+ * of the structure type itself, which is the lifetime of the context it
+ * is contained in.
+ */
void LLVMGetStructElementTypes(LLVMTypeRef StructTy, LLVMTypeRef *Dest);
+
+/**
+ * Determine whether a structure is packed.
+ *
+ * @see llvm::StructType::isPacked()
+ */
LLVMBool LLVMIsPackedStruct(LLVMTypeRef StructTy);
+
+/**
+ * Determine whether a structure is opaque.
+ *
+ * @see llvm::StructType::isOpaque()
+ */
LLVMBool LLVMIsOpaqueStruct(LLVMTypeRef StructTy);
=20
-LLVMTypeRef LLVMGetTypeByName(LLVMModuleRef M, const char *Name);
+/**
+ * @}
+ */
=20
-/* Operations on array, pointer, and vector types (sequence types) */
+
+/**
+ * @defgroup LLVMCCoreTypeSequential Sequential Types
+ *
+ * Sequential types represents "arrays" of types. This is a super class
+ * for array, vector, and pointer types.
+ *
+ * @{
+ */
+
+/**
+ * Obtain the type of elements within a sequential type.
+ *
+ * This works on array, vector, and pointer types.
+ *
+ * @see llvm::SequentialType::getElementType()
+ */
+LLVMTypeRef LLVMGetElementType(LLVMTypeRef Ty);
+
+/**
+ * Create a fixed size array type that refers to a specific type.
+ *
+ * The created type will exist in the context that its element type
+ * exists in.
+ *
+ * @see llvm::ArrayType::get()
+ */
LLVMTypeRef LLVMArrayType(LLVMTypeRef ElementType, unsigned ElementCount);
+
+/**
+ * Obtain the length of an array type.
+ *
+ * This only works on types that represent arrays.
+ *
+ * @see llvm::ArrayType::getNumElements()
+ */
+unsigned LLVMGetArrayLength(LLVMTypeRef ArrayTy);
+
+/**
+ * Create a pointer type that points to a defined type.
+ *
+ * The created type will exist in the context that its pointee type
+ * exists in.
+ *
+ * @see llvm::PointerType::get()
+ */
LLVMTypeRef LLVMPointerType(LLVMTypeRef ElementType, unsigned AddressSpace=
);
+
+/**
+ * Obtain the address space of a pointer type.
+ *
+ * This only works on types that represent pointers.
+ *
+ * @see llvm::PointerType::getAddressSpace()
+ */
+unsigned LLVMGetPointerAddressSpace(LLVMTypeRef PointerTy);
+
+/**
+ * Create a vector type that contains a defined type and has a specific
+ * number of elements.
+ *
+ * The created type will exist in the context thats its element type
+ * exists in.
+ *
+ * @see llvm::VectorType::get()
+ */
LLVMTypeRef LLVMVectorType(LLVMTypeRef ElementType, unsigned ElementCount);
=20
-LLVMTypeRef LLVMGetElementType(LLVMTypeRef Ty);
-unsigned LLVMGetArrayLength(LLVMTypeRef ArrayTy);
-unsigned LLVMGetPointerAddressSpace(LLVMTypeRef PointerTy);
+/**
+ * Obtain the number of elements in a vector type.
+ *
+ * This only works on types that represent vectors.
+ *
+ * @see llvm::VectorType::getNumElements()
+ */
unsigned LLVMGetVectorSize(LLVMTypeRef VectorTy);
=20
-/* Operations on other types */
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreTypeOther Other Types
+ *
+ * @{
+ */
+
+/**
+ * Create a void type in a context.
+ */
LLVMTypeRef LLVMVoidTypeInContext(LLVMContextRef C);
+
+/**
+ * Create a label type in a context.
+ */
LLVMTypeRef LLVMLabelTypeInContext(LLVMContextRef C);
+
+/**
+ * Create a X86 MMX type in a context.
+ */
LLVMTypeRef LLVMX86MMXTypeInContext(LLVMContextRef C);
=20
+/**
+ * These are similar to the above functions except they operate on the
+ * global context.
+ */
LLVMTypeRef LLVMVoidType(void);
LLVMTypeRef LLVMLabelType(void);
LLVMTypeRef LLVMX86MMXType(void);
=20
-/*=3D=3D=3D-- Values -----------------------------------------------------=
-------=3D=3D=3D*/
+/**
+ * @}
+ */
=20
-/* The bulk of LLVM's object model consists of values, which comprise a ve=
ry
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreValues Values
+ *
+ * The bulk of LLVM's object model consists of values, which comprise a ve=
ry
* rich type hierarchy.
+ *
+ * LLVMValueRef essentially represents llvm::Value. There is a rich
+ * hierarchy of classes within this type. Depending on the instance
+ * obtain, not all APIs are available.
+ *
+ * Callers can determine the type of a LLVMValueRef by calling the
+ * LLVMIsA* family of functions (e.g. LLVMIsAArgument()). These
+ * functions are defined by a macro, so it isn't obvious which are
+ * available by looking at the Doxygen source code. Instead, look at the
+ * source definition of LLVM_FOR_EACH_VALUE_SUBCLASS and note the list
+ * of value names given. These value names also correspond to classes in
+ * the llvm::Value hierarchy.
+ *
+ * @{
*/
=20
#define LLVM_FOR_EACH_VALUE_SUBCLASS(macro) \
@@ -473,8 +1018,6 @@
macro(IntrinsicInst) \
macro(DbgInfoIntrinsic) \
macro(DbgDeclareInst) \
- macro(EHExceptionInst) \
- macro(EHSelectorInst) \
macro(MemIntrinsic) \
macro(MemCpyInst) \
macro(MemMoveInst) \
@@ -518,92 +1061,399 @@
macro(LoadInst) \
macro(VAArgInst)
=20
-/* Operations on all values */
+/**
+ * @defgroup LLVMCCoreValueGeneral General APIs
+ *
+ * Functions in this section work on all LLVMValueRef instances,
+ * regardless of their sub-type. They correspond to functions available
+ * on llvm::Value.
+ *
+ * @{
+ */
+
+/**
+ * Obtain the type of a value.
+ *
+ * @see llvm::Value::getType()
+ */
LLVMTypeRef LLVMTypeOf(LLVMValueRef Val);
+
+/**
+ * Obtain the string name of a value.
+ *
+ * @see llvm::Value::getName()
+ */
const char *LLVMGetValueName(LLVMValueRef Val);
+
+/**
+ * Set the string name of a value.
+ *
+ * @see llvm::Value::setName()
+ */
void LLVMSetValueName(LLVMValueRef Val, const char *Name);
+
+/**
+ * Dump a representation of a value to stderr.
+ *
+ * @see llvm::Value::dump()
+ */
void LLVMDumpValue(LLVMValueRef Val);
+
+/**
+ * Replace all uses of a value with another one.
+ *
+ * @see llvm::Value::replaceAllUsesWith()
+ */
void LLVMReplaceAllUsesWith(LLVMValueRef OldVal, LLVMValueRef NewVal);
-int LLVMHasMetadata(LLVMValueRef Val);
-LLVMValueRef LLVMGetMetadata(LLVMValueRef Val, unsigned KindID);
-void LLVMSetMetadata(LLVMValueRef Val, unsigned KindID, LLVMValueRef Node);
=20
-/* Conversion functions. Return the input value if it is an instance of the
- specified class, otherwise NULL. See llvm::dyn_cast_or_null<>. */
+/**
+ * Determine whether the specified constant instance is constant.
+ */
+LLVMBool LLVMIsConstant(LLVMValueRef Val);
+
+/**
+ * Determine whether a value instance is undefined.
+ */
+LLVMBool LLVMIsUndef(LLVMValueRef Val);
+
+/**
+ * Convert value instances between types.
+ *
+ * Internally, a LLVMValueRef is "pinned" to a specific type. This
+ * series of functions allows you to cast an instance to a specific
+ * type.
+ *
+ * If the cast is not valid for the specified type, NULL is returned.
+ *
+ * @see llvm::dyn_cast_or_null<>
+ */
#define LLVM_DECLARE_VALUE_CAST(name) \
LLVMValueRef LLVMIsA##name(LLVMValueRef Val);
LLVM_FOR_EACH_VALUE_SUBCLASS(LLVM_DECLARE_VALUE_CAST)
=20
-/* Operations on Uses */
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreValueUses Usage
+ *
+ * This module defines functions that allow you to inspect the uses of a
+ * LLVMValueRef.
+ *
+ * It is possible to obtain a LLVMUseRef for any LLVMValueRef instance.
+ * Each LLVMUseRef (which corresponds to a llvm::Use instance) holds a
+ * llvm::User and llvm::Value.
+ *
+ * @{
+ */
+
+/**
+ * Obtain the first use of a value.
+ *
+ * Uses are obtained in an iterator fashion. First, call this function
+ * to obtain a reference to the first use. Then, call LLVMGetNextUse()
+ * on that instance and all subsequently obtained instances untl
+ * LLVMGetNextUse() returns NULL.
+ *
+ * @see llvm::Value::use_begin()
+ */
LLVMUseRef LLVMGetFirstUse(LLVMValueRef Val);
+
+/**
+ * Obtain the next use of a value.
+ *
+ * This effectively advances the iterator. It returns NULL if you are on
+ * the final use and no more are available.
+ */
LLVMUseRef LLVMGetNextUse(LLVMUseRef U);
+
+/**
+ * Obtain the user value for a user.
+ *
+ * The returned value corresponds to a llvm::User type.
+ *
+ * @see llvm::Use::getUser()
+ */
LLVMValueRef LLVMGetUser(LLVMUseRef U);
+
+/**
+ * Obtain the value this use corresponds to.
+ *
+ * @see llvm::Use::get().
+ */
LLVMValueRef LLVMGetUsedValue(LLVMUseRef U);
=20
-/* Operations on Users */
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreValueUser User value
+ *
+ * Function in this group pertain to LLVMValueRef instances that descent
+ * from llvm::User. This includes constants, instructions, and
+ * operators.
+ *
+ * @{
+ */
+
+/**
+ * Obtain an operand at a specific index in a llvm::User value.
+ *
+ * @see llvm::User::getOperand()
+ */
LLVMValueRef LLVMGetOperand(LLVMValueRef Val, unsigned Index);
+
+/**
+ * Set an operand at a specific index in a llvm::User value.
+ *
+ * @see llvm::User::setOperand()
+ */
void LLVMSetOperand(LLVMValueRef User, unsigned Index, LLVMValueRef Val);
+
+/**
+ * Obtain the number of operands in a llvm::User value.
+ *
+ * @see llvm::User::getNumOperands()
+ */
int LLVMGetNumOperands(LLVMValueRef Val);
=20
-/* Operations on constants of any type */
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreValueConstant Constants
+ *
+ * This section contains APIs for interacting with LLVMValueRef that
+ * correspond to llvm::Constant instances.
+ *
+ * These functions will work for any LLVMValueRef in the llvm::Constant
+ * class hierarchy.
+ *
+ * @{
+ */
+
+/**
+ * Obtain a constant value referring to the null instance of a type.
+ *
+ * @see llvm::Constant::getNullValue()
+ */
LLVMValueRef LLVMConstNull(LLVMTypeRef Ty); /* all zeroes */
-LLVMValueRef LLVMConstAllOnes(LLVMTypeRef Ty); /* only for int/vector */
+
+/**
+ * Obtain a constant value referring to the instance of a type
+ * consisting of all ones.
+ *
+ * This is only valid for integer types.
+ *
+ * @see llvm::Constant::getAllOnesValue()
+ */
+LLVMValueRef LLVMConstAllOnes(LLVMTypeRef Ty);
+
+/**
+ * Obtain a constant value referring to an undefined value of a type.
+ *
+ * @see llvm::UndefValue::get()
+ */
LLVMValueRef LLVMGetUndef(LLVMTypeRef Ty);
-LLVMBool LLVMIsConstant(LLVMValueRef Val);
+
+/**
+ * Determine whether a value instance is null.
+ *
+ * @see llvm::Constant::isNullValue()
+ */
LLVMBool LLVMIsNull(LLVMValueRef Val);
-LLVMBool LLVMIsUndef(LLVMValueRef Val);
+
+/**
+ * Obtain a constant that is a constant pointer pointing to NULL for a
+ * specified type.
+ */
LLVMValueRef LLVMConstPointerNull(LLVMTypeRef Ty);
=20
-/* Operations on metadata */
-LLVMValueRef LLVMMDStringInContext(LLVMContextRef C, const char *Str,
- unsigned SLen);
-LLVMValueRef LLVMMDString(const char *Str, unsigned SLen);
-LLVMValueRef LLVMMDNodeInContext(LLVMContextRef C, LLVMValueRef *Vals,
- unsigned Count);
-LLVMValueRef LLVMMDNode(LLVMValueRef *Vals, unsigned Count);
-const char *LLVMGetMDString(LLVMValueRef V, unsigned* Len);
-int LLVMGetMDNodeNumOperands(LLVMValueRef V);
-LLVMValueRef *LLVMGetMDNodeOperand(LLVMValueRef V, unsigned i);
-unsigned LLVMGetNamedMetadataNumOperands(LLVMModuleRef M, const char* name=
);
-void LLVMGetNamedMetadataOperands(LLVMModuleRef M, const char* name, LLVMV=
alueRef *Dest);
+/**
+ * @defgroup LLVMCCoreValueConstantScalar Scalar constants
+ *
+ * Functions in this group model LLVMValueRef instances that correspond
+ * to constants referring to scalar types.
+ *
+ * For integer types, the LLVMTypeRef parameter should correspond to a
+ * llvm::IntegerType instance and the returned LLVMValueRef will
+ * correspond to a llvm::ConstantInt.
+ *
+ * For floating point types, the LLVMTypeRef returned corresponds to a
+ * llvm::ConstantFP.
+ *
+ * @{
+ */
=20
-/* Operations on scalar constants */
+/**
+ * Obtain a constant value for an integer type.
+ *
+ * The returned value corresponds to a llvm::ConstantInt.
+ *
+ * @see llvm::ConstantInt::get()
+ *
+ * @param IntTy Integer type to obtain value of.
+ * @param N The value the returned instance should refer to.
+ * @param SignExtend Whether to sign extend the produced value.
+ */
LLVMValueRef LLVMConstInt(LLVMTypeRef IntTy, unsigned long long N,
LLVMBool SignExtend);
+
+/**
+ * Obtain a constant value for an integer of arbitrary precision.
+ *
+ * @see llvm::ConstantInt::get()
+ */
LLVMValueRef LLVMConstIntOfArbitraryPrecision(LLVMTypeRef IntTy,
unsigned NumWords,
const uint64_t Words[]);
+
+/**
+ * Obtain a constant value for an integer parsed from a string.
+ *
+ * A similar API, LLVMConstIntOfStringAndSize is also available. If the
+ * string's length is available, it is preferred to call that function
+ * instead.
+ *
+ * @see llvm::ConstantInt::get()
+ */
LLVMValueRef LLVMConstIntOfString(LLVMTypeRef IntTy, const char *Text,
uint8_t Radix);
+
+/**
+ * Obtain a constant value for an integer parsed from a string with
+ * specified length.
+ *
+ * @see llvm::ConstantInt::get()
+ */
LLVMValueRef LLVMConstIntOfStringAndSize(LLVMTypeRef IntTy, const char *Te=
xt,
unsigned SLen, uint8_t Radix);
+
+/**
+ * Obtain a constant value referring to a double floating point value.
+ */
LLVMValueRef LLVMConstReal(LLVMTypeRef RealTy, double N);
+
+/**
+ * Obtain a constant for a floating point value parsed from a string.
+ *
+ * A similar API, LLVMConstRealOfStringAndSize is also available. It
+ * should be used if the input string's length is known.
+ */
LLVMValueRef LLVMConstRealOfString(LLVMTypeRef RealTy, const char *Text);
+
+/**
+ * Obtain a constant for a floating point value parsed from a string.
+ */
LLVMValueRef LLVMConstRealOfStringAndSize(LLVMTypeRef RealTy, const char *=
Text,
unsigned SLen);
+
+/**
+ * Obtain the zero extended value for an integer constant value.
+ *
+ * @see llvm::ConstantInt::getZExtValue()
+ */
unsigned long long LLVMConstIntGetZExtValue(LLVMValueRef ConstantVal);
+
+/**
+ * Obtain the sign extended value for an integer constant value.
+ *
+ * @see llvm::ConstantInt::getSExtValue()
+ */
long long LLVMConstIntGetSExtValue(LLVMValueRef ConstantVal);
=20
+/**
+ * @}
+ */
=20
-/* Operations on composite constants */
+/**
+ * @defgroup LLVMCCoreValueConstantComposite Composite Constants
+ *
+ * Functions in this group operate on composite constants.
+ *
+ * @{
+ */
+
+/**
+ * Create a ConstantDataSequential and initialize it with a string.
+ *
+ * @see llvm::ConstantDataArray::getString()
+ */
LLVMValueRef LLVMConstStringInContext(LLVMContextRef C, const char *Str,
unsigned Length, LLVMBool DontNullTe=
rminate);
-LLVMValueRef LLVMConstStructInContext(LLVMContextRef C,=20
+
+/**
+ * Create a ConstantDataSequential with string content in the global conte=
xt.
+ *
+ * This is the same as LLVMConstStringInContext except it operates on the
+ * global context.
+ *
+ * @see LLVMConstStringInContext()
+ * @see llvm::ConstantDataArray::getString()
+ */
+LLVMValueRef LLVMConstString(const char *Str, unsigned Length,
+ LLVMBool DontNullTerminate);
+
+/**
+ * Create an anonymous ConstantStruct with the specified values.
+ *
+ * @see llvm::ConstantStruct::getAnon()
+ */
+LLVMValueRef LLVMConstStructInContext(LLVMContextRef C,
LLVMValueRef *ConstantVals,
unsigned Count, LLVMBool Packed);
=20
-LLVMValueRef LLVMConstString(const char *Str, unsigned Length,
- LLVMBool DontNullTerminate);
+/**
+ * Create a ConstantStruct in the global Context.
+ *
+ * This is the same as LLVMConstStructInContext except it operates on the
+ * global Context.
+ *
+ * @see LLVMConstStructInContext()
+ */
+LLVMValueRef LLVMConstStruct(LLVMValueRef *ConstantVals, unsigned Count,
+ LLVMBool Packed);
+
+/**
+ * Create a ConstantArray from values.
+ *
+ * @see llvm::ConstantArray::get()
+ */
LLVMValueRef LLVMConstArray(LLVMTypeRef ElementTy,
LLVMValueRef *ConstantVals, unsigned Length);
-LLVMValueRef LLVMConstStruct(LLVMValueRef *ConstantVals, unsigned Count,
- LLVMBool Packed);
+
+/**
+ * Create a non-anonymous ConstantStruct from values.
+ *
+ * @see llvm::ConstantStruct::get()
+ */
LLVMValueRef LLVMConstNamedStruct(LLVMTypeRef StructTy,
LLVMValueRef *ConstantVals,
unsigned Count);
+
+/**
+ * Create a ConstantVector from values.
+ *
+ * @see llvm::ConstantVector::get()
+ */
LLVMValueRef LLVMConstVector(LLVMValueRef *ScalarConstantVals, unsigned Si=
ze);
=20
-/* Constant expressions */
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreValueConstantExpressions Constant Expressions
+ *
+ * Functions in this group correspond to APIs on llvm::ConstantExpr.
+ *
+ * @see llvm::ConstantExpr.
+ *
+ * @{
+ */
LLVMOpcode LLVMGetConstOpcode(LLVMValueRef ConstantVal);
LLVMValueRef LLVMAlignOf(LLVMTypeRef Ty);
LLVMValueRef LLVMSizeOf(LLVMTypeRef Ty);
@@ -690,7 +1540,21 @@
LLVMBool HasSideEffects, LLVMBool IsAlignS=
tack);
LLVMValueRef LLVMBlockAddress(LLVMValueRef F, LLVMBasicBlockRef BB);
=20
-/* Operations on global variables, functions, and aliases (globals) */
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreValueConstantGlobals Global Values
+ *
+ * This group contains functions that operate on global values. Functions =
in
+ * this group relate to functions in the llvm::GlobalValue class tree.
+ *
+ * @see llvm::GlobalValue
+ *
+ * @{
+ */
+
LLVMModuleRef LLVMGetGlobalParent(LLVMValueRef Global);
LLVMBool LLVMIsDeclaration(LLVMValueRef Global);
LLVMLinkage LLVMGetLinkage(LLVMValueRef Global);
@@ -702,7 +1566,15 @@
unsigned LLVMGetAlignment(LLVMValueRef Global);
void LLVMSetAlignment(LLVMValueRef Global, unsigned Bytes);
=20
-/* Operations on global variables */
+/**
+ * @defgroup LLVMCoreValueConstantGlobalVariable Global Variables
+ *
+ * This group contains functions that operate on global variable values.
+ *
+ * @see llvm::GlobalVariable
+ *
+ * @{
+ */
LLVMValueRef LLVMAddGlobal(LLVMModuleRef M, LLVMTypeRef Ty, const char *Na=
me);
LLVMValueRef LLVMAddGlobalInAddressSpace(LLVMModuleRef M, LLVMTypeRef Ty,
const char *Name,
@@ -720,110 +1592,672 @@
LLVMBool LLVMIsGlobalConstant(LLVMValueRef GlobalVar);
void LLVMSetGlobalConstant(LLVMValueRef GlobalVar, LLVMBool IsConstant);
=20
-/* Operations on aliases */
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCoreValueConstantGlobalAlias Global Aliases
+ *
+ * This group contains function that operate on global alias values.
+ *
+ * @see llvm::GlobalAlias
+ *
+ * @{
+ */
LLVMValueRef LLVMAddAlias(LLVMModuleRef M, LLVMTypeRef Ty, LLVMValueRef Al=
iasee,
const char *Name);
=20
-/* Operations on functions */
-LLVMValueRef LLVMAddFunction(LLVMModuleRef M, const char *Name,
- LLVMTypeRef FunctionTy);
-LLVMValueRef LLVMGetNamedFunction(LLVMModuleRef M, const char *Name);
-LLVMValueRef LLVMGetFirstFunction(LLVMModuleRef M);
-LLVMValueRef LLVMGetLastFunction(LLVMModuleRef M);
-LLVMValueRef LLVMGetNextFunction(LLVMValueRef Fn);
-LLVMValueRef LLVMGetPreviousFunction(LLVMValueRef Fn);
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreValueFunction Function values
+ *
+ * Functions in this group operate on LLVMValueRef instances that
+ * correspond to llvm::Function instances.
+ *
+ * @see llvm::Function
+ *
+ * @{
+ */
+
+/**
+ * Remove a function from its containing module and deletes it.
+ *
+ * @see llvm::Function::eraseFromParent()
+ */
void LLVMDeleteFunction(LLVMValueRef Fn);
+
+/**
+ * Obtain the ID number from a function instance.
+ *
+ * @see llvm::Function::getIntrinsicID()
+ */
unsigned LLVMGetIntrinsicID(LLVMValueRef Fn);
+
+/**
+ * Obtain the calling function of a function.
+ *
+ * The returned value corresponds to the LLVMCallConv enumeration.
+ *
+ * @see llvm::Function::getCallingConv()
+ */
unsigned LLVMGetFunctionCallConv(LLVMValueRef Fn);
+
+/**
+ * Set the calling convention of a function.
+ *
+ * @see llvm::Function::setCallingConv()
+ *
+ * @param Fn Function to operate on
+ * @param CC LLVMCallConv to set calling convention to
+ */
void LLVMSetFunctionCallConv(LLVMValueRef Fn, unsigned CC);
+
+/**
+ * Obtain the name of the garbage collector to use during code
+ * generation.
+ *
+ * @see llvm::Function::getGC()
+ */
const char *LLVMGetGC(LLVMValueRef Fn);
+
+/**
+ * Define the garbage collector to use during code generation.
+ *
+ * @see llvm::Function::setGC()
+ */
void LLVMSetGC(LLVMValueRef Fn, const char *Name);
+
+/**
+ * Add an attribute to a function.
+ *
+ * @see llvm::Function::addAttribute()
+ */
void LLVMAddFunctionAttr(LLVMValueRef Fn, LLVMAttribute PA);
+
+/**
+ * Obtain an attribute from a function.
+ *
+ * @see llvm::Function::getAttributes()
+ */
LLVMAttribute LLVMGetFunctionAttr(LLVMValueRef Fn);
+
+/**
+ * Remove an attribute from a function.
+ */
void LLVMRemoveFunctionAttr(LLVMValueRef Fn, LLVMAttribute PA);
=20
-/* Operations on parameters */
+/**
+ * @defgroup LLVMCCoreValueFunctionParameters Function Parameters
+ *
+ * Functions in this group relate to arguments/parameters on functions.
+ *
+ * Functions in this group expect LLVMValueRef instances that correspond
+ * to llvm::Function instances.
+ *
+ * @{
+ */
+
+/**
+ * Obtain the number of parameters in a function.
+ *
+ * @see llvm::Function::arg_size()
+ */
unsigned LLVMCountParams(LLVMValueRef Fn);
+
+/**
+ * Obtain the parameters in a function.
+ *
+ * The takes a pointer to a pre-allocated array of LLVMValueRef that is
+ * at least LLVMCountParams() long. This array will be filled with
+ * LLVMValueRef instances which correspond to the parameters the
+ * function receives. Each LLVMValueRef corresponds to a llvm::Argument
+ * instance.
+ *
+ * @see llvm::Function::arg_begin()
+ */
void LLVMGetParams(LLVMValueRef Fn, LLVMValueRef *Params);
+
+/**
+ * Obtain the parameter at the specified index.
+ *
+ * Parameters are indexed from 0.
+ *
+ * @see llvm::Function::arg_begin()
+ */
LLVMValueRef LLVMGetParam(LLVMValueRef Fn, unsigned Index);
+
+/**
+ * Obtain the function to which this argument belongs.
+ *
+ * Unlike other functions in this group, this one takes a LLVMValueRef
+ * that corresponds to a llvm::Attribute.
+ *
+ * The returned LLVMValueRef is the llvm::Function to which this
+ * argument belongs.
+ */
LLVMValueRef LLVMGetParamParent(LLVMValueRef Inst);
+
+/**
+ * Obtain the first parameter to a function.
+ *
+ * @see llvm::Function::arg_begin()
+ */
LLVMValueRef LLVMGetFirstParam(LLVMValueRef Fn);
+
+/**
+ * Obtain the last parameter to a function.
+ *
+ * @see llvm::Function::arg_end()
+ */
LLVMValueRef LLVMGetLastParam(LLVMValueRef Fn);
+
+/**
+ * Obtain the next parameter to a function.
+ *
+ * This takes a LLVMValueRef obtained from LLVMGetFirstParam() (which is
+ * actually a wrapped iterator) and obtains the next parameter from the
+ * underlying iterator.
+ */
LLVMValueRef LLVMGetNextParam(LLVMValueRef Arg);
+
+/**
+ * Obtain the previous parameter to a function.
+ *
+ * This is the opposite of LLVMGetNextParam().
+ */
LLVMValueRef LLVMGetPreviousParam(LLVMValueRef Arg);
+
+/**
+ * Add an attribute to a function argument.
+ *
+ * @see llvm::Argument::addAttr()
+ */
void LLVMAddAttribute(LLVMValueRef Arg, LLVMAttribute PA);
+
+/**
+ * Remove an attribute from a function argument.
+ *
+ * @see llvm::Argument::removeAttr()
+ */
void LLVMRemoveAttribute(LLVMValueRef Arg, LLVMAttribute PA);
+
+/**
+ * Get an attribute from a function argument.
+ */
LLVMAttribute LLVMGetAttribute(LLVMValueRef Arg);
+
+/**
+ * Set the alignment for a function parameter.
+ *
+ * @see llvm::Argument::addAttr()
+ * @see llvm::Attribute::constructAlignmentFromInt()
+ */
void LLVMSetParamAlignment(LLVMValueRef Arg, unsigned align);
=20
-/* Operations on basic blocks */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreValueMetadata Metadata
+ *
+ * @{
+ */
+
+/**
+ * Obtain a MDString value from a context.
+ *
+ * The returned instance corresponds to the llvm::MDString class.
+ *
+ * The instance is specified by string data of a specified length. The
+ * string content is copied, so the backing memory can be freed after
+ * this function returns.
+ */
+LLVMValueRef LLVMMDStringInContext(LLVMContextRef C, const char *Str,
+ unsigned SLen);
+
+/**
+ * Obtain a MDString value from the global context.
+ */
+LLVMValueRef LLVMMDString(const char *Str, unsigned SLen);
+
+/**
+ * Obtain a MDNode value from a context.
+ *
+ * The returned value corresponds to the llvm::MDNode class.
+ */
+LLVMValueRef LLVMMDNodeInContext(LLVMContextRef C, LLVMValueRef *Vals,
+ unsigned Count);
+
+/**
+ * Obtain a MDNode value from the global context.
+ */
+LLVMValueRef LLVMMDNode(LLVMValueRef *Vals, unsigned Count);
+
+/**
+ * Obtain the underlying string from a MDString value.
+ *
+ * @param V Instance to obtain string from.
+ * @param Len Memory address which will hold length of returned string.
+ * @return String data in MDString.
+ */
+const char *LLVMGetMDString(LLVMValueRef V, unsigned* Len);
+
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreValueBasicBlock Basic Block
+ *
+ * A basic block represents a single entry single exit section of code.
+ * Basic blocks contain a list of instructions which form the body of
+ * the block.
+ *
+ * Basic blocks belong to functions. They have the type of label.
+ *
+ * Basic blocks are themselves values. However, the C API models them as
+ * LLVMBasicBlockRef.
+ *
+ * @see llvm::BasicBlock
+ *
+ * @{
+ */
+
+/**
+ * Convert a basic block instance to a value type.
+ */
LLVMValueRef LLVMBasicBlockAsValue(LLVMBasicBlockRef BB);
+
+/**
+ * Determine whether a LLVMValueRef is itself a basic block.
+ */
LLVMBool LLVMValueIsBasicBlock(LLVMValueRef Val);
+
+/**
+ * Convert a LLVMValueRef to a LLVMBasicBlockRef instance.
+ */
LLVMBasicBlockRef LLVMValueAsBasicBlock(LLVMValueRef Val);
+
+/**
+ * Obtain the function to which a basic block belongs.
+ *
+ * @see llvm::BasicBlock::getParent()
+ */
LLVMValueRef LLVMGetBasicBlockParent(LLVMBasicBlockRef BB);
+
+/**
+ * Obtain the terminator instruction for a basic block.
+ *
+ * If the basic block does not have a terminator (it is not well-formed
+ * if it doesn't), then NULL is returned.
+ *
+ * The returned LLVMValueRef corresponds to a llvm::TerminatorInst.
+ *
+ * @see llvm::BasicBlock::getTerminator()
+ */
LLVMValueRef LLVMGetBasicBlockTerminator(LLVMBasicBlockRef BB);
+
+/**
+ * Obtain the number of basic blocks in a function.
+ *
+ * @param Fn Function value to operate on.
+ */
unsigned LLVMCountBasicBlocks(LLVMValueRef Fn);
+
+/**
+ * Obtain all of the basic blocks in a function.
+ *
+ * This operates on a function value. The BasicBlocks parameter is a
+ * pointer to a pre-allocated array of LLVMBasicBlockRef of at least
+ * LLVMCountBasicBlocks() in length. This array is populated with
+ * LLVMBasicBlockRef instances.
+ */
void LLVMGetBasicBlocks(LLVMValueRef Fn, LLVMBasicBlockRef *BasicBlocks);
+
+/**
+ * Obtain the first basic block in a function.
+ *
+ * The returned basic block can be used as an iterator. You will likely
+ * eventually call into LLVMGetNextBasicBlock() with it.
+ *
+ * @see llvm::Function::begin()
+ */
LLVMBasicBlockRef LLVMGetFirstBasicBlock(LLVMValueRef Fn);
+
+/**
+ * Obtain the last basic block in a function.
+ *
+ * @see llvm::Function::end()
+ */
LLVMBasicBlockRef LLVMGetLastBasicBlock(LLVMValueRef Fn);
+
+/**
+ * Advance a basic block iterator.
+ */
LLVMBasicBlockRef LLVMGetNextBasicBlock(LLVMBasicBlockRef BB);
+
+/**
+ * Go backwards in a basic block iterator.
+ */
LLVMBasicBlockRef LLVMGetPreviousBasicBlock(LLVMBasicBlockRef BB);
+
+/**
+ * Obtain the basic block that corresponds to the entry point of a
+ * function.
+ *
+ * @see llvm::Function::getEntryBlock()
+ */
LLVMBasicBlockRef LLVMGetEntryBasicBlock(LLVMValueRef Fn);
=20
+/**
+ * Append a basic block to the end of a function.
+ *
+ * @see llvm::BasicBlock::Create()
+ */
LLVMBasicBlockRef LLVMAppendBasicBlockInContext(LLVMContextRef C,
LLVMValueRef Fn,
const char *Name);
+
+/**
+ * Append a basic block to the end of a function using the global
+ * context.
+ *
+ * @see llvm::BasicBlock::Create()
+ */
+LLVMBasicBlockRef LLVMAppendBasicBlock(LLVMValueRef Fn, const char *Name);
+
+/**
+ * Insert a basic block in a function before another basic block.
+ *
+ * The function to add to is determined by the function of the
+ * passed basic block.
+ *
+ * @see llvm::BasicBlock::Create()
+ */
LLVMBasicBlockRef LLVMInsertBasicBlockInContext(LLVMContextRef C,
LLVMBasicBlockRef BB,
const char *Name);
=20
-LLVMBasicBlockRef LLVMAppendBasicBlock(LLVMValueRef Fn, const char *Name);
+/**
+ * Insert a basic block in a function using the global context.
+ *
+ * @see llvm::BasicBlock::Create()
+ */
LLVMBasicBlockRef LLVMInsertBasicBlock(LLVMBasicBlockRef InsertBeforeBB,
const char *Name);
+
+/**
+ * Remove a basic block from a function and delete it.
+ *
+ * This deletes the basic block from its containing function and deletes
+ * the basic block itself.
+ *
+ * @see llvm::BasicBlock::eraseFromParent()
+ */
void LLVMDeleteBasicBlock(LLVMBasicBlockRef BB);
+
+/**
+ * Remove a basic block from a function.
+ *
+ * This deletes the basic block from its containing function but keep
+ * the basic block alive.
+ *
+ * @see llvm::BasicBlock::removeFromParent()
+ */
void LLVMRemoveBasicBlockFromParent(LLVMBasicBlockRef BB);
=20
+/**
+ * Move a basic block to before another one.
+ *
+ * @see llvm::BasicBlock::moveBefore()
+ */
void LLVMMoveBasicBlockBefore(LLVMBasicBlockRef BB, LLVMBasicBlockRef Move=
Pos);
+
+/**
+ * Move a basic block to after another one.
+ *
+ * @see llvm::BasicBlock::moveAfter()
+ */
void LLVMMoveBasicBlockAfter(LLVMBasicBlockRef BB, LLVMBasicBlockRef MoveP=
os);
=20
+/**
+ * Obtain the first instruction in a basic block.
+ *
+ * The returned LLVMValueRef corresponds to a llvm::Instruction
+ * instance.
+ */
LLVMValueRef LLVMGetFirstInstruction(LLVMBasicBlockRef BB);
+
+/**
+ * Obtain the last instruction in a basic block.
+ *
+ * The returned LLVMValueRef corresponds to a LLVM:Instruction.
+ */
LLVMValueRef LLVMGetLastInstruction(LLVMBasicBlockRef BB);
=20
-/* Operations on instructions */
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreValueInstruction Instructions
+ *
+ * Functions in this group relate to the inspection and manipulation of
+ * individual instructions.
+ *
+ * In the C++ API, an instruction is modeled by llvm::Instruction. This
+ * class has a large number of descendents. llvm::Instruction is a
+ * llvm::Value and in the C API, instructions are modeled by
+ * LLVMValueRef.
+ *
+ * This group also contains sub-groups which operate on specific
+ * llvm::Instruction types, e.g. llvm::CallInst.
+ *
+ * @{
+ */
+
+/**
+ * Determine whether an instruction has any metadata attached.
+ */
+int LLVMHasMetadata(LLVMValueRef Val);
+
+/**
+ * Return metadata associated with an instruction value.
+ */
+LLVMValueRef LLVMGetMetadata(LLVMValueRef Val, unsigned KindID);
+
+/**
+ * Set metadata associated with an instruction value.
+ */
+void LLVMSetMetadata(LLVMValueRef Val, unsigned KindID, LLVMValueRef Node);
+
+/**
+ * Obtain the basic block to which an instruction belongs.
+ *
+ * @see llvm::Instruction::getParent()
+ */
LLVMBasicBlockRef LLVMGetInstructionParent(LLVMValueRef Inst);
+
+/**
+ * Obtain the instruction that occurs after the one specified.
+ *
+ * The next instruction will be from the same basic block.
+ *
+ * If this is the last instruction in a basic block, NULL will be
+ * returned.
+ */
LLVMValueRef LLVMGetNextInstruction(LLVMValueRef Inst);
+
+/**
+ * Obtain the instruction that occured before this one.
+ *
+ * If the instruction is the first instruction in a basic block, NULL
+ * will be returned.
+ */
LLVMValueRef LLVMGetPreviousInstruction(LLVMValueRef Inst);
+
+/**
+ * Remove and delete an instruction.
+ *
+ * The instruction specified is removed from its containing building
+ * block and then deleted.
+ *
+ * @see llvm::Instruction::eraseFromParent()
+ */
void LLVMInstructionEraseFromParent(LLVMValueRef Inst);
+
+/**
+ * Obtain the code opcode for an individual instruction.
+ *
+ * @see llvm::Instruction::getOpCode()
+ */
LLVMOpcode LLVMGetInstructionOpcode(LLVMValueRef Inst);
+
+/**
+ * Obtain the predicate of an instruction.
+ *
+ * This is only valid for instructions that correspond to llvm::ICmpInst
+ * or llvm::ConstantExpr whose opcode is llvm::Instruction::ICmp.
+ *
+ * @see llvm::ICmpInst::getPredicate()
+ */
LLVMIntPredicate LLVMGetICmpPredicate(LLVMValueRef Inst);
=20
-/* Operations on call sites */
+/**
+ * @defgroup LLVMCCoreValueInstructionCall Call Sites and Invocations
+ *
+ * Functions in this group apply to instructions that refer to call
+ * sites and invocations. These correspond to C++ types in the
+ * llvm::CallInst class tree.
+ *
+ * @{
+ */
+
+/**
+ * Set the calling convention for a call instruction.
+ *
+ * This expects an LLVMValueRef that corresponds to a llvm::CallInst or
+ * llvm::InvokeInst.
+ *
+ * @see llvm::CallInst::setCallingConv()
+ * @see llvm::InvokeInst::setCallingConv()
+ */
void LLVMSetInstructionCallConv(LLVMValueRef Instr, unsigned CC);
+
+/**
+ * Obtain the calling convention for a call instruction.
+ *
+ * This is the opposite of LLVMSetInstructionCallConv(). Reads its
+ * usage.
+ *
+ * @see LLVMSetInstructionCallConv()
+ */
unsigned LLVMGetInstructionCallConv(LLVMValueRef Instr);
+
+
void LLVMAddInstrAttribute(LLVMValueRef Instr, unsigned index, LLVMAttribu=
te);
-void LLVMRemoveInstrAttribute(LLVMValueRef Instr, unsigned index,=20
+void LLVMRemoveInstrAttribute(LLVMValueRef Instr, unsigned index,
LLVMAttribute);
-void LLVMSetInstrParamAlignment(LLVMValueRef Instr, unsigned index,=20
+void LLVMSetInstrParamAlignment(LLVMValueRef Instr, unsigned index,
unsigned align);
=20
-/* Operations on call instructions (only) */
+/**
+ * Obtain whether a call instruction is a tail call.
+ *
+ * This only works on llvm::CallInst instructions.
+ *
+ * @see llvm::CallInst::isTailCall()
+ */
LLVMBool LLVMIsTailCall(LLVMValueRef CallInst);
+
+/**
+ * Set whether a call instruction is a tail call.
+ *
+ * This only works on llvm::CallInst instructions.
+ *
+ * @see llvm::CallInst::setTailCall()
+ */
void LLVMSetTailCall(LLVMValueRef CallInst, LLVMBool IsTailCall);
=20
-/* Operations on switch instructions (only) */
+/**
+ * @}
+ */
+
+/**
+ * Obtain the default destination basic block of a switch instruction.
+ *
+ * This only works on llvm::SwitchInst instructions.
+ *
+ * @see llvm::SwitchInst::getDefaultDest()
+ */
LLVMBasicBlockRef LLVMGetSwitchDefaultDest(LLVMValueRef SwitchInstr);
=20
-/* Operations on phi nodes */
+/**
+ * @defgroup LLVMCCoreValueInstructionPHINode PHI Nodes
+ *
+ * Functions in this group only apply to instructions that map to
+ * llvm::PHINode instances.
+ *
+ * @{
+ */
+
+/**
+ * Add an incoming value to the end of a PHI list.
+ */
void LLVMAddIncoming(LLVMValueRef PhiNode, LLVMValueRef *IncomingValues,
LLVMBasicBlockRef *IncomingBlocks, unsigned Count);
+
+/**
+ * Obtain the number of incoming basic blocks to a PHI node.
+ */
unsigned LLVMCountIncoming(LLVMValueRef PhiNode);
+
+/**
+ * Obtain an incoming value to a PHI node as a LLVMValueRef.
+ */
LLVMValueRef LLVMGetIncomingValue(LLVMValueRef PhiNode, unsigned Index);
+
+/**
+ * Obtain an incoming value to a PHI node as a LLVMBasicBlockRef.
+ */
LLVMBasicBlockRef LLVMGetIncomingBlock(LLVMValueRef PhiNode, unsigned Inde=
x);
=20
-/*=3D=3D=3D-- Instruction builders ---------------------------------------=
-------=3D=3D=3D*/
+/**
+ * @}
+ */
=20
-/* An instruction builder represents a point within a basic block, and is =
the
- * exclusive means of building instructions using the C interface.
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCoreInstructionBuilder Instruction Builders
+ *
+ * An instruction builder represents a point within a basic block and is
+ * the exclusive means of building instructions using the C interface.
+ *
+ * @{
*/
=20
LLVMBuilderRef LLVMCreateBuilderInContext(LLVMContextRef C);
@@ -964,6 +2398,8 @@
const char *Name);
LLVMValueRef LLVMBuildGlobalStringPtr(LLVMBuilderRef B, const char *Str,
const char *Name);
+LLVMBool LLVMGetVolatile(LLVMValueRef MemoryAccessInst);
+void LLVMSetVolatile(LLVMValueRef MemoryAccessInst, LLVMBool IsVolatile);
=20
/* Casts */
LLVMValueRef LLVMBuildTrunc(LLVMBuilderRef, LLVMValueRef Val,
@@ -1044,21 +2480,37 @@
LLVMValueRef LLVMBuildPtrDiff(LLVMBuilderRef, LLVMValueRef LHS,
LLVMValueRef RHS, const char *Name);
=20
+/**
+ * @}
+ */
=20
-/*=3D=3D=3D-- Module providers -------------------------------------------=
-------=3D=3D=3D*/
+/**
+ * @defgroup LLVMCCoreModuleProvider Module Providers
+ *
+ * @{
+ */
=20
-/* Changes the type of M so it can be passed to FunctionPassManagers and t=
he
+/**
+ * Changes the type of M so it can be passed to FunctionPassManagers and t=
he
* JIT. They take ModuleProviders for historical reasons.
*/
LLVMModuleProviderRef
LLVMCreateModuleProviderForExistingModule(LLVMModuleRef M);
=20
-/* Destroys the module M.
+/**
+ * Destroys the module M.
*/
void LLVMDisposeModuleProvider(LLVMModuleProviderRef M);
=20
+/**
+ * @}
+ */
=20
-/*=3D=3D=3D-- Memory buffers ---------------------------------------------=
-------=3D=3D=3D*/
+/**
+ * @defgroup LLVMCCoreMemoryBuffers Memory Buffers
+ *
+ * @{
+ */
=20
LLVMBool LLVMCreateMemoryBufferWithContentsOfFile(const char *Path,
LLVMMemoryBufferRef *Out=
MemBuf,
@@ -1067,23 +2519,39 @@
char **OutMessage);
void LLVMDisposeMemoryBuffer(LLVMMemoryBufferRef MemBuf);
=20
-/*=3D=3D=3D-- Pass Registry ----------------------------------------------=
-------=3D=3D=3D*/
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCorePassRegistry Pass Registry
+ *
+ * @{
+ */
=20
/** Return the global pass registry, for use with initialization functions.
- See llvm::PassRegistry::getPassRegistry. */
+ @see llvm::PassRegistry::getPassRegistry */
LLVMPassRegistryRef LLVMGetGlobalPassRegistry(void);
=20
-/*=3D=3D=3D-- Pass Managers ----------------------------------------------=
-------=3D=3D=3D*/
+/**
+ * @}
+ */
+
+/**
+ * @defgroup LLVMCCorePassManagers Pass Managers
+ *
+ * @{
+ */
=20
/** Constructs a new whole-module pass pipeline. This type of pipeline is
suitable for link-time optimization and whole-module transformations.
- See llvm::PassManager::PassManager. */
+ @see llvm::PassManager::PassManager */
LLVMPassManagerRef LLVMCreatePassManager(void);
=20
/** Constructs a new function-by-function pass pipeline over the module
provider. It does not take ownership of the module provider. This type=
of
pipeline is suitable for code generation and JIT compilation tasks.
- See llvm::FunctionPassManager::FunctionPassManager. */
+ @see llvm::FunctionPassManager::FunctionPassManager */
LLVMPassManagerRef LLVMCreateFunctionPassManagerForModule(LLVMModuleRef M);
=20
/** Deprecated: Use LLVMCreateFunctionPassManagerForModule instead. */
@@ -1091,30 +2559,42 @@
=20
/** Initializes, executes on the provided module, and finalizes all of the
passes scheduled in the pass manager. Returns 1 if any of the passes
- modified the module, 0 otherwise. See llvm::PassManager::run(Module&).=
*/
+ modified the module, 0 otherwise.
+ @see llvm::PassManager::run(Module&) */
LLVMBool LLVMRunPassManager(LLVMPassManagerRef PM, LLVMModuleRef M);
=20
/** Initializes all of the function passes scheduled in the function pass
manager. Returns 1 if any of the passes modified the module, 0 otherwi=
se.
- See llvm::FunctionPassManager::doInitialization. */
+ @see llvm::FunctionPassManager::doInitialization */
LLVMBool LLVMInitializeFunctionPassManager(LLVMPassManagerRef FPM);
=20
/** Executes all of the function passes scheduled in the function pass man=
ager
on the provided function. Returns 1 if any of the passes modified the
function, false otherwise.
- See llvm::FunctionPassManager::run(Function&). */
+ @see llvm::FunctionPassManager::run(Function&) */
LLVMBool LLVMRunFunctionPassManager(LLVMPassManagerRef FPM, LLVMValueRef F=
);
=20
/** Finalizes all of the function passes scheduled in in the function pass
manager. Returns 1 if any of the passes modified the module, 0 otherwi=
se.
- See llvm::FunctionPassManager::doFinalization. */
+ @see llvm::FunctionPassManager::doFinalization */
LLVMBool LLVMFinalizeFunctionPassManager(LLVMPassManagerRef FPM);
=20
/** Frees the memory of a pass pipeline. For function pipelines, does not =
free
the module provider.
- See llvm::PassManagerBase::~PassManagerBase. */
+ @see llvm::PassManagerBase::~PassManagerBase. */
void LLVMDisposePassManager(LLVMPassManagerRef PM);
=20
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
=20
#ifdef __cplusplus
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm-c/Disas=
sembler.h
--- a/head/contrib/llvm/include/llvm-c/Disassembler.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/include/llvm-c/Disassembler.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -19,6 +19,13 @@
#include <stddef.h>
=20
/**
+ * @defgroup LLVMCDisassembler Disassembler
+ * @ingroup LLVMC
+ *
+ * @{
+ */
+
+/**
* An opaque reference to a disassembler context.
*/
typedef void *LLVMDisasmContextRef;
@@ -157,6 +164,10 @@
uint64_t BytesSize, uint64_t PC,
char *OutString, size_t OutStringSize);
=20
+/**
+ * @}
+ */
+
#ifdef __cplusplus
}
#endif /* !defined(__cplusplus) */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm-c/Enhan=
cedDisassembly.h
--- a/head/contrib/llvm/include/llvm-c/EnhancedDisassembly.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm-c/EnhancedDisassembly.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -25,6 +25,19 @@
extern "C" {
#endif
=20
+/**
+ * @defgroup LLVMCEnhancedDisassembly Enhanced Disassembly
+ * @ingroup LLVMC
+ * @deprecated
+ *
+ * This module contains an interface to the Enhanced Disassembly (edis)
+ * library. The edis library is deprecated and will likely disappear in
+ * the near future. You should use the @ref LLVMCDisassembler interface
+ * instead.
+ *
+ * @{
+ */
+
/*!
@typedef EDByteReaderCallback
Interface to memory from which instructions may be read.
@@ -504,6 +517,10 @@
int EDBlockVisitTokens(EDInstRef inst,
EDTokenVisitor_t visitor);
=20
+/**
+ * @}
+ */
+
#endif
=20
#ifdef __cplusplus
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm-c/Execu=
tionEngine.h
--- a/head/contrib/llvm/include/llvm-c/ExecutionEngine.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/include/llvm-c/ExecutionEngine.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -26,6 +26,13 @@
extern "C" {
#endif
=20
+/**
+ * @defgroup LLVMCExecutionEngine Execution Engine
+ * @ingroup LLVMC
+ *
+ * @{
+ */
+
void LLVMLinkInJIT(void);
void LLVMLinkInInterpreter(void);
=20
@@ -125,6 +132,10 @@
=20
void *LLVMGetPointerToGlobal(LLVMExecutionEngineRef EE, LLVMValueRef Globa=
l);
=20
+/**
+ * @}
+ */
+
#ifdef __cplusplus
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm-c/Initi=
alization.h
--- a/head/contrib/llvm/include/llvm-c/Initialization.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm-c/Initialization.h Tue Apr 17 11:51:51=
2012 +0300
@@ -22,9 +22,19 @@
extern "C" {
#endif
=20
+/**
+ * @defgroup LLVMCInitialization Initialization Routines
+ * @ingroup LLVMC
+ *
+ * This module contains routines used to initialize the LLVM system.
+ *
+ * @{
+ */
+
void LLVMInitializeCore(LLVMPassRegistryRef R);
void LLVMInitializeTransformUtils(LLVMPassRegistryRef R);
void LLVMInitializeScalarOpts(LLVMPassRegistryRef R);
+void LLVMInitializeVectorization(LLVMPassRegistryRef R);
void LLVMInitializeInstCombine(LLVMPassRegistryRef R);
void LLVMInitializeIPO(LLVMPassRegistryRef R);
void LLVMInitializeInstrumentation(LLVMPassRegistryRef R);
@@ -33,6 +43,10 @@
void LLVMInitializeCodeGen(LLVMPassRegistryRef R);
void LLVMInitializeTarget(LLVMPassRegistryRef R);
=20
+/**
+ * @}
+ */
+
#ifdef __cplusplus
}
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm-c/LinkT=
imeOptimizer.h
--- a/head/contrib/llvm/include/llvm-c/LinkTimeOptimizer.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm-c/LinkTimeOptimizer.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -20,6 +20,13 @@
extern "C" {
#endif
=20
+/**
+ * @defgroup LLVMCLinkTimeOptimizer Link Time Optimization
+ * @ingroup LLVMC
+ *
+ * @{
+ */
+
/// This provides a dummy type for pointers to the LTO object.
typedef void* llvm_lto_t;
=20
@@ -51,6 +58,10 @@
extern llvm_lto_status_t llvm_optimize_modules
(llvm_lto_t lto, const char* output_filename);
=20
+/**
+ * @}
+ */
+
#ifdef __cplusplus
}
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm-c/Objec=
t.h
--- a/head/contrib/llvm/include/llvm-c/Object.h Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/llvm/include/llvm-c/Object.h Tue Apr 17 11:51:51 2012 +0=
300
@@ -28,23 +28,74 @@
extern "C" {
#endif
=20
+/**
+ * @defgroup LLVMCObject Object file reading and writing
+ * @ingroup LLVMC
+ *
+ * @{
+ */
=20
+// Opaque type wrappers
typedef struct LLVMOpaqueObjectFile *LLVMObjectFileRef;
+typedef struct LLVMOpaqueSectionIterator *LLVMSectionIteratorRef;
+typedef struct LLVMOpaqueSymbolIterator *LLVMSymbolIteratorRef;
+typedef struct LLVMOpaqueRelocationIterator *LLVMRelocationIteratorRef;
=20
-typedef struct LLVMOpaqueSectionIterator *LLVMSectionIteratorRef;
-
+// ObjectFile creation
LLVMObjectFileRef LLVMCreateObjectFile(LLVMMemoryBufferRef MemBuf);
void LLVMDisposeObjectFile(LLVMObjectFileRef ObjectFile);
=20
+// ObjectFile Section iterators
LLVMSectionIteratorRef LLVMGetSections(LLVMObjectFileRef ObjectFile);
void LLVMDisposeSectionIterator(LLVMSectionIteratorRef SI);
LLVMBool LLVMIsSectionIteratorAtEnd(LLVMObjectFileRef ObjectFile,
LLVMSectionIteratorRef SI);
void LLVMMoveToNextSection(LLVMSectionIteratorRef SI);
+void LLVMMoveToContainingSection(LLVMSectionIteratorRef Sect,
+ LLVMSymbolIteratorRef Sym);
+
+// ObjectFile Symbol iterators
+LLVMSymbolIteratorRef LLVMGetSymbols(LLVMObjectFileRef ObjectFile);
+void LLVMDisposeSymbolIterator(LLVMSymbolIteratorRef SI);
+LLVMBool LLVMIsSymbolIteratorAtEnd(LLVMObjectFileRef ObjectFile,
+ LLVMSymbolIteratorRef SI);
+void LLVMMoveToNextSymbol(LLVMSymbolIteratorRef SI);
+
+// SectionRef accessors
const char *LLVMGetSectionName(LLVMSectionIteratorRef SI);
uint64_t LLVMGetSectionSize(LLVMSectionIteratorRef SI);
const char *LLVMGetSectionContents(LLVMSectionIteratorRef SI);
+uint64_t LLVMGetSectionAddress(LLVMSectionIteratorRef SI);
+LLVMBool LLVMGetSectionContainsSymbol(LLVMSectionIteratorRef SI,
+ LLVMSymbolIteratorRef Sym);
=20
+// Section Relocation iterators
+LLVMRelocationIteratorRef LLVMGetRelocations(LLVMSectionIteratorRef Sectio=
n);
+void LLVMDisposeRelocationIterator(LLVMRelocationIteratorRef RI);
+LLVMBool LLVMIsRelocationIteratorAtEnd(LLVMSectionIteratorRef Section,
+ LLVMRelocationIteratorRef RI);
+void LLVMMoveToNextRelocation(LLVMRelocationIteratorRef RI);
+
+
+// SymbolRef accessors
+const char *LLVMGetSymbolName(LLVMSymbolIteratorRef SI);
+uint64_t LLVMGetSymbolAddress(LLVMSymbolIteratorRef SI);
+uint64_t LLVMGetSymbolFileOffset(LLVMSymbolIteratorRef SI);
+uint64_t LLVMGetSymbolSize(LLVMSymbolIteratorRef SI);
+
+// RelocationRef accessors
+uint64_t LLVMGetRelocationAddress(LLVMRelocationIteratorRef RI);
+uint64_t LLVMGetRelocationOffset(LLVMRelocationIteratorRef RI);
+LLVMSymbolIteratorRef LLVMGetRelocationSymbol(LLVMRelocationIteratorRef RI=
);
+uint64_t LLVMGetRelocationType(LLVMRelocationIteratorRef RI);
+// NOTE: Caller takes ownership of returned string of the two
+// following functions.
+const char *LLVMGetRelocationTypeName(LLVMRelocationIteratorRef RI);
+const char *LLVMGetRelocationValueString(LLVMRelocationIteratorRef RI);
+
+/**
+ * @}
+ */
=20
#ifdef __cplusplus
}
@@ -68,6 +119,27 @@
return reinterpret_cast<LLVMSectionIteratorRef>
(const_cast<section_iterator*>(SI));
}
+
+ inline symbol_iterator *unwrap(LLVMSymbolIteratorRef SI) {
+ return reinterpret_cast<symbol_iterator*>(SI);
+ }
+
+ inline LLVMSymbolIteratorRef
+ wrap(const symbol_iterator *SI) {
+ return reinterpret_cast<LLVMSymbolIteratorRef>
+ (const_cast<symbol_iterator*>(SI));
+ }
+
+ inline relocation_iterator *unwrap(LLVMRelocationIteratorRef SI) {
+ return reinterpret_cast<relocation_iterator*>(SI);
+ }
+
+ inline LLVMRelocationIteratorRef
+ wrap(const relocation_iterator *SI) {
+ return reinterpret_cast<LLVMRelocationIteratorRef>
+ (const_cast<relocation_iterator*>(SI));
+ }
+
}
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm-c/Targe=
t.h
--- a/head/contrib/llvm/include/llvm-c/Target.h Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/llvm/include/llvm-c/Target.h Tue Apr 17 11:51:51 2012 +0=
300
@@ -26,6 +26,13 @@
extern "C" {
#endif
=20
+/**
+ * @defgroup LLVMCTarget Target information
+ * @ingroup LLVMC
+ *
+ * @{
+ */
+
enum LLVMByteOrdering { LLVMBigEndian, LLVMLittleEndian };
=20
typedef struct LLVMOpaqueTargetData *LLVMTargetDataRef;
@@ -47,6 +54,24 @@
#include "llvm/Config/Targets.def"
#undef LLVM_TARGET /* Explicit undef to make SWIG happier */
=20
+/* Declare all of the available assembly printer initialization functions.=
*/
+#define LLVM_ASM_PRINTER(TargetName) \
+ void LLVMInitialize##TargetName##AsmPrinter();
+#include "llvm/Config/AsmPrinters.def"
+#undef LLVM_ASM_PRINTER /* Explicit undef to make SWIG happier */
+
+/* Declare all of the available assembly parser initialization functions. =
*/
+#define LLVM_ASM_PARSER(TargetName) \
+ void LLVMInitialize##TargetName##AsmParser();
+#include "llvm/Config/AsmParsers.def"
+#undef LLVM_ASM_PARSER /* Explicit undef to make SWIG happier */
+
+/* Declare all of the available disassembler initialization functions. */
+#define LLVM_DISASSEMBLER(TargetName) \
+ void LLVMInitialize##TargetName##Disassembler();
+#include "llvm/Config/Disassemblers.def"
+#undef LLVM_DISASSEMBLER /* Explicit undef to make SWIG happier */
+ =20
/** LLVMInitializeAllTargetInfos - The main program should call this funct=
ion if
it wants access to all available targets that LLVM is configured to
support. */
@@ -64,6 +89,43 @@
#include "llvm/Config/Targets.def"
#undef LLVM_TARGET /* Explicit undef to make SWIG happier */
}
+
+/** LLVMInitializeAllTargetMCs - The main program should call this functio=
n if
+ it wants access to all available target MC that LLVM is configured to
+ support. */
+static inline void LLVMInitializeAllTargetMCs(void) {
+#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC();
+#include "llvm/Config/Targets.def"
+#undef LLVM_TARGET /* Explicit undef to make SWIG happier */
+}
+ =20
+/** LLVMInitializeAllAsmPrinters - The main program should call this funct=
ion if
+ it wants all asm printers that LLVM is configured to support, to make =
them
+ available via the TargetRegistry. */
+static inline void LLVMInitializeAllAsmPrinters() {
+#define LLVM_ASM_PRINTER(TargetName) LLVMInitialize##TargetName##AsmPrinte=
r();
+#include "llvm/Config/AsmPrinters.def"
+#undef LLVM_ASM_PRINTER /* Explicit undef to make SWIG happier */
+}
+ =20
+/** LLVMInitializeAllAsmParsers - The main program should call this functi=
on if
+ it wants all asm parsers that LLVM is configured to support, to make t=
hem
+ available via the TargetRegistry. */
+static inline void LLVMInitializeAllAsmParsers() {
+#define LLVM_ASM_PARSER(TargetName) LLVMInitialize##TargetName##AsmParser(=
);
+#include "llvm/Config/AsmParsers.def"
+#undef LLVM_ASM_PARSER /* Explicit undef to make SWIG happier */
+}
+ =20
+/** LLVMInitializeAllDisassemblers - The main program should call this fun=
ction
+ if it wants all disassemblers that LLVM is configured to support, to m=
ake
+ them available via the TargetRegistry. */
+static inline void LLVMInitializeAllDisassemblers() {
+#define LLVM_DISASSEMBLER(TargetName) \
+ LLVMInitialize##TargetName##Disassembler();
+#include "llvm/Config/Disassemblers.def"
+#undef LLVM_DISASSEMBLER /* Explicit undef to make SWIG happier */
+}
=20
/** LLVMInitializeNativeTarget - The main program should call this functio=
n to
initialize the native target corresponding to the host. This is usefu=
l=20
@@ -157,6 +219,9 @@
See the destructor llvm::TargetData::~TargetData. */
void LLVMDisposeTargetData(LLVMTargetDataRef);
=20
+/**
+ * @}
+ */
=20
#ifdef __cplusplus
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm-c/Trans=
forms/IPO.h
--- a/head/contrib/llvm/include/llvm-c/Transforms/IPO.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm-c/Transforms/IPO.h Tue Apr 17 11:51:51=
2012 +0300
@@ -21,6 +21,13 @@
extern "C" {
#endif
=20
+/**
+ * @defgroup LLVMCTransformsIPO Interprocedural transformations
+ * @ingroup LLVMCTransforms
+ *
+ * @{
+ */
+
/** See llvm::createArgumentPromotionPass function. */
void LLVMAddArgumentPromotionPass(LLVMPassManagerRef PM);
=20
@@ -63,6 +70,10 @@
/** See llvm::createStripSymbolsPass function. */
void LLVMAddStripSymbolsPass(LLVMPassManagerRef PM);
=20
+/**
+ * @}
+ */
+
#ifdef __cplusplus
}
#endif /* defined(__cplusplus) */
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm-c/Trans=
forms/PassManagerBuilder.h
--- a/head/contrib/llvm/include/llvm-c/Transforms/PassManagerBuilder.h Tue =
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm-c/Transforms/PassManagerBuilder.h Tue =
Apr 17 11:51:51 2012 +0300
@@ -23,6 +23,13 @@
extern "C" {
#endif
=20
+/**
+ * @defgroup LLVMCTransformsPassManagerBuilder Pass manager builder
+ * @ingroup LLVMCTransforms
+ *
+ * @{
+ */
+
/** See llvm::PassManagerBuilder. */
LLVMPassManagerBuilderRef LLVMPassManagerBuilderCreate(void);
void LLVMPassManagerBuilderDispose(LLVMPassManagerBuilderRef PMB);
@@ -73,6 +80,10 @@
bool Internalize,
bool RunInliner);
=20
+/**
+ * @}
+ */
+
#ifdef __cplusplus
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm-c/Trans=
forms/Scalar.h
--- a/head/contrib/llvm/include/llvm-c/Transforms/Scalar.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm-c/Transforms/Scalar.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -25,6 +25,13 @@
extern "C" {
#endif
=20
+/**
+ * @defgroup LLVMCTransformsScalar Scalar transformations
+ * @ingroup LLVMCTransforms
+ *
+ * @{
+ */
+
/** See llvm::createAggressiveDCEPass function. */
void LLVMAddAggressiveDCEPass(LLVMPassManagerRef PM);
=20
@@ -116,6 +123,9 @@
/** See llvm::createBasicAliasAnalysisPass function */
void LLVMAddBasicAliasAnalysisPass(LLVMPassManagerRef PM);
=20
+/**
+ * @}
+ */
=20
#ifdef __cplusplus
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm-c/lto.h
--- a/head/contrib/llvm/include/llvm-c/lto.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm-c/lto.h Tue Apr 17 11:51:51 2012 +0300
@@ -20,24 +20,31 @@
#include <stddef.h>
#include <unistd.h>
=20
+/**
+ * @defgroup LLVMCLTO LTO
+ * @ingroup LLVMC
+ *
+ * @{
+ */
+
#define LTO_API_VERSION 4
=20
typedef enum {
LTO_SYMBOL_ALIGNMENT_MASK =3D 0x0000001F, /* log2 of alig=
nment */
- LTO_SYMBOL_PERMISSIONS_MASK =3D 0x000000E0, =20
- LTO_SYMBOL_PERMISSIONS_CODE =3D 0x000000A0, =20
- LTO_SYMBOL_PERMISSIONS_DATA =3D 0x000000C0, =20
- LTO_SYMBOL_PERMISSIONS_RODATA =3D 0x00000080, =20
- LTO_SYMBOL_DEFINITION_MASK =3D 0x00000700, =20
- LTO_SYMBOL_DEFINITION_REGULAR =3D 0x00000100, =20
- LTO_SYMBOL_DEFINITION_TENTATIVE =3D 0x00000200, =20
- LTO_SYMBOL_DEFINITION_WEAK =3D 0x00000300, =20
- LTO_SYMBOL_DEFINITION_UNDEFINED =3D 0x00000400, =20
+ LTO_SYMBOL_PERMISSIONS_MASK =3D 0x000000E0,
+ LTO_SYMBOL_PERMISSIONS_CODE =3D 0x000000A0,
+ LTO_SYMBOL_PERMISSIONS_DATA =3D 0x000000C0,
+ LTO_SYMBOL_PERMISSIONS_RODATA =3D 0x00000080,
+ LTO_SYMBOL_DEFINITION_MASK =3D 0x00000700,
+ LTO_SYMBOL_DEFINITION_REGULAR =3D 0x00000100,
+ LTO_SYMBOL_DEFINITION_TENTATIVE =3D 0x00000200,
+ LTO_SYMBOL_DEFINITION_WEAK =3D 0x00000300,
+ LTO_SYMBOL_DEFINITION_UNDEFINED =3D 0x00000400,
LTO_SYMBOL_DEFINITION_WEAKUNDEF =3D 0x00000500,
- LTO_SYMBOL_SCOPE_MASK =3D 0x00003800, =20
- LTO_SYMBOL_SCOPE_INTERNAL =3D 0x00000800, =20
- LTO_SYMBOL_SCOPE_HIDDEN =3D 0x00001000, =20
- LTO_SYMBOL_SCOPE_PROTECTED =3D 0x00002000, =20
+ LTO_SYMBOL_SCOPE_MASK =3D 0x00003800,
+ LTO_SYMBOL_SCOPE_INTERNAL =3D 0x00000800,
+ LTO_SYMBOL_SCOPE_HIDDEN =3D 0x00001000,
+ LTO_SYMBOL_SCOPE_PROTECTED =3D 0x00002000,
LTO_SYMBOL_SCOPE_DEFAULT =3D 0x00001800,
LTO_SYMBOL_SCOPE_DEFAULT_CAN_BE_HIDDEN =3D 0x00002800
} lto_symbol_attributes;
@@ -88,7 +95,7 @@
* Checks if a file is a loadable object compiled for requested target.
*/
extern bool
-lto_module_is_object_file_for_target(const char* path,=20
+lto_module_is_object_file_for_target(const char* path,
const char* target_triple_prefix);
=20
=20
@@ -103,7 +110,7 @@
* Checks if a buffer is a loadable object compiled for requested target.
*/
extern bool
-lto_module_is_object_file_in_memory_for_target(const void* mem, size_t len=
gth,=20
+lto_module_is_object_file_in_memory_for_target(const void* mem, size_t len=
gth,
const char* target_triple_pr=
efix);
=20
=20
@@ -244,6 +251,12 @@
int nargs);
=20
/**
+ * Enables the internalize pass during LTO optimizations.
+ */
+extern void
+lto_codegen_set_whole_program_optimization(lto_code_gen_t cg);
+
+/**
* Adds to a list of all global symbols that must exist in the final
* generated code. If a function is not listed, it might be
* inlined into every usage and optimized away.
@@ -251,7 +264,6 @@
extern void
lto_codegen_add_must_preserve_symbol(lto_code_gen_t cg, const char* symbol=
);
=20
-
/**
* Writes a new object file at the specified path that contains the
* merged contents of all modules added so far.
@@ -260,11 +272,10 @@
extern bool
lto_codegen_write_merged_modules(lto_code_gen_t cg, const char* path);
=20
-
/**
* Generates code for all added modules into one native object file.
* On success returns a pointer to a generated mach-o/ELF buffer and
- * length set to the buffer size. The buffer is owned by the=20
+ * length set to the buffer size. The buffer is owned by the
* lto_code_gen_t and will be freed when lto_codegen_dispose()
* is called, or lto_codegen_compile() is called again.
* On failure, returns NULL (check lto_get_error_message() for details).
@@ -285,9 +296,13 @@
*/
extern void
lto_codegen_debug_options(lto_code_gen_t cg, const char *);
+
#ifdef __cplusplus
}
#endif
=20
+/**
+ * @}
+ */
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/APF=
loat.h
--- a/head/contrib/llvm/include/llvm/ADT/APFloat.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/include/llvm/ADT/APFloat.h Tue Apr 17 11:51:51 2012=
+0300
@@ -320,6 +320,7 @@
const fltSemantics &getSemantics() const { return *semantics; }
bool isZero() const { return category =3D=3D fcZero; }
bool isNonZero() const { return category !=3D fcZero; }
+ bool isNormal() const { return category =3D=3D fcNormal; }
bool isNaN() const { return category =3D=3D fcNaN; }
bool isInfinity() const { return category =3D=3D fcInfinity; }
bool isNegative() const { return sign; }
@@ -328,8 +329,16 @@
=20
APFloat& operator=3D(const APFloat &);
=20
- /* Return an arbitrary integer value usable for hashing. */
- uint32_t getHashValue() const;
+ /// \brief Overload to compute a hash code for an APFloat value.
+ ///
+ /// Note that the use of hash codes for floating point values is in ge=
neral
+ /// frought with peril. Equality is hard to define for these values. F=
or
+ /// example, should negative and positive zero hash to different codes=
? Are
+ /// they equal or not? This hash value implementation specifically
+ /// emphasizes producing different codes for different inputs in order=
to
+ /// be used in canonicalization and memoization. As such, equality is
+ /// bitwiseIsEqual, and 0 !=3D -0.
+ friend hash_code hash_value(const APFloat &Arg);
=20
/// Converts this value into a decimal string.
///
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/API=
nt.h
--- a/head/contrib/llvm/include/llvm/ADT/APInt.h Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/llvm/include/llvm/ADT/APInt.h Tue Apr 17 11:51:51 2012 +=
0300
@@ -23,11 +23,12 @@
#include <string>
=20
namespace llvm {
- class Serializer;
class Deserializer;
class FoldingSetNodeID;
+ class Serializer;
+ class StringRef;
+ class hash_code;
class raw_ostream;
- class StringRef;
=20
template<typename T>
class SmallVectorImpl;
@@ -497,15 +498,13 @@
if (loBitsSet =3D=3D APINT_BITS_PER_WORD)
return APInt(numBits, -1ULL);
// For small values, return quickly.
- if (numBits < APINT_BITS_PER_WORD)
- return APInt(numBits, (1ULL << loBitsSet) - 1);
+ if (loBitsSet <=3D APINT_BITS_PER_WORD)
+ return APInt(numBits, -1ULL >> (APINT_BITS_PER_WORD - loBitsSet));
return getAllOnesValue(numBits).lshr(numBits - loBitsSet);
}
=20
- /// The hash value is computed as the sum of the words and the bit width.
- /// @returns A hash value computed from the sum of the APInt words.
- /// @brief Get a hash value based on this APInt
- uint64_t getHashValue() const;
+ /// \brief Overload to compute a hash_code for an APInt value.
+ friend hash_code hash_value(const APInt &Arg);
=20
/// This function returns a pointer to the internal storage of the APInt.
/// This is useful for writing out the APInt in binary form without any
@@ -562,7 +561,15 @@
/// Performs logical negation operation on this APInt.
/// @returns true if *this is zero, false otherwise.
/// @brief Logical negation operator.
- bool operator!() const;
+ bool operator!() const {
+ if (isSingleWord())
+ return !VAL;
+
+ for (unsigned i =3D 0; i !=3D getNumWords(); ++i)
+ if (pVal[i])
+ return false;
+ return true;
+ }
=20
/// @}
/// @name Assignment Operators
@@ -835,7 +842,11 @@
=20
/// @returns the bit value at bitPosition
/// @brief Array-indexing support.
- bool operator[](unsigned bitPosition) const;
+ bool operator[](unsigned bitPosition) const {
+ assert(bitPosition < getBitWidth() && "Bit position out of bounds!");
+ return (maskBit(bitPosition) &
+ (isSingleWord() ? VAL : pVal[whichWord(bitPosition)])) !=3D 0;
+ }
=20
/// @}
/// @name Comparison Operators
@@ -1056,6 +1067,16 @@
/// @brief Zero extend or truncate to width
APInt zextOrTrunc(unsigned width) const;
=20
+ /// Make this APInt have the bit width given by \p width. The value is s=
ign
+ /// extended, or left alone to make it that width.
+ /// @brief Sign extend or truncate to width
+ APInt sextOrSelf(unsigned width) const;
+
+ /// Make this APInt have the bit width given by \p width. The value is z=
ero
+ /// extended, or left alone to make it that width.
+ /// @brief Zero extend or truncate to width
+ APInt zextOrSelf(unsigned width) const;
+
/// @}
/// @name Bit Manipulation Operators
/// @{
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Arr=
ayRef.h
--- a/head/contrib/llvm/include/llvm/ADT/ArrayRef.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/ArrayRef.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -14,8 +14,7 @@
#include <vector>
=20
namespace llvm {
- class APInt;
- =20
+
/// ArrayRef - Represent a constant reference to an array (0 or more ele=
ments
/// consecutively in memory), i.e. a start pointer and a length. It all=
ows
/// various APIs to take consecutive elements easily and conveniently.
@@ -33,33 +32,33 @@
typedef const T *iterator;
typedef const T *const_iterator;
typedef size_t size_type;
- =20
+
private:
/// The start of the array, in an external buffer.
const T *Data;
- =20
+
/// The number of elements.
size_type Length;
- =20
+
public:
/// @name Constructors
/// @{
- =20
+
/// Construct an empty ArrayRef.
/*implicit*/ ArrayRef() : Data(0), Length(0) {}
- =20
+
/// Construct an ArrayRef from a single element.
/*implicit*/ ArrayRef(const T &OneElt)
: Data(&OneElt), Length(1) {}
- =20
+
/// Construct an ArrayRef from a pointer and length.
/*implicit*/ ArrayRef(const T *data, size_t length)
: Data(data), Length(length) {}
- =20
+
/// Construct an ArrayRef from a range.
ArrayRef(const T *begin, const T *end)
: Data(begin), Length(end - begin) {}
- =20
+
/// Construct an ArrayRef from a SmallVector.
/*implicit*/ ArrayRef(const SmallVectorImpl<T> &Vec)
: Data(Vec.data()), Length(Vec.size()) {}
@@ -67,39 +66,39 @@
/// Construct an ArrayRef from a std::vector.
/*implicit*/ ArrayRef(const std::vector<T> &Vec)
: Data(Vec.empty() ? (T*)0 : &Vec[0]), Length(Vec.size()) {}
- =20
+
/// Construct an ArrayRef from a C array.
template <size_t N>
/*implicit*/ ArrayRef(const T (&Arr)[N])
: Data(Arr), Length(N) {}
- =20
+
/// @}
/// @name Simple Operations
/// @{
=20
iterator begin() const { return Data; }
iterator end() const { return Data + Length; }
- =20
+
/// empty - Check if the array is empty.
bool empty() const { return Length =3D=3D 0; }
- =20
+
const T *data() const { return Data; }
- =20
+
/// size - Get the array size.
size_t size() const { return Length; }
- =20
+
/// front - Get the first element.
const T &front() const {
assert(!empty());
return Data[0];
}
- =20
+
/// back - Get the last element.
const T &back() const {
assert(!empty());
return Data[Length-1];
}
- =20
+
/// equals - Check for element-wise equality.
bool equals(ArrayRef RHS) const {
if (Length !=3D RHS.Length)
@@ -111,18 +110,18 @@
}
=20
/// slice(n) - Chop off the first N elements of the array.
- ArrayRef<T> slice(unsigned N) {
+ ArrayRef<T> slice(unsigned N) const {
assert(N <=3D size() && "Invalid specifier");
return ArrayRef<T>(data()+N, size()-N);
}
=20
/// slice(n, m) - Chop off the first N elements of the array, and keep=
M
/// elements in the array.
- ArrayRef<T> slice(unsigned N, unsigned M) {
+ ArrayRef<T> slice(unsigned N, unsigned M) const {
assert(N+M <=3D size() && "Invalid specifier");
return ArrayRef<T>(data()+N, M);
}
- =20
+
/// @}
/// @name Operator Overloads
/// @{
@@ -130,22 +129,104 @@
assert(Index < Length && "Invalid index!");
return Data[Index];
}
- =20
+
/// @}
/// @name Expensive Operations
/// @{
std::vector<T> vec() const {
return std::vector<T>(Data, Data+Length);
}
- =20
+
/// @}
/// @name Conversion operators
/// @{
operator std::vector<T>() const {
return std::vector<T>(Data, Data+Length);
}
+
+ /// @}
+ };
+
+ /// MutableArrayRef - Represent a mutable reference to an array (0 or mo=
re
+ /// elements consecutively in memory), i.e. a start pointer and a length=
. It
+ /// allows various APIs to take and modify consecutive elements easily a=
nd
+ /// conveniently.
+ ///
+ /// This class does not own the underlying data, it is expected to be us=
ed in
+ /// situations where the data resides in some other buffer, whose lifeti=
me
+ /// extends past that of the MutableArrayRef. For this reason, it is not=
in
+ /// general safe to store a MutableArrayRef.
+ ///
+ /// This is intended to be trivially copyable, so it should be passed by
+ /// value.
+ template<typename T>
+ class MutableArrayRef : public ArrayRef<T> {
+ public:
+ typedef T *iterator;
+
+ /// Construct an empty ArrayRef.
+ /*implicit*/ MutableArrayRef() : ArrayRef<T>() {}
+ =20
+ /// Construct an MutableArrayRef from a single element.
+ /*implicit*/ MutableArrayRef(T &OneElt) : ArrayRef<T>(OneElt) {}
+ =20
+ /// Construct an MutableArrayRef from a pointer and length.
+ /*implicit*/ MutableArrayRef(T *data, size_t length)
+ : ArrayRef<T>(data, length) {}
+ =20
+ /// Construct an MutableArrayRef from a range.
+ MutableArrayRef(T *begin, T *end) : ArrayRef<T>(begin, end) {}
+ =20
+ /// Construct an MutableArrayRef from a SmallVector.
+ /*implicit*/ MutableArrayRef(SmallVectorImpl<T> &Vec)
+ : ArrayRef<T>(Vec) {}
+ =20
+ /// Construct a MutableArrayRef from a std::vector.
+ /*implicit*/ MutableArrayRef(std::vector<T> &Vec)
+ : ArrayRef<T>(Vec) {}
+ =20
+ /// Construct an MutableArrayRef from a C array.
+ template <size_t N>
+ /*implicit*/ MutableArrayRef(T (&Arr)[N])
+ : ArrayRef<T>(Arr) {}
+ =20
+ T *data() const { return const_cast<T*>(ArrayRef<T>::data()); }
+
+ iterator begin() const { return data(); }
+ iterator end() const { return data() + this->size(); }
+ =20
+ /// front - Get the first element.
+ T &front() const {
+ assert(!this->empty());
+ return data()[0];
+ }
+ =20
+ /// back - Get the last element.
+ T &back() const {
+ assert(!this->empty());
+ return data()[this->size()-1];
+ }
+
+ /// slice(n) - Chop off the first N elements of the array.
+ MutableArrayRef<T> slice(unsigned N) const {
+ assert(N <=3D this->size() && "Invalid specifier");
+ return MutableArrayRef<T>(data()+N, this->size()-N);
+ }
+ =20
+ /// slice(n, m) - Chop off the first N elements of the array, and keep=
M
+ /// elements in the array.
+ MutableArrayRef<T> slice(unsigned N, unsigned M) const {
+ assert(N+M <=3D this->size() && "Invalid specifier");
+ return MutableArrayRef<T>(data()+N, M);
+ }
=20
/// @}
+ /// @name Operator Overloads
+ /// @{
+ T &operator[](size_t Index) const {
+ assert(Index < this->size() && "Invalid index!");
+ return data()[Index];
+ }
};
=20
/// @name ArrayRef Convenience constructors
@@ -215,5 +296,5 @@
static const bool value =3D true;
};
}
-
+ =20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Bit=
Vector.h
--- a/head/contrib/llvm/include/llvm/ADT/BitVector.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/BitVector.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -14,12 +14,12 @@
#ifndef LLVM_ADT_BITVECTOR_H
#define LLVM_ADT_BITVECTOR_H
=20
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include <algorithm>
#include <cassert>
#include <climits>
#include <cstdlib>
-#include <cstring>
=20
namespace llvm {
=20
@@ -116,7 +116,7 @@
else if (sizeof(BitWord) =3D=3D 8)
NumBits +=3D CountPopulation_64(Bits[i]);
else
- assert(0 && "Unsupported!");
+ llvm_unreachable("Unsupported!");
return NumBits;
}
=20
@@ -146,10 +146,9 @@
if (Bits[i] !=3D 0) {
if (sizeof(BitWord) =3D=3D 4)
return i * BITWORD_SIZE + CountTrailingZeros_32((uint32_t)Bits[i=
]);
- else if (sizeof(BitWord) =3D=3D 8)
+ if (sizeof(BitWord) =3D=3D 8)
return i * BITWORD_SIZE + CountTrailingZeros_64(Bits[i]);
- else
- assert(0 && "Unsupported!");
+ llvm_unreachable("Unsupported!");
}
return -1;
}
@@ -170,10 +169,9 @@
if (Copy !=3D 0) {
if (sizeof(BitWord) =3D=3D 4)
return WordPos * BITWORD_SIZE + CountTrailingZeros_32((uint32_t)Co=
py);
- else if (sizeof(BitWord) =3D=3D 8)
+ if (sizeof(BitWord) =3D=3D 8)
return WordPos * BITWORD_SIZE + CountTrailingZeros_64(Copy);
- else
- assert(0 && "Unsupported!");
+ llvm_unreachable("Unsupported!");
}
=20
// Check subsequent words.
@@ -181,10 +179,9 @@
if (Bits[i] !=3D 0) {
if (sizeof(BitWord) =3D=3D 4)
return i * BITWORD_SIZE + CountTrailingZeros_32((uint32_t)Bits[i=
]);
- else if (sizeof(BitWord) =3D=3D 8)
+ if (sizeof(BitWord) =3D=3D 8)
return i * BITWORD_SIZE + CountTrailingZeros_64(Bits[i]);
- else
- assert(0 && "Unsupported!");
+ llvm_unreachable("Unsupported!");
}
return -1;
}
@@ -318,6 +315,16 @@
return *this;
}
=20
+ // reset - Reset bits that are set in RHS. Same as *this &=3D ~RHS.
+ BitVector &reset(const BitVector &RHS) {
+ unsigned ThisWords =3D NumBitWords(size());
+ unsigned RHSWords =3D NumBitWords(RHS.size());
+ unsigned i;
+ for (i =3D 0; i !=3D std::min(ThisWords, RHSWords); ++i)
+ Bits[i] &=3D ~RHS.Bits[i];
+ return *this;
+ }
+
BitVector &operator|=3D(const BitVector &RHS) {
if (size() < RHS.size())
resize(RHS.size());
@@ -365,6 +372,42 @@
std::swap(Capacity, RHS.Capacity);
}
=20
+ //=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
+ // Portable bit mask operations.
+ //=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
+ //
+ // These methods all operate on arrays of uint32_t, each holding 32 bits=
. The
+ // fixed word size makes it easier to work with literal bit vector const=
ants
+ // in portable code.
+ //
+ // The LSB in each word is the lowest numbered bit. The size of a porta=
ble
+ // bit mask is always a whole multiple of 32 bits. If no bit mask size =
is
+ // given, the bit mask is assumed to cover the entire BitVector.
+
+ /// setBitsInMask - Add '1' bits from Mask to this vector. Don't resize.
+ /// This computes "*this |=3D Mask".
+ void setBitsInMask(const uint32_t *Mask, unsigned MaskWords =3D ~0u) {
+ applyMask<true, false>(Mask, MaskWords);
+ }
+
+ /// clearBitsInMask - Clear any bits in this vector that are set in Mask.
+ /// Don't resize. This computes "*this &=3D ~Mask".
+ void clearBitsInMask(const uint32_t *Mask, unsigned MaskWords =3D ~0u) {
+ applyMask<false, false>(Mask, MaskWords);
+ }
+
+ /// setBitsNotInMask - Add a bit to this vector for every '0' bit in Mas=
k.
+ /// Don't resize. This computes "*this |=3D ~Mask".
+ void setBitsNotInMask(const uint32_t *Mask, unsigned MaskWords =3D ~0u) {
+ applyMask<true, true>(Mask, MaskWords);
+ }
+
+ /// clearBitsNotInMask - Clear a bit in this vector for every '0' bit in=
Mask.
+ /// Don't resize. This computes "*this &=3D Mask".
+ void clearBitsNotInMask(const uint32_t *Mask, unsigned MaskWords =3D ~0u=
) {
+ applyMask<false, true>(Mask, MaskWords);
+ }
+
private:
unsigned NumBitWords(unsigned S) const {
return (S + BITWORD_SIZE-1) / BITWORD_SIZE;
@@ -400,6 +443,33 @@
void init_words(BitWord *B, unsigned NumWords, bool t) {
memset(B, 0 - (int)t, NumWords*sizeof(BitWord));
}
+
+ template<bool AddBits, bool InvertMask>
+ void applyMask(const uint32_t *Mask, unsigned MaskWords) {
+ assert(BITWORD_SIZE % 32 =3D=3D 0 && "Unsupported BitWord size.");
+ MaskWords =3D std::min(MaskWords, (size() + 31) / 32);
+ const unsigned Scale =3D BITWORD_SIZE / 32;
+ unsigned i;
+ for (i =3D 0; MaskWords >=3D Scale; ++i, MaskWords -=3D Scale) {
+ BitWord BW =3D Bits[i];
+ // This inner loop should unroll completely when BITWORD_SIZE > 32.
+ for (unsigned b =3D 0; b !=3D BITWORD_SIZE; b +=3D 32) {
+ uint32_t M =3D *Mask++;
+ if (InvertMask) M =3D ~M;
+ if (AddBits) BW |=3D BitWord(M) << b;
+ else BW &=3D ~(BitWord(M) << b);
+ }
+ Bits[i] =3D BW;
+ }
+ for (unsigned b =3D 0; MaskWords; b +=3D 32, --MaskWords) {
+ uint32_t M =3D *Mask++;
+ if (InvertMask) M =3D ~M;
+ if (AddBits) Bits[i] |=3D BitWord(M) << b;
+ else Bits[i] &=3D ~(BitWord(M) << b);
+ }
+ if (AddBits)
+ clear_unused_bits();
+ }
};
=20
inline BitVector operator&(const BitVector &LHS, const BitVector &RHS) {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/DAG=
DeltaAlgorithm.h
--- a/head/contrib/llvm/include/llvm/ADT/DAGDeltaAlgorithm.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/DAGDeltaAlgorithm.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -36,6 +36,7 @@
/// for more information on the properties which the predicate function it=
self
/// should satisfy.
class DAGDeltaAlgorithm {
+ virtual void anchor();
public:
typedef unsigned change_ty;
typedef std::pair<change_ty, change_ty> edge_ty;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Den=
seMap.h
--- a/head/contrib/llvm/include/llvm/ADT/DenseMap.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/DenseMap.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -30,12 +30,11 @@
=20
template<typename KeyT, typename ValueT,
typename KeyInfoT =3D DenseMapInfo<KeyT>,
- typename ValueInfoT =3D DenseMapInfo<ValueT>, bool IsConst =3D fa=
lse>
+ bool IsConst =3D false>
class DenseMapIterator;
=20
template<typename KeyT, typename ValueT,
- typename KeyInfoT =3D DenseMapInfo<KeyT>,
- typename ValueInfoT =3D DenseMapInfo<ValueT> >
+ typename KeyInfoT =3D DenseMapInfo<KeyT> >
class DenseMap {
typedef std::pair<KeyT, ValueT> BucketT;
unsigned NumBuckets;
@@ -80,19 +79,19 @@
=20
typedef DenseMapIterator<KeyT, ValueT, KeyInfoT> iterator;
typedef DenseMapIterator<KeyT, ValueT,
- KeyInfoT, ValueInfoT, true> const_iterator;
+ KeyInfoT, true> const_iterator;
inline iterator begin() {
// When the map is empty, avoid the overhead of AdvancePastEmptyBucket=
s().
return empty() ? end() : iterator(Buckets, Buckets+NumBuckets);
}
inline iterator end() {
- return iterator(Buckets+NumBuckets, Buckets+NumBuckets);
+ return iterator(Buckets+NumBuckets, Buckets+NumBuckets, true);
}
inline const_iterator begin() const {
return empty() ? end() : const_iterator(Buckets, Buckets+NumBuckets);
}
inline const_iterator end() const {
- return const_iterator(Buckets+NumBuckets, Buckets+NumBuckets);
+ return const_iterator(Buckets+NumBuckets, Buckets+NumBuckets, true);
}
=20
bool empty() const { return NumEntries =3D=3D 0; }
@@ -137,13 +136,33 @@
iterator find(const KeyT &Val) {
BucketT *TheBucket;
if (LookupBucketFor(Val, TheBucket))
- return iterator(TheBucket, Buckets+NumBuckets);
+ return iterator(TheBucket, Buckets+NumBuckets, true);
return end();
}
const_iterator find(const KeyT &Val) const {
BucketT *TheBucket;
if (LookupBucketFor(Val, TheBucket))
- return const_iterator(TheBucket, Buckets+NumBuckets);
+ return const_iterator(TheBucket, Buckets+NumBuckets, true);
+ return end();
+ }
+
+ /// Alternate version of find() which allows a different, and possibly
+ /// less expensive, key type.
+ /// The DenseMapInfo is responsible for supplying methods
+ /// getHashValue(LookupKeyT) and isEqual(LookupKeyT, KeyT) for each key
+ /// type used.
+ template<class LookupKeyT>
+ iterator find_as(const LookupKeyT &Val) {
+ BucketT *TheBucket;
+ if (LookupBucketFor(Val, TheBucket))
+ return iterator(TheBucket, Buckets+NumBuckets, true);
+ return end();
+ }
+ template<class LookupKeyT>
+ const_iterator find_as(const LookupKeyT &Val) const {
+ BucketT *TheBucket;
+ if (LookupBucketFor(Val, TheBucket))
+ return const_iterator(TheBucket, Buckets+NumBuckets, true);
return end();
}
=20
@@ -162,13 +181,12 @@
std::pair<iterator, bool> insert(const std::pair<KeyT, ValueT> &KV) {
BucketT *TheBucket;
if (LookupBucketFor(KV.first, TheBucket))
- return std::make_pair(iterator(TheBucket, Buckets+NumBuckets),
+ return std::make_pair(iterator(TheBucket, Buckets+NumBuckets, true),
false); // Already in map.
=20
// Otherwise, insert the new element.
TheBucket =3D InsertIntoBucket(KV.first, KV.second, TheBucket);
- return std::make_pair(iterator(TheBucket, Buckets+NumBuckets),
- true);
+ return std::make_pair(iterator(TheBucket, Buckets+NumBuckets, true), t=
rue);
}
=20
/// insert - Range insertion of pairs.
@@ -237,7 +255,7 @@
private:
void CopyFrom(const DenseMap& other) {
if (NumBuckets !=3D 0 &&
- (!isPodLike<KeyInfoT>::value || !isPodLike<ValueInfoT>::value)) {
+ (!isPodLike<KeyT>::value || !isPodLike<ValueT>::value)) {
const KeyT EmptyKey =3D getEmptyKey(), TombstoneKey =3D getTombstone=
Key();
for (BucketT *P =3D Buckets, *E =3D Buckets+NumBuckets; P !=3D E; ++=
P) {
if (!KeyInfoT::isEqual(P->first, EmptyKey) &&
@@ -266,7 +284,7 @@
=20
Buckets =3D static_cast<BucketT*>(operator new(sizeof(BucketT) * NumBu=
ckets));
=20
- if (isPodLike<KeyInfoT>::value && isPodLike<ValueInfoT>::value)
+ if (isPodLike<KeyT>::value && isPodLike<ValueT>::value)
memcpy(Buckets, other.Buckets, NumBuckets * sizeof(BucketT));
else
for (size_t i =3D 0; i < NumBuckets; ++i) {
@@ -310,6 +328,10 @@
static unsigned getHashValue(const KeyT &Val) {
return KeyInfoT::getHashValue(Val);
}
+ template<typename LookupKeyT>
+ static unsigned getHashValue(const LookupKeyT &Val) {
+ return KeyInfoT::getHashValue(Val);
+ }
static const KeyT getEmptyKey() {
return KeyInfoT::getEmptyKey();
}
@@ -321,7 +343,8 @@
/// FoundBucket. If the bucket contains the key and a value, this retur=
ns
/// true, otherwise it returns a bucket with an empty marker or tombston=
e and
/// returns false.
- bool LookupBucketFor(const KeyT &Val, BucketT *&FoundBucket) const {
+ template<typename LookupKeyT>
+ bool LookupBucketFor(const LookupKeyT &Val, BucketT *&FoundBucket) const=
{
unsigned BucketNo =3D getHashValue(Val);
unsigned ProbeAmt =3D 1;
BucketT *BucketsPtr =3D Buckets;
@@ -342,7 +365,7 @@
while (1) {
BucketT *ThisBucket =3D BucketsPtr + (BucketNo & (NumBuckets-1));
// Found Val's bucket? If so, return it.
- if (KeyInfoT::isEqual(ThisBucket->first, Val)) {
+ if (KeyInfoT::isEqual(Val, ThisBucket->first)) {
FoundBucket =3D ThisBucket;
return true;
}
@@ -478,12 +501,12 @@
};
=20
template<typename KeyT, typename ValueT,
- typename KeyInfoT, typename ValueInfoT, bool IsConst>
+ typename KeyInfoT, bool IsConst>
class DenseMapIterator {
typedef std::pair<KeyT, ValueT> Bucket;
typedef DenseMapIterator<KeyT, ValueT,
- KeyInfoT, ValueInfoT, true> ConstIterator;
- friend class DenseMapIterator<KeyT, ValueT, KeyInfoT, ValueInfoT, true>;
+ KeyInfoT, true> ConstIterator;
+ friend class DenseMapIterator<KeyT, ValueT, KeyInfoT, true>;
public:
typedef ptrdiff_t difference_type;
typedef typename conditional<IsConst, const Bucket, Bucket>::type value_=
type;
@@ -495,15 +518,16 @@
public:
DenseMapIterator() : Ptr(0), End(0) {}
=20
- DenseMapIterator(pointer Pos, pointer E) : Ptr(Pos), End(E) {
- AdvancePastEmptyBuckets();
+ DenseMapIterator(pointer Pos, pointer E, bool NoAdvance =3D false)
+ : Ptr(Pos), End(E) {
+ if (!NoAdvance) AdvancePastEmptyBuckets();
}
=20
// If IsConst is true this is a converting constructor from iterator to
// const_iterator and the default copy constructor is used.
// Otherwise this is a copy constructor for iterator.
DenseMapIterator(const DenseMapIterator<KeyT, ValueT,
- KeyInfoT, ValueInfoT, false>& I)
+ KeyInfoT, false>& I)
: Ptr(I.Ptr), End(I.End) {}
=20
reference operator*() const {
@@ -541,9 +565,9 @@
}
};
=20
-template<typename KeyT, typename ValueT, typename KeyInfoT, typename Value=
InfoT>
+template<typename KeyT, typename ValueT, typename KeyInfoT>
static inline size_t
-capacity_in_bytes(const DenseMap<KeyT, ValueT, KeyInfoT, ValueInfoT> &X) {
+capacity_in_bytes(const DenseMap<KeyT, ValueT, KeyInfoT> &X) {
return X.getMemorySize();
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Den=
seMapInfo.h
--- a/head/contrib/llvm/include/llvm/ADT/DenseMapInfo.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/DenseMapInfo.h Tue Apr 17 11:51:51=
2012 +0300
@@ -59,7 +59,7 @@
=20
// Provide DenseMapInfo for unsigned ints.
template<> struct DenseMapInfo<unsigned> {
- static inline unsigned getEmptyKey() { return ~0; }
+ static inline unsigned getEmptyKey() { return ~0U; }
static inline unsigned getTombstoneKey() { return ~0U - 1; }
static unsigned getHashValue(const unsigned& Val) { return Val * 37U; }
static bool isEqual(const unsigned& LHS, const unsigned& RHS) {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Fol=
dingSet.h
--- a/head/contrib/llvm/include/llvm/ADT/FoldingSet.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/FoldingSet.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -193,12 +193,11 @@
virtual void GetNodeProfile(Node *N, FoldingSetNodeID &ID) const =3D 0;
/// NodeEquals - Instantiations of the FoldingSet template implement
/// this function to compare the given node with the given ID.
- virtual bool NodeEquals(Node *N, const FoldingSetNodeID &ID,
+ virtual bool NodeEquals(Node *N, const FoldingSetNodeID &ID, unsigned ID=
Hash,
FoldingSetNodeID &TempID) const=3D0;
- /// NodeEquals - Instantiations of the FoldingSet template implement
+ /// ComputeNodeHash - Instantiations of the FoldingSet template implement
/// this function to compute a hash value for the given node.
- virtual unsigned ComputeNodeHash(Node *N,
- FoldingSetNodeID &TempID) const =3D 0;
+ virtual unsigned ComputeNodeHash(Node *N, FoldingSetNodeID &TempID) cons=
t =3D 0;
};
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -220,7 +219,7 @@
// to compute a temporary ID if necessary. The default implementation
// just calls Profile and does a regular comparison. Implementations
// can override this to provide more efficient implementations.
- static inline bool Equals(T &X, const FoldingSetNodeID &ID,
+ static inline bool Equals(T &X, const FoldingSetNodeID &ID, unsigned IDH=
ash,
FoldingSetNodeID &TempID);
=20
// ComputeHash - Compute a hash value for X, using TempID to
@@ -249,7 +248,7 @@
static void Profile(T &X, FoldingSetNodeID &ID, Ctx Context) {
X.Profile(ID, Context);
}
- static inline bool Equals(T &X, const FoldingSetNodeID &ID,
+ static inline bool Equals(T &X, const FoldingSetNodeID &ID, unsigned IDH=
ash,
FoldingSetNodeID &TempID, Ctx Context);
static inline unsigned ComputeHash(T &X, FoldingSetNodeID &TempID,
Ctx Context);
@@ -344,7 +343,7 @@
template<typename T>
inline bool
DefaultFoldingSetTrait<T>::Equals(T &X, const FoldingSetNodeID &ID,
- FoldingSetNodeID &TempID) {
+ unsigned IDHash, FoldingSetNodeID &TempI=
D) {
FoldingSetTrait<T>::Profile(X, TempID);
return TempID =3D=3D ID;
}
@@ -358,6 +357,7 @@
inline bool
DefaultContextualFoldingSetTrait<T, Ctx>::Equals(T &X,
const FoldingSetNodeID &I=
D,
+ unsigned IDHash,
FoldingSetNodeID &TempID,
Ctx Context) {
ContextualFoldingSetTrait<T, Ctx>::Profile(X, TempID, Context);
@@ -387,15 +387,14 @@
}
/// NodeEquals - Instantiations may optionally provide a way to compare a
/// node with a specified ID.
- virtual bool NodeEquals(Node *N, const FoldingSetNodeID &ID,
+ virtual bool NodeEquals(Node *N, const FoldingSetNodeID &ID, unsigned ID=
Hash,
FoldingSetNodeID &TempID) const {
T *TN =3D static_cast<T *>(N);
- return FoldingSetTrait<T>::Equals(*TN, ID, TempID);
+ return FoldingSetTrait<T>::Equals(*TN, ID, IDHash, TempID);
}
- /// NodeEquals - Instantiations may optionally provide a way to compute a
+ /// ComputeNodeHash - Instantiations may optionally provide a way to com=
pute a
/// hash value directly from a node.
- virtual unsigned ComputeNodeHash(Node *N,
- FoldingSetNodeID &TempID) const {
+ virtual unsigned ComputeNodeHash(Node *N, FoldingSetNodeID &TempID) cons=
t {
T *TN =3D static_cast<T *>(N);
return FoldingSetTrait<T>::ComputeHash(*TN, TempID);
}
@@ -465,10 +464,11 @@
ContextualFoldingSetTrait<T, Ctx>::Profile(*TN, ID, Context);
}
virtual bool NodeEquals(FoldingSetImpl::Node *N,
- const FoldingSetNodeID &ID,
+ const FoldingSetNodeID &ID, unsigned IDHash,
FoldingSetNodeID &TempID) const {
T *TN =3D static_cast<T *>(N);
- return ContextualFoldingSetTrait<T, Ctx>::Equals(*TN, ID, TempID, Cont=
ext);
+ return ContextualFoldingSetTrait<T, Ctx>::Equals(*TN, ID, IDHash, Temp=
ID,
+ Context);
}
virtual unsigned ComputeNodeHash(FoldingSetImpl::Node *N,
FoldingSetNodeID &TempID) const {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Gra=
phTraits.h
--- a/head/contrib/llvm/include/llvm/ADT/GraphTraits.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/GraphTraits.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -43,8 +43,11 @@
// typedef ...iterator nodes_iterator;
// static nodes_iterator nodes_begin(GraphType *G)
// static nodes_iterator nodes_end (GraphType *G)
+ // nodes_iterator/begin/end - Allow iteration over all nodes in the g=
raph
+
+ // static unsigned size (GraphType *G)
+ // Return total number of nodes in the graph
//
- // nodes_iterator/begin/end - Allow iteration over all nodes in the g=
raph
=20
=20
// If anyone tries to use this class without having an appropriate
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Imm=
utableSet.h
--- a/head/contrib/llvm/include/llvm/ADT/ImmutableSet.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/ImmutableSet.h Tue Apr 17 11:51:51=
2012 +0300
@@ -18,6 +18,7 @@
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/FoldingSet.h"
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cassert>
#include <functional>
#include <vector>
@@ -346,7 +347,7 @@
if (prev)
prev->next =3D next;
else
- factory->Cache[computeDigest()] =3D next;
+ factory->Cache[factory->maskCacheIndex(computeDigest())] =3D next;
}
=20
// We need to clear the mutability bit in case we are
@@ -428,6 +429,11 @@
TreeTy* getRight(TreeTy* T) const { return T->getRight(); }
value_type_ref getValue(TreeTy* T) const { return T->value; }
=20
+ // Make sure the index is not the Tombstone or Entry key of the DenseMap.
+ static inline unsigned maskCacheIndex(unsigned I) {
+ return (I & ~0x02);
+ }
+
unsigned incrementHeight(TreeTy* L, TreeTy* R) const {
unsigned hl =3D getHeight(L);
unsigned hr =3D getHeight(R);
@@ -610,7 +616,7 @@
// Search the hashtable for another tree with the same digest, and
// if find a collision compare those trees by their contents.
unsigned digest =3D TNew->computeDigest();
- TreeTy *&entry =3D Cache[digest];
+ TreeTy *&entry =3D Cache[maskCacheIndex(digest)];
do {
if (!entry)
break;
@@ -686,7 +692,7 @@
stack.back() |=3D VisitedRight;
break;
default:
- assert(false && "Unreachable.");
+ llvm_unreachable("Unreachable.");
}
}
=20
@@ -722,7 +728,7 @@
skipToParent();
break;
default:
- assert(false && "Unreachable.");
+ llvm_unreachable("Unreachable.");
}
return *this;
}
@@ -747,7 +753,7 @@
stack.push_back(reinterpret_cast<uintptr_t>(R) | VisitedRight);
break;
default:
- assert(false && "Unreachable.");
+ llvm_unreachable("Unreachable.");
}
return *this;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Int=
ervalMap.h
--- a/head/contrib/llvm/include/llvm/ADT/IntervalMap.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/IntervalMap.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -739,7 +739,7 @@
// A Path is used by iterators to represent a position in a B+-tree, and t=
he
// path to get there from the root.
//
-// The Path class also constains the tree navigation code that doesn't hav=
e to
+// The Path class also contains the tree navigation code that doesn't have=
to
// be templatized.
//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -1977,7 +1977,7 @@
CurSize[Nodes] =3D CurSize[NewNode];
Node[Nodes] =3D Node[NewNode];
CurSize[NewNode] =3D 0;
- Node[NewNode] =3D this->map->newNode<NodeT>();
+ Node[NewNode] =3D this->map->template newNode<NodeT>();
++Nodes;
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Int=
rusiveRefCntPtr.h
--- a/head/contrib/llvm/include/llvm/ADT/IntrusiveRefCntPtr.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/IntrusiveRefCntPtr.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -46,6 +46,7 @@
=20
public:
RefCountedBase() : ref_cnt(0) {}
+ RefCountedBase(const RefCountedBase &) : ref_cnt(0) {}
=20
void Retain() const { ++ref_cnt; }
void Release() const {
@@ -64,9 +65,12 @@
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
class RefCountedBaseVPTR {
mutable unsigned ref_cnt;
+ virtual void anchor();
=20
protected:
RefCountedBaseVPTR() : ref_cnt(0) {}
+ RefCountedBaseVPTR(const RefCountedBaseVPTR &) : ref_cnt(0) {}
+
virtual ~RefCountedBaseVPTR() {}
=20
void Retain() const { ++ref_cnt; }
@@ -76,9 +80,15 @@
}
=20
template <typename T>
- friend class IntrusiveRefCntPtr;
+ friend struct IntrusiveRefCntPtrInfo;
};
=20
+ =20
+ template <typename T> struct IntrusiveRefCntPtrInfo {
+ static void retain(T *obj) { obj->Retain(); }
+ static void release(T *obj) { obj->Release(); }
+ };
+ =20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
/// IntrusiveRefCntPtr - A template class that implements a "smart pointer"
/// that assumes the wrapped object has a reference count associated
@@ -105,7 +115,7 @@
=20
explicit IntrusiveRefCntPtr() : Obj(0) {}
=20
- explicit IntrusiveRefCntPtr(T* obj) : Obj(obj) {
+ IntrusiveRefCntPtr(T* obj) : Obj(obj) {
retain();
}
=20
@@ -153,14 +163,19 @@
other.Obj =3D Obj;
Obj =3D tmp;
}
- =20
+
+ void reset() {
+ release();
+ Obj =3D 0;
+ }
+
void resetWithoutRelease() {
Obj =3D 0;
}
=20
private:
- void retain() { if (Obj) Obj->Retain(); }
- void release() { if (Obj) Obj->Release(); }
+ void retain() { if (Obj) IntrusiveRefCntPtrInfo<T>::retain(Obj); }
+ void release() { if (Obj) IntrusiveRefCntPtrInfo<T>::release(Obj); }
=20
void replace(T* S) {
this_type(S).swap(*this);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Poi=
nterIntPair.h
--- a/head/contrib/llvm/include/llvm/ADT/PointerIntPair.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/PointerIntPair.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -92,10 +92,14 @@
}
=20
PointerTy const *getAddrOfPointer() const {
+ return const_cast<PointerIntPair *>(this)->getAddrOfPointer();
+ }
+
+ PointerTy *getAddrOfPointer() {
assert(Value =3D=3D reinterpret_cast<intptr_t>(getPointer()) &&
"Can only return the address if IntBits is cleared and "
"PtrTraits doesn't change the pointer");
- return reinterpret_cast<PointerTy const *>(&Value);
+ return reinterpret_cast<PointerTy *>(&Value);
}
=20
void *getOpaqueValue() const { return reinterpret_cast<void*>(Value); }
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Poi=
nterUnion.h
--- a/head/contrib/llvm/include/llvm/ADT/PointerUnion.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/PointerUnion.h Tue Apr 17 11:51:51=
2012 +0300
@@ -142,16 +142,19 @@
return T();
}
=20
- /// \brief If the union is set to the first pointer type we can get an
- /// address pointing to it.
- template <typename T>
- PT1 const *getAddrOf() const {
+ /// \brief If the union is set to the first pointer type get an address
+ /// pointing to it.
+ PT1 const *getAddrOfPtr1() const {
+ return const_cast<PointerUnion *>(this)->getAddrOfPtr1();
+ }
+
+ /// \brief If the union is set to the first pointer type get an address
+ /// pointing to it.
+ PT1 *getAddrOfPtr1() {
assert(is<PT1>() && "Val is not the first pointer");
assert(get<PT1>() =3D=3D Val.getPointer() &&
"Can't get the address because PointerLikeTypeTraits changes the =
ptr");
- T const *can_only_get_address_of_first_pointer_type
- =3D reinterpret_cast<PT1 const *>(Val.getAddrOfPoi=
nter());
- return can_only_get_address_of_first_pointer_type;
+ return (PT1 *)Val.getAddrOfPointer();
}
=20
/// Assignment operators - Allow assigning into this union from either
@@ -263,7 +266,7 @@
::llvm::PointerUnionTypeSelector<PT1, T, IsInnerUnion,
::llvm::PointerUnionTypeSelector<PT2, T, IsInnerUnion, IsPT3 >
>::Retu=
rn Ty;
- return Ty(Val).is<T>();
+ return Ty(Val).template is<T>();
}
=20
/// get<T>() - Return the value of the specified pointer type. If the
@@ -276,7 +279,7 @@
::llvm::PointerUnionTypeSelector<PT1, T, IsInnerUnion,
::llvm::PointerUnionTypeSelector<PT2, T, IsInnerUnion, IsPT3 >
>::Retu=
rn Ty;
- return Ty(Val).get<T>();
+ return Ty(Val).template get<T>();
}
=20
/// dyn_cast<T>() - If the current value is of the specified pointer t=
ype,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Set=
Vector.h
--- a/head/contrib/llvm/include/llvm/ADT/SetVector.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/SetVector.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -144,6 +144,12 @@
set_.erase(back());
vector_.pop_back();
}
+ =20
+ T pop_back_val() {
+ T Ret =3D back();
+ pop_back();
+ return Ret;
+ }
=20
bool operator=3D=3D(const SetVector &that) const {
return vector_ =3D=3D that.vector_;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Sma=
llBitVector.h
--- a/head/contrib/llvm/include/llvm/ADT/SmallBitVector.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/SmallBitVector.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -175,7 +175,7 @@
return CountPopulation_32(Bits);
if (sizeof(uintptr_t) * CHAR_BIT =3D=3D 64)
return CountPopulation_64(Bits);
- assert(0 && "Unsupported!");
+ llvm_unreachable("Unsupported!");
}
return getPointer()->count();
}
@@ -212,7 +212,7 @@
return CountTrailingZeros_32(Bits);
if (sizeof(uintptr_t) * CHAR_BIT =3D=3D 64)
return CountTrailingZeros_64(Bits);
- assert(0 && "Unsupported!");
+ llvm_unreachable("Unsupported!");
}
return getPointer()->find_first();
}
@@ -230,7 +230,7 @@
return CountTrailingZeros_32(Bits);
if (sizeof(uintptr_t) * CHAR_BIT =3D=3D 64)
return CountTrailingZeros_64(Bits);
- assert(0 && "Unsupported!");
+ llvm_unreachable("Unsupported!");
}
return getPointer()->find_next(Prev);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Sma=
llPtrSet.h
--- a/head/contrib/llvm/include/llvm/ADT/SmallPtrSet.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/SmallPtrSet.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -137,6 +137,10 @@
=20
void operator=3D(const SmallPtrSetImpl &RHS); // DO NOT IMPLEMENT.
protected:
+ /// swap - Swaps the elements of two sets.
+ /// Note: This method assumes that both sets have the same small size.
+ void swap(SmallPtrSetImpl &RHS);
+
void CopyFrom(const SmallPtrSetImpl &RHS);
};
=20
@@ -287,8 +291,20 @@
return *this;
}
=20
+ /// swap - Swaps the elements of two sets.
+ void swap(SmallPtrSet<PtrType, SmallSize> &RHS) {
+ SmallPtrSetImpl::swap(RHS);
+ }
};
=20
}
=20
+namespace std {
+ /// Implement std::swap in terms of SmallPtrSet swap.
+ template<class T, unsigned N>
+ inline void swap(llvm::SmallPtrSet<T, N> &LHS, llvm::SmallPtrSet<T, N> &=
RHS) {
+ LHS.swap(RHS);
+ }
+}
+
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Sma=
llSet.h
--- a/head/contrib/llvm/include/llvm/ADT/SmallSet.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/SmallSet.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -27,13 +27,13 @@
///
/// Note that this set does not provide a way to iterate over members in t=
he
/// set.
-template <typename T, unsigned N>
+template <typename T, unsigned N, typename C =3D std::less<T> >
class SmallSet {
/// Use a SmallVector to hold the elements here (even though it will nev=
er
/// reach its 'large' stage) to avoid calling the default ctors of eleme=
nts
/// we will never use.
SmallVector<T, N> Vector;
- std::set<T> Set;
+ std::set<T, C> Set;
typedef typename SmallVector<T, N>::const_iterator VIterator;
typedef typename SmallVector<T, N>::iterator mutable_iterator;
public:
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Sma=
llString.h
--- a/head/contrib/llvm/include/llvm/ADT/SmallString.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/SmallString.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -24,21 +24,244 @@
template<unsigned InternalLen>
class SmallString : public SmallVector<char, InternalLen> {
public:
- // Default ctor - Initialize to empty.
+ /// Default ctor - Initialize to empty.
SmallString() {}
=20
- // Initialize from a StringRef.
+ /// Initialize from a StringRef.
SmallString(StringRef S) : SmallVector<char, InternalLen>(S.begin(), S.e=
nd()) {}
=20
- // Initialize with a range.
+ /// Initialize with a range.
template<typename ItTy>
SmallString(ItTy S, ItTy E) : SmallVector<char, InternalLen>(S, E) {}
=20
- // Copy ctor.
+ /// Copy ctor.
SmallString(const SmallString &RHS) : SmallVector<char, InternalLen>(RHS=
) {}
=20
+ // Note that in order to add new overloads for append & assign, we have =
to
+ // duplicate the inherited versions so as not to inadvertently hide them.
+
+ /// @}
+ /// @name String Assignment
+ /// @{
+
+ /// Assign from a repeated element
+ void assign(unsigned NumElts, char Elt) {
+ this->SmallVectorImpl<char>::assign(NumElts, Elt);
+ }
+
+ /// Assign from an iterator pair
+ template<typename in_iter>
+ void assign(in_iter S, in_iter E) {
+ this->clear();
+ SmallVectorImpl<char>::append(S, E);
+ }
+
+ /// Assign from a StringRef
+ void assign(StringRef RHS) {
+ this->clear();
+ SmallVectorImpl<char>::append(RHS.begin(), RHS.end());
+ }
+
+ /// Assign from a SmallVector
+ void assign(const SmallVectorImpl<char> &RHS) {
+ this->clear();
+ SmallVectorImpl<char>::append(RHS.begin(), RHS.end());
+ }
+
+ /// @}
+ /// @name String Concatenation
+ /// @{
+
+ /// Append from an iterator pair
+ template<typename in_iter>
+ void append(in_iter S, in_iter E) {
+ SmallVectorImpl<char>::append(S, E);
+ }
+
+ /// Append from a StringRef
+ void append(StringRef RHS) {
+ SmallVectorImpl<char>::append(RHS.begin(), RHS.end());
+ }
+
+ /// Append from a SmallVector
+ void append(const SmallVectorImpl<char> &RHS) {
+ SmallVectorImpl<char>::append(RHS.begin(), RHS.end());
+ }
+
+ /// @}
+ /// @name String Comparison
+ /// @{
+
+ /// equals - Check for string equality, this is more efficient than
+ /// compare() when the relative ordering of inequal strings isn't needed.
+ bool equals(StringRef RHS) const {
+ return str().equals(RHS);
+ }
+
+ /// equals_lower - Check for string equality, ignoring case.
+ bool equals_lower(StringRef RHS) const {
+ return str().equals_lower(RHS);
+ }
+
+ /// compare - Compare two strings; the result is -1, 0, or 1 if this str=
ing
+ /// is lexicographically less than, equal to, or greater than the \arg R=
HS.
+ int compare(StringRef RHS) const {
+ return str().compare(RHS);
+ }
+
+ /// compare_lower - Compare two strings, ignoring case.
+ int compare_lower(StringRef RHS) const {
+ return str().compare_lower(RHS);
+ }
+
+ /// compare_numeric - Compare two strings, treating sequences of digits =
as
+ /// numbers.
+ int compare_numeric(StringRef RHS) const {
+ return str().compare_numeric(RHS);
+ }
+
+ /// @}
+ /// @name String Predicates
+ /// @{
+
+ /// startswith - Check if this string starts with the given \arg Prefix.
+ bool startswith(StringRef Prefix) const {
+ return str().startswith(Prefix);
+ }
+
+ /// endswith - Check if this string ends with the given \arg Suffix.
+ bool endswith(StringRef Suffix) const {
+ return str().endswith(Suffix);
+ }
+
+ /// @}
+ /// @name String Searching
+ /// @{
+
+ /// find - Search for the first character \arg C in the string.
+ ///
+ /// \return - The index of the first occurrence of \arg C, or npos if not
+ /// found.
+ size_t find(char C, size_t From =3D 0) const {
+ return str().find(C, From);
+ }
+
+ /// find - Search for the first string \arg Str in the string.
+ ///
+ /// \return - The index of the first occurrence of \arg Str, or npos if =
not
+ /// found.
+ size_t find(StringRef Str, size_t From =3D 0) const {
+ return str().find(Str, From);
+ }
+
+ /// rfind - Search for the last character \arg C in the string.
+ ///
+ /// \return - The index of the last occurrence of \arg C, or npos if not
+ /// found.
+ size_t rfind(char C, size_t From =3D StringRef::npos) const {
+ return str().rfind(C, From);
+ }
+
+ /// rfind - Search for the last string \arg Str in the string.
+ ///
+ /// \return - The index of the last occurrence of \arg Str, or npos if n=
ot
+ /// found.
+ size_t rfind(StringRef Str) const {
+ return str().rfind(Str);
+ }
+
+ /// find_first_of - Find the first character in the string that is \arg =
C,
+ /// or npos if not found. Same as find.
+ size_t find_first_of(char C, size_t From =3D 0) const {
+ return str().find_first_of(C, From);
+ }
+
+ /// find_first_of - Find the first character in the string that is in \a=
rg
+ /// Chars, or npos if not found.
+ ///
+ /// Note: O(size() + Chars.size())
+ size_t find_first_of(StringRef Chars, size_t From =3D 0) const {
+ return str().find_first_of(Chars, From);
+ }
+
+ /// find_first_not_of - Find the first character in the string that is n=
ot
+ /// \arg C or npos if not found.
+ size_t find_first_not_of(char C, size_t From =3D 0) const {
+ return str().find_first_not_of(C, From);
+ }
+
+ /// find_first_not_of - Find the first character in the string that is n=
ot
+ /// in the string \arg Chars, or npos if not found.
+ ///
+ /// Note: O(size() + Chars.size())
+ size_t find_first_not_of(StringRef Chars, size_t From =3D 0) const {
+ return str().find_first_not_of(Chars, From);
+ }
+
+ /// find_last_of - Find the last character in the string that is \arg C,=
or
+ /// npos if not found.
+ size_t find_last_of(char C, size_t From =3D StringRef::npos) const {
+ return str().find_last_of(C, From);
+ }
+
+ /// find_last_of - Find the last character in the string that is in \arg=
C,
+ /// or npos if not found.
+ ///
+ /// Note: O(size() + Chars.size())
+ size_t find_last_of(
+ StringRef Chars, size_t From =3D StringRef::npos) const {
+ return str().find_last_of(Chars, From);
+ }
+
+ /// @}
+ /// @name Helpful Algorithms
+ /// @{
+
+ /// count - Return the number of occurrences of \arg C in the string.
+ size_t count(char C) const {
+ return str().count(C);
+ }
+
+ /// count - Return the number of non-overlapped occurrences of \arg Str =
in
+ /// the string.
+ size_t count(StringRef Str) const {
+ return str().count(Str);
+ }
+
+ /// @}
+ /// @name Substring Operations
+ /// @{
+
+ /// substr - Return a reference to the substring from [Start, Start + N).
+ ///
+ /// \param Start - The index of the starting character in the substring;=
if
+ /// the index is npos or greater than the length of the string then the
+ /// empty substring will be returned.
+ ///
+ /// \param N - The number of characters to included in the substring. If=
N
+ /// exceeds the number of characters remaining in the string, the string
+ /// suffix (starting with \arg Start) will be returned.
+ StringRef substr(size_t Start, size_t N =3D StringRef::npos) const {
+ return str().substr(Start, N);
+ }
+
+ /// slice - Return a reference to the substring from [Start, End).
+ ///
+ /// \param Start - The index of the starting character in the substring;=
if
+ /// the index is npos or greater than the length of the string then the
+ /// empty substring will be returned.
+ ///
+ /// \param End - The index following the last character to include in the
+ /// substring. If this is npos, or less than \arg Start, or exceeds the
+ /// number of characters remaining in the string, the string suffix
+ /// (starting with \arg Start) will be returned.
+ StringRef slice(size_t Start, size_t End) const {
+ return str().slice(Start, End);
+ }
=20
// Extra methods.
+
+ /// Explicit conversion to StringRef
StringRef str() const { return StringRef(this->begin(), this->size()); }
=20
// TODO: Make this const, if it's safe...
@@ -48,7 +271,7 @@
return this->data();
}
=20
- // Implicit conversion to StringRef.
+ /// Implicit conversion to StringRef.
operator StringRef() const { return str(); }
=20
// Extra operators.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Sma=
llVector.h
--- a/head/contrib/llvm/include/llvm/ADT/SmallVector.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/SmallVector.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -23,30 +23,6 @@
#include <iterator>
#include <memory>
=20
-#ifdef _MSC_VER
-namespace std {
-#if _MSC_VER <=3D 1310
- // Work around flawed VC++ implementation of std::uninitialized_copy. D=
efine
- // additional overloads so that elements with pointer types are recogniz=
ed as
- // scalars and not objects, causing bizarre type conversion errors.
- template<class T1, class T2>
- inline _Scalar_ptr_iterator_tag _Ptr_cat(T1 **, T2 **) {
- _Scalar_ptr_iterator_tag _Cat;
- return _Cat;
- }
-
- template<class T1, class T2>
- inline _Scalar_ptr_iterator_tag _Ptr_cat(T1* const *, T2 **) {
- _Scalar_ptr_iterator_tag _Cat;
- return _Cat;
- }
-#else
-// FIXME: It is not clear if the problem is fixed in VS 2005. What is cle=
ar
-// is that the above hack won't work if it wasn't fixed.
-#endif
-}
-#endif
-
namespace llvm {
=20
/// SmallVectorBase - This is all the non-templated stuff common to all
@@ -100,10 +76,10 @@
template <typename T>
class SmallVectorTemplateCommon : public SmallVectorBase {
protected:
+ SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(Size) {}
+
void setEnd(T *P) { this->EndX =3D P; }
public:
- SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(Size) {}
-
typedef size_t size_type;
typedef ptrdiff_t difference_type;
typedef T value_type;
@@ -174,7 +150,7 @@
/// implementations that are designed to work with non-POD-like T's.
template <typename T, bool isPodLike>
class SmallVectorTemplateBase : public SmallVectorTemplateCommon<T> {
-public:
+protected:
SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon<T>(Size=
) {}
=20
static void destroy_range(T *S, T *E) {
@@ -194,6 +170,23 @@
/// grow - double the size of the allocated memory, guaranteeing space f=
or at
/// least one more element or MinSize if specified.
void grow(size_t MinSize =3D 0);
+ =20
+public:
+ void push_back(const T &Elt) {
+ if (this->EndX < this->CapacityX) {
+ Retry:
+ new (this->end()) T(Elt);
+ this->setEnd(this->end()+1);
+ return;
+ }
+ this->grow();
+ goto Retry;
+ }
+ =20
+ void pop_back() {
+ this->setEnd(this->end()-1);
+ this->end()->~T();
+ }
};
=20
// Define this out-of-line to dissuade the C++ compiler from inlining it.
@@ -226,7 +219,7 @@
/// implementations that are designed to work with POD-like T's.
template <typename T>
class SmallVectorTemplateBase<T, true> : public SmallVectorTemplateCommon<=
T> {
-public:
+protected:
SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon<T>(Size=
) {}
=20
// No need to do a destroy loop for POD's.
@@ -255,6 +248,21 @@
void grow(size_t MinSize =3D 0) {
this->grow_pod(MinSize*sizeof(T), sizeof(T));
}
+public:
+ void push_back(const T &Elt) {
+ if (this->EndX < this->CapacityX) {
+ Retry:
+ *this->end() =3D Elt;
+ this->setEnd(this->end()+1);
+ return;
+ }
+ this->grow();
+ goto Retry;
+ }
+ =20
+ void pop_back() {
+ this->setEnd(this->end()-1);
+ }
};
=20
=20
@@ -270,11 +278,13 @@
typedef typename SuperClass::iterator iterator;
typedef typename SuperClass::size_type size_type;
=20
+protected:
// Default ctor - Initialize to empty.
explicit SmallVectorImpl(unsigned N)
: SmallVectorTemplateBase<T, isPodLike<T>::value>(N*sizeof(T)) {
}
=20
+public:
~SmallVectorImpl() {
// Destroy the constructed elements in the vector.
this->destroy_range(this->begin(), this->end());
@@ -297,7 +307,7 @@
} else if (N > this->size()) {
if (this->capacity() < N)
this->grow(N);
- this->construct_range(this->end(), this->begin()+N, T());
+ std::uninitialized_fill(this->end(), this->begin()+N, T());
this->setEnd(this->begin()+N);
}
}
@@ -309,7 +319,7 @@
} else if (N > this->size()) {
if (this->capacity() < N)
this->grow(N);
- construct_range(this->end(), this->begin()+N, NV);
+ std::uninitialized_fill(this->end(), this->begin()+N, NV);
this->setEnd(this->begin()+N);
}
}
@@ -319,25 +329,9 @@
this->grow(N);
}
=20
- void push_back(const T &Elt) {
- if (this->EndX < this->CapacityX) {
- Retry:
- new (this->end()) T(Elt);
- this->setEnd(this->end()+1);
- return;
- }
- this->grow();
- goto Retry;
- }
-
- void pop_back() {
- this->setEnd(this->end()-1);
- this->end()->~T();
- }
-
T pop_back_val() {
T Result =3D this->back();
- pop_back();
+ this->pop_back();
return Result;
}
=20
@@ -376,7 +370,7 @@
if (this->capacity() < NumElts)
this->grow(NumElts);
this->setEnd(this->begin()+NumElts);
- construct_range(this->begin(), this->end(), Elt);
+ std::uninitialized_fill(this->begin(), this->end(), Elt);
}
=20
iterator erase(iterator I) {
@@ -384,7 +378,7 @@
// Shift all elts down one.
std::copy(I+1, this->end(), I);
// Drop the last elt.
- pop_back();
+ this->pop_back();
return(N);
}
=20
@@ -400,7 +394,7 @@
=20
iterator insert(iterator I, const T &Elt) {
if (I =3D=3D this->end()) { // Important special case for empty vecto=
r.
- push_back(Elt);
+ this->push_back(Elt);
return this->end()-1;
}
=20
@@ -554,12 +548,6 @@
assert(N <=3D this->capacity());
this->setEnd(this->begin() + N);
}
-
-private:
- static void construct_range(T *S, T *E, const T &Elt) {
- for (; S !=3D E; ++S)
- new (S) T(Elt);
- }
};
=20
=20
@@ -686,9 +674,7 @@
=20
explicit SmallVector(unsigned Size, const T &Value =3D T())
: SmallVectorImpl<T>(NumTsAvailable) {
- this->reserve(Size);
- while (Size--)
- this->push_back(Value);
+ this->assign(Size, Value);
}
=20
template<typename ItTy>
@@ -718,9 +704,7 @@
=20
explicit SmallVector(unsigned Size, const T &Value =3D T())
: SmallVectorImpl<T>(0) {
- this->reserve(Size);
- while (Size--)
- this->push_back(Value);
+ this->assign(Size, Value);
}
=20
template<typename ItTy>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Spa=
rseBitVector.h
--- a/head/contrib/llvm/include/llvm/ADT/SparseBitVector.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/SparseBitVector.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -18,11 +18,11 @@
#include "llvm/ADT/ilist.h"
#include "llvm/ADT/ilist_node.h"
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <climits>
-#include <cstring>
=20
namespace llvm {
=20
@@ -128,7 +128,7 @@
else if (sizeof(BitWord) =3D=3D 8)
NumBits +=3D CountPopulation_64(Bits[i]);
else
- assert(0 && "Unsupported!");
+ llvm_unreachable("Unsupported!");
return NumBits;
}
=20
@@ -138,13 +138,11 @@
if (Bits[i] !=3D 0) {
if (sizeof(BitWord) =3D=3D 4)
return i * BITWORD_SIZE + CountTrailingZeros_32(Bits[i]);
- else if (sizeof(BitWord) =3D=3D 8)
+ if (sizeof(BitWord) =3D=3D 8)
return i * BITWORD_SIZE + CountTrailingZeros_64(Bits[i]);
- else
- assert(0 && "Unsupported!");
+ llvm_unreachable("Unsupported!");
}
- assert(0 && "Illegal empty element");
- return 0; // Not reached
+ llvm_unreachable("Illegal empty element");
}
=20
/// find_next - Returns the index of the next set bit starting from the
@@ -165,10 +163,9 @@
if (Copy !=3D 0) {
if (sizeof(BitWord) =3D=3D 4)
return WordPos * BITWORD_SIZE + CountTrailingZeros_32(Copy);
- else if (sizeof(BitWord) =3D=3D 8)
+ if (sizeof(BitWord) =3D=3D 8)
return WordPos * BITWORD_SIZE + CountTrailingZeros_64(Copy);
- else
- assert(0 && "Unsupported!");
+ llvm_unreachable("Unsupported!");
}
=20
// Check subsequent words.
@@ -176,10 +173,9 @@
if (Bits[i] !=3D 0) {
if (sizeof(BitWord) =3D=3D 4)
return i * BITWORD_SIZE + CountTrailingZeros_32(Bits[i]);
- else if (sizeof(BitWord) =3D=3D 8)
+ if (sizeof(BitWord) =3D=3D 8)
return i * BITWORD_SIZE + CountTrailingZeros_64(Bits[i]);
- else
- assert(0 && "Unsupported!");
+ llvm_unreachable("Unsupported!");
}
return -1;
}
@@ -264,15 +260,6 @@
}
BecameZero =3D allzero;
}
-
- // Get a hash value for this element;
- uint64_t getHashValue() const {
- uint64_t HashVal =3D 0;
- for (unsigned i =3D 0; i < BITWORDS_PER_ELEMENT; ++i) {
- HashVal ^=3D Bits[i];
- }
- return HashVal;
- }
};
=20
template <unsigned ElementSize =3D 128>
@@ -813,18 +800,6 @@
iterator end() const {
return iterator(this, true);
}
-
- // Get a hash value for this bitmap.
- uint64_t getHashValue() const {
- uint64_t HashVal =3D 0;
- for (ElementListConstIter Iter =3D Elements.begin();
- Iter !=3D Elements.end();
- ++Iter) {
- HashVal ^=3D Iter->index();
- HashVal ^=3D Iter->getHashValue();
- }
- return HashVal;
- }
};
=20
// Convenience functions to allow Or and And without dereferencing in the =
user
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Sta=
tistic.h
--- a/head/contrib/llvm/include/llvm/ADT/Statistic.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/Statistic.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -27,6 +27,7 @@
#define LLVM_ADT_STATISTIC_H
=20
#include "llvm/Support/Atomic.h"
+#include "llvm/Support/Valgrind.h"
=20
namespace llvm {
class raw_ostream;
@@ -110,6 +111,7 @@
bool tmp =3D Initialized;
sys::MemoryFence();
if (!tmp) RegisterStatistic();
+ TsanHappensAfter(this);
return *this;
}
void RegisterStatistic();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Str=
ingExtras.h
--- a/head/contrib/llvm/include/llvm/ADT/StringExtras.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/StringExtras.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,12 +15,7 @@
#define LLVM_ADT_STRINGEXTRAS_H
=20
#include "llvm/Support/DataTypes.h"
-#include "llvm/ADT/APFloat.h"
-#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/ADT/StringRef.h"
-#include <cctype>
-#include <cstdio>
-#include <string>
=20
namespace llvm {
template<typename T> class SmallVectorImpl;
@@ -101,38 +96,6 @@
return utostr(static_cast<uint64_t>(X));
}
=20
-static inline std::string ftostr(double V) {
- char Buffer[200];
- sprintf(Buffer, "%20.6e", V);
- char *B =3D Buffer;
- while (*B =3D=3D ' ') ++B;
- return B;
-}
-
-static inline std::string ftostr(const APFloat& V) {
- if (&V.getSemantics() =3D=3D &APFloat::IEEEdouble)
- return ftostr(V.convertToDouble());
- else if (&V.getSemantics() =3D=3D &APFloat::IEEEsingle)
- return ftostr((double)V.convertToFloat());
- return "<unknown format in ftostr>"; // error
-}
-
-static inline std::string LowercaseString(const std::string &S) {
- std::string result(S);
- for (unsigned i =3D 0; i < S.length(); ++i)
- if (isupper(result[i]))
- result[i] =3D char(tolower(result[i]));
- return result;
-}
-
-static inline std::string UppercaseString(const std::string &S) {
- std::string result(S);
- for (unsigned i =3D 0; i < S.length(); ++i)
- if (islower(result[i]))
- result[i] =3D char(toupper(result[i]));
- return result;
-}
-
/// StrInStrNoCase - Portable version of strcasestr. Locates the first
/// occurrence of string 's1' in string 's2', ignoring case. Returns
/// the offset of s2 in s1 or npos if s2 cannot be found.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Str=
ingMap.h
--- a/head/contrib/llvm/include/llvm/ADT/StringMap.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/StringMap.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -51,20 +51,11 @@
/// StringMapImpl - This is the base class of StringMap that is shared amo=
ng
/// all of its instantiations.
class StringMapImpl {
-public:
- /// ItemBucket - The hash table consists of an array of these. If Item =
is
- /// non-null, this is an extant entry, otherwise, it is a hole.
- struct ItemBucket {
- /// FullHashValue - This remembers the full hash value of the key for
- /// easy scanning.
- unsigned FullHashValue;
-
- /// Item - This is a pointer to the actual item object.
- StringMapEntryBase *Item;
- };
-
protected:
- ItemBucket *TheTable;
+ // Array of NumBuckets pointers to entries, null pointers are holes.
+ // TheTable[NumBuckets] contains a sentinel value for easy iteration. Fo=
llwed
+ // by an array of the actual hash values as unsigned integers.
+ StringMapEntryBase **TheTable;
unsigned NumBuckets;
unsigned NumItems;
unsigned NumTombstones;
@@ -238,8 +229,9 @@
template<typename ValueTy, typename AllocatorTy =3D MallocAllocator>
class StringMap : public StringMapImpl {
AllocatorTy Allocator;
+public:
typedef StringMapEntry<ValueTy> MapEntryTy;
-public:
+ =20
StringMap() : StringMapImpl(static_cast<unsigned>(sizeof(MapEntryTy))) {}
explicit StringMap(unsigned InitialSize)
: StringMapImpl(InitialSize, static_cast<unsigned>(sizeof(MapEntryTy))=
) {}
@@ -289,13 +281,13 @@
iterator find(StringRef Key) {
int Bucket =3D FindKey(Key);
if (Bucket =3D=3D -1) return end();
- return iterator(TheTable+Bucket);
+ return iterator(TheTable+Bucket, true);
}
=20
const_iterator find(StringRef Key) const {
int Bucket =3D FindKey(Key);
if (Bucket =3D=3D -1) return end();
- return const_iterator(TheTable+Bucket);
+ return const_iterator(TheTable+Bucket, true);
}
=20
/// lookup - Return the entry for the specified key, or a default
@@ -320,13 +312,13 @@
/// insert it and return true.
bool insert(MapEntryTy *KeyValue) {
unsigned BucketNo =3D LookupBucketFor(KeyValue->getKey());
- ItemBucket &Bucket =3D TheTable[BucketNo];
- if (Bucket.Item && Bucket.Item !=3D getTombstoneVal())
+ StringMapEntryBase *&Bucket =3D TheTable[BucketNo];
+ if (Bucket && Bucket !=3D getTombstoneVal())
return false; // Already exists in map.
=20
- if (Bucket.Item =3D=3D getTombstoneVal())
+ if (Bucket =3D=3D getTombstoneVal())
--NumTombstones;
- Bucket.Item =3D KeyValue;
+ Bucket =3D KeyValue;
++NumItems;
assert(NumItems + NumTombstones <=3D NumBuckets);
=20
@@ -340,10 +332,11 @@
=20
// Zap all values, resetting the keys back to non-present (not tombsto=
ne),
// which is safe because we're removing all elements.
- for (ItemBucket *I =3D TheTable, *E =3D TheTable+NumBuckets; I !=3D E;=
++I) {
- if (I->Item && I->Item !=3D getTombstoneVal()) {
- static_cast<MapEntryTy*>(I->Item)->Destroy(Allocator);
- I->Item =3D 0;
+ for (unsigned I =3D 0, E =3D NumBuckets; I !=3D E; ++I) {
+ StringMapEntryBase *&Bucket =3D TheTable[I];
+ if (Bucket && Bucket !=3D getTombstoneVal()) {
+ static_cast<MapEntryTy*>(Bucket)->Destroy(Allocator);
+ Bucket =3D 0;
}
}
=20
@@ -357,21 +350,21 @@
template <typename InitTy>
MapEntryTy &GetOrCreateValue(StringRef Key, InitTy Val) {
unsigned BucketNo =3D LookupBucketFor(Key);
- ItemBucket &Bucket =3D TheTable[BucketNo];
- if (Bucket.Item && Bucket.Item !=3D getTombstoneVal())
- return *static_cast<MapEntryTy*>(Bucket.Item);
+ StringMapEntryBase *&Bucket =3D TheTable[BucketNo];
+ if (Bucket && Bucket !=3D getTombstoneVal())
+ return *static_cast<MapEntryTy*>(Bucket);
=20
MapEntryTy *NewItem =3D
MapEntryTy::Create(Key.begin(), Key.end(), Allocator, Val);
=20
- if (Bucket.Item =3D=3D getTombstoneVal())
+ if (Bucket =3D=3D getTombstoneVal())
--NumTombstones;
++NumItems;
assert(NumItems + NumTombstones <=3D NumBuckets);
=20
// Fill in the bucket for the hash table. The FullHashValue was alrea=
dy
// filled in by LookupBucketFor.
- Bucket.Item =3D NewItem;
+ Bucket =3D NewItem;
=20
RehashTable();
return *NewItem;
@@ -410,21 +403,21 @@
template<typename ValueTy>
class StringMapConstIterator {
protected:
- StringMapImpl::ItemBucket *Ptr;
+ StringMapEntryBase **Ptr;
public:
typedef StringMapEntry<ValueTy> value_type;
=20
- explicit StringMapConstIterator(StringMapImpl::ItemBucket *Bucket,
+ explicit StringMapConstIterator(StringMapEntryBase **Bucket,
bool NoAdvance =3D false)
: Ptr(Bucket) {
if (!NoAdvance) AdvancePastEmptyBuckets();
}
=20
const value_type &operator*() const {
- return *static_cast<StringMapEntry<ValueTy>*>(Ptr->Item);
+ return *static_cast<StringMapEntry<ValueTy>*>(*Ptr);
}
const value_type *operator->() const {
- return static_cast<StringMapEntry<ValueTy>*>(Ptr->Item);
+ return static_cast<StringMapEntry<ValueTy>*>(*Ptr);
}
=20
bool operator=3D=3D(const StringMapConstIterator &RHS) const {
@@ -445,7 +438,7 @@
=20
private:
void AdvancePastEmptyBuckets() {
- while (Ptr->Item =3D=3D 0 || Ptr->Item =3D=3D StringMapImpl::getTombst=
oneVal())
+ while (*Ptr =3D=3D 0 || *Ptr =3D=3D StringMapImpl::getTombstoneVal())
++Ptr;
}
};
@@ -453,15 +446,15 @@
template<typename ValueTy>
class StringMapIterator : public StringMapConstIterator<ValueTy> {
public:
- explicit StringMapIterator(StringMapImpl::ItemBucket *Bucket,
+ explicit StringMapIterator(StringMapEntryBase **Bucket,
bool NoAdvance =3D false)
: StringMapConstIterator<ValueTy>(Bucket, NoAdvance) {
}
StringMapEntry<ValueTy> &operator*() const {
- return *static_cast<StringMapEntry<ValueTy>*>(this->Ptr->Item);
+ return *static_cast<StringMapEntry<ValueTy>*>(*this->Ptr);
}
StringMapEntry<ValueTy> *operator->() const {
- return static_cast<StringMapEntry<ValueTy>*>(this->Ptr->Item);
+ return static_cast<StringMapEntry<ValueTy>*>(*this->Ptr);
}
};
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Str=
ingRef.h
--- a/head/contrib/llvm/include/llvm/ADT/StringRef.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/StringRef.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -10,15 +10,26 @@
#ifndef LLVM_ADT_STRINGREF_H
#define LLVM_ADT_STRINGREF_H
=20
+#include "llvm/Support/type_traits.h"
+
#include <cassert>
#include <cstring>
+#include <limits>
+#include <string>
#include <utility>
-#include <string>
=20
namespace llvm {
template<typename T>
class SmallVectorImpl;
class APInt;
+ class hash_code;
+ class StringRef;
+
+ /// Helper functions for StringRef::getAsInteger.
+ bool getAsUnsignedInteger(StringRef Str, unsigned Radix,
+ unsigned long long &Result);
+
+ bool getAsSignedInteger(StringRef Str, unsigned Radix, long long &Result=
);
=20
/// StringRef - Represent a constant reference to a string, i.e. a chara=
cter
/// array and a length, which need not be null terminated.
@@ -304,14 +315,29 @@
///
/// If the string is invalid or if only a subset of the string is vali=
d,
/// this returns true to signify the error. The string is considered
- /// erroneous if empty.
+ /// erroneous if empty or if it overflows T.
///
- bool getAsInteger(unsigned Radix, long long &Result) const;
- bool getAsInteger(unsigned Radix, unsigned long long &Result) const;
- bool getAsInteger(unsigned Radix, int &Result) const;
- bool getAsInteger(unsigned Radix, unsigned &Result) const;
+ template <typename T>
+ typename enable_if_c<std::numeric_limits<T>::is_signed, bool>::type
+ getAsInteger(unsigned Radix, T &Result) const {
+ long long LLVal;
+ if (getAsSignedInteger(*this, Radix, LLVal) ||
+ static_cast<T>(LLVal) !=3D LLVal)
+ return true;
+ Result =3D LLVal;
+ return false;
+ }
=20
- // TODO: Provide overloads for int/unsigned that check for overflow.
+ template <typename T>
+ typename enable_if_c<!std::numeric_limits<T>::is_signed, bool>::type
+ getAsInteger(unsigned Radix, T &Result) const {
+ unsigned long long ULLVal;
+ if (getAsUnsignedInteger(*this, Radix, ULLVal) ||
+ static_cast<T>(ULLVal) !=3D ULLVal)
+ return true;
+ Result =3D ULLVal;
+ return false;
+ }
=20
/// getAsInteger - Parse the current string as an integer of the
/// specified radix, or of an autosensed radix if the radix given
@@ -327,6 +353,16 @@
bool getAsInteger(unsigned Radix, APInt &Result) const;
=20
/// @}
+ /// @name String Operations
+ /// @{
+
+ // lower - Convert the given ASCII string to lowercase.
+ std::string lower() const;
+
+ /// upper - Convert the given ASCII string to uppercase.
+ std::string upper() const;
+
+ /// @}
/// @name Substring Operations
/// @{
=20
@@ -343,6 +379,20 @@
Start =3D min(Start, Length);
return StringRef(Data + Start, min(N, Length - Start));
}
+ =20
+ /// drop_front - Return a StringRef equal to 'this' but with the first
+ /// elements dropped.
+ StringRef drop_front(unsigned N =3D 1) const {
+ assert(size() >=3D N && "Dropping more elements than exist");
+ return substr(N);
+ }
+
+ /// drop_back - Return a StringRef equal to 'this' but with the last
+ /// elements dropped.
+ StringRef drop_back(unsigned N =3D 1) const {
+ assert(size() >=3D N && "Dropping more elements than exist");
+ return substr(0, size()-N);
+ }
=20
/// slice - Return a reference to the substring from [Start, End).
///
@@ -466,6 +516,9 @@
=20
/// @}
=20
+ /// \brief Compute a hash_code for a StringRef.
+ hash_code hash_value(StringRef S);
+
// StringRefs can be treated like a POD type.
template <typename T> struct isPodLike;
template <> struct isPodLike<StringRef> { static const bool value =3D tr=
ue; };
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Tin=
yPtrVector.h
--- a/head/contrib/llvm/include/llvm/ADT/TinyPtrVector.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/TinyPtrVector.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -37,6 +37,15 @@
delete V;
}
=20
+ // implicit conversion operator to ArrayRef.
+ operator ArrayRef<EltTy>() const {
+ if (Val.isNull())
+ return ArrayRef<EltTy>();
+ if (Val.template is<EltTy>())
+ return *Val.getAddrOfPtr1();
+ return *Val.template get<VecTy*>();
+ }
+ =20
bool empty() const {
// This vector can be empty if it contains no element, or if it
// contains a pointer to an empty vector.
@@ -54,18 +63,20 @@
return Val.template get<VecTy*>()->size();
}
=20
- typedef const EltTy *iterator;
- iterator begin() const {
+ typedef const EltTy *const_iterator;
+ typedef EltTy *iterator;
+
+ iterator begin() {
if (empty())
return 0;
=20
if (Val.template is<EltTy>())
- return Val.template getAddrOf<EltTy>();
+ return Val.getAddrOfPtr1();
=20
return Val.template get<VecTy *>()->begin();
=20
}
- iterator end() const {
+ iterator end() {
if (empty())
return 0;
=20
@@ -75,7 +86,14 @@
return Val.template get<VecTy *>()->end();
}
=20
- =20
+ const_iterator begin() const {
+ return (const_iterator)const_cast<TinyPtrVector*>(this)->begin();
+ }
+
+ const_iterator end() const {
+ return (const_iterator)const_cast<TinyPtrVector*>(this)->end();
+ }
+
EltTy operator[](unsigned i) const {
assert(!Val.isNull() && "can't index into an empty vector");
if (EltTy V =3D Val.template dyn_cast<EltTy>()) {
@@ -124,6 +142,20 @@
}
// Otherwise, we're already empty.
}
+
+ iterator erase(iterator I) {
+ // If we have a single value, convert to empty.
+ if (Val.template is<EltTy>()) {
+ if (I =3D=3D begin())
+ Val =3D (EltTy)0;
+ } else if (VecTy *Vec =3D Val.template dyn_cast<VecTy*>()) {
+ // multiple items in a vector; just do the erase, there is no
+ // benefit to collapsing back to a pointer
+ return Vec->erase(I);
+ }
+
+ return 0;
+ }
=20
private:
void operator=3D(const TinyPtrVector&); // NOT IMPLEMENTED YET.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Tri=
e.h
--- a/head/contrib/llvm/include/llvm/ADT/Trie.h Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/llvm/include/llvm/ADT/Trie.h Tue Apr 17 11:51:51 2012 +0=
300
@@ -220,8 +220,7 @@
assert(0 && "FIXME!");
return false;
case Node::DontMatch:
- assert(0 && "Impossible!");
- return false;
+ llvm_unreachable("Impossible!");
case Node::LabelIsPrefix:
s1 =3D s1.substr(nNode->label().length());
cNode =3D nNode;
@@ -258,8 +257,7 @@
case Node::StringIsPrefix:
return Empty;
case Node::DontMatch:
- assert(0 && "Impossible!");
- return Empty;
+ llvm_unreachable("Impossible!");
case Node::LabelIsPrefix:
s1 =3D s1.substr(nNode->label().length());
cNode =3D nNode;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Tri=
ple.h
--- a/head/contrib/llvm/include/llvm/ADT/Triple.h Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/llvm/include/llvm/ADT/Triple.h Tue Apr 17 11:51:51 2012 =
+0300
@@ -43,20 +43,19 @@
enum ArchType {
UnknownArch,
=20
- alpha, // Alpha: alpha
arm, // ARM; arm, armv.*, xscale
- bfin, // Blackfin: bfin
cellspu, // CellSPU: spu, cellspu
+ hexagon, // Hexagon: hexagon
mips, // MIPS: mips, mipsallegrex
- mipsel, // MIPSEL: mipsel, mipsallegrexel, psp
+ mipsel, // MIPSEL: mipsel, mipsallegrexel
mips64, // MIPS64: mips64
mips64el,// MIPS64EL: mips64el
msp430, // MSP430: msp430
ppc, // PPC: powerpc
ppc64, // PPC64: powerpc64, ppu
+ r600, // R600: AMD GPUs HD2XXX - HD6XXX
sparc, // Sparc: sparc
sparcv9, // Sparcv9: Sparcv9
- systemz, // SystemZ: s390x
tce, // TCE (http://tce.cs.tut.fi/): tce
thumb, // Thumb: thumb, thumbv.*
x86, // X86: i[3-9]86
@@ -66,16 +65,16 @@
ptx32, // PTX: ptx (32-bit)
ptx64, // PTX: ptx (64-bit)
le32, // le32: generic little-endian 32-bit CPU (PNaCl / Emscripten)
- amdil, // amdil: amd IL
-
- InvalidArch
+ amdil // amdil: amd IL
};
enum VendorType {
UnknownVendor,
=20
Apple,
PC,
- SCEI
+ SCEI,
+ BGP,
+ BGQ
};
enum OSType {
UnknownOS,
@@ -93,61 +92,52 @@
MinGW32, // i*86-pc-mingw32, *-w64-mingw32
NetBSD,
OpenBSD,
- Psp,
Solaris,
Win32,
Haiku,
Minix,
RTEMS,
- NativeClient
+ NativeClient,
+ CNK // BG/P Compute-Node Kernel
};
enum EnvironmentType {
UnknownEnvironment,
=20
GNU,
GNUEABI,
+ GNUEABIHF,
EABI,
- MachO
+ MachO,
+ ANDROIDEABI
};
=20
private:
std::string Data;
=20
- /// The parsed arch type (or InvalidArch if uninitialized).
- mutable ArchType Arch;
+ /// The parsed arch type.
+ ArchType Arch;
=20
/// The parsed vendor type.
- mutable VendorType Vendor;
+ VendorType Vendor;
=20
/// The parsed OS type.
- mutable OSType OS;
+ OSType OS;
=20
/// The parsed Environment type.
- mutable EnvironmentType Environment;
-
- bool isInitialized() const { return Arch !=3D InvalidArch; }
- static ArchType ParseArch(StringRef ArchName);
- static VendorType ParseVendor(StringRef VendorName);
- static OSType ParseOS(StringRef OSName);
- static EnvironmentType ParseEnvironment(StringRef EnvironmentName);
- void Parse() const;
+ EnvironmentType Environment;
=20
public:
/// @name Constructors
/// @{
=20
- Triple() : Data(), Arch(InvalidArch) {}
- explicit Triple(const Twine &Str) : Data(Str.str()), Arch(InvalidArch) {}
- Triple(const Twine &ArchStr, const Twine &VendorStr, const Twine &OSStr)
- : Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr).str()),
- Arch(InvalidArch) {
- }
+ /// \brief Default constructor is the same as an empty string and leaves=
all
+ /// triple fields unknown.
+ Triple() : Data(), Arch(), Vendor(), OS(), Environment() {}
=20
+ explicit Triple(const Twine &Str);
+ Triple(const Twine &ArchStr, const Twine &VendorStr, const Twine &OSStr);
Triple(const Twine &ArchStr, const Twine &VendorStr, const Twine &OSStr,
- const Twine &EnvironmentStr)
- : Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr + Twine(=
'-') +
- EnvironmentStr).str()), Arch(InvalidArch) {
- }
+ const Twine &EnvironmentStr);
=20
/// @}
/// @name Normalization
@@ -164,22 +154,13 @@
/// @{
=20
/// getArch - Get the parsed architecture type of this triple.
- ArchType getArch() const {
- if (!isInitialized()) Parse();
- return Arch;
- }
+ ArchType getArch() const { return Arch; }
=20
/// getVendor - Get the parsed vendor type of this triple.
- VendorType getVendor() const {
- if (!isInitialized()) Parse();
- return Vendor;
- }
+ VendorType getVendor() const { return Vendor; }
=20
/// getOS - Get the parsed operating system type of this triple.
- OSType getOS() const {
- if (!isInitialized()) Parse();
- return OS;
- }
+ OSType getOS() const { return OS; }
=20
/// hasEnvironment - Does this triple have the optional environment
/// (fourth) component?
@@ -188,11 +169,31 @@
}
=20
/// getEnvironment - Get the parsed environment type of this triple.
- EnvironmentType getEnvironment() const {
- if (!isInitialized()) Parse();
- return Environment;
+ EnvironmentType getEnvironment() const { return Environment; }
+
+ /// getOSVersion - Parse the version number from the OS name component o=
f the
+ /// triple, if present.
+ ///
+ /// For example, "fooos1.2.3" would return (1, 2, 3).
+ ///
+ /// If an entry is not defined, it will be returned as 0.
+ void getOSVersion(unsigned &Major, unsigned &Minor, unsigned &Micro) con=
st;
+
+ /// getOSMajorVersion - Return just the major version number, this is
+ /// specialized because it is a common query.
+ unsigned getOSMajorVersion() const {
+ unsigned Maj, Min, Micro;
+ getOSVersion(Maj, Min, Micro);
+ return Maj;
}
=20
+ /// getMacOSXVersion - Parse the version number as with getOSVersion and=
then
+ /// translate generic "darwin" versions to the corresponding OS X versio=
ns.
+ /// This may also be called with IOS triples but the OS X version number=
is
+ /// just set to a constant 10.4.0 in that case. Returns true if success=
ful.
+ bool getMacOSXVersion(unsigned &Major, unsigned &Minor,
+ unsigned &Micro) const;
+
/// @}
/// @name Direct Component Access
/// @{
@@ -221,21 +222,28 @@
/// if the environment component is present).
StringRef getOSAndEnvironmentName() const;
=20
- /// getOSVersion - Parse the version number from the OS name component o=
f the
- /// triple, if present.
+ /// @}
+ /// @name Convenience Predicates
+ /// @{
+
+ /// \brief Test whether the architecture is 64-bit
///
- /// For example, "fooos1.2.3" would return (1, 2, 3).
+ /// Note that this tests for 64-bit pointer width, and nothing else. Note
+ /// that we intentionally expose only three predicates, 64-bit, 32-bit, =
and
+ /// 16-bit. The inner details of pointer width for particular architectu=
res
+ /// is not summed up in the triple, and so only a coarse grained predica=
te
+ /// system is provided.
+ bool isArch64Bit() const;
+
+ /// \brief Test whether the architecture is 32-bit
///
- /// If an entry is not defined, it will be returned as 0.
- void getOSVersion(unsigned &Major, unsigned &Minor, unsigned &Micro) con=
st;
+ /// Note that this tests for 32-bit pointer width, and nothing else.
+ bool isArch32Bit() const;
=20
- /// getOSMajorVersion - Return just the major version number, this is
- /// specialized because it is a common query.
- unsigned getOSMajorVersion() const {
- unsigned Maj, Min, Micro;
- getOSVersion(Maj, Min, Micro);
- return Maj;
- }
+ /// \brief Test whether the architecture is 16-bit
+ ///
+ /// Note that this tests for 16-bit pointer width, and nothing else.
+ bool isArch16Bit() const;
=20
/// isOSVersionLT - Helper function for doing comparisons against version
/// numbers included in the target triple.
@@ -254,23 +262,6 @@
return false;
}
=20
- /// isMacOSX - Is this a Mac OS X triple. For legacy reasons, we support=
both
- /// "darwin" and "osx" as OS X triples.
- bool isMacOSX() const {
- return getOS() =3D=3D Triple::Darwin || getOS() =3D=3D Triple::MacOSX;
- }
-
- /// isOSDarwin - Is this a "Darwin" OS (OS X or iOS).
- bool isOSDarwin() const {
- return isMacOSX() || getOS() =3D=3D Triple::IOS;
- }
-
- /// isOSWindows - Is this a "Windows" OS.
- bool isOSWindows() const {
- return getOS() =3D=3D Triple::Win32 || getOS() =3D=3D Triple::Cygwin ||
- getOS() =3D=3D Triple::MinGW32;
- }
-
/// isMacOSXVersionLT - Comparison function for checking OS X version
/// compatibility, which handles supporting skewed version numbering sch=
emes
/// used by the "darwin" triples.
@@ -287,6 +278,43 @@
return isOSVersionLT(Minor + 4, Micro, 0);
}
=20
+ /// isMacOSX - Is this a Mac OS X triple. For legacy reasons, we support=
both
+ /// "darwin" and "osx" as OS X triples.
+ bool isMacOSX() const {
+ return getOS() =3D=3D Triple::Darwin || getOS() =3D=3D Triple::MacOSX;
+ }
+
+ /// isOSDarwin - Is this a "Darwin" OS (OS X or iOS).
+ bool isOSDarwin() const {
+ return isMacOSX() || getOS() =3D=3D Triple::IOS;
+ }
+
+ /// \brief Tests for either Cygwin or MinGW OS
+ bool isOSCygMing() const {
+ return getOS() =3D=3D Triple::Cygwin || getOS() =3D=3D Triple::MinGW32;
+ }
+
+ /// isOSWindows - Is this a "Windows" OS.
+ bool isOSWindows() const {
+ return getOS() =3D=3D Triple::Win32 || isOSCygMing();
+ }
+
+ /// \brief Tests whether the OS uses the ELF binary format.
+ bool isOSBinFormatELF() const {
+ return !isOSDarwin() && !isOSWindows();
+ }
+
+ /// \brief Tests whether the OS uses the COFF binary format.
+ bool isOSBinFormatCOFF() const {
+ return isOSWindows();
+ }
+
+ /// \brief Tests whether the environment is MachO.
+ // FIXME: Should this be an OSBinFormat predicate?
+ bool isEnvironmentMachO() const {
+ return getEnvironment() =3D=3D Triple::MachO || isOSDarwin();
+ }
+
/// @}
/// @name Mutators
/// @{
@@ -335,6 +363,26 @@
const char *getArchNameForAssembler();
=20
/// @}
+ /// @name Helpers to build variants of a particular triple.
+ /// @{
+
+ /// \brief Form a triple with a 32-bit variant of the current architectu=
re.
+ ///
+ /// This can be used to move across "families" of architectures where us=
eful.
+ ///
+ /// \returns A new triple with a 32-bit architecture or an unknown
+ /// architecture if no such variant can be found.
+ llvm::Triple get32BitArchVariant() const;
+
+ /// \brief Form a triple with a 64-bit variant of the current architectu=
re.
+ ///
+ /// This can be used to move across "families" of architectures where us=
eful.
+ ///
+ /// \returns A new triple with a 64-bit architecture or an unknown
+ /// architecture if no such variant can be found.
+ llvm::Triple get64BitArchVariant() const;
+
+ /// @}
/// @name Static helpers for IDs.
/// @{
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Twi=
ne.h
--- a/head/contrib/llvm/include/llvm/ADT/Twine.h Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/llvm/include/llvm/ADT/Twine.h Tue Apr 17 11:51:51 2012 +=
0300
@@ -12,6 +12,7 @@
=20
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cassert>
#include <string>
=20
@@ -425,7 +426,7 @@
StringRef getSingleStringRef() const {
assert(isSingleStringRef() &&"This cannot be had as a single stringr=
ef!");
switch (getLHSKind()) {
- default: assert(0 && "Out of sync with isSingleStringRef");
+ default: llvm_unreachable("Out of sync with isSingleStringRef");
case EmptyKind: return StringRef();
case CStringKind: return StringRef(LHS.cString);
case StdStringKind: return StringRef(*LHS.stdString);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/Val=
ueMap.h
--- a/head/contrib/llvm/include/llvm/ADT/ValueMap.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/include/llvm/ADT/ValueMap.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -35,7 +35,7 @@
=20
namespace llvm {
=20
-template<typename KeyT, typename ValueT, typename Config, typename ValueIn=
foT>
+template<typename KeyT, typename ValueT, typename Config>
class ValueMapCallbackVH;
=20
template<typename DenseMapT, typename KeyT>
@@ -72,13 +72,11 @@
};
=20
/// See the file comment.
-template<typename KeyT, typename ValueT, typename Config =3D ValueMapConfi=
g<KeyT>,
- typename ValueInfoT =3D DenseMapInfo<ValueT> >
+template<typename KeyT, typename ValueT, typename Config =3DValueMapConfig=
<KeyT> >
class ValueMap {
- friend class ValueMapCallbackVH<KeyT, ValueT, Config, ValueInfoT>;
- typedef ValueMapCallbackVH<KeyT, ValueT, Config, ValueInfoT> ValueMapCVH;
- typedef DenseMap<ValueMapCVH, ValueT, DenseMapInfo<ValueMapCVH>,
- ValueInfoT> MapT;
+ friend class ValueMapCallbackVH<KeyT, ValueT, Config>;
+ typedef ValueMapCallbackVH<KeyT, ValueT, Config> ValueMapCVH;
+ typedef DenseMap<ValueMapCVH, ValueT, DenseMapInfo<ValueMapCVH> > MapT;
typedef typename Config::ExtraData ExtraData;
MapT Map;
ExtraData Data;
@@ -190,11 +188,11 @@
=20
// This CallbackVH updates its ValueMap when the contained Value changes,
// according to the user's preferences expressed through the Config object.
-template<typename KeyT, typename ValueT, typename Config, typename ValueIn=
foT>
+template<typename KeyT, typename ValueT, typename Config>
class ValueMapCallbackVH : public CallbackVH {
- friend class ValueMap<KeyT, ValueT, Config, ValueInfoT>;
+ friend class ValueMap<KeyT, ValueT, Config>;
friend struct DenseMapInfo<ValueMapCallbackVH>;
- typedef ValueMap<KeyT, ValueT, Config, ValueInfoT> ValueMapT;
+ typedef ValueMap<KeyT, ValueT, Config> ValueMapT;
typedef typename llvm::remove_pointer<KeyT>::type KeySansPointerT;
=20
ValueMapT *Map;
@@ -244,9 +242,9 @@
}
};
=20
-template<typename KeyT, typename ValueT, typename Config, typename ValueIn=
foT>
-struct DenseMapInfo<ValueMapCallbackVH<KeyT, ValueT, Config, ValueInfoT> >=
{
- typedef ValueMapCallbackVH<KeyT, ValueT, Config, ValueInfoT> VH;
+template<typename KeyT, typename ValueT, typename Config>
+struct DenseMapInfo<ValueMapCallbackVH<KeyT, ValueT, Config> > {
+ typedef ValueMapCallbackVH<KeyT, ValueT, Config> VH;
typedef DenseMapInfo<KeyT> PointerInfo;
=20
static inline VH getEmptyKey() {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/ADT/ili=
st.h
--- a/head/contrib/llvm/include/llvm/ADT/ilist.h Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/llvm/include/llvm/ADT/ilist.h Tue Apr 17 11:51:51 2012 +=
0300
@@ -652,10 +652,6 @@
void push_front(const NodeTy &val) { insert(this->begin(), val); }
void push_back(const NodeTy &val) { insert(this->end(), val); }
=20
- // Special forms of insert...
- template<class InIt> void insert(iterator where, InIt first, InIt last) {
- for (; first !=3D last; ++first) insert(where, *first);
- }
void insert(iterator where, size_type count, const NodeTy &val) {
for (; count !=3D 0; --count) insert(where, val);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/AliasAnalysis.h
--- a/head/contrib/llvm/include/llvm/Analysis/AliasAnalysis.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/AliasAnalysis.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -327,7 +327,7 @@
}
=20
/// doesAccessArgPointees - Return true if functions with the specified
- /// behavior are known to potentially read or write from objects pointed
+ /// behavior are known to potentially read or write from objects pointed
/// to be their pointer-typed arguments (with arbitrary offsets).
///
static bool doesAccessArgPointees(ModRefBehavior MRB) {
@@ -568,6 +568,11 @@
///
bool isIdentifiedObject(const Value *V);
=20
+/// isKnownNonNull - Return true if this pointer couldn't possibly be null=
by
+/// its definition. This returns true for allocas, non-extern-weak global=
s and
+/// byval arguments.
+bool isKnownNonNull(const Value *V);
+
} // End llvm namespace
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/AliasSetTracker.h
--- a/head/contrib/llvm/include/llvm/Analysis/AliasSetTracker.h Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/AliasSetTracker.h Tue Apr 17 =
11:51:51 2012 +0300
@@ -264,6 +264,7 @@
}
void setVolatile() { Volatile =3D true; }
=20
+public:
/// aliasesPointer - Return true if the specified pointer "may" (or must)
/// alias one of the members in the set.
///
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/BlockFrequencyImpl.h
--- a/head/contrib/llvm/include/llvm/Analysis/BlockFrequencyImpl.h Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/BlockFrequencyImpl.h Tue Apr =
17 11:51:51 2012 +0300
@@ -24,7 +24,6 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include <vector>
-#include <sstream>
#include <string>
=20
namespace llvm {
@@ -41,7 +40,7 @@
template<class BlockT, class FunctionT, class BlockProbInfoT>
class BlockFrequencyImpl {
=20
- DenseMap<BlockT *, BlockFrequency> Freqs;
+ DenseMap<const BlockT *, BlockFrequency> Freqs;
=20
BlockProbInfoT *BPI;
=20
@@ -52,15 +51,16 @@
const uint32_t EntryFreq;
=20
std::string getBlockName(BasicBlock *BB) const {
- return BB->getNameStr();
+ return BB->getName().str();
}
=20
std::string getBlockName(MachineBasicBlock *MBB) const {
- std::stringstream ss;
+ std::string str;
+ raw_string_ostream ss(str);
ss << "BB#" << MBB->getNumber();
=20
if (const BasicBlock *BB =3D MBB->getBasicBlock())
- ss << " derived from LLVM BB " << BB->getNameStr();
+ ss << " derived from LLVM BB " << BB->getName();
=20
return ss.str();
}
@@ -308,8 +308,9 @@
=20
public:
/// getBlockFreq - Return block frequency. Return 0 if we don't have it.
- BlockFrequency getBlockFreq(BlockT *BB) const {
- typename DenseMap<BlockT *, BlockFrequency>::const_iterator I =3D Freq=
s.find(BB);
+ BlockFrequency getBlockFreq(const BlockT *BB) const {
+ typename DenseMap<const BlockT *, BlockFrequency>::const_iterator
+ I =3D Freqs.find(BB);
if (I !=3D Freqs.end())
return I->second;
return 0;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/BlockFrequencyInfo.h
--- a/head/contrib/llvm/include/llvm/Analysis/BlockFrequencyInfo.h Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/BlockFrequencyInfo.h Tue Apr =
17 11:51:51 2012 +0300
@@ -47,7 +47,7 @@
/// that we should not rely on the value itself, but only on the compari=
son to
/// the other block frequencies. We do this to avoid using of floating p=
oints.
///
- BlockFrequency getBlockFreq(BasicBlock *BB) const;
+ BlockFrequency getBlockFreq(const BasicBlock *BB) const;
};
=20
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/BranchProbabilityInfo.h
--- a/head/contrib/llvm/include/llvm/Analysis/BranchProbabilityInfo.h Tue A=
pr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/BranchProbabilityInfo.h Tue A=
pr 17 11:51:51 2012 +0300
@@ -17,13 +17,82 @@
#include "llvm/InitializePasses.h"
#include "llvm/Pass.h"
#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/Support/BranchProbability.h"
=20
namespace llvm {
-
+class LoopInfo;
class raw_ostream;
=20
+/// \brief Analysis pass providing branch probability information.
+///
+/// This is a function analysis pass which provides information on the rel=
ative
+/// probabilities of each "edge" in the function's CFG where such an edge =
is
+/// defined by a pair of basic blocks. The probability for a given block a=
nd
+/// a successor block are always relative to the probabilities of the other
+/// successor blocks. Another way of looking at it is that the probabiliti=
es
+/// for a given block B and each of its successors should sum to exactly
+/// one (100%).
class BranchProbabilityInfo : public FunctionPass {
+public:
+ static char ID;
+
+ BranchProbabilityInfo() : FunctionPass(ID) {
+ initializeBranchProbabilityInfoPass(*PassRegistry::getPassRegistry());
+ }
+
+ void getAnalysisUsage(AnalysisUsage &AU) const;
+ bool runOnFunction(Function &F);
+ void print(raw_ostream &OS, const Module *M =3D 0) const;
+
+ /// \brief Get an edge's probability, relative to other out-edges of the=
Src.
+ ///
+ /// This routine provides access to the fractional probability between z=
ero
+ /// (0%) and one (100%) of this edge executing, relative to other edges
+ /// leaving the 'Src' block. The returned probability is never zero, and=
can
+ /// only be one if the source block has only one successor.
+ BranchProbability getEdgeProbability(const BasicBlock *Src,
+ const BasicBlock *Dst) const;
+
+ /// \brief Test if an edge is hot relative to other out-edges of the Src.
+ ///
+ /// Check whether this edge out of the source block is 'hot'. We define =
hot
+ /// as having a relative probability >=3D 80%.
+ bool isEdgeHot(const BasicBlock *Src, const BasicBlock *Dst) const;
+
+ /// \brief Retrieve the hot successor of a block if one exists.
+ ///
+ /// Given a basic block, look through its successors and if one exists f=
or
+ /// which \see isEdgeHot would return true, return that successor block.
+ BasicBlock *getHotSucc(BasicBlock *BB) const;
+
+ /// \brief Print an edge's probability.
+ ///
+ /// Retrieves an edge's probability similarly to \see getEdgeProbability=
, but
+ /// then prints that probability to the provided stream. That stream is =
then
+ /// returned.
+ raw_ostream &printEdgeProbability(raw_ostream &OS, const BasicBlock *Src,
+ const BasicBlock *Dst) const;
+
+ /// \brief Get the raw edge weight calculated for the block pair.
+ ///
+ /// This returns the raw edge weight. It is guaranteed to fall between 1=
and
+ /// UINT32_MAX. Note that the raw edge weight is not meaningful in isola=
tion.
+ /// This interface should be very carefully, and primarily by routines t=
hat
+ /// are updating the analysis by later calling setEdgeWeight.
+ uint32_t getEdgeWeight(const BasicBlock *Src, const BasicBlock *Dst) con=
st;
+
+ /// \brief Set the raw edge weight for the block pair.
+ ///
+ /// This allows a pass to explicitly set the edge weight for a block. It=
can
+ /// be used when updating the CFG to update and preserve the branch
+ /// probability information. Read the implementation of how these edge
+ /// weights are calculated carefully before using!
+ void setEdgeWeight(const BasicBlock *Src, const BasicBlock *Dst,
+ uint32_t Weight);
+
+private:
+ typedef std::pair<const BasicBlock *, const BasicBlock *> Edge;
=20
// Default weight value. Used when we don't have information about the e=
dge.
// TODO: DEFAULT_WEIGHT makes sense during static predication, when none=
of
@@ -33,49 +102,26 @@
// weight to just "inherit" the non-zero weight of an adjacent successor.
static const uint32_t DEFAULT_WEIGHT =3D 16;
=20
- typedef std::pair<const BasicBlock *, const BasicBlock *> Edge;
-
DenseMap<Edge, uint32_t> Weights;
=20
- // Get sum of the block successors' weights.
+ /// \brief Handle to the LoopInfo analysis.
+ LoopInfo *LI;
+
+ /// \brief Track the last function we run over for printing.
+ Function *LastF;
+
+ /// \brief Track the set of blocks directly succeeded by a returning blo=
ck.
+ SmallPtrSet<BasicBlock *, 16> PostDominatedByUnreachable;
+
+ /// \brief Get sum of the block successors' weights.
uint32_t getSumForBlock(const BasicBlock *BB) const;
=20
-public:
- static char ID;
-
- BranchProbabilityInfo() : FunctionPass(ID) {
- initializeBranchProbabilityInfoPass(*PassRegistry::getPassRegistry());
- }
-
- void getAnalysisUsage(AnalysisUsage &AU) const;
-
- bool runOnFunction(Function &F);
-
- // Returned value is between 1 and UINT32_MAX. Look at
- // BranchProbabilityInfo.cpp for details.
- uint32_t getEdgeWeight(const BasicBlock *Src, const BasicBlock *Dst) con=
st;
-
- // Look at BranchProbabilityInfo.cpp for details. Use it with caution!
- void setEdgeWeight(const BasicBlock *Src, const BasicBlock *Dst,
- uint32_t Weight);
-
- // A 'Hot' edge is an edge which probability is >=3D 80%.
- bool isEdgeHot(const BasicBlock *Src, const BasicBlock *Dst) const;
-
- // Return a hot successor for the block BB or null if there isn't one.
- BasicBlock *getHotSucc(BasicBlock *BB) const;
-
- // Return a probability as a fraction between 0 (0% probability) and
- // 1 (100% probability), however the value is never equal to 0, and can =
be 1
- // only iff SRC block has only one successor.
- BranchProbability getEdgeProbability(const BasicBlock *Src,
- const BasicBlock *Dst) const;
-
- // Print value between 0 (0% probability) and 1 (100% probability),
- // however the value is never equal to 0, and can be 1 only iff SRC block
- // has only one successor.
- raw_ostream &printEdgeProbability(raw_ostream &OS, BasicBlock *Src,
- BasicBlock *Dst) const;
+ bool calcUnreachableHeuristics(BasicBlock *BB);
+ bool calcMetadataWeights(BasicBlock *BB);
+ bool calcPointerHeuristics(BasicBlock *BB);
+ bool calcLoopBranchHeuristics(BasicBlock *BB);
+ bool calcZeroHeuristics(BasicBlock *BB);
+ bool calcFloatingPointHeuristics(BasicBlock *BB);
};
=20
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/CFGPrinter.h
--- a/head/contrib/llvm/include/llvm/Analysis/CFGPrinter.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/CFGPrinter.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -29,13 +29,13 @@
DOTGraphTraits (bool isSimple=3Dfalse) : DefaultDOTGraphTraits(isSimple)=
{}
=20
static std::string getGraphName(const Function *F) {
- return "CFG for '" + F->getNameStr() + "' function";
+ return "CFG for '" + F->getName().str() + "' function";
}
=20
static std::string getSimpleNodeLabel(const BasicBlock *Node,
- const Function *Graph) {
+ const Function *) {
if (!Node->getName().empty())
- return Node->getNameStr();=20
+ return Node->getName().str();
=20
std::string Str;
raw_string_ostream OS(Str);
@@ -45,7 +45,7 @@
}
=20
static std::string getCompleteNodeLabel(const BasicBlock *Node,=20
- const Function *Graph) {
+ const Function *) {
std::string Str;
raw_string_ostream OS(Str);
=20
@@ -95,7 +95,9 @@
=20
std::string Str;
raw_string_ostream OS(Str);
- OS << SI->getCaseValue(SuccNo)->getValue();
+ SwitchInst::ConstCaseIt Case =3D
+ SwitchInst::ConstCaseIt::fromSuccessorIndex(SI, SuccNo);=20
+ OS << Case.getCaseValue()->getValue();
return OS.str();
} =20
return "";
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/CaptureTracking.h
--- a/head/contrib/llvm/include/llvm/Analysis/CaptureTracking.h Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/CaptureTracking.h Tue Apr 17 =
11:51:51 2012 +0300
@@ -14,9 +14,12 @@
#ifndef LLVM_ANALYSIS_CAPTURETRACKING_H
#define LLVM_ANALYSIS_CAPTURETRACKING_H
=20
+#include "llvm/Constants.h"
+#include "llvm/Instructions.h"
+#include "llvm/Analysis/AliasAnalysis.h"
+#include "llvm/Support/CallSite.h"
+
namespace llvm {
- class Value;
-
/// PointerMayBeCaptured - Return true if this pointer value may be capt=
ured
/// by the enclosing function (which is required to exist). This routin=
e can
/// be expensive, so consider caching the results. The boolean ReturnCa=
ptures
@@ -28,6 +31,33 @@
bool ReturnCaptures,
bool StoreCaptures);
=20
+ /// This callback is used in conjunction with PointerMayBeCaptured. In
+ /// addition to the interface here, you'll need to provide your own gett=
ers
+ /// to see whether anything was captured.
+ struct CaptureTracker {
+ virtual ~CaptureTracker();
+
+ /// tooManyUses - The depth of traversal has breached a limit. There m=
ay be
+ /// capturing instructions that will not be passed into captured().
+ virtual void tooManyUses() =3D 0;
+
+ /// shouldExplore - This is the use of a value derived from the pointe=
r.
+ /// To prune the search (ie., assume that none of its users could poss=
ibly
+ /// capture) return false. To search it, return true.
+ ///
+ /// U->getUser() is always an Instruction.
+ virtual bool shouldExplore(Use *U) =3D 0;
+
+ /// captured - Information about the pointer was captured by the user =
of
+ /// use U. Return true to stop the traversal or false to continue look=
ing
+ /// for more capturing instructions.
+ virtual bool captured(Use *U) =3D 0;
+ };
+
+ /// PointerMayBeCaptured - Visit the value and the values derived from i=
t and
+ /// find values which appear to be capturing the pointer value. This fee=
ds
+ /// results into and is controlled by the CaptureTracker object.
+ void PointerMayBeCaptured(const Value *V, CaptureTracker *Tracker);
} // end namespace llvm
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/CodeMetrics.h
--- a/head/contrib/llvm/include/llvm/Analysis/CodeMetrics.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/CodeMetrics.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -1,4 +1,4 @@
-//=3D=3D=3D- CodeMetrics.h - Measures the weight of a function---------*- =
C++ -*-=3D=3D=3D//
+//=3D=3D=3D- CodeMetrics.h - Code cost measurements -------------------*- =
C++ -*-=3D=3D=3D//
//
// The LLVM Compiler Infrastructure
//
@@ -18,80 +18,75 @@
#include "llvm/ADT/DenseMap.h"
=20
namespace llvm {
+ class BasicBlock;
+ class Function;
+ class Instruction;
+ class TargetData;
+ class Value;
=20
- class TargetData;
+ /// \brief Check whether an instruction is likely to be "free" when lowe=
red.
+ bool isInstructionFree(const Instruction *I, const TargetData *TD =3D 0);
=20
- // CodeMetrics - Calculate size and a few similar metrics for a set of
- // basic blocks.
+ /// \brief Check whether a call will lower to something small.
+ ///
+ /// This tests checks whether calls to this function will lower to somet=
hing
+ /// significantly cheaper than a traditional call, often a single
+ /// instruction.
+ bool callIsSmall(const Function *F);
+
+ /// \brief Utility to calculate the size and a few similar metrics for a=
set
+ /// of basic blocks.
struct CodeMetrics {
- /// NeverInline - True if this callee should never be inlined into a
- /// caller.
- // bool NeverInline;
+ /// \brief True if this function contains a call to setjmp or other fu=
nctions
+ /// with attribute "returns twice" without having the attribute itself.
+ bool exposesReturnsTwice;
=20
- // True if this function contains a call to setjmp or _setjmp
- bool callsSetJmp;
-
- // True if this function calls itself
+ /// \brief True if this function calls itself.
bool isRecursive;
=20
- // True if this function contains one or more indirect branches
+ /// \brief True if this function contains one or more indirect branche=
s.
bool containsIndirectBr;
=20
- /// usesDynamicAlloca - True if this function calls alloca (in the C s=
ense).
+ /// \brief True if this function calls alloca (in the C sense).
bool usesDynamicAlloca;
=20
- /// NumInsts, NumBlocks - Keep track of how large each function is, wh=
ich
- /// is used to estimate the code size cost of inlining it.
- unsigned NumInsts, NumBlocks;
+ /// \brief Number of instructions in the analyzed blocks.
+ unsigned NumInsts;
=20
- /// NumBBInsts - Keeps track of basic block code size estimates.
+ /// \brief Number of analyzed blocks.
+ unsigned NumBlocks;
+
+ /// \brief Keeps track of basic block code size estimates.
DenseMap<const BasicBlock *, unsigned> NumBBInsts;
=20
- /// NumCalls - Keep track of the number of calls to 'big' functions.
+ /// \brief Keep track of the number of calls to 'big' functions.
unsigned NumCalls;
=20
- /// NumInlineCandidates - Keep track of the number of calls to internal
- /// functions with only a single caller. These are likely targets for
- /// future inlining, likely exposed by interleaved devirtualization.
+ /// \brief The number of calls to internal functions with a single cal=
ler.
+ ///
+ /// These are likely targets for future inlining, likely exposed by
+ /// interleaved devirtualization.
unsigned NumInlineCandidates;
=20
- /// NumVectorInsts - Keep track of how many instructions produce vector
- /// values. The inliner is being more aggressive with inlining vector
- /// kernels.
+ /// \brief How many instructions produce vector values.
+ ///
+ /// The inliner is more aggressive with inlining vector kernels.
unsigned NumVectorInsts;
=20
- /// NumRets - Keep track of how many Ret instructions the block contai=
ns.
+ /// \brief How many 'ret' instructions the blocks contain.
unsigned NumRets;
=20
- CodeMetrics() : callsSetJmp(false), isRecursive(false),
+ CodeMetrics() : exposesReturnsTwice(false), isRecursive(false),
containsIndirectBr(false), usesDynamicAlloca(false),
NumInsts(0), NumBlocks(0), NumCalls(0),
NumInlineCandidates(0), NumVectorInsts(0),
NumRets(0) {}
=20
- /// analyzeBasicBlock - Add information about the specified basic block
- /// to the current structure.
+ /// \brief Add information about a block to the current state.
void analyzeBasicBlock(const BasicBlock *BB, const TargetData *TD =3D =
0);
=20
- /// analyzeFunction - Add information about the specified function
- /// to the current structure.
+ /// \brief Add information about a function to the current state.
void analyzeFunction(Function *F, const TargetData *TD =3D 0);
-
- /// CountCodeReductionForConstant - Figure out an approximation for how
- /// many instructions will be constant folded if the specified value is
- /// constant.
- unsigned CountCodeReductionForConstant(Value *V);
-
- /// CountBonusForConstant - Figure out an approximation for how much
- /// per-call performance boost we can expect if the specified value is
- /// constant.
- unsigned CountBonusForConstant(Value *V);
-
- /// CountCodeReductionForAlloca - Figure out an approximation of how m=
uch
- /// smaller the function will be if it is inlined into a context where=
an
- /// argument becomes an alloca.
- ///
- unsigned CountCodeReductionForAlloca(Value *V);
};
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/ConstantFolding.h
--- a/head/contrib/llvm/include/llvm/Analysis/ConstantFolding.h Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/ConstantFolding.h Tue Apr 17 =
11:51:51 2012 +0300
@@ -25,6 +25,7 @@
class ConstantExpr;
class Instruction;
class TargetData;
+ class TargetLibraryInfo;
class Function;
class Type;
template<typename T>
@@ -35,13 +36,15 @@
/// Note that this fails if not all of the operands are constant. Otherwi=
se,
/// this function can only fail when attempting to fold instructions like =
loads
/// and stores, which have no constant expression form.
-Constant *ConstantFoldInstruction(Instruction *I, const TargetData *TD =3D=
0);
+Constant *ConstantFoldInstruction(Instruction *I, const TargetData *TD =3D=
0,
+ const TargetLibraryInfo *TLI =3D 0);
=20
/// ConstantFoldConstantExpression - Attempt to fold the constant expressi=
on
/// using the specified TargetData. If successful, the constant result is
/// result is returned, if not, null is returned.
Constant *ConstantFoldConstantExpression(const ConstantExpr *CE,
- const TargetData *TD =3D 0);
+ const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D =
0);
=20
/// ConstantFoldInstOperands - Attempt to constant fold an instruction wit=
h the
/// specified operands. If successful, the constant result is returned, i=
f not,
@@ -51,7 +54,8 @@
///
Constant *ConstantFoldInstOperands(unsigned Opcode, Type *DestTy,
ArrayRef<Constant *> Ops,
- const TargetData *TD =3D 0);
+ const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D 0);
=20
/// ConstantFoldCompareInstOperands - Attempt to constant fold a compare
/// instruction (icmp/fcmp) with the specified operands. If it fails, it
@@ -59,7 +63,8 @@
///
Constant *ConstantFoldCompareInstOperands(unsigned Predicate,
Constant *LHS, Constant *RHS,
- const TargetData *TD =3D 0);
+ const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D=
0);
=20
/// ConstantFoldInsertValueInstruction - Attempt to constant fold an inser=
tvalue
/// instruction with the specified operands and indices. The constant res=
ult is
@@ -76,15 +81,22 @@
/// getelementptr constantexpr, return the constant value being addressed =
by the
/// constant expression, or null if something is funny and we can't decide.
Constant *ConstantFoldLoadThroughGEPConstantExpr(Constant *C, ConstantExpr=
*CE);
- =20
+
+/// ConstantFoldLoadThroughGEPIndices - Given a constant and getelementptr
+/// indices (with an *implied* zero pointer index that is not in the list),
+/// return the constant value being addressed by a virtual load, or null if
+/// something is funny and we can't decide.
+Constant *ConstantFoldLoadThroughGEPIndices(Constant *C,
+ ArrayRef<Constant*> Indices);
+
/// canConstantFoldCallTo - Return true if its even possible to fold a cal=
l to
/// the specified function.
bool canConstantFoldCallTo(const Function *F);
=20
/// ConstantFoldCall - Attempt to constant fold a call to the specified fu=
nction
/// with the specified arguments, returning null if unsuccessful.
-Constant *
-ConstantFoldCall(Function *F, ArrayRef<Constant *> Operands);
+Constant *ConstantFoldCall(Function *F, ArrayRef<Constant *> Operands,
+ const TargetLibraryInfo *TLI =3D 0);
}
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/DIBuilder.h
--- a/head/contrib/llvm/include/llvm/Analysis/DIBuilder.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/DIBuilder.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -42,6 +42,7 @@
class DISubprogram;
class DITemplateTypeParameter;
class DITemplateValueParameter;
+ class DIObjCProperty;
=20
class DIBuilder {
private:
@@ -190,6 +191,39 @@
StringRef PropertySetterName =3D StringRef(),
unsigned PropertyAttributes =3D 0);
=20
+ /// createObjCIVar - Create debugging information entry for Objective-C
+ /// instance variable.
+ /// @param Name Member name.
+ /// @param File File where this member is defined.
+ /// @param LineNo Line number.
+ /// @param SizeInBits Member size.
+ /// @param AlignInBits Member alignment.
+ /// @param OffsetInBits Member offset.
+ /// @param Flags Flags to encode member attribute, e.g. private
+ /// @param Ty Parent type.
+ /// @param Property Property associated with this ivar.
+ DIType createObjCIVar(StringRef Name, DIFile File,
+ unsigned LineNo, uint64_t SizeInBits,=20
+ uint64_t AlignInBits, uint64_t OffsetInBits,=20
+ unsigned Flags, DIType Ty,
+ MDNode *PropertyNode);
+
+ /// createObjCProperty - Create debugging information entry for Object=
ive-C
+ /// property.
+ /// @param Name Property name.
+ /// @param File File where this property is defined.
+ /// @param LineNumber Line number.
+ /// @param GetterName Name of the Objective C property getter select=
or.
+ /// @param SetterName Name of the Objective C property setter select=
or.
+ /// @param PropertyAttributes Objective C property attributes.
+ /// @param Ty Type.
+ DIObjCProperty createObjCProperty(StringRef Name,
+ DIFile File, unsigned LineNumber,
+ StringRef GetterName,
+ StringRef SetterName,
+ unsigned PropertyAttributes,
+ DIType Ty);
+ =20
/// createClassType - Create debugging information entry for a class.
/// @param Scope Scope in which this class is defined.
/// @param Name class name.
@@ -313,6 +347,10 @@
DIType createTemporaryType();
DIType createTemporaryType(DIFile F);
=20
+ /// createForwardDecl - Create a temporary forward-declared type.
+ DIType createForwardDecl(unsigned Tag, StringRef Name, DIFile F,
+ unsigned Line, unsigned RuntimeLang =3D 0);
+
/// retainType - Retain DIType in a module even if it is not reference=
d=20
/// through debug info anchors.
void retainType(DIType T);
@@ -407,6 +445,7 @@
/// @param Ty Function type.
/// @param isLocalToUnit True if this function is not externally visib=
le..
/// @param isDefinition True if this is a function definition.
+ /// @param ScopeLine Set to the beginning of the scope this starts
/// @param Flags e.g. is this function prototyped or not.
/// This flags are used to emit dwarf attributes.
/// @param isOptimized True if optimization is ON.
@@ -417,6 +456,7 @@
DIFile File, unsigned LineNo,
DIType Ty, bool isLocalToUnit,
bool isDefinition,
+ unsigned ScopeLine,
unsigned Flags =3D 0,
bool isOptimized =3D false,
Function *Fn =3D 0,
@@ -470,7 +510,7 @@
/// @param Scope Lexical block.
/// @param File Source file.
DILexicalBlockFile createLexicalBlockFile(DIDescriptor Scope,
- DIFile File);
+ DIFile File);
=20
/// createLexicalBlock - This creates a descriptor for a lexical block
/// with the specified parent context.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/DOTGraphTraitsPass.h
--- a/head/contrib/llvm/include/llvm/Analysis/DOTGraphTraitsPass.h Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/DOTGraphTraitsPass.h Tue Apr =
17 11:51:51 2012 +0300
@@ -31,7 +31,7 @@
std::string Title, GraphName;
Graph =3D &getAnalysis<Analysis>();
GraphName =3D DOTGraphTraits<Analysis*>::getGraphName(Graph);
- Title =3D GraphName + " for '" + F.getNameStr() + "' function";
+ Title =3D GraphName + " for '" + F.getName().str() + "' function";
ViewGraph(Graph, Name, Simple, Title);
=20
return false;
@@ -55,7 +55,7 @@
=20
virtual bool runOnFunction(Function &F) {
Analysis *Graph;
- std::string Filename =3D Name + "." + F.getNameStr() + ".dot";
+ std::string Filename =3D Name + "." + F.getName().str() + ".dot";
errs() << "Writing '" << Filename << "'...";
=20
std::string ErrorInfo;
@@ -64,7 +64,7 @@
=20
std::string Title, GraphName;
GraphName =3D DOTGraphTraits<Analysis*>::getGraphName(Graph);
- Title =3D GraphName + " for '" + F.getNameStr() + "' function";
+ Title =3D GraphName + " for '" + F.getName().str() + "' function";
=20
if (ErrorInfo.empty())
WriteGraph(File, Graph, Simple, Title);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/DebugInfo.h
--- a/head/contrib/llvm/include/llvm/Analysis/DebugInfo.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/DebugInfo.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -43,6 +43,7 @@
class DILexicalBlockFile;
class DIVariable;
class DIType;
+ class DIObjCProperty;
=20
/// DIDescriptor - A thin wraper around MDNode to access encoded debug i=
nfo.
/// This should not be stored in a container, because underly MDNode may
@@ -128,6 +129,7 @@
bool isUnspecifiedParameter() const;
bool isTemplateTypeParameter() const;
bool isTemplateValueParameter() const;
+ bool isObjCProperty() const;
};
=20
/// DISubrange - This is used to represent ranges, for array bounds.
@@ -135,8 +137,8 @@
public:
explicit DISubrange(const MDNode *N =3D 0) : DIDescriptor(N) {}
=20
- int64_t getLo() const { return (int64_t)getUInt64Field(1); }
- int64_t getHi() const { return (int64_t)getUInt64Field(2); }
+ uint64_t getLo() const { return getUInt64Field(1); }
+ uint64_t getHi() const { return getUInt64Field(2); }
};
=20
/// DIArray - This descriptor holds an array of descriptors.
@@ -153,6 +155,7 @@
=20
/// DIScope - A base class for various scopes.
class DIScope : public DIDescriptor {
+ virtual void anchor();
public:
explicit DIScope(const MDNode *N =3D 0) : DIDescriptor (N) {}
virtual ~DIScope() {}
@@ -163,6 +166,7 @@
=20
/// DICompileUnit - A wrapper for a compile unit.
class DICompileUnit : public DIScope {
+ virtual void anchor();
public:
explicit DICompileUnit(const MDNode *N =3D 0) : DIScope(N) {}
=20
@@ -202,6 +206,7 @@
=20
/// DIFile - This is a wrapper for a file.
class DIFile : public DIScope {
+ virtual void anchor();
public:
explicit DIFile(const MDNode *N =3D 0) : DIScope(N) {
if (DbgNode && !isFile())
@@ -230,7 +235,7 @@
/// FIXME: Types should be factored much better so that CV qualifiers and
/// others do not require a huge and empty descriptor full of zeros.
class DIType : public DIScope {
- public:
+ virtual void anchor();
protected:
// This ctor is used when the Tag has already been validated by a deri=
ved
// ctor.
@@ -240,7 +245,6 @@
=20
/// Verify - Verify that a type descriptor is well formed.
bool Verify() const;
- public:
explicit DIType(const MDNode *N);
explicit DIType() {}
virtual ~DIType() {}
@@ -320,6 +324,7 @@
=20
/// DIBasicType - A basic type, like 'int' or 'float'.
class DIBasicType : public DIType {
+ virtual void anchor();
public:
explicit DIBasicType(const MDNode *N =3D 0) : DIType(N) {}
=20
@@ -338,6 +343,7 @@
/// DIDerivedType - A simple derived type, like a const qualified type,
/// a typedef, a pointer or reference, etc.
class DIDerivedType : public DIType {
+ virtual void anchor();
protected:
explicit DIDerivedType(const MDNode *N, bool, bool)
: DIType(N, true, true) {}
@@ -351,29 +357,45 @@
/// return base type size.
uint64_t getOriginalTypeSize() const;
=20
- StringRef getObjCPropertyName() const { return getStringField(10); }
+ /// getObjCProperty - Return property node, if this ivar is=20
+ /// associated with one.
+ MDNode *getObjCProperty() const;
+
+ StringRef getObjCPropertyName() const {=20
+ if (getVersion() > LLVMDebugVersion11)
+ return StringRef();
+ return getStringField(10);=20
+ }
StringRef getObjCPropertyGetterName() const {
+ assert (getVersion() <=3D LLVMDebugVersion11 && "Invalid Request");
return getStringField(11);
}
StringRef getObjCPropertySetterName() const {
+ assert (getVersion() <=3D LLVMDebugVersion11 && "Invalid Request");
return getStringField(12);
}
bool isReadOnlyObjCProperty() {
+ assert (getVersion() <=3D LLVMDebugVersion11 && "Invalid Request");
return (getUnsignedField(13) & dwarf::DW_APPLE_PROPERTY_readonly) !=
=3D 0;
}
bool isReadWriteObjCProperty() {
+ assert (getVersion() <=3D LLVMDebugVersion11 && "Invalid Request");
return (getUnsignedField(13) & dwarf::DW_APPLE_PROPERTY_readwrite) !=
=3D 0;
}
bool isAssignObjCProperty() {
+ assert (getVersion() <=3D LLVMDebugVersion11 && "Invalid Request");
return (getUnsignedField(13) & dwarf::DW_APPLE_PROPERTY_assign) !=3D=
0;
}
bool isRetainObjCProperty() {
+ assert (getVersion() <=3D LLVMDebugVersion11 && "Invalid Request");
return (getUnsignedField(13) & dwarf::DW_APPLE_PROPERTY_retain) !=3D=
0;
}
bool isCopyObjCProperty() {
+ assert (getVersion() <=3D LLVMDebugVersion11 && "Invalid Request");
return (getUnsignedField(13) & dwarf::DW_APPLE_PROPERTY_copy) !=3D 0;
}
bool isNonAtomicObjCProperty() {
+ assert (getVersion() <=3D LLVMDebugVersion11 && "Invalid Request");
return (getUnsignedField(13) & dwarf::DW_APPLE_PROPERTY_nonatomic) !=
=3D 0;
}
=20
@@ -391,6 +413,7 @@
/// other types, like a function or struct.
/// FIXME: Why is this a DIDerivedType??
class DICompositeType : public DIDerivedType {
+ virtual void anchor();
public:
explicit DICompositeType(const MDNode *N =3D 0)
: DIDerivedType(N, true, true) {
@@ -454,6 +477,7 @@
=20
/// DISubprogram - This is a wrapper for a subprogram (e.g. a function).
class DISubprogram : public DIScope {
+ virtual void anchor();
public:
explicit DISubprogram(const MDNode *N =3D 0) : DIScope(N) {}
=20
@@ -495,6 +519,7 @@
DICompositeType getContainingType() const {
return getFieldAs<DICompositeType>(13);
}
+
unsigned isArtificial() const {=20
if (getVersion() <=3D llvm::LLVMDebugVersion8)
return getUnsignedField(14);=20
@@ -543,6 +568,11 @@
return getFieldAs<DIFile>(6).getDirectory();=20
}
=20
+ /// getScopeLineNumber - Get the beginning of the scope of the
+ /// function, not necessarily where the name of the program
+ /// starts.
+ unsigned getScopeLineNumber() const { return getUnsignedField(20); }
+
/// Verify - Verify that a subprogram descriptor is well formed.
bool Verify() const;
=20
@@ -621,7 +651,7 @@
=20
DIScope getContext() const { return getFieldAs<DIScope>(1); }
StringRef getName() const { return getStringField(2); }
- DICompileUnit getCompileUnit() const{=20
+ DICompileUnit getCompileUnit() const {=20
assert (getVersion() <=3D LLVMDebugVersion10 && "Invalid getCompileU=
nit!");
if (getVersion() =3D=3D llvm::LLVMDebugVersion7)
return getFieldAs<DICompileUnit>(3);
@@ -687,6 +717,7 @@
=20
/// DILexicalBlock - This is a wrapper for a lexical block.
class DILexicalBlock : public DIScope {
+ virtual void anchor();
public:
explicit DILexicalBlock(const MDNode *N =3D 0) : DIScope(N) {}
DIScope getContext() const { return getFieldAs<DIScope>(1); =
}
@@ -705,6 +736,7 @@
/// DILexicalBlockFile - This is a wrapper for a lexical block with
/// a filename change.
class DILexicalBlockFile : public DIScope {
+ virtual void anchor();
public:
explicit DILexicalBlockFile(const MDNode *N =3D 0) : DIScope(N) {}
DIScope getContext() const { return getScope().getContext(); }
@@ -724,6 +756,7 @@
=20
/// DINameSpace - A wrapper for a C++ style name space.
class DINameSpace : public DIScope {=20
+ virtual void anchor();
public:
explicit DINameSpace(const MDNode *N =3D 0) : DIScope(N) {}
DIScope getContext() const { return getFieldAs<DIScope>(1); }
@@ -760,6 +793,51 @@
bool Verify() const;
};
=20
+ class DIObjCProperty : public DIDescriptor {
+ public:
+ explicit DIObjCProperty(const MDNode *N) : DIDescriptor(N) { }
+
+ StringRef getObjCPropertyName() const { return getStringField(1); }
+ DIFile getFile() const { return getFieldAs<DIFile>(2); }
+ unsigned getLineNumber() const { return getUnsignedField(3); }
+
+ StringRef getObjCPropertyGetterName() const {
+ return getStringField(4);
+ }
+ StringRef getObjCPropertySetterName() const {
+ return getStringField(5);
+ }
+ bool isReadOnlyObjCProperty() {
+ return (getUnsignedField(6) & dwarf::DW_APPLE_PROPERTY_readonly) !=
=3D 0;
+ }
+ bool isReadWriteObjCProperty() {
+ return (getUnsignedField(6) & dwarf::DW_APPLE_PROPERTY_readwrite) !=
=3D 0;
+ }
+ bool isAssignObjCProperty() {
+ return (getUnsignedField(6) & dwarf::DW_APPLE_PROPERTY_assign) !=3D =
0;
+ }
+ bool isRetainObjCProperty() {
+ return (getUnsignedField(6) & dwarf::DW_APPLE_PROPERTY_retain) !=3D =
0;
+ }
+ bool isCopyObjCProperty() {
+ return (getUnsignedField(6) & dwarf::DW_APPLE_PROPERTY_copy) !=3D 0;
+ }
+ bool isNonAtomicObjCProperty() {
+ return (getUnsignedField(6) & dwarf::DW_APPLE_PROPERTY_nonatomic) !=
=3D 0;
+ }
+
+ DIType getType() const { return getFieldAs<DIType>(7); }
+
+ /// Verify - Verify that a derived type descriptor is well formed.
+ bool Verify() const;
+
+ /// print - print derived type.
+ void print(raw_ostream &OS) const;
+
+ /// dump - print derived type to dbgs() with a newline.
+ void dump() const;
+ };
+
/// getDISubprogram - Find subprogram that is enclosing this scope.
DISubprogram getDISubprogram(const MDNode *Scope);
=20
@@ -816,7 +894,7 @@
/// addGlobalVariable - Add global variable into GVs.
bool addGlobalVariable(DIGlobalVariable DIG);
=20
- // addSubprogram - Add subprgoram into SPs.
+ // addSubprogram - Add subprogram into SPs.
bool addSubprogram(DISubprogram SP);
=20
/// addType - Add type into Tys.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/DominanceFrontier.h
--- a/head/contrib/llvm/include/llvm/Analysis/DominanceFrontier.h Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/DominanceFrontier.h Tue Apr 1=
7 11:51:51 2012 +0300
@@ -154,6 +154,7 @@
/// used to compute a forward dominator frontiers.
///
class DominanceFrontier : public DominanceFrontierBase {
+ virtual void anchor();
public:
static char ID; // Pass ID, replacement for typeid
DominanceFrontier() :
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/DominatorInternals.h
--- a/head/contrib/llvm/include/llvm/Analysis/DominatorInternals.h Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/DominatorInternals.h Tue Apr =
17 11:51:51 2012 +0300
@@ -171,7 +171,7 @@
=20
// it might be that some blocks did not get a DFS number (e.g., blocks o=
f=20
// infinite loops). In these cases an artificial exit node is required.
- MultipleRoots |=3D (DT.isPostDominator() && N !=3D F.size());
+ MultipleRoots |=3D (DT.isPostDominator() && N !=3D GraphTraits<FuncT*>::=
size(&F));
=20
// When naively implemented, the Lengauer-Tarjan algorithm requires a se=
parate
// bucket for each vertex. However, this is unnecessary, because each ve=
rtex
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/Dominators.h
--- a/head/contrib/llvm/include/llvm/Analysis/Dominators.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/Dominators.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -185,6 +185,18 @@
=20
template<class NodeT>
class DominatorTreeBase : public DominatorBase<NodeT> {
+ bool dominatedBySlowTreeWalk(const DomTreeNodeBase<NodeT> *A,
+ const DomTreeNodeBase<NodeT> *B) const {
+ assert(A !=3D B);
+ assert(isReachableFromEntry(B));
+ assert(isReachableFromEntry(A));
+
+ const DomTreeNodeBase<NodeT> *IDom;
+ while ((IDom =3D B->getIDom()) !=3D 0 && IDom !=3D A && IDom !=3D B)
+ B =3D IDom; // Walk up the tree
+ return IDom !=3D 0;
+ }
+
protected:
typedef DenseMap<NodeT*, DomTreeNodeBase<NodeT>*> DomTreeNodeMapType;
DomTreeNodeMapType DomTreeNodes;
@@ -321,8 +333,7 @@
/// block. This is the same as using operator[] on this class.
///
inline DomTreeNodeBase<NodeT> *getNode(NodeT *BB) const {
- typename DomTreeNodeMapType::const_iterator I =3D DomTreeNodes.find(BB=
);
- return I !=3D DomTreeNodes.end() ? I->second : 0;
+ return DomTreeNodes.lookup(BB);
}
=20
/// getRootNode - This returns the entry node for the CFG of the functio=
n. If
@@ -339,38 +350,26 @@
/// Note that this is not a constant time operation!
///
bool properlyDominates(const DomTreeNodeBase<NodeT> *A,
- const DomTreeNodeBase<NodeT> *B) const {
- if (A =3D=3D 0 || B =3D=3D 0) return false;
- return dominatedBySlowTreeWalk(A, B);
+ const DomTreeNodeBase<NodeT> *B) {
+ if (A =3D=3D 0 || B =3D=3D 0)
+ return false;
+ if (A =3D=3D B)
+ return false;
+ return dominates(A, B);
}
=20
- inline bool properlyDominates(const NodeT *A, const NodeT *B) {
- if (A =3D=3D B)
- return false;
-
- // Cast away the const qualifiers here. This is ok since
- // this function doesn't actually return the values returned
- // from getNode.
- return properlyDominates(getNode(const_cast<NodeT *>(A)),
- getNode(const_cast<NodeT *>(B)));
- }
-
- bool dominatedBySlowTreeWalk(const DomTreeNodeBase<NodeT> *A,
- const DomTreeNodeBase<NodeT> *B) const {
- const DomTreeNodeBase<NodeT> *IDom;
- if (A =3D=3D 0 || B =3D=3D 0) return false;
- while ((IDom =3D B->getIDom()) !=3D 0 && IDom !=3D A && IDom !=3D B)
- B =3D IDom; // Walk up the tree
- return IDom !=3D 0;
- }
-
+ bool properlyDominates(const NodeT *A, const NodeT *B);
=20
/// isReachableFromEntry - Return true if A is dominated by the entry
/// block of the function containing it.
- bool isReachableFromEntry(const NodeT* A) {
+ bool isReachableFromEntry(const NodeT* A) const {
assert(!this->isPostDominator() &&
"This is not implemented for post dominators");
- return dominates(&A->getParent()->front(), A);
+ return isReachableFromEntry(getNode(const_cast<NodeT *>(A)));
+ }
+
+ inline bool isReachableFromEntry(const DomTreeNodeBase<NodeT> *A) const {
+ return A;
}
=20
/// dominates - Returns true iff A dominates B. Note that this is not a
@@ -378,10 +377,16 @@
///
inline bool dominates(const DomTreeNodeBase<NodeT> *A,
const DomTreeNodeBase<NodeT> *B) {
+ // A node trivially dominates itself.
if (B =3D=3D A)
- return true; // A node trivially dominates itself.
+ return true;
=20
- if (A =3D=3D 0 || B =3D=3D 0)
+ // An unreachable node is dominated by anything.
+ if (!isReachableFromEntry(B))
+ return true;
+
+ // And dominates nothing.
+ if (!isReachableFromEntry(A))
return false;
=20
// Compare the result of the tree walk and the dfs numbers, if expensi=
ve
@@ -406,16 +411,7 @@
return dominatedBySlowTreeWalk(A, B);
}
=20
- inline bool dominates(const NodeT *A, const NodeT *B) {
- if (A =3D=3D B)
- return true;
-
- // Cast away the const qualifiers here. This is ok since
- // this function doesn't actually return the values returned
- // from getNode.
- return dominates(getNode(const_cast<NodeT *>(A)),
- getNode(const_cast<NodeT *>(B)));
- }
+ bool dominates(const NodeT *A, const NodeT *B);
=20
NodeT *getRoot() const {
assert(this->Roots.size() =3D=3D 1 && "Should always have entry node!"=
);
@@ -623,9 +619,8 @@
}
=20
DomTreeNodeBase<NodeT> *getNodeForBlock(NodeT *BB) {
- typename DomTreeNodeMapType::iterator I =3D this->DomTreeNodes.find(BB=
);
- if (I !=3D this->DomTreeNodes.end() && I->second)
- return I->second;
+ if (DomTreeNodeBase<NodeT> *Node =3D getNode(BB))
+ return Node;
=20
// Haven't calculated this node yet? Get or calculate the node for the
// immediate dominator.
@@ -641,8 +636,7 @@
}
=20
inline NodeT *getIDom(NodeT *BB) const {
- typename DenseMap<NodeT*, NodeT*>::const_iterator I =3D IDoms.find(BB);
- return I !=3D IDoms.end() ? I->second : 0;
+ return IDoms.lookup(BB);
}
=20
inline void addRoot(NodeT* BB) {
@@ -653,21 +647,24 @@
/// recalculate - compute a dominator tree for the given function
template<class FT>
void recalculate(FT& F) {
+ typedef GraphTraits<FT*> TraitsTy;
reset();
this->Vertex.push_back(0);
=20
if (!this->IsPostDominators) {
// Initialize root
- this->Roots.push_back(&F.front());
- this->IDoms[&F.front()] =3D 0;
- this->DomTreeNodes[&F.front()] =3D 0;
+ NodeT *entry =3D TraitsTy::getEntryNode(&F);
+ this->Roots.push_back(entry);
+ this->IDoms[entry] =3D 0;
+ this->DomTreeNodes[entry] =3D 0;
=20
Calculate<FT, NodeT*>(*this, F);
} else {
// Initialize the roots list
- for (typename FT::iterator I =3D F.begin(), E =3D F.end(); I !=3D E;=
++I) {
- if (std::distance(GraphTraits<FT*>::child_begin(I),
- GraphTraits<FT*>::child_end(I)) =3D=3D 0)
+ for (typename TraitsTy::nodes_iterator I =3D TraitsTy::nodes_begin(&=
F),
+ E =3D TraitsTy::nodes_end(&F); I !=
=3D E; ++I) {
+ if (std::distance(TraitsTy::child_begin(I),
+ TraitsTy::child_end(I)) =3D=3D 0)
addRoot(I);
=20
// Prepopulate maps so that we don't get iterator invalidation iss=
ues later.
@@ -680,6 +677,32 @@
}
};
=20
+// These two functions are declared out of line as a workaround for buildi=
ng
+// with old (< r147295) versions of clang because of pr11642.
+template<class NodeT>
+bool DominatorTreeBase<NodeT>::dominates(const NodeT *A, const NodeT *B) {
+ if (A =3D=3D B)
+ return true;
+
+ // Cast away the const qualifiers here. This is ok since
+ // this function doesn't actually return the values returned
+ // from getNode.
+ return dominates(getNode(const_cast<NodeT *>(A)),
+ getNode(const_cast<NodeT *>(B)));
+}
+template<class NodeT>
+bool
+DominatorTreeBase<NodeT>::properlyDominates(const NodeT *A, const NodeT *B=
) {
+ if (A =3D=3D B)
+ return false;
+
+ // Cast away the const qualifiers here. This is ok since
+ // this function doesn't actually return the values returned
+ // from getNode.
+ return dominates(getNode(const_cast<NodeT *>(A)),
+ getNode(const_cast<NodeT *>(B)));
+}
+
EXTERN_TEMPLATE_INSTANTIATION(class DominatorTreeBase<BasicBlock>);
=20
//=3D=3D=3D-------------------------------------
@@ -749,9 +772,12 @@
return DT->dominates(A, B);
}
=20
- // dominates - Return true if A dominates B. This performs the
- // special checks necessary if A and B are in the same basic block.
- bool dominates(const Instruction *A, const Instruction *B) const;
+ // dominates - Return true if Def dominates a use in User. This performs
+ // the special checks necessary if Def and User are in the same basic bl=
ock.
+ // Note that Def doesn't dominate a use in Def itself!
+ bool dominates(const Instruction *Def, const Use &U) const;
+ bool dominates(const Instruction *Def, const Instruction *User) const;
+ bool dominates(const Instruction *Def, const BasicBlock *BB) const;
=20
bool properlyDominates(const DomTreeNode *A, const DomTreeNode *B) const=
{
return DT->properlyDominates(A, B);
@@ -814,10 +840,12 @@
DT->splitBlock(NewBB);
}
=20
- bool isReachableFromEntry(const BasicBlock* A) {
+ bool isReachableFromEntry(const BasicBlock* A) const {
return DT->isReachableFromEntry(A);
}
=20
+ bool isReachableFromEntry(const Use &U) const;
+
=20
virtual void releaseMemory() {
DT->releaseMemory();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/IVUsers.h
--- a/head/contrib/llvm/include/llvm/Analysis/IVUsers.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/IVUsers.h Tue Apr 17 11:51:51=
2012 +0300
@@ -166,10 +166,16 @@
const_iterator end() const { return IVUses.end(); }
bool empty() const { return IVUses.empty(); }
=20
+ bool isIVUserOrOperand(Instruction *Inst) const {
+ return Processed.count(Inst);
+ }
+
void print(raw_ostream &OS, const Module* =3D 0) const;
=20
/// dump - This method is used for debugging.
void dump() const;
+protected:
+ bool AddUsersImpl(Instruction *I, SmallPtrSet<Loop*,16> &SimpleLoopNests=
);
};
=20
Pass *createIVUsersPass();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/InlineCost.h
--- a/head/contrib/llvm/include/llvm/Analysis/InlineCost.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/InlineCost.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -14,171 +14,118 @@
#ifndef LLVM_ANALYSIS_INLINECOST_H
#define LLVM_ANALYSIS_INLINECOST_H
=20
+#include "llvm/Function.h"
+#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/ADT/ValueMap.h"
+#include "llvm/Analysis/CodeMetrics.h"
#include <cassert>
#include <climits>
#include <vector>
-#include "llvm/ADT/DenseMap.h"
-#include "llvm/ADT/ValueMap.h"
-#include "llvm/Analysis/CodeMetrics.h"
=20
namespace llvm {
=20
- class Value;
- class Function;
- class BasicBlock;
class CallSite;
- template<class PtrType, unsigned SmallSize>
- class SmallPtrSet;
class TargetData;
=20
namespace InlineConstants {
// Various magic constants used to adjust heuristics.
const int InstrCost =3D 5;
- const int IndirectCallBonus =3D -100;
+ const int IndirectCallThreshold =3D 100;
const int CallPenalty =3D 25;
const int LastCallToStaticBonus =3D -15000;
const int ColdccPenalty =3D 2000;
const int NoreturnPenalty =3D 10000;
}
=20
- /// InlineCost - Represent the cost of inlining a function. This
- /// supports special values for functions which should "always" or
- /// "never" be inlined. Otherwise, the cost represents a unitless
- /// amount; smaller values increase the likelihood of the function
- /// being inlined.
+ /// \brief Represents the cost of inlining a function.
+ ///
+ /// This supports special values for functions which should "always" or
+ /// "never" be inlined. Otherwise, the cost represents a unitless amount;
+ /// smaller values increase the likelihood of the function being inlined.
+ ///
+ /// Objects of this type also provide the adjusted threshold for inlining
+ /// based on the information available for a particular callsite. They c=
an be
+ /// directly tested to determine if inlining should occur given the cost=
and
+ /// threshold for this cost metric.
class InlineCost {
- enum Kind {
- Value,
- Always,
- Never
+ enum SentinelValues {
+ AlwaysInlineCost =3D INT_MIN,
+ NeverInlineCost =3D INT_MAX
};
=20
- // This is a do-it-yourself implementation of
- // int Cost : 30;
- // unsigned Type : 2;
- // We used to use bitfields, but they were sometimes miscompiled (PR38=
22).
- enum { TYPE_BITS =3D 2 };
- enum { COST_BITS =3D unsigned(sizeof(unsigned)) * CHAR_BIT - TYPE_BITS=
};
- unsigned TypedCost; // int Cost : COST_BITS; unsigned Type : TYPE_BITS;
+ /// \brief The estimated cost of inlining this callsite.
+ const int Cost;
=20
- Kind getType() const {
- return Kind(TypedCost >> COST_BITS);
+ /// \brief The adjusted threshold against which this cost was computed.
+ const int Threshold;
+
+ // Trivial constructor, interesting logic in the factory functions bel=
ow.
+ InlineCost(int Cost, int Threshold)
+ : Cost(Cost), Threshold(Threshold) {}
+
+ public:
+ static InlineCost get(int Cost, int Threshold) {
+ assert(Cost > AlwaysInlineCost && "Cost crosses sentinel value");
+ assert(Cost < NeverInlineCost && "Cost crosses sentinel value");
+ return InlineCost(Cost, Threshold);
+ }
+ static InlineCost getAlways() {
+ return InlineCost(AlwaysInlineCost, 0);
+ }
+ static InlineCost getNever() {
+ return InlineCost(NeverInlineCost, 0);
}
=20
- int getCost() const {
- // Sign-extend the bottom COST_BITS bits.
- return (int(TypedCost << TYPE_BITS)) >> TYPE_BITS;
+ /// \brief Test whether the inline cost is low enough for inlining.
+ operator bool() const {
+ return Cost < Threshold;
}
=20
- InlineCost(int C, int T) {
- TypedCost =3D (unsigned(C << TYPE_BITS) >> TYPE_BITS) | (T << COST_B=
ITS);
- assert(getCost() =3D=3D C && "Cost exceeds InlineCost precision");
+ bool isAlways() const { return Cost =3D=3D AlwaysInlineCost; }
+ bool isNever() const { return Cost =3D=3D NeverInlineCost; }
+ bool isVariable() const { return !isAlways() && !isNever(); }
+
+ /// \brief Get the inline cost estimate.
+ /// It is an error to call this on an "always" or "never" InlineCost.
+ int getCost() const {
+ assert(isVariable() && "Invalid access of InlineCost");
+ return Cost;
}
- public:
- static InlineCost get(int Cost) { return InlineCost(Cost, Value); }
- static InlineCost getAlways() { return InlineCost(0, Always); }
- static InlineCost getNever() { return InlineCost(0, Never); }
=20
- bool isVariable() const { return getType() =3D=3D Value; }
- bool isAlways() const { return getType() =3D=3D Always; }
- bool isNever() const { return getType() =3D=3D Never; }
-
- /// getValue() - Return a "variable" inline cost's amount. It is
- /// an error to call this on an "always" or "never" InlineCost.
- int getValue() const {
- assert(getType() =3D=3D Value && "Invalid access of InlineCost");
- return getCost();
- }
+ /// \brief Get the cost delta from the threshold for inlining.
+ /// Only valid if the cost is of the variable kind. Returns a negative
+ /// value if the cost is too high to inline.
+ int getCostDelta() const { return Threshold - getCost(); }
};
=20
/// InlineCostAnalyzer - Cost analyzer used by inliner.
class InlineCostAnalyzer {
- struct ArgInfo {
- public:
- unsigned ConstantWeight;
- unsigned AllocaWeight;
-
- ArgInfo(unsigned CWeight, unsigned AWeight)
- : ConstantWeight(CWeight), AllocaWeight(AWeight)
- {}
- };
-
- struct FunctionInfo {
- CodeMetrics Metrics;
-
- /// ArgumentWeights - Each formal argument of the function is inspec=
ted to
- /// see if it is used in any contexts where making it a constant or =
alloca
- /// would reduce the code size. If so, we add some value to the arg=
ument
- /// entry here.
- std::vector<ArgInfo> ArgumentWeights;
-
- /// analyzeFunction - Add information about the specified function
- /// to the current structure.
- void analyzeFunction(Function *F, const TargetData *TD);
-
- /// NeverInline - Returns true if the function should never be
- /// inlined into any caller.
- bool NeverInline();
- };
-
- // The Function* for a function can be changed (by ArgumentPromotion);
- // the ValueMap will update itself when this happens.
- ValueMap<const Function *, FunctionInfo> CachedFunctionInfo;
-
// TargetData if available, or null.
const TargetData *TD;
=20
- int CountBonusForConstant(Value *V, Constant *C =3D NULL);
- int ConstantFunctionBonus(CallSite CS, Constant *C);
- int getInlineSize(CallSite CS, Function *Callee);
- int getInlineBonuses(CallSite CS, Function *Callee);
public:
InlineCostAnalyzer(): TD(0) {}
=20
void setTargetData(const TargetData *TData) { TD =3D TData; }
=20
- /// getInlineCost - The heuristic used to determine if we should inlin=
e the
- /// function call or not.
+ /// \brief Get an InlineCost object representing the cost of inlining =
this
+ /// callsite.
///
- InlineCost getInlineCost(CallSite CS,
- SmallPtrSet<const Function *, 16> &NeverInlin=
e);
+ /// Note that threshold is passed into this function. Only costs below=
the
+ /// threshold are computed with any accuracy. The threshold can be use=
d to
+ /// bound the computation necessary to determine whether the cost is
+ /// sufficiently low to warrant inlining.
+ InlineCost getInlineCost(CallSite CS, int Threshold);
/// getCalledFunction - The heuristic used to determine if we should i=
nline
/// the function call or not. The callee is explicitly specified, to =
allow
- /// you to calculate the cost of inlining a function via a pointer. T=
he
- /// result assumes that the inlined version will always be used. You =
should
- /// weight it yourself in cases where this callee will not always be c=
alled.
- InlineCost getInlineCost(CallSite CS,
- Function *Callee,
- SmallPtrSet<const Function *, 16> &NeverInlin=
e);
-
- /// getSpecializationBonus - The heuristic used to determine the per-c=
all
- /// performance boost for using a specialization of Callee with argume=
nt
- /// SpecializedArgNos replaced by a constant.
- int getSpecializationBonus(Function *Callee,
- SmallVectorImpl<unsigned> &SpecializedArgNo);
-
- /// getSpecializationCost - The heuristic used to determine the code-s=
ize
- /// impact of creating a specialized version of Callee with argument
- /// SpecializedArgNo replaced by a constant.
- InlineCost getSpecializationCost(Function *Callee,
- SmallVectorImpl<unsigned> &SpecializedArgNo);
-
- /// getInlineFudgeFactor - Return a > 1.0 factor if the inliner should=
use a
- /// higher threshold to determine if the function call should be inlin=
ed.
- float getInlineFudgeFactor(CallSite CS);
-
- /// resetCachedFunctionInfo - erase any cached cost info for this func=
tion.
- void resetCachedCostInfo(Function* Caller) {
- CachedFunctionInfo[Caller] =3D FunctionInfo();
- }
-
- /// growCachedCostInfo - update the cached cost info for Caller after =
Callee
- /// has been inlined. If Callee is NULL it means a dead call has been
- /// eliminated.
- void growCachedCostInfo(Function* Caller, Function* Callee);
-
- /// clear - empty the cache of inline costs
- void clear();
+ /// you to calculate the cost of inlining a function via a pointer. T=
his
+ /// behaves exactly as the version with no explicit callee parameter i=
n all
+ /// other respects.
+ //
+ // Note: This is used by out-of-tree passes, please do not remove wit=
hout
+ // adding a replacement API.
+ InlineCost getInlineCost(CallSite CS, Function *Callee, int Threshold);
};
=20
/// callIsSmall - If a call is likely to lower to a single target instru=
ction,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/InstructionSimplify.h
--- a/head/contrib/llvm/include/llvm/Analysis/InstructionSimplify.h Tue Apr=
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/InstructionSimplify.h Tue Apr=
17 11:51:51 2012 +0300
@@ -20,147 +20,198 @@
#define LLVM_ANALYSIS_INSTRUCTIONSIMPLIFY_H
=20
namespace llvm {
+ template<typename T>
+ class ArrayRef;
class DominatorTree;
class Instruction;
+ class TargetData;
+ class TargetLibraryInfo;
+ class Type;
class Value;
- class TargetData;
- template<typename T>
- class ArrayRef;
=20
/// SimplifyAddInst - Given operands for an Add, see if we can
/// fold the result. If not, this returns null.
Value *SimplifyAddInst(Value *LHS, Value *RHS, bool isNSW, bool isNUW,
- const TargetData *TD =3D 0, const DominatorTree *=
DT =3D 0);
+ const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D 0,
+ const DominatorTree *DT =3D 0);
=20
/// SimplifySubInst - Given operands for a Sub, see if we can
/// fold the result. If not, this returns null.
Value *SimplifySubInst(Value *LHS, Value *RHS, bool isNSW, bool isNUW,
- const TargetData *TD =3D 0, const DominatorTree *=
DT =3D 0);
+ const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D 0,
+ const DominatorTree *DT =3D 0);
=20
/// SimplifyMulInst - Given operands for a Mul, see if we can
/// fold the result. If not, this returns null.
Value *SimplifyMulInst(Value *LHS, Value *RHS, const TargetData *TD =3D =
0,
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
/// SimplifySDivInst - Given operands for an SDiv, see if we can
/// fold the result. If not, this returns null.
Value *SimplifySDivInst(Value *LHS, Value *RHS, const TargetData *TD =3D=
0,
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
/// SimplifyUDivInst - Given operands for a UDiv, see if we can
/// fold the result. If not, this returns null.
- Value *SimplifyUDivInst(Value *LHS, Value *RHS, const TargetData *TD =3D=
0,
+ Value *SimplifyUDivInst(Value *LHS, Value *RHS, const TargetData *TD =3D=
0,=20
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
/// SimplifyFDivInst - Given operands for an FDiv, see if we can
/// fold the result. If not, this returns null.
Value *SimplifyFDivInst(Value *LHS, Value *RHS, const TargetData *TD =3D=
0,
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
/// SimplifySRemInst - Given operands for an SRem, see if we can
/// fold the result. If not, this returns null.
- Value *SimplifySRemInst(Value *LHS, Value *RHS, const TargetData *TD =3D=
0,
+ Value *SimplifySRemInst(Value *LHS, Value *RHS, const TargetData *TD =3D=
0,=20
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
/// SimplifyURemInst - Given operands for a URem, see if we can
/// fold the result. If not, this returns null.
Value *SimplifyURemInst(Value *LHS, Value *RHS, const TargetData *TD =3D=
0,
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
/// SimplifyFRemInst - Given operands for an FRem, see if we can
/// fold the result. If not, this returns null.
Value *SimplifyFRemInst(Value *LHS, Value *RHS, const TargetData *TD =3D=
0,
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
/// SimplifyShlInst - Given operands for a Shl, see if we can
/// fold the result. If not, this returns null.
Value *SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW,
- const TargetData *TD =3D 0, const DominatorTree *=
DT =3D 0);
+ const TargetData *TD =3D 0,=20
+ const TargetLibraryInfo *TLI =3D 0,
+ const DominatorTree *DT =3D 0);
=20
/// SimplifyLShrInst - Given operands for a LShr, see if we can
/// fold the result. If not, this returns null.
Value *SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact,
- const TargetData *TD =3D 0, const DominatorTree =
*DT=3D0);
+ const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D 0,
+ const DominatorTree *DT =3D 0);
=20
/// SimplifyAShrInst - Given operands for a AShr, see if we can
/// fold the result. If not, this returns null.
Value *SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact,
const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
/// SimplifyAndInst - Given operands for an And, see if we can
/// fold the result. If not, this returns null.
Value *SimplifyAndInst(Value *LHS, Value *RHS, const TargetData *TD =3D =
0,
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
/// SimplifyOrInst - Given operands for an Or, see if we can
/// fold the result. If not, this returns null.
Value *SimplifyOrInst(Value *LHS, Value *RHS, const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
/// SimplifyXorInst - Given operands for a Xor, see if we can
/// fold the result. If not, this returns null.
Value *SimplifyXorInst(Value *LHS, Value *RHS, const TargetData *TD =3D =
0,
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
/// SimplifyICmpInst - Given operands for an ICmpInst, see if we can
/// fold the result. If not, this returns null.
Value *SimplifyICmpInst(unsigned Predicate, Value *LHS, Value *RHS,
- const TargetData *TD =3D 0,
+ const TargetData *TD =3D 0,=20
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
/// SimplifyFCmpInst - Given operands for an FCmpInst, see if we can
/// fold the result. If not, this returns null.
Value *SimplifyFCmpInst(unsigned Predicate, Value *LHS, Value *RHS,
- const TargetData *TD =3D 0,
+ const TargetData *TD =3D 0,=20
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
/// SimplifySelectInst - Given operands for a SelectInst, see if we can =
fold
/// the result. If not, this returns null.
Value *SimplifySelectInst(Value *Cond, Value *TrueVal, Value *FalseVal,
const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
/// SimplifyGEPInst - Given operands for an GetElementPtrInst, see if we=
can
/// fold the result. If not, this returns null.
- Value *SimplifyGEPInst(ArrayRef<Value *> Ops,
- const TargetData *TD =3D 0, const DominatorTree *=
DT =3D 0);
+ Value *SimplifyGEPInst(ArrayRef<Value *> Ops, const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D 0,
+ const DominatorTree *DT =3D 0);
=20
/// SimplifyInsertValueInst - Given operands for an InsertValueInst, see=
if we
/// can fold the result. If not, this returns null.
Value *SimplifyInsertValueInst(Value *Agg, Value *Val,
ArrayRef<unsigned> Idxs,
const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
+ /// SimplifyTruncInst - Given operands for an TruncInst, see if we can f=
old
+ /// the result. If not, this returns null.
+ Value *SimplifyTruncInst(Value *Op, Type *Ty, const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D 0,
+ const DominatorTree *DT =3D 0);
+
//=3D=3D=3D Helper functions for higher up the class hierarchy.
=20
=20
/// SimplifyCmpInst - Given operands for a CmpInst, see if we can
/// fold the result. If not, this returns null.
Value *SimplifyCmpInst(unsigned Predicate, Value *LHS, Value *RHS,
- const TargetData *TD =3D 0, const DominatorTree *=
DT =3D 0);
+ const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D 0,
+ const DominatorTree *DT =3D 0);
=20
/// SimplifyBinOp - Given operands for a BinaryOperator, see if we can
/// fold the result. If not, this returns null.
Value *SimplifyBinOp(unsigned Opcode, Value *LHS, Value *RHS,
- const TargetData *TD =3D 0, const DominatorTree *DT=
=3D 0);
+ const TargetData *TD =3D 0,=20
+ const TargetLibraryInfo *TLI =3D 0,
+ const DominatorTree *DT =3D 0);
=20
/// SimplifyInstruction - See if we can compute a simplified version of =
this
/// instruction. If not, this returns null.
Value *SimplifyInstruction(Instruction *I, const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D 0,
const DominatorTree *DT =3D 0);
=20
=20
- /// ReplaceAndSimplifyAllUses - Perform From->replaceAllUsesWith(To) and=
then
- /// delete the From instruction. In addition to a basic RAUW, this does=
a
- /// recursive simplification of the updated instructions. This catches
- /// things where one simplification exposes other opportunities. This o=
nly
- /// simplifies and deletes scalar operations, it does not change the CFG.
+ /// \brief Replace all uses of 'I' with 'SimpleV' and simplify the uses
+ /// recursively.
///
- void ReplaceAndSimplifyAllUses(Instruction *From, Value *To,
- const TargetData *TD =3D 0,
- const DominatorTree *DT =3D 0);
+ /// This first performs a normal RAUW of I with SimpleV. It then recursi=
vely
+ /// attempts to simplify those users updated by the operation. The 'I'
+ /// instruction must not be equal to the simplified value 'SimpleV'.
+ ///
+ /// The function returns true if any simplifications were performed.
+ bool replaceAndRecursivelySimplify(Instruction *I, Value *SimpleV,
+ const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D 0,
+ const DominatorTree *DT =3D 0);
+
+ /// \brief Recursively attempt to simplify an instruction.
+ ///
+ /// This routine uses SimplifyInstruction to simplify 'I', and if succes=
sful
+ /// replaces uses of 'I' with the simplified value. It then recurses on =
each
+ /// of the users impacted. It returns true if any simplifications were
+ /// performed.
+ bool recursivelySimplifyInstruction(Instruction *I,
+ const TargetData *TD =3D 0,
+ const TargetLibraryInfo *TLI =3D 0,
+ const DominatorTree *DT =3D 0);
} // end namespace llvm
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/IntervalIterator.h
--- a/head/contrib/llvm/include/llvm/Analysis/IntervalIterator.h Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/IntervalIterator.h Tue Apr 17=
11:51:51 2012 +0300
@@ -101,14 +101,14 @@
IntervalIterator(Function *M, bool OwnMemory) : IOwnMem(OwnMemory) {
OrigContainer =3D M;
if (!ProcessInterval(&M->front())) {
- assert(0 && "ProcessInterval should never fail for first interval!");
+ llvm_unreachable("ProcessInterval should never fail for first interv=
al!");
}
}
=20
IntervalIterator(IntervalPartition &IP, bool OwnMemory) : IOwnMem(OwnMem=
ory) {
OrigContainer =3D &IP;
if (!ProcessInterval(IP.getRootInterval())) {
- assert(0 && "ProcessInterval should never fail for first interval!");
+ llvm_unreachable("ProcessInterval should never fail for first interv=
al!");
}
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/LazyValueInfo.h
--- a/head/contrib/llvm/include/llvm/Analysis/LazyValueInfo.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/LazyValueInfo.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -20,12 +20,14 @@
namespace llvm {
class Constant;
class TargetData;
+ class TargetLibraryInfo;
class Value;
=20
/// LazyValueInfo - This pass computes, caches, and vends lazy value const=
raint
/// information.
class LazyValueInfo : public FunctionPass {
class TargetData *TD;
+ class TargetLibraryInfo *TLI;
void *PImpl;
LazyValueInfo(const LazyValueInfo&); // DO NOT IMPLEMENT.
void operator=3D(const LazyValueInfo&); // DO NOT IMPLEMENT.
@@ -68,9 +70,7 @@
=20
// Implementation boilerplate.
=20
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
- AU.setPreservesAll();
- }
+ virtual void getAnalysisUsage(AnalysisUsage &AU) const;
virtual void releaseMemory();
virtual bool runOnFunction(Function &F);
};
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/Loads.h
--- a/head/contrib/llvm/include/llvm/Analysis/Loads.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/Loads.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -20,6 +20,7 @@
=20
class AliasAnalysis;
class TargetData;
+class MDNode;
=20
/// isSafeToLoadUnconditionally - Return true if we know that executing a =
load
/// from this value cannot trap. If it is not obviously safe to load from=
the
@@ -41,10 +42,15 @@
/// MaxInstsToScan specifies the maximum instructions to scan in the block.
/// If it is set to 0, it will scan the whole block. You can also optional=
ly
/// specify an alias analysis implementation, which makes this more precis=
e.
+///
+/// If TBAATag is non-null and a load or store is found, the TBAA tag from=
the
+/// load or store is recorded there. If there is no TBAA tag or if no acc=
ess
+/// is found, it is left unmodified.
Value *FindAvailableLoadedValue(Value *Ptr, BasicBlock *ScanBB,
BasicBlock::iterator &ScanFrom,
unsigned MaxInstsToScan =3D 6,
- AliasAnalysis *AA =3D 0);
+ AliasAnalysis *AA =3D 0,
+ MDNode **TBAATag =3D 0);
=20
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/LoopInfo.h
--- a/head/contrib/llvm/include/llvm/Analysis/LoopInfo.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/LoopInfo.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -23,7 +23,6 @@
// * whether or not a particular block branches out of the loop
// * the successor blocks of the loop
// * the loop depth
-// * the trip count
// * etc...
//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -416,14 +415,26 @@
#ifndef NDEBUG
assert(!Blocks.empty() && "Loop header is missing");
=20
+ // Setup for using a depth-first iterator to visit every block in the =
loop.
+ SmallVector<BlockT*, 8> ExitBBs;
+ getExitBlocks(ExitBBs);
+ llvm::SmallPtrSet<BlockT*, 8> VisitSet;
+ VisitSet.insert(ExitBBs.begin(), ExitBBs.end());
+ df_ext_iterator<BlockT*, llvm::SmallPtrSet<BlockT*, 8> >
+ BI =3D df_ext_begin(getHeader(), VisitSet),
+ BE =3D df_ext_end(getHeader(), VisitSet);
+
+ // Keep track of the number of BBs visited.
+ unsigned NumVisited =3D 0;
+
// Sort the blocks vector so that we can use binary search to do quick
// lookups.
SmallVector<BlockT*, 128> LoopBBs(block_begin(), block_end());
std::sort(LoopBBs.begin(), LoopBBs.end());
=20
// Check the individual blocks.
- for (block_iterator I =3D block_begin(), E =3D block_end(); I !=3D E; =
++I) {
- BlockT *BB =3D *I;
+ for ( ; BI !=3D BE; ++BI) {
+ BlockT *BB =3D *BI;
bool HasInsideLoopSuccs =3D false;
bool HasInsideLoopPreds =3D false;
SmallVector<BlockT *, 2> OutsideLoopPreds;
@@ -440,7 +451,7 @@
for (typename InvBlockTraits::ChildIteratorType PI =3D
InvBlockTraits::child_begin(BB), PE =3D InvBlockTraits::child_e=
nd(BB);
PI !=3D PE; ++PI) {
- typename InvBlockTraits::NodeType *N =3D *PI;
+ BlockT *N =3D *PI;
if (std::binary_search(LoopBBs.begin(), LoopBBs.end(), N))
HasInsideLoopPreds =3D true;
else
@@ -464,8 +475,12 @@
assert(HasInsideLoopSuccs && "Loop block has no in-loop successors!"=
);
assert(BB !=3D getHeader()->getParent()->begin() &&
"Loop contains function entry block!");
+
+ NumVisited++;
}
=20
+ assert(NumVisited =3D=3D getNumBlocks() && "Unreachable block in loop"=
);
+
// Check the subloops.
for (iterator I =3D begin(), E =3D end(); I !=3D E; ++I)
// Each block in each subloop should be contained within this loop.
@@ -571,37 +586,6 @@
///
PHINode *getCanonicalInductionVariable() const;
=20
- /// getTripCount - Return a loop-invariant LLVM value indicating the num=
ber of
- /// times the loop will be executed. Note that this means that the back=
edge
- /// of the loop executes N-1 times. If the trip-count cannot be determi=
ned,
- /// this returns null.
- ///
- /// The IndVarSimplify pass transforms loops to have a form that this
- /// function easily understands.
- ///
- Value *getTripCount() const;
-
- /// getSmallConstantTripCount - Returns the trip count of this loop as a
- /// normal unsigned value, if possible. Returns 0 if the trip count is u=
nknown
- /// of not constant. Will also return 0 if the trip count is very large
- /// (>=3D 2^32)
- ///
- /// The IndVarSimplify pass transforms loops to have a form that this
- /// function easily understands.
- ///
- unsigned getSmallConstantTripCount() const;
-
- /// getSmallConstantTripMultiple - Returns the largest constant divisor =
of the
- /// trip count of this loop as a normal unsigned value, if possible. This
- /// means that the actual trip count is always a multiple of the returned
- /// value (don't forget the trip count could very well be zero as well!).
- ///
- /// Returns 1 if the trip count is unknown or not guaranteed to be the
- /// multiple of a constant (which is also the case if the trip count is =
simply
- /// constant, use getSmallConstantTripCount for that case), Will also re=
turn 1
- /// if the trip count is very large (>=3D 2^32).
- unsigned getSmallConstantTripMultiple() const;
-
/// isLCSSAForm - Return true if the Loop is in LCSSA form
bool isLCSSAForm(DominatorTree &DT) const;
=20
@@ -610,6 +594,9 @@
/// normal form.
bool isLoopSimplifyForm() const;
=20
+ /// isSafeToClone - Return true if the loop body is safe to clone in pra=
ctice.
+ bool isSafeToClone() const;
+
/// hasDedicatedExits - Return true if no exit block for the loop
/// has a predecessor that is outside the loop.
bool hasDedicatedExits() const;
@@ -671,9 +658,7 @@
/// block is in no loop (for example the entry node), null is returned.
///
LoopT *getLoopFor(const BlockT *BB) const {
- typename DenseMap<BlockT *, LoopT *>::const_iterator I=3D
- BBMap.find(const_cast<BlockT*>(BB));
- return I !=3D BBMap.end() ? I->second : 0;
+ return BBMap.lookup(const_cast<BlockT*>(BB));
}
=20
/// operator[] - same as getLoopFor...
@@ -712,9 +697,7 @@
/// the loop hierarchy tree.
void changeLoopFor(BlockT *BB, LoopT *L) {
if (!L) {
- typename DenseMap<BlockT *, LoopT *>::iterator I =3D BBMap.find(BB);
- if (I !=3D BBMap.end())
- BBMap.erase(I);
+ BBMap.erase(BB);
return;
}
BBMap[BB] =3D L;
@@ -771,7 +754,7 @@
}
=20
LoopT *ConsiderForLoop(BlockT *BB, DominatorTreeBase<BlockT> &DT) {
- if (BBMap.find(BB) !=3D BBMap.end()) return 0;// Haven't processed thi=
s node?
+ if (BBMap.count(BB)) return 0; // Haven't processed this node?
=20
std::vector<BlockT *> TodoStack;
=20
@@ -782,7 +765,8 @@
InvBlockTraits::child_begin(BB), E =3D InvBlockTraits::child_end(=
BB);
I !=3D E; ++I) {
typename InvBlockTraits::NodeType *N =3D *I;
- if (DT.dominates(BB, N)) // If BB dominates its predecessor...
+ // If BB dominates its predecessor...
+ if (DT.dominates(BB, N) && DT.isReachableFromEntry(N))
TodoStack.push_back(N);
}
=20
@@ -792,14 +776,12 @@
LoopT *L =3D new LoopT(BB);
BBMap[BB] =3D L;
=20
- BlockT *EntryBlock =3D BB->getParent()->begin();
-
while (!TodoStack.empty()) { // Process all the nodes in the loop
BlockT *X =3D TodoStack.back();
TodoStack.pop_back();
=20
if (!L->contains(X) && // As of yet unprocessed??
- DT.dominates(EntryBlock, X)) { // X is reachable from entry bl=
ock?
+ DT.isReachableFromEntry(X)) {
// Check to see if this block already belongs to a loop. If this =
occurs
// then we have a case where a loop that is supposed to be a child=
of
// the current loop was processed before the current loop. When t=
his
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/MemoryDependenceAnalysis.h
--- a/head/contrib/llvm/include/llvm/Analysis/MemoryDependenceAnalysis.h Tu=
e Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/MemoryDependenceAnalysis.h Tu=
e Apr 17 11:51:51 2012 +0300
@@ -324,6 +324,7 @@
/// Current AA implementation, just a cache.
AliasAnalysis *AA;
TargetData *TD;
+ DominatorTree *DT;
OwningPtr<PredIteratorCache> PredCache;
public:
MemoryDependenceAnalysis();
@@ -430,6 +431,9 @@
=20
void RemoveCachedNonLocalPointerDependencies(ValueIsLoadPair P);
=20
+ AliasAnalysis::ModRefResult
+ getModRefInfo(const Instruction *Inst, const AliasAnalysis::Location &=
Loc);
+
/// verifyRemoved - Verify that the specified instruction does not occ=
ur
/// in our internal data structures.
void verifyRemoved(Instruction *Inst) const;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/PHITransAddr.h
--- a/head/contrib/llvm/include/llvm/Analysis/PHITransAddr.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/PHITransAddr.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -20,7 +20,8 @@
namespace llvm {
class DominatorTree;
class TargetData;
- =20
+ class TargetLibraryInfo;
+
/// PHITransAddr - An address value which tracks and handles phi translati=
on.
/// As we walk "up" the CFG through predecessors, we need to ensure that t=
he
/// address we're tracking is kept up to date. For example, if we're anal=
yzing
@@ -37,11 +38,14 @@
=20
/// TD - The target data we are playing with if known, otherwise null.
const TargetData *TD;
+
+ /// TLI - The target library info if known, otherwise null.
+ const TargetLibraryInfo *TLI;
=20
/// InstInputs - The inputs for our symbolic address.
SmallVector<Instruction*, 4> InstInputs;
public:
- PHITransAddr(Value *addr, const TargetData *td) : Addr(addr), TD(td) {
+ PHITransAddr(Value *addr, const TargetData *td) : Addr(addr), TD(td), TL=
I(0) {
// If the address is an instruction, the whole thing is considered an =
input.
if (Instruction *I =3D dyn_cast<Instruction>(Addr))
InstInputs.push_back(I);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/ProfileInfo.h
--- a/head/contrib/llvm/include/llvm/Analysis/ProfileInfo.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/ProfileInfo.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -22,6 +22,7 @@
#define LLVM_ANALYSIS_PROFILEINFO_H
=20
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
@@ -85,13 +86,11 @@
=20
// getFunction() - Returns the Function for an Edge, checking for vali=
dity.
static const FType* getFunction(Edge e) {
- if (e.first) {
+ if (e.first)
return e.first->getParent();
- } else if (e.second) {
+ if (e.second)
return e.second->getParent();
- }
- assert(0 && "Invalid ProfileInfo::Edge");
- return (const FType*)0;
+ llvm_unreachable("Invalid ProfileInfo::Edge");
}
=20
// getEdge() - Creates an Edge from two BasicBlocks.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/RegionInfo.h
--- a/head/contrib/llvm/include/llvm/Analysis/RegionInfo.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/RegionInfo.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -681,7 +681,7 @@
if (Node.isSubRegion())
return OS << Node.getNodeAs<Region>()->getNameStr();
else
- return OS << Node.getNodeAs<BasicBlock>()->getNameStr();
+ return OS << Node.getNodeAs<BasicBlock>()->getName();
}
} // End llvm namespace
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/ScalarEvolution.h
--- a/head/contrib/llvm/include/llvm/Analysis/ScalarEvolution.h Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/ScalarEvolution.h Tue Apr 17 =
11:51:51 2012 +0300
@@ -41,6 +41,7 @@
class Type;
class ScalarEvolution;
class TargetData;
+ class TargetLibraryInfo;
class LLVMContext;
class Loop;
class LoopInfo;
@@ -118,6 +119,10 @@
///
bool isAllOnesValue() const;
=20
+ /// isNonConstantNegative - Return true if the specified scev is negat=
ed,
+ /// but not a constant.
+ bool isNonConstantNegative() const;
+
/// print - Print out the internal representation of this scalar to the
/// specified stream. This should really only be used for debugging
/// purposes.
@@ -135,7 +140,7 @@
ID =3D X.FastID;
}
static bool Equals(const SCEV &X, const FoldingSetNodeID &ID,
- FoldingSetNodeID &TempID) {
+ unsigned IDHash, FoldingSetNodeID &TempID) {
return ID =3D=3D X.FastID;
}
static unsigned ComputeHash(const SCEV &X, FoldingSetNodeID &TempID) {
@@ -224,6 +229,10 @@
///
TargetData *TD;
=20
+ /// TLI - The target library information for the target we are targeti=
ng.
+ ///
+ TargetLibraryInfo *TLI;
+
/// DT - The dominator tree.
///
DominatorTree *DT;
@@ -721,16 +730,21 @@
const SCEV *LHS, const SCEV *RHS);
=20
/// getSmallConstantTripCount - Returns the maximum trip count of this=
loop
- /// as a normal unsigned value, if possible. Returns 0 if the trip cou=
nt is
- /// unknown or not constant.
- unsigned getSmallConstantTripCount(Loop *L, BasicBlock *ExitBlock);
+ /// as a normal unsigned value. Returns 0 if the trip count is unknown=
or
+ /// not constant. This "trip count" assumes that control exits via
+ /// ExitingBlock. More precisely, it is the number of times that contr=
ol may
+ /// reach ExitingBlock before taking the branch. For loops with multip=
le
+ /// exits, it may not be the number times that the loop header execute=
s if
+ /// the loop exits prematurely via another branch.
+ unsigned getSmallConstantTripCount(Loop *L, BasicBlock *ExitingBlock);
=20
/// getSmallConstantTripMultiple - Returns the largest constant diviso=
r of
/// the trip count of this loop as a normal unsigned value, if
/// possible. This means that the actual trip count is always a multip=
le of
/// the returned value (don't forget the trip count could very well be=
zero
- /// as well!).
- unsigned getSmallConstantTripMultiple(Loop *L, BasicBlock *ExitBlock);
+ /// as well!). As explained in the comments for getSmallConstantTripCo=
unt,
+ /// this assumes that control exits the loop via ExitingBlock.
+ unsigned getSmallConstantTripMultiple(Loop *L, BasicBlock *ExitingBloc=
k);
=20
// getExitCount - Get the expression for the number of loop iterations=
for
// which this loop is guaranteed not to exit via ExitingBlock. Otherwi=
se
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/ScalarEvolutionExpander.h
--- a/head/contrib/llvm/include/llvm/Analysis/ScalarEvolutionExpander.h Tue=
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/ScalarEvolutionExpander.h Tue=
Apr 17 11:51:51 2012 +0300
@@ -22,6 +22,8 @@
#include <set>
=20
namespace llvm {
+ class TargetLowering;
+
/// SCEVExpander - This class uses information about analyze scalars to
/// rewrite expressions in canonical form.
///
@@ -58,6 +60,9 @@
/// insert the IV increment at this position.
Instruction *IVIncInsertPos;
=20
+ /// Phis that complete an IV chain. Reuse
+ std::set<AssertingVH<PHINode> > ChainedPhis;
+
/// CanonicalMode - When true, expressions are expanded in "canonical"
/// form. In particular, addrecs are expanded as arithmetic based on
/// a canonical induction variable. When false, expression are expanded
@@ -100,6 +105,7 @@
InsertedExpressions.clear();
InsertedValues.clear();
InsertedPostIncValues.clear();
+ ChainedPhis.clear();
}
=20
/// getOrInsertCanonicalInductionVariable - This method returns the
@@ -108,14 +114,18 @@
/// starts at zero and steps by one on each iteration.
PHINode *getOrInsertCanonicalInductionVariable(const Loop *L, Type *Ty=
);
=20
- /// hoistStep - Utility for hoisting an IV increment.
- static bool hoistStep(Instruction *IncV, Instruction *InsertPos,
- const DominatorTree *DT);
+ /// getIVIncOperand - Return the induction variable increment's IV ope=
rand.
+ Instruction *getIVIncOperand(Instruction *IncV, Instruction *InsertPos,
+ bool allowScale);
+
+ /// hoistIVInc - Utility for hoisting an IV increment.
+ bool hoistIVInc(Instruction *IncV, Instruction *InsertPos);
=20
/// replaceCongruentIVs - replace congruent phis with their most canon=
ical
/// representative. Return the number of phis eliminated.
unsigned replaceCongruentIVs(Loop *L, const DominatorTree *DT,
- SmallVectorImpl<WeakVH> &DeadInsts);
+ SmallVectorImpl<WeakVH> &DeadInsts,
+ const TargetLowering *TLI =3D NULL);
=20
/// expandCodeFor - Insert code to directly compute the specified SCEV
/// expression into the program. The inserted code is inserted into t=
he
@@ -161,6 +171,16 @@
void clearInsertPoint() {
Builder.ClearInsertionPoint();
}
+
+ /// isInsertedInstruction - Return true if the specified instruction w=
as
+ /// inserted by the code rewriter. If so, the client should not modif=
y the
+ /// instruction.
+ bool isInsertedInstruction(Instruction *I) const {
+ return InsertedValues.count(I) || InsertedPostIncValues.count(I);
+ }
+
+ void setChainedPhi(PHINode *PN) { ChainedPhis.insert(PN); }
+
private:
LLVMContext &getContext() const { return SE.getContext(); }
=20
@@ -195,13 +215,6 @@
/// result will be expanded to have that type, with a cast if necessar=
y.
Value *expandCodeFor(const SCEV *SH, Type *Ty =3D 0);
=20
- /// isInsertedInstruction - Return true if the specified instruction w=
as
- /// inserted by the code rewriter. If so, the client should not modif=
y the
- /// instruction.
- bool isInsertedInstruction(Instruction *I) const {
- return InsertedValues.count(I) || InsertedPostIncValues.count(I);
- }
-
/// getRelevantLoop - Determine the most "relevant" loop for the given=
SCEV.
const Loop *getRelevantLoop(const SCEV *);
=20
@@ -244,6 +257,8 @@
const Loop *L,
Type *ExpandTy,
Type *IntTy);
+ Value *expandIVInc(PHINode *PN, Value *StepV, const Loop *L,
+ Type *ExpandTy, Type *IntTy, bool useSubtract);
};
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/ScalarEvolutionExpressions.h
--- a/head/contrib/llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h =
Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h =
Tue Apr 17 11:51:51 2012 +0300
@@ -491,7 +491,6 @@
=20
RetVal visitCouldNotCompute(const SCEVCouldNotCompute *S) {
llvm_unreachable("Invalid use of SCEVCouldNotCompute!");
- return RetVal();
}
};
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Analysi=
s/ValueTracking.h
--- a/head/contrib/llvm/include/llvm/Analysis/ValueTracking.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Analysis/ValueTracking.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -17,15 +17,15 @@
=20
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Support/DataTypes.h"
-#include <string>
=20
namespace llvm {
- template <typename T> class SmallVectorImpl;
class Value;
class Instruction;
class APInt;
class TargetData;
- =20
+ class StringRef;
+ class MDNode;
+
/// ComputeMaskedBits - Determine which of the bits specified in Mask are
/// known to be either zero or one and return them in the KnownZero/Know=
nOne
/// bit sets. This code only analyzes bits in Mask, in order to short-c=
ircuit
@@ -36,10 +36,10 @@
/// where V is a vector, the mask, known zero, and known one values are =
the
/// same width as the vector element, and the bit is set only if it is t=
rue
/// for all of the elements in the vector.
- void ComputeMaskedBits(Value *V, const APInt &Mask, APInt &KnownZero,
- APInt &KnownOne, const TargetData *TD =3D 0,
- unsigned Depth =3D 0);
- =20
+ void ComputeMaskedBits(Value *V, APInt &KnownZero, APInt &KnownOne,
+ const TargetData *TD =3D 0, unsigned Depth =3D 0);
+ void computeMaskedBitsLoad(const MDNode &Ranges, APInt &KnownZero);
+
/// ComputeSignBit - Determine whether the sign bit is known to be zero =
or
/// one. Convenience wrapper around ComputeMaskedBits.
void ComputeSignBit(Value *V, bool &KnownZero, bool &KnownOne,
@@ -48,8 +48,10 @@
/// isPowerOfTwo - Return true if the given value is known to have exact=
ly one
/// bit set when defined. For vectors return true if every element is kn=
own to
/// be a power of two when defined. Supports values with integer or poi=
nter
- /// type and vectors of integers.
- bool isPowerOfTwo(Value *V, const TargetData *TD =3D 0, unsigned Depth =
=3D 0);
+ /// type and vectors of integers. If 'OrZero' is set then returns true =
if the
+ /// given value is either a power of two or zero.
+ bool isPowerOfTwo(Value *V, const TargetData *TD =3D 0, bool OrZero =3D =
false,
+ unsigned Depth =3D 0);
=20
/// isKnownNonZero - Return true if the given value is known to be non-z=
ero
/// when defined. For vectors return true if every element is known to =
be
@@ -123,16 +125,15 @@
return GetPointerBaseWithConstantOffset(const_cast<Value*>(Ptr), Offse=
t,TD);
}
=20
- /// GetConstantStringInfo - This function computes the length of a
+ /// getConstantStringInfo - This function computes the length of a
/// null-terminated C string pointed to by V. If successful, it returns=
true
- /// and returns the string in Str. If unsuccessful, it returns false. =
If
- /// StopAtNul is set to true (the default), the returned string is trunc=
ated
- /// by a nul character in the global. If StopAtNul is false, the nul
- /// character is included in the result string.
- bool GetConstantStringInfo(const Value *V, std::string &Str,
- uint64_t Offset =3D 0,
- bool StopAtNul =3D true);
- =20
+ /// and returns the string in Str. If unsuccessful, it returns false. =
This
+ /// does not include the trailing nul character by default. If TrimAtNu=
l is
+ /// set to false, then this returns any trailing nul characters as well =
as any
+ /// other characters that come after it.
+ bool getConstantStringInfo(const Value *V, StringRef &Str,
+ uint64_t Offset =3D 0, bool TrimAtNul =3D tru=
e);
+
/// GetStringLength - If we can compute the length of the string pointed=
to by
/// the specified pointer, return 'len+1'. If we can't, return 0.
uint64_t GetStringLength(Value *V);
@@ -154,6 +155,27 @@
/// are lifetime markers.
bool onlyUsedByLifetimeMarkers(const Value *V);
=20
+ /// isSafeToSpeculativelyExecute - Return true if the instruction does n=
ot
+ /// have any effects besides calculating the result and does not have
+ /// undefined behavior.
+ ///
+ /// This method never returns true for an instruction that returns true =
for
+ /// mayHaveSideEffects; however, this method also does some other checks=
in
+ /// addition. It checks for undefined behavior, like dividing by zero or
+ /// loading from an invalid pointer (but not for undefined results, like=
a
+ /// shift with a shift amount larger than the width of the result). It c=
hecks
+ /// for malloc and alloca because speculatively executing them might cau=
se a
+ /// memory leak. It also returns false for instructions related to contr=
ol
+ /// flow, specifically terminators and PHI nodes.
+ ///
+ /// This method only looks at the instruction itself and its operands, s=
o if
+ /// this method returns true, it is safe to move the instruction as long=
as
+ /// the correct dominance relationships for the operands and users hold.
+ /// However, this method can return true for instructions that read memo=
ry;
+ /// for such instructions, moving them may change the resulting value.
+ bool isSafeToSpeculativelyExecute(const Value *V,
+ const TargetData *TD =3D 0);
+
} // end namespace llvm
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Argumen=
t.h
--- a/head/contrib/llvm/include/llvm/Argument.h Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/llvm/include/llvm/Argument.h Tue Apr 17 11:51:51 2012 +0=
300
@@ -30,6 +30,7 @@
/// the function was called with.
/// @brief LLVM Argument representation =20
class Argument : public Value, public ilist_node<Argument> {
+ virtual void anchor();
Function *Parent;
=20
friend class SymbolTableListTraits<Argument, Function>;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Assembl=
y/AssemblyAnnotationWriter.h
--- a/head/contrib/llvm/include/llvm/Assembly/AssemblyAnnotationWriter.h Tu=
e Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Assembly/AssemblyAnnotationWriter.h Tu=
e Apr 17 11:51:51 2012 +0300
@@ -22,7 +22,7 @@
class Function;
class BasicBlock;
class Instruction;
-class raw_ostream;
+class Value;
class formatted_raw_ostream;
=20
class AssemblyAnnotationWriter {
@@ -32,30 +32,30 @@
=20
/// emitFunctionAnnot - This may be implemented to emit a string right b=
efore
/// the start of a function.
- virtual void emitFunctionAnnot(const Function *F,
- formatted_raw_ostream &OS) {}
+ virtual void emitFunctionAnnot(const Function *,
+ formatted_raw_ostream &) {}
=20
/// emitBasicBlockStartAnnot - This may be implemented to emit a string =
right
/// after the basic block label, but before the first instruction in the
/// block.
- virtual void emitBasicBlockStartAnnot(const BasicBlock *BB,
- formatted_raw_ostream &OS) {
+ virtual void emitBasicBlockStartAnnot(const BasicBlock *,
+ formatted_raw_ostream &) {
}
=20
/// emitBasicBlockEndAnnot - This may be implemented to emit a string ri=
ght
/// after the basic block.
- virtual void emitBasicBlockEndAnnot(const BasicBlock *BB,
- formatted_raw_ostream &OS) {
+ virtual void emitBasicBlockEndAnnot(const BasicBlock *,
+ formatted_raw_ostream &) {
}
=20
/// emitInstructionAnnot - This may be implemented to emit a string right
/// before an instruction is emitted.
- virtual void emitInstructionAnnot(const Instruction *I,=20
- formatted_raw_ostream &OS) {}
+ virtual void emitInstructionAnnot(const Instruction *,=20
+ formatted_raw_ostream &) {}
=20
/// printInfoComment - This may be implemented to emit a comment to the
/// right of an instruction or global value.
- virtual void printInfoComment(const Value &V, formatted_raw_ostream &OS)=
{}
+ virtual void printInfoComment(const Value &, formatted_raw_ostream &) {}
};
=20
} // End llvm namespace
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Assembl=
y/Parser.h
--- a/head/contrib/llvm/include/llvm/Assembly/Parser.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/include/llvm/Assembly/Parser.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -21,7 +21,6 @@
class Module;
class MemoryBuffer;
class SMDiagnostic;
-class raw_ostream;
class LLVMContext;
=20
/// This function is the main interface to the LLVM Assembly Parser. It pa=
rses
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Assembl=
y/Writer.h
--- a/head/contrib/llvm/include/llvm/Assembly/Writer.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/include/llvm/Assembly/Writer.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -19,7 +19,6 @@
=20
namespace llvm {
=20
-class Type;
class Module;
class Value;
class raw_ostream;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Attribu=
tes.h
--- a/head/contrib/llvm/include/llvm/Attributes.h Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/llvm/include/llvm/Attributes.h Tue Apr 17 11:51:51 2012 =
+0300
@@ -22,8 +22,66 @@
namespace llvm {
class Type;
=20
+namespace Attribute {
+/// We use this proxy POD type to allow constructing Attributes constants
+/// using initializer lists. Do not use this class directly.
+struct AttrConst {
+ uint64_t v;
+ AttrConst operator | (const AttrConst Attrs) const {
+ AttrConst Res =3D {v | Attrs.v};
+ return Res;
+ }
+ AttrConst operator ~ () const {
+ AttrConst Res =3D {~v};
+ return Res;
+ }
+};
+} // namespace Attribute
+
+
/// Attributes - A bitset of attributes.
-typedef unsigned Attributes;
+class Attributes {
+ public:
+ Attributes() : Bits(0) { }
+ explicit Attributes(uint64_t Val) : Bits(Val) { }
+ /*implicit*/ Attributes(Attribute::AttrConst Val) : Bits(Val.v) { }
+ Attributes(const Attributes &Attrs) : Bits(Attrs.Bits) { }
+ // This is a "safe bool() operator".
+ operator const void *() const { return Bits ? this : 0; }
+ bool isEmptyOrSingleton() const { return (Bits & (Bits - 1)) =3D=3D 0; }
+ Attributes &operator =3D (const Attributes &Attrs) {
+ Bits =3D Attrs.Bits;
+ return *this;
+ }
+ bool operator =3D=3D (const Attributes &Attrs) const {
+ return Bits =3D=3D Attrs.Bits;
+ }
+ bool operator !=3D (const Attributes &Attrs) const {
+ return Bits !=3D Attrs.Bits;
+ }
+ Attributes operator | (const Attributes &Attrs) const {
+ return Attributes(Bits | Attrs.Bits);
+ }
+ Attributes operator & (const Attributes &Attrs) const {
+ return Attributes(Bits & Attrs.Bits);
+ }
+ Attributes operator ^ (const Attributes &Attrs) const {
+ return Attributes(Bits ^ Attrs.Bits);
+ }
+ Attributes &operator |=3D (const Attributes &Attrs) {
+ Bits |=3D Attrs.Bits;
+ return *this;
+ }
+ Attributes &operator &=3D (const Attributes &Attrs) {
+ Bits &=3D Attrs.Bits;
+ return *this;
+ }
+ Attributes operator ~ () const { return Attributes(~Bits); }
+ uint64_t Raw() const { return Bits; }
+ private:
+ // Currently, we need less than 64 bits.
+ uint64_t Bits;
+};
=20
namespace Attribute {
=20
@@ -33,44 +91,55 @@
/// results or the function itself.
/// @brief Function attributes.
=20
-const Attributes None =3D 0; ///< No attributes have been set
-const Attributes ZExt =3D 1<<0; ///< Zero extended before/after call
-const Attributes SExt =3D 1<<1; ///< Sign extended before/after call
-const Attributes NoReturn =3D 1<<2; ///< Mark the function as not return=
ing
-const Attributes InReg =3D 1<<3; ///< Force argument to be passed in =
register
-const Attributes StructRet =3D 1<<4; ///< Hidden pointer to structure to =
return
-const Attributes NoUnwind =3D 1<<5; ///< Function doesn't unwind stack
-const Attributes NoAlias =3D 1<<6; ///< Considered to not alias after c=
all
-const Attributes ByVal =3D 1<<7; ///< Pass structure by value
-const Attributes Nest =3D 1<<8; ///< Nested function static chain
-const Attributes ReadNone =3D 1<<9; ///< Function does not access memory
-const Attributes ReadOnly =3D 1<<10; ///< Function only reads from memory
-const Attributes NoInline =3D 1<<11; ///< inline=3Dnever
-const Attributes AlwaysInline =3D 1<<12; ///< inline=3Dalways
-const Attributes OptimizeForSize =3D 1<<13; ///< opt_size
-const Attributes StackProtect =3D 1<<14; ///< Stack protection.
-const Attributes StackProtectReq =3D 1<<15; ///< Stack protection required.
-const Attributes Alignment =3D 31<<16; ///< Alignment of parameter (5 bits)
+// We declare AttrConst objects that will be used throughout the code
+// and also raw uint64_t objects with _i suffix to be used below for other
+// constant declarations. This is done to avoid static CTORs and at the sa=
me
+// time to keep type-safety of Attributes.
+#define DECLARE_LLVM_ATTRIBUTE(name, value) \
+ const uint64_t name##_i =3D value; \
+ const AttrConst name =3D {value};
+
+DECLARE_LLVM_ATTRIBUTE(None,0) ///< No attributes have been set
+DECLARE_LLVM_ATTRIBUTE(ZExt,1<<0) ///< Zero extended before/after call
+DECLARE_LLVM_ATTRIBUTE(SExt,1<<1) ///< Sign extended before/after call
+DECLARE_LLVM_ATTRIBUTE(NoReturn,1<<2) ///< Mark the function as not return=
ing
+DECLARE_LLVM_ATTRIBUTE(InReg,1<<3) ///< Force argument to be passed in reg=
ister
+DECLARE_LLVM_ATTRIBUTE(StructRet,1<<4) ///< Hidden pointer to structure to=
return
+DECLARE_LLVM_ATTRIBUTE(NoUnwind,1<<5) ///< Function doesn't unwind stack
+DECLARE_LLVM_ATTRIBUTE(NoAlias,1<<6) ///< Considered to not alias after ca=
ll
+DECLARE_LLVM_ATTRIBUTE(ByVal,1<<7) ///< Pass structure by value
+DECLARE_LLVM_ATTRIBUTE(Nest,1<<8) ///< Nested function static chain
+DECLARE_LLVM_ATTRIBUTE(ReadNone,1<<9) ///< Function does not access memory
+DECLARE_LLVM_ATTRIBUTE(ReadOnly,1<<10) ///< Function only reads from memory
+DECLARE_LLVM_ATTRIBUTE(NoInline,1<<11) ///< inline=3Dnever
+DECLARE_LLVM_ATTRIBUTE(AlwaysInline,1<<12) ///< inline=3Dalways
+DECLARE_LLVM_ATTRIBUTE(OptimizeForSize,1<<13) ///< opt_size
+DECLARE_LLVM_ATTRIBUTE(StackProtect,1<<14) ///< Stack protection.
+DECLARE_LLVM_ATTRIBUTE(StackProtectReq,1<<15) ///< Stack protection requir=
ed.
+DECLARE_LLVM_ATTRIBUTE(Alignment,31<<16) ///< Alignment of parameter (5 bi=
ts)
// stored as log2 of alignment with +=
1 bias
// 0 means unaligned different from a=
lign 1
-const Attributes NoCapture =3D 1<<21; ///< Function creates no aliases of =
pointer
-const Attributes NoRedZone =3D 1<<22; /// disable redzone
-const Attributes NoImplicitFloat =3D 1<<23; /// disable implicit floating =
point
- /// instructions.
-const Attributes Naked =3D 1<<24; ///< Naked function
-const Attributes InlineHint =3D 1<<25; ///< source said inlining was
- ///desirable
-const Attributes StackAlignment =3D 7<<26; ///< Alignment of stack for
- ///function (3 bits) stored as l=
og2
- ///of alignment with +1 bias
- ///0 means unaligned (different =
from
- ///alignstack(1))
-const Attributes ReturnsTwice =3D 1<<29; ///< Function can return twice
-const Attributes UWTable =3D 1<<30; ///< Function must be in a unw=
ind
- ///table
-const Attributes NonLazyBind =3D 1U<<31; ///< Function is called early =
and/or
- /// often, so lazy binding isn't
- /// worthwhile.
+DECLARE_LLVM_ATTRIBUTE(NoCapture,1<<21) ///< Function creates no aliases o=
f pointer
+DECLARE_LLVM_ATTRIBUTE(NoRedZone,1<<22) /// disable redzone
+DECLARE_LLVM_ATTRIBUTE(NoImplicitFloat,1<<23) /// disable implicit floatin=
g point
+ /// instructions.
+DECLARE_LLVM_ATTRIBUTE(Naked,1<<24) ///< Naked function
+DECLARE_LLVM_ATTRIBUTE(InlineHint,1<<25) ///< source said inlining was
+ ///desirable
+DECLARE_LLVM_ATTRIBUTE(StackAlignment,7<<26) ///< Alignment of stack for
+ ///function (3 bits) stored as =
log2
+ ///of alignment with +1 bias
+ ///0 means unaligned (different=
from
+ ///alignstack=3D {1))
+DECLARE_LLVM_ATTRIBUTE(ReturnsTwice,1<<29) ///< Function can return twice
+DECLARE_LLVM_ATTRIBUTE(UWTable,1<<30) ///< Function must be in a unwind
+ ///table
+DECLARE_LLVM_ATTRIBUTE(NonLazyBind,1U<<31) ///< Function is called early a=
nd/or
+ /// often, so lazy binding isn=
't
+ /// worthwhile.
+DECLARE_LLVM_ATTRIBUTE(AddressSafety,1ULL<<32) ///< Address safety checkin=
g is on.
+
+#undef DECLARE_LLVM_ATTRIBUTE
=20
/// Note that uwtable is about the ABI or the user mandating an entry in t=
he
/// unwind table. The nounwind attribute is about an exception passing by =
the
@@ -85,24 +154,26 @@
/// uwtable + nounwind =3D Needs an entry because the ABI says so.
=20
/// @brief Attributes that only apply to function parameters.
-const Attributes ParameterOnly =3D ByVal | Nest | StructRet | NoCapture;
+const AttrConst ParameterOnly =3D {ByVal_i | Nest_i |
+ StructRet_i | NoCapture_i};
=20
/// @brief Attributes that may be applied to the function itself. These c=
annot
/// be used on return values or function parameters.
-const Attributes FunctionOnly =3D NoReturn | NoUnwind | ReadNone | ReadOnl=
y |
- NoInline | AlwaysInline | OptimizeForSize | StackProtect | StackProtectR=
eq |
- NoRedZone | NoImplicitFloat | Naked | InlineHint | StackAlignment |
- UWTable | NonLazyBind | ReturnsTwice;
+const AttrConst FunctionOnly =3D {NoReturn_i | NoUnwind_i | ReadNone_i |
+ ReadOnly_i | NoInline_i | AlwaysInline_i | OptimizeForSize_i |
+ StackProtect_i | StackProtectReq_i | NoRedZone_i | NoImplicitFloat_i |
+ Naked_i | InlineHint_i | StackAlignment_i |
+ UWTable_i | NonLazyBind_i | ReturnsTwice_i | AddressSafety_i};
=20
/// @brief Parameter attributes that do not apply to vararg call arguments.
-const Attributes VarArgsIncompatible =3D StructRet;
+const AttrConst VarArgsIncompatible =3D {StructRet_i};
=20
/// @brief Attributes that are mutually incompatible.
-const Attributes MutuallyIncompatible[4] =3D {
- ByVal | InReg | Nest | StructRet,
- ZExt | SExt,
- ReadNone | ReadOnly,
- NoInline | AlwaysInline
+const AttrConst MutuallyIncompatible[4] =3D {
+ {ByVal_i | InReg_i | Nest_i | StructRet_i},
+ {ZExt_i | SExt_i},
+ {ReadNone_i | ReadOnly_i},
+ {NoInline_i | AlwaysInline_i}
};
=20
/// @brief Which attributes cannot be applied to a type.
@@ -113,20 +184,20 @@
inline Attributes constructAlignmentFromInt(unsigned i) {
// Default alignment, allow the target to define how to align it.
if (i =3D=3D 0)
- return 0;
+ return None;
=20
assert(isPowerOf2_32(i) && "Alignment must be a power of two.");
assert(i <=3D 0x40000000 && "Alignment too large.");
- return (Log2_32(i)+1) << 16;
+ return Attributes((Log2_32(i)+1) << 16);
}
=20
/// This returns the alignment field of an attribute as a byte alignment v=
alue.
inline unsigned getAlignmentFromAttrs(Attributes A) {
Attributes Align =3D A & Attribute::Alignment;
- if (Align =3D=3D 0)
+ if (!Align)
return 0;
=20
- return 1U << ((Align >> 16) - 1);
+ return 1U << ((Align.Raw() >> 16) - 1);
}
=20
/// This turns an int stack alignment (which must be a power of 2) into
@@ -134,21 +205,21 @@
inline Attributes constructStackAlignmentFromInt(unsigned i) {
// Default alignment, allow the target to define how to align it.
if (i =3D=3D 0)
- return 0;
+ return None;
=20
assert(isPowerOf2_32(i) && "Alignment must be a power of two.");
assert(i <=3D 0x100 && "Alignment too large.");
- return (Log2_32(i)+1) << 26;
+ return Attributes((Log2_32(i)+1) << 26);
}
=20
/// This returns the stack alignment field of an attribute as a byte align=
ment
/// value.
inline unsigned getStackAlignmentFromAttrs(Attributes A) {
Attributes StackAlign =3D A & Attribute::StackAlignment;
- if (StackAlign =3D=3D 0)
+ if (!StackAlign)
return 0;
=20
- return 1U << ((StackAlign >> 26) - 1);
+ return 1U << ((StackAlign.Raw() >> 26) - 1);
}
=20
=20
@@ -242,7 +313,7 @@
/// paramHasAttr - Return true if the specified parameter index has the
/// specified attribute set.
bool paramHasAttr(unsigned Idx, Attributes Attr) const {
- return (getAttributes(Idx) & Attr) !=3D 0;
+ return getAttributes(Idx) & Attr;
}
=20
/// getParamAlignment - Return the alignment for the specified function
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/AutoUpg=
rade.h
--- a/head/contrib/llvm/include/llvm/AutoUpgrade.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/include/llvm/AutoUpgrade.h Tue Apr 17 11:51:51 2012=
+0300
@@ -39,14 +39,6 @@
/// This checks for global variables which should be upgraded. It return=
s true
/// if it requires upgrading.
bool UpgradeGlobalVariable(GlobalVariable *GV);
-
- /// This function checks debug info intrinsics. If an intrinsic is inval=
id
- /// then this function simply removes the intrinsic.=20
- void CheckDebugInfoIntrinsics(Module *M);
- =20
- /// This function upgrades the old pre-3.0 exception handling system to =
the
- /// new one. N.B. This will be removed in 3.1.
- void UpgradeExceptionHandling(Module *M);
} // End llvm namespace
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/BasicBl=
ock.h
--- a/head/contrib/llvm/include/llvm/BasicBlock.h Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/llvm/include/llvm/BasicBlock.h Tue Apr 17 11:51:51 2012 =
+0300
@@ -110,12 +110,6 @@
const Function *getParent() const { return Parent; }
Function *getParent() { return Parent; }
=20
- /// use_back - Specialize the methods defined in Value, as we know that =
an
- /// BasicBlock can only be used by Users (specifically terminators
- /// and BlockAddress's).
- User *use_back() { return cast<User>(*use_begin());}
- const User *use_back() const { return cast<User>(*use_begin());}
-
/// getTerminator() - If this is a well formed basic block, then this re=
turns
/// a pointer to the terminator instruction. If it is not, then you get=
a
/// null pointer back.
@@ -274,6 +268,7 @@
/// getLandingPadInst() - Return the landingpad instruction associated w=
ith
/// the landing pad.
LandingPadInst *getLandingPadInst();
+ const LandingPadInst *getLandingPadInst() const;
=20
private:
/// AdjustBlockAddressRefCount - BasicBlock stores the number of BlockAd=
dress
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Bitcode=
/Archive.h
--- a/head/contrib/llvm/include/llvm/Bitcode/Archive.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/include/llvm/Bitcode/Archive.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -394,7 +394,7 @@
/// @brief Look up multiple symbols in the archive.
bool findModulesDefiningSymbols(
std::set<std::string>& symbols, ///< Symbols to be sought
- std::set<Module*>& modules, ///< The modules matching \p sym=
bols
+ SmallVectorImpl<Module*>& modules, ///< The modules matching \p sym=
bols
std::string* ErrMessage ///< Error msg storage, if non-z=
ero
);
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Bitcode=
/BitCodes.h
--- a/head/contrib/llvm/include/llvm/Bitcode/BitCodes.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/Bitcode/BitCodes.h Tue Apr 17 11:51:51=
2012 +0300
@@ -20,6 +20,7 @@
=20
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cassert>
=20
namespace llvm {
@@ -114,7 +115,6 @@
bool hasEncodingData() const { return hasEncodingData(getEncoding()); }
static bool hasEncodingData(Encoding E) {
switch (E) {
- default: assert(0 && "Unknown encoding");
case Fixed:
case VBR:
return true;
@@ -123,6 +123,7 @@
case Blob:
return false;
}
+ llvm_unreachable("Invalid encoding");
}
=20
/// isChar6 - Return true if this character is legal in the Char6 encodi=
ng.
@@ -139,8 +140,7 @@
if (C >=3D '0' && C <=3D '9') return C-'0'+26+26;
if (C =3D=3D '.') return 62;
if (C =3D=3D '_') return 63;
- assert(0 && "Not a value Char6 character!");
- return 0;
+ llvm_unreachable("Not a value Char6 character!");
}
=20
static char DecodeChar6(unsigned V) {
@@ -150,17 +150,18 @@
if (V < 26+26+10) return V-26-26+'0';
if (V =3D=3D 62) return '.';
if (V =3D=3D 63) return '_';
- assert(0 && "Not a value Char6 character!");
- return ' ';
+ llvm_unreachable("Not a value Char6 character!");
}
=20
};
=20
+template <> struct isPodLike<BitCodeAbbrevOp> { static const bool value=3D=
true; };
+
/// BitCodeAbbrev - This class represents an abbreviation record. An
/// abbreviation allows a complex record that has redundancy to be stored =
in a
/// specialized format instead of the fully-general, fully-vbr, format.
class BitCodeAbbrev {
- SmallVector<BitCodeAbbrevOp, 8> OperandList;
+ SmallVector<BitCodeAbbrevOp, 32> OperandList;
unsigned char RefCount; // Number of things using this.
~BitCodeAbbrev() {}
public:
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Bitcode=
/BitstreamReader.h
--- a/head/contrib/llvm/include/llvm/Bitcode/BitstreamReader.h Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Bitcode/BitstreamReader.h Tue Apr 17 1=
1:51:51 2012 +0300
@@ -15,7 +15,10 @@
#ifndef BITSTREAM_READER_H
#define BITSTREAM_READER_H
=20
+#include "llvm/ADT/OwningPtr.h"
#include "llvm/Bitcode/BitCodes.h"
+#include "llvm/Support/Endian.h"
+#include "llvm/Support/StreamableMemoryObject.h"
#include <climits>
#include <string>
#include <vector>
@@ -36,9 +39,7 @@
std::vector<std::pair<unsigned, std::string> > RecordNames;
};
private:
- /// FirstChar/LastChar - This remembers the first and last bytes of the
- /// stream.
- const unsigned char *FirstChar, *LastChar;
+ OwningPtr<StreamableMemoryObject> BitcodeBytes;
=20
std::vector<BlockInfo> BlockInfoRecords;
=20
@@ -47,10 +48,10 @@
/// uses this.
bool IgnoreBlockInfoNames;
=20
- BitstreamReader(const BitstreamReader&); // NOT IMPLEMENTED
- void operator=3D(const BitstreamReader&); // NOT IMPLEMENTED
+ BitstreamReader(const BitstreamReader&); // DO NOT IMPLEMENT
+ void operator=3D(const BitstreamReader&); // DO NOT IMPLEMENT
public:
- BitstreamReader() : FirstChar(0), LastChar(0), IgnoreBlockInfoNames(true=
) {
+ BitstreamReader() : IgnoreBlockInfoNames(true) {
}
=20
BitstreamReader(const unsigned char *Start, const unsigned char *End) {
@@ -58,12 +59,17 @@
init(Start, End);
}
=20
+ BitstreamReader(StreamableMemoryObject *bytes) {
+ BitcodeBytes.reset(bytes);
+ }
+
void init(const unsigned char *Start, const unsigned char *End) {
- FirstChar =3D Start;
- LastChar =3D End;
assert(((End-Start) & 3) =3D=3D 0 &&"Bitcode stream not a multiple of =
4 bytes");
+ BitcodeBytes.reset(getNonStreamedMemoryObject(Start, End));
}
=20
+ StreamableMemoryObject &getBitcodeBytes() { return *BitcodeBytes; }
+
~BitstreamReader() {
// Free the BlockInfoRecords.
while (!BlockInfoRecords.empty()) {
@@ -75,9 +81,6 @@
BlockInfoRecords.pop_back();
}
}
- =20
- const unsigned char *getFirstChar() const { return FirstChar; }
- const unsigned char *getLastChar() const { return LastChar; }
=20
/// CollectBlockInfoNames - This is called by clients that want block/re=
cord
/// name information.
@@ -122,7 +125,7 @@
class BitstreamCursor {
friend class Deserializer;
BitstreamReader *BitStream;
- const unsigned char *NextChar;
+ size_t NextChar;
=20
/// CurWord - This is the current data we have pulled from the stream bu=
t have
/// not returned to the client.
@@ -156,8 +159,7 @@
}
=20
explicit BitstreamCursor(BitstreamReader &R) : BitStream(&R) {
- NextChar =3D R.getFirstChar();
- assert(NextChar && "Bitstream not initialized yet");
+ NextChar =3D 0;
CurWord =3D 0;
BitsInCurWord =3D 0;
CurCodeSize =3D 2;
@@ -167,8 +169,7 @@
freeState();
=20
BitStream =3D &R;
- NextChar =3D R.getFirstChar();
- assert(NextChar && "Bitstream not initialized yet");
+ NextChar =3D 0;
CurWord =3D 0;
BitsInCurWord =3D 0;
CurCodeSize =3D 2;
@@ -225,13 +226,39 @@
/// GetAbbrevIDWidth - Return the number of bits used to encode an abbre=
v #.
unsigned GetAbbrevIDWidth() const { return CurCodeSize; }
=20
- bool AtEndOfStream() const {
- return NextChar =3D=3D BitStream->getLastChar() && BitsInCurWord =3D=
=3D 0;
+ bool isEndPos(size_t pos) {
+ return BitStream->getBitcodeBytes().isObjectEnd(static_cast<uint64_t>(=
pos));
+ }
+
+ bool canSkipToPos(size_t pos) const {
+ // pos can be skipped to if it is a valid address or one byte past the=
end.
+ return pos =3D=3D 0 || BitStream->getBitcodeBytes().isValidAddress(
+ static_cast<uint64_t>(pos - 1));
+ }
+
+ unsigned char getByte(size_t pos) {
+ uint8_t byte =3D -1;
+ BitStream->getBitcodeBytes().readByte(pos, &byte);
+ return byte;
+ }
+
+ uint32_t getWord(size_t pos) {
+ uint8_t buf[sizeof(uint32_t)];
+ memset(buf, 0xFF, sizeof(buf));
+ BitStream->getBitcodeBytes().readBytes(pos,
+ sizeof(buf),
+ buf,
+ NULL);
+ return *reinterpret_cast<support::ulittle32_t *>(buf);
+ }
+
+ bool AtEndOfStream() {
+ return isEndPos(NextChar) && BitsInCurWord =3D=3D 0;
}
=20
/// GetCurrentBitNo - Return the bit # of the bit we are reading.
uint64_t GetCurrentBitNo() const {
- return (NextChar-BitStream->getFirstChar())*CHAR_BIT - BitsInCurWord;
+ return NextChar*CHAR_BIT - BitsInCurWord;
}
=20
BitstreamReader *getBitStreamReader() {
@@ -246,12 +273,10 @@
void JumpToBit(uint64_t BitNo) {
uintptr_t ByteNo =3D uintptr_t(BitNo/8) & ~3;
uintptr_t WordBitNo =3D uintptr_t(BitNo) & 31;
- assert(ByteNo <=3D (uintptr_t)(BitStream->getLastChar()-
- BitStream->getFirstChar()) &&
- "Invalid location");
+ assert(canSkipToPos(ByteNo) && "Invalid location");
=20
// Move the cursor to the right word.
- NextChar =3D BitStream->getFirstChar()+ByteNo;
+ NextChar =3D ByteNo;
BitsInCurWord =3D 0;
CurWord =3D 0;
=20
@@ -272,7 +297,7 @@
}
=20
// If we run out of data, stop at the end of the stream.
- if (NextChar =3D=3D BitStream->getLastChar()) {
+ if (isEndPos(NextChar)) {
CurWord =3D 0;
BitsInCurWord =3D 0;
return 0;
@@ -281,8 +306,7 @@
unsigned R =3D CurWord;
=20
// Read the next word from the stream.
- CurWord =3D (NextChar[0] << 0) | (NextChar[1] << 8) |
- (NextChar[2] << 16) | (NextChar[3] << 24);
+ CurWord =3D getWord(NextChar);
NextChar +=3D 4;
=20
// Extract NumBits-BitsInCurWord from what we just read.
@@ -376,9 +400,8 @@
=20
// Check that the block wasn't partially defined, and that the offset =
isn't
// bogus.
- const unsigned char *const SkipTo =3D NextChar + NumWords*4;
- if (AtEndOfStream() || SkipTo > BitStream->getLastChar() ||
- SkipTo < BitStream->getFirstChar())
+ size_t SkipTo =3D NextChar + NumWords*4;
+ if (AtEndOfStream() || !canSkipToPos(SkipTo))
return true;
=20
NextChar =3D SkipTo;
@@ -409,8 +432,7 @@
if (NumWordsP) *NumWordsP =3D NumWords;
=20
// Validate that this block is sane.
- if (CurCodeSize =3D=3D 0 || AtEndOfStream() ||
- NextChar+NumWords*4 > BitStream->getLastChar())
+ if (CurCodeSize =3D=3D 0 || AtEndOfStream())
return true;
=20
return false;
@@ -455,10 +477,10 @@
void ReadAbbreviatedField(const BitCodeAbbrevOp &Op,
SmallVectorImpl<uint64_t> &Vals) {
assert(!Op.isLiteral() && "Use ReadAbbreviatedLiteral for literals!");
- =20
+
// Decode the value as we are commanded.
switch (Op.getEncoding()) {
- default: assert(0 && "Unknown encoding!");
+ default: llvm_unreachable("Unknown encoding!");
case BitCodeAbbrevOp::Fixed:
Vals.push_back(Read((unsigned)Op.getEncodingData()));
break;
@@ -512,24 +534,25 @@
SkipToWord(); // 32-bit alignment
=20
// Figure out where the end of this blob will be including tail pa=
dding.
- const unsigned char *NewEnd =3D NextChar+((NumElts+3)&~3);
+ size_t NewEnd =3D NextChar+((NumElts+3)&~3);
=20
// If this would read off the end of the bitcode file, just set the
// record to empty and return.
- if (NewEnd > BitStream->getLastChar()) {
+ if (!canSkipToPos(NewEnd)) {
Vals.append(NumElts, 0);
- NextChar =3D BitStream->getLastChar();
+ NextChar =3D BitStream->getBitcodeBytes().getExtent();
break;
}
=20
// Otherwise, read the number of bytes. If we can return a refere=
nce to
// the data, do so to avoid copying it.
if (BlobStart) {
- *BlobStart =3D (const char*)NextChar;
+ *BlobStart =3D (const char*)BitStream->getBitcodeBytes().getPoin=
ter(
+ NextChar, NumElts);
*BlobLen =3D NumElts;
} else {
for (; NumElts; ++NextChar, --NumElts)
- Vals.push_back(*NextChar);
+ Vals.push_back(getByte(NextChar));
}
// Skip over tail padding.
NextChar =3D NewEnd;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Bitcode=
/BitstreamWriter.h
--- a/head/contrib/llvm/include/llvm/Bitcode/BitstreamWriter.h Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Bitcode/BitstreamWriter.h Tue Apr 17 1=
1:51:51 2012 +0300
@@ -16,13 +16,14 @@
#define BITSTREAM_WRITER_H
=20
#include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/Bitcode/BitCodes.h"
#include <vector>
=20
namespace llvm {
=20
class BitstreamWriter {
- std::vector<unsigned char> &Out;
+ SmallVectorImpl<char> &Out;
=20
/// CurBit - Always between 0 and 31 inclusive, specifies the next bit t=
o use.
unsigned CurBit;
@@ -59,8 +60,40 @@
};
std::vector<BlockInfo> BlockInfoRecords;
=20
+ // BackpatchWord - Backpatch a 32-bit word in the output with the specif=
ied
+ // value.
+ void BackpatchWord(unsigned ByteNo, unsigned NewWord) {
+ Out[ByteNo++] =3D (unsigned char)(NewWord >> 0);
+ Out[ByteNo++] =3D (unsigned char)(NewWord >> 8);
+ Out[ByteNo++] =3D (unsigned char)(NewWord >> 16);
+ Out[ByteNo ] =3D (unsigned char)(NewWord >> 24);
+ }
+
+ void WriteByte(unsigned char Value) {
+ Out.push_back(Value);
+ }
+
+ void WriteWord(unsigned Value) {
+ unsigned char Bytes[4] =3D {
+ (unsigned char)(Value >> 0),
+ (unsigned char)(Value >> 8),
+ (unsigned char)(Value >> 16),
+ (unsigned char)(Value >> 24) };
+ Out.append(&Bytes[0], &Bytes[4]);
+ }
+
+ unsigned GetBufferOffset() const {
+ return Out.size();
+ }
+
+ unsigned GetWordIndex() const {
+ unsigned Offset =3D GetBufferOffset();
+ assert((Offset & 3) =3D=3D 0 && "Not 32-bit aligned");
+ return Offset / 4;
+ }
+
public:
- explicit BitstreamWriter(std::vector<unsigned char> &O)
+ explicit BitstreamWriter(SmallVectorImpl<char> &O)
: Out(O), CurBit(0), CurValue(0), CurCodeSize(2) {}
=20
~BitstreamWriter() {
@@ -78,10 +111,8 @@
}
}
=20
- std::vector<unsigned char> &getBuffer() { return Out; }
-
/// \brief Retrieve the current position in the stream, in bits.
- uint64_t GetCurrentBitNo() const { return Out.size() * 8 + CurBit; }
+ uint64_t GetCurrentBitNo() const { return GetBufferOffset() * 8 + CurBit=
; }
=20
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
// Basic Primitives for emitting bits to the stream.
@@ -97,11 +128,7 @@
}
=20
// Add the current word.
- unsigned V =3D CurValue;
- Out.push_back((unsigned char)(V >> 0));
- Out.push_back((unsigned char)(V >> 8));
- Out.push_back((unsigned char)(V >> 16));
- Out.push_back((unsigned char)(V >> 24));
+ WriteWord(CurValue);
=20
if (CurBit)
CurValue =3D Val >> (32-CurBit);
@@ -121,11 +148,7 @@
=20
void FlushToWord() {
if (CurBit) {
- unsigned V =3D CurValue;
- Out.push_back((unsigned char)(V >> 0));
- Out.push_back((unsigned char)(V >> 8));
- Out.push_back((unsigned char)(V >> 16));
- Out.push_back((unsigned char)(V >> 24));
+ WriteWord(CurValue);
CurBit =3D 0;
CurValue =3D 0;
}
@@ -164,15 +187,6 @@
Emit(Val, CurCodeSize);
}
=20
- // BackpatchWord - Backpatch a 32-bit word in the output with the specif=
ied
- // value.
- void BackpatchWord(unsigned ByteNo, unsigned NewWord) {
- Out[ByteNo++] =3D (unsigned char)(NewWord >> 0);
- Out[ByteNo++] =3D (unsigned char)(NewWord >> 8);
- Out[ByteNo++] =3D (unsigned char)(NewWord >> 16);
- Out[ByteNo ] =3D (unsigned char)(NewWord >> 24);
- }
-
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
// Block Manipulation
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
@@ -199,7 +213,7 @@
EmitVBR(CodeLen, bitc::CodeLenWidth);
FlushToWord();
=20
- unsigned BlockSizeWordLoc =3D static_cast<unsigned>(Out.size());
+ unsigned BlockSizeWordIndex =3D GetWordIndex();
unsigned OldCodeSize =3D CurCodeSize;
=20
// Emit a placeholder, which will be replaced when the block is popped.
@@ -209,7 +223,7 @@
=20
// Push the outer block's abbrev set onto the stack, start out with an
// empty abbrev set.
- BlockScope.push_back(Block(OldCodeSize, BlockSizeWordLoc/4));
+ BlockScope.push_back(Block(OldCodeSize, BlockSizeWordIndex));
BlockScope.back().PrevAbbrevs.swap(CurAbbrevs);
=20
// If there is a blockinfo for this BlockID, add all the predefined ab=
brevs
@@ -239,7 +253,7 @@
FlushToWord();
=20
// Compute the size of the block, in words, not counting the size fiel=
d.
- unsigned SizeInWords=3D static_cast<unsigned>(Out.size())/4-B.StartSiz=
eWord-1;
+ unsigned SizeInWords =3D GetWordIndex() - B.StartSizeWord - 1;
unsigned ByteNo =3D B.StartSizeWord*4;
=20
// Update the block size field in the header of this sub-block.
@@ -275,7 +289,7 @@
=20
// Encode the value as we are commanded.
switch (Op.getEncoding()) {
- default: assert(0 && "Unknown encoding!");
+ default: llvm_unreachable("Unknown encoding!");
case BitCodeAbbrevOp::Fixed:
if (Op.getEncodingData())
Emit((unsigned)V, (unsigned)Op.getEncodingData());
@@ -355,25 +369,24 @@
=20
// Flush to a 32-bit alignment boundary.
FlushToWord();
- assert((Out.size() & 3) =3D=3D 0 && "Not 32-bit aligned");
=20
// Emit each field as a literal byte.
if (BlobData) {
for (unsigned i =3D 0; i !=3D BlobLen; ++i)
- Out.push_back((unsigned char)BlobData[i]);
+ WriteByte((unsigned char)BlobData[i]);
=20
// Know that blob data is consumed for assertion below.
BlobData =3D 0;
} else {
for (unsigned e =3D Vals.size(); RecordIdx !=3D e; ++RecordIdx) {
assert(Vals[RecordIdx] < 256 && "Value too large to emit as bl=
ob");
- Out.push_back((unsigned char)Vals[RecordIdx]);
+ WriteByte((unsigned char)Vals[RecordIdx]);
}
}
+
// Align end to 32-bits.
- while (Out.size() & 3)
- Out.push_back(0);
- =20
+ while (GetBufferOffset() & 3)
+ WriteByte(0);
} else { // Single scalar field.
assert(RecordIdx < Vals.size() && "Invalid abbrev/record");
EmitAbbreviatedField(Op, Vals[RecordIdx]);
@@ -488,7 +501,7 @@
/// EnterBlockInfoBlock - Start emitting the BLOCKINFO_BLOCK.
void EnterBlockInfoBlock(unsigned CodeWidth) {
EnterSubblock(bitc::BLOCKINFO_BLOCK_ID, CodeWidth);
- BlockInfoCurBID =3D -1U;
+ BlockInfoCurBID =3D ~0U;
}
private:
/// SwitchToBlockID - If we aren't already talking about the specified b=
lock
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Bitcode=
/LLVMBitCodes.h
--- a/head/contrib/llvm/include/llvm/Bitcode/LLVMBitCodes.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Bitcode/LLVMBitCodes.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -29,23 +29,21 @@
=20
// Module sub-block id's.
PARAMATTR_BLOCK_ID,
- =20
- /// TYPE_BLOCK_ID_OLD - This is the type descriptor block in LLVM 2.9 =
and
- /// earlier, replaced with TYPE_BLOCK_ID2. FIXME: Remove in LLVM 3.1.
- TYPE_BLOCK_ID_OLD,
+
+ UNUSED_ID1,
=20
CONSTANTS_BLOCK_ID,
FUNCTION_BLOCK_ID,
=20
- /// TYPE_SYMTAB_BLOCK_ID_OLD - This type descriptor is from LLVM 2.9 a=
nd
- /// earlier bitcode files. FIXME: Remove in LLVM 3.1
- TYPE_SYMTAB_BLOCK_ID_OLD,
+ UNUSED_ID2,
=20
VALUE_SYMTAB_BLOCK_ID,
METADATA_BLOCK_ID,
METADATA_ATTACHMENT_ID,
=20
- TYPE_BLOCK_ID_NEW
+ TYPE_BLOCK_ID_NEW,
+
+ USELIST_BLOCK_ID
};
=20
=20
@@ -63,10 +61,10 @@
MODULE_CODE_GLOBALVAR =3D 7,
=20
// FUNCTION: [type, callingconv, isproto, linkage, paramattrs, alignm=
ent,
- // section, visibility]
+ // section, visibility, gc, unnamed_addr]
MODULE_CODE_FUNCTION =3D 8,
=20
- // ALIAS: [alias type, aliasee val#, linkage]
+ // ALIAS: [alias type, aliasee val#, linkage, visibility]
MODULE_CODE_ALIAS =3D 9,
=20
/// MODULE_CODE_PURGEVALS: [numvals]
@@ -92,11 +90,12 @@
TYPE_CODE_OPAQUE =3D 6, // OPAQUE
TYPE_CODE_INTEGER =3D 7, // INTEGER: [width]
TYPE_CODE_POINTER =3D 8, // POINTER: [pointee type]
- TYPE_CODE_FUNCTION =3D 9, // FUNCTION: [vararg, retty, paramty x N]
+
+ TYPE_CODE_FUNCTION_OLD =3D 9, // FUNCTION: [vararg, attrid, retty,
+ // paramty x N]
=20
- // FIXME: This is the encoding used for structs in LLVM 2.9 and earlie=
r.
- // REMOVE this in LLVM 3.1
- TYPE_CODE_STRUCT_OLD =3D 10, // STRUCT: [ispacked, eltty x N]
+ TYPE_CODE_HALF =3D 10, // HALF
+ =20
TYPE_CODE_ARRAY =3D 11, // ARRAY: [numelts, eltty]
TYPE_CODE_VECTOR =3D 12, // VECTOR: [numelts, eltty]
=20
@@ -113,7 +112,9 @@
=20
TYPE_CODE_STRUCT_ANON =3D 18, // STRUCT_ANON: [ispacked, eltty x N]
TYPE_CODE_STRUCT_NAME =3D 19, // STRUCT_NAME: [strchr x N]
- TYPE_CODE_STRUCT_NAMED =3D 20 // STRUCT_NAMED: [ispacked, eltty x N]
+ TYPE_CODE_STRUCT_NAMED =3D 20,// STRUCT_NAMED: [ispacked, eltty x N]
+
+ TYPE_CODE_FUNCTION =3D 21 // FUNCTION: [vararg, retty, paramty x N]
};
=20
// The type symbol table only has one code (TST_ENTRY_CODE).
@@ -163,7 +164,8 @@
CST_CODE_INLINEASM =3D 18, // INLINEASM: [sideeffect,asmstr,c=
onststr]
CST_CODE_CE_SHUFVEC_EX =3D 19, // SHUFVEC_EX: [opty, opval, opval,=
opval]
CST_CODE_CE_INBOUNDS_GEP =3D 20,// INBOUNDS_GEP: [n x operands]
- CST_CODE_BLOCKADDRESS =3D 21 // CST_CODE_BLOCKADDRESS [fnty, fnval,=
bb#]
+ CST_CODE_BLOCKADDRESS =3D 21, // CST_CODE_BLOCKADDRESS [fnty, fnval,=
bb#]
+ CST_CODE_DATA =3D 22 // DATA: [n x elements]
};
=20
/// CastOpcodes - These are values used in the bitcode files to encode w=
hich
@@ -270,7 +272,7 @@
FUNC_CODE_INST_BR =3D 11, // BR: [bb#, bb#, cond] or =
[bb#]
FUNC_CODE_INST_SWITCH =3D 12, // SWITCH: [opty, op0, op1, ...]
FUNC_CODE_INST_INVOKE =3D 13, // INVOKE: [attr, fnty, op0,op1=
, ...]
- FUNC_CODE_INST_UNWIND =3D 14, // UNWIND
+ // 14 is unused.
FUNC_CODE_INST_UNREACHABLE =3D 15, // UNREACHABLE
=20
FUNC_CODE_INST_PHI =3D 16, // PHI: [ty, val0,bb0, ...]
@@ -314,6 +316,10 @@
FUNC_CODE_INST_STOREATOMIC =3D 42 // STORE: [ptrty,ptr,val, align, vol
// ordering, synchscope]
};
+
+ enum UseListCodes {
+ USELIST_CODE_ENTRY =3D 1 // USELIST_CODE_ENTRY: TBD.
+ };
} // End bitc namespace
} // End llvm namespace
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Bitcode=
/ReaderWriter.h
--- a/head/contrib/llvm/include/llvm/Bitcode/ReaderWriter.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Bitcode/ReaderWriter.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -17,35 +17,45 @@
#include <string>
=20
namespace llvm {
+ class BitstreamWriter;
+ class MemoryBuffer;
+ class DataStreamer;
+ class LLVMContext;
class Module;
- class MemoryBuffer;
class ModulePass;
- class BitstreamWriter;
- class LLVMContext;
class raw_ostream;
- =20
+
/// getLazyBitcodeModule - Read the header of the specified bitcode buff=
er
/// and prepare for lazy deserialization of function bodies. If success=
ful,
/// this takes ownership of 'buffer' and returns a non-null pointer. On
/// error, this returns null, *does not* take ownership of Buffer, and f=
ills
/// in *ErrMsg with an error description if ErrMsg is non-null.
Module *getLazyBitcodeModule(MemoryBuffer *Buffer,
- LLVMContext& Context,
+ LLVMContext &Context,
std::string *ErrMsg =3D 0);
=20
+ /// getStreamedBitcodeModule - Read the header of the specified stream
+ /// and prepare for lazy deserialization and streaming of function bodie=
s.
+ /// On error, this returns null, and fills in *ErrMsg with an error
+ /// description if ErrMsg is non-null.
+ Module *getStreamedBitcodeModule(const std::string &name,
+ DataStreamer *streamer,
+ LLVMContext &Context,
+ std::string *ErrMsg =3D 0);
+
/// getBitcodeTargetTriple - Read the header of the specified bitcode
/// buffer and extract just the triple information. If successful,
/// this returns a string and *does not* take ownership
/// of 'buffer'. On error, this returns "", and fills in *ErrMsg
/// if ErrMsg is non-null.
std::string getBitcodeTargetTriple(MemoryBuffer *Buffer,
- LLVMContext& Context,
+ LLVMContext &Context,
std::string *ErrMsg =3D 0);
=20
/// ParseBitcodeFile - Read the specified bitcode file, returning the mo=
dule.
/// If an error occurs, this returns null and fills in *ErrMsg if it is
/// non-null. This method *never* takes ownership of Buffer.
- Module *ParseBitcodeFile(MemoryBuffer *Buffer, LLVMContext& Context,
+ Module *ParseBitcodeFile(MemoryBuffer *Buffer, LLVMContext &Context,
std::string *ErrMsg =3D 0);
=20
/// WriteBitcodeToFile - Write the specified module to the specified
@@ -53,15 +63,11 @@
/// should be in "binary" mode.
void WriteBitcodeToFile(const Module *M, raw_ostream &Out);
=20
- /// WriteBitcodeToStream - Write the specified module to the specified
- /// raw output stream.
- void WriteBitcodeToStream(const Module *M, BitstreamWriter &Stream);
-
/// createBitcodeWriterPass - Create and return a pass that writes the m=
odule
/// to the specified ostream.
ModulePass *createBitcodeWriterPass(raw_ostream &Str);
- =20
- =20
+
+
/// isBitcodeWrapper - Return true if the given bytes are the magic bytes
/// for an LLVM IR bitcode wrapper.
///
@@ -109,21 +115,24 @@
/// uint32_t BitcodeSize; // Size of traditional bitcode file.
/// ... potentially other gunk ...
/// };
- ///=20
+ ///
/// This function is called when we find a file with a matching magic nu=
mber.
/// In this case, skip down to the subsection of the file that is actual=
ly a
/// BC file.
- static inline bool SkipBitcodeWrapperHeader(unsigned char *&BufPtr,
- unsigned char *&BufEnd) {
+ /// If 'VerifyBufferSize' is true, check that the buffer is large enough=
to
+ /// contain the whole bitcode file.
+ static inline bool SkipBitcodeWrapperHeader(const unsigned char *&BufPtr,
+ const unsigned char *&BufEnd,
+ bool VerifyBufferSize) {
enum {
KnownHeaderSize =3D 4*4, // Size of header we read.
OffsetField =3D 2*4, // Offset in bytes to Offset field.
SizeField =3D 3*4 // Offset in bytes to Size field.
};
- =20
+
// Must contain the header!
if (BufEnd-BufPtr < KnownHeaderSize) return true;
- =20
+
unsigned Offset =3D ( BufPtr[OffsetField ] |
(BufPtr[OffsetField+1] << 8) |
(BufPtr[OffsetField+2] << 16) |
@@ -132,9 +141,9 @@
(BufPtr[SizeField +1] << 8) |
(BufPtr[SizeField +2] << 16) |
(BufPtr[SizeField +3] << 24));
- =20
+
// Verify that Offset+Size fits in the file.
- if (Offset+Size > unsigned(BufEnd-BufPtr))
+ if (VerifyBufferSize && Offset+Size > unsigned(BufEnd-BufPtr))
return true;
BufPtr +=3D Offset;
BufEnd =3D BufPtr+Size;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/Analysis.h
--- a/head/contrib/llvm/include/llvm/CodeGen/Analysis.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/Analysis.h Tue Apr 17 11:51:51=
2012 +0300
@@ -27,6 +27,7 @@
class GlobalVariable;
class TargetLowering;
class SDNode;
+class SDValue;
class SelectionDAG;
=20
/// ComputeLinearIndex - Given an LLVM IR aggregate type and a sequence
@@ -70,6 +71,10 @@
///
ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
=20
+/// getFCmpCodeWithoutNaN - Given an ISD condition code comparing floats,
+/// return the equivalent code if we're allowed to assume that NaNs won't =
occur.
+ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
+
/// getICmpCondCode - Return the ISD condition code corresponding to
/// the given LLVM IR integer condition code.
///
@@ -85,7 +90,7 @@
const TargetLowering &TLI);
=20
bool isInTailCallPosition(SelectionDAG &DAG, SDNode *Node,
- const TargetLowering &TLI);
+ SDValue &Chain, const TargetLowering &TLI);
=20
} // End llvm namespace
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/AsmPrinter.h
--- a/head/contrib/llvm/include/llvm/CodeGen/AsmPrinter.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/AsmPrinter.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -18,16 +18,12 @@
=20
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ErrorHandling.h"
=20
namespace llvm {
class BlockAddress;
class GCStrategy;
class Constant;
- class ConstantArray;
- class ConstantFP;
- class ConstantInt;
- class ConstantStruct;
- class ConstantVector;
class GCMetadataPrinter;
class GlobalValue;
class GlobalVariable;
@@ -37,14 +33,11 @@
class MachineLocation;
class MachineLoopInfo;
class MachineLoop;
- class MachineConstantPool;
- class MachineConstantPoolEntry;
class MachineConstantPoolValue;
class MachineJumpTableInfo;
class MachineModuleInfo;
class MachineMove;
class MCAsmInfo;
- class MCInst;
class MCContext;
class MCSection;
class MCStreamer;
@@ -56,8 +49,6 @@
class TargetLoweringObjectFile;
class TargetData;
class TargetMachine;
- class Twine;
- class Type;
=20
/// AsmPrinter - This class is intended to be used as a driving class fo=
r all
/// asm writers.
@@ -97,6 +88,11 @@
///
MCSymbol *CurrentFnSym;
=20
+ /// The symbol used to represent the start of the current function for=
the
+ /// purpose of calculating its size (e.g. using the .size directive). =
By
+ /// default, this is equal to CurrentFnSym.
+ MCSymbol *CurrentFnSymForSize;
+
private:
// GCMetadataPrinters - The garbage collection metadata printer table.
void *GCMetadataPrinters; // Really a DenseMap.
@@ -194,6 +190,11 @@
=20
bool needsSEHMoves();
=20
+ /// needsRelocationsForDwarfStringPool - Specifies whether the object =
format
+ /// expects to use relocations to refer to debug entries. Alternativel=
y we
+ /// emit section offsets in bytes from the start of the string pool.
+ bool needsRelocationsForDwarfStringPool() const;
+
/// EmitConstantPool - Print to the current output stream assembly
/// representations of the constants in the constant pool MCP. This is
/// used to print out constants which have been "spilled to memory" by
@@ -256,13 +257,20 @@
=20
/// EmitInstruction - Targets should implement this to emit instructio=
ns.
virtual void EmitInstruction(const MachineInstr *) {
- assert(0 && "EmitInstruction not implemented");
+ llvm_unreachable("EmitInstruction not implemented");
}
=20
virtual void EmitFunctionEntryLabel();
=20
virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MC=
PV);
=20
+ /// EmitXXStructor - Targets can override this to change how global
+ /// constants that are part of a C++ static/global constructor list are
+ /// emitted.
+ virtual void EmitXXStructor(const Constant *CV) {
+ EmitGlobalConstant(CV);
+ }
+
/// isBlockOnlyReachableByFallthough - Return true if the basic block =
has
/// exactly one predecessor and the control transfer mechanism between
/// the predecessor and this block is a fall-through.
@@ -466,7 +474,7 @@
const MachineBasicBlock *MBB,
unsigned uid) const;
void EmitLLVMUsedList(const Constant *List);
- void EmitXXStructorList(const Constant *List);
+ void EmitXXStructorList(const Constant *List, bool isCtor);
GCMetadataPrinter *GetOrCreateGCPrinter(GCStrategy *C);
};
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/CallingConvLower.h
--- a/head/contrib/llvm/include/llvm/CodeGen/CallingConvLower.h Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/CallingConvLower.h Tue Apr 17 =
11:51:51 2012 +0300
@@ -229,7 +229,7 @@
=20
/// getFirstUnallocated - Return the first unallocated register in the s=
et, or
/// NumRegs if they are all allocated.
- unsigned getFirstUnallocated(const unsigned *Regs, unsigned NumRegs) con=
st {
+ unsigned getFirstUnallocated(const uint16_t *Regs, unsigned NumRegs) con=
st {
for (unsigned i =3D 0; i !=3D NumRegs; ++i)
if (!isAllocated(Regs[i]))
return i;
@@ -256,7 +256,7 @@
/// AllocateReg - Attempt to allocate one of the specified registers. I=
f none
/// are available, return zero. Otherwise, return the first one availab=
le,
/// marking it and any aliases as allocated.
- unsigned AllocateReg(const unsigned *Regs, unsigned NumRegs) {
+ unsigned AllocateReg(const uint16_t *Regs, unsigned NumRegs) {
unsigned FirstUnalloc =3D getFirstUnallocated(Regs, NumRegs);
if (FirstUnalloc =3D=3D NumRegs)
return 0; // Didn't find the reg.
@@ -268,7 +268,7 @@
}
=20
/// Version of AllocateReg with list of registers to be shadowed.
- unsigned AllocateReg(const unsigned *Regs, const unsigned *ShadowRegs,
+ unsigned AllocateReg(const uint16_t *Regs, const uint16_t *ShadowRegs,
unsigned NumRegs) {
unsigned FirstUnalloc =3D getFirstUnallocated(Regs, NumRegs);
if (FirstUnalloc =3D=3D NumRegs)
@@ -306,12 +306,12 @@
=20
// First GPR that carries part of a byval aggregate that's split
// between registers and memory.
- unsigned getFirstByValReg() { return FirstByValRegValid ? FirstByValReg =
: 0; }
+ unsigned getFirstByValReg() const { return FirstByValRegValid ? FirstByV=
alReg : 0; }
void setFirstByValReg(unsigned r) { FirstByValReg =3D r; FirstByValRegVa=
lid =3D true; }
void clearFirstByValReg() { FirstByValReg =3D 0; FirstByValRegValid =3D =
false; }
- bool isFirstByValRegValid() { return FirstByValRegValid; }
+ bool isFirstByValRegValid() const { return FirstByValRegValid; }
=20
- ParmContext getCallOrPrologue() { return CallOrPrologue; }
+ ParmContext getCallOrPrologue() const { return CallOrPrologue; }
=20
private:
/// MarkAllocated - Mark a register and all of its aliases as allocated.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/EdgeBundles.h
--- a/head/contrib/llvm/include/llvm/CodeGen/EdgeBundles.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/EdgeBundles.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -18,6 +18,7 @@
=20
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/IntEqClasses.h"
+#include "llvm/ADT/Twine.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
=20
namespace llvm {
@@ -61,7 +62,7 @@
/// Specialize WriteGraph, the standard implementation won't work.
raw_ostream &WriteGraph(raw_ostream &O, const EdgeBundles &G,
bool ShortNames =3D false,
- const std::string &Title =3D "");
+ const Twine &Title =3D "");
=20
} // end namespace llvm
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/FastISel.h
--- a/head/contrib/llvm/include/llvm/CodeGen/FastISel.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/FastISel.h Tue Apr 17 11:51:51=
2012 +0300
@@ -21,9 +21,11 @@
namespace llvm {
=20
class AllocaInst;
+class Constant;
class ConstantFP;
class FunctionLoweringInfo;
class Instruction;
+class LoadInst;
class MachineBasicBlock;
class MachineConstantPool;
class MachineFunction;
@@ -36,7 +38,8 @@
class TargetMachine;
class TargetRegisterClass;
class TargetRegisterInfo;
-class LoadInst;
+class User;
+class Value;
=20
/// FastISel - This is a fast-path instruction selection class that
/// generates poor code and doesn't support illegal types or non-trivial
@@ -358,6 +361,8 @@
=20
bool SelectExtractValue(const User *I);
=20
+ bool SelectInsertValue(const User *I);
+
/// HandlePHINodesInSuccessorBlocks - Handle PHI nodes in successor bloc=
ks.
/// Emit code to ensure constants are copied into registers when needed.
/// Remember the virtual registers that need to be added to the Machine =
PHI
@@ -378,6 +383,10 @@
=20
/// hasTrivialKill - Test whether the given value has exactly one use.
bool hasTrivialKill(const Value *V) const;
+
+ /// removeDeadCode - Remove all dead instructions between the I and E.
+ void removeDeadCode(MachineBasicBlock::iterator I,
+ MachineBasicBlock::iterator E);
};
=20
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/FunctionLoweringInfo.h
--- a/head/contrib/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h Tue Apr=
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h Tue Apr=
17 11:51:51 2012 +0300
@@ -21,10 +21,8 @@
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/IndexedMap.h"
+#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
-#ifndef NDEBUG
-#include "llvm/ADT/SmallSet.h"
-#endif
#include "llvm/Analysis/BranchProbabilityInfo.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/CodeGen/ISDOpcodes.h"
@@ -98,8 +96,8 @@
MachineBasicBlock::iterator InsertPt;
=20
#ifndef NDEBUG
- SmallSet<const Instruction *, 8> CatchInfoLost;
- SmallSet<const Instruction *, 8> CatchInfoFound;
+ SmallPtrSet<const Instruction *, 8> CatchInfoLost;
+ SmallPtrSet<const Instruction *, 8> CatchInfoFound;
#endif
=20
struct LiveOutInfo {
@@ -112,7 +110,7 @@
=20
/// VisitedBBs - The set of basic blocks visited thus far by instruction
/// selection.
- DenseSet<const BasicBlock*> VisitedBBs;
+ SmallPtrSet<const BasicBlock*, 4> VisitedBBs;
=20
/// PHINodesToUpdate - A list of phi instructions whose operand list will
/// be updated after processing the current basic block.
@@ -202,7 +200,7 @@
/// setArgumentFrameIndex - Record frame index for the byval
/// argument.
void setArgumentFrameIndex(const Argument *A, int FI);
- =20
+
/// getArgumentFrameIndex - Get frame index for the byval argument.
int getArgumentFrameIndex(const Argument *A);
=20
@@ -211,16 +209,18 @@
IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
};
=20
+/// ComputeUsesVAFloatArgument - Determine if any floating-point values are
+/// being passed to this variadic function, and set the MachineModuleInfo's
+/// usesVAFloatArgument flag if so. This flag is used to emit an undefined
+/// reference to _fltused on Windows, which will link in MSVCRT's
+/// floating-point support.
+void ComputeUsesVAFloatArgument(const CallInst &I, MachineModuleInfo *MMI);
+
/// AddCatchInfo - Extract the personality and type infos from an eh.selec=
tor
/// call, and add them to the specified machine basic block.
void AddCatchInfo(const CallInst &I,
MachineModuleInfo *MMI, MachineBasicBlock *MBB);
=20
-/// CopyCatchInfo - Copy catch information from SuccBB (or one of its
-/// successors) to LPad.
-void CopyCatchInfo(const BasicBlock *SuccBB, const BasicBlock *LPad,
- MachineModuleInfo *MMI, FunctionLoweringInfo &FLI);
-
/// AddLandingPadInfo - Extract the exception handling information from the
/// landingpad instruction and add them to the specified machine module in=
fo.
void AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/GCStrategy.h
--- a/head/contrib/llvm/include/llvm/CodeGen/GCStrategy.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/GCStrategy.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -37,6 +37,7 @@
#define LLVM_CODEGEN_GCSTRATEGY_H
=20
#include "llvm/CodeGen/GCMetadata.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Support/Registry.h"
#include <string>
=20
@@ -68,6 +69,8 @@
bool CustomReadBarriers; //< Default is to insert loads.
bool CustomWriteBarriers; //< Default is to insert stores.
bool CustomRoots; //< Default is to pass through to backend.
+ bool CustomSafePoints; //< Default is to use NeededSafePoints
+ // to find safe points.
bool InitRoots; //< If set, roots are nulled during lowerin=
g.
bool UsesMetadata; //< If set, backend must emit metadata tabl=
es.
=20
@@ -87,7 +90,9 @@
=20
/// needsSafePoitns - True if safe points of any kind are required. By
// default, none are recorded.
- bool needsSafePoints() const { return NeededSafePoints !=3D 0; }
+ bool needsSafePoints() const {
+ return CustomSafePoints || NeededSafePoints !=3D 0;
+ }
=20
/// needsSafePoint(Kind) - True if the given kind of safe point is
// required. By default, none are recorded.
@@ -109,6 +114,11 @@
/// can generate a stack map. If true, then
// performCustomLowering must delete them.
bool customRoots() const { return CustomRoots; }
+
+ /// customSafePoints - By default, the GC analysis will find safe
+ /// points according to NeededSafePoints. If true,
+ /// then findCustomSafePoints must create them.
+ bool customSafePoints() const { return CustomSafePoints; }
=20
/// initializeRoots - If set, gcroot intrinsics should initialize their
// allocas to null before the first use. This is
@@ -135,6 +145,7 @@
/// which the LLVM IR can be modified.
virtual bool initializeCustomLowering(Module &F);
virtual bool performCustomLowering(Function &F);
+ virtual bool findCustomSafePoints(GCFunctionInfo& FI, MachineFunction&=
MF);
};
=20
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/ISDOpcodes.h
--- a/head/contrib/llvm/include/llvm/CodeGen/ISDOpcodes.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/ISDOpcodes.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -57,7 +57,7 @@
AssertSext, AssertZext,
=20
// Various leaf nodes.
- BasicBlock, VALUETYPE, CONDCODE, Register,
+ BasicBlock, VALUETYPE, CONDCODE, Register, RegisterMask,
Constant, ConstantFP,
GlobalAddress, GlobalTLSAddress, FrameIndex,
JumpTable, ConstantPool, ExternalSymbol, BlockAddress,
@@ -107,13 +107,6 @@
// and returns an outchain.
EH_SJLJ_LONGJMP,
=20
- // OUTCHAIN =3D EH_SJLJ_DISPATCHSETUP(INCHAIN, setjmpval)
- // This corresponds to the eh.sjlj.dispatchsetup intrinsic. It takes an
- // input chain and the value returning from setjmp as inputs and retur=
ns an
- // outchain. By default, this does nothing. Targets can lower this to =
unwind
- // setup code if needed.
- EH_SJLJ_DISPATCHSETUP,
-
// TargetConstant* - Like Constant*, but the DAG does not do any foldi=
ng,
// simplification, or lowering of the constant. They are used for cons=
tants
// which are known to fit in the immediate fields of their users, or f=
or
@@ -319,6 +312,9 @@
/// Byte Swap and Counting operators.
BSWAP, CTTZ, CTLZ, CTPOP,
=20
+ /// Bit counting operators with an undefined result for zero inputs.
+ CTTZ_ZERO_UNDEF, CTLZ_ZERO_UNDEF,
+
// Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND i=
s not
// i1 then the high bits must conform to getBooleanContents.
SELECT,
@@ -327,6 +323,9 @@
// and #2), returning a vector result. All vectors have the same leng=
th.
// Much like the scalar select and setcc, each bit in the condition se=
lects
// whether the corresponding result element is taken from op #1 or op =
#2.
+ // At first, the VSELECT condition is of vXi1 type. Later, targets may=
change
+ // the condition type in order to match the VSELECT node using a a pat=
tern.
+ // The condition follows the BooleanContent format of the target.
VSELECT,
=20
// Select with condition operator - This selects between a true value =
and
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/JITCodeEmitter.h
--- a/head/contrib/llvm/include/llvm/CodeGen/JITCodeEmitter.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/JITCodeEmitter.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -51,6 +51,7 @@
/// occurred, more memory is allocated, and we reemit the code into it.
///=20
class JITCodeEmitter : public MachineCodeEmitter {
+ virtual void anchor();
public:
virtual ~JITCodeEmitter() {}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/LatencyPriorityQueue.h
--- a/head/contrib/llvm/include/llvm/CodeGen/LatencyPriorityQueue.h Tue Apr=
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/LatencyPriorityQueue.h Tue Apr=
17 11:51:51 2012 +0300
@@ -85,11 +85,11 @@
=20
virtual void dump(ScheduleDAG* DAG) const;
=20
- // ScheduledNode - As nodes are scheduled, we look to see if there are=
any
+ // scheduledNode - As nodes are scheduled, we look to see if there are=
any
// successor nodes that have a single unscheduled predecessor. If so,=
that
// single predecessor has a higher priority, since scheduling it will =
make
// the node available.
- void ScheduledNode(SUnit *Node);
+ void scheduledNode(SUnit *Node);
=20
private:
void AdjustPriorityOfUnscheduledPreds(SUnit *SU);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/LexicalScopes.h
--- a/head/contrib/llvm/include/llvm/CodeGen/LexicalScopes.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/LexicalScopes.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -153,6 +153,7 @@
/// LexicalScope - This class is used to track scope information.
///
class LexicalScope {
+ virtual void anchor();
=20
public:
LexicalScope(LexicalScope *P, const MDNode *D, const MDNode *I, bool A)
@@ -208,7 +209,7 @@
Parent->closeInsnRange(NewScope);
}
=20
- /// dominates - Return true if current scope dominsates given lexical sc=
ope.
+ /// dominates - Return true if current scope dominates given lexical sco=
pe.
bool dominates(const LexicalScope *S) const {
if (S =3D=3D this)
return true;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/LinkAllCodegenComponents.h
--- a/head/contrib/llvm/include/llvm/CodeGen/LinkAllCodegenComponents.h Tue=
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/LinkAllCodegenComponents.h Tue=
Apr 17 11:51:51 2012 +0300
@@ -31,24 +31,20 @@
if (std::getenv("bar") !=3D (char*) -1)
return;
=20
- (void) llvm::createDeadMachineInstructionElimPass();
-
(void) llvm::createFastRegisterAllocator();
(void) llvm::createBasicRegisterAllocator();
- (void) llvm::createLinearScanRegisterAllocator();
(void) llvm::createGreedyRegisterAllocator();
(void) llvm::createDefaultPBQPRegisterAllocator();
=20
llvm::linkOcamlGC();
llvm::linkShadowStackGC();
- =20
+
(void) llvm::createBURRListDAGScheduler(NULL, llvm::CodeGenOpt::Defa=
ult);
- (void) llvm::createTDRRListDAGScheduler(NULL, llvm::CodeGenOpt::Defa=
ult);
(void) llvm::createSourceListDAGScheduler(NULL,llvm::CodeGenOpt::Def=
ault);
(void) llvm::createHybridListDAGScheduler(NULL,llvm::CodeGenOpt::Def=
ault);
- (void) llvm::createTDListDAGScheduler(NULL, llvm::CodeGenOpt::Defaul=
t);
(void) llvm::createFastDAGScheduler(NULL, llvm::CodeGenOpt::Default);
(void) llvm::createDefaultScheduler(NULL, llvm::CodeGenOpt::Default);
+ (void) llvm::createVLIWDAGScheduler(NULL, llvm::CodeGenOpt::Default);
=20
}
} ForceCodegenLinking; // Force link by creating a global definition.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/LiveInterval.h
--- a/head/contrib/llvm/include/llvm/CodeGen/LiveInterval.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/LiveInterval.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -43,12 +43,10 @@
private:
enum {
HAS_PHI_KILL =3D 1,
- REDEF_BY_EC =3D 1 << 1,
- IS_PHI_DEF =3D 1 << 2,
- IS_UNUSED =3D 1 << 3
+ IS_PHI_DEF =3D 1 << 1,
+ IS_UNUSED =3D 1 << 2
};
=20
- MachineInstr *copy;
unsigned char flags;
=20
public:
@@ -57,23 +55,22 @@
/// The ID number of this value.
unsigned id;
=20
- /// The index of the defining instruction (if isDefAccurate() returns =
true).
+ /// The index of the defining instruction.
SlotIndex def;
=20
/// VNInfo constructor.
- VNInfo(unsigned i, SlotIndex d, MachineInstr *c)
- : copy(c), flags(0), id(i), def(d)
+ VNInfo(unsigned i, SlotIndex d)
+ : flags(0), id(i), def(d)
{ }
=20
/// VNInfo construtor, copies values from orig, except for the value n=
umber.
VNInfo(unsigned i, const VNInfo &orig)
- : copy(orig.copy), flags(orig.flags), id(i), def(orig.def)
+ : flags(orig.flags), id(i), def(orig.def)
{ }
=20
/// Copy from the parameter into this VNInfo.
void copyFrom(VNInfo &src) {
flags =3D src.flags;
- copy =3D src.copy;
def =3D src.def;
}
=20
@@ -86,19 +83,6 @@
flags =3D (flags | VNI->flags) & ~IS_UNUSED;
}
=20
- /// For a register interval, if this VN was definied by a copy instr
- /// getCopy() returns a pointer to it, otherwise returns 0.
- /// For a stack interval the behaviour of this method is undefined.
- MachineInstr* getCopy() const { return copy; }
- /// For a register interval, set the copy member.
- /// This method should not be called on stack intervals as it may lead=
to
- /// undefined behavior.
- void setCopy(MachineInstr *c) { copy =3D c; }
-
- /// isDefByCopy - Return true when this value was defined by a copy-li=
ke
- /// instruction as determined by MachineInstr::isCopyLike.
- bool isDefByCopy() const { return copy !=3D 0; }
-
/// Returns true if one or more kills are PHI nodes.
/// Obsolete, do not use!
bool hasPHIKill() const { return flags & HAS_PHI_KILL; }
@@ -110,17 +94,6 @@
flags &=3D ~HAS_PHI_KILL;
}
=20
- /// Returns true if this value is re-defined by an early clobber somew=
here
- /// during the live range.
- bool hasRedefByEC() const { return flags & REDEF_BY_EC; }
- /// Set the "redef by early clobber" flag on this value.
- void setHasRedefByEC(bool hasRedef) {
- if (hasRedef)
- flags |=3D REDEF_BY_EC;
- else
- flags &=3D ~REDEF_BY_EC;
- }
-
/// Returns true if this value is defined by a PHI instruction (or was,
/// PHI instrucions may have been eliminated).
bool isPHIDef() const { return flags & IS_PHI_DEF; }
@@ -294,10 +267,9 @@
=20
/// getNextValue - Create a new value number and return it. MIIdx spe=
cifies
/// the instruction that defines the value number.
- VNInfo *getNextValue(SlotIndex def, MachineInstr *CopyMI,
- VNInfo::Allocator &VNInfoAllocator) {
+ VNInfo *getNextValue(SlotIndex def, VNInfo::Allocator &VNInfoAllocator=
) {
VNInfo *VNI =3D
- new (VNInfoAllocator) VNInfo((unsigned)valnos.size(), def, CopyMI);
+ new (VNInfoAllocator) VNInfo((unsigned)valnos.size(), def);
valnos.push_back(VNI);
return VNI;
}
@@ -381,7 +353,7 @@
/// point is not contained in the half-open live range. It is usually =
the
/// getDefIndex() slot following its last use.
bool killedAt(SlotIndex index) const {
- const_iterator r =3D find(index.getUseIndex());
+ const_iterator r =3D find(index.getRegSlot(true));
return r !=3D end() && r->end =3D=3D index;
}
=20
@@ -405,6 +377,14 @@
return I =3D=3D end() ? 0 : &*I;
}
=20
+ const LiveRange *getLiveRangeBefore(SlotIndex Idx) const {
+ return getLiveRangeContaining(Idx.getPrevSlot());
+ }
+
+ LiveRange *getLiveRangeBefore(SlotIndex Idx) {
+ return getLiveRangeContaining(Idx.getPrevSlot());
+ }
+
/// getVNInfoAt - Return the VNInfo that is live at Idx, or NULL.
VNInfo *getVNInfoAt(SlotIndex Idx) const {
const_iterator I =3D FindLiveRangeContaining(Idx);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/LiveIntervalAnalysis.h
--- a/head/contrib/llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h Tue Apr=
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h Tue Apr=
17 11:51:51 2012 +0300
@@ -63,8 +63,34 @@
/// allocatableRegs_ - A bit vector of allocatable registers.
BitVector allocatableRegs_;
=20
- /// CloneMIs - A list of clones as result of re-materialization.
- std::vector<MachineInstr*> CloneMIs;
+ /// reservedRegs_ - A bit vector of reserved registers.
+ BitVector reservedRegs_;
+
+ /// RegMaskSlots - Sorted list of instructions with register mask oper=
ands.
+ /// Always use the 'r' slot, RegMasks are normal clobbers, not early
+ /// clobbers.
+ SmallVector<SlotIndex, 8> RegMaskSlots;
+
+ /// RegMaskBits - This vector is parallel to RegMaskSlots, it holds a
+ /// pointer to the corresponding register mask. This pointer can be
+ /// recomputed as:
+ ///
+ /// MI =3D Indexes->getInstructionFromIndex(RegMaskSlot[N]);
+ /// unsigned OpNum =3D findRegMaskOperand(MI);
+ /// RegMaskBits[N] =3D MI->getOperand(OpNum).getRegMask();
+ ///
+ /// This is kept in a separate vector partly because some standard
+ /// libraries don't support lower_bound() with mixed objects, partly to
+ /// improve locality when searching in RegMaskSlots.
+ /// Also see the comment in LiveInterval::find().
+ SmallVector<const uint32_t*, 8> RegMaskBits;
+
+ /// For each basic block number, keep (begin, size) pairs indexing int=
o the
+ /// RegMaskSlots and RegMaskBits arrays.
+ /// Note that basic block numbers may not be layout contiguous, that's=
why
+ /// we can't just keep track of the first register mask in each basic
+ /// block.
+ SmallVector<std::pair<unsigned, unsigned>, 8> RegMaskBlocks;
=20
public:
static char ID; // Pass identification, replacement for typeid
@@ -105,6 +131,12 @@
return allocatableRegs_.test(reg);
}
=20
+ /// isReserved - is the physical register reg reserved in the current
+ /// function
+ bool isReserved(unsigned reg) const {
+ return reservedRegs_.test(reg);
+ }
+
/// getScaledIntervalSize - get the size of an interval in "units,"
/// where every function is composed of one thousand units. This
/// measure scales properly with empty index slots in the function.
@@ -125,19 +157,6 @@
return (unsigned)(IntervalPercentage * indexes_->getFunctionSize());
}
=20
- /// conflictsWithPhysReg - Returns true if the specified register is u=
sed or
- /// defined during the duration of the specified interval. Copies to a=
nd
- /// from li.reg are allowed. This method is only able to analyze simple
- /// ranges that stay within a single basic block. Anything else is
- /// considered a conflict.
- bool conflictsWithPhysReg(const LiveInterval &li, VirtRegMap &vrm,
- unsigned reg);
-
- /// conflictsWithAliasRef - Similar to conflictsWithPhysRegRef except
- /// it checks for alias uses and defs.
- bool conflictsWithAliasRef(LiveInterval &li, unsigned Reg,
- SmallPtrSet<MachineInstr*,32> &JoinedCo=
pies);
-
// Interval creation
LiveInterval &getOrCreateInterval(unsigned reg) {
Reg2IntervalMap::iterator I =3D r2iMap_.find(reg);
@@ -177,14 +196,6 @@
return indexes_;
}
=20
- SlotIndex getZeroIndex() const {
- return indexes_->getZeroIndex();
- }
-
- SlotIndex getInvalidIndex() const {
- return indexes_->getInvalidIndex();
- }
-
/// isNotInMIMap - returns true if the specified machine instr has been
/// removed or was never entered in the map.
bool isNotInMIMap(const MachineInstr* Instr) const {
@@ -216,21 +227,11 @@
return li.liveAt(getMBBStartIdx(mbb));
}
=20
- LiveRange* findEnteringRange(LiveInterval &li,
- const MachineBasicBlock *mbb) {
- return li.getLiveRangeContaining(getMBBStartIdx(mbb));
- }
-
bool isLiveOutOfMBB(const LiveInterval &li,
const MachineBasicBlock *mbb) const {
return li.liveAt(getMBBEndIdx(mbb).getPrevSlot());
}
=20
- LiveRange* findExitingRange(LiveInterval &li,
- const MachineBasicBlock *mbb) {
- return li.getLiveRangeContaining(getMBBEndIdx(mbb).getPrevSlot());
- }
-
MachineBasicBlock* getMBBFromIndex(SlotIndex index) const {
return indexes_->getMBBFromIndex(index);
}
@@ -247,19 +248,11 @@
indexes_->replaceMachineInstrInMaps(MI, NewMI);
}
=20
- void InsertMBBInMaps(MachineBasicBlock *MBB) {
- indexes_->insertMBBInMaps(MBB);
- }
-
bool findLiveInMBBs(SlotIndex Start, SlotIndex End,
SmallVectorImpl<MachineBasicBlock*> &MBBs) const {
return indexes_->findLiveInMBBs(Start, End, MBBs);
}
=20
- void renumber() {
- indexes_->renumberIndexes();
- }
-
VNInfo::Allocator& getVNInfoAllocator() { return VNInfoAllocator; }
=20
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
@@ -271,20 +264,6 @@
/// print - Implement the dump method.
virtual void print(raw_ostream &O, const Module* =3D 0) const;
=20
- /// addIntervalsForSpills - Create new intervals for spilled defs / us=
es of
- /// the given interval. FIXME: It also returns the weight of the spill=
slot
- /// (if any is created) by reference. This is temporary.
- std::vector<LiveInterval*>
- addIntervalsForSpills(const LiveInterval& i,
- const SmallVectorImpl<LiveInterval*> *SpillIs,
- const MachineLoopInfo *loopInfo, VirtRegMap& vrm=
);
-
- /// spillPhysRegAroundRegDefsUses - Spill the specified physical regis=
ter
- /// around all defs and uses of the specified interval. Return true if=
it
- /// was able to cut its interval.
- bool spillPhysRegAroundRegDefsUses(const LiveInterval &li,
- unsigned PhysReg, VirtRegMap &vrm);
-
/// isReMaterializable - Returns true if every definition of MI of eve=
ry
/// val# of the specified interval is re-materializable. Also returns =
true
/// by reference if all of the defs are load instructions.
@@ -292,34 +271,72 @@
const SmallVectorImpl<LiveInterval*> *SpillIs,
bool &isLoad);
=20
- /// isReMaterializable - Returns true if the definition MI of the spec=
ified
- /// val# of the specified interval is re-materializable.
- bool isReMaterializable(const LiveInterval &li, const VNInfo *ValNo,
- MachineInstr *MI);
-
- /// getRepresentativeReg - Find the largest super register of the spec=
ified
- /// physical register.
- unsigned getRepresentativeReg(unsigned Reg) const;
-
- /// getNumConflictsWithPhysReg - Return the number of uses and defs of=
the
- /// specified interval that conflicts with the specified physical regi=
ster.
- unsigned getNumConflictsWithPhysReg(const LiveInterval &li,
- unsigned PhysReg) const;
-
- /// intervalIsInOneMBB - Returns true if the specified interval is ent=
irely
- /// within a single basic block.
- bool intervalIsInOneMBB(const LiveInterval &li) const;
-
- /// getLastSplitPoint - Return the last possible insertion point in mb=
b for
- /// spilling and splitting code. This is the first terminator, or the =
call
- /// instruction if li is live into a landing pad successor.
- MachineBasicBlock::iterator getLastSplitPoint(const LiveInterval &li,
- MachineBasicBlock *mbb) =
const;
+ /// intervalIsInOneMBB - If LI is confined to a single basic block, re=
turn
+ /// a pointer to that block. If LI is live in to or out of any block,
+ /// return NULL.
+ MachineBasicBlock *intervalIsInOneMBB(const LiveInterval &LI) const;
=20
/// addKillFlags - Add kill flags to any instruction that kills a virt=
ual
/// register.
void addKillFlags();
=20
+ /// handleMove - call this method to notify LiveIntervals that
+ /// instruction 'mi' has been moved within a basic block. This will up=
date
+ /// the live intervals for all operands of mi. Moves between basic blo=
cks
+ /// are not supported.
+ void handleMove(MachineInstr* MI);
+
+ /// moveIntoBundle - Update intervals for operands of MI so that they
+ /// begin/end on the SlotIndex for BundleStart.
+ ///
+ /// Requires MI and BundleStart to have SlotIndexes, and assumes
+ /// existing liveness is accurate. BundleStart should be the first
+ /// instruction in the Bundle.
+ void handleMoveIntoBundle(MachineInstr* MI, MachineInstr* BundleStart);
+
+ // Register mask functions.
+ //
+ // Machine instructions may use a register mask operand to indicate th=
at a
+ // large number of registers are clobbered by the instruction. This is
+ // typically used for calls.
+ //
+ // For compile time performance reasons, these clobbers are not record=
ed in
+ // the live intervals for individual physical registers. Instead,
+ // LiveIntervalAnalysis maintains a sorted list of instructions with
+ // register mask operands.
+
+ /// getRegMaskSlots - Returns a sorted array of slot indices of all
+ /// instructions with register mask operands.
+ ArrayRef<SlotIndex> getRegMaskSlots() const { return RegMaskSlots; }
+
+ /// getRegMaskSlotsInBlock - Returns a sorted array of slot indices of=
all
+ /// instructions with register mask operands in the basic block number=
ed
+ /// MBBNum.
+ ArrayRef<SlotIndex> getRegMaskSlotsInBlock(unsigned MBBNum) const {
+ std::pair<unsigned, unsigned> P =3D RegMaskBlocks[MBBNum];
+ return getRegMaskSlots().slice(P.first, P.second);
+ }
+
+ /// getRegMaskBits() - Returns an array of register mask pointers
+ /// corresponding to getRegMaskSlots().
+ ArrayRef<const uint32_t*> getRegMaskBits() const { return RegMaskBits;=
}
+
+ /// getRegMaskBitsInBlock - Returns an array of mask pointers correspo=
nding
+ /// to getRegMaskSlotsInBlock(MBBNum).
+ ArrayRef<const uint32_t*> getRegMaskBitsInBlock(unsigned MBBNum) const=
{
+ std::pair<unsigned, unsigned> P =3D RegMaskBlocks[MBBNum];
+ return getRegMaskBits().slice(P.first, P.second);
+ }
+
+ /// checkRegMaskInterference - Test if LI is live across any register =
mask
+ /// instructions, and compute a bit mask of physical registers that ar=
e not
+ /// clobbered by any of them.
+ ///
+ /// Returns false if LI doesn't cross any register mask instructions. =
In
+ /// that case, the bit vector is not filled in.
+ bool checkRegMaskInterference(LiveInterval &LI,
+ BitVector &UsableRegs);
+
private:
/// computeIntervals - Compute live intervals.
void computeIntervals();
@@ -351,13 +368,12 @@
void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
MachineBasicBlock::iterator mi,
SlotIndex MIIdx, MachineOperand& MO,
- LiveInterval &interval,
- MachineInstr *CopyMI);
+ LiveInterval &interval);
=20
/// handleLiveInRegister - Create interval for a livein register.
void handleLiveInRegister(MachineBasicBlock* mbb,
SlotIndex MIIdx,
- LiveInterval &interval, bool isAlias =3D fal=
se);
+ LiveInterval &interval);
=20
/// getReMatImplicitUse - If the remat definition MI has one (for now,=
we
/// only allow one) virtual register operand, then its uses are implic=
itly
@@ -379,88 +395,12 @@
const SmallVectorImpl<LiveInterval*> *SpillIs,
bool &isLoad);
=20
- /// tryFoldMemoryOperand - Attempts to fold either a spill / restore f=
rom
- /// slot / to reg or any rematerialized load into ith operand of speci=
fied
- /// MI. If it is successul, MI is updated with the newly created MI and
- /// returns true.
- bool tryFoldMemoryOperand(MachineInstr* &MI, VirtRegMap &vrm,
- MachineInstr *DefMI, SlotIndex InstrIdx,
- SmallVector<unsigned, 2> &Ops,
- bool isSS, int FrameIndex, unsigned Reg);
-
- /// canFoldMemoryOperand - Return true if the specified load / store
- /// folding is possible.
- bool canFoldMemoryOperand(MachineInstr *MI,
- SmallVector<unsigned, 2> &Ops,
- bool ReMatLoadSS) const;
-
- /// anyKillInMBBAfterIdx - Returns true if there is a kill of the spec=
ified
- /// VNInfo that's after the specified index but is within the basic bl=
ock.
- bool anyKillInMBBAfterIdx(const LiveInterval &li, const VNInfo *VNI,
- MachineBasicBlock *MBB,
- SlotIndex Idx) const;
-
- /// hasAllocatableSuperReg - Return true if the specified physical reg=
ister
- /// has any super register that's allocatable.
- bool hasAllocatableSuperReg(unsigned Reg) const;
-
- /// SRInfo - Spill / restore info.
- struct SRInfo {
- SlotIndex index;
- unsigned vreg;
- bool canFold;
- SRInfo(SlotIndex i, unsigned vr, bool f)
- : index(i), vreg(vr), canFold(f) {}
- };
-
- bool alsoFoldARestore(int Id, SlotIndex index, unsigned vr,
- BitVector &RestoreMBBs,
- DenseMap<unsigned,std::vector<SRInfo> >&RestoreI=
dxes);
- void eraseRestoreInfo(int Id, SlotIndex index, unsigned vr,
- BitVector &RestoreMBBs,
- DenseMap<unsigned,std::vector<SRInfo> >&RestoreI=
dxes);
-
- /// handleSpilledImpDefs - Remove IMPLICIT_DEF instructions which are =
being
- /// spilled and create empty intervals for their uses.
- void handleSpilledImpDefs(const LiveInterval &li, VirtRegMap &vrm,
- const TargetRegisterClass* rc,
- std::vector<LiveInterval*> &NewLIs);
-
- /// rewriteImplicitOps - Rewrite implicit use operands of MI (i.e. use=
s of
- /// interval on to-be re-materialized operands of MI) with new registe=
r.
- void rewriteImplicitOps(const LiveInterval &li,
- MachineInstr *MI, unsigned NewVReg, VirtRegMap =
&vrm);
-
- /// rewriteInstructionForSpills, rewriteInstructionsForSpills - Helper
- /// functions for addIntervalsForSpills to rewrite uses / defs for the=
given
- /// live range.
- bool rewriteInstructionForSpills(const LiveInterval &li, const VNInfo =
*VNI,
- bool TrySplit, SlotIndex index, SlotIndex end,
- MachineInstr *MI, MachineInstr *OrigDefMI, MachineInstr *DefMI,
- unsigned Slot, int LdSlot,
- bool isLoad, bool isLoadSS, bool DefIsReMat, bool CanDelete,
- VirtRegMap &vrm, const TargetRegisterClass* rc,
- SmallVector<int, 4> &ReMatIds, const MachineLoopInfo *loopInfo,
- unsigned &NewVReg, unsigned ImpUse, bool &HasDef, bool &HasUse,
- DenseMap<unsigned,unsigned> &MBBVRegsMap,
- std::vector<LiveInterval*> &NewLIs);
- void rewriteInstructionsForSpills(const LiveInterval &li, bool TrySpli=
t,
- LiveInterval::Ranges::const_iterator &I,
- MachineInstr *OrigDefMI, MachineInstr *DefMI, unsigned Slot, int L=
dSlot,
- bool isLoad, bool isLoadSS, bool DefIsReMat, bool CanDelete,
- VirtRegMap &vrm, const TargetRegisterClass* rc,
- SmallVector<int, 4> &ReMatIds, const MachineLoopInfo *loopInfo,
- BitVector &SpillMBBs,
- DenseMap<unsigned,std::vector<SRInfo> > &SpillIdxes,
- BitVector &RestoreMBBs,
- DenseMap<unsigned,std::vector<SRInfo> > &RestoreIdxes,
- DenseMap<unsigned,unsigned> &MBBVRegsMap,
- std::vector<LiveInterval*> &NewLIs);
-
static LiveInterval* createInterval(unsigned Reg);
=20
void printInstrs(raw_ostream &O) const;
void dumpInstrs() const;
+
+ class HMEditor;
};
} // End llvm namespace
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/LiveVariables.h
--- a/head/contrib/llvm/include/llvm/CodeGen/LiveVariables.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/LiveVariables.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -85,17 +85,11 @@
///
SparseBitVector<> AliveBlocks;
=20
- /// NumUses - Number of uses of this register across the entire functi=
on.
- ///
- unsigned NumUses;
-
/// Kills - List of MachineInstruction's which are the last use of this
/// virtual register (kill it) in their basic block.
///
std::vector<MachineInstr*> Kills;
=20
- VarInfo() : NumUses(0) {}
-
/// removeKill - Delete a kill corresponding to the specified
/// machine instruction. Returns true if there was a kill
/// corresponding to this instruction, false otherwise.
@@ -166,6 +160,9 @@
/// the last use of the whole register.
bool HandlePhysRegKill(unsigned Reg, MachineInstr *MI);
=20
+ /// HandleRegMask - Call HandlePhysRegKill for all registers clobbered b=
y Mask.
+ void HandleRegMask(const MachineOperand&);
+
void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
void HandlePhysRegDef(unsigned Reg, MachineInstr *MI,
SmallVector<unsigned, 4> &Defs);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineBasicBlock.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineBasicBlock.h Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineBasicBlock.h Tue Apr 17=
11:51:51 2012 +0300
@@ -77,6 +77,7 @@
/// (disable optimization).
std::vector<uint32_t> Weights;
typedef std::vector<uint32_t>::iterator weight_iterator;
+ typedef std::vector<uint32_t>::const_iterator const_weight_iterator;
=20
/// LiveIns - Keep track of the physical registers that are livein of
/// the basicblock.
@@ -84,8 +85,9 @@
=20
/// Alignment - Alignment of the basic block. Zero if the basic block do=
es
/// not need to be aligned.
+ /// The alignment is specified as log2(bytes).
unsigned Alignment;
- =20
+
/// IsLandingPad - Indicate that this basic block is entered via an
/// exception handler.
bool IsLandingPad;
@@ -115,6 +117,10 @@
/// "(null)".
StringRef getName() const;
=20
+ /// getFullName - Return a formatted string to identify this block and i=
ts
+ /// parent function.
+ std::string getFullName() const;
+
/// hasAddressTaken - Test whether this block is potentially the target
/// of an indirect branch.
bool hasAddressTaken() const { return AddressTaken; }
@@ -128,10 +134,89 @@
const MachineFunction *getParent() const { return xParent; }
MachineFunction *getParent() { return xParent; }
=20
- typedef Instructions::iterator iterator;
- typedef Instructions::const_iterator const_iterator;
- typedef std::reverse_iterator<const_iterator> const_reverse_iterator;
- typedef std::reverse_iterator<iterator> reverse_iterator;
+
+ /// bundle_iterator - MachineBasicBlock iterator that automatically skip=
s over
+ /// MIs that are inside bundles (i.e. walk top level MIs only).
+ template<typename Ty, typename IterTy>
+ class bundle_iterator
+ : public std::iterator<std::bidirectional_iterator_tag, Ty, ptrdiff_t>=
{
+ IterTy MII;
+
+ public:
+ bundle_iterator(IterTy mii) : MII(mii) {
+ assert(!MII->isInsideBundle() &&
+ "It's not legal to initialize bundle_iterator with a bundled =
MI");
+ }
+
+ bundle_iterator(Ty &mi) : MII(mi) {
+ assert(!mi.isInsideBundle() &&
+ "It's not legal to initialize bundle_iterator with a bundled =
MI");
+ }
+ bundle_iterator(Ty *mi) : MII(mi) {
+ assert((!mi || !mi->isInsideBundle()) &&
+ "It's not legal to initialize bundle_iterator with a bundled =
MI");
+ }
+ bundle_iterator(const bundle_iterator &I) : MII(I.MII) {}
+ bundle_iterator() : MII(0) {}
+
+ Ty &operator*() const { return *MII; }
+ Ty *operator->() const { return &operator*(); }
+
+ operator Ty*() const { return MII; }
+
+ bool operator=3D=3D(const bundle_iterator &x) const {
+ return MII =3D=3D x.MII;
+ }
+ bool operator!=3D(const bundle_iterator &x) const {
+ return !operator=3D=3D(x);
+ }
+
+ // Increment and decrement operators...
+ bundle_iterator &operator--() { // predecrement - Back up
+ do {
+ --MII;
+ } while (MII->isInsideBundle());
+ return *this;
+ }
+ bundle_iterator &operator++() { // preincrement - Advance
+ do {
+ ++MII;
+ } while (MII->isInsideBundle());
+ return *this;
+ }
+ bundle_iterator operator--(int) { // postdecrement operators...
+ bundle_iterator tmp =3D *this;
+ do {
+ --MII;
+ } while (MII->isInsideBundle());
+ return tmp;
+ }
+ bundle_iterator operator++(int) { // postincrement operators...
+ bundle_iterator tmp =3D *this;
+ do {
+ ++MII;
+ } while (MII->isInsideBundle());
+ return tmp;
+ }
+
+ IterTy getInstrIterator() const {
+ return MII;
+ }
+ };
+
+ typedef Instructions::iterator instr_ite=
rator;
+ typedef Instructions::const_iterator const_instr_ite=
rator;
+ typedef std::reverse_iterator<instr_iterator> reverse_instr_ite=
rator;
+ typedef
+ std::reverse_iterator<const_instr_iterator> const_reverse_instr_ite=
rator;
+
+ typedef
+ bundle_iterator<MachineInstr,instr_iterator> ite=
rator;
+ typedef
+ bundle_iterator<const MachineInstr,const_instr_iterator> const_ite=
rator;
+ typedef std::reverse_iterator<const_iterator> const_reverse_ite=
rator;
+ typedef std::reverse_iterator<iterator> reverse_ite=
rator;
+
=20
unsigned size() const { return (unsigned)Insts.size(); }
bool empty() const { return Insts.empty(); }
@@ -141,15 +226,53 @@
const MachineInstr& front() const { return Insts.front(); }
const MachineInstr& back() const { return Insts.back(); }
=20
+ instr_iterator instr_begin() { return Insts.begin()=
; }
+ const_instr_iterator instr_begin() const { return Insts.begin()=
; }
+ instr_iterator instr_end() { return Insts.end(); =
}
+ const_instr_iterator instr_end() const { return Insts.end(); =
}
+ reverse_instr_iterator instr_rbegin() { return Insts.rbegin(=
); }
+ const_reverse_instr_iterator instr_rbegin() const { return Insts.rbegin(=
); }
+ reverse_instr_iterator instr_rend () { return Insts.rend();=
}
+ const_reverse_instr_iterator instr_rend () const { return Insts.rend();=
}
+
iterator begin() { return Insts.begin(); }
const_iterator begin() const { return Insts.begin(); }
- iterator end() { return Insts.end(); }
- const_iterator end() const { return Insts.end(); }
- reverse_iterator rbegin() { return Insts.rbegin(); }
- const_reverse_iterator rbegin() const { return Insts.rbegin(); }
+ iterator end() {
+ instr_iterator II =3D instr_end();
+ if (II !=3D instr_begin()) {
+ while (II->isInsideBundle())
+ --II;
+ }
+ return II;
+ }
+ const_iterator end() const {
+ const_instr_iterator II =3D instr_end();
+ if (II !=3D instr_begin()) {
+ while (II->isInsideBundle())
+ --II;
+ }
+ return II;
+ }
+ reverse_iterator rbegin() {
+ reverse_instr_iterator II =3D instr_rbegin();
+ if (II !=3D instr_rend()) {
+ while (II->isInsideBundle())
+ ++II;
+ }
+ return II;
+ }
+ const_reverse_iterator rbegin() const {
+ const_reverse_instr_iterator II =3D instr_rbegin();
+ if (II !=3D instr_rend()) {
+ while (II->isInsideBundle())
+ ++II;
+ }
+ return II;
+ }
reverse_iterator rend () { return Insts.rend(); }
const_reverse_iterator rend () const { return Insts.rend(); }
=20
+
// Machine-CFG iterators
typedef std::vector<MachineBasicBlock *>::iterator pred_iterator;
typedef std::vector<MachineBasicBlock *>::const_iterator const_pred_iter=
ator;
@@ -219,10 +342,12 @@
bool livein_empty() const { return LiveIns.empty(); }
=20
/// getAlignment - Return alignment of the basic block.
+ /// The alignment is specified as log2(bytes).
///
unsigned getAlignment() const { return Alignment; }
=20
/// setAlignment - Set alignment of the basic block.
+ /// The alignment is specified as log2(bytes).
///
void setAlignment(unsigned Align) { Alignment =3D Align; }
=20
@@ -239,7 +364,7 @@
const MachineBasicBlock *getLandingPadSuccessor() const;
=20
// Code Layout methods.
- =20
+
/// moveBefore/moveAfter - move 'this' block before or after the specifi=
ed
/// block. This only moves the block, it does not modify the CFG or adj=
ust
/// potential fall-throughs at the end of the block.
@@ -286,7 +411,7 @@
/// in transferSuccessors, and update PHI operands in the successor bloc=
ks
/// which refer to fromMBB to refer to this.
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *fromMBB);
- =20
+
/// isSuccessor - Return true if the specified MBB is a successor of this
/// block.
bool isSuccessor(const MachineBasicBlock *MBB) const;
@@ -304,7 +429,7 @@
/// branch to do so (e.g., a table jump). True is a conservative answer.
bool canFallThrough();
=20
- /// Returns a pointer to the first instructon in this block that is not =
a=20
+ /// Returns a pointer to the first instructon in this block that is not a
/// PHINode instruction. When adding instruction to the beginning of the
/// basic block, they should be added before the returned value, not bef=
ore
/// the first instruction, which might be PHI.
@@ -320,18 +445,16 @@
/// instruction of this basic block. If a terminator does not exist,
/// it returns end()
iterator getFirstTerminator();
+ const_iterator getFirstTerminator() const;
=20
- const_iterator getFirstTerminator() const {
- return const_cast<MachineBasicBlock*>(this)->getFirstTerminator();
- }
+ /// getFirstInstrTerminator - Same getFirstTerminator but it ignores bun=
dles
+ /// and return an instr_iterator instead.
+ instr_iterator getFirstInstrTerminator();
=20
/// getLastNonDebugInstr - returns an iterator to the last non-debug
/// instruction in the basic block, or end()
iterator getLastNonDebugInstr();
-
- const_iterator getLastNonDebugInstr() const {
- return const_cast<MachineBasicBlock*>(this)->getLastNonDebugInstr();
- }
+ const_iterator getLastNonDebugInstr() const;
=20
/// SplitCriticalEdge - Split the critical edge from this block to the
/// given successor block, and return the newly created block, or null
@@ -344,38 +467,88 @@
void pop_front() { Insts.pop_front(); }
void pop_back() { Insts.pop_back(); }
void push_back(MachineInstr *MI) { Insts.push_back(MI); }
+
template<typename IT>
- void insert(iterator I, IT S, IT E) { Insts.insert(I, S, E); }
- iterator insert(iterator I, MachineInstr *M) { return Insts.insert(I, M)=
; }
- iterator insertAfter(iterator I, MachineInstr *M) {=20
- return Insts.insertAfter(I, M);=20
+ void insert(instr_iterator I, IT S, IT E) {
+ Insts.insert(I, S, E);
+ }
+ instr_iterator insert(instr_iterator I, MachineInstr *M) {
+ return Insts.insert(I, M);
+ }
+ instr_iterator insertAfter(instr_iterator I, MachineInstr *M) {
+ return Insts.insertAfter(I, M);
}
=20
- // erase - Remove the specified element or range from the instruction li=
st.
- // These functions delete any instructions removed.
- //
- iterator erase(iterator I) { return Insts.erase(I); }
- iterator erase(iterator I, iterator E) { return Insts.erase(I, E); }
- MachineInstr *remove(MachineInstr *I) { return Insts.remove(I); }
- void clear() { Insts.clear(); }
+ template<typename IT>
+ void insert(iterator I, IT S, IT E) {
+ Insts.insert(I.getInstrIterator(), S, E);
+ }
+ iterator insert(iterator I, MachineInstr *M) {
+ return Insts.insert(I.getInstrIterator(), M);
+ }
+ iterator insertAfter(iterator I, MachineInstr *M) {
+ return Insts.insertAfter(I.getInstrIterator(), M);
+ }
+
+ /// erase - Remove the specified element or range from the instruction l=
ist.
+ /// These functions delete any instructions removed.
+ ///
+ instr_iterator erase(instr_iterator I) {
+ return Insts.erase(I);
+ }
+ instr_iterator erase(instr_iterator I, instr_iterator E) {
+ return Insts.erase(I, E);
+ }
+ instr_iterator erase_instr(MachineInstr *I) {
+ instr_iterator MII(I);
+ return erase(MII);
+ }
+
+ iterator erase(iterator I);
+ iterator erase(iterator I, iterator E) {
+ return Insts.erase(I.getInstrIterator(), E.getInstrIterator());
+ }
+ iterator erase(MachineInstr *I) {
+ iterator MII(I);
+ return erase(MII);
+ }
+
+ /// remove - Remove the instruction from the instruction list. This func=
tion
+ /// does not delete the instruction. WARNING: Note, if the specified
+ /// instruction is a bundle this function will remove all the bundled
+ /// instructions as well. It is up to the caller to keep a list of the
+ /// bundled instructions and re-insert them if desired. This function is
+ /// *not recommended* for manipulating instructions with bundles. Use
+ /// splice instead.
+ MachineInstr *remove(MachineInstr *I);
+ void clear() {
+ Insts.clear();
+ }
=20
/// splice - Take an instruction from MBB 'Other' at the position From,
/// and insert it into this MBB right before 'where'.
- void splice(iterator where, MachineBasicBlock *Other, iterator From) {
+ void splice(instr_iterator where, MachineBasicBlock *Other,
+ instr_iterator From) {
Insts.splice(where, Other->Insts, From);
}
+ void splice(iterator where, MachineBasicBlock *Other, iterator From);
=20
/// splice - Take a block of instructions from MBB 'Other' in the range =
[From,
/// To), and insert them into this MBB right before 'where'.
+ void splice(instr_iterator where, MachineBasicBlock *Other, instr_iterat=
or From,
+ instr_iterator To) {
+ Insts.splice(where, Other->Insts, From, To);
+ }
void splice(iterator where, MachineBasicBlock *Other, iterator From,
iterator To) {
- Insts.splice(where, Other->Insts, From, To);
+ Insts.splice(where.getInstrIterator(), Other->Insts,
+ From.getInstrIterator(), To.getInstrIterator());
}
=20
/// removeFromParent - This method unlinks 'this' from the containing
/// function, and returns it, but does not delete it.
MachineBasicBlock *removeFromParent();
- =20
+
/// eraseFromParent - This method unlinks 'this' from the containing
/// function and deletes it.
void eraseFromParent();
@@ -396,7 +569,10 @@
=20
/// findDebugLoc - find the next valid DebugLoc starting at MBBI, skippi=
ng
/// any DBG_VALUE instructions. Return UnknownLoc if there is none.
- DebugLoc findDebugLoc(MachineBasicBlock::iterator &MBBI);
+ DebugLoc findDebugLoc(instr_iterator MBBI);
+ DebugLoc findDebugLoc(iterator MBBI) {
+ return findDebugLoc(MBBI.getInstrIterator());
+ }
=20
// Debugging methods.
void dump() const;
@@ -418,13 +594,14 @@
/// getWeightIterator - Return weight iterator corresponding to the I
/// successor iterator.
weight_iterator getWeightIterator(succ_iterator I);
+ const_weight_iterator getWeightIterator(const_succ_iterator I) const;
=20
friend class MachineBranchProbabilityInfo;
=20
/// getSuccWeight - Return weight of the edge from this block to MBB. Th=
is
/// method should NOT be called directly, but by using getEdgeWeight met=
hod
/// from MachineBranchProbabilityInfo class.
- uint32_t getSuccWeight(MachineBasicBlock *succ);
+ uint32_t getSuccWeight(const MachineBasicBlock *succ) const;
=20
=20
// Methods used to maintain doubly linked list of blocks...
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineBlockFrequencyInfo.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineBlockFrequencyInfo.h Tu=
e Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineBlockFrequencyInfo.h Tu=
e Apr 17 11:51:51 2012 +0300
@@ -20,6 +20,7 @@
=20
namespace llvm {
=20
+class MachineBasicBlock;
class MachineBranchProbabilityInfo;
template<class BlockT, class FunctionT, class BranchProbInfoT>
class BlockFrequencyImpl;
@@ -28,7 +29,8 @@
/// machine basic block frequencies.
class MachineBlockFrequencyInfo : public MachineFunctionPass {
=20
- BlockFrequencyImpl<MachineBasicBlock, MachineFunction, MachineBranchProb=
abilityInfo> *MBFI;
+ BlockFrequencyImpl<MachineBasicBlock, MachineFunction,
+ MachineBranchProbabilityInfo> *MBFI;
=20
public:
static char ID;
@@ -46,7 +48,7 @@
/// that we should not rely on the value itself, but only on the compari=
son to
/// the other block frequencies. We do this to avoid using of floating p=
oints.
///
- BlockFrequency getBlockFreq(MachineBasicBlock *MBB) const;
+ BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const;
};
=20
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineBranchProbabilityInfo.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineBranchProbabilityInfo.h=
Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineBranchProbabilityInfo.h=
Tue Apr 17 11:51:51 2012 +0300
@@ -25,6 +25,7 @@
class MachineBasicBlock;
=20
class MachineBranchProbabilityInfo : public ImmutablePass {
+ virtual void anchor();
=20
// Default weight value. Used when we don't have information about the e=
dge.
// TODO: DEFAULT_WEIGHT makes sense during static predication, when none=
of
@@ -34,9 +35,6 @@
// weight to just "inherit" the non-zero weight of an adjacent successor.
static const uint32_t DEFAULT_WEIGHT =3D 16;
=20
- // Get sum of the block successors' weights.
- uint32_t getSumForBlock(MachineBasicBlock *MBB) const;
-
public:
static char ID;
=20
@@ -51,17 +49,27 @@
=20
// Return edge weight. If we don't have any informations about it - retu=
rn
// DEFAULT_WEIGHT.
- uint32_t getEdgeWeight(MachineBasicBlock *Src, MachineBasicBlock *Dst) c=
onst;
+ uint32_t getEdgeWeight(const MachineBasicBlock *Src,
+ const MachineBasicBlock *Dst) const;
+
+ // Get sum of the block successors' weights, potentially scaling them to=
fit
+ // within 32-bits. If scaling is required, sets Scale based on the neces=
sary
+ // adjustment. Any edge weights used with the sum should be divided by S=
cale.
+ uint32_t getSumForBlock(const MachineBasicBlock *MBB, uint32_t &Scale) c=
onst;
=20
// A 'Hot' edge is an edge which probability is >=3D 80%.
bool isEdgeHot(MachineBasicBlock *Src, MachineBasicBlock *Dst) const;
=20
// Return a hot successor for the block BB or null if there isn't one.
+ // NB: This routine's complexity is linear on the number of successors.
MachineBasicBlock *getHotSucc(MachineBasicBlock *MBB) const;
=20
// Return a probability as a fraction between 0 (0% probability) and
// 1 (100% probability), however the value is never equal to 0, and can =
be 1
// only iff SRC block has only one successor.
+ // NB: This routine's complexity is linear on the number of successors of
+ // Src. Querying sequentially for each successor's probability is a quad=
ratic
+ // query pattern.
BranchProbability getEdgeProbability(MachineBasicBlock *Src,
MachineBasicBlock *Dst) const;
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineCodeEmitter.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineCodeEmitter.h Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineCodeEmitter.h Tue Apr 1=
7 11:51:51 2012 +0300
@@ -20,6 +20,8 @@
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/DebugLoc.h"
=20
+#include <string>
+
namespace llvm {
=20
class MachineBasicBlock;
@@ -49,6 +51,7 @@
/// occurred, more memory is allocated, and we reemit the code into it.
///=20
class MachineCodeEmitter {
+ virtual void anchor();
protected:
/// BufferBegin/BufferEnd - Pointers to the start and end of the memory
/// allocated for this code buffer.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineConstantPool.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineConstantPool.h Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineConstantPool.h Tue Apr =
17 11:51:51 2012 +0300
@@ -34,6 +34,7 @@
/// Abstract base class for all machine specific constantpool value subcla=
sses.
///
class MachineConstantPoolValue {
+ virtual void anchor();
Type *Ty;
=20
public:
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineDominators.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineDominators.h Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineDominators.h Tue Apr 17=
11:51:51 2012 +0300
@@ -84,7 +84,8 @@
=20
// Loop through the basic block until we find A or B.
MachineBasicBlock::iterator I =3D BBA->begin();
- for (; &*I !=3D A && &*I !=3D B; ++I) /*empty*/;
+ for (; &*I !=3D A && &*I !=3D B; ++I)
+ /*empty*/ ;
=20
//if(!DT.IsPostDominators) {
// A dominates B if it is found first in the basic block.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineFrameInfo.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineFrameInfo.h Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineFrameInfo.h Tue Apr 17 =
11:51:51 2012 +0300
@@ -465,7 +465,7 @@
bool isSpillSlotObjectIndex(int ObjectIdx) const {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
- return Objects[ObjectIdx+NumFixedObjects].isSpillSlot;;
+ return Objects[ObjectIdx+NumFixedObjects].isSpillSlot;
}
=20
/// isDeadObjectIndex - Returns true if the specified index corresponds =
to
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineFunction.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineFunction.h Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineFunction.h Tue Apr 17 1=
1:51:51 2012 +0300
@@ -120,10 +120,12 @@
/// Alignment - The alignment of the function.
unsigned Alignment;
=20
- /// CallsSetJmp - True if the function calls setjmp or sigsetjmp. This i=
s used
- /// to limit optimizations which cannot reason about the control flow of
- /// setjmp.
- bool CallsSetJmp;
+ /// ExposesReturnsTwice - True if the function calls setjmp or related
+ /// functions with attribute "returns twice", but doesn't have
+ /// the attribute itself.
+ /// This is used to limit optimizations which cannot reason
+ /// about the control flow of such functions.
+ bool ExposesReturnsTwice;
=20
MachineFunction(const MachineFunction &); // DO NOT IMPLEMENT
void operator=3D(const MachineFunction&); // DO NOT IMPLEMENT
@@ -187,20 +189,22 @@
///
void setAlignment(unsigned A) { Alignment =3D A; }
=20
- /// EnsureAlignment - Make sure the function is at least 'A' bits aligne=
d.
+ /// EnsureAlignment - Make sure the function is at least 1 << A bytes al=
igned.
void EnsureAlignment(unsigned A) {
if (Alignment < A) Alignment =3D A;
}
=20
- /// callsSetJmp - Returns true if the function calls setjmp or sigsetjmp.
- bool callsSetJmp() const {
- return CallsSetJmp;
+ /// exposesReturnsTwice - Returns true if the function calls setjmp or
+ /// any other similar functions with attribute "returns twice" without
+ /// having the attribute itself.
+ bool exposesReturnsTwice() const {
+ return ExposesReturnsTwice;
}
=20
- /// setCallsSetJmp - Set a flag that indicates if there's a call to setj=
mp or
- /// sigsetjmp.
- void setCallsSetJmp(bool B) {
- CallsSetJmp =3D B;
+ /// setCallsSetJmp - Set a flag that indicates if there's a call to
+ /// a "returns twice" function.
+ void setExposesReturnsTwice(bool B) {
+ ExposesReturnsTwice =3D B;
}
=20
/// getInfo - Keep track of various per-function pieces of information f=
or
@@ -376,7 +380,8 @@
MachineMemOperand *getMachineMemOperand(MachinePointerInfo PtrInfo,
unsigned f, uint64_t s,
unsigned base_alignment,
- const MDNode *TBAAInfo =3D 0);
+ const MDNode *TBAAInfo =3D 0,
+ const MDNode *Ranges =3D 0);
=20
/// getMachineMemOperand - Allocate a new MachineMemOperand by copying
/// an existing one, adjusting by an offset and using the given size.
@@ -437,6 +442,7 @@
typedef MachineFunction::iterator nodes_iterator;
static nodes_iterator nodes_begin(MachineFunction *F) { return F->begin(=
); }
static nodes_iterator nodes_end (MachineFunction *F) { return F->end();=
}
+ static unsigned size (MachineFunction *F) { return F->size()=
; }
};
template <> struct GraphTraits<const MachineFunction*> :
public GraphTraits<const MachineBasicBlock*> {
@@ -452,6 +458,9 @@
static nodes_iterator nodes_end (const MachineFunction *F) {
return F->end();
}
+ static unsigned size (const MachineFunction *F) {
+ return F->size();
+ }
};
=20
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineFunctionAnalysis.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineFunctionAnalysis.h Tue =
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineFunctionAnalysis.h Tue =
Apr 17 11:51:51 2012 +0300
@@ -26,17 +26,14 @@
struct MachineFunctionAnalysis : public FunctionPass {
private:
const TargetMachine &TM;
- CodeGenOpt::Level OptLevel;
MachineFunction *MF;
unsigned NextFnNum;
public:
static char ID;
- explicit MachineFunctionAnalysis(const TargetMachine &tm,
- CodeGenOpt::Level OL =3D CodeGenOpt::De=
fault);
+ explicit MachineFunctionAnalysis(const TargetMachine &tm);
~MachineFunctionAnalysis();
=20
MachineFunction &getMF() const { return *MF; }
- CodeGenOpt::Level getOptLevel() const { return OptLevel; }
=20
virtual const char* getPassName() const {
return "Machine Function Analysis";
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineInstr.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineInstr.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineInstr.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -19,6 +19,7 @@
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/Target/TargetOpcodes.h"
+#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/ilist.h"
#include "llvm/ADT/ilist_node.h"
#include "llvm/ADT/STLExtras.h"
@@ -53,9 +54,11 @@
};
=20
enum MIFlag {
- NoFlags =3D 0,
- FrameSetup =3D 1 << 0 // Instruction is used as a part=
of
+ NoFlags =3D 0,
+ FrameSetup =3D 1 << 0, // Instruction is used as a part=
of
// function frame setup code.
+ InsideBundle =3D 1 << 1 // Instruction is inside a bundl=
e (not
+ // the first MI in a bundle)
};
private:
const MCInstrDesc *MCID; // Instruction descriptor.
@@ -71,9 +74,10 @@
// anything other than to convey c=
omment
// information to AsmPrinter.
=20
+ uint16_t NumMemRefs; // information on memory references
+ mmo_iterator MemRefs;
+
std::vector<MachineOperand> Operands; // the operands
- mmo_iterator MemRefs; // information on memory references
- mmo_iterator MemRefsEnd;
MachineBasicBlock *Parent; // Pointer to the owning basic blo=
ck.
DebugLoc debugLoc; // Source line information.
=20
@@ -148,6 +152,12 @@
AsmPrinterFlags |=3D (uint8_t)Flag;
}
=20
+ /// clearAsmPrinterFlag - clear specific AsmPrinter flags
+ ///
+ void clearAsmPrinterFlag(CommentFlag Flag) {
+ AsmPrinterFlags &=3D ~Flag;
+ }
+
/// getFlags - Return the MI flags bitvector.
uint8_t getFlags() const {
return Flags;
@@ -167,12 +177,64 @@
Flags =3D flags;
}
=20
- /// clearAsmPrinterFlag - clear specific AsmPrinter flags
+ /// clearFlag - Clear a MI flag.
+ void clearFlag(MIFlag Flag) {
+ Flags &=3D ~((uint8_t)Flag);
+ }
+
+ /// isInsideBundle - Return true if MI is in a bundle (but not the first=
MI
+ /// in a bundle).
///
- void clearAsmPrinterFlag(CommentFlag Flag) {
- AsmPrinterFlags &=3D ~Flag;
+ /// A bundle looks like this before it's finalized:
+ /// ----------------
+ /// | MI |
+ /// ----------------
+ /// |
+ /// ----------------
+ /// | MI * |
+ /// ----------------
+ /// |
+ /// ----------------
+ /// | MI * |
+ /// ----------------
+ /// In this case, the first MI starts a bundle but is not inside a bundl=
e, the
+ /// next 2 MIs are considered "inside" the bundle.
+ ///
+ /// After a bundle is finalized, it looks like this:
+ /// ----------------
+ /// | Bundle |
+ /// ----------------
+ /// |
+ /// ----------------
+ /// | MI * |
+ /// ----------------
+ /// |
+ /// ----------------
+ /// | MI * |
+ /// ----------------
+ /// |
+ /// ----------------
+ /// | MI * |
+ /// ----------------
+ /// The first instruction has the special opcode "BUNDLE". It's not "ins=
ide"
+ /// a bundle, but the next three MIs are.
+ bool isInsideBundle() const {
+ return getFlag(InsideBundle);
}
=20
+ /// setIsInsideBundle - Set InsideBundle bit.
+ ///
+ void setIsInsideBundle(bool Val =3D true) {
+ if (Val)
+ setFlag(InsideBundle);
+ else
+ clearFlag(InsideBundle);
+ }
+
+ /// isBundled - Return true if this instruction part of a bundle. This i=
s true
+ /// if either itself or its following instruction is marked "InsideBundl=
e".
+ bool isBundled() const;
+
/// getDebugLoc - Returns the debug location id of this MachineInstr.
///
DebugLoc getDebugLoc() const { return debugLoc; }
@@ -223,15 +285,285 @@
=20
/// Access to memory operands of the instruction
mmo_iterator memoperands_begin() const { return MemRefs; }
- mmo_iterator memoperands_end() const { return MemRefsEnd; }
- bool memoperands_empty() const { return MemRefsEnd =3D=3D MemRefs; }
+ mmo_iterator memoperands_end() const { return MemRefs + NumMemRefs; }
+ bool memoperands_empty() const { return NumMemRefs =3D=3D 0; }
=20
/// hasOneMemOperand - Return true if this instruction has exactly one
/// MachineMemOperand.
bool hasOneMemOperand() const {
- return MemRefsEnd - MemRefs =3D=3D 1;
+ return NumMemRefs =3D=3D 1;
}
=20
+ /// API for querying MachineInstr properties. They are the same as MCIns=
trDesc
+ /// queries but they are bundle aware.
+
+ enum QueryType {
+ IgnoreBundle, // Ignore bundles
+ AnyInBundle, // Return true if any instruction in bundle has prope=
rty
+ AllInBundle // Return true if all instructions in bundle have pro=
perty
+ };
+
+ /// hasProperty - Return true if the instruction (or in the case of a bu=
ndle,
+ /// the instructions inside the bundle) has the specified property.
+ /// The first argument is the property being queried.
+ /// The second argument indicates whether the query should look inside
+ /// instruction bundles.
+ bool hasProperty(unsigned MCFlag, QueryType Type =3D AnyInBundle) const {
+ // Inline the fast path.
+ if (Type =3D=3D IgnoreBundle || !isBundle())
+ return getDesc().getFlags() & (1 << MCFlag);
+
+ // If we have a bundle, take the slow path.
+ return hasPropertyInBundle(1 << MCFlag, Type);
+ }
+
+ /// isVariadic - Return true if this instruction can have a variable num=
ber of
+ /// operands. In this case, the variable operands will be after the nor=
mal
+ /// operands but before the implicit definitions and uses (if any are
+ /// present).
+ bool isVariadic(QueryType Type =3D IgnoreBundle) const {
+ return hasProperty(MCID::Variadic, Type);
+ }
+
+ /// hasOptionalDef - Set if this instruction has an optional definition,=
e.g.
+ /// ARM instructions which can set condition code if 's' bit is set.
+ bool hasOptionalDef(QueryType Type =3D IgnoreBundle) const {
+ return hasProperty(MCID::HasOptionalDef, Type);
+ }
+
+ /// isPseudo - Return true if this is a pseudo instruction that doesn't
+ /// correspond to a real machine instruction.
+ ///
+ bool isPseudo(QueryType Type =3D IgnoreBundle) const {
+ return hasProperty(MCID::Pseudo, Type);
+ }
+
+ bool isReturn(QueryType Type =3D AnyInBundle) const {
+ return hasProperty(MCID::Return, Type);
+ }
+
+ bool isCall(QueryType Type =3D AnyInBundle) const {
+ return hasProperty(MCID::Call, Type);
+ }
+
+ /// isBarrier - Returns true if the specified instruction stops control =
flow
+ /// from executing the instruction immediately following it. Examples i=
nclude
+ /// unconditional branches and return instructions.
+ bool isBarrier(QueryType Type =3D AnyInBundle) const {
+ return hasProperty(MCID::Barrier, Type);
+ }
+
+ /// isTerminator - Returns true if this instruction part of the terminat=
or for
+ /// a basic block. Typically this is things like return and branch
+ /// instructions.
+ ///
+ /// Various passes use this to insert code into the bottom of a basic bl=
ock,
+ /// but before control flow occurs.
+ bool isTerminator(QueryType Type =3D AnyInBundle) const {
+ return hasProperty(MCID::Terminator, Type);
+ }
+
+ /// isBranch - Returns true if this is a conditional, unconditional, or
+ /// indirect branch. Predicates below can be used to discriminate betwe=
en
+ /// these cases, and the TargetInstrInfo::AnalyzeBranch method can be us=
ed to
+ /// get more information.
+ bool isBranch(QueryType Type =3D AnyInBundle) const {
+ return hasProperty(MCID::Branch, Type);
+ }
+
+ /// isIndirectBranch - Return true if this is an indirect branch, such a=
s a
+ /// branch through a register.
+ bool isIndirectBranch(QueryType Type =3D AnyInBundle) const {
+ return hasProperty(MCID::IndirectBranch, Type);
+ }
+
+ /// isConditionalBranch - Return true if this is a branch which may fall
+ /// through to the next instruction or may transfer control flow to some=
other
+ /// block. The TargetInstrInfo::AnalyzeBranch method can be used to get=
more
+ /// information about this branch.
+ bool isConditionalBranch(QueryType Type =3D AnyInBundle) const {
+ return isBranch(Type) & !isBarrier(Type) & !isIndirectBranch(Type);
+ }
+
+ /// isUnconditionalBranch - Return true if this is a branch which always
+ /// transfers control flow to some other block. The
+ /// TargetInstrInfo::AnalyzeBranch method can be used to get more inform=
ation
+ /// about this branch.
+ bool isUnconditionalBranch(QueryType Type =3D AnyInBundle) const {
+ return isBranch(Type) & isBarrier(Type) & !isIndirectBranch(Type);
+ }
+
+ // isPredicable - Return true if this instruction has a predicate operan=
d that
+ // controls execution. It may be set to 'always', or may be set to other
+ /// values. There are various methods in TargetInstrInfo that can be u=
sed to
+ /// control and modify the predicate in this instruction.
+ bool isPredicable(QueryType Type =3D AllInBundle) const {
+ // If it's a bundle than all bundled instructions must be predicable f=
or this
+ // to return true.
+ return hasProperty(MCID::Predicable, Type);
+ }
+
+ /// isCompare - Return true if this instruction is a comparison.
+ bool isCompare(QueryType Type =3D IgnoreBundle) const {
+ return hasProperty(MCID::Compare, Type);
+ }
+
+ /// isMoveImmediate - Return true if this instruction is a move immediate
+ /// (including conditional moves) instruction.
+ bool isMoveImmediate(QueryType Type =3D IgnoreBundle) const {
+ return hasProperty(MCID::MoveImm, Type);
+ }
+
+ /// isBitcast - Return true if this instruction is a bitcast instruction.
+ ///
+ bool isBitcast(QueryType Type =3D IgnoreBundle) const {
+ return hasProperty(MCID::Bitcast, Type);
+ }
+
+ /// isNotDuplicable - Return true if this instruction cannot be safely
+ /// duplicated. For example, if the instruction has a unique labels att=
ached
+ /// to it, duplicating it would cause multiple definition errors.
+ bool isNotDuplicable(QueryType Type =3D AnyInBundle) const {
+ return hasProperty(MCID::NotDuplicable, Type);
+ }
+
+ /// hasDelaySlot - Returns true if the specified instruction has a delay=
slot
+ /// which must be filled by the code generator.
+ bool hasDelaySlot(QueryType Type =3D AnyInBundle) const {
+ return hasProperty(MCID::DelaySlot, Type);
+ }
+
+ /// canFoldAsLoad - Return true for instructions that can be folded as
+ /// memory operands in other instructions. The most common use for this
+ /// is instructions that are simple loads from memory that don't modify
+ /// the loaded value in any way, but it can also be used for instructions
+ /// that can be expressed as constant-pool loads, such as V_SETALLONES
+ /// on x86, to allow them to be folded when it is beneficial.
+ /// This should only be set on instructions that return a value in their
+ /// only virtual register definition.
+ bool canFoldAsLoad(QueryType Type =3D IgnoreBundle) const {
+ return hasProperty(MCID::FoldableAsLoad, Type);
+ }
+
+ //=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
+ // Side Effect Analysis
+ //=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
+
+ /// mayLoad - Return true if this instruction could possibly read memory.
+ /// Instructions with this flag set are not necessarily simple load
+ /// instructions, they may load a value and modify it, for example.
+ bool mayLoad(QueryType Type =3D AnyInBundle) const {
+ return hasProperty(MCID::MayLoad, Type);
+ }
+
+
+ /// mayStore - Return true if this instruction could possibly modify mem=
ory.
+ /// Instructions with this flag set are not necessarily simple store
+ /// instructions, they may store a modified value based on their operand=
s, or
+ /// may not actually modify anything, for example.
+ bool mayStore(QueryType Type =3D AnyInBundle) const {
+ return hasProperty(MCID::MayStore, Type);
+ }
+
+ //=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
+ // Flags that indicate whether an instruction can be modified by a metho=
d.
+ //=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
+
+ /// isCommutable - Return true if this may be a 2- or 3-address
+ /// instruction (of the form "X =3D op Y, Z, ..."), which produces the s=
ame
+ /// result if Y and Z are exchanged. If this flag is set, then the
+ /// TargetInstrInfo::commuteInstruction method may be used to hack on the
+ /// instruction.
+ ///
+ /// Note that this flag may be set on instructions that are only commuta=
ble
+ /// sometimes. In these cases, the call to commuteInstruction will fail.
+ /// Also note that some instructions require non-trivial modification to
+ /// commute them.
+ bool isCommutable(QueryType Type =3D IgnoreBundle) const {
+ return hasProperty(MCID::Commutable, Type);
+ }
+
+ /// isConvertibleTo3Addr - Return true if this is a 2-address instruction
+ /// which can be changed into a 3-address instruction if needed. Doing =
this
+ /// transformation can be profitable in the register allocator, because =
it
+ /// means that the instruction can use a 2-address form if possible, but
+ /// degrade into a less efficient form if the source and dest register c=
annot
+ /// be assigned to the same register. For example, this allows the x86
+ /// backend to turn a "shl reg, 3" instruction into an LEA instruction, =
which
+ /// is the same speed as the shift but has bigger code size.
+ ///
+ /// If this returns true, then the target must implement the
+ /// TargetInstrInfo::convertToThreeAddress method for this instruction, =
which
+ /// is allowed to fail if the transformation isn't valid for this specif=
ic
+ /// instruction (e.g. shl reg, 4 on x86).
+ ///
+ bool isConvertibleTo3Addr(QueryType Type =3D IgnoreBundle) const {
+ return hasProperty(MCID::ConvertibleTo3Addr, Type);
+ }
+
+ /// usesCustomInsertionHook - Return true if this instruction requires
+ /// custom insertion support when the DAG scheduler is inserting it into=
a
+ /// machine basic block. If this is true for the instruction, it basica=
lly
+ /// means that it is a pseudo instruction used at SelectionDAG time that=
is
+ /// expanded out into magic code by the target when MachineInstrs are fo=
rmed.
+ ///
+ /// If this is true, the TargetLoweringInfo::InsertAtEndOfBasicBlock met=
hod
+ /// is used to insert this into the MachineBasicBlock.
+ bool usesCustomInsertionHook(QueryType Type =3D IgnoreBundle) const {
+ return hasProperty(MCID::UsesCustomInserter, Type);
+ }
+
+ /// hasPostISelHook - Return true if this instruction requires *adjustme=
nt*
+ /// after instruction selection by calling a target hook. For example, t=
his
+ /// can be used to fill in ARM 's' optional operand depending on whether
+ /// the conditional flag register is used.
+ bool hasPostISelHook(QueryType Type =3D IgnoreBundle) const {
+ return hasProperty(MCID::HasPostISelHook, Type);
+ }
+
+ /// isRematerializable - Returns true if this instruction is a candidate=
for
+ /// remat. This flag is deprecated, please don't use it anymore. If th=
is
+ /// flag is set, the isReallyTriviallyReMaterializable() method is calle=
d to
+ /// verify the instruction is really rematable.
+ bool isRematerializable(QueryType Type =3D AllInBundle) const {
+ // It's only possible to re-mat a bundle if all bundled instructions a=
re
+ // re-materializable.
+ return hasProperty(MCID::Rematerializable, Type);
+ }
+
+ /// isAsCheapAsAMove - Returns true if this instruction has the same cos=
t (or
+ /// less) than a move instruction. This is useful during certain types of
+ /// optimizations (e.g., remat during two-address conversion or machine =
licm)
+ /// where we would like to remat or hoist the instruction, but not if it=
costs
+ /// more than moving the instruction into the appropriate register. Note=
, we
+ /// are not marking copies from and to the same register class with this=
flag.
+ bool isAsCheapAsAMove(QueryType Type =3D AllInBundle) const {
+ // Only returns true for a bundle if all bundled instructions are chea=
p.
+ // FIXME: This probably requires a target hook.
+ return hasProperty(MCID::CheapAsAMove, Type);
+ }
+
+ /// hasExtraSrcRegAllocReq - Returns true if this instruction source ope=
rands
+ /// have special register allocation requirements that are not captured =
by the
+ /// operand register classes. e.g. ARM::STRD's two source registers must=
be an
+ /// even / odd pair, ARM::STM registers have to be in ascending order.
+ /// Post-register allocation passes should not attempt to change allocat=
ions
+ /// for sources of instructions with this flag.
+ bool hasExtraSrcRegAllocReq(QueryType Type =3D AnyInBundle) const {
+ return hasProperty(MCID::ExtraSrcRegAllocReq, Type);
+ }
+
+ /// hasExtraDefRegAllocReq - Returns true if this instruction def operan=
ds
+ /// have special register allocation requirements that are not captured =
by the
+ /// operand register classes. e.g. ARM::LDRD's two def registers must be=
an
+ /// even / odd pair, ARM::LDM registers have to be in ascending order.
+ /// Post-register allocation passes should not attempt to change allocat=
ions
+ /// for definitions of instructions with this flag.
+ bool hasExtraDefRegAllocReq(QueryType Type =3D AnyInBundle) const {
+ return hasProperty(MCID::ExtraDefRegAllocReq, Type);
+ }
+
+
enum MICheckType {
CheckDefs, // Check all operands for equality
CheckKillDead, // Check all operands including kill / dead markers
@@ -281,6 +613,9 @@
bool isRegSequence() const {
return getOpcode() =3D=3D TargetOpcode::REG_SEQUENCE;
}
+ bool isBundle() const {
+ return getOpcode() =3D=3D TargetOpcode::BUNDLE;
+ }
bool isCopy() const {
return getOpcode() =3D=3D TargetOpcode::COPY;
}
@@ -300,6 +635,9 @@
getOperand(0).getSubReg() =3D=3D getOperand(1).getSubReg();
}
=20
+ /// getBundleSize - Return the number of instructions inside the MI bund=
le.
+ unsigned getBundleSize() const;
+
/// readsRegister - Return true if the MachineInstr reads the specified
/// register. If TargetRegisterInfo is passed, then it also checks if th=
ere
/// is a read of a super-register.
@@ -372,6 +710,7 @@
/// that are not dead are skipped. If Overlap is true, then it also look=
s for
/// defs that merely overlap the specified register. If TargetRegisterIn=
fo is
/// non-null, then it also checks if there is a def of a super-register.
+ /// This may also return a register mask operand when Overlap is true.
int findRegisterDefOperandIdx(unsigned Reg,
bool isDead =3D false, bool Overlap =3D fa=
lse,
const TargetRegisterInfo *TRI =3D NULL) co=
nst;
@@ -416,7 +755,7 @@
/// isRegTiedToUseOperand - Given the index of a register def operand,
/// check if the register def is tied to a source operand, due to either
/// two-address elimination or inline assembly constraints. Returns the
- /// first tied use operand index by reference is UseOpIdx is not null.
+ /// first tied use operand index by reference if UseOpIdx is not null.
bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx =3D 0) =
const;
=20
/// isRegTiedToDefOperand - Return true if the use operand of the specif=
ied
@@ -448,6 +787,10 @@
const TargetRegisterInfo *RegInfo,
bool AddIfNotFound =3D false);
=20
+ /// clearRegisterKills - Clear all kill flags affecting Reg. If RegInfo=
is
+ /// provided, this includes super-register kills.
+ void clearRegisterKills(unsigned Reg, const TargetRegisterInfo *RegInfo);
+
/// addRegisterDead - We have determined MI defined a register without a=
use.
/// Look for the operand that defines it and mark it as IsDead. If
/// AddIfNotFound is true, add a implicit operand if it's not found. Ret=
urns
@@ -462,7 +805,10 @@
=20
/// setPhysRegsDeadExcept - Mark every physreg used by this instruction =
as
/// dead except those in the UsedRegs list.
- void setPhysRegsDeadExcept(const SmallVectorImpl<unsigned> &UsedRegs,
+ ///
+ /// On instructions with register mask operands, also add implicit-def
+ /// operands for all registers in UsedRegs.
+ void setPhysRegsDeadExcept(ArrayRef<unsigned> UsedRegs,
const TargetRegisterInfo &TRI);
=20
/// isSafeToMove - Return true if it is safe to move this instruction. If
@@ -550,7 +896,7 @@
/// list. This does not transfer ownership.
void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) {
MemRefs =3D NewMemRefs;
- MemRefsEnd =3D NewMemRefsEnd;
+ NumMemRefs =3D NewMemRefsEnd - NewMemRefs;
}
=20
private:
@@ -572,6 +918,10 @@
/// this instruction from their respective use lists. This requires tha=
t the
/// operands not be on their use lists yet.
void AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo);
+
+ /// hasPropertyInBundle - Slow path for hasProperty when we're dealing w=
ith a
+ /// bundle.
+ bool hasPropertyInBundle(unsigned Mask, QueryType Type) const;
};
=20
/// MachineInstrExpressionTrait - Special DenseMapInfo traits to compare
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineInstrBuilder.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineInstrBuilder.h Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineInstrBuilder.h Tue Apr =
17 11:51:51 2012 +0300
@@ -34,6 +34,7 @@
Undef =3D 0x20,
EarlyClobber =3D 0x40,
Debug =3D 0x80,
+ DefineNoRead =3D Define | Undef,
ImplicitDefine =3D Implicit | Define,
ImplicitKill =3D Implicit | Kill
};
@@ -124,6 +125,11 @@
return *this;
}
=20
+ const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const {
+ MI->addOperand(MachineOperand::CreateRegMask(Mask));
+ return *this;
+ }
+
const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const {
MI->addMemOperand(*MI->getParent()->getParent(), MMO);
return *this;
@@ -209,6 +215,30 @@
return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define);
}
=20
+inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
+ MachineBasicBlock::instr_iterator I,
+ DebugLoc DL,
+ const MCInstrDesc &MCID,
+ unsigned DestReg) {
+ MachineInstr *MI =3D BB.getParent()->CreateMachineInstr(MCID, DL);
+ BB.insert(I, MI);
+ return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define);
+}
+
+inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
+ MachineInstr *I,
+ DebugLoc DL,
+ const MCInstrDesc &MCID,
+ unsigned DestReg) {
+ if (I->isInsideBundle()) {
+ MachineBasicBlock::instr_iterator MII =3D I;
+ return BuildMI(BB, MII, DL, MCID, DestReg);
+ }
+
+ MachineBasicBlock::iterator MII =3D I;
+ return BuildMI(BB, MII, DL, MCID, DestReg);
+}
+
/// BuildMI - This version of the builder inserts the newly-built
/// instruction before the given position in the given MachineBasicBlock, =
and
/// does NOT take a destination register.
@@ -222,6 +252,28 @@
return MachineInstrBuilder(MI);
}
=20
+inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
+ MachineBasicBlock::instr_iterator I,
+ DebugLoc DL,
+ const MCInstrDesc &MCID) {
+ MachineInstr *MI =3D BB.getParent()->CreateMachineInstr(MCID, DL);
+ BB.insert(I, MI);
+ return MachineInstrBuilder(MI);
+}
+
+inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
+ MachineInstr *I,
+ DebugLoc DL,
+ const MCInstrDesc &MCID) {
+ if (I->isInsideBundle()) {
+ MachineBasicBlock::instr_iterator MII =3D I;
+ return BuildMI(BB, MII, DL, MCID);
+ }
+
+ MachineBasicBlock::iterator MII =3D I;
+ return BuildMI(BB, MII, DL, MCID);
+}
+
/// BuildMI - This version of the builder inserts the newly-built
/// instruction at the end of the given MachineBasicBlock, and does NOT ta=
ke a
/// destination register.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineJumpTableInfo.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineJumpTableInfo.h Tue Apr=
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineJumpTableInfo.h Tue Apr=
17 11:51:51 2012 +0300
@@ -47,7 +47,12 @@
/// EK_BlockAddress - Each entry is a plain address of block, e.g.:
/// .word LBB123
EK_BlockAddress,
- =20
+
+ /// EK_GPRel64BlockAddress - Each entry is an address of block, encoded
+ /// with a relocation as gp-relative, e.g.:
+ /// .gpdword LBB123
+ EK_GPRel64BlockAddress,
+
/// EK_GPRel32BlockAddress - Each entry is an address of block, encoded
/// with a relocation as gp-relative, e.g.:
/// .gprel32 LBB123
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineMemOperand.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineMemOperand.h Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineMemOperand.h Tue Apr 17=
11:51:51 2012 +0300
@@ -22,6 +22,7 @@
=20
class Value;
class FoldingSetNodeID;
+class MDNode;
class raw_ostream;
=20
/// MachinePointerInfo - This class contains a discriminated union of
@@ -83,6 +84,7 @@
uint64_t Size;
unsigned Flags;
const MDNode *TBAAInfo;
+ const MDNode *Ranges;
=20
public:
/// Flags values. These may be or'd together.
@@ -95,14 +97,17 @@
MOVolatile =3D 4,
/// The memory access is non-temporal.
MONonTemporal =3D 8,
+ /// The memory access is invariant.
+ MOInvariant =3D 16,
// This is the number of bits we need to represent flags.
- MOMaxBits =3D 4
+ MOMaxBits =3D 5
};
=20
/// MachineMemOperand - Construct an MachineMemOperand object with the
/// specified PtrInfo, flags, size, and base alignment.
MachineMemOperand(MachinePointerInfo PtrInfo, unsigned flags, uint64_t s,
- unsigned base_alignment, const MDNode *TBAAInfo =3D 0);
+ unsigned base_alignment, const MDNode *TBAAInfo =3D 0,
+ const MDNode *Ranges =3D 0);
=20
const MachinePointerInfo &getPointerInfo() const { return PtrInfo; }
=20
@@ -137,10 +142,14 @@
/// getTBAAInfo - Return the TBAA tag for the memory reference.
const MDNode *getTBAAInfo() const { return TBAAInfo; }
=20
+ /// getRanges - Return the range tag for the memory reference.
+ const MDNode *getRanges() const { return Ranges; }
+
bool isLoad() const { return Flags & MOLoad; }
bool isStore() const { return Flags & MOStore; }
bool isVolatile() const { return Flags & MOVolatile; }
bool isNonTemporal() const { return Flags & MONonTemporal; }
+ bool isInvariant() const { return Flags & MOInvariant; }
=20
/// refineAlignment - Update this MachineMemOperand to reflect the align=
ment
/// of MMO, if it has a greater alignment. This must only be used when t=
he
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineModuleInfo.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineModuleInfo.h Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineModuleInfo.h Tue Apr 17=
11:51:51 2012 +0300
@@ -161,10 +161,10 @@
/// in this module.
bool DbgInfoAvailable;
=20
- /// CallsExternalVAFunctionWithFloatingPointArguments - True if this mod=
ule
- /// calls VarArg function with floating point arguments. This is used t=
o emit
- /// an undefined reference to fltused on Windows targets.
- bool CallsExternalVAFunctionWithFloatingPointArguments;
+ /// UsesVAFloatArgument - True if this module calls VarArg function with
+ /// floating-point arguments. This is used to emit an undefined referen=
ce
+ /// to _fltused on Windows targets.
+ bool UsesVAFloatArgument;
=20
public:
static char ID; // Pass identification, replacement for typeid
@@ -223,12 +223,12 @@
bool callsUnwindInit() const { return CallsUnwindInit; }
void setCallsUnwindInit(bool b) { CallsUnwindInit =3D b; }
=20
- bool callsExternalVAFunctionWithFloatingPointArguments() const {
- return CallsExternalVAFunctionWithFloatingPointArguments;
+ bool usesVAFloatArgument() const {
+ return UsesVAFloatArgument;
}
=20
- void setCallsExternalVAFunctionWithFloatingPointArguments(bool b) {
- CallsExternalVAFunctionWithFloatingPointArguments =3D b;
+ void setUsesVAFloatArgument(bool b) {
+ UsesVAFloatArgument =3D b;
}
=20
/// getFrameMoves - Returns a reference to a list of moves done in the c=
urrent
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineOperand.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineOperand.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineOperand.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -48,6 +48,7 @@
MO_ExternalSymbol, ///< Name of external global symbol
MO_GlobalAddress, ///< Address of a global value
MO_BlockAddress, ///< Address of a basic block
+ MO_RegisterMask, ///< Mask of preserved registers.
MO_Metadata, ///< Metadata reference (for debug info)
MO_MCSymbol ///< MCSymbol reference (for debug/eh info)
};
@@ -102,6 +103,17 @@
///
bool IsUndef : 1;
=20
+ /// IsInternalRead - True if this operand reads a value that was defined
+ /// inside the same instruction or bundle. This flag can be set on both=
use
+ /// and def operands. On a sub-register def operand, it refers to the p=
art
+ /// of the register that isn't written. On a full-register def operand,=
it
+ /// is a noop.
+ ///
+ /// When this flag is set, the instruction bundle must contain at least =
one
+ /// other def of the register. If multiple instructions in the bundle d=
efine
+ /// the register, the meaning is target-defined.
+ bool IsInternalRead : 1;
+
/// IsEarlyClobber - True if this MO_Register 'def' operand is written to
/// by the MachineInstr before all input registers are read. This is us=
ed to
/// model the GCC inline asm '&' constraint modifier.
@@ -130,6 +142,7 @@
const ConstantFP *CFP; // For MO_FPImmediate.
const ConstantInt *CI; // For MO_CImmediate. Integers > 64bit.
int64_t ImmVal; // For MO_Immediate.
+ const uint32_t *RegMask; // For MO_RegisterMask.
const MDNode *MD; // For MO_Metadata.
MCSymbol *Sym; // For MO_MCSymbol
=20
@@ -209,10 +222,13 @@
bool isSymbol() const { return OpKind =3D=3D MO_ExternalSymbol; }
/// isBlockAddress - Tests if this is a MO_BlockAddress operand.
bool isBlockAddress() const { return OpKind =3D=3D MO_BlockAddress; }
+ /// isRegMask - Tests if this is a MO_RegisterMask operand.
+ bool isRegMask() const { return OpKind =3D=3D MO_RegisterMask; }
/// isMetadata - Tests if this is a MO_Metadata operand.
bool isMetadata() const { return OpKind =3D=3D MO_Metadata; }
bool isMCSymbol() const { return OpKind =3D=3D MO_MCSymbol; }
=20
+
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
// Accessors for Register Operands
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
@@ -258,6 +274,11 @@
return IsUndef;
}
=20
+ bool isInternalRead() const {
+ assert(isReg() && "Wrong MachineOperand accessor");
+ return IsInternalRead;
+ }
+
bool isEarlyClobber() const {
assert(isReg() && "Wrong MachineOperand accessor");
return IsEarlyClobber;
@@ -272,9 +293,12 @@
/// register. A use operand with the <undef> flag set doesn't read its
/// register. A sub-register def implicitly reads the other parts of the
/// register being redefined unless the <undef> flag is set.
+ ///
+ /// This refers to reading the register value from before the current
+ /// instruction or bundle. Internal bundle reads are not included.
bool readsReg() const {
assert(isReg() && "Wrong MachineOperand accessor");
- return !isUndef() && (isUse() || getSubReg());
+ return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
}
=20
/// getNextOperandForReg - Return the next MachineOperand in the functio=
n that
@@ -343,6 +367,11 @@
IsUndef =3D Val;
}
=20
+ void setIsInternalRead(bool Val =3D true) {
+ assert(isReg() && "Wrong MachineOperand accessor");
+ IsInternalRead =3D Val;
+ }
+
void setIsEarlyClobber(bool Val =3D true) {
assert(isReg() && IsDef && "Wrong MachineOperand accessor");
IsEarlyClobber =3D Val;
@@ -412,6 +441,28 @@
return Contents.OffsetedInfo.Val.SymbolName;
}
=20
+ /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
+ /// It is sometimes necessary to detach the register mask pointer from i=
ts
+ /// machine operand. This static method can be used for such detached bit
+ /// mask pointers.
+ static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) {
+ // See TargetRegisterInfo.h.
+ assert(PhysReg < (1u << 30) && "Not a physical register");
+ return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
+ }
+
+ /// clobbersPhysReg - Returns true if this RegMask operand clobbers Phys=
Reg.
+ bool clobbersPhysReg(unsigned PhysReg) const {
+ return clobbersPhysReg(getRegMask(), PhysReg);
+ }
+
+ /// getRegMask - Returns a bit mask of registers preserved by this RegMa=
sk
+ /// operand.
+ const uint32_t *getRegMask() const {
+ assert(isRegMask() && "Wrong MachineOperand accessor");
+ return Contents.RegMask;
+ }
+
const MDNode *getMetadata() const {
assert(isMetadata() && "Wrong MachineOperand accessor");
return Contents.MD;
@@ -498,6 +549,7 @@
Op.IsKill =3D isKill;
Op.IsDead =3D isDead;
Op.IsUndef =3D isUndef;
+ Op.IsInternalRead =3D false;
Op.IsEarlyClobber =3D isEarlyClobber;
Op.IsDebug =3D isDebug;
Op.SmallContents.RegNo =3D Reg;
@@ -557,6 +609,24 @@
Op.setTargetFlags(TargetFlags);
return Op;
}
+ /// CreateRegMask - Creates a register mask operand referencing Mask. T=
he
+ /// operand does not take ownership of the memory referenced by Mask, it=
must
+ /// remain valid for the lifetime of the operand.
+ ///
+ /// A RegMask operand represents a set of non-clobbered physical registe=
rs on
+ /// an instruction that clobbers many registers, typically a call. The =
bit
+ /// mask has a bit set for each physreg that is preserved by this
+ /// instruction, as described in the documentation for
+ /// TargetRegisterInfo::getCallPreservedMask().
+ ///
+ /// Any physreg with a 0 bit in the mask is clobbered by the instruction.
+ ///
+ static MachineOperand CreateRegMask(const uint32_t *Mask) {
+ assert(Mask && "Missing register mask");
+ MachineOperand Op(MachineOperand::MO_RegisterMask);
+ Op.Contents.RegMask =3D Mask;
+ return Op;
+ }
static MachineOperand CreateMetadata(const MDNode *Meta) {
MachineOperand Op(MachineOperand::MO_Metadata);
Op.Contents.MD =3D Meta;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachinePassRegistry.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachinePassRegistry.h Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachinePassRegistry.h Tue Apr =
17 11:51:51 2012 +0300
@@ -33,6 +33,7 @@
///
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
class MachinePassRegistryListener {
+ virtual void anchor();
public:
MachinePassRegistryListener() {}
virtual ~MachinePassRegistryListener() {}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/MachineRegisterInfo.h
--- a/head/contrib/llvm/include/llvm/CodeGen/MachineRegisterInfo.h Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/MachineRegisterInfo.h Tue Apr =
17 11:51:51 2012 +0300
@@ -15,12 +15,13 @@
#define LLVM_CODEGEN_MACHINEREGISTERINFO_H
=20
#include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/CodeGen/MachineInstrBundle.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/IndexedMap.h"
#include <vector>
=20
namespace llvm {
- =20
+
/// MachineRegisterInfo - Keep track of information for virtual and physic=
al
/// registers, including vreg register classes, use/def chains for registe=
rs,
/// etc.
@@ -31,6 +32,11 @@
/// registers have a single def.
bool IsSSA;
=20
+ /// TracksLiveness - True while register liveness is being tracked accur=
ately.
+ /// Basic block live-in lists, kill flags, and implicit defs may not be
+ /// accurate when after this flag is cleared.
+ bool TracksLiveness;
+
/// VRegInfo - Information we keep for each virtual register.
///
/// Each element in this list contains the register class of the vreg an=
d the
@@ -46,18 +52,32 @@
/// the allocator should prefer the physical register allocated to the v=
irtual
/// register of the hint.
IndexedMap<std::pair<unsigned, unsigned>, VirtReg2IndexFunctor> RegAlloc=
Hints;
- =20
+
/// PhysRegUseDefLists - This is an array of the head of the use/def lis=
t for
/// physical registers.
- MachineOperand **PhysRegUseDefLists;=20
- =20
+ MachineOperand **PhysRegUseDefLists;
+
/// UsedPhysRegs - This is a bit vector that is computed and set by the
/// register allocator, and must be kept up to date by passes that run a=
fter
/// register allocation (though most don't modify this). This is used
/// so that the code generator knows which callee save registers to save=
and
/// for other target specific uses.
+ /// This vector only has bits set for registers explicitly used, not the=
ir
+ /// aliases.
BitVector UsedPhysRegs;
- =20
+
+ /// UsedPhysRegMask - Additional used physregs, but including aliases.
+ BitVector UsedPhysRegMask;
+
+ /// ReservedRegs - This is a bit vector of reserved registers. The targ=
et
+ /// may change its mind about which registers should be reserved. This
+ /// vector is the frozen set of reserved registers when register allocat=
ion
+ /// started.
+ BitVector ReservedRegs;
+
+ /// AllocatableRegs - From TRI->getAllocatableSet.
+ mutable BitVector AllocatableRegs;
+
/// LiveIns/LiveOuts - Keep track of the physical registers that are
/// livein/liveout of the function. Live in values are typically argume=
nts in
/// registers, live out values are typically return values in registers.
@@ -65,7 +85,7 @@
/// stored in the second element.
std::vector<std::pair<unsigned, unsigned> > LiveIns;
std::vector<unsigned> LiveOuts;
- =20
+
MachineRegisterInfo(const MachineRegisterInfo&); // DO NOT IMPLEMENT
void operator=3D(const MachineRegisterInfo&); // DO NOT IMPLEMENT
public:
@@ -88,6 +108,23 @@
// leaveSSA - Indicates that the machine function is no longer in SSA fo=
rm.
void leaveSSA() { IsSSA =3D false; }
=20
+ /// tracksLiveness - Returns true when tracking register liveness accura=
tely.
+ ///
+ /// While this flag is true, register liveness information in basic block
+ /// live-in lists and machine instruction operands is accurate. This mea=
ns it
+ /// can be used to change the code in ways that affect the values in
+ /// registers, for example by the register scavenger.
+ ///
+ /// When this flag is false, liveness is no longer reliable.
+ bool tracksLiveness() const { return TracksLiveness; }
+
+ /// invalidateLiveness - Indicates that register liveness is no longer b=
eing
+ /// tracked accurately.
+ ///
+ /// This should be called by late passes that invalidate the liveness
+ /// information.
+ void invalidateLiveness() { TracksLiveness =3D false; }
+
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
// Register Info
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
@@ -141,7 +178,7 @@
return use_iterator(getRegUseDefListHead(RegNo));
}
static use_iterator use_end() { return use_iterator(0); }
- =20
+
/// use_empty - Return true if there are no instructions using the speci=
fied
/// register.
bool use_empty(unsigned RegNo) const { return use_begin(RegNo) =3D=3D us=
e_end(); }
@@ -157,7 +194,7 @@
return use_nodbg_iterator(getRegUseDefListHead(RegNo));
}
static use_nodbg_iterator use_nodbg_end() { return use_nodbg_iterator(0)=
; }
- =20
+
/// use_nodbg_empty - Return true if there are no non-Debug instructions
/// using the specified register.
bool use_nodbg_empty(unsigned RegNo) const {
@@ -171,8 +208,16 @@
/// replaceRegWith - Replace all instances of FromReg with ToReg in the
/// machine function. This is like llvm-level X->replaceAllUsesWith(Y),
/// except that it also changes any definitions of the register as well.
+ ///
+ /// Note that it is usually necessary to first constrain ToReg's register
+ /// class to match the FromReg constraints using:
+ ///
+ /// constrainRegClass(ToReg, getRegClass(FromReg))
+ ///
+ /// That function will return NULL if the virtual registers have incompa=
tible
+ /// constraints.
void replaceRegWith(unsigned FromReg, unsigned ToReg);
- =20
+
/// getRegUseDefListHead - Return the head pointer for the register use/=
def
/// list for the specified virtual or physical register.
MachineOperand *&getRegUseDefListHead(unsigned RegNo) {
@@ -180,7 +225,7 @@
return VRegInfo[RegNo].second;
return PhysRegUseDefLists[RegNo];
}
- =20
+
MachineOperand *getRegUseDefListHead(unsigned RegNo) const {
if (TargetRegisterInfo::isVirtualRegister(RegNo))
return VRegInfo[RegNo].second;
@@ -197,15 +242,20 @@
/// optimization passes which extend register lifetimes and need only
/// preserve conservative kill flag information.
void clearKillFlags(unsigned Reg) const;
- =20
+
#ifndef NDEBUG
void dumpUses(unsigned RegNo) const;
#endif
- =20
+
+ /// isConstantPhysReg - Returns true if PhysReg is unallocatable and con=
stant
+ /// throughout the function. It is safe to move instructions that read =
such
+ /// a physreg.
+ bool isConstantPhysReg(unsigned PhysReg, const MachineFunction &MF) cons=
t;
+
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
// Virtual Register Info
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
- =20
+
/// getRegClass - Return the register class of the specified virtual reg=
ister.
///
const TargetRegisterClass *getRegClass(unsigned Reg) const {
@@ -246,6 +296,9 @@
///
unsigned getNumVirtRegs() const { return VRegInfo.size(); }
=20
+ /// clearVirtRegs - Remove all virtual registers (after physreg assignme=
nt).
+ void clearVirtRegs();
+
/// setRegAllocationHint - Specify a register allocation hint for the
/// specified virtual register.
void setRegAllocationHint(unsigned Reg, unsigned Type, unsigned PrefReg)=
{
@@ -271,38 +324,87 @@
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
// Physical Register Use Info
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
- =20
+
/// isPhysRegUsed - Return true if the specified register is used in this
/// function. This only works after register allocation.
- bool isPhysRegUsed(unsigned Reg) const { return UsedPhysRegs[Reg]; }
- =20
+ bool isPhysRegUsed(unsigned Reg) const {
+ return UsedPhysRegs.test(Reg) || UsedPhysRegMask.test(Reg);
+ }
+
+ /// isPhysRegOrOverlapUsed - Return true if Reg or any overlapping regis=
ter
+ /// is used in this function.
+ bool isPhysRegOrOverlapUsed(unsigned Reg) const {
+ if (UsedPhysRegMask.test(Reg))
+ return true;
+ for (const uint16_t *AI =3D TRI->getOverlaps(Reg); *AI; ++AI)
+ if (UsedPhysRegs.test(*AI))
+ return true;
+ return false;
+ }
+
/// setPhysRegUsed - Mark the specified register used in this function.
/// This should only be called during and after register allocation.
- void setPhysRegUsed(unsigned Reg) { UsedPhysRegs[Reg] =3D true; }
+ void setPhysRegUsed(unsigned Reg) { UsedPhysRegs.set(Reg); }
=20
/// addPhysRegsUsed - Mark the specified registers used in this function.
/// This should only be called during and after register allocation.
void addPhysRegsUsed(const BitVector &Regs) { UsedPhysRegs |=3D Regs; }
=20
+ /// addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as us=
ed.
+ /// This corresponds to the bit mask attached to register mask operands.
+ void addPhysRegsUsedFromRegMask(const uint32_t *RegMask) {
+ UsedPhysRegMask.setBitsNotInMask(RegMask);
+ }
+
/// setPhysRegUnused - Mark the specified register unused in this functi=
on.
/// This should only be called during and after register allocation.
- void setPhysRegUnused(unsigned Reg) { UsedPhysRegs[Reg] =3D false; }
+ void setPhysRegUnused(unsigned Reg) {
+ UsedPhysRegs.reset(Reg);
+ UsedPhysRegMask.reset(Reg);
+ }
=20
- /// closePhysRegsUsed - Expand UsedPhysRegs to its transitive closure ov=
er
- /// subregisters. That means that if R is used, so are all subregisters.
- void closePhysRegsUsed(const TargetRegisterInfo&);
+
+ //=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
+ // Reserved Register Info
+ //=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
+ //
+ // The set of reserved registers must be invariant during register
+ // allocation. For example, the target cannot suddenly decide it needs a
+ // frame pointer when the register allocator has already used the frame
+ // pointer register for something else.
+ //
+ // These methods can be used by target hooks like hasFP() to avoid chang=
ing
+ // the reserved register set during register allocation.
+
+ /// freezeReservedRegs - Called by the register allocator to freeze the =
set
+ /// of reserved registers before allocation begins.
+ void freezeReservedRegs(const MachineFunction&);
+
+ /// reservedRegsFrozen - Returns true after freezeReservedRegs() was cal=
led
+ /// to ensure the set of reserved registers stays constant.
+ bool reservedRegsFrozen() const {
+ return !ReservedRegs.empty();
+ }
+
+ /// canReserveReg - Returns true if PhysReg can be used as a reserved
+ /// register. Any register can be reserved before freezeReservedRegs() =
is
+ /// called.
+ bool canReserveReg(unsigned PhysReg) const {
+ return !reservedRegsFrozen() || ReservedRegs.test(PhysReg);
+ }
+
=20
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
// LiveIn/LiveOut Management
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
- =20
+
/// addLiveIn/Out - Add the specified register as a live in/out. Note t=
hat it
/// is an error to add the same register to the same set more than once.
void addLiveIn(unsigned Reg, unsigned vreg =3D 0) {
LiveIns.push_back(std::make_pair(Reg, vreg));
}
void addLiveOut(unsigned Reg) { LiveOuts.push_back(Reg); }
- =20
+
// Iteration support for live in/out sets. These sets are kept in sorted
// order by their register number.
typedef std::vector<std::pair<unsigned,unsigned> >::const_iterator
@@ -334,7 +436,7 @@
=20
private:
void HandleVRegListReallocation();
- =20
+
public:
/// defusechain_iterator - This class provides iterator support for mach=
ine
/// operands in the function that use or define a specific register. If
@@ -362,31 +464,31 @@
MachineInstr, ptrdiff_t>::reference reference;
typedef std::iterator<std::forward_iterator_tag,
MachineInstr, ptrdiff_t>::pointer pointer;
- =20
+
defusechain_iterator(const defusechain_iterator &I) : Op(I.Op) {}
defusechain_iterator() : Op(0) {}
- =20
+
bool operator=3D=3D(const defusechain_iterator &x) const {
return Op =3D=3D x.Op;
}
bool operator!=3D(const defusechain_iterator &x) const {
return !operator=3D=3D(x);
}
- =20
+
/// atEnd - return true if this iterator is equal to reg_end() on the =
value.
bool atEnd() const { return Op =3D=3D 0; }
- =20
+
// Iterator traversal: forward iteration only
defusechain_iterator &operator++() { // Preincrement
assert(Op && "Cannot increment end iterator!");
Op =3D Op->getNextOperandForReg();
- =20
+
// If this is an operand we don't care about, skip it.
- while (Op && ((!ReturnUses && Op->isUse()) ||=20
+ while (Op && ((!ReturnUses && Op->isUse()) ||
(!ReturnDefs && Op->isDef()) ||
(SkipDebug && Op->isDebug())))
Op =3D Op->getNextOperandForReg();
- =20
+
return *this;
}
defusechain_iterator operator++(int) { // Postincrement
@@ -404,30 +506,38 @@
return MI;
}
=20
+ MachineInstr *skipBundle() {
+ if (!Op) return 0;
+ MachineInstr *MI =3D getBundleStart(Op->getParent());
+ do ++*this;
+ while (Op && getBundleStart(Op->getParent()) =3D=3D MI);
+ return MI;
+ }
+
MachineOperand &getOperand() const {
assert(Op && "Cannot dereference end iterator!");
return *Op;
}
- =20
+
/// getOperandNo - Return the operand # of this MachineOperand in its
/// MachineInstr.
unsigned getOperandNo() const {
assert(Op && "Cannot dereference end iterator!");
return Op - &Op->getParent()->getOperand(0);
}
- =20
+
// Retrieve a reference to the current operand.
MachineInstr &operator*() const {
assert(Op && "Cannot dereference end iterator!");
return *Op->getParent();
}
- =20
+
MachineInstr *operator->() const {
assert(Op && "Cannot dereference end iterator!");
return Op->getParent();
}
};
- =20
+
};
=20
} // End llvm namespace
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/PBQP/Graph.h
--- a/head/contrib/llvm/include/llvm/CodeGen/PBQP/Graph.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/PBQP/Graph.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -350,6 +350,43 @@
numNodes =3D numEdges =3D 0;
}
=20
+ /// \brief Dump a graph to an output stream.
+ template <typename OStream>
+ void dump(OStream &os) {
+ os << getNumNodes() << " " << getNumEdges() << "\n";
+
+ for (NodeItr nodeItr =3D nodesBegin(), nodeEnd =3D nodesEnd();
+ nodeItr !=3D nodeEnd; ++nodeItr) {
+ const Vector& v =3D getNodeCosts(nodeItr);
+ os << "\n" << v.getLength() << "\n";
+ assert(v.getLength() !=3D 0 && "Empty vector in graph.");
+ os << v[0];
+ for (unsigned i =3D 1; i < v.getLength(); ++i) {
+ os << " " << v[i];
+ }
+ os << "\n";
+ }
+
+ for (EdgeItr edgeItr =3D edgesBegin(), edgeEnd =3D edgesEnd();
+ edgeItr !=3D edgeEnd; ++edgeItr) {
+ unsigned n1 =3D std::distance(nodesBegin(), getEdgeNode1(edgeItr));
+ unsigned n2 =3D std::distance(nodesBegin(), getEdgeNode2(edgeItr));
+ assert(n1 !=3D n2 && "PBQP graphs shound not have self-edges.");
+ const Matrix& m =3D getEdgeCosts(edgeItr);
+ os << "\n" << n1 << " " << n2 << "\n"
+ << m.getRows() << " " << m.getCols() << "\n";
+ assert(m.getRows() !=3D 0 && "No rows in matrix.");
+ assert(m.getCols() !=3D 0 && "No cols in matrix.");
+ for (unsigned i =3D 0; i < m.getRows(); ++i) {
+ os << m[i][0];
+ for (unsigned j =3D 1; j < m.getCols(); ++j) {
+ os << " " << m[i][j];
+ }
+ os << "\n";
+ }
+ }
+ }
+
/// \brief Print a representation of this graph in DOT format.
/// @param os Output stream to print on.
template <typename OStream>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/PBQP/HeuristicBase.h
--- a/head/contrib/llvm/include/llvm/CodeGen/PBQP/HeuristicBase.h Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/PBQP/HeuristicBase.h Tue Apr 1=
7 11:51:51 2012 +0300
@@ -157,7 +157,7 @@
case 0: s.applyR0(nItr); break;
case 1: s.applyR1(nItr); break;
case 2: s.applyR2(nItr); break;
- default: assert(false &&
+ default: llvm_unreachable(
"Optimal reductions of degree > 2 nodes is invalid=
.");
}
=20
@@ -186,7 +186,7 @@
/// \brief Add a node to the heuristic reduce list.
/// @param nItr Node iterator to add to the heuristic reduce list.
void addToHeuristicList(Graph::NodeItr nItr) {
- assert(false && "Must be implemented in derived class.");
+ llvm_unreachable("Must be implemented in derived class.");
}
=20
/// \brief Heuristically reduce one of the nodes in the heuristic
@@ -194,25 +194,25 @@
/// @return True if a reduction takes place, false if the heuristic re=
duce
/// list is empty.
void heuristicReduce() {
- assert(false && "Must be implemented in derived class.");
+ llvm_unreachable("Must be implemented in derived class.");
}
=20
/// \brief Prepare a change in the costs on the given edge.
/// @param eItr Edge iterator. =20
void preUpdateEdgeCosts(Graph::EdgeItr eItr) {
- assert(false && "Must be implemented in derived class.");
+ llvm_unreachable("Must be implemented in derived class.");
}
=20
/// \brief Handle the change in the costs on the given edge.
/// @param eItr Edge iterator.
void postUpdateEdgeCostts(Graph::EdgeItr eItr) {
- assert(false && "Must be implemented in derived class.");
+ llvm_unreachable("Must be implemented in derived class.");
}
=20
/// \brief Handle the addition of a new edge into the PBQP graph.
/// @param eItr Edge iterator for the added edge.
void handleAddEdge(Graph::EdgeItr eItr) {
- assert(false && "Must be implemented in derived class.");
+ llvm_unreachable("Must be implemented in derived class.");
}
=20
/// \brief Handle disconnection of an edge from a node.
@@ -223,7 +223,7 @@
/// method allows for the effect to be computed only for the remaining
/// node in the graph.
void handleRemoveEdge(Graph::EdgeItr eItr, Graph::NodeItr nItr) {
- assert(false && "Must be implemented in derived class.");
+ llvm_unreachable("Must be implemented in derived class.");
}
=20
/// \brief Clean up any structures used by HeuristicBase.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/PBQP/Heuristics/Briggs.h
--- a/head/contrib/llvm/include/llvm/CodeGen/PBQP/Heuristics/Briggs.h Tue A=
pr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/PBQP/Heuristics/Briggs.h Tue A=
pr 17 11:51:51 2012 +0300
@@ -418,6 +418,12 @@
unsigned numRegs =3D getGraph().getNodeCosts(nItr).getLength() - 1;
=20
nd.numDenied =3D 0;
+ const Vector& nCosts =3D getGraph().getNodeCosts(nItr);
+ for (unsigned i =3D 1; i < nCosts.getLength(); ++i) {
+ if (nCosts[i] =3D=3D std::numeric_limits<PBQPNum>::infinity())
+ ++nd.numDenied;
+ }
+
nd.numSafe =3D numRegs;
nd.unsafeDegrees.resize(numRegs, 0);
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/Passes.h
--- a/head/contrib/llvm/include/llvm/CodeGen/Passes.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/Passes.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -15,6 +15,7 @@
#ifndef LLVM_CODEGEN_PASSES_H
#define LLVM_CODEGEN_PASSES_H
=20
+#include "llvm/Pass.h"
#include "llvm/Target/TargetMachine.h"
#include <string>
=20
@@ -26,7 +27,211 @@
class TargetLowering;
class TargetRegisterClass;
class raw_ostream;
+}
=20
+namespace llvm {
+
+extern char &NoPassID; // Allow targets to choose not to run a pass.
+
+class PassConfigImpl;
+
+/// Target-Independent Code Generator Pass Configuration Options.
+///
+/// This is an ImmutablePass solely for the purpose of exposing CodeGen op=
tions
+/// to the internals of other CodeGen passes.
+class TargetPassConfig : public ImmutablePass {
+public:
+ /// Pseudo Pass IDs. These are defined within TargetPassConfig because t=
hey
+ /// are unregistered pass IDs. They are only useful for use with
+ /// TargetPassConfig APIs to identify multiple occurrences of the same p=
ass.
+ ///
+
+ /// EarlyTailDuplicate - A clone of the TailDuplicate pass that runs ear=
ly
+ /// during codegen, on SSA form.
+ static char EarlyTailDuplicateID;
+
+ /// PostRAMachineLICM - A clone of the LICM pass that runs during late m=
achine
+ /// optimization after regalloc.
+ static char PostRAMachineLICMID;
+
+protected:
+ TargetMachine *TM;
+ PassManagerBase &PM;
+ PassConfigImpl *Impl; // Internal data structures
+ bool Initialized; // Flagged after all passes are configured.
+
+ // Target Pass Options
+ // Targets provide a default setting, user flags override.
+ //
+ bool DisableVerify;
+
+ /// Default setting for -enable-tail-merge on this target.
+ bool EnableTailMerge;
+
+public:
+ TargetPassConfig(TargetMachine *tm, PassManagerBase &pm);
+ // Dummy constructor.
+ TargetPassConfig();
+
+ virtual ~TargetPassConfig();
+
+ static char ID;
+
+ /// Get the right type of TargetMachine for this target.
+ template<typename TMC> TMC &getTM() const {
+ return *static_cast<TMC*>(TM);
+ }
+
+ const TargetLowering *getTargetLowering() const {
+ return TM->getTargetLowering();
+ }
+
+ //
+ void setInitialized() { Initialized =3D true; }
+
+ CodeGenOpt::Level getOptLevel() const { return TM->getOptLevel(); }
+
+ void setDisableVerify(bool Disable) { setOpt(DisableVerify, Disable); }
+
+ bool getEnableTailMerge() const { return EnableTailMerge; }
+ void setEnableTailMerge(bool Enable) { setOpt(EnableTailMerge, Enable); }
+
+ /// Allow the target to override a specific pass without overriding the =
pass
+ /// pipeline. When passes are added to the standard pipeline at the
+ /// point where StadardID is expected, add TargetID in its place.
+ void substitutePass(char &StandardID, char &TargetID);
+
+ /// Allow the target to enable a specific standard pass by default.
+ void enablePass(char &ID) { substitutePass(ID, ID); }
+
+ /// Allow the target to disable a specific standard pass by default.
+ void disablePass(char &ID) { substitutePass(ID, NoPassID); }
+
+ /// Return the pass ssubtituted for StandardID by the target.
+ /// If no substitution exists, return StandardID.
+ AnalysisID getPassSubstitution(AnalysisID StandardID) const;
+
+ /// Return true if the optimized regalloc pipeline is enabled.
+ bool getOptimizeRegAlloc() const;
+
+ /// Add common target configurable passes that perform LLVM IR to IR
+ /// transforms following machine independent optimization.
+ virtual void addIRPasses();
+
+ /// Add common passes that perform LLVM IR to IR transforms in preparati=
on for
+ /// instruction selection.
+ virtual void addISelPrepare();
+
+ /// addInstSelector - This method should install an instruction selector=
pass,
+ /// which converts from LLVM code to machine instructions.
+ virtual bool addInstSelector() {
+ return true;
+ }
+
+ /// Add the complete, standard set of LLVM CodeGen passes.
+ /// Fully developed targets will not generally override this.
+ virtual void addMachinePasses();
+
+protected:
+ // Helper to verify the analysis is really immutable.
+ void setOpt(bool &Opt, bool Val);
+
+ /// Methods with trivial inline returns are convenient points in the com=
mon
+ /// codegen pass pipeline where targets may insert passes. Methods with
+ /// out-of-line standard implementations are major CodeGen stages called=
by
+ /// addMachinePasses. Some targets may override major stages when insert=
ing
+ /// passes is insufficient, but maintaining overriden stages is more wor=
k.
+ ///
+
+ /// addPreISelPasses - This method should add any "last minute" LLVM->LL=
VM
+ /// passes (which are run just before instruction selector).
+ virtual bool addPreISel() {
+ return true;
+ }
+
+ /// addMachineSSAOptimization - Add standard passes that optimize machine
+ /// instructions in SSA form.
+ virtual void addMachineSSAOptimization();
+
+ /// addPreRegAlloc - This method may be implemented by targets that want=
to
+ /// run passes immediately before register allocation. This should return
+ /// true if -print-machineinstrs should print after these passes.
+ virtual bool addPreRegAlloc() {
+ return false;
+ }
+
+ /// createTargetRegisterAllocator - Create the register allocator pass f=
or
+ /// this target at the current optimization level.
+ virtual FunctionPass *createTargetRegisterAllocator(bool Optimized);
+
+ /// addFastRegAlloc - Add the minimum set of target-independent passes t=
hat
+ /// are required for fast register allocation.
+ virtual void addFastRegAlloc(FunctionPass *RegAllocPass);
+
+ /// addOptimizedRegAlloc - Add passes related to register allocation.
+ /// LLVMTargetMachine provides standard regalloc passes for most targets.
+ virtual void addOptimizedRegAlloc(FunctionPass *RegAllocPass);
+
+ /// addFinalizeRegAlloc - This method may be implemented by targets that=
want
+ /// to run passes within the regalloc pipeline, immediately after the re=
gister
+ /// allocation pass itself. These passes run as soon as virtual regisite=
rs
+ /// have been rewritten to physical registers but before and other postRA
+ /// optimization happens. Targets that have marked instructions for bund=
ling
+ /// must have finalized those bundles by the time these passes have run,
+ /// because subsequent passes are not guaranteed to be bundle-aware.
+ virtual bool addFinalizeRegAlloc() {
+ return false;
+ }
+
+ /// addPostRegAlloc - This method may be implemented by targets that wan=
t to
+ /// run passes after register allocation pass pipeline but before
+ /// prolog-epilog insertion. This should return true if -print-machinei=
nstrs
+ /// should print after these passes.
+ virtual bool addPostRegAlloc() {
+ return false;
+ }
+
+ /// Add passes that optimize machine instructions after register allocat=
ion.
+ virtual void addMachineLateOptimization();
+
+ /// addPreSched2 - This method may be implemented by targets that want to
+ /// run passes after prolog-epilog insertion and before the second instr=
uction
+ /// scheduling pass. This should return true if -print-machineinstrs sh=
ould
+ /// print after these passes.
+ virtual bool addPreSched2() {
+ return false;
+ }
+
+ /// Add standard basic block placement passes.
+ virtual void addBlockPlacement();
+
+ /// addPreEmitPass - This pass may be implemented by targets that want t=
o run
+ /// passes immediately before machine code is emitted. This should retu=
rn
+ /// true if -print-machineinstrs should print out the code after the pas=
ses.
+ virtual bool addPreEmitPass() {
+ return false;
+ }
+
+ /// Utilities for targets to add passes to the pass manager.
+ ///
+
+ /// Add a CodeGen pass at this point in the pipeline after checking over=
rides.
+ /// Return the pass that was added, or NoPassID.
+ AnalysisID addPass(char &ID);
+
+ /// addMachinePasses helper to create the target-selected or overriden
+ /// regalloc pass.
+ FunctionPass *createRegAllocPass(bool Optimized);
+
+ /// printAndVerify - Add a pass to dump then verify the machine function=
, if
+ /// those steps are enabled.
+ ///
+ void printAndVerify(const char *Banner) const;
+};
+} // namespace llvm
+
+/// List of target independent CodeGen pass IDs.
+namespace llvm {
/// createUnreachableBlockEliminationPass - The LLVM code generator does=
not
/// work well with unreachable basic blocks (what live ranges make sense=
for a
/// block that cannot be reached?). As such, a code generator should ei=
ther
@@ -41,31 +246,29 @@
createMachineFunctionPrinterPass(raw_ostream &OS,
const std::string &Banner =3D"");
=20
- /// MachineLoopInfo pass - This pass is a loop analysis pass.
- ///
+ /// MachineLoopInfo - This pass is a loop analysis pass.
extern char &MachineLoopInfoID;
=20
- /// MachineLoopRanges pass - This pass is an on-demand loop coverage
- /// analysis pass.
- ///
+ /// MachineLoopRanges - This pass is an on-demand loop coverage analysis.
extern char &MachineLoopRangesID;
=20
- /// MachineDominators pass - This pass is a machine dominators analysis =
pass.
- ///
+ /// MachineDominators - This pass is a machine dominators analysis pass.
extern char &MachineDominatorsID;
=20
/// EdgeBundles analysis - Bundle machine CFG edges.
- ///
extern char &EdgeBundlesID;
=20
- /// PHIElimination pass - This pass eliminates machine instruction PHI n=
odes
+ /// LiveVariables pass - This pass computes the set of blocks in which e=
ach
+ /// variable is life and sets machine operand kill flags.
+ extern char &LiveVariablesID;
+
+ /// PHIElimination - This pass eliminates machine instruction PHI nodes
/// by inserting copy instructions. This destroys SSA information, but =
is the
/// desired input for some register allocators. This pass is "required"=
by
/// these register allocator like this: AU.addRequiredID(PHIEliminationI=
D);
- ///
extern char &PHIEliminationID;
=20
- /// StrongPHIElimination pass - This pass eliminates machine instruction=
PHI
+ /// StrongPHIElimination - This pass eliminates machine instruction PHI
/// nodes by inserting copy instructions. This destroys SSA information=
, but
/// is the desired input for some register allocators. This pass is
/// "required" by these register allocator like this:
@@ -76,32 +279,30 @@
/// LiveStacks pass. An analysis keeping track of the liveness of stack =
slots.
extern char &LiveStacksID;
=20
- /// TwoAddressInstruction pass - This pass reduces two-address instructi=
ons to
+ /// TwoAddressInstruction - This pass reduces two-address instructions to
/// use two operands. This destroys SSA information but it is desired by
/// register allocators.
extern char &TwoAddressInstructionPassID;
=20
- /// RegisteCoalescer pass - This pass merges live ranges to eliminate co=
pies.
- extern char &RegisterCoalescerPassID;
+ /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
+ extern char &ProcessImplicitDefsID;
+
+ /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
+ extern char &RegisterCoalescerID;
+
+ /// MachineScheduler - This pass schedules machine instructions.
+ extern char &MachineSchedulerID;
=20
/// SpillPlacement analysis. Suggest optimal placement of spill code bet=
ween
/// basic blocks.
- ///
extern char &SpillPlacementID;
=20
- /// UnreachableMachineBlockElimination pass - This pass removes unreacha=
ble
+ /// UnreachableMachineBlockElimination - This pass removes unreachable
/// machine basic blocks.
extern char &UnreachableMachineBlockElimID;
=20
- /// DeadMachineInstructionElim pass - This pass removes dead machine
- /// instructions.
- ///
- FunctionPass *createDeadMachineInstructionElimPass();
-
- /// Creates a register allocator as the user specified on the command li=
ne, or
- /// picks one that matches OptLevel.
- ///
- FunctionPass *createRegisterAllocator(CodeGenOpt::Level OptLevel);
+ /// DeadMachineInstructionElim - This pass removes dead machine instruct=
ions.
+ extern char &DeadMachineInstructionElimID;
=20
/// FastRegisterAllocation Pass - This pass register allocates as fast as
/// possible. It is best suited for debug code where live ranges are sho=
rt.
@@ -118,56 +319,59 @@
///
FunctionPass *createGreedyRegisterAllocator();
=20
- /// LinearScanRegisterAllocation Pass - This pass implements the linear =
scan
- /// register allocation algorithm, a global register allocator.
- ///
- FunctionPass *createLinearScanRegisterAllocator();
-
/// PBQPRegisterAllocation Pass - This pass implements the Partitioned B=
oolean
/// Quadratic Prograaming (PBQP) based register allocator.
///
FunctionPass *createDefaultPBQPRegisterAllocator();
=20
- /// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog =
code,
+ /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
/// and eliminates abstract frame references.
- ///
- FunctionPass *createPrologEpilogCodeInserter();
+ extern char &PrologEpilogCodeInserterID;
=20
- /// ExpandPostRAPseudos Pass - This pass expands pseudo instructions aft=
er
+ /// ExpandPostRAPseudos - This pass expands pseudo instructions after
/// register allocation.
- ///
- FunctionPass *createExpandPostRAPseudosPass();
+ extern char &ExpandPostRAPseudosID;
=20
/// createPostRAScheduler - This pass performs post register allocation
/// scheduling.
- FunctionPass *createPostRAScheduler(CodeGenOpt::Level OptLevel);
+ extern char &PostRASchedulerID;
=20
- /// BranchFolding Pass - This pass performs machine code CFG based
+ /// BranchFolding - This pass performs machine code CFG based
/// optimizations to delete branches to branches, eliminate branches to
/// successor blocks (creating fall throughs), and eliminating branches =
over
/// branches.
- FunctionPass *createBranchFoldingPass(bool DefaultEnableTailMerge);
+ extern char &BranchFolderPassID;
=20
- /// TailDuplicate Pass - Duplicate blocks with unconditional branches
+ /// TailDuplicate - Duplicate blocks with unconditional branches
/// into tails of their predecessors.
- FunctionPass *createTailDuplicatePass(bool PreRegAlloc =3D false);
+ extern char &TailDuplicateID;
=20
- /// IfConverter Pass - This pass performs machine code if conversion.
- FunctionPass *createIfConverterPass();
+ /// IfConverter - This pass performs machine code if conversion.
+ extern char &IfConverterID;
=20
- /// Code Placement Pass - This pass optimize code placement and aligns l=
oop
+ /// MachineBlockPlacement - This pass places basic blocks based on branch
+ /// probabilities.
+ extern char &MachineBlockPlacementID;
+
+ /// MachineBlockPlacementStats - This pass collects statistics about the
+ /// basic block placement using branch probabilities and block frequency
+ /// information.
+ extern char &MachineBlockPlacementStatsID;
+
+ /// Code Placement - This pass optimize code placement and aligns loop
/// headers to target specific alignment boundary.
- FunctionPass *createCodePlacementOptPass();
+ extern char &CodePlacementOptID;
=20
- /// IntrinsicLowering Pass - Performs target-independent LLVM IR
- /// transformations for highly portable strategies.
+ /// GCLowering Pass - Performs target-independent LLVM IR transformation=
s for
+ /// highly portable strategies.
+ ///
FunctionPass *createGCLoweringPass();
=20
- /// MachineCodeAnalysis Pass - Target-independent pass to mark safe poin=
ts in
- /// machine code. Must be added very late during code generation, just p=
rior
- /// to output, and importantly after all CFG transformations (such as br=
anch
- /// folding).
- FunctionPass *createGCMachineCodeAnalysisPass();
+ /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
+ /// in machine code. Must be added very late during code generation, just
+ /// prior to output, and importantly after all CFG transformations (such=
as
+ /// branch folding).
+ extern char &GCMachineCodeAnalysisID;
=20
/// Deleter Pass - Releases GC metadata.
///
@@ -177,54 +381,56 @@
///
FunctionPass *createGCInfoPrinter(raw_ostream &OS);
=20
- /// createMachineCSEPass - This pass performs global CSE on machine
- /// instructions.
- FunctionPass *createMachineCSEPass();
+ /// MachineCSE - This pass performs global CSE on machine instructions.
+ extern char &MachineCSEID;
=20
- /// createMachineLICMPass - This pass performs LICM on machine instructi=
ons.
- ///
- FunctionPass *createMachineLICMPass(bool PreRegAlloc =3D true);
+ /// MachineLICM - This pass performs LICM on machine instructions.
+ extern char &MachineLICMID;
=20
- /// createMachineSinkingPass - This pass performs sinking on machine
- /// instructions.
- FunctionPass *createMachineSinkingPass();
+ /// MachineSinking - This pass performs sinking on machine instructions.
+ extern char &MachineSinkingID;
=20
- /// createPeepholeOptimizerPass - This pass performs peephole optimizati=
ons -
+ /// MachineCopyPropagation - This pass performs copy propagation on
+ /// machine instructions.
+ extern char &MachineCopyPropagationID;
+
+ /// PeepholeOptimizer - This pass performs peephole optimizations -
/// like extension and comparison eliminations.
- FunctionPass *createPeepholeOptimizerPass();
+ extern char &PeepholeOptimizerID;
=20
- /// createOptimizePHIsPass - This pass optimizes machine instruction PHIs
+ /// OptimizePHIs - This pass optimizes machine instruction PHIs
/// to take advantage of opportunities created during DAG legalization.
- FunctionPass *createOptimizePHIsPass();
+ extern char &OptimizePHIsID;
=20
- /// createStackSlotColoringPass - This pass performs stack slot coloring.
- FunctionPass *createStackSlotColoringPass(bool);
+ /// StackSlotColoring - This pass performs stack slot coloring.
+ extern char &StackSlotColoringID;
=20
/// createStackProtectorPass - This pass adds stack protectors to functi=
ons.
+ ///
FunctionPass *createStackProtectorPass(const TargetLowering *tli);
=20
/// createMachineVerifierPass - This pass verifies cenerated machine code
/// instructions for correctness.
+ ///
FunctionPass *createMachineVerifierPass(const char *Banner =3D 0);
=20
/// createDwarfEHPass - This pass mulches exception handling code into a=
form
/// adapted to code generation. Required if using dwarf exception handl=
ing.
FunctionPass *createDwarfEHPass(const TargetMachine *tm);
=20
- /// createSjLjEHPass - This pass adapts exception handling code to use
+ /// createSjLjEHPreparePass - This pass adapts exception handling code t=
o use
/// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control f=
low.
- FunctionPass *createSjLjEHPass(const TargetLowering *tli);
+ ///
+ FunctionPass *createSjLjEHPreparePass(const TargetLowering *tli);
=20
- /// createLocalStackSlotAllocationPass - This pass assigns local frame
- /// indices to stack slots relative to one another and allocates
- /// base registers to access them when it is estimated by the target to
- /// be out of range of normal frame pointer or stack pointer index
- /// addressing.
- FunctionPass *createLocalStackSlotAllocationPass();
+ /// LocalStackSlotAllocation - This pass assigns local frame indices to =
stack
+ /// slots relative to one another and allocates base registers to access=
them
+ /// when it is estimated by the target to be out of range of normal frame
+ /// pointer or stack pointer index addressing.
+ extern char &LocalStackSlotAllocationID;
=20
- /// createExpandISelPseudosPass - This pass expands pseudo-instructions.
- ///
- FunctionPass *createExpandISelPseudosPass();
+ /// ExpandISelPseudos - This pass expands pseudo-instructions.
+ extern char &ExpandISelPseudosID;
=20
/// createExecutionDependencyFixPass - This pass fixes execution time
/// problems with dependent instructions, such as switching execution
@@ -234,6 +440,13 @@
///
FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass=
*RC);
=20
+ /// UnpackMachineBundles - This pass unpack machine instruction bundles.
+ extern char &UnpackMachineBundlesID;
+
+ /// FinalizeMachineBundles - This pass finalize machine instruction
+ /// bundles (created earlier, e.g. during pre-RA scheduling).
+ extern char &FinalizeMachineBundlesID;
+
} // End llvm namespace
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/RegisterScavenging.h
--- a/head/contrib/llvm/include/llvm/CodeGen/RegisterScavenging.h Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/RegisterScavenging.h Tue Apr 1=
7 11:51:51 2012 +0300
@@ -68,6 +68,10 @@
/// available, unset means the register is currently being used.
BitVector RegsAvailable;
=20
+ // These BitVectors are only used internally to forward(). They are memb=
ers
+ // to avoid frequent reallocations.
+ BitVector KillRegs, DefRegs;
+
public:
RegScavenger()
: MBB(NULL), NumPhysRegs(0), Tracking(false),
@@ -130,8 +134,9 @@
=20
/// isUsed / isUnused - Test if a register is currently being used.
///
- bool isUsed(unsigned Reg) const { return !RegsAvailable.test(Reg); }
- bool isUnused(unsigned Reg) const { return RegsAvailable.test(Reg); }
+ bool isUsed(unsigned Reg) const {
+ return !RegsAvailable.test(Reg) || ReservedRegs.test(Reg);
+ }
=20
/// isAliasUsed - Is Reg or an alias currently in use?
bool isAliasUsed(unsigned Reg) const;
@@ -139,7 +144,7 @@
/// setUsed / setUnused - Mark the state of one or a number of registers.
///
void setUsed(BitVector &Regs) {
- RegsAvailable &=3D ~Regs;
+ RegsAvailable.reset(Regs);
}
void setUnused(BitVector &Regs) {
RegsAvailable |=3D Regs;
@@ -148,9 +153,6 @@
/// Add Reg and all its sub-registers to BV.
void addRegWithSubRegs(BitVector &BV, unsigned Reg);
=20
- /// Add Reg and its aliases to BV.
- void addRegWithAliases(BitVector &BV, unsigned Reg);
-
/// findSurvivorReg - Return the candidate register that is unused for t=
he
/// longest after StartMI. UseMI is set to the instruction where the sea=
rch
/// stopped.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/ScheduleDAG.h
--- a/head/contrib/llvm/include/llvm/CodeGen/ScheduleDAG.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/ScheduleDAG.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -8,7 +8,8 @@
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
//
// This file implements the ScheduleDAG class, which is used as the common
-// base class for instruction schedulers.
+// base class for instruction schedulers. This encapsulates the scheduling=
DAG,
+// which is shared between SelectionDAG and MachineInstr scheduling.
//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
@@ -16,7 +17,7 @@
#define LLVM_CODEGEN_SCHEDULEDAG_H
=20
#include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetLowering.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/GraphTraits.h"
@@ -129,8 +130,7 @@
Contents.Order.isMustAlias =3D=3D Other.Contents.Order.isMu=
stAlias &&
Contents.Order.isArtificial =3D=3D Other.Contents.Order.isA=
rtificial;
}
- assert(0 && "Invalid dependency kind!");
- return false;
+ llvm_unreachable("Invalid dependency kind!");
}
=20
bool operator!=3D(const SDep &Other) const {
@@ -232,6 +232,7 @@
public:
SUnit *OrigNode; // If not this, the node from which
// this node was cloned.
+ // (SD scheduling only)
=20
// Preds/Succs - The SUnits before/after us in the graph.
SmallVector<SDep, 4> Preds; // All sunit predecessors.
@@ -409,6 +410,13 @@
return false;
}
=20
+ bool isTopReady() const {
+ return NumPredsLeft =3D=3D 0;
+ }
+ bool isBottomReady() const {
+ return NumSuccsLeft =3D=3D 0;
+ }
+
void dump(const ScheduleDAG *G) const;
void dumpAll(const ScheduleDAG *G) const;
void print(raw_ostream &O, const ScheduleDAG *G) const;
@@ -427,6 +435,7 @@
/// implementation to decide.
///
class SchedulingPriorityQueue {
+ virtual void anchor();
unsigned CurCycle;
bool HasReadyFilter;
public:
@@ -465,13 +474,13 @@
=20
virtual void dump(ScheduleDAG *) const {}
=20
- /// ScheduledNode - As each node is scheduled, this method is invoked.=
This
+ /// scheduledNode - As each node is scheduled, this method is invoked.=
This
/// allows the priority function to adjust the priority of related
/// unscheduled nodes, for example.
///
- virtual void ScheduledNode(SUnit *) {}
+ virtual void scheduledNode(SUnit *) {}
=20
- virtual void UnscheduledNode(SUnit *) {}
+ virtual void unscheduledNode(SUnit *) {}
=20
void setCurCycle(unsigned Cycle) {
CurCycle =3D Cycle;
@@ -484,15 +493,11 @@
=20
class ScheduleDAG {
public:
- MachineBasicBlock *BB; // The block in which to insert instru=
ctions
- MachineBasicBlock::iterator InsertPos;// The position to insert instru=
ctions
const TargetMachine &TM; // Target processor
const TargetInstrInfo *TII; // Target instruction information
const TargetRegisterInfo *TRI; // Target processor register info
MachineFunction &MF; // Machine function
MachineRegisterInfo &MRI; // Virtual/real register map
- std::vector<SUnit*> Sequence; // The schedule. Null SUnit*'s
- // represent noop instructions.
std::vector<SUnit> SUnits; // The scheduling units.
SUnit EntrySU; // Special node for the region e=
ntry.
SUnit ExitSU; // Special node for the region e=
xit.
@@ -507,6 +512,9 @@
=20
virtual ~ScheduleDAG();
=20
+ /// clearDAG - clear the DAG state (between regions).
+ void clearDAG();
+
/// getInstrDesc - Return the MCInstrDesc of this SUnit.
/// Return NULL for SDNodes without a machine opcode.
const MCInstrDesc *getInstrDesc(const SUnit *SU) const {
@@ -517,66 +525,43 @@
/// viewGraph - Pop up a GraphViz/gv window with the ScheduleDAG rende=
red
/// using 'dot'.
///
+ void viewGraph(const Twine &Name, const Twine &Title);
void viewGraph();
=20
- /// EmitSchedule - Insert MachineInstrs into the MachineBasicBlock
- /// according to the order specified in Sequence.
- ///
- virtual MachineBasicBlock *EmitSchedule() =3D 0;
-
- void dumpSchedule() const;
-
virtual void dumpNode(const SUnit *SU) const =3D 0;
=20
/// getGraphNodeLabel - Return a label for an SUnit node in a visualiz=
ation
/// of the ScheduleDAG.
virtual std::string getGraphNodeLabel(const SUnit *SU) const =3D 0;
=20
+ /// getDAGLabel - Return a label for the region of code covered by the=
DAG.
+ virtual std::string getDAGName() const =3D 0;
+
/// addCustomGraphFeatures - Add custom features for a visualization of
/// the ScheduleDAG.
virtual void addCustomGraphFeatures(GraphWriter<ScheduleDAG*> &) const=
{}
=20
#ifndef NDEBUG
- /// VerifySchedule - Verify that all SUnits were scheduled and that
- /// their state is consistent.
- void VerifySchedule(bool isBottomUp);
+ /// VerifyScheduledDAG - Verify that all SUnits were scheduled and that
+ /// their state is consistent. Return the number of scheduled SUnits.
+ unsigned VerifyScheduledDAG(bool isBottomUp);
#endif
=20
protected:
- /// Run - perform scheduling.
- ///
- void Run(MachineBasicBlock *bb, MachineBasicBlock::iterator insertPos);
-
- /// BuildSchedGraph - Build SUnits and set up their Preds and Succs
- /// to form the scheduling dependency graph.
- ///
- virtual void BuildSchedGraph(AliasAnalysis *AA) =3D 0;
-
/// ComputeLatency - Compute node latency.
///
- virtual void ComputeLatency(SUnit *SU) =3D 0;
+ virtual void computeLatency(SUnit *SU) =3D 0;
=20
/// ComputeOperandLatency - Override dependence edge latency using
/// operand use/def information
///
- virtual void ComputeOperandLatency(SUnit *, SUnit *,
+ virtual void computeOperandLatency(SUnit *, SUnit *,
SDep&) const { }
=20
- /// Schedule - Order nodes according to selected style, filling
- /// in the Sequence member.
- ///
- virtual void Schedule() =3D 0;
-
/// ForceUnitLatencies - Return true if all scheduling edges should be=
given
/// a latency value of one. The default is to return false; scheduler=
s may
/// override this as needed.
- virtual bool ForceUnitLatencies() const { return false; }
-
- /// EmitNoop - Emit a noop instruction.
- ///
- void EmitNoop();
-
- void EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, unsigned> &VRBaseMap);
+ virtual bool forceUnitLatencies() const { return false; }
=20
private:
// Return the MCInstrDesc of this SDNode or NULL.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/SchedulerRegistry.h
--- a/head/contrib/llvm/include/llvm/CodeGen/SchedulerRegistry.h Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/SchedulerRegistry.h Tue Apr 17=
11:51:51 2012 +0300
@@ -42,7 +42,7 @@
: MachinePassRegistryNode(N, D, (MachinePassCtor)C)
{ Registry.Add(this); }
~RegisterScheduler() { Registry.Remove(this); }
- =20
+
=20
// Accessors.
//
@@ -68,11 +68,6 @@
ScheduleDAGSDNodes *createBURRListDAGScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level OptLevel);
=20
-/// createTDRRListDAGScheduler - This creates a top down register usage
-/// reduction list scheduler.
-ScheduleDAGSDNodes *createTDRRListDAGScheduler(SelectionDAGISel *IS,
- CodeGenOpt::Level OptLevel);
-
/// createBURRListDAGScheduler - This creates a bottom up list scheduler t=
hat
/// schedules nodes in source code order when possible.
ScheduleDAGSDNodes *createSourceListDAGScheduler(SelectionDAGISel *IS,
@@ -91,16 +86,17 @@
/// to reduce register pressure.
ScheduleDAGSDNodes *createILPListDAGScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level);
-/// createTDListDAGScheduler - This creates a top-down list scheduler with
-/// a hazard recognizer.
-ScheduleDAGSDNodes *createTDListDAGScheduler(SelectionDAGISel *IS,
- CodeGenOpt::Level OptLevel);
=20
/// createFastDAGScheduler - This creates a "fast" scheduler.
///
ScheduleDAGSDNodes *createFastDAGScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level OptLevel);
=20
+/// createVLIWDAGScheduler - Scheduler for VLIW targets. This creates top =
down
+/// DFA driven list scheduler with clustering heuristic to control
+/// register pressure.
+ScheduleDAGSDNodes *createVLIWDAGScheduler(SelectionDAGISel *IS,
+ CodeGenOpt::Level OptLevel);
/// createDefaultScheduler - This creates an instruction scheduler appropr=
iate
/// for the target.
ScheduleDAGSDNodes *createDefaultScheduler(SelectionDAGISel *IS,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/SelectionDAG.h
--- a/head/contrib/llvm/include/llvm/CodeGen/SelectionDAG.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/SelectionDAG.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -51,7 +51,7 @@
static void noteHead(SDNode*, SDNode*) {}
=20
static void deleteNode(SDNode *) {
- assert(0 && "ilist_traits<SDNode> shouldn't see a deleteNode call!");
+ llvm_unreachable("ilist_traits<SDNode> shouldn't see a deleteNode call=
!");
}
private:
static void createNode(const SDNode &);
@@ -112,9 +112,10 @@
};
=20
enum CombineLevel {
- Unrestricted, // Combine may create illegal operations and illegal typ=
es.
- NoIllegalTypes, // Combine may create illegal operations but no illegal =
types.
- NoIllegalOperations // Combine may only create legal operations and type=
s.
+ BeforeLegalizeTypes,
+ AfterLegalizeTypes,
+ AfterLegalizeVectorOps,
+ AfterLegalizeDAG
};
=20
class SelectionDAG;
@@ -138,6 +139,7 @@
const TargetSelectionDAGInfo &TSI;
MachineFunction *MF;
LLVMContext *Context;
+ CodeGenOpt::Level OptLevel;
=20
/// EntryNode - The starting token.
SDNode EntryNode;
@@ -186,7 +188,7 @@
SelectionDAG(const SelectionDAG&); // Do not implement.
=20
public:
- explicit SelectionDAG(const TargetMachine &TM);
+ explicit SelectionDAG(const TargetMachine &TM, llvm::CodeGenOpt::Level);
~SelectionDAG();
=20
/// init - Prepare this SelectionDAG to process code in the given
@@ -392,6 +394,7 @@
unsigned char TargetFlags =3D 0);
SDValue getValueType(EVT);
SDValue getRegister(unsigned Reg, EVT VT);
+ SDValue getRegisterMask(const uint32_t *RegMask);
SDValue getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label);
SDValue getBlockAddress(const BlockAddress *BA, EVT VT,
bool isTarget =3D false, unsigned char TargetFla=
gs =3D 0);
@@ -650,8 +653,8 @@
///
SDValue getLoad(EVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr,
MachinePointerInfo PtrInfo, bool isVolatile,
- bool isNonTemporal, unsigned Alignment,
- const MDNode *TBAAInfo =3D 0);
+ bool isNonTemporal, bool isInvariant, unsigned Alignment,
+ const MDNode *TBAAInfo =3D 0, const MDNode *Ranges =3D 0=
);
SDValue getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInf=
o,
EVT MemVT, bool isVolatile,
@@ -663,8 +666,9 @@
EVT VT, DebugLoc dl,
SDValue Chain, SDValue Ptr, SDValue Offset,
MachinePointerInfo PtrInfo, EVT MemVT,
- bool isVolatile, bool isNonTemporal, unsigned Alignment,
- const MDNode *TBAAInfo =3D 0);
+ bool isVolatile, bool isNonTemporal, bool isInvariant,
+ unsigned Alignment, const MDNode *TBAAInfo =3D 0,
+ const MDNode *Ranges =3D 0);
SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
EVT VT, DebugLoc dl,
SDValue Chain, SDValue Ptr, SDValue Offset,
@@ -976,8 +980,8 @@
/// bitsets. This code only analyzes bits in Mask, in order to short-ci=
rcuit
/// processing. Targets can implement the computeMaskedBitsForTargetNode
/// method in the TargetLowering class to allow target nodes to be under=
stood.
- void ComputeMaskedBits(SDValue Op, const APInt &Mask, APInt &KnownZero,
- APInt &KnownOne, unsigned Depth =3D 0) const;
+ void ComputeMaskedBits(SDValue Op, APInt &KnownZero, APInt &KnownOne,
+ unsigned Depth =3D 0) const;
=20
/// ComputeNumSignBits - Return the number of times the sign bit of the
/// register is replicated into the other bits. We know that at least 1=
bit
@@ -1033,6 +1037,7 @@
void *&InsertPos);
SDNode *FindModifiedNodeSlot(SDNode *N, const SDValue *Ops, unsigned Num=
Ops,
void *&InsertPos);
+ SDNode *UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc loc);
=20
void DeleteNodeNotInCSEMaps(SDNode *N);
void DeallocateNode(SDNode *N);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/SelectionDAGISel.h
--- a/head/contrib/llvm/include/llvm/CodeGen/SelectionDAGISel.h Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/SelectionDAGISel.h Tue Apr 17 =
11:51:51 2012 +0300
@@ -29,6 +29,7 @@
class MachineFunction;
class MachineInstr;
class TargetLowering;
+ class TargetLibraryInfo;
class TargetInstrInfo;
class FunctionLoweringInfo;
class ScheduleHazardRecognizer;
@@ -42,6 +43,7 @@
public:
const TargetMachine &TM;
const TargetLowering &TLI;
+ const TargetLibraryInfo *LibInfo;
FunctionLoweringInfo *FuncInfo;
MachineFunction *MF;
MachineRegisterInfo *RegInfo;
@@ -92,7 +94,7 @@
=20
/// IsLegalToFold - Returns true if the specific operand node N of
/// U can be folded during instruction selection that starts at Root.
- /// FIXME: This is a static member function because the MSP430/SystemZ/X=
86
+ /// FIXME: This is a static member function because the MSP430/X86
/// targets, which uses it during isel. This could become a proper memb=
er.
static bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root,
CodeGenOpt::Level OptLevel,
@@ -179,6 +181,7 @@
/// ISelUpdater - helper class to handle updates of the
/// instruction selection graph.
class ISelUpdater : public SelectionDAG::DAGUpdateListener {
+ virtual void anchor();
SelectionDAG::allnodes_iterator &ISelPosition;
public:
explicit ISelUpdater(SelectionDAG::allnodes_iterator &isp)
@@ -237,8 +240,7 @@
/// succeeds or false if it fails. The number is a private implementati=
on
/// detail to the code tblgen produces.
virtual bool CheckPatternPredicate(unsigned PredNo) const {
- assert(0 && "Tblgen should generate the implementation of this!");
- return 0;
+ llvm_unreachable("Tblgen should generate the implementation of this!");
}
=20
/// CheckNodePredicate - This function is generated by tblgen in the tar=
get.
@@ -246,20 +248,17 @@
/// false if it fails. The number is a private implementation
/// detail to the code tblgen produces.
virtual bool CheckNodePredicate(SDNode *N, unsigned PredNo) const {
- assert(0 && "Tblgen should generate the implementation of this!");
- return 0;
+ llvm_unreachable("Tblgen should generate the implementation of this!");
}
=20
virtual bool CheckComplexPattern(SDNode *Root, SDNode *Parent, SDValue N,
unsigned PatternNo,
SmallVectorImpl<std::pair<SDValue, SDNode*> > &Res=
ult) {
- assert(0 && "Tblgen should generate the implementation of this!");
- return false;
+ llvm_unreachable("Tblgen should generate the implementation of this!");
}
=20
virtual SDValue RunSDNodeXForm(SDValue V, unsigned XFormNo) {
- assert(0 && "Tblgen should generate this!");
- return SDValue();
+ llvm_unreachable("Tblgen should generate this!");
}
=20
SDNode *SelectCodeCommon(SDNode *NodeToMatch,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/SelectionDAGNodes.h
--- a/head/contrib/llvm/include/llvm/CodeGen/SelectionDAGNodes.h Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/SelectionDAGNodes.h Tue Apr 17=
11:51:51 2012 +0300
@@ -917,12 +917,13 @@
// with MachineMemOperand information.
bool isVolatile() const { return (SubclassData >> 5) & 1; }
bool isNonTemporal() const { return (SubclassData >> 6) & 1; }
+ bool isInvariant() const { return (SubclassData >> 7) & 1; }
=20
AtomicOrdering getOrdering() const {
- return AtomicOrdering((SubclassData >> 7) & 15);
+ return AtomicOrdering((SubclassData >> 8) & 15);
}
SynchronizationScope getSynchScope() const {
- return SynchronizationScope((SubclassData >> 11) & 1);
+ return SynchronizationScope((SubclassData >> 12) & 1);
}
=20
/// Returns the SrcValue and offset that describes the location of the a=
ccess
@@ -932,6 +933,9 @@
/// Returns the TBAAInfo that describes the dereference.
const MDNode *getTBAAInfo() const { return MMO->getTBAAInfo(); }
=20
+ /// Returns the Ranges that describes the dereference.
+ const MDNode *getRanges() const { return MMO->getRanges(); }
+
/// getMemoryVT - Return the type of the in-memory value.
EVT getMemoryVT() const { return MemoryVT; }
=20
@@ -993,8 +997,8 @@
"Ordering may not require more than 4 bits!");
assert((SynchScope & 1) =3D=3D SynchScope &&
"SynchScope may not require more than 1 bit!");
- SubclassData |=3D Ordering << 7;
- SubclassData |=3D SynchScope << 11;
+ SubclassData |=3D Ordering << 8;
+ SubclassData |=3D SynchScope << 12;
assert(getOrdering() =3D=3D Ordering && "Ordering encoding error!");
assert(getSynchScope() =3D=3D SynchScope && "Synch-scope encoding erro=
r!");
=20
@@ -1113,11 +1117,9 @@
}
public:
=20
- void getMask(SmallVectorImpl<int> &M) const {
+ ArrayRef<int> getMask() const {
EVT VT =3D getValueType(0);
- M.clear();
- for (unsigned i =3D 0, e =3D VT.getVectorNumElements(); i !=3D e; ++i)
- M.push_back(Mask[i]);
+ return makeArrayRef(Mask, VT.getVectorNumElements());
}
int getMaskElt(unsigned Idx) const {
assert(Idx < getValueType(0).getVectorNumElements() && "Idx out of ran=
ge!");
@@ -1434,6 +1436,23 @@
}
};
=20
+class RegisterMaskSDNode : public SDNode {
+ // The memory for RegMask is not owned by the node.
+ const uint32_t *RegMask;
+ friend class SelectionDAG;
+ RegisterMaskSDNode(const uint32_t *mask)
+ : SDNode(ISD::RegisterMask, DebugLoc(), getSDVTList(MVT::Untyped)),
+ RegMask(mask) {}
+public:
+
+ const uint32_t *getRegMask() const { return RegMask; }
+
+ static bool classof(const RegisterMaskSDNode *) { return true; }
+ static bool classof(const SDNode *N) {
+ return N->getOpcode() =3D=3D ISD::RegisterMask;
+ }
+};
+
class BlockAddressSDNode : public SDNode {
const BlockAddress *BA;
unsigned char TargetFlags;
@@ -1684,6 +1703,8 @@
/// setMemRefs - Assign this MachineSDNodes's memory reference descriptor
/// list. This does not transfer ownership.
void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) {
+ for (mmo_iterator MMI =3D NewMemRefs, MME =3D NewMemRefsEnd; MMI !=3D =
MME; ++MMI)
+ assert(*MMI && "Null mem ref detected!");
MemRefs =3D NewMemRefs;
MemRefsEnd =3D NewMemRefsEnd;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/SlotIndexes.h
--- a/head/contrib/llvm/include/llvm/CodeGen/SlotIndexes.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/SlotIndexes.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -19,7 +19,7 @@
#ifndef LLVM_CODEGEN_SLOTINDEXES_H
#define LLVM_CODEGEN_SLOTINDEXES_H
=20
-#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineInstrBundle.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/ADT/PointerIntPair.h"
@@ -83,7 +83,29 @@
friend class SlotIndexes;
friend struct DenseMapInfo<SlotIndex>;
=20
- enum Slot { LOAD, USE, DEF, STORE, NUM };
+ enum Slot {
+ /// Basic block boundary. Used for live ranges entering and leaving=
a
+ /// block without being live in the layout neighbor. Also used as t=
he
+ /// def slot of PHI-defs.
+ Slot_Block,
+
+ /// Early-clobber register use/def slot. A live range defined at
+ /// Slot_EarlyCLobber interferes with normal live ranges killed at
+ /// Slot_Register. Also used as the kill slot for live ranges tied =
to an
+ /// early-clobber def.
+ Slot_EarlyClobber,
+
+ /// Normal register use/def slot. Normal instructions kill and defi=
ne
+ /// register live ranges at this slot.
+ Slot_Register,
+
+ /// Dead def kill point. Kill slot for a live range that is defined=
by
+ /// the same instruction (Slot_Register or Slot_EarlyClobber), but i=
sn't
+ /// used anywhere.
+ Slot_Dead,
+
+ Slot_Count
+ };
=20
PointerIntPair<IndexListEntry*, 2, unsigned> lie;
=20
@@ -113,7 +135,7 @@
enum {
/// The default distance between instructions as returned by distanc=
e().
/// This may vary as instructions are inserted and removed.
- InstrDist =3D 4*NUM
+ InstrDist =3D 4 * Slot_Count
};
=20
static inline SlotIndex getEmptyKey() {
@@ -186,69 +208,55 @@
return A.lie.getPointer() =3D=3D B.lie.getPointer();
}
=20
+ /// isEarlierInstr - Return true if A refers to an instruction earlier=
than
+ /// B. This is equivalent to A < B && !isSameInstr(A, B).
+ static bool isEarlierInstr(SlotIndex A, SlotIndex B) {
+ return A.entry().getIndex() < B.entry().getIndex();
+ }
+
/// Return the distance from this index to the given one.
int distance(SlotIndex other) const {
return other.getIndex() - getIndex();
}
=20
- /// isLoad - Return true if this is a LOAD slot.
- bool isLoad() const {
- return getSlot() =3D=3D LOAD;
- }
+ /// isBlock - Returns true if this is a block boundary slot.
+ bool isBlock() const { return getSlot() =3D=3D Slot_Block; }
=20
- /// isDef - Return true if this is a DEF slot.
- bool isDef() const {
- return getSlot() =3D=3D DEF;
- }
+ /// isEarlyClobber - Returns true if this is an early-clobber slot.
+ bool isEarlyClobber() const { return getSlot() =3D=3D Slot_EarlyClobbe=
r; }
=20
- /// isUse - Return true if this is a USE slot.
- bool isUse() const {
- return getSlot() =3D=3D USE;
- }
+ /// isRegister - Returns true if this is a normal register use/def slo=
t.
+ /// Note that early-clobber slots may also be used for uses and defs.
+ bool isRegister() const { return getSlot() =3D=3D Slot_Register; }
=20
- /// isStore - Return true if this is a STORE slot.
- bool isStore() const {
- return getSlot() =3D=3D STORE;
- }
+ /// isDead - Returns true if this is a dead def kill slot.
+ bool isDead() const { return getSlot() =3D=3D Slot_Dead; }
=20
/// Returns the base index for associated with this index. The base in=
dex
- /// is the one associated with the LOAD slot for the instruction point=
ed to
- /// by this index.
+ /// is the one associated with the Slot_Block slot for the instruction
+ /// pointed to by this index.
SlotIndex getBaseIndex() const {
- return getLoadIndex();
+ return SlotIndex(&entry(), Slot_Block);
}
=20
/// Returns the boundary index for associated with this index. The bou=
ndary
- /// index is the one associated with the LOAD slot for the instruction
+ /// index is the one associated with the Slot_Block slot for the instr=
uction
/// pointed to by this index.
SlotIndex getBoundaryIndex() const {
- return getStoreIndex();
+ return SlotIndex(&entry(), Slot_Dead);
}
=20
- /// Returns the index of the LOAD slot for the instruction pointed to =
by
- /// this index.
- SlotIndex getLoadIndex() const {
- return SlotIndex(&entry(), SlotIndex::LOAD);
- } =20
-
- /// Returns the index of the USE slot for the instruction pointed to by
- /// this index.
- SlotIndex getUseIndex() const {
- return SlotIndex(&entry(), SlotIndex::USE);
+ /// Returns the register use/def slot in the current instruction for a
+ /// normal or early-clobber def.
+ SlotIndex getRegSlot(bool EC =3D false) const {
+ return SlotIndex(&entry(), EC ? Slot_EarlyClobber : Slot_Register);
}
=20
- /// Returns the index of the DEF slot for the instruction pointed to by
- /// this index.
- SlotIndex getDefIndex() const {
- return SlotIndex(&entry(), SlotIndex::DEF);
+ /// Returns the dead def kill slot for the current instruction.
+ SlotIndex getDeadSlot() const {
+ return SlotIndex(&entry(), Slot_Dead);
}
=20
- /// Returns the index of the STORE slot for the instruction pointed to=
by
- /// this index.
- SlotIndex getStoreIndex() const {
- return SlotIndex(&entry(), SlotIndex::STORE);
- } =20
-
/// Returns the next slot in the index list. This could be either the
/// next slot for the instruction pointed to by this index or, if this
/// index is a STORE, the first slot for the next instruction.
@@ -257,8 +265,8 @@
/// use one of those methods.
SlotIndex getNextSlot() const {
Slot s =3D getSlot();
- if (s =3D=3D SlotIndex::STORE) {
- return SlotIndex(entry().getNext(), SlotIndex::LOAD);
+ if (s =3D=3D Slot_Dead) {
+ return SlotIndex(entry().getNext(), Slot_Block);
}
return SlotIndex(&entry(), s + 1);
}
@@ -271,14 +279,14 @@
=20
/// Returns the previous slot in the index list. This could be either =
the
/// previous slot for the instruction pointed to by this index or, if =
this
- /// index is a LOAD, the last slot for the previous instruction.
+ /// index is a Slot_Block, the last slot for the previous instruction.
/// WARNING: This method is considerably more expensive than the metho=
ds
/// that return specific slots (getUseIndex(), etc). If you can - plea=
se
/// use one of those methods.
SlotIndex getPrevSlot() const {
Slot s =3D getSlot();
- if (s =3D=3D SlotIndex::LOAD) {
- return SlotIndex(entry().getPrev(), SlotIndex::STORE);
+ if (s =3D=3D Slot_Block) {
+ return SlotIndex(entry().getPrev(), Slot_Dead);
}
return SlotIndex(&entry(), s - 1);
}
@@ -464,11 +472,6 @@
return SlotIndex(back(), 0);
}
=20
- /// Returns the invalid index marker for this analysis.
- SlotIndex getInvalidIndex() {
- return getZeroIndex();
- }
-
/// Returns the distance between the highest and lowest indexes alloca=
ted
/// so far.
unsigned getIndexesLength() const {
@@ -486,12 +489,13 @@
/// Returns true if the given machine instr is mapped to an index,
/// otherwise returns false.
bool hasIndex(const MachineInstr *instr) const {
- return (mi2iMap.find(instr) !=3D mi2iMap.end());
+ return mi2iMap.count(instr);
}
=20
/// Returns the base index for the given instruction.
- SlotIndex getInstructionIndex(const MachineInstr *instr) const {
- Mi2IndexMap::const_iterator itr =3D mi2iMap.find(instr);
+ SlotIndex getInstructionIndex(const MachineInstr *MI) const {
+ // Instructions inside a bundle have the same number as the bundle i=
tself.
+ Mi2IndexMap::const_iterator itr =3D mi2iMap.find(getBundleStart(MI));
assert(itr !=3D mi2iMap.end() && "Instruction not found in maps.");
return itr->second;
}
@@ -645,6 +649,8 @@
/// instructions, create the new index after the null indexes instead =
of
/// before them.
SlotIndex insertMachineInstrInMaps(MachineInstr *mi, bool Late =3D fal=
se) {
+ assert(!mi->isInsideBundle() &&
+ "Instructions inside bundles should use bundle start's slot."=
);
assert(mi2iMap.find(mi) =3D=3D mi2iMap.end() && "Instr already index=
ed.");
// Numbering DBG_VALUE instructions could cause code generation to be
// affected by debug information.
@@ -677,7 +683,7 @@
if (dist =3D=3D 0)
renumberIndexes(newEntry);
=20
- SlotIndex newIndex(newEntry, SlotIndex::LOAD);
+ SlotIndex newIndex(newEntry, SlotIndex::Slot_Block);
mi2iMap.insert(std::make_pair(mi, newIndex));
return newIndex;
}
@@ -728,8 +734,8 @@
insert(nextEntry, startEntry);
insert(nextEntry, stopEntry);
=20
- SlotIndex startIdx(startEntry, SlotIndex::LOAD);
- SlotIndex endIdx(nextEntry, SlotIndex::LOAD);
+ SlotIndex startIdx(startEntry, SlotIndex::Slot_Block);
+ SlotIndex endIdx(nextEntry, SlotIndex::Slot_Block);
=20
assert(unsigned(mbb->getNumber()) =3D=3D MBBRanges.size() &&
"Blocks must be added in order");
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/TargetLoweringObjectFileImpl.h
--- a/head/contrib/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h=
Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h=
Tue Apr 17 11:51:51 2012 +0300
@@ -15,9 +15,9 @@
#ifndef LLVM_CODEGEN_TARGETLOWERINGOBJECTFILEIMPL_H
#define LLVM_CODEGEN_TARGETLOWERINGOBJECTFILEIMPL_H
=20
-#include "llvm/ADT/StringRef.h"
#include "llvm/MC/SectionKind.h"
#include "llvm/Target/TargetLoweringObjectFile.h"
+#include "llvm/ADT/StringRef.h"
=20
namespace llvm {
class MachineModuleInfo;
@@ -65,6 +65,11 @@
virtual MCSymbol *
getCFIPersonalitySymbol(const GlobalValue *GV, Mangler *Mang,
MachineModuleInfo *MMI) const;
+
+ virtual const MCSection *
+ getStaticCtorSection(unsigned Priority =3D 65535) const;
+ virtual const MCSection *
+ getStaticDtorSection(unsigned Priority =3D 65535) const;
};
=20
=20
@@ -73,6 +78,12 @@
public:
virtual ~TargetLoweringObjectFileMachO() {}
=20
+ /// emitModuleFlags - Emit the module flags that specify the garbage
+ /// collection information.
+ virtual void emitModuleFlags(MCStreamer &Streamer,
+ ArrayRef<Module::ModuleFlagEntry> ModuleFla=
gs,
+ Mangler *Mang, const TargetMachine &TM) con=
st;
+
virtual const MCSection *
SelectSectionForGlobal(const GlobalValue *GV, SectionKind Kind,
Mangler *Mang, const TargetMachine &TM) const;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/ValueTypes.h
--- a/head/contrib/llvm/include/llvm/CodeGen/ValueTypes.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/ValueTypes.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -16,10 +16,11 @@
#ifndef LLVM_CODEGEN_VALUETYPES_H
#define LLVM_CODEGEN_VALUETYPES_H
=20
+#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/MathExtras.h"
#include <cassert>
#include <string>
-#include "llvm/Support/DataTypes.h"
-#include "llvm/Support/MathExtras.h"
=20
namespace llvm {
class Type;
@@ -45,49 +46,56 @@
FIRST_INTEGER_VALUETYPE =3D i1,
LAST_INTEGER_VALUETYPE =3D i128,
=20
- f32 =3D 7, // This is a 32 bit floating point value
- f64 =3D 8, // This is a 64 bit floating point value
- f80 =3D 9, // This is a 80 bit floating point value
- f128 =3D 10, // This is a 128 bit floating point value
- ppcf128 =3D 11, // This is a PPC 128-bit floating point va=
lue
+ f16 =3D 7, // This is a 16 bit floating point value
+ f32 =3D 8, // This is a 32 bit floating point value
+ f64 =3D 9, // This is a 64 bit floating point value
+ f80 =3D 10, // This is a 80 bit floating point value
+ f128 =3D 11, // This is a 128 bit floating point value
+ ppcf128 =3D 12, // This is a PPC 128-bit floating point va=
lue
=20
- v2i8 =3D 12, // 2 x i8
- v4i8 =3D 13, // 4 x i8
- v8i8 =3D 14, // 8 x i8
- v16i8 =3D 15, // 16 x i8
- v32i8 =3D 16, // 32 x i8
- v2i16 =3D 17, // 2 x i16
- v4i16 =3D 18, // 4 x i16
- v8i16 =3D 19, // 8 x i16
- v16i16 =3D 20, // 16 x i16
- v2i32 =3D 21, // 2 x i32
- v4i32 =3D 22, // 4 x i32
- v8i32 =3D 23, // 8 x i32
- v1i64 =3D 24, // 1 x i64
- v2i64 =3D 25, // 2 x i64
- v4i64 =3D 26, // 4 x i64
- v8i64 =3D 27, // 8 x i64
+ FIRST_FP_VALUETYPE =3D f16,
+ LAST_FP_VALUETYPE =3D ppcf128,
=20
- v2f32 =3D 28, // 2 x f32
- v4f32 =3D 29, // 4 x f32
- v8f32 =3D 30, // 8 x f32
- v2f64 =3D 31, // 2 x f64
- v4f64 =3D 32, // 4 x f64
+ v2i8 =3D 13, // 2 x i8
+ v4i8 =3D 14, // 4 x i8
+ v8i8 =3D 15, // 8 x i8
+ v16i8 =3D 16, // 16 x i8
+ v32i8 =3D 17, // 32 x i8
+ v2i16 =3D 18, // 2 x i16
+ v4i16 =3D 19, // 4 x i16
+ v8i16 =3D 20, // 8 x i16
+ v16i16 =3D 21, // 16 x i16
+ v2i32 =3D 22, // 2 x i32
+ v4i32 =3D 23, // 4 x i32
+ v8i32 =3D 24, // 8 x i32
+ v1i64 =3D 25, // 1 x i64
+ v2i64 =3D 26, // 2 x i64
+ v4i64 =3D 27, // 4 x i64
+ v8i64 =3D 28, // 8 x i64
+
+ v2f16 =3D 29, // 2 x f16
+ v2f32 =3D 30, // 2 x f32
+ v4f32 =3D 31, // 4 x f32
+ v8f32 =3D 32, // 8 x f32
+ v2f64 =3D 33, // 2 x f64
+ v4f64 =3D 34, // 4 x f64
=20
FIRST_VECTOR_VALUETYPE =3D v2i8,
LAST_VECTOR_VALUETYPE =3D v4f64,
+ FIRST_FP_VECTOR_VALUETYPE =3D v2f16,
+ LAST_FP_VECTOR_VALUETYPE =3D v4f64,
=20
- x86mmx =3D 33, // This is an X86 MMX value
+ x86mmx =3D 35, // This is an X86 MMX value
=20
- Glue =3D 34, // This glues nodes together during pre-RA=
sched
+ Glue =3D 36, // This glues nodes together during pre-RA=
sched
=20
- isVoid =3D 35, // This has no value
+ isVoid =3D 37, // This has no value
=20
- untyped =3D 36, // This value takes a register, but has
+ Untyped =3D 38, // This value takes a register, but has
// unspecified type. The register class
// will be determined by the opcode.
=20
- LAST_VALUETYPE =3D 37, // This always remains at the end of the l=
ist.
+ LAST_VALUETYPE =3D 39, // This always remains at the end of the l=
ist.
=20
// This is the current maximum for LAST_VALUETYPE.
// MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit ve=
ctors
@@ -143,8 +151,10 @@
=20
/// isFloatingPoint - Return true if this is a FP, or a vector FP type.
bool isFloatingPoint() const {
- return ((SimpleTy >=3D MVT::f32 && SimpleTy <=3D MVT::ppcf128) ||
- (SimpleTy >=3D MVT::v2f32 && SimpleTy <=3D MVT::v4f64));
+ return ((SimpleTy >=3D MVT::FIRST_FP_VALUETYPE &&
+ SimpleTy <=3D MVT::LAST_FP_VALUETYPE) ||
+ (SimpleTy >=3D MVT::FIRST_FP_VECTOR_VALUETYPE &&
+ SimpleTy <=3D MVT::LAST_FP_VECTOR_VALUETYPE));
}
=20
/// isInteger - Return true if this is an integer, or a vector integer=
type.
@@ -203,6 +213,7 @@
case v2i64:
case v4i64:
case v8i64: return i64;
+ case v2f16: return f16;
case v2f32:
case v4f32:
case v8f32: return f32;
@@ -233,6 +244,7 @@
case v2i16:
case v2i32:
case v2i64:
+ case v2f16:
case v2f32:
case v2f64: return 2;
case v1i64: return 1;
@@ -242,21 +254,23 @@
unsigned getSizeInBits() const {
switch (SimpleTy) {
case iPTR:
- assert(0 && "Value type size is target-dependent. Ask TLI.");
+ llvm_unreachable("Value type size is target-dependent. Ask TLI.");
case iPTRAny:
case iAny:
case fAny:
- assert(0 && "Value type is overloaded.");
+ llvm_unreachable("Value type is overloaded.");
default:
- assert(0 && "getSizeInBits called on extended MVT.");
+ llvm_unreachable("getSizeInBits called on extended MVT.");
case i1 : return 1;
case i8 : return 8;
case i16 :
+ case f16:
case v2i8: return 16;
case f32 :
case i32 :
case v4i8:
- case v2i16: return 32;
+ case v2i16:
+ case v2f16: return 32;
case x86mmx:
case f64 :
case i64 :
@@ -300,7 +314,9 @@
static MVT getFloatingPointVT(unsigned BitWidth) {
switch (BitWidth) {
default:
- assert(false && "Bad bit width!");
+ llvm_unreachable("Bad bit width!");
+ case 16:
+ return MVT::f16;
case 32:
return MVT::f32;
case 64:
@@ -359,6 +375,9 @@
if (NumElements =3D=3D 4) return MVT::v4i64;
if (NumElements =3D=3D 8) return MVT::v8i64;
break;
+ case MVT::f16:
+ if (NumElements =3D=3D 2) return MVT::v2f16;
+ break;
case MVT::f32:
if (NumElements =3D=3D 2) return MVT::v2f32;
if (NumElements =3D=3D 4) return MVT::v4f32;
@@ -424,20 +443,6 @@
return getExtendedVectorVT(Context, VT, NumElements);
}
=20
- /// getIntVectorWithNumElements - Return any integer vector type that =
has
- /// the specified number of elements.
- static EVT getIntVectorWithNumElements(LLVMContext &C, unsigned NumElt=
s) {
- switch (NumElts) {
- default: return getVectorVT(C, MVT::i8, NumElts);
- case 1: return MVT::v1i64;
- case 2: return MVT::v2i32;
- case 4: return MVT::v4i16;
- case 8: return MVT::v8i8;
- case 16: return MVT::v16i8;
- }
- return MVT::INVALID_SIMPLE_VALUE_TYPE;
- }
-
/// changeVectorElementTypeToInteger - Return a vector with the same n=
umber
/// of elements as this vector, but with the element type converted to=
an
/// integer type with the same bitwidth.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/CodeGen=
/ValueTypes.td
--- a/head/contrib/llvm/include/llvm/CodeGen/ValueTypes.td Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/CodeGen/ValueTypes.td Tue Apr 17 11:51=
:51 2012 +0300
@@ -26,39 +26,41 @@
def i32 : ValueType<32 , 4>; // 32-bit integer value
def i64 : ValueType<64 , 5>; // 64-bit integer value
def i128 : ValueType<128, 6>; // 128-bit integer value
-def f32 : ValueType<32 , 7>; // 32-bit floating point value
-def f64 : ValueType<64 , 8>; // 64-bit floating point value
-def f80 : ValueType<80 , 9>; // 80-bit floating point value
-def f128 : ValueType<128, 10>; // 128-bit floating point value
-def ppcf128: ValueType<128, 11>; // PPC 128-bit floating point value
+def f16 : ValueType<16 , 7>; // 32-bit floating point value
+def f32 : ValueType<32 , 8>; // 32-bit floating point value
+def f64 : ValueType<64 , 9>; // 64-bit floating point value
+def f80 : ValueType<80 , 10>; // 80-bit floating point value
+def f128 : ValueType<128, 11>; // 128-bit floating point value
+def ppcf128: ValueType<128, 12>; // PPC 128-bit floating point value
=20
-def v2i8 : ValueType<16 , 12>; // 2 x i8 vector value
-def v4i8 : ValueType<32 , 13>; // 4 x i8 vector value
-def v8i8 : ValueType<64 , 14>; // 8 x i8 vector value
-def v16i8 : ValueType<128, 15>; // 16 x i8 vector value
-def v32i8 : ValueType<256, 16>; // 32 x i8 vector value
-def v2i16 : ValueType<32 , 17>; // 2 x i16 vector value
-def v4i16 : ValueType<64 , 18>; // 4 x i16 vector value
-def v8i16 : ValueType<128, 19>; // 8 x i16 vector value
-def v16i16 : ValueType<256, 20>; // 16 x i16 vector value
-def v2i32 : ValueType<64 , 21>; // 2 x i32 vector value
-def v4i32 : ValueType<128, 22>; // 4 x i32 vector value
-def v8i32 : ValueType<256, 23>; // 8 x i32 vector value
-def v1i64 : ValueType<64 , 24>; // 1 x i64 vector value
-def v2i64 : ValueType<128, 25>; // 2 x i64 vector value
-def v4i64 : ValueType<256, 26>; // 4 x i64 vector value
-def v8i64 : ValueType<512, 27>; // 8 x i64 vector value
+def v2i8 : ValueType<16 , 13>; // 2 x i8 vector value
+def v4i8 : ValueType<32 , 14>; // 4 x i8 vector value
+def v8i8 : ValueType<64 , 15>; // 8 x i8 vector value
+def v16i8 : ValueType<128, 16>; // 16 x i8 vector value
+def v32i8 : ValueType<256, 17>; // 32 x i8 vector value
+def v2i16 : ValueType<32 , 18>; // 2 x i16 vector value
+def v4i16 : ValueType<64 , 19>; // 4 x i16 vector value
+def v8i16 : ValueType<128, 20>; // 8 x i16 vector value
+def v16i16 : ValueType<256, 21>; // 16 x i16 vector value
+def v2i32 : ValueType<64 , 22>; // 2 x i32 vector value
+def v4i32 : ValueType<128, 23>; // 4 x i32 vector value
+def v8i32 : ValueType<256, 24>; // 8 x i32 vector value
+def v1i64 : ValueType<64 , 25>; // 1 x i64 vector value
+def v2i64 : ValueType<128, 26>; // 2 x i64 vector value
+def v4i64 : ValueType<256, 27>; // 4 x i64 vector value
+def v8i64 : ValueType<512, 28>; // 8 x i64 vector value
=20
-def v2f32 : ValueType<64 , 28>; // 2 x f32 vector value
-def v4f32 : ValueType<128, 29>; // 4 x f32 vector value
-def v8f32 : ValueType<256, 30>; // 8 x f32 vector value
-def v2f64 : ValueType<128, 31>; // 2 x f64 vector value
-def v4f64 : ValueType<256, 32>; // 4 x f64 vector value
+def v2f16 : ValueType<32 , 29>; // 2 x f16 vector value
+def v2f32 : ValueType<64 , 30>; // 2 x f32 vector value
+def v4f32 : ValueType<128, 31>; // 4 x f32 vector value
+def v8f32 : ValueType<256, 32>; // 8 x f32 vector value
+def v2f64 : ValueType<128, 33>; // 2 x f64 vector value
+def v4f64 : ValueType<256, 34>; // 4 x f64 vector value
=20
-def x86mmx : ValueType<64 , 33>; // X86 MMX value
-def FlagVT : ValueType<0 , 34>; // Pre-RA sched glue
-def isVoid : ValueType<0 , 35>; // Produces no value
-def untyped: ValueType<8 , 36>; // Produces an untyped value
+def x86mmx : ValueType<64 , 35>; // X86 MMX value
+def FlagVT : ValueType<0 , 36>; // Pre-RA sched glue
+def isVoid : ValueType<0 , 37>; // Produces no value
+def untyped: ValueType<8 , 38>; // Produces an untyped value
=20
def MetadataVT: ValueType<0, 250>; // Metadata
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Constan=
t.h
--- a/head/contrib/llvm/include/llvm/Constant.h Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/llvm/include/llvm/Constant.h Tue Apr 17 11:51:51 2012 +0=
300
@@ -41,6 +41,7 @@
class Constant : public User {
void operator=3D(const Constant &); // Do not implement
Constant(const Constant &); // Do not implement
+ virtual void anchor();
=20
protected:
Constant(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps)
@@ -90,12 +91,13 @@
/// FIXME: This really should not be in VMCore.
PossibleRelocationsTy getRelocationInfo() const;
=20
- /// getVectorElements - This method, which is only valid on constant of =
vector
- /// type, returns the elements of the vector in the specified smallvecto=
r.
- /// This handles breaking down a vector undef into undef elements, etc. =
For
- /// constant exprs and other cases we can't handle, we return an empty v=
ector.
- void getVectorElements(SmallVectorImpl<Constant*> &Elts) const;
-
+ /// getAggregateElement - For aggregates (struct/array/vector) return the
+ /// constant that corresponds to the specified element if possible, or n=
ull if
+ /// not. This can return null if the element index is a ConstantExpr, o=
r if
+ /// 'this' is a constant expr.
+ Constant *getAggregateElement(unsigned Elt) const;
+ Constant *getAggregateElement(Constant *Elt) const;
+ =20
/// destroyConstant - Called if some element of this constant is no long=
er
/// valid. At this point only other constants may be on the use_list fo=
r this
/// constant. Any constants on our Use list must also be destroy'd. The
@@ -103,7 +105,7 @@
/// available cached constants. Implementations should call
/// destroyConstantImpl as the last thing they do, to destroy all users =
and
/// delete this.
- virtual void destroyConstant() { assert(0 && "Not reached!"); }
+ virtual void destroyConstant() { llvm_unreachable("Not reached!"); }
=20
//// Methods for support type inquiry through isa, cast, and dyn_cast:
static inline bool classof(const Constant *) { return true; }
@@ -129,11 +131,12 @@
// to be here to avoid link errors.
assert(getNumOperands() =3D=3D 0 && "replaceUsesOfWithOnConstant must =
be "
"implemented for all constants that have operands!");
- assert(0 && "Constants that do not have operands cannot be using 'From=
'!");
+ llvm_unreachable("Constants that do not have operands cannot be using "
+ "'From'!");
}
- =20
+
static Constant *getNullValue(Type* Ty);
- =20
+
/// @returns the value for an integer constant of the given type that ha=
s all
/// its bits set to true.
/// @brief Get the all ones value
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Constan=
ts.h
--- a/head/contrib/llvm/include/llvm/Constants.h Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/llvm/include/llvm/Constants.h Tue Apr 17 11:51:51 2012 +=
0300
@@ -34,10 +34,13 @@
class StructType;
class PointerType;
class VectorType;
+class SequentialType;
=20
template<class ConstantClass, class TypeClass, class ValType>
struct ConstantCreator;
template<class ConstantClass, class TypeClass>
+struct ConstantArrayCreator;
+template<class ConstantClass, class TypeClass>
struct ConvertConstantType;
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -45,6 +48,7 @@
/// represents both boolean and integral constants.
/// @brief Class for constant integers.
class ConstantInt : public Constant {
+ virtual void anchor();
void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
ConstantInt(const ConstantInt &); // DO NOT IMPLEMENT
ConstantInt(IntegerType *Ty, const APInt& V);
@@ -229,6 +233,7 @@
///
class ConstantFP : public Constant {
APFloat Val;
+ virtual void anchor();
void *operator new(size_t, unsigned);// DO NOT IMPLEMENT
ConstantFP(const ConstantFP &); // DO NOT IMPLEMENT
friend class LLVMContextImpl;
@@ -296,7 +301,6 @@
/// ConstantAggregateZero - All zero aggregate value
///
class ConstantAggregateZero : public Constant {
- friend struct ConstantCreator<ConstantAggregateZero, Type, char>;
void *operator new(size_t, unsigned); // DO NOT IMP=
LEMENT
ConstantAggregateZero(const ConstantAggregateZero &); // DO NOT IMP=
LEMENT
protected:
@@ -308,10 +312,26 @@
return User::operator new(s, 0);
}
public:
- static ConstantAggregateZero* get(Type *Ty);
+ static ConstantAggregateZero *get(Type *Ty);
=20
virtual void destroyConstant();
=20
+ /// getSequentialElement - If this CAZ has array or vector type, return =
a zero
+ /// with the right element type.
+ Constant *getSequentialElement() const;
+
+ /// getStructElement - If this CAZ has struct type, return a zero with t=
he
+ /// right element type for the specified element.
+ Constant *getStructElement(unsigned Elt) const;
+
+ /// getElementValue - Return a zero of the right value for the specified=
GEP
+ /// index.
+ Constant *getElementValue(Constant *C) const;
+
+ /// getElementValue - Return a zero of the right value for the specified=
GEP
+ /// index.
+ Constant *getElementValue(unsigned Idx) const;
+
/// Methods for support type inquiry through isa, cast, and dyn_cast:
///
static bool classof(const ConstantAggregateZero *) { return true; }
@@ -325,8 +345,7 @@
/// ConstantArray - Constant Array Declarations
///
class ConstantArray : public Constant {
- friend struct ConstantCreator<ConstantArray, ArrayType,
- std::vector<Constant*> >;
+ friend struct ConstantArrayCreator<ConstantArray, ArrayType>;
ConstantArray(const ConstantArray &); // DO NOT IMPLEMENT
protected:
ConstantArray(ArrayType *T, ArrayRef<Constant *> Val);
@@ -334,15 +353,6 @@
// ConstantArray accessors
static Constant *get(ArrayType *T, ArrayRef<Constant*> V);
=20
- /// This method constructs a ConstantArray and initializes it with a text
- /// string. The default behavior (AddNull=3D=3Dtrue) causes a null termi=
nator to
- /// be placed at the end of the array. This effectively increases the le=
ngth
- /// of the array by one (you've been warned). However, in some situatio=
ns=20
- /// this is not desired so if AddNull=3D=3Dfalse then the string is copi=
ed without
- /// null termination.
- static Constant *get(LLVMContext &Context, StringRef Initializer,
- bool AddNull =3D true);
- =20
/// Transparently provide more efficient getOperand methods.
DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Constant);
=20
@@ -353,28 +363,6 @@
return reinterpret_cast<ArrayType*>(Value::getType());
}
=20
- /// isString - This method returns true if the array is an array of i8 a=
nd
- /// the elements of the array are all ConstantInt's.
- bool isString() const;
-
- /// isCString - This method returns true if the array is a string (see
- /// @verbatim
- /// isString) and it ends in a null byte \0 and does not contains any ot=
her
- /// @endverbatim
- /// null bytes except its terminator.
- bool isCString() const;
-
- /// getAsString - If this array is isString(), then this method converts=
the
- /// array to an std::string and returns it. Otherwise, it asserts out.
- ///
- std::string getAsString() const;
-
- /// getAsCString - If this array is isCString(), then this method conver=
ts the
- /// array (without the trailing null byte) to an std::string and returns=
it.
- /// Otherwise, it asserts out.
- ///
- std::string getAsCString() const;
-
virtual void destroyConstant();
virtual void replaceUsesOfWithOnConstant(Value *From, Value *To, Use *U);
=20
@@ -396,8 +384,7 @@
// ConstantStruct - Constant Struct Declarations
//
class ConstantStruct : public Constant {
- friend struct ConstantCreator<ConstantStruct, StructType,
- std::vector<Constant*> >;
+ friend struct ConstantArrayCreator<ConstantStruct, StructType>;
ConstantStruct(const ConstantStruct &); // DO NOT IMPLEMENT
protected:
ConstantStruct(StructType *T, ArrayRef<Constant *> Val);
@@ -457,8 +444,7 @@
/// ConstantVector - Constant Vector Declarations
///
class ConstantVector : public Constant {
- friend struct ConstantCreator<ConstantVector, VectorType,
- std::vector<Constant*> >;
+ friend struct ConstantArrayCreator<ConstantVector, VectorType>;
ConstantVector(const ConstantVector &); // DO NOT IMPLEMENT
protected:
ConstantVector(VectorType *T, ArrayRef<Constant *> Val);
@@ -466,6 +452,10 @@
// ConstantVector accessors
static Constant *get(ArrayRef<Constant*> V);
=20
+ /// getSplat - Return a ConstantVector with the specified constant in ea=
ch
+ /// element.
+ static Constant *getSplat(unsigned NumElts, Constant *Elt);
+ =20
/// Transparently provide more efficient getOperand methods.
DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Constant);
=20
@@ -475,12 +465,6 @@
inline VectorType *getType() const {
return reinterpret_cast<VectorType*>(Value::getType());
}
- =20
- /// This function will return true iff every element in this vector cons=
tant
- /// is set to all ones.
- /// @returns true iff this constant's emements are all set to all ones.
- /// @brief Determine if the value is all ones.
- bool isAllOnesValue() const;
=20
/// getSplatValue - If this is a splat constant, meaning that all of the
/// elements have the same value, return that value. Otherwise return NU=
LL.
@@ -507,7 +491,6 @@
/// ConstantPointerNull - a constant pointer value that points to null
///
class ConstantPointerNull : public Constant {
- friend struct ConstantCreator<ConstantPointerNull, PointerType, char>;
void *operator new(size_t, unsigned); // DO NOT IMPLEME=
NT
ConstantPointerNull(const ConstantPointerNull &); // DO NOT IMPLEME=
NT
protected:
@@ -539,6 +522,240 @@
return V->getValueID() =3D=3D ConstantPointerNullVal;
}
};
+ =20
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+/// ConstantDataSequential - A vector or array constant whose element type=
is a
+/// simple 1/2/4/8-byte integer or float/double, and whose elements are ju=
st
+/// simple data values (i.e. ConstantInt/ConstantFP). This Constant node =
has no
+/// operands because it stores all of the elements of the constant as dens=
ely
+/// packed data, instead of as Value*'s.
+///
+/// This is the common base class of ConstantDataArray and ConstantDataVec=
tor.
+///
+class ConstantDataSequential : public Constant {
+ friend class LLVMContextImpl;
+ /// DataElements - A pointer to the bytes underlying this constant (whic=
h is
+ /// owned by the uniquing StringMap).
+ const char *DataElements;
+ =20
+ /// Next - This forms a link list of ConstantDataSequential nodes that h=
ave
+ /// the same value but different type. For example, 0,0,0,1 could be a 4
+ /// element array of i8, or a 1-element array of i32. They'll both end =
up in
+ /// the same StringMap bucket, linked up.
+ ConstantDataSequential *Next;
+ void *operator new(size_t, unsigned); // DO NOT IMP=
LEMENT
+ ConstantDataSequential(const ConstantDataSequential &); // DO NOT IMP=
LEMENT
+protected:
+ explicit ConstantDataSequential(Type *ty, ValueTy VT, const char *Data)
+ : Constant(ty, VT, 0, 0), DataElements(Data), Next(0) {}
+ ~ConstantDataSequential() { delete Next; }
+ =20
+ static Constant *getImpl(StringRef Bytes, Type *Ty);
+
+protected:
+ // allocate space for exactly zero operands.
+ void *operator new(size_t s) {
+ return User::operator new(s, 0);
+ }
+public:
+ =20
+ /// isElementTypeCompatible - Return true if a ConstantDataSequential ca=
n be
+ /// formed with a vector or array of the specified element type.
+ /// ConstantDataArray only works with normal float and int types that are
+ /// stored densely in memory, not with things like i42 or x86_f80.
+ static bool isElementTypeCompatible(const Type *Ty);
+ =20
+ /// getElementAsInteger - If this is a sequential container of integers =
(of
+ /// any size), return the specified element in the low bits of a uint64_=
t.
+ uint64_t getElementAsInteger(unsigned i) const;
+
+ /// getElementAsAPFloat - If this is a sequential container of floating =
point
+ /// type, return the specified element as an APFloat.
+ APFloat getElementAsAPFloat(unsigned i) const;
+
+ /// getElementAsFloat - If this is an sequential container of floats, re=
turn
+ /// the specified element as a float.
+ float getElementAsFloat(unsigned i) const;
+ =20
+ /// getElementAsDouble - If this is an sequential container of doubles, =
return
+ /// the specified element as a double.
+ double getElementAsDouble(unsigned i) const;
+ =20
+ /// getElementAsConstant - Return a Constant for a specified index's ele=
ment.
+ /// Note that this has to compute a new constant to return, so it isn't =
as
+ /// efficient as getElementAsInteger/Float/Double.
+ Constant *getElementAsConstant(unsigned i) const;
+ =20
+ /// getType - Specialize the getType() method to always return a
+ /// SequentialType, which reduces the amount of casting needed in parts =
of the
+ /// compiler.
+ inline SequentialType *getType() const {
+ return reinterpret_cast<SequentialType*>(Value::getType());
+ }
+ =20
+ /// getElementType - Return the element type of the array/vector.
+ Type *getElementType() const;
+ =20
+ /// getNumElements - Return the number of elements in the array or vecto=
r.
+ unsigned getNumElements() const;
+
+ /// getElementByteSize - Return the size (in bytes) of each element in t=
he
+ /// array/vector. The size of the elements is known to be a multiple of=
one
+ /// byte.
+ uint64_t getElementByteSize() const;
+
+ =20
+ /// isString - This method returns true if this is an array of i8.
+ bool isString() const;
+ =20
+ /// isCString - This method returns true if the array "isString", ends w=
ith a
+ /// nul byte, and does not contains any other nul bytes.
+ bool isCString() const;
+ =20
+ /// getAsString - If this array is isString(), then this method returns =
the
+ /// array as a StringRef. Otherwise, it asserts out.
+ ///
+ StringRef getAsString() const {
+ assert(isString() && "Not a string");
+ return getRawDataValues();
+ }
+ =20
+ /// getAsCString - If this array is isCString(), then this method return=
s the
+ /// array (without the trailing null byte) as a StringRef. Otherwise, it
+ /// asserts out.
+ ///
+ StringRef getAsCString() const {
+ assert(isCString() && "Isn't a C string");
+ StringRef Str =3D getAsString();
+ return Str.substr(0, Str.size()-1);
+ }
+ =20
+ /// getRawDataValues - Return the raw, underlying, bytes of this data. =
Note
+ /// that this is an extremely tricky thing to work with, as it exposes t=
he
+ /// host endianness of the data elements.
+ StringRef getRawDataValues() const;
+ =20
+ virtual void destroyConstant();
+ =20
+ /// Methods for support type inquiry through isa, cast, and dyn_cast:
+ ///
+ static bool classof(const ConstantDataSequential *) { return true; }
+ static bool classof(const Value *V) {
+ return V->getValueID() =3D=3D ConstantDataArrayVal ||
+ V->getValueID() =3D=3D ConstantDataVectorVal;
+ }
+private:
+ const char *getElementPointer(unsigned Elt) const;
+};
+
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+/// ConstantDataArray - An array constant whose element type is a simple
+/// 1/2/4/8-byte integer or float/double, and whose elements are just simp=
le
+/// data values (i.e. ConstantInt/ConstantFP). This Constant node has no
+/// operands because it stores all of the elements of the constant as dens=
ely
+/// packed data, instead of as Value*'s.
+class ConstantDataArray : public ConstantDataSequential {
+ void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
+ ConstantDataArray(const ConstantDataArray &); // DO NOT IMPLEMENT
+ virtual void anchor();
+ friend class ConstantDataSequential;
+ explicit ConstantDataArray(Type *ty, const char *Data)
+ : ConstantDataSequential(ty, ConstantDataArrayVal, Data) {}
+protected:
+ // allocate space for exactly zero operands.
+ void *operator new(size_t s) {
+ return User::operator new(s, 0);
+ }
+public:
+ =20
+ /// get() constructors - Return a constant with array type with an eleme=
nt
+ /// count and element type matching the ArrayRef passed in. Note that t=
his
+ /// can return a ConstantAggregateZero object.
+ static Constant *get(LLVMContext &Context, ArrayRef<uint8_t> Elts);
+ static Constant *get(LLVMContext &Context, ArrayRef<uint16_t> Elts);
+ static Constant *get(LLVMContext &Context, ArrayRef<uint32_t> Elts);
+ static Constant *get(LLVMContext &Context, ArrayRef<uint64_t> Elts);
+ static Constant *get(LLVMContext &Context, ArrayRef<float> Elts);
+ static Constant *get(LLVMContext &Context, ArrayRef<double> Elts);
+ =20
+ /// getString - This method constructs a CDS and initializes it with a t=
ext
+ /// string. The default behavior (AddNull=3D=3Dtrue) causes a null termi=
nator to
+ /// be placed at the end of the array (increasing the length of the stri=
ng by
+ /// one more than the StringRef would normally indicate. Pass AddNull=
=3Dfalse
+ /// to disable this behavior.
+ static Constant *getString(LLVMContext &Context, StringRef Initializer,
+ bool AddNull =3D true);
+
+ /// getType - Specialize the getType() method to always return an ArrayT=
ype,
+ /// which reduces the amount of casting needed in parts of the compiler.
+ ///
+ inline ArrayType *getType() const {
+ return reinterpret_cast<ArrayType*>(Value::getType());
+ }
+ =20
+ /// Methods for support type inquiry through isa, cast, and dyn_cast:
+ ///
+ static bool classof(const ConstantDataArray *) { return true; }
+ static bool classof(const Value *V) {
+ return V->getValueID() =3D=3D ConstantDataArrayVal;
+ }
+};
+ =20
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+/// ConstantDataVector - A vector constant whose element type is a simple
+/// 1/2/4/8-byte integer or float/double, and whose elements are just simp=
le
+/// data values (i.e. ConstantInt/ConstantFP). This Constant node has no
+/// operands because it stores all of the elements of the constant as dens=
ely
+/// packed data, instead of as Value*'s.
+class ConstantDataVector : public ConstantDataSequential {
+ void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
+ ConstantDataVector(const ConstantDataVector &); // DO NOT IMPLEMENT
+ virtual void anchor();
+ friend class ConstantDataSequential;
+ explicit ConstantDataVector(Type *ty, const char *Data)
+ : ConstantDataSequential(ty, ConstantDataVectorVal, Data) {}
+protected:
+ // allocate space for exactly zero operands.
+ void *operator new(size_t s) {
+ return User::operator new(s, 0);
+ }
+public:
+ =20
+ /// get() constructors - Return a constant with vector type with an elem=
ent
+ /// count and element type matching the ArrayRef passed in. Note that t=
his
+ /// can return a ConstantAggregateZero object.
+ static Constant *get(LLVMContext &Context, ArrayRef<uint8_t> Elts);
+ static Constant *get(LLVMContext &Context, ArrayRef<uint16_t> Elts);
+ static Constant *get(LLVMContext &Context, ArrayRef<uint32_t> Elts);
+ static Constant *get(LLVMContext &Context, ArrayRef<uint64_t> Elts);
+ static Constant *get(LLVMContext &Context, ArrayRef<float> Elts);
+ static Constant *get(LLVMContext &Context, ArrayRef<double> Elts);
+ =20
+ /// getSplat - Return a ConstantVector with the specified constant in ea=
ch
+ /// element. The specified constant has to be a of a compatible type (i=
8/i16/
+ /// i32/i64/float/double) and must be a ConstantFP or ConstantInt.
+ static Constant *getSplat(unsigned NumElts, Constant *Elt);
+
+ /// getSplatValue - If this is a splat constant, meaning that all of the
+ /// elements have the same value, return that value. Otherwise return NU=
LL.
+ Constant *getSplatValue() const;
+ =20
+ /// getType - Specialize the getType() method to always return a VectorT=
ype,
+ /// which reduces the amount of casting needed in parts of the compiler.
+ ///
+ inline VectorType *getType() const {
+ return reinterpret_cast<VectorType*>(Value::getType());
+ }
+ =20
+ /// Methods for support type inquiry through isa, cast, and dyn_cast:
+ ///
+ static bool classof(const ConstantDataVector *) { return true; }
+ static bool classof(const Value *V) {
+ return V->getValueID() =3D=3D ConstantDataVectorVal;
+ }
+};
+
+
=20
/// BlockAddress - The address of a basic block.
///
@@ -897,7 +1114,6 @@
/// LangRef.html#undefvalues for details.
///
class UndefValue : public Constant {
- friend struct ConstantCreator<UndefValue, Type, char>;
void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
UndefValue(const UndefValue &); // DO NOT IMPLEMENT
protected:
@@ -913,6 +1129,22 @@
///
static UndefValue *get(Type *T);
=20
+ /// getSequentialElement - If this Undef has array or vector type, retur=
n a
+ /// undef with the right element type.
+ UndefValue *getSequentialElement() const;
+ =20
+ /// getStructElement - If this undef has struct type, return a undef wit=
h the
+ /// right element type for the specified element.
+ UndefValue *getStructElement(unsigned Elt) const;
+ =20
+ /// getElementValue - Return an undef of the right value for the specifi=
ed GEP
+ /// index.
+ UndefValue *getElementValue(Constant *C) const;
+
+ /// getElementValue - Return an undef of the right value for the specifi=
ed GEP
+ /// index.
+ UndefValue *getElementValue(unsigned Idx) const;
+
virtual void destroyConstant();
=20
/// Methods for support type inquiry through isa, cast, and dyn_cast:
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Default=
Passes.h
--- a/head/contrib/llvm/include/llvm/DefaultPasses.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/include/llvm/DefaultPasses.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -14,6 +14,8 @@
#ifndef LLVM_DEFAULT_PASS_SUPPORT_H
#define LLVM_DEFAULT_PASS_SUPPORT_H
=20
+#include <llvm/PassSupport.h>
+
namespace llvm {
=20
class PassManagerBase;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Derived=
Types.h
--- a/head/contrib/llvm/include/llvm/DerivedTypes.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/include/llvm/DerivedTypes.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -195,9 +195,10 @@
// This is the contents of the SubClassData field.
SCDB_HasBody =3D 1,
SCDB_Packed =3D 2,
- SCDB_IsLiteral =3D 4
+ SCDB_IsLiteral =3D 4,
+ SCDB_IsSized =3D 8
};
- =20
+
/// SymbolTableEntry - For a named struct that actually has a name, this=
is a
/// pointer to the symbol table entry (maintained by LLVMContext) for the
/// struct. This is null if the type is an literal struct or if it is
@@ -248,6 +249,9 @@
/// isOpaque - Return true if this is a type with an identity that has n=
o body
/// specified yet. These prints as 'opaque' in .ll files.
bool isOpaque() const { return (getSubclassData() & SCDB_HasBody) =3D=3D=
0; }
+
+ /// isSized - Return true if this is a sized type.
+ bool isSized() const;
=20
/// hasName - Return true if this is a named struct that has a non-empty=
name.
bool hasName() const { return SymbolTableEntry !=3D 0; }
@@ -374,6 +378,7 @@
///
static VectorType *getInteger(VectorType *VTy) {
unsigned EltBits =3D VTy->getElementType()->getPrimitiveSizeInBits();
+ assert(EltBits && "Element size must be of a non-zero size");
Type *EltTy =3D IntegerType::get(VTy->getContext(), EltBits);
return VectorType::get(EltTy, VTy->getNumElements());
}
@@ -408,6 +413,7 @@
unsigned getNumElements() const { return NumElements; }
=20
/// @brief Return the number of bits in the Vector type.
+ /// Returns zero when the vector is a vector of pointers.
unsigned getBitWidth() const {
return NumElements * getElementType()->getPrimitiveSizeInBits();
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Executi=
onEngine/ExecutionEngine.h
--- a/head/contrib/llvm/include/llvm/ExecutionEngine/ExecutionEngine.h Tue =
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/ExecutionEngine/ExecutionEngine.h Tue =
Apr 17 11:51:51 2012 +0300
@@ -15,17 +15,19 @@
#ifndef LLVM_EXECUTION_ENGINE_H
#define LLVM_EXECUTION_ENGINE_H
=20
-#include <vector>
-#include <map>
-#include <string>
#include "llvm/MC/MCCodeGenInfo.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/ValueMap.h"
#include "llvm/ADT/DenseMap.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/ValueHandle.h"
#include "llvm/Support/Mutex.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetOptions.h"
+#include <vector>
+#include <map>
+#include <string>
=20
namespace llvm {
=20
@@ -41,6 +43,7 @@
class Module;
class MutexGuard;
class TargetData;
+class Triple;
class Type;
=20
/// \brief Helper class for helping synchronize access to the global addre=
ss map
@@ -132,14 +135,12 @@
Module *M,
std::string *ErrorStr,
JITMemoryManager *JMM,
- CodeGenOpt::Level OptLevel,
bool GVsWithCode,
TargetMachine *TM);
static ExecutionEngine *(*MCJITCtor)(
Module *M,
std::string *ErrorStr,
JITMemoryManager *JMM,
- CodeGenOpt::Level OptLevel,
bool GVsWithCode,
TargetMachine *TM);
static ExecutionEngine *(*InterpCtor)(Module *M, std::string *ErrorStr);
@@ -228,6 +229,26 @@
virtual GenericValue runFunction(Function *F,
const std::vector<GenericValue> &ArgValues=
) =3D 0;
=20
+ /// getPointerToNamedFunction - This method returns the address of the
+ /// specified function by using the dlsym function call. As such it is =
only
+ /// useful for resolving library symbols, not code generated symbols.
+ ///
+ /// If AbortOnFailure is false and no function with the given name is
+ /// found, this function silently returns a null pointer. Otherwise,
+ /// it prints a message to stderr and aborts.
+ ///
+ virtual void *getPointerToNamedFunction(const std::string &Name,
+ bool AbortOnFailure =3D true) =
=3D 0;
+
+ /// mapSectionAddress - map a section to its target address space value.
+ /// Map the address of a JIT section as returned from the memory manager
+ /// to the address in the target process as the running code will see it.
+ /// This is the address which will be used for relocation resolution.
+ virtual void mapSectionAddress(void *LocalAddress, uint64_t TargetAddres=
s) {
+ llvm_unreachable("Re-mapping of section addresses not supported with t=
his "
+ "EE!");
+ }
+
/// runStaticConstructorsDestructors - This method is used to execute al=
l of
/// the static constructors or destructors for a program.
///
@@ -462,6 +483,7 @@
CodeGenOpt::Level OptLevel;
JITMemoryManager *JMM;
bool AllocateGVsWithCode;
+ TargetOptions Options;
Reloc::Model RelocModel;
CodeModel::Model CMModel;
std::string MArch;
@@ -475,6 +497,7 @@
ErrorStr =3D NULL;
OptLevel =3D CodeGenOpt::Default;
JMM =3D NULL;
+ Options =3D TargetOptions();
AllocateGVsWithCode =3D false;
RelocModel =3D Reloc::Default;
CMModel =3D CodeModel::JITDefault;
@@ -518,6 +541,13 @@
return *this;
}
=20
+ /// setTargetOptions - Set the target options that the ExecutionEngine
+ /// target is using. Defaults to TargetOptions().
+ EngineBuilder &setTargetOptions(const TargetOptions &Opts) {
+ Options =3D Opts;
+ return *this;
+ }
+
/// setRelocationModel - Set the relocation model that the ExecutionEngi=
ne
/// target is using. Defaults to target specific default "Reloc::Default=
".
EngineBuilder &setRelocationModel(Reloc::Model RM) {
@@ -572,17 +602,20 @@
return *this;
}
=20
+ TargetMachine *selectTarget();
+
/// selectTarget - Pick a target either via -march or by guessing the na=
tive
/// arch. Add any CPU features specified via -mcpu or -mattr.
- static TargetMachine *selectTarget(Module *M,
- StringRef MArch,
- StringRef MCPU,
- const SmallVectorImpl<std::string>& M=
Attrs,
- Reloc::Model RM,
- CodeModel::Model CM,
- std::string *Err);
+ TargetMachine *selectTarget(const Triple &TargetTriple,
+ StringRef MArch,
+ StringRef MCPU,
+ const SmallVectorImpl<std::string>& MAttrs);
=20
- ExecutionEngine *create();
+ ExecutionEngine *create() {
+ return create(selectTarget());
+ }
+
+ ExecutionEngine *create(TargetMachine *TM);
};
=20
} // End llvm namespace
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Executi=
onEngine/JITEventListener.h
--- a/head/contrib/llvm/include/llvm/ExecutionEngine/JITEventListener.h Tue=
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/ExecutionEngine/JITEventListener.h Tue=
Apr 17 11:51:51 2012 +0300
@@ -15,6 +15,7 @@
#ifndef LLVM_EXECUTION_ENGINE_JIT_EVENTLISTENER_H
#define LLVM_EXECUTION_ENGINE_JIT_EVENTLISTENER_H
=20
+#include "llvm/Config/config.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/DebugLoc.h"
=20
@@ -23,6 +24,8 @@
namespace llvm {
class Function;
class MachineFunction;
+class OProfileWrapper;
+class IntelJITEventsWrapper;
=20
/// JITEvent_EmittedFunctionDetails - Helper struct for containing informa=
tion
/// about a generated machine code function.
@@ -59,9 +62,9 @@
/// NotifyFunctionEmitted - Called after a function has been successfully
/// emitted to memory. The function still has its MachineFunction attac=
hed,
/// if you should happen to need that.
- virtual void NotifyFunctionEmitted(const Function &F,
- void *Code, size_t Size,
- const EmittedFunctionDetails &Details=
) {}
+ virtual void NotifyFunctionEmitted(const Function &,
+ void *, size_t,
+ const EmittedFunctionDetails &) {}
=20
/// NotifyFreeingMachineCode - Called from freeMachineCodeForFunction(),=
after
/// the global mapping is removed, but before the machine code is return=
ed to
@@ -71,12 +74,43 @@
/// parameter to a previous NotifyFunctionEmitted call. The Function pa=
ssed
/// to NotifyFunctionEmitted may have been destroyed by the time of the
/// matching NotifyFreeingMachineCode call.
- virtual void NotifyFreeingMachineCode(void *OldPtr) {}
+ virtual void NotifyFreeingMachineCode(void *) {}
+
+#if LLVM_USE_INTEL_JITEVENTS
+ // Construct an IntelJITEventListener
+ static JITEventListener *createIntelJITEventListener();
+
+ // Construct an IntelJITEventListener with a test Intel JIT API implemen=
tation
+ static JITEventListener *createIntelJITEventListener(
+ IntelJITEventsWrapper* AlternativeIm=
pl);
+#else
+ static JITEventListener *createIntelJITEventListener() { return 0; }
+
+ static JITEventListener *createIntelJITEventListener(
+ IntelJITEventsWrapper* AlternativeIm=
pl) {
+ return 0;
+ }
+#endif // USE_INTEL_JITEVENTS
+
+#if LLVM_USE_OPROFILE
+ // Construct an OProfileJITEventListener
+ static JITEventListener *createOProfileJITEventListener();
+
+ // Construct an OProfileJITEventListener with a test opagent implementat=
ion
+ static JITEventListener *createOProfileJITEventListener(
+ OProfileWrapper* AlternativeImpl);
+#else
+
+ static JITEventListener *createOProfileJITEventListener() { return 0; }
+
+ static JITEventListener *createOProfileJITEventListener(
+ OProfileWrapper* AlternativeImpl) {
+ return 0;
+ }
+#endif // USE_OPROFILE
+
};
=20
-// This returns NULL if support isn't available.
-JITEventListener *createOProfileJITEventListener();
-
} // end namespace llvm.
=20
-#endif
+#endif // defined LLVM_EXECUTION_ENGINE_JIT_EVENTLISTENER_H
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Executi=
onEngine/JITMemoryManager.h
--- a/head/contrib/llvm/include/llvm/ExecutionEngine/JITMemoryManager.h Tue=
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/ExecutionEngine/JITMemoryManager.h Tue=
Apr 17 11:51:51 2012 +0300
@@ -47,6 +47,17 @@
/// debugging, and may be turned on by default in debug mode.
virtual void setPoisonMemory(bool poison) =3D 0;
=20
+ /// getPointerToNamedFunction - This method returns the address of the
+ /// specified function. As such it is only useful for resolving library
+ /// symbols, not code generated symbols.
+ ///
+ /// If AbortOnFailure is false and no function with the given name is
+ /// found, this function silently returns a null pointer. Otherwise,
+ /// it prints a message to stderr and aborts.
+ ///
+ virtual void *getPointerToNamedFunction(const std::string &Name,
+ bool AbortOnFailure =3D true) =
=3D 0;
+
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
// Global Offset Table Management
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
@@ -101,6 +112,22 @@
virtual void endFunctionBody(const Function *F, uint8_t *FunctionStart,
uint8_t *FunctionEnd) =3D 0;
=20
+ /// allocateCodeSection - Allocate a memory block of (at least) the given
+ /// size suitable for executable code. The SectionID is a unique identif=
ier
+ /// assigned by the JIT and passed through to the memory manager for
+ /// the instance class to use if it needs to communicate to the JIT about
+ /// a given section after the fact.
+ virtual uint8_t *allocateCodeSection(uintptr_t Size, unsigned Alignment,
+ unsigned SectionID) =3D 0;
+
+ /// allocateDataSection - Allocate a memory block of (at least) the given
+ /// size suitable for data. The SectionID is a unique identifier
+ /// assigned by the JIT and passed through to the memory manager for
+ /// the instance class to use if it needs to communicate to the JIT about
+ /// a given section after the fact.
+ virtual uint8_t *allocateDataSection(uintptr_t Size, unsigned Alignment,
+ unsigned SectionID) =3D 0;
+
/// allocateSpace - Allocate a memory block of the given size. This met=
hod
/// cannot be called between calls to startFunctionBody and endFunctionB=
ody.
virtual uint8_t *allocateSpace(intptr_t Size, unsigned Alignment) =3D 0;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Executi=
onEngine/RuntimeDyld.h
--- a/head/contrib/llvm/include/llvm/ExecutionEngine/RuntimeDyld.h Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/ExecutionEngine/RuntimeDyld.h Tue Apr =
17 11:51:51 2012 +0300
@@ -35,15 +35,18 @@
RTDyldMemoryManager() {}
virtual ~RTDyldMemoryManager();
=20
- // Allocate ActualSize bytes, or more, for the named function. Return
- // a pointer to the allocated memory and update Size to reflect how much
- // memory was acutally allocated.
- virtual uint8_t *startFunctionBody(const char *Name, uintptr_t &Size) =
=3D 0;
+ /// allocateCodeSection - Allocate a memory block of (at least) the given
+ /// size suitable for executable code.
+ virtual uint8_t *allocateCodeSection(uintptr_t Size, unsigned Alignment,
+ unsigned SectionID) =3D 0;
=20
- // Mark the end of the function, including how much of the allocated
- // memory was actually used.
- virtual void endFunctionBody(const char *Name, uint8_t *FunctionStart,
- uint8_t *FunctionEnd) =3D 0;
+ /// allocateDataSection - Allocate a memory block of (at least) the given
+ /// size suitable for data.
+ virtual uint8_t *allocateDataSection(uintptr_t Size, unsigned Alignment,
+ unsigned SectionID) =3D 0;
+
+ virtual void *getPointerToNamedFunction(const std::string &Name,
+ bool AbortOnFailure =3D true) =
=3D 0;
};
=20
class RuntimeDyld {
@@ -54,6 +57,10 @@
// interface.
RuntimeDyldImpl *Dyld;
RTDyldMemoryManager *MM;
+protected:
+ // Change the address associated with a section when resolving relocatio=
ns.
+ // Any relocations already associated with the symbol will be re-resolve=
d.
+ void reassignSectionAddress(unsigned SectionID, uint64_t Addr);
public:
RuntimeDyld(RTDyldMemoryManager*);
~RuntimeDyld();
@@ -65,9 +72,13 @@
void *getSymbolAddress(StringRef Name);
// Resolve the relocations for all symbols we currently know about.
void resolveRelocations();
- // Change the address associated with a symbol when resolving relocation=
s.
- // Any relocations already associated with the symbol will be re-resolve=
d.
- void reassignSymbolAddress(StringRef Name, uint8_t *Addr);
+
+ /// mapSectionAddress - map a section to its target address space value.
+ /// Map the address of a JIT section as returned from the memory manager
+ /// to the address in the target process as the running code will see it.
+ /// This is the address which will be used for relocation resolution.
+ void mapSectionAddress(void *LocalAddress, uint64_t TargetAddress);
+
StringRef getErrorString();
};
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Functio=
n.h
--- a/head/contrib/llvm/include/llvm/Function.h Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/llvm/include/llvm/Function.h Tue Apr 17 11:51:51 2012 +0=
300
@@ -146,7 +146,7 @@
/// The particular intrinsic functions which correspond to this value are
/// defined in llvm/Intrinsics.h.
///
- unsigned getIntrinsicID() const LLVM_ATTRIBUTE_READONLY;
+ unsigned getIntrinsicID() const LLVM_READONLY;
bool isIntrinsic() const { return getIntrinsicID() !=3D 0; }
=20
/// getCallingConv()/setCallingConv(CC) - These method get and set the
@@ -425,6 +425,12 @@
///
bool hasAddressTaken(const User** =3D 0) const;
=20
+ /// isDefTriviallyDead - Return true if it is trivially safe to remove
+ /// this function definition from the module (because it isn't externally
+ /// visible, does not have its address taken, and has no callers). To m=
ake
+ /// this more accurate, call removeDeadConstantUsers first.
+ bool isDefTriviallyDead() const;
+
/// callsFunctionThatReturnsTwice - Return true if the function has a ca=
ll to
/// setjmp or other function that gcc recognizes as "returning twice".
bool callsFunctionThatReturnsTwice() const;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/GlobalV=
alue.h
--- a/head/contrib/llvm/include/llvm/GlobalValue.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/include/llvm/GlobalValue.h Tue Apr 17 11:51:51 2012=
+0300
@@ -59,19 +59,18 @@
protected:
GlobalValue(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps,
LinkageTypes linkage, const Twine &Name)
- : Constant(ty, vty, Ops, NumOps), Parent(0),
- Linkage(linkage), Visibility(DefaultVisibility), Alignment(0),
- UnnamedAddr(0) {
+ : Constant(ty, vty, Ops, NumOps), Linkage(linkage),
+ Visibility(DefaultVisibility), Alignment(0), UnnamedAddr(0), Parent(=
0) {
setName(Name);
}
=20
- Module *Parent;
// Note: VC++ treats enums as signed, so an extra bit is required to pre=
vent
// Linkage and Visibility from turning into negative values.
LinkageTypes Linkage : 5; // The linkage of this global
unsigned Visibility : 2; // The visibility style of this global
unsigned Alignment : 16; // Alignment of this symbol, must be power o=
f two
unsigned UnnamedAddr : 1; // This value's address is not significant
+ Module *Parent; // The containing module.
std::string Section; // Section to emit this into, empty mean def=
ault
public:
~GlobalValue() {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Initial=
izePasses.h
--- a/head/contrib/llvm/include/llvm/InitializePasses.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/InitializePasses.h Tue Apr 17 11:51:51=
2012 +0300
@@ -31,6 +31,10 @@
/// ScalarOpts library.
void initializeScalarOpts(PassRegistry&);
=20
+/// initializeVectorization - Initialize all passes linked into the
+/// Vectorize library.
+void initializeVectorization(PassRegistry&);
+
/// initializeInstCombine - Initialize all passes linked into the
/// ScalarOpts library.
void initializeInstCombine(PassRegistry&);
@@ -67,6 +71,7 @@
void initializeBlockExtractorPassPass(PassRegistry&);
void initializeBlockFrequencyInfoPass(PassRegistry&);
void initializeBlockPlacementPass(PassRegistry&);
+void initializeBranchFolderPassPass(PassRegistry&);
void initializeBranchProbabilityInfoPass(PassRegistry&);
void initializeBreakCriticalEdgesPass(PassRegistry&);
void initializeCFGOnlyPrinterPass(PassRegistry&);
@@ -77,8 +82,10 @@
void initializeCalculateSpillWeightsPass(PassRegistry&);
void initializeCallGraphAnalysisGroup(PassRegistry&);
void initializeCodeGenPreparePass(PassRegistry&);
+void initializeCodePlacementOptPass(PassRegistry&);
void initializeConstantMergePass(PassRegistry&);
void initializeConstantPropagationPass(PassRegistry&);
+void initializeMachineCopyPropagationPass(PassRegistry&);
void initializeCorrelatedValuePropagationPass(PassRegistry&);
void initializeDAEPass(PassRegistry&);
void initializeDAHPass(PassRegistry&);
@@ -94,12 +101,17 @@
void initializeDominatorTreePass(PassRegistry&);
void initializeEdgeBundlesPass(PassRegistry&);
void initializeEdgeProfilerPass(PassRegistry&);
+void initializeExpandPostRAPass(PassRegistry&);
void initializePathProfilerPass(PassRegistry&);
void initializeGCOVProfilerPass(PassRegistry&);
+void initializeAddressSanitizerPass(PassRegistry&);
+void initializeThreadSanitizerPass(PassRegistry&);
void initializeEarlyCSEPass(PassRegistry&);
void initializeExpandISelPseudosPass(PassRegistry&);
void initializeFindUsedTypesPass(PassRegistry&);
void initializeFunctionAttrsPass(PassRegistry&);
+void initializeGCInfoDeleterPass(PassRegistry&);
+void initializeGCMachineCodeAnalysisPass(PassRegistry&);
void initializeGCModuleInfoPass(PassRegistry&);
void initializeGVNPass(PassRegistry&);
void initializeGlobalDCEPass(PassRegistry&);
@@ -127,6 +139,7 @@
void initializeLiveVariablesPass(PassRegistry&);
void initializeLoaderPassPass(PassRegistry&);
void initializePathProfileLoaderPassPass(PassRegistry&);
+void initializeLocalStackSlotPassPass(PassRegistry&);
void initializeLoopDeletionPass(PassRegistry&);
void initializeLoopDependenceAnalysisPass(PassRegistry&);
void initializeLoopExtractorPass(PassRegistry&);
@@ -134,8 +147,8 @@
void initializeLoopInstSimplifyPass(PassRegistry&);
void initializeLoopRotatePass(PassRegistry&);
void initializeLoopSimplifyPass(PassRegistry&);
-void initializeLoopSplitterPass(PassRegistry&);
void initializeLoopStrengthReducePass(PassRegistry&);
+void initializeGlobalMergePass(PassRegistry&);
void initializeLoopUnrollPass(PassRegistry&);
void initializeLoopUnswitchPass(PassRegistry&);
void initializeLoopIdiomRecognizePass(PassRegistry&);
@@ -145,6 +158,8 @@
void initializeLowerInvokePass(PassRegistry&);
void initializeLowerSwitchPass(PassRegistry&);
void initializeMachineBlockFrequencyInfoPass(PassRegistry&);
+void initializeMachineBlockPlacementPass(PassRegistry&);
+void initializeMachineBlockPlacementStatsPass(PassRegistry&);
void initializeMachineBranchProbabilityInfoPass(PassRegistry&);
void initializeMachineCSEPass(PassRegistry&);
void initializeMachineDominatorTreePass(PassRegistry&);
@@ -152,6 +167,7 @@
void initializeMachineLoopInfoPass(PassRegistry&);
void initializeMachineLoopRangesPass(PassRegistry&);
void initializeMachineModuleInfoPass(PassRegistry&);
+void initializeMachineSchedulerPass(PassRegistry&);
void initializeMachineSinkingPass(PassRegistry&);
void initializeMachineVerifierPassPass(PassRegistry&);
void initializeMemCpyOptPass(PassRegistry&);
@@ -163,6 +179,7 @@
void initializeNoProfileInfoPass(PassRegistry&);
void initializeNoPathProfileInfoPass(PassRegistry&);
void initializeObjCARCAliasAnalysisPass(PassRegistry&);
+void initializeObjCARCAPElimPass(PassRegistry&);
void initializeObjCARCExpandPass(PassRegistry&);
void initializeObjCARCContractPass(PassRegistry&);
void initializeObjCARCOptPass(PassRegistry&);
@@ -177,6 +194,7 @@
void initializePostDomPrinterPass(PassRegistry&);
void initializePostDomViewerPass(PassRegistry&);
void initializePostDominatorTreePass(PassRegistry&);
+void initializePostRASchedulerPass(PassRegistry&);
void initializePreVerifierPass(PassRegistry&);
void initializePrintDbgInfoPass(PassRegistry&);
void initializePrintFunctionPassPass(PassRegistry&);
@@ -189,7 +207,6 @@
void initializeProfileVerifierPassPass(PassRegistry&);
void initializePromotePassPass(PassRegistry&);
void initializePruneEHPass(PassRegistry&);
-void initializeRALinScanPass(PassRegistry&);
void initializeReassociatePass(PassRegistry&);
void initializeRegToMemPass(PassRegistry&);
void initializeRegionInfoPass(PassRegistry&);
@@ -219,6 +236,8 @@
void initializeStripSymbolsPass(PassRegistry&);
void initializeStrongPHIEliminationPass(PassRegistry&);
void initializeTailCallElimPass(PassRegistry&);
+void initializeTailDuplicatePassPass(PassRegistry&);
+void initializeTargetPassConfigPass(PassRegistry&);
void initializeTargetDataPass(PassRegistry&);
void initializeTargetLibraryInfoPass(PassRegistry&);
void initializeTwoAddressInstructionPassPass(PassRegistry&);
@@ -229,7 +248,9 @@
void initializeVerifierPass(PassRegistry&);
void initializeVirtRegMapPass(PassRegistry&);
void initializeInstSimplifierPass(PassRegistry&);
-
+void initializeUnpackMachineBundlesPass(PassRegistry&);
+void initializeFinalizeMachineBundlesPass(PassRegistry&);
+void initializeBBVectorizePass(PassRegistry&);
}
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/InlineA=
sm.h
--- a/head/contrib/llvm/include/llvm/InlineAsm.h Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/llvm/include/llvm/InlineAsm.h Tue Apr 17 11:51:51 2012 +=
0300
@@ -17,6 +17,7 @@
#define LLVM_INLINEASM_H
=20
#include "llvm/Value.h"
+#include "llvm/ADT/StringRef.h"
#include <vector>
=20
namespace llvm {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/InstrTy=
pes.h
--- a/head/contrib/llvm/include/llvm/InstrTypes.h Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/llvm/include/llvm/InstrTypes.h Tue Apr 17 11:51:51 2012 =
+0300
@@ -388,6 +388,7 @@
/// if (isa<CastInst>(Instr)) { ... }
/// @brief Base class of casting instructions.
class CastInst : public UnaryInstruction {
+ virtual void anchor();
protected:
/// @brief Constructor with insert-before-instruction semantics for subc=
lasses
CastInst(Type *Ty, unsigned iType, Value *S,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Instruc=
tion.def
--- a/head/contrib/llvm/include/llvm/Instruction.def Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/include/llvm/Instruction.def Tue Apr 17 11:51:51 20=
12 +0300
@@ -99,81 +99,80 @@
HANDLE_TERM_INST ( 3, Switch , SwitchInst)
HANDLE_TERM_INST ( 4, IndirectBr , IndirectBrInst)
HANDLE_TERM_INST ( 5, Invoke , InvokeInst)
-HANDLE_TERM_INST ( 6, Unwind , UnwindInst)
-HANDLE_TERM_INST ( 7, Resume , ResumeInst)
-HANDLE_TERM_INST ( 8, Unreachable, UnreachableInst)
- LAST_TERM_INST ( 8)
+HANDLE_TERM_INST ( 6, Resume , ResumeInst)
+HANDLE_TERM_INST ( 7, Unreachable, UnreachableInst)
+ LAST_TERM_INST ( 7)
=20
// Standard binary operators...
- FIRST_BINARY_INST( 9)
-HANDLE_BINARY_INST( 9, Add , BinaryOperator)
-HANDLE_BINARY_INST(10, FAdd , BinaryOperator)
-HANDLE_BINARY_INST(11, Sub , BinaryOperator)
-HANDLE_BINARY_INST(12, FSub , BinaryOperator)
-HANDLE_BINARY_INST(13, Mul , BinaryOperator)
-HANDLE_BINARY_INST(14, FMul , BinaryOperator)
-HANDLE_BINARY_INST(15, UDiv , BinaryOperator)
-HANDLE_BINARY_INST(16, SDiv , BinaryOperator)
-HANDLE_BINARY_INST(17, FDiv , BinaryOperator)
-HANDLE_BINARY_INST(18, URem , BinaryOperator)
-HANDLE_BINARY_INST(19, SRem , BinaryOperator)
-HANDLE_BINARY_INST(20, FRem , BinaryOperator)
+ FIRST_BINARY_INST( 8)
+HANDLE_BINARY_INST( 8, Add , BinaryOperator)
+HANDLE_BINARY_INST( 9, FAdd , BinaryOperator)
+HANDLE_BINARY_INST(10, Sub , BinaryOperator)
+HANDLE_BINARY_INST(11, FSub , BinaryOperator)
+HANDLE_BINARY_INST(12, Mul , BinaryOperator)
+HANDLE_BINARY_INST(13, FMul , BinaryOperator)
+HANDLE_BINARY_INST(14, UDiv , BinaryOperator)
+HANDLE_BINARY_INST(15, SDiv , BinaryOperator)
+HANDLE_BINARY_INST(16, FDiv , BinaryOperator)
+HANDLE_BINARY_INST(17, URem , BinaryOperator)
+HANDLE_BINARY_INST(18, SRem , BinaryOperator)
+HANDLE_BINARY_INST(19, FRem , BinaryOperator)
=20
// Logical operators (integer operands)
-HANDLE_BINARY_INST(21, Shl , BinaryOperator) // Shift left (logical)
-HANDLE_BINARY_INST(22, LShr , BinaryOperator) // Shift right (logical)
-HANDLE_BINARY_INST(23, AShr , BinaryOperator) // Shift right (arithmetic)
-HANDLE_BINARY_INST(24, And , BinaryOperator)
-HANDLE_BINARY_INST(25, Or , BinaryOperator)
-HANDLE_BINARY_INST(26, Xor , BinaryOperator)
- LAST_BINARY_INST(26)
+HANDLE_BINARY_INST(20, Shl , BinaryOperator) // Shift left (logical)
+HANDLE_BINARY_INST(21, LShr , BinaryOperator) // Shift right (logical)
+HANDLE_BINARY_INST(22, AShr , BinaryOperator) // Shift right (arithmetic)
+HANDLE_BINARY_INST(23, And , BinaryOperator)
+HANDLE_BINARY_INST(24, Or , BinaryOperator)
+HANDLE_BINARY_INST(25, Xor , BinaryOperator)
+ LAST_BINARY_INST(25)
=20
// Memory operators...
- FIRST_MEMORY_INST(27)
-HANDLE_MEMORY_INST(27, Alloca, AllocaInst) // Stack management
-HANDLE_MEMORY_INST(28, Load , LoadInst ) // Memory manipulation instrs
-HANDLE_MEMORY_INST(29, Store , StoreInst )
-HANDLE_MEMORY_INST(30, GetElementPtr, GetElementPtrInst)
-HANDLE_MEMORY_INST(31, Fence , FenceInst )
-HANDLE_MEMORY_INST(32, AtomicCmpXchg , AtomicCmpXchgInst )
-HANDLE_MEMORY_INST(33, AtomicRMW , AtomicRMWInst )
- LAST_MEMORY_INST(33)
+ FIRST_MEMORY_INST(26)
+HANDLE_MEMORY_INST(26, Alloca, AllocaInst) // Stack management
+HANDLE_MEMORY_INST(27, Load , LoadInst ) // Memory manipulation instrs
+HANDLE_MEMORY_INST(28, Store , StoreInst )
+HANDLE_MEMORY_INST(29, GetElementPtr, GetElementPtrInst)
+HANDLE_MEMORY_INST(30, Fence , FenceInst )
+HANDLE_MEMORY_INST(31, AtomicCmpXchg , AtomicCmpXchgInst )
+HANDLE_MEMORY_INST(32, AtomicRMW , AtomicRMWInst )
+ LAST_MEMORY_INST(32)
=20
// Cast operators ...
// NOTE: The order matters here because CastInst::isEliminableCastPair=20
// NOTE: (see Instructions.cpp) encodes a table based on this ordering.
- FIRST_CAST_INST(34)
-HANDLE_CAST_INST(34, Trunc , TruncInst ) // Truncate integers
-HANDLE_CAST_INST(35, ZExt , ZExtInst ) // Zero extend integers
-HANDLE_CAST_INST(36, SExt , SExtInst ) // Sign extend integers
-HANDLE_CAST_INST(37, FPToUI , FPToUIInst ) // floating point -> UInt
-HANDLE_CAST_INST(38, FPToSI , FPToSIInst ) // floating point -> SInt
-HANDLE_CAST_INST(39, UIToFP , UIToFPInst ) // UInt -> floating point
-HANDLE_CAST_INST(40, SIToFP , SIToFPInst ) // SInt -> floating point
-HANDLE_CAST_INST(41, FPTrunc , FPTruncInst ) // Truncate floating point
-HANDLE_CAST_INST(42, FPExt , FPExtInst ) // Extend floating point
-HANDLE_CAST_INST(43, PtrToInt, PtrToIntInst) // Pointer -> Integer
-HANDLE_CAST_INST(44, IntToPtr, IntToPtrInst) // Integer -> Pointer
-HANDLE_CAST_INST(45, BitCast , BitCastInst ) // Type cast
- LAST_CAST_INST(45)
+ FIRST_CAST_INST(33)
+HANDLE_CAST_INST(33, Trunc , TruncInst ) // Truncate integers
+HANDLE_CAST_INST(34, ZExt , ZExtInst ) // Zero extend integers
+HANDLE_CAST_INST(35, SExt , SExtInst ) // Sign extend integers
+HANDLE_CAST_INST(36, FPToUI , FPToUIInst ) // floating point -> UInt
+HANDLE_CAST_INST(37, FPToSI , FPToSIInst ) // floating point -> SInt
+HANDLE_CAST_INST(38, UIToFP , UIToFPInst ) // UInt -> floating point
+HANDLE_CAST_INST(39, SIToFP , SIToFPInst ) // SInt -> floating point
+HANDLE_CAST_INST(40, FPTrunc , FPTruncInst ) // Truncate floating point
+HANDLE_CAST_INST(41, FPExt , FPExtInst ) // Extend floating point
+HANDLE_CAST_INST(42, PtrToInt, PtrToIntInst) // Pointer -> Integer
+HANDLE_CAST_INST(43, IntToPtr, IntToPtrInst) // Integer -> Pointer
+HANDLE_CAST_INST(44, BitCast , BitCastInst ) // Type cast
+ LAST_CAST_INST(44)
=20
// Other operators...
- FIRST_OTHER_INST(46)
-HANDLE_OTHER_INST(46, ICmp , ICmpInst ) // Integer comparison instruc=
tion
-HANDLE_OTHER_INST(47, FCmp , FCmpInst ) // Floating point comparison =
instr.
-HANDLE_OTHER_INST(48, PHI , PHINode ) // PHI node instruction
-HANDLE_OTHER_INST(49, Call , CallInst ) // Call a function
-HANDLE_OTHER_INST(50, Select , SelectInst ) // select instruction
-HANDLE_OTHER_INST(51, UserOp1, Instruction) // May be used internally in =
a pass
-HANDLE_OTHER_INST(52, UserOp2, Instruction) // Internal to passes only
-HANDLE_OTHER_INST(53, VAArg , VAArgInst ) // vaarg instruction
-HANDLE_OTHER_INST(54, ExtractElement, ExtractElementInst)// extract from v=
ector
-HANDLE_OTHER_INST(55, InsertElement, InsertElementInst) // insert into ve=
ctor
-HANDLE_OTHER_INST(56, ShuffleVector, ShuffleVectorInst) // shuffle two ve=
ctors.
-HANDLE_OTHER_INST(57, ExtractValue, ExtractValueInst)// extract from aggre=
gate
-HANDLE_OTHER_INST(58, InsertValue, InsertValueInst) // insert into aggreg=
ate
-HANDLE_OTHER_INST(59, LandingPad, LandingPadInst) // Landing pad instruct=
ion.
- LAST_OTHER_INST(59)
+ FIRST_OTHER_INST(45)
+HANDLE_OTHER_INST(45, ICmp , ICmpInst ) // Integer comparison instruc=
tion
+HANDLE_OTHER_INST(46, FCmp , FCmpInst ) // Floating point comparison =
instr.
+HANDLE_OTHER_INST(47, PHI , PHINode ) // PHI node instruction
+HANDLE_OTHER_INST(48, Call , CallInst ) // Call a function
+HANDLE_OTHER_INST(49, Select , SelectInst ) // select instruction
+HANDLE_OTHER_INST(50, UserOp1, Instruction) // May be used internally in =
a pass
+HANDLE_OTHER_INST(51, UserOp2, Instruction) // Internal to passes only
+HANDLE_OTHER_INST(52, VAArg , VAArgInst ) // vaarg instruction
+HANDLE_OTHER_INST(53, ExtractElement, ExtractElementInst)// extract from v=
ector
+HANDLE_OTHER_INST(54, InsertElement, InsertElementInst) // insert into ve=
ctor
+HANDLE_OTHER_INST(55, ShuffleVector, ShuffleVectorInst) // shuffle two ve=
ctors.
+HANDLE_OTHER_INST(56, ExtractValue, ExtractValueInst)// extract from aggre=
gate
+HANDLE_OTHER_INST(57, InsertValue, InsertValueInst) // insert into aggreg=
ate
+HANDLE_OTHER_INST(58, LandingPad, LandingPadInst) // Landing pad instruct=
ion.
+ LAST_OTHER_INST(58)
=20
#undef FIRST_TERM_INST
#undef HANDLE_TERM_INST
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Instruc=
tion.h
--- a/head/contrib/llvm/include/llvm/Instruction.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/include/llvm/Instruction.h Tue Apr 17 11:51:51 2012=
+0300
@@ -143,7 +143,7 @@
=20
/// getMetadata - Get the metadata of given kind attached to this Instru=
ction.
/// If the metadata is not found then return null.
- MDNode *getMetadata(const char *Kind) const {
+ MDNode *getMetadata(StringRef Kind) const {
if (!hasMetadata()) return 0;
return getMetadataImpl(Kind);
}
@@ -168,7 +168,7 @@
/// node. This updates/replaces metadata if already present, or removes=
it if
/// Node is null.
void setMetadata(unsigned KindID, MDNode *Node);
- void setMetadata(const char *Kind, MDNode *Node);
+ void setMetadata(StringRef Kind, MDNode *Node);
=20
/// setDebugLoc - Set the debug location information for this instructio=
n.
void setDebugLoc(const DebugLoc &Loc) { DbgLoc =3D Loc; }
@@ -185,7 +185,7 @@
=20
// These are all implemented in Metadata.cpp.
MDNode *getMetadataImpl(unsigned KindID) const;
- MDNode *getMetadataImpl(const char *Kind) const;
+ MDNode *getMetadataImpl(StringRef Kind) const;
void getAllMetadataImpl(SmallVectorImpl<std::pair<unsigned,MDNode*> > &)=
const;
void getAllMetadataOtherThanDebugLocImpl(SmallVectorImpl<std::pair<unsig=
ned,
MDNode*> > &) const;
@@ -244,26 +244,6 @@
return mayWriteToMemory() || mayThrow();
}
=20
- /// isSafeToSpeculativelyExecute - Return true if the instruction does n=
ot
- /// have any effects besides calculating the result and does not have
- /// undefined behavior.
- ///
- /// This method never returns true for an instruction that returns true =
for
- /// mayHaveSideEffects; however, this method also does some other checks=
in
- /// addition. It checks for undefined behavior, like dividing by zero or
- /// loading from an invalid pointer (but not for undefined results, like=
a
- /// shift with a shift amount larger than the width of the result). It c=
hecks
- /// for malloc and alloca because speculatively executing them might cau=
se a
- /// memory leak. It also returns false for instructions related to contr=
ol
- /// flow, specifically terminators and PHI nodes.
- ///
- /// This method only looks at the instruction itself and its operands, s=
o if
- /// this method returns true, it is safe to move the instruction as long=
as
- /// the correct dominance relationships for the operands and users hold.
- /// However, this method can return true for instructions that read memo=
ry;
- /// for such instructions, moving them may change the resulting value.
- bool isSafeToSpeculativelyExecute() const;
-
/// clone() - Create a copy of 'this' instruction that is identical in a=
ll
/// ways except the following:
/// * The instruction has no parent
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Instruc=
tions.h
--- a/head/contrib/llvm/include/llvm/Instructions.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/include/llvm/Instructions.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -776,6 +776,10 @@
static Type *getIndexedType(Type *Ptr, ArrayRef<Constant *> IdxList);
static Type *getIndexedType(Type *Ptr, ArrayRef<uint64_t> IdxList);
=20
+ /// getIndexedType - Returns the address space used by the GEP pointer.
+ ///
+ static unsigned getAddressSpace(Value *Ptr);
+
inline op_iterator idx_begin() { return op_begin()+1; }
inline const_op_iterator idx_begin() const { return op_begin()+1; }
inline op_iterator idx_end() { return op_end(); }
@@ -788,7 +792,7 @@
return getOperand(0);
}
static unsigned getPointerOperandIndex() {
- return 0U; // get index for modifying correct ope=
rand
+ return 0U; // get index for modifying correct operand.
}
=20
unsigned getPointerAddressSpace() const {
@@ -797,10 +801,25 @@
=20
/// getPointerOperandType - Method to return the pointer operand as a
/// PointerType.
- PointerType *getPointerOperandType() const {
- return reinterpret_cast<PointerType*>(getPointerOperand()->getType());
- }
-
+ Type *getPointerOperandType() const {
+ return getPointerOperand()->getType();
+ }
+
+ /// GetGEPReturnType - Returns the pointer type returned by the GEP
+ /// instruction, which may be a vector of pointers.
+ static Type *getGEPReturnType(Value *Ptr, ArrayRef<Value *> IdxList) {
+ Type *PtrTy =3D PointerType::get(checkGEPType(
+ getIndexedType(Ptr->getType(), IdxList)=
),
+ getAddressSpace(Ptr));
+ // Vector GEP
+ if (Ptr->getType()->isVectorTy()) {
+ unsigned NumElem =3D cast<VectorType>(Ptr->getType())->getNumElement=
s();
+ return VectorType::get(PtrTy, NumElem);
+ }
+
+ // Scalar GEP
+ return PtrTy;
+ }
=20
unsigned getNumIndices() const { // Note: always non-negative
return getNumOperands() - 1;
@@ -847,10 +866,7 @@
unsigned Values,
const Twine &NameStr,
Instruction *InsertBefore)
- : Instruction(PointerType::get(checkGEPType(
- getIndexedType(Ptr->getType(), IdxList)=
),
- cast<PointerType>(Ptr->getType())
- ->getAddressSpace()),
+ : Instruction(getGEPReturnType(Ptr, IdxList),
GetElementPtr,
OperandTraits<GetElementPtrInst>::op_end(this) - Values,
Values, InsertBefore) {
@@ -861,10 +877,7 @@
unsigned Values,
const Twine &NameStr,
BasicBlock *InsertAtEnd)
- : Instruction(PointerType::get(checkGEPType(
- getIndexedType(Ptr->getType(), IdxList)=
),
- cast<PointerType>(Ptr->getType())
- ->getAddressSpace()),
+ : Instruction(getGEPReturnType(Ptr, IdxList),
GetElementPtr,
OperandTraits<GetElementPtrInst>::op_end(this) - Values,
Values, InsertAtEnd) {
@@ -905,7 +918,7 @@
"Both operands to ICmp instruction are not of the same type!");
// Check that the operands are the right type
assert((getOperand(0)->getType()->isIntOrIntVectorTy() ||
- getOperand(0)->getType()->isPointerTy()) &&
+ getOperand(0)->getType()->getScalarType()->isPointerTy()) &&
"Invalid operand types for ICmp instruction");
}
=20
@@ -945,7 +958,7 @@
"Both operands to ICmp instruction are not of the same type!");
// Check that the operands are the right type
assert((getOperand(0)->getType()->isIntOrIntVectorTy() ||
- getOperand(0)->getType()->isPointerTy()) &&
+ getOperand(0)->getType()->getScalarType()->isPointerTy()) &&
"Invalid operand types for ICmp instruction");
}
=20
@@ -1657,10 +1670,33 @@
/// Transparently provide more efficient getOperand methods.
DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value);
=20
+ Constant *getMask() const {
+ return reinterpret_cast<Constant*>(getOperand(2));
+ }
+ =20
/// getMaskValue - Return the index from the shuffle mask for the specif=
ied
/// output result. This is either -1 if the element is undef or a numbe=
r less
/// than 2*numelements.
- int getMaskValue(unsigned i) const;
+ static int getMaskValue(Constant *Mask, unsigned i);
+
+ int getMaskValue(unsigned i) const {
+ return getMaskValue(getMask(), i);
+ }
+ =20
+ /// getShuffleMask - Return the full mask for this instruction, where ea=
ch
+ /// element is the element number and undef's are returned as -1.
+ static void getShuffleMask(Constant *Mask, SmallVectorImpl<int> &Result);
+
+ void getShuffleMask(SmallVectorImpl<int> &Result) const {
+ return getShuffleMask(getMask(), Result);
+ }
+
+ SmallVector<int, 16> getShuffleMask() const {
+ SmallVector<int, 16> Mask;
+ getShuffleMask(Mask);
+ return Mask;
+ }
+
=20
// Methods for support type inquiry through isa, cast, and dyn_cast:
static inline bool classof(const ShuffleVectorInst *) { return true; }
@@ -2431,6 +2467,122 @@
protected:
virtual SwitchInst *clone_impl() const;
public:
+ =20
+ // -2
+ static const unsigned DefaultPseudoIndex =3D static_cast<unsigned>(~0L-1=
);
+ =20
+ template <class SwitchInstTy, class ConstantIntTy, class BasicBlockTy>=20
+ class CaseIteratorT {
+ protected:
+ =20
+ SwitchInstTy *SI;
+ unsigned Index;
+ =20
+ public:
+ =20
+ typedef CaseIteratorT<SwitchInstTy, ConstantIntTy, BasicBlockTy> Self;
+ =20
+ /// Initializes case iterator for given SwitchInst and for given
+ /// case number. =20
+ CaseIteratorT(SwitchInstTy *SI, unsigned CaseNum) {
+ this->SI =3D SI;
+ Index =3D CaseNum;
+ }
+ =20
+ /// Initializes case iterator for given SwitchInst and for given
+ /// TerminatorInst's successor index.
+ static Self fromSuccessorIndex(SwitchInstTy *SI, unsigned SuccessorInd=
ex) {
+ assert(SuccessorIndex < SI->getNumSuccessors() &&
+ "Successor index # out of range!"); =20
+ return SuccessorIndex !=3D 0 ?=20
+ Self(SI, SuccessorIndex - 1) :
+ Self(SI, DefaultPseudoIndex); =20
+ }
+ =20
+ /// Resolves case value for current case.
+ ConstantIntTy *getCaseValue() {
+ assert(Index < SI->getNumCases() && "Index out the number of cases."=
);
+ return reinterpret_cast<ConstantIntTy*>(SI->getOperand(2 + Index*2));
+ }
+ =20
+ /// Resolves successor for current case.
+ BasicBlockTy *getCaseSuccessor() {
+ assert((Index < SI->getNumCases() ||
+ Index =3D=3D DefaultPseudoIndex) &&
+ "Index out the number of cases.");
+ return SI->getSuccessor(getSuccessorIndex()); =20
+ }
+ =20
+ /// Returns number of current case.
+ unsigned getCaseIndex() const { return Index; }
+ =20
+ /// Returns TerminatorInst's successor index for current case successo=
r.
+ unsigned getSuccessorIndex() const {
+ assert((Index =3D=3D DefaultPseudoIndex || Index < SI->getNumCases()=
) &&
+ "Index out the number of cases.");
+ return Index !=3D DefaultPseudoIndex ? Index + 1 : 0;
+ }
+ =20
+ Self operator++() {
+ // Check index correctness after increment.
+ // Note: Index =3D=3D getNumCases() means end(). =20
+ assert(Index+1 <=3D SI->getNumCases() && "Index out the number of ca=
ses.");
+ ++Index;
+ return *this;
+ }
+ Self operator++(int) {
+ Self tmp =3D *this;
+ ++(*this);
+ return tmp;
+ }
+ Self operator--() {=20
+ // Check index correctness after decrement.
+ // Note: Index =3D=3D getNumCases() means end().
+ // Also allow "-1" iterator here. That will became valid after ++.
+ assert((Index =3D=3D 0 || Index-1 <=3D SI->getNumCases()) &&
+ "Index out the number of cases.");
+ --Index;
+ return *this;
+ }
+ Self operator--(int) {
+ Self tmp =3D *this;
+ --(*this);
+ return tmp;
+ }
+ bool operator=3D=3D(const Self& RHS) const {
+ assert(RHS.SI =3D=3D SI && "Incompatible operators.");
+ return RHS.Index =3D=3D Index;
+ }
+ bool operator!=3D(const Self& RHS) const {
+ assert(RHS.SI =3D=3D SI && "Incompatible operators.");
+ return RHS.Index !=3D Index;
+ }
+ };
+ =20
+ typedef CaseIteratorT<const SwitchInst, const ConstantInt, const BasicBl=
ock>
+ ConstCaseIt;
+
+ class CaseIt : public CaseIteratorT<SwitchInst, ConstantInt, BasicBlock>=
{
+ =20
+ typedef CaseIteratorT<SwitchInst, ConstantInt, BasicBlock> ParentTy;
+ =20
+ public:
+ =20
+ CaseIt(const ParentTy& Src) : ParentTy(Src) {}
+ CaseIt(SwitchInst *SI, unsigned CaseNum) : ParentTy(SI, CaseNum) {}
+
+ /// Sets the new value for current case. =20
+ void setValue(ConstantInt *V) {
+ assert(Index < SI->getNumCases() && "Index out the number of cases."=
);
+ SI->setOperand(2 + Index*2, reinterpret_cast<Value*>(V));
+ }
+ =20
+ /// Sets the new successor for current case.
+ void setSuccessor(BasicBlock *S) {
+ SI->setSuccessor(getSuccessorIndex(), S); =20
+ }
+ };
+
static SwitchInst *Create(Value *Value, BasicBlock *Default,
unsigned NumCases, Instruction *InsertBefore =
=3D 0) {
return new SwitchInst(Value, Default, NumCases, InsertBefore);
@@ -2439,6 +2591,7 @@
unsigned NumCases, BasicBlock *InsertAtEnd) {
return new SwitchInst(Value, Default, NumCases, InsertAtEnd);
}
+ =20
~SwitchInst();
=20
/// Provide fast operand accessors
@@ -2452,61 +2605,94 @@
return cast<BasicBlock>(getOperand(1));
}
=20
- /// getNumCases - return the number of 'cases' in this switch instructio=
n.
- /// Note that case #0 is always the default case.
+ void setDefaultDest(BasicBlock *DefaultCase) {
+ setOperand(1, reinterpret_cast<Value*>(DefaultCase));
+ }
+
+ /// getNumCases - return the number of 'cases' in this switch instructio=
n,
+ /// except the default case
unsigned getNumCases() const {
- return getNumOperands()/2;
- }
-
- /// getCaseValue - Return the specified case value. Note that case #0, =
the
- /// default destination, does not have a case value.
- ConstantInt *getCaseValue(unsigned i) {
- assert(i && i < getNumCases() && "Illegal case value to get!");
- return getSuccessorValue(i);
- }
-
- /// getCaseValue - Return the specified case value. Note that case #0, =
the
- /// default destination, does not have a case value.
- const ConstantInt *getCaseValue(unsigned i) const {
- assert(i && i < getNumCases() && "Illegal case value to get!");
- return getSuccessorValue(i);
- }
-
+ return getNumOperands()/2 - 1;
+ }
+
+ /// Returns a read/write iterator that points to the first
+ /// case in SwitchInst.
+ CaseIt case_begin() {
+ return CaseIt(this, 0);
+ }
+ /// Returns a read-only iterator that points to the first
+ /// case in the SwitchInst.
+ ConstCaseIt case_begin() const {
+ return ConstCaseIt(this, 0);
+ }
+ =20
+ /// Returns a read/write iterator that points one past the last
+ /// in the SwitchInst.
+ CaseIt case_end() {
+ return CaseIt(this, getNumCases());
+ }
+ /// Returns a read-only iterator that points one past the last
+ /// in the SwitchInst.
+ ConstCaseIt case_end() const {
+ return ConstCaseIt(this, getNumCases());
+ }
+ /// Returns an iterator that points to the default case.
+ /// Note: this iterator allows to resolve successor only. Attempt
+ /// to resolve case value causes an assertion.
+ /// Also note, that increment and decrement also causes an assertion and
+ /// makes iterator invalid.=20
+ CaseIt case_default() {
+ return CaseIt(this, DefaultPseudoIndex);
+ }
+ ConstCaseIt case_default() const {
+ return ConstCaseIt(this, DefaultPseudoIndex);
+ }
+ =20
/// findCaseValue - Search all of the case values for the specified cons=
tant.
- /// If it is explicitly handled, return the case number of it, otherwise
- /// return 0 to indicate that it is handled by the default handler.
- unsigned findCaseValue(const ConstantInt *C) const {
- for (unsigned i =3D 1, e =3D getNumCases(); i !=3D e; ++i)
- if (getCaseValue(i) =3D=3D C)
+ /// If it is explicitly handled, return the case iterator of it, otherwi=
se
+ /// return default case iterator to indicate
+ /// that it is handled by the default handler.
+ CaseIt findCaseValue(const ConstantInt *C) {
+ for (CaseIt i =3D case_begin(), e =3D case_end(); i !=3D e; ++i)
+ if (i.getCaseValue() =3D=3D C)
return i;
- return 0;
- }
-
+ return case_default();
+ }
+ ConstCaseIt findCaseValue(const ConstantInt *C) const {
+ for (ConstCaseIt i =3D case_begin(), e =3D case_end(); i !=3D e; ++i)
+ if (i.getCaseValue() =3D=3D C)
+ return i;
+ return case_default();
+ } =20
+ =20
/// findCaseDest - Finds the unique case value for a given successor. Re=
turns
/// null if the successor is not found, not unique, or is the default ca=
se.
ConstantInt *findCaseDest(BasicBlock *BB) {
if (BB =3D=3D getDefaultDest()) return NULL;
=20
ConstantInt *CI =3D NULL;
- for (unsigned i =3D 1, e =3D getNumCases(); i !=3D e; ++i) {
- if (getSuccessor(i) =3D=3D BB) {
+ for (CaseIt i =3D case_begin(), e =3D case_end(); i !=3D e; ++i) {
+ if (i.getCaseSuccessor() =3D=3D BB) {
if (CI) return NULL; // Multiple cases lead to BB.
- else CI =3D getCaseValue(i);
+ else CI =3D i.getCaseValue();
}
}
return CI;
}
=20
/// addCase - Add an entry to the switch instruction...
- ///
+ /// Note:
+ /// This action invalidates case_end(). Old case_end() iterator will
+ /// point to the added case.
void addCase(ConstantInt *OnVal, BasicBlock *Dest);
=20
- /// removeCase - This method removes the specified successor from the sw=
itch
- /// instruction. Note that this cannot be used to remove the default
- /// destination (successor #0). Also note that this operation may reorde=
r the
+ /// removeCase - This method removes the specified case and its successor
+ /// from the switch instruction. Note that this operation may reorder the
/// remaining cases at index idx and above.
- ///
- void removeCase(unsigned idx);
+ /// Note:
+ /// This action invalidates iterators for all cases following the one re=
moved,
+ /// including the case_end() iterator.
+ void removeCase(CaseIt i);
=20
unsigned getNumSuccessors() const { return getNumOperands()/2; }
BasicBlock *getSuccessor(unsigned idx) const {
@@ -2518,20 +2704,6 @@
setOperand(idx*2+1, (Value*)NewSucc);
}
=20
- // getSuccessorValue - Return the value associated with the specified
- // successor.
- ConstantInt *getSuccessorValue(unsigned idx) const {
- assert(idx < getNumSuccessors() && "Successor # out of range!");
- return reinterpret_cast<ConstantInt*>(getOperand(idx*2));
- }
-
- // setSuccessorValue - Updates the value associated with the specified
- // successor.
- void setSuccessorValue(unsigned idx, ConstantInt* SuccessorValue) {
- assert(idx < getNumSuccessors() && "Successor # out of range!");
- setOperand(idx*2, reinterpret_cast<Value*>(SuccessorValue));
- }
-
// Methods for support type inquiry through isa, cast, and dyn_cast:
static inline bool classof(const SwitchInst *) { return true; }
static inline bool classof(const Instruction *I) {
@@ -2890,42 +3062,6 @@
DEFINE_TRANSPARENT_OPERAND_ACCESSORS(InvokeInst, Value)
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
-// UnwindInst Class
-//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
-
-//=3D=3D=3D---------------------------------------------------------------=
------------
-/// UnwindInst - Immediately exit the current function, unwinding the stack
-/// until an invoke instruction is found.
-///
-class UnwindInst : public TerminatorInst {
- void *operator new(size_t, unsigned); // DO NOT IMPLEMENT
-protected:
- virtual UnwindInst *clone_impl() const;
-public:
- // allocate space for exactly zero operands
- void *operator new(size_t s) {
- return User::operator new(s, 0);
- }
- explicit UnwindInst(LLVMContext &C, Instruction *InsertBefore =3D 0);
- explicit UnwindInst(LLVMContext &C, BasicBlock *InsertAtEnd);
-
- unsigned getNumSuccessors() const { return 0; }
-
- // Methods for support type inquiry through isa, cast, and dyn_cast:
- static inline bool classof(const UnwindInst *) { return true; }
- static inline bool classof(const Instruction *I) {
- return I->getOpcode() =3D=3D Instruction::Unwind;
- }
- static inline bool classof(const Value *V) {
- return isa<Instruction>(V) && classof(cast<Instruction>(V));
- }
-private:
- virtual BasicBlock *getSuccessorV(unsigned idx) const;
- virtual unsigned getNumSuccessorsV() const;
- virtual void setSuccessorV(unsigned idx, BasicBlock *B);
-};
-
-//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// ResumeInst Class
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Intrins=
icInst.h
--- a/head/contrib/llvm/include/llvm/IntrinsicInst.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/include/llvm/IntrinsicInst.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -277,34 +277,6 @@
}
};
=20
- /// EHExceptionInst - This represents the llvm.eh.exception instruction.
- ///
- class EHExceptionInst : public IntrinsicInst {
- public:
- // Methods for support type inquiry through isa, cast, and dyn_cast:
- static inline bool classof(const EHExceptionInst *) { return true; }
- static inline bool classof(const IntrinsicInst *I) {
- return I->getIntrinsicID() =3D=3D Intrinsic::eh_exception;
- }
- static inline bool classof(const Value *V) {
- return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
- }
- };
-
- /// EHSelectorInst - This represents the llvm.eh.selector instruction.
- ///
- class EHSelectorInst : public IntrinsicInst {
- public:
- // Methods for support type inquiry through isa, cast, and dyn_cast:
- static inline bool classof(const EHSelectorInst *) { return true; }
- static inline bool classof(const IntrinsicInst *I) {
- return I->getIntrinsicID() =3D=3D Intrinsic::eh_selector;
- }
- static inline bool classof(const Value *V) {
- return isa<IntrinsicInst>(V) && classof(cast<IntrinsicInst>(V));
- }
- };
-
}
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Intrins=
ics.td
--- a/head/contrib/llvm/include/llvm/Intrinsics.td Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/include/llvm/Intrinsics.td Tue Apr 17 11:51:51 2012=
+0300
@@ -284,8 +284,8 @@
let Properties =3D [IntrNoMem] in {
def int_bswap: Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>]>;
def int_ctpop: Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>]>;
- def int_ctlz : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>]>;
- def int_cttz : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>]>;
+ def int_ctlz : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>, llvm_i1_ty=
]>;
+ def int_cttz : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>, llvm_i1_ty=
]>;
}
=20
//=3D=3D=3D------------------------ Debugger Intrinsics ------------------=
-------=3D=3D=3D//
@@ -304,10 +304,6 @@
=20
//=3D=3D=3D------------------ Exception Handling Intrinsics---------------=
-------=3D=3D=3D//
//
-def int_eh_exception : Intrinsic<[llvm_ptr_ty], [], [IntrReadMem]>;
-def int_eh_selector : Intrinsic<[llvm_i32_ty],
- [llvm_ptr_ty, llvm_ptr_ty, llvm_vararg_ty=
]>;
-def int_eh_resume : Intrinsic<[], [llvm_ptr_ty, llvm_i32_ty], [Throws]>;
=20
// The result of eh.typeid.for depends on the enclosing function, but insi=
de a
// given function it is 'const' and may be CSE'd etc.
@@ -326,7 +322,6 @@
def int_eh_sjlj_callsite : Intrinsic<[], [llvm_i32_ty]>;
}
def int_eh_sjlj_functioncontext : Intrinsic<[], [llvm_ptr_ty]>;
-def int_eh_sjlj_dispatch_setup : Intrinsic<[], [llvm_i32_ty]>;
def int_eh_sjlj_setjmp : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty]>;
def int_eh_sjlj_longjmp : Intrinsic<[], [llvm_ptr_ty]>;
=20
@@ -443,6 +438,6 @@
include "llvm/IntrinsicsX86.td"
include "llvm/IntrinsicsARM.td"
include "llvm/IntrinsicsCellSPU.td"
-include "llvm/IntrinsicsAlpha.td"
include "llvm/IntrinsicsXCore.td"
include "llvm/IntrinsicsPTX.td"
+include "llvm/IntrinsicsHexagon.td"
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Intrins=
icsX86.td
--- a/head/contrib/llvm/include/llvm/IntrinsicsX86.td Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/include/llvm/IntrinsicsX86.td Tue Apr 17 11:51:51 2=
012 +0300
@@ -145,10 +145,10 @@
=20
// Comparison ops
let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
- def int_x86_sse_cmp_ss :
+ def int_x86_sse_cmp_ss : GCCBuiltin<"__builtin_ia32_cmpss">,
Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty,
llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
- def int_x86_sse_cmp_ps :
+ def int_x86_sse_cmp_ps : GCCBuiltin<"__builtin_ia32_cmpps">,
Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty,
llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">,
@@ -281,10 +281,10 @@
=20
// FP comparison ops
let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
- def int_x86_sse2_cmp_sd :
+ def int_x86_sse2_cmp_sd : GCCBuiltin<"__builtin_ia32_cmpsd">,
Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty,
llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
- def int_x86_sse2_cmp_pd :
+ def int_x86_sse2_cmp_pd : GCCBuiltin<"__builtin_ia32_cmppd">,
Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty,
llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
def int_x86_sse2_comieq_sd : GCCBuiltin<"__builtin_ia32_comisdeq">,
@@ -452,28 +452,6 @@
llvm_i32_ty], [IntrNoMem]>;
}
=20
-// Integer comparison ops
-let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
- def int_x86_sse2_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb128">,
- Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty,
- llvm_v16i8_ty], [IntrNoMem]>;
- def int_x86_sse2_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw128">,
- Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty,
- llvm_v8i16_ty], [IntrNoMem]>;
- def int_x86_sse2_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd128">,
- Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty,
- llvm_v4i32_ty], [IntrNoMem]>;
- def int_x86_sse2_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb128">,
- Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty,
- llvm_v16i8_ty], [IntrNoMem]>;
- def int_x86_sse2_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw128">,
- Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty,
- llvm_v8i16_ty], [IntrNoMem]>;
- def int_x86_sse2_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd128">,
- Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty,
- llvm_v4i32_ty], [IntrNoMem]>;
-}
-
// Conversion ops
let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse2_cvtdq2pd : GCCBuiltin<"__builtin_ia32_cvtdq2pd">,
@@ -627,8 +605,8 @@
Intrinsic<[llvm_x86mmx_ty], [llvm_x86mmx_ty,
llvm_x86mmx_ty], [IntrNoMem]>;
def int_x86_ssse3_phadd_sw_128 : GCCBuiltin<"__builtin_ia32_phaddsw12=
8">,
- Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty,
- llvm_v4i32_ty], [IntrNoMem]>;
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty,
+ llvm_v8i16_ty], [IntrNoMem]>;
=20
def int_x86_ssse3_phsub_w : GCCBuiltin<"__builtin_ia32_phsubw">,
Intrinsic<[llvm_x86mmx_ty], [llvm_x86mmx_ty,
@@ -655,8 +633,8 @@
Intrinsic<[llvm_x86mmx_ty], [llvm_x86mmx_ty,
llvm_x86mmx_ty], [IntrNoMem]>;
def int_x86_ssse3_pmadd_ub_sw_128 : GCCBuiltin<"__builtin_ia32_pmaddubsw=
128">,
- Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty,
- llvm_v8i16_ty], [IntrNoMem]>;
+ Intrinsic<[llvm_v8i16_ty], [llvm_v16i8_ty,
+ llvm_v16i8_ty], [IntrNoMem]>;
}
=20
// Packed multiply high with round and scale
@@ -792,12 +770,6 @@
=20
// Vector compare, min, max
let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
- def int_x86_sse41_pcmpeqq : GCCBuiltin<"__builtin_ia32_pcmpeqq">,
- Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
- [IntrNoMem, Commutative]>;
- def int_x86_sse42_pcmpgtq : GCCBuiltin<"__builtin_ia32_pcmpgtq">,
- Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
- [IntrNoMem]>;
def int_x86_sse41_pmaxsb : GCCBuiltin<"__builtin_ia32_pmaxsb128=
">,
Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
[IntrNoMem, Commutative]>;
@@ -919,7 +891,7 @@
// Vector sum of absolute differences
let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse41_mpsadbw : GCCBuiltin<"__builtin_ia32_mpsadbw12=
8">,
- Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty,llvm_i3=
2_ty],
+ Intrinsic<[llvm_v8i16_ty], [llvm_v16i8_ty, llvm_v16i8_ty,llvm_i3=
2_ty],
[IntrNoMem, Commutative]>;
}
=20
@@ -932,13 +904,13 @@
// Test instruction with bitwise comparison.
let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse41_ptestz : GCCBuiltin<"__builtin_ia32_ptestz128=
">,
- Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, llvm_v4f32_ty],
+ Intrinsic<[llvm_i32_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
[IntrNoMem]>;
def int_x86_sse41_ptestc : GCCBuiltin<"__builtin_ia32_ptestc128=
">,
- Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, llvm_v4f32_ty],
+ Intrinsic<[llvm_i32_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
[IntrNoMem]>;
def int_x86_sse41_ptestnzc : GCCBuiltin<"__builtin_ia32_ptestnzc1=
28">,
- Intrinsic<[llvm_i32_ty], [llvm_v4f32_ty, llvm_v4f32_ty],
+ Intrinsic<[llvm_i32_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
[IntrNoMem]>;
}
=20
@@ -1120,17 +1092,17 @@
Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
llvm_v8i32_ty, llvm_i8_ty], [IntrNoMem]>;
=20
- def int_x86_avx_vpermil_pd : GCCBuiltin<"__builtin_ia32_vpermilpd">,
+ def int_x86_avx_vpermil_pd :
Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty,
llvm_i8_ty], [IntrNoMem]>;
- def int_x86_avx_vpermil_ps : GCCBuiltin<"__builtin_ia32_vpermilps">,
+ def int_x86_avx_vpermil_ps :
Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty,
llvm_i8_ty], [IntrNoMem]>;
=20
- def int_x86_avx_vpermil_pd_256 : GCCBuiltin<"__builtin_ia32_vpermilpd256=
">,
+ def int_x86_avx_vpermil_pd_256 :
Intrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty,
llvm_i8_ty], [IntrNoMem]>;
- def int_x86_avx_vpermil_ps_256 : GCCBuiltin<"__builtin_ia32_vpermilps256=
">,
+ def int_x86_avx_vpermil_ps_256 :
Intrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty,
llvm_i8_ty], [IntrNoMem]>;
}
@@ -1281,13 +1253,13 @@
=20
// Vector load with broadcast
let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
- def int_x86_avx_vbroadcastss :
+ def int_x86_avx_vbroadcast_ss :
GCCBuiltin<"__builtin_ia32_vbroadcastss">,
Intrinsic<[llvm_v4f32_ty], [llvm_ptr_ty], [IntrReadMem]>;
def int_x86_avx_vbroadcast_sd_256 :
GCCBuiltin<"__builtin_ia32_vbroadcastsd256">,
Intrinsic<[llvm_v4f64_ty], [llvm_ptr_ty], [IntrReadMem]>;
- def int_x86_avx_vbroadcastss_256 :
+ def int_x86_avx_vbroadcast_ss_256 :
GCCBuiltin<"__builtin_ia32_vbroadcastss256">,
Intrinsic<[llvm_v8f32_ty], [llvm_ptr_ty], [IntrReadMem]>;
def int_x86_avx_vbroadcastf128_pd_256 :
@@ -1300,12 +1272,6 @@
=20
// SIMD load ops
let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
- def int_x86_avx_loadu_pd_256 : GCCBuiltin<"__builtin_ia32_loadupd256">,
- Intrinsic<[llvm_v4f64_ty], [llvm_ptr_ty], [IntrReadMem]>;
- def int_x86_avx_loadu_ps_256 : GCCBuiltin<"__builtin_ia32_loadups256">,
- Intrinsic<[llvm_v8f32_ty], [llvm_ptr_ty], [IntrReadMem]>;
- def int_x86_avx_loadu_dq_256 : GCCBuiltin<"__builtin_ia32_loaddqu256">,
- Intrinsic<[llvm_v32i8_ty], [llvm_ptr_ty], [IntrReadMem]>;
def int_x86_avx_ldu_dq_256 : GCCBuiltin<"__builtin_ia32_lddqu256">,
Intrinsic<[llvm_v32i8_ty], [llvm_ptr_ty], [IntrReadMem]>;
}
@@ -1361,6 +1327,1046 @@
}
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+// AVX2
+
+// Integer arithmetic ops.
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_padds_b : GCCBuiltin<"__builtin_ia32_paddsb256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty,
+ llvm_v32i8_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_padds_w : GCCBuiltin<"__builtin_ia32_paddsw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty,
+ llvm_v32i8_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty,
+ llvm_v32i8_ty], [IntrNoMem]>;
+ def int_x86_avx2_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem]>;
+ def int_x86_avx2_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty,
+ llvm_v32i8_ty], [IntrNoMem]>;
+ def int_x86_avx2_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem]>;
+ def int_x86_avx2_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v8i32_ty,
+ llvm_v8i32_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pmul_dq : GCCBuiltin<"__builtin_ia32_pmuldq256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v8i32_ty,
+ llvm_v8i32_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty,
+ llvm_v32i8_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v32i8_ty,
+ llvm_v32i8_ty], [IntrNoMem, Commutative]>;
+}
+
+// Vector min, max
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty,
+ llvm_v32i8_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pmaxu_w : GCCBuiltin<"__builtin_ia32_pmaxuw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pmaxu_d : GCCBuiltin<"__builtin_ia32_pmaxud256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
+ llvm_v8i32_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pmaxs_b : GCCBuiltin<"__builtin_ia32_pmaxsb256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty,
+ llvm_v32i8_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pmaxs_d : GCCBuiltin<"__builtin_ia32_pmaxsd256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
+ llvm_v8i32_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pminu_b : GCCBuiltin<"__builtin_ia32_pminub256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty,
+ llvm_v32i8_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pminu_w : GCCBuiltin<"__builtin_ia32_pminuw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pminu_d : GCCBuiltin<"__builtin_ia32_pminud256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
+ llvm_v8i32_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pmins_b : GCCBuiltin<"__builtin_ia32_pminsb256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty,
+ llvm_v32i8_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_pmins_d : GCCBuiltin<"__builtin_ia32_pminsd256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
+ llvm_v8i32_ty], [IntrNoMem, Commutative]>;
+}
+
+// Integer shift ops.
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_psll_w : GCCBuiltin<"__builtin_ia32_psllw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v8i16_ty], [IntrNoMem]>;
+ def int_x86_avx2_psll_d : GCCBuiltin<"__builtin_ia32_pslld256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
+ llvm_v4i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_psll_q : GCCBuiltin<"__builtin_ia32_psllq256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty,
+ llvm_v2i64_ty], [IntrNoMem]>;
+ def int_x86_avx2_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v8i16_ty], [IntrNoMem]>;
+ def int_x86_avx2_psrl_d : GCCBuiltin<"__builtin_ia32_psrld256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
+ llvm_v4i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty,
+ llvm_v2i64_ty], [IntrNoMem]>;
+ def int_x86_avx2_psra_w : GCCBuiltin<"__builtin_ia32_psraw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v8i16_ty], [IntrNoMem]>;
+ def int_x86_avx2_psra_d : GCCBuiltin<"__builtin_ia32_psrad256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
+ llvm_v4i32_ty], [IntrNoMem]>;
+
+ def int_x86_avx2_pslli_w : GCCBuiltin<"__builtin_ia32_psllwi256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_pslli_d : GCCBuiltin<"__builtin_ia32_pslldi256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
+ llvm_i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_pslli_q : GCCBuiltin<"__builtin_ia32_psllqi256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty,
+ llvm_i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_psrli_w : GCCBuiltin<"__builtin_ia32_psrlwi256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_psrli_d : GCCBuiltin<"__builtin_ia32_psrldi256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
+ llvm_i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_psrli_q : GCCBuiltin<"__builtin_ia32_psrlqi256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty,
+ llvm_i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_psrai_w : GCCBuiltin<"__builtin_ia32_psrawi256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_psrai_d : GCCBuiltin<"__builtin_ia32_psradi256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
+ llvm_i32_ty], [IntrNoMem]>;
+
+ def int_x86_avx2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty,
+ llvm_i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty,
+ llvm_i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_psll_dq_bs : GCCBuiltin<"__builtin_ia32_pslldqi256_byte=
shift">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty,
+ llvm_i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_psrl_dq_bs : GCCBuiltin<"__builtin_ia32_psrldqi256_byte=
shift">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty,
+ llvm_i32_ty], [IntrNoMem]>;
+}
+
+// Pack ops.
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_packsswb : GCCBuiltin<"__builtin_ia32_packsswb256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem]>;
+ def int_x86_avx2_packssdw : GCCBuiltin<"__builtin_ia32_packssdw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v8i32_ty,
+ llvm_v8i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_packuswb : GCCBuiltin<"__builtin_ia32_packuswb256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem]>;
+ def int_x86_avx2_packusdw : GCCBuiltin<"__builtin_ia32_packusdw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v8i32_ty,
+ llvm_v8i32_ty], [IntrNoMem]>;
+}
+
+// Absolute value ops
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_pabs_b : GCCBuiltin<"__builtin_ia32_pabsb256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty], [IntrNoMem]>;
+ def int_x86_avx2_pabs_w : GCCBuiltin<"__builtin_ia32_pabsw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty], [IntrNoMem]>;
+ def int_x86_avx2_pabs_d : GCCBuiltin<"__builtin_ia32_pabsd256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty], [IntrNoMem]>;
+}
+
+// Horizontal arithmetic ops
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_phadd_w : GCCBuiltin<"__builtin_ia32_phaddw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem]>;
+ def int_x86_avx2_phadd_d : GCCBuiltin<"__builtin_ia32_phaddd256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
+ llvm_v8i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_phadd_sw : GCCBuiltin<"__builtin_ia32_phaddsw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem]>;
+ def int_x86_avx2_phsub_w : GCCBuiltin<"__builtin_ia32_phsubw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem]>;
+ def int_x86_avx2_phsub_d : GCCBuiltin<"__builtin_ia32_phsubd256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
+ llvm_v8i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_phsub_sw : GCCBuiltin<"__builtin_ia32_phsubsw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem]>;
+ def int_x86_avx2_pmadd_ub_sw : GCCBuiltin<"__builtin_ia32_pmaddubsw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v32i8_ty,
+ llvm_v32i8_ty], [IntrNoMem]>;
+}
+
+// Sign ops
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_psign_b : GCCBuiltin<"__builtin_ia32_psignb256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty,
+ llvm_v32i8_ty], [IntrNoMem]>;
+ def int_x86_avx2_psign_w : GCCBuiltin<"__builtin_ia32_psignw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem]>;
+ def int_x86_avx2_psign_d : GCCBuiltin<"__builtin_ia32_psignd256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
+ llvm_v8i32_ty], [IntrNoMem]>;
+}
+
+// Packed multiply high with round and scale
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_pmul_hr_sw : GCCBuiltin<"__builtin_ia32_pmulhrsw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+ llvm_v16i16_ty], [IntrNoMem, Commutative]>;
+}
+
+// Vector sign and zero extend
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_pmovsxbd : GCCBuiltin<"__builtin_ia32_pmovsxbd256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_pmovsxbq : GCCBuiltin<"__builtin_ia32_pmovsxbq256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_pmovsxbw : GCCBuiltin<"__builtin_ia32_pmovsxbw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_pmovsxdq : GCCBuiltin<"__builtin_ia32_pmovsxdq256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_pmovsxwd : GCCBuiltin<"__builtin_ia32_pmovsxwd256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_pmovsxwq : GCCBuiltin<"__builtin_ia32_pmovsxwq256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_pmovzxbd : GCCBuiltin<"__builtin_ia32_pmovzxbd256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_pmovzxbq : GCCBuiltin<"__builtin_ia32_pmovzxbq256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_pmovzxbw : GCCBuiltin<"__builtin_ia32_pmovzxbw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_pmovzxdq : GCCBuiltin<"__builtin_ia32_pmovzxdq256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_pmovzxwd : GCCBuiltin<"__builtin_ia32_pmovzxwd256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_pmovzxwq : GCCBuiltin<"__builtin_ia32_pmovzxwq256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v8i16_ty],
+ [IntrNoMem]>;
+}
+
+// Vector blend
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_pblendvb : GCCBuiltin<"__builtin_ia32_pblendvb256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty, llvm_v32i8_ty,
+ llvm_v32i8_ty], [IntrNoMem]>;
+ def int_x86_avx2_pblendw : GCCBuiltin<"__builtin_ia32_pblendw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty, llvm_v16i16_ty,
+ llvm_i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_pblendd_128 : GCCBuiltin<"__builtin_ia32_pblendd128">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty,
+ llvm_i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_pblendd_256 : GCCBuiltin<"__builtin_ia32_pblendd256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty, llvm_v8i32_ty,
+ llvm_i32_ty], [IntrNoMem]>;
+}
+
+// Vector load with broadcast
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_vbroadcast_ss_ps :
+ GCCBuiltin<"__builtin_ia32_vbroadcastss_ps">,
+ Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], [IntrNoMem]>;
+ def int_x86_avx2_vbroadcast_sd_pd_256 :
+ GCCBuiltin<"__builtin_ia32_vbroadcastsd_pd256">,
+ Intrinsic<[llvm_v4f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
+ def int_x86_avx2_vbroadcast_ss_ps_256 :
+ GCCBuiltin<"__builtin_ia32_vbroadcastss_ps256">,
+ Intrinsic<[llvm_v8f32_ty], [llvm_v4f32_ty], [IntrNoMem]>;
+ def int_x86_avx2_vbroadcasti128 :
+ GCCBuiltin<"__builtin_ia32_vbroadcastsi256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty], [IntrReadMem]>;
+ def int_x86_avx2_pbroadcastb_128 :
+ GCCBuiltin<"__builtin_ia32_pbroadcastb128">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty], [IntrNoMem]>;
+ def int_x86_avx2_pbroadcastb_256 :
+ GCCBuiltin<"__builtin_ia32_pbroadcastb256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v16i8_ty], [IntrNoMem]>;
+ def int_x86_avx2_pbroadcastw_128 :
+ GCCBuiltin<"__builtin_ia32_pbroadcastw128">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty], [IntrNoMem]>;
+ def int_x86_avx2_pbroadcastw_256 :
+ GCCBuiltin<"__builtin_ia32_pbroadcastw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v8i16_ty], [IntrNoMem]>;
+ def int_x86_avx2_pbroadcastd_128 :
+ GCCBuiltin<"__builtin_ia32_pbroadcastd128">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_pbroadcastd_256 :
+ GCCBuiltin<"__builtin_ia32_pbroadcastd256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v4i32_ty], [IntrNoMem]>;
+ def int_x86_avx2_pbroadcastq_128 :
+ GCCBuiltin<"__builtin_ia32_pbroadcastq128">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty], [IntrNoMem]>;
+ def int_x86_avx2_pbroadcastq_256 :
+ GCCBuiltin<"__builtin_ia32_pbroadcastq256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v2i64_ty], [IntrNoMem]>;
+}
+
+// Vector permutation
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_permd : GCCBuiltin<"__builtin_ia32_permvarsi256">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty, llvm_v8i32_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_permq : GCCBuiltin<"__builtin_ia32_permdi256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_permps : GCCBuiltin<"__builtin_ia32_permvarsf256">,
+ Intrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_v8f32_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_permpd : GCCBuiltin<"__builtin_ia32_permdf256">,
+ Intrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_vperm2i128 : GCCBuiltin<"__builtin_ia32_permti256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty,
+ llvm_v4i64_ty, llvm_i8_ty], [IntrNoMem]>;
+}
+
+// Vector extract and insert
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_vextracti128 : GCCBuiltin<"__builtin_ia32_extract128i25=
6">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v4i64_ty,
+ llvm_i8_ty], [IntrNoMem]>;
+ def int_x86_avx2_vinserti128 : GCCBuiltin<"__builtin_ia32_insert128i256"=
>,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty,
+ llvm_v2i64_ty, llvm_i8_ty], [IntrNoMem]>;
+}
+
+// Conditional load ops
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_maskload_d : GCCBuiltin<"__builtin_ia32_maskloadd">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty, llvm_v4i32_ty], [IntrRead=
Mem]>;
+ def int_x86_avx2_maskload_q : GCCBuiltin<"__builtin_ia32_maskloadq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_ptr_ty, llvm_v2i64_ty], [IntrRead=
Mem]>;
+ def int_x86_avx2_maskload_d_256 : GCCBuiltin<"__builtin_ia32_maskloadd25=
6">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_ptr_ty, llvm_v8i32_ty], [IntrRead=
Mem]>;
+ def int_x86_avx2_maskload_q_256 : GCCBuiltin<"__builtin_ia32_maskloadq25=
6">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty, llvm_v4i64_ty], [IntrRead=
Mem]>;
+}
+
+// Conditional store ops
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_maskstore_d : GCCBuiltin<"__builtin_ia32_maskstored">,
+ Intrinsic<[], [llvm_ptr_ty, llvm_v4i32_ty, llvm_v4i32_ty], []>;
+ def int_x86_avx2_maskstore_q : GCCBuiltin<"__builtin_ia32_maskstoreq">,
+ Intrinsic<[], [llvm_ptr_ty, llvm_v2i64_ty, llvm_v2i64_ty], []>;
+ def int_x86_avx2_maskstore_d_256 :
+ GCCBuiltin<"__builtin_ia32_maskstored256">,
+ Intrinsic<[], [llvm_ptr_ty, llvm_v8i32_ty, llvm_v8i32_ty], []>;
+ def int_x86_avx2_maskstore_q_256 :
+ GCCBuiltin<"__builtin_ia32_maskstoreq256">,
+ Intrinsic<[], [llvm_ptr_ty, llvm_v4i64_ty, llvm_v4i64_ty], []>;
+}
+
+// Variable bit shift ops
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_psllv_d : GCCBuiltin<"__builtin_ia32_psllv4si">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_psllv_d_256 : GCCBuiltin<"__builtin_ia32_psllv8si">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty, llvm_v8i32_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_psllv_q : GCCBuiltin<"__builtin_ia32_psllv2di">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_psllv_q_256 : GCCBuiltin<"__builtin_ia32_psllv4di">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty, llvm_v4i64_ty],
+ [IntrNoMem]>;
+
+ def int_x86_avx2_psrlv_d : GCCBuiltin<"__builtin_ia32_psrlv4si">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_psrlv_d_256 : GCCBuiltin<"__builtin_ia32_psrlv8si">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty, llvm_v8i32_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_psrlv_q : GCCBuiltin<"__builtin_ia32_psrlv2di">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_psrlv_q_256 : GCCBuiltin<"__builtin_ia32_psrlv4di">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty, llvm_v4i64_ty],
+ [IntrNoMem]>;
+
+ def int_x86_avx2_psrav_d : GCCBuiltin<"__builtin_ia32_psrav4si">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_avx2_psrav_d_256 : GCCBuiltin<"__builtin_ia32_psrav8si">,
+ Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty, llvm_v8i32_ty],
+ [IntrNoMem]>;
+}
+
+// Misc.
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_avx2_pmovmskb : GCCBuiltin<"__builtin_ia32_pmovmskb256">,
+ Intrinsic<[llvm_i32_ty], [llvm_v32i8_ty], [IntrNoMem]>;
+ def int_x86_avx2_pshuf_b : GCCBuiltin<"__builtin_ia32_pshufb256">,
+ Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty,
+ llvm_v32i8_ty], [IntrNoMem]>;
+ def int_x86_avx2_mpsadbw : GCCBuiltin<"__builtin_ia32_mpsadbw256">,
+ Intrinsic<[llvm_v16i16_ty], [llvm_v32i8_ty, llvm_v32i8_ty,
+ llvm_i32_ty], [IntrNoMem, Commutative]>;
+ def int_x86_avx2_movntdqa : GCCBuiltin<"__builtin_ia32_movntdqa256">,
+ Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty], [IntrReadMem]>;
+}
+
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+// FMA4
+
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_fma4_vfmadd_ss : GCCBuiltin<"__builtin_ia32_vfmaddss">,
+ Intrinsic<[llvm_v4f32_ty],
+ [llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmadd_sd : GCCBuiltin<"__builtin_ia32_vfmaddsd">,
+ Intrinsic<[llvm_v2f64_ty],
+ [llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmadd_ps : GCCBuiltin<"__builtin_ia32_vfmaddps">,
+ Intrinsic<[llvm_v4f32_ty],
+ [llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmadd_pd : GCCBuiltin<"__builtin_ia32_vfmaddpd">,
+ Intrinsic<[llvm_v2f64_ty],
+ [llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmadd_ps_256 : GCCBuiltin<"__builtin_ia32_vfmaddps256"=
>,
+ Intrinsic<[llvm_v8f32_ty],
+ [llvm_v8f32_ty, llvm_v8f32_ty, llvm_v8f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmadd_pd_256 : GCCBuiltin<"__builtin_ia32_vfmaddpd256"=
>,
+ Intrinsic<[llvm_v4f64_ty],
+ [llvm_v4f64_ty, llvm_v4f64_ty, llvm_v4f64_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmsub_ss : GCCBuiltin<"__builtin_ia32_vfmsubss">,
+ Intrinsic<[llvm_v4f32_ty],
+ [llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmsub_sd : GCCBuiltin<"__builtin_ia32_vfmsubsd">,
+ Intrinsic<[llvm_v2f64_ty],
+ [llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmsub_ps : GCCBuiltin<"__builtin_ia32_vfmsubps">,
+ Intrinsic<[llvm_v4f32_ty],
+ [llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmsub_pd : GCCBuiltin<"__builtin_ia32_vfmsubpd">,
+ Intrinsic<[llvm_v2f64_ty],
+ [llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmsub_ps_256 : GCCBuiltin<"__builtin_ia32_vfmsubps256"=
>,
+ Intrinsic<[llvm_v8f32_ty],
+ [llvm_v8f32_ty, llvm_v8f32_ty, llvm_v8f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmsub_pd_256 : GCCBuiltin<"__builtin_ia32_vfmsubpd256"=
>,
+ Intrinsic<[llvm_v4f64_ty],
+ [llvm_v4f64_ty, llvm_v4f64_ty, llvm_v4f64_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfnmadd_ss : GCCBuiltin<"__builtin_ia32_vfnmaddss">,
+ Intrinsic<[llvm_v4f32_ty],
+ [llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfnmadd_sd : GCCBuiltin<"__builtin_ia32_vfnmaddsd">,
+ Intrinsic<[llvm_v2f64_ty],
+ [llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfnmadd_ps : GCCBuiltin<"__builtin_ia32_vfnmaddps">,
+ Intrinsic<[llvm_v4f32_ty],
+ [llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfnmadd_pd : GCCBuiltin<"__builtin_ia32_vfnmaddpd">,
+ Intrinsic<[llvm_v2f64_ty],
+ [llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfnmadd_ps_256 : GCCBuiltin<"__builtin_ia32_vfnmaddps25=
6">,
+ Intrinsic<[llvm_v8f32_ty],
+ [llvm_v8f32_ty, llvm_v8f32_ty, llvm_v8f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfnmadd_pd_256 : GCCBuiltin<"__builtin_ia32_vfnmaddpd25=
6">,
+ Intrinsic<[llvm_v4f64_ty],
+ [llvm_v4f64_ty, llvm_v4f64_ty, llvm_v4f64_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfnmsub_ss : GCCBuiltin<"__builtin_ia32_vfnmsubss">,
+ Intrinsic<[llvm_v4f32_ty],
+ [llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfnmsub_sd : GCCBuiltin<"__builtin_ia32_vfnmsubsd">,
+ Intrinsic<[llvm_v2f64_ty],
+ [llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfnmsub_ps : GCCBuiltin<"__builtin_ia32_vfnmsubps">,
+ Intrinsic<[llvm_v4f32_ty],
+ [llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfnmsub_pd : GCCBuiltin<"__builtin_ia32_vfnmsubpd">,
+ Intrinsic<[llvm_v2f64_ty],
+ [llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfnmsub_ps_256 : GCCBuiltin<"__builtin_ia32_vfnmsubps25=
6">,
+ Intrinsic<[llvm_v8f32_ty],
+ [llvm_v8f32_ty, llvm_v8f32_ty, llvm_v8f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfnmsub_pd_256 : GCCBuiltin<"__builtin_ia32_vfnmsubpd25=
6">,
+ Intrinsic<[llvm_v4f64_ty],
+ [llvm_v4f64_ty, llvm_v4f64_ty, llvm_v4f64_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmaddsub_ps : GCCBuiltin<"__builtin_ia32_vfmaddsubps">,
+ Intrinsic<[llvm_v4f32_ty],
+ [llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmaddsub_pd : GCCBuiltin<"__builtin_ia32_vfmaddsubpd">,
+ Intrinsic<[llvm_v2f64_ty],
+ [llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmaddsub_ps_256 :
+ GCCBuiltin<"__builtin_ia32_vfmaddsubps256">,
+ Intrinsic<[llvm_v8f32_ty],
+ [llvm_v8f32_ty, llvm_v8f32_ty, llvm_v8f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmaddsub_pd_256 :
+ GCCBuiltin<"__builtin_ia32_vfmaddsubpd256">,
+ Intrinsic<[llvm_v4f64_ty],
+ [llvm_v4f64_ty, llvm_v4f64_ty, llvm_v4f64_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmsubadd_ps : GCCBuiltin<"__builtin_ia32_vfmsubaddps">,
+ Intrinsic<[llvm_v4f32_ty],
+ [llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmsubadd_pd : GCCBuiltin<"__builtin_ia32_vfmsubaddpd">,
+ Intrinsic<[llvm_v2f64_ty],
+ [llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmsubadd_ps_256 :
+ GCCBuiltin<"__builtin_ia32_vfmsubaddps256">,
+ Intrinsic<[llvm_v8f32_ty],
+ [llvm_v8f32_ty, llvm_v8f32_ty, llvm_v8f32_ty],
+ [IntrNoMem]>;
+ def int_x86_fma4_vfmsubadd_pd_256 :
+ GCCBuiltin<"__builtin_ia32_vfmsubaddpd256">,
+ Intrinsic<[llvm_v4f64_ty],
+ [llvm_v4f64_ty, llvm_v4f64_ty, llvm_v4f64_ty],
+ [IntrNoMem]>;
+}
+
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+// XOP
+
+ def int_x86_xop_vpermil2pd : GCCBuiltin<"__builtin_ia32_vpermil2pd">,
+ Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty,
+ llvm_v2f64_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+
+ def int_x86_xop_vpermil2pd_256 :
+ GCCBuiltin<"__builtin_ia32_vpermil2pd256">,
+ Intrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_v4f64_ty,
+ llvm_v4f64_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+
+ def int_x86_xop_vpermil2ps : GCCBuiltin<"__builtin_ia32_vpermil2ps">,
+ Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty,
+ llvm_v4f32_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpermil2ps_256 :
+ GCCBuiltin<"__builtin_ia32_vpermil2ps256">,
+ Intrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_v8f32_ty,
+ llvm_v8f32_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+
+ def int_x86_xop_vfrcz_pd :
+ GCCBuiltin<"__builtin_ia32_vfrczpd">,
+ Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
+ def int_x86_xop_vfrcz_ps :
+ GCCBuiltin<"__builtin_ia32_vfrczps">,
+ Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty], [IntrNoMem]>;
+ def int_x86_xop_vfrcz_sd :
+ GCCBuiltin<"__builtin_ia32_vfrczsd">,
+ Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vfrcz_ss :
+ GCCBuiltin<"__builtin_ia32_vfrczss">,
+ Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vfrcz_pd_256 :
+ GCCBuiltin<"__builtin_ia32_vfrczpd256">,
+ Intrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty], [IntrNoMem]>;
+ def int_x86_xop_vfrcz_ps_256 :
+ GCCBuiltin<"__builtin_ia32_vfrczps256">,
+ Intrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty], [IntrNoMem]>;
+ def int_x86_xop_vpcmov :
+ GCCBuiltin<"__builtin_ia32_vpcmov">,
+ Intrinsic<[llvm_v2i64_ty],
+ [llvm_v2i64_ty, llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcmov_256 :
+ GCCBuiltin<"__builtin_ia32_vpcmov_256">,
+ Intrinsic<[llvm_v4i64_ty],
+ [llvm_v4i64_ty, llvm_v4i64_ty, llvm_v4i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomeqb :
+ GCCBuiltin<"__builtin_ia32_vpcomeqb">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomeqw :
+ GCCBuiltin<"__builtin_ia32_vpcomeqw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomeqd :
+ GCCBuiltin<"__builtin_ia32_vpcomeqd">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomeqq :
+ GCCBuiltin<"__builtin_ia32_vpcomeqq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomequb :
+ GCCBuiltin<"__builtin_ia32_vpcomequb">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomequd :
+ GCCBuiltin<"__builtin_ia32_vpcomequd">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomequq :
+ GCCBuiltin<"__builtin_ia32_vpcomequq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomequw :
+ GCCBuiltin<"__builtin_ia32_vpcomequw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomfalseb :
+ GCCBuiltin<"__builtin_ia32_vpcomfalseb">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomfalsed :
+ GCCBuiltin<"__builtin_ia32_vpcomfalsed">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomfalseq :
+ GCCBuiltin<"__builtin_ia32_vpcomfalseq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomfalseub :
+ GCCBuiltin<"__builtin_ia32_vpcomfalseub">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomfalseud :
+ GCCBuiltin<"__builtin_ia32_vpcomfalseud">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomfalseuq :
+ GCCBuiltin<"__builtin_ia32_vpcomfalseuq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomfalseuw :
+ GCCBuiltin<"__builtin_ia32_vpcomfalseuw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomfalsew :
+ GCCBuiltin<"__builtin_ia32_vpcomfalsew">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomgeb :
+ GCCBuiltin<"__builtin_ia32_vpcomgeb">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomged :
+ GCCBuiltin<"__builtin_ia32_vpcomged">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomgeq :
+ GCCBuiltin<"__builtin_ia32_vpcomgeq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomgeub :
+ GCCBuiltin<"__builtin_ia32_vpcomgeub">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomgeud :
+ GCCBuiltin<"__builtin_ia32_vpcomgeud">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomgeuq :
+ GCCBuiltin<"__builtin_ia32_vpcomgeuq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomgeuw :
+ GCCBuiltin<"__builtin_ia32_vpcomgeuw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomgew :
+ GCCBuiltin<"__builtin_ia32_vpcomgew">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomgtb :
+ GCCBuiltin<"__builtin_ia32_vpcomgtb">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomgtd :
+ GCCBuiltin<"__builtin_ia32_vpcomgtd">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomgtq :
+ GCCBuiltin<"__builtin_ia32_vpcomgtq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomgtub :
+ GCCBuiltin<"__builtin_ia32_vpcomgtub">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomgtud :
+ GCCBuiltin<"__builtin_ia32_vpcomgtud">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomgtuq :
+ GCCBuiltin<"__builtin_ia32_vpcomgtuq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomgtuw :
+ GCCBuiltin<"__builtin_ia32_vpcomgtuw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomgtw :
+ GCCBuiltin<"__builtin_ia32_vpcomgtw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomleb :
+ GCCBuiltin<"__builtin_ia32_vpcomleb">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomled :
+ GCCBuiltin<"__builtin_ia32_vpcomled">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomleq :
+ GCCBuiltin<"__builtin_ia32_vpcomleq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomleub :
+ GCCBuiltin<"__builtin_ia32_vpcomleub">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomleud :
+ GCCBuiltin<"__builtin_ia32_vpcomleud">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomleuq :
+ GCCBuiltin<"__builtin_ia32_vpcomleuq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomleuw :
+ GCCBuiltin<"__builtin_ia32_vpcomleuw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomlew :
+ GCCBuiltin<"__builtin_ia32_vpcomlew">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomltb :
+ GCCBuiltin<"__builtin_ia32_vpcomltb">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomltd :
+ GCCBuiltin<"__builtin_ia32_vpcomltd">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomltq :
+ GCCBuiltin<"__builtin_ia32_vpcomltq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomltub :
+ GCCBuiltin<"__builtin_ia32_vpcomltub">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomltud :
+ GCCBuiltin<"__builtin_ia32_vpcomltud">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomltuq :
+ GCCBuiltin<"__builtin_ia32_vpcomltuq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomltuw :
+ GCCBuiltin<"__builtin_ia32_vpcomltuw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomltw :
+ GCCBuiltin<"__builtin_ia32_vpcomltw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomneb :
+ GCCBuiltin<"__builtin_ia32_vpcomneb">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomned :
+ GCCBuiltin<"__builtin_ia32_vpcomned">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomneq :
+ GCCBuiltin<"__builtin_ia32_vpcomneq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomneub :
+ GCCBuiltin<"__builtin_ia32_vpcomneub">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomneud :
+ GCCBuiltin<"__builtin_ia32_vpcomneud">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomneuq :
+ GCCBuiltin<"__builtin_ia32_vpcomneuq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomneuw :
+ GCCBuiltin<"__builtin_ia32_vpcomneuw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomnew :
+ GCCBuiltin<"__builtin_ia32_vpcomnew">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomtrueb :
+ GCCBuiltin<"__builtin_ia32_vpcomtrueb">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomtrued :
+ GCCBuiltin<"__builtin_ia32_vpcomtrued">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomtrueq :
+ GCCBuiltin<"__builtin_ia32_vpcomtrueq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomtrueub :
+ GCCBuiltin<"__builtin_ia32_vpcomtrueub">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomtrueud :
+ GCCBuiltin<"__builtin_ia32_vpcomtrueud">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomtrueuq :
+ GCCBuiltin<"__builtin_ia32_vpcomtrueuq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomtrueuw :
+ GCCBuiltin<"__builtin_ia32_vpcomtrueuw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpcomtruew :
+ GCCBuiltin<"__builtin_ia32_vpcomtruew">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vphaddbd :
+ GCCBuiltin<"__builtin_ia32_vphaddbd">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v16i8_ty], [IntrNoMem]>;
+ def int_x86_xop_vphaddbq :
+ GCCBuiltin<"__builtin_ia32_vphaddbq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v16i8_ty], [IntrNoMem]>;
+ def int_x86_xop_vphaddbw :
+ GCCBuiltin<"__builtin_ia32_vphaddbw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v16i8_ty], [IntrNoMem]>;
+ def int_x86_xop_vphadddq :
+ GCCBuiltin<"__builtin_ia32_vphadddq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem]>;
+ def int_x86_xop_vphaddubd :
+ GCCBuiltin<"__builtin_ia32_vphaddubd">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v16i8_ty], [IntrNoMem]>;
+ def int_x86_xop_vphaddubq :
+ GCCBuiltin<"__builtin_ia32_vphaddubq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v16i8_ty], [IntrNoMem]>;
+ def int_x86_xop_vphaddubw :
+ GCCBuiltin<"__builtin_ia32_vphaddubw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v16i8_ty], [IntrNoMem]>;
+ def int_x86_xop_vphaddudq :
+ GCCBuiltin<"__builtin_ia32_vphaddudq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem]>;
+ def int_x86_xop_vphadduwd :
+ GCCBuiltin<"__builtin_ia32_vphadduwd">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty], [IntrNoMem]>;
+ def int_x86_xop_vphadduwq :
+ GCCBuiltin<"__builtin_ia32_vphadduwq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v8i16_ty], [IntrNoMem]>;
+ def int_x86_xop_vphaddwd :
+ GCCBuiltin<"__builtin_ia32_vphaddwd">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty], [IntrNoMem]>;
+ def int_x86_xop_vphaddwq :
+ GCCBuiltin<"__builtin_ia32_vphaddwq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v8i16_ty], [IntrNoMem]>;
+ def int_x86_xop_vphsubbw :
+ GCCBuiltin<"__builtin_ia32_vphsubbw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v16i8_ty], [IntrNoMem]>;
+ def int_x86_xop_vphsubdq :
+ GCCBuiltin<"__builtin_ia32_vphsubdq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v4i32_ty], [IntrNoMem]>;
+ def int_x86_xop_vphsubwd :
+ GCCBuiltin<"__builtin_ia32_vphsubwd">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty], [IntrNoMem]>;
+ def int_x86_xop_vpmacsdd :
+ GCCBuiltin<"__builtin_ia32_vpmacsdd">,
+ Intrinsic<[llvm_v4i32_ty],
+ [llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpmacsdqh :
+ GCCBuiltin<"__builtin_ia32_vpmacsdqh">,
+ Intrinsic<[llvm_v2i64_ty],
+ [llvm_v4i32_ty, llvm_v4i32_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpmacsdql :
+ GCCBuiltin<"__builtin_ia32_vpmacsdql">,
+ Intrinsic<[llvm_v2i64_ty],
+ [llvm_v4i32_ty, llvm_v4i32_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpmacssdd :
+ GCCBuiltin<"__builtin_ia32_vpmacssdd">,
+ Intrinsic<[llvm_v4i32_ty],
+ [llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpmacssdqh :
+ GCCBuiltin<"__builtin_ia32_vpmacssdqh">,
+ Intrinsic<[llvm_v2i64_ty],
+ [llvm_v4i32_ty, llvm_v4i32_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpmacssdql :
+ GCCBuiltin<"__builtin_ia32_vpmacssdql">,
+ Intrinsic<[llvm_v2i64_ty],
+ [llvm_v4i32_ty, llvm_v4i32_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpmacsswd :
+ GCCBuiltin<"__builtin_ia32_vpmacsswd">,
+ Intrinsic<[llvm_v4i32_ty],
+ [llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpmacssww :
+ GCCBuiltin<"__builtin_ia32_vpmacssww">,
+ Intrinsic<[llvm_v8i16_ty],
+ [llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpmacswd :
+ GCCBuiltin<"__builtin_ia32_vpmacswd">,
+ Intrinsic<[llvm_v4i32_ty],
+ [llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpmacsww :
+ GCCBuiltin<"__builtin_ia32_vpmacsww">,
+ Intrinsic<[llvm_v8i16_ty],
+ [llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpmadcsswd :
+ GCCBuiltin<"__builtin_ia32_vpmadcsswd">,
+ Intrinsic<[llvm_v4i32_ty],
+ [llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpmadcswd :
+ GCCBuiltin<"__builtin_ia32_vpmadcswd">,
+ Intrinsic<[llvm_v4i32_ty],
+ [llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpperm :
+ GCCBuiltin<"__builtin_ia32_vpperm">,
+ Intrinsic<[llvm_v16i8_ty],
+ [llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vprotb :
+ GCCBuiltin<"__builtin_ia32_vprotb">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vprotd :
+ GCCBuiltin<"__builtin_ia32_vprotd">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vprotq :
+ GCCBuiltin<"__builtin_ia32_vprotq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vprotw :
+ GCCBuiltin<"__builtin_ia32_vprotw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpshab :
+ GCCBuiltin<"__builtin_ia32_vpshab">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpshad :
+ GCCBuiltin<"__builtin_ia32_vpshad">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpshaq :
+ GCCBuiltin<"__builtin_ia32_vpshaq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpshaw :
+ GCCBuiltin<"__builtin_ia32_vpshaw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpshlb :
+ GCCBuiltin<"__builtin_ia32_vpshlb">,
+ Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpshld :
+ GCCBuiltin<"__builtin_ia32_vpshld">,
+ Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpshlq :
+ GCCBuiltin<"__builtin_ia32_vpshlq">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_xop_vpshlw :
+ GCCBuiltin<"__builtin_ia32_vpshlw">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty],
+ [IntrNoMem]>;
+
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// MMX
=20
// Empty MMX state op.
@@ -1587,13 +2593,13 @@
let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_mmx_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb">,
Intrinsic<[llvm_x86mmx_ty], [llvm_x86mmx_ty,
- llvm_x86mmx_ty], [IntrNoMem]>;
+ llvm_x86mmx_ty], [IntrNoMem, Commutative]>;
def int_x86_mmx_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw">,
Intrinsic<[llvm_x86mmx_ty], [llvm_x86mmx_ty,
- llvm_x86mmx_ty], [IntrNoMem]>;
+ llvm_x86mmx_ty], [IntrNoMem, Commutative]>;
def int_x86_mmx_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd">,
Intrinsic<[llvm_x86mmx_ty], [llvm_x86mmx_ty,
- llvm_x86mmx_ty], [IntrNoMem]>;
+ llvm_x86mmx_ty], [IntrNoMem, Commutative]>;
=20
def int_x86_mmx_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb">,
Intrinsic<[llvm_x86mmx_ty], [llvm_x86mmx_ty,
@@ -1629,3 +2635,63 @@
Intrinsic<[llvm_x86mmx_ty], [llvm_x86mmx_ty,
llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
}
+
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+// BMI
+
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_bmi_bextr_32 : GCCBuiltin<"__builtin_ia32_bextr_u32">,
+ Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNo=
Mem]>;
+ def int_x86_bmi_bextr_64 : GCCBuiltin<"__builtin_ia32_bextr_u64">,
+ Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], [IntrNo=
Mem]>;
+ def int_x86_bmi_bzhi_32 : GCCBuiltin<"__builtin_ia32_bzhi_si">,
+ Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNo=
Mem]>;
+ def int_x86_bmi_bzhi_64 : GCCBuiltin<"__builtin_ia32_bzhi_di">,
+ Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], [IntrNo=
Mem]>;
+ def int_x86_bmi_pdep_32 : GCCBuiltin<"__builtin_ia32_pdep_si">,
+ Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNo=
Mem]>;
+ def int_x86_bmi_pdep_64 : GCCBuiltin<"__builtin_ia32_pdep_di">,
+ Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], [IntrNo=
Mem]>;
+ def int_x86_bmi_pext_32 : GCCBuiltin<"__builtin_ia32_pext_si">,
+ Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNo=
Mem]>;
+ def int_x86_bmi_pext_64 : GCCBuiltin<"__builtin_ia32_pext_di">,
+ Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], [IntrNo=
Mem]>;
+}
+
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+// FS/GS Base
+
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_rdfsbase_32 : GCCBuiltin<"__builtin_ia32_rdfsbase32">,
+ Intrinsic<[llvm_i32_ty], []>;
+ def int_x86_rdgsbase_32 : GCCBuiltin<"__builtin_ia32_rdgsbase32">,
+ Intrinsic<[llvm_i32_ty], []>;
+ def int_x86_rdfsbase_64 : GCCBuiltin<"__builtin_ia32_rdfsbase64">,
+ Intrinsic<[llvm_i64_ty], []>;
+ def int_x86_rdgsbase_64 : GCCBuiltin<"__builtin_ia32_rdgsbase64">,
+ Intrinsic<[llvm_i64_ty], []>;
+ def int_x86_wrfsbase_32 : GCCBuiltin<"__builtin_ia32_wrfsbase32">,
+ Intrinsic<[], [llvm_i32_ty]>;
+ def int_x86_wrgsbase_32 : GCCBuiltin<"__builtin_ia32_wrgsbase32">,
+ Intrinsic<[], [llvm_i32_ty]>;
+ def int_x86_wrfsbase_64 : GCCBuiltin<"__builtin_ia32_wrfsbase64">,
+ Intrinsic<[], [llvm_i64_ty]>;
+ def int_x86_wrgsbase_64 : GCCBuiltin<"__builtin_ia32_wrgsbase64">,
+ Intrinsic<[], [llvm_i64_ty]>;
+}
+
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+// Half float conversion
+
+let TargetPrefix =3D "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_vcvtph2ps_128 : GCCBuiltin<"__builtin_ia32_vcvtph2ps">,
+ Intrinsic<[llvm_v4f32_ty], [llvm_v8i16_ty], [IntrNoMem]>;
+ def int_x86_vcvtph2ps_256 : GCCBuiltin<"__builtin_ia32_vcvtph2ps256">,
+ Intrinsic<[llvm_v8f32_ty], [llvm_v8i16_ty], [IntrNoMem]>;
+ def int_x86_vcvtps2ph_128 : GCCBuiltin<"__builtin_ia32_vcvtps2ph">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v4f32_ty, llvm_i32_ty],
+ [IntrNoMem]>;
+ def int_x86_vcvtps2ph_256 : GCCBuiltin<"__builtin_ia32_vcvtps2ph256">,
+ Intrinsic<[llvm_v8i16_ty], [llvm_v8f32_ty, llvm_i32_ty],
+ [IntrNoMem]>;
+}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/LLVMCon=
text.h
--- a/head/contrib/llvm/include/llvm/LLVMContext.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/include/llvm/LLVMContext.h Tue Apr 17 11:51:51 2012=
+0300
@@ -19,6 +19,7 @@
=20
class LLVMContextImpl;
class StringRef;
+class Twine;
class Instruction;
class Module;
class SMDiagnostic;
@@ -40,7 +41,9 @@
enum {
MD_dbg =3D 0, // "dbg"
MD_tbaa =3D 1, // "tbaa"
- MD_prof =3D 2 // "prof"
+ MD_prof =3D 2, // "prof"
+ MD_fpaccuracy =3D 3, // "fpaccuracy"
+ MD_range =3D 4 // "range"
};
=20
/// getMDKindID - Return a unique non-zero ID for the specified metadata=
kind.
@@ -79,9 +82,9 @@
/// be prepared to drop the erroneous construct on the floor and "not cr=
ash".
/// The generated code need not be correct. The error message will be
/// implicitly prefixed with "error: " and should not end with a ".".
- void emitError(unsigned LocCookie, StringRef ErrorStr);
- void emitError(const Instruction *I, StringRef ErrorStr);
- void emitError(StringRef ErrorStr);
+ void emitError(unsigned LocCookie, const Twine &ErrorStr);
+ void emitError(const Instruction *I, const Twine &ErrorStr);
+ void emitError(const Twine &ErrorStr);
=20
private:
// DO NOT IMPLEMENT
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/LinkAll=
Passes.h
--- a/head/contrib/llvm/include/llvm/LinkAllPasses.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/include/llvm/LinkAllPasses.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -31,6 +31,7 @@
#include "llvm/Transforms/Instrumentation.h"
#include "llvm/Transforms/IPO.h"
#include "llvm/Transforms/Scalar.h"
+#include "llvm/Transforms/Vectorize.h"
#include "llvm/Transforms/Utils/UnifyFunctionExitNodes.h"
#include <cstdlib>
=20
@@ -69,7 +70,7 @@
(void) llvm::createEdgeProfilerPass();
(void) llvm::createOptimalEdgeProfilerPass();
(void) llvm::createPathProfilerPass();
- (void) llvm::createGCOVProfilerPass(true, true, false);
+ (void) llvm::createGCOVProfilerPass();
(void) llvm::createFunctionInliningPass();
(void) llvm::createAlwaysInlinerPass();
(void) llvm::createGlobalDCEPass();
@@ -97,6 +98,7 @@
(void) llvm::createNoAAPass();
(void) llvm::createNoProfileInfoPass();
(void) llvm::createObjCARCAliasAnalysisPass();
+ (void) llvm::createObjCARCAPElimPass();
(void) llvm::createObjCARCExpandPass();
(void) llvm::createObjCARCContractPass();
(void) llvm::createObjCARCOptPass();
@@ -150,6 +152,7 @@
(void) llvm::createCorrelatedValuePropagationPass();
(void) llvm::createMemDepPrinter();
(void) llvm::createInstructionSimplifierPass();
+ (void) llvm::createBBVectorizePass();
=20
(void)new llvm::IntervalPartition();
(void)new llvm::FindUsedTypes();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Linker.h
--- a/head/contrib/llvm/include/llvm/Linker.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Linker.h Tue Apr 17 11:51:51 2012 +0300
@@ -15,14 +15,15 @@
#define LLVM_LINKER_H
=20
#include <memory>
+#include <string>
#include <vector>
-#include "llvm/ADT/StringRef.h"
=20
namespace llvm {
namespace sys { class Path; }
=20
class Module;
class LLVMContext;
+class StringRef;
=20
/// This class provides the core functionality of linking in LLVM. It reta=
ins a
/// Module object which is the composite of the modules and libraries link=
ed
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCAs=
mBackend.h
--- a/head/contrib/llvm/include/llvm/MC/MCAsmBackend.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCAsmBackend.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -12,17 +12,20 @@
=20
#include "llvm/MC/MCDirectives.h"
#include "llvm/MC/MCFixup.h"
-#include "llvm/MC/MCFixupKindInfo.h"
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ErrorHandling.h"
=20
namespace llvm {
+class MCAsmLayout;
+class MCAssembler;
class MCELFObjectTargetWriter;
-class MCFixup;
+struct MCFixupKindInfo;
+class MCFragment;
class MCInst;
+class MCInstFragment;
class MCObjectWriter;
class MCSection;
-template<typename T>
-class SmallVectorImpl;
+class MCValue;
class raw_ostream;
=20
/// MCAsmBackend - Generic interface to target specific assembler backends.
@@ -44,8 +47,8 @@
/// createELFObjectTargetWriter - Create a new ELFObjectTargetWriter to =
enable
/// non-standard ELFObjectWriters.
virtual MCELFObjectTargetWriter *createELFObjectTargetWriter() const {
- assert(0 && "createELFObjectTargetWriter is not supported by asm backe=
nd");
- return 0;
+ llvm_unreachable("createELFObjectTargetWriter is not supported by asm "
+ "backend");
}
=20
/// hasReliableSymbolDifference - Check whether this target implements
@@ -85,12 +88,21 @@
/// getFixupKindInfo - Get information on a fixup kind.
virtual const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const;
=20
+ /// processFixupValue - Target hook to adjust the literal value of a fix=
up
+ /// if necessary. IsResolved signals whether the caller believes a reloc=
ation
+ /// is needed; the target can modify the value. The default does nothing.
+ virtual void processFixupValue(const MCAssembler &Asm,
+ const MCAsmLayout &Layout,
+ const MCFixup &Fixup, const MCFragment *D=
F,
+ MCValue &Target, uint64_t &Value,
+ bool &IsResolved) {}
+
/// @}
=20
- /// ApplyFixup - Apply the \arg Value for given \arg Fixup into the prov=
ided
+ /// applyFixup - Apply the \arg Value for given \arg Fixup into the prov=
ided
/// data fragment, at the offset specified by the fixup and following the
/// fixup kind as appropriate.
- virtual void ApplyFixup(const MCFixup &Fixup, char *Data, unsigned DataS=
ize,
+ virtual void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataS=
ize,
uint64_t Value) const =3D 0;
=20
/// @}
@@ -98,11 +110,18 @@
/// @name Target Relaxation Interfaces
/// @{
=20
- /// MayNeedRelaxation - Check whether the given instruction may need
+ /// mayNeedRelaxation - Check whether the given instruction may need
/// relaxation.
///
/// \param Inst - The instruction to test.
- virtual bool MayNeedRelaxation(const MCInst &Inst) const =3D 0;
+ virtual bool mayNeedRelaxation(const MCInst &Inst) const =3D 0;
+
+ /// fixupNeedsRelaxation - Target specific predicate for whether a given
+ /// fixup requires the associated instruction to be relaxed.
+ virtual bool fixupNeedsRelaxation(const MCFixup &Fixup,
+ uint64_t Value,
+ const MCInstFragment *DF,
+ const MCAsmLayout &Layout) const =3D 0;
=20
/// RelaxInstruction - Relax the instruction in the given fragment to th=
e next
/// wider instruction.
@@ -110,20 +129,20 @@
/// \param Inst - The instruction to relax, which may be the same as the
/// output.
/// \parm Res [output] - On return, the relaxed instruction.
- virtual void RelaxInstruction(const MCInst &Inst, MCInst &Res) const =3D=
0;
+ virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const =3D=
0;
=20
/// @}
=20
- /// WriteNopData - Write an (optimal) nop sequence of Count bytes to the=
given
+ /// writeNopData - Write an (optimal) nop sequence of Count bytes to the=
given
/// output. If the target cannot generate such a sequence, it should ret=
urn an
/// error.
///
/// \return - True on success.
- virtual bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const =3D =
0;
+ virtual bool writeNopData(uint64_t Count, MCObjectWriter *OW) const =3D =
0;
=20
- /// HandleAssemblerFlag - Handle any target-specific assembler flags.
+ /// handleAssemblerFlag - Handle any target-specific assembler flags.
/// By default, do nothing.
- virtual void HandleAssemblerFlag(MCAssemblerFlag Flag) {}
+ virtual void handleAssemblerFlag(MCAssemblerFlag Flag) {}
};
=20
} // End llvm namespace
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCAs=
mInfo.h
--- a/head/contrib/llvm/include/llvm/MC/MCAsmInfo.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCAsmInfo.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -36,10 +36,6 @@
enum LCOMMType { None, NoAlignment, ByteAlignment };
}
=20
- namespace Structors {
- enum OutputOrder { None, PriorityOrder, ReversePriorityOrder };
- }
-
/// MCAsmInfo - This class is intended to be used as a base class for asm
/// properties and features specific to the target.
class MCAsmInfo {
@@ -47,7 +43,7 @@
//=3D=3D=3D-----------------------------------------------------------=
-------=3D=3D=3D//
// Properties to be set by the target writer, used to configure asm pr=
inter.
//
- =20
+
/// PointerSize - Pointer size in bytes.
/// Default is 4.
unsigned PointerSize;
@@ -72,11 +68,6 @@
/// the macho-specific .tbss directive for emitting thread local BSS S=
ymbols
bool HasMachoTBSSDirective; // Default is false.
=20
- /// StructorOutputOrder - Whether the static ctor/dtor list should be =
output
- /// in no particular order, in order of increasing priority or the rev=
erse:
- /// in order of decreasing priority (the default).
- Structors::OutputOrder StructorOutputOrder; // Default is reverse orde=
r.
-
/// HasStaticCtorDtorReferenceInStaticMode - True if the compiler shou=
ld
/// emit a ".reference .constructors_used" or ".reference .destructors=
_used"
/// directive after the a static ctor/dtor list. This directive is on=
ly
@@ -152,6 +143,10 @@
/// symbol names. This defaults to true.
bool AllowPeriodsInName;
=20
+ /// AllowUTF8 - This is true if the assembler accepts UTF-8 input.
+ // FIXME: Make this a more general encoding setting?
+ bool AllowUTF8;
+
//=3D=3D=3D--- Data Emission Directives ------------------------------=
-------=3D=3D=3D//
=20
/// ZeroDirective - this should be set to the directive used to get so=
me
@@ -189,6 +184,11 @@
const char *JT32Begin; // Defaults to "$a."
bool SupportsDataRegions;
=20
+ /// GPRel64Directive - if non-null, a directive that is used to emit a=
word
+ /// which should be relocated as a 64-bit GP-relative offset, e.g. .gp=
dword
+ /// on Mips.
+ const char *GPRel64Directive; // Defaults to NULL.
+
/// GPRel32Directive - if non-null, a directive that is used to emit a=
word
/// which should be relocated as a 32-bit GP-relative offset, e.g. .gp=
word
/// on Mips or .gprel32 on Alpha.
@@ -323,13 +323,17 @@
const char* DwarfSectionOffsetDirective; // Defaults to NULL
=20
/// DwarfRequiresRelocationForSectionOffset - True if we need to produ=
ce a
- // relocation when we want a section offset in dwarf.
+ /// relocation when we want a section offset in dwarf.
bool DwarfRequiresRelocationForSectionOffset; // Defaults to true;
=20
- // DwarfUsesLabelOffsetDifference - True if Dwarf2 output can
- // use EmitLabelOffsetDifference.
+ /// DwarfUsesLabelOffsetDifference - True if Dwarf2 output can
+ /// use EmitLabelOffsetDifference.
bool DwarfUsesLabelOffsetForRanges;
=20
+ /// DwarfUsesRelocationsForStringPool - True if this Dwarf output must=
use
+ /// relocations to refer to entries in the string pool.
+ bool DwarfUsesRelocationsForStringPool;
+
/// DwarfRegNumForCFI - True if dwarf register numbers are printed
/// instead of symbolic register names in .cfi_* directives.
bool DwarfRegNumForCFI; // Defaults to false;
@@ -381,6 +385,7 @@
const char *getData64bitsDirective(unsigned AS =3D 0) const {
return AS =3D=3D 0 ? Data64bitsDirective : getDataASDirective(64, AS=
);
}
+ const char *getGPRel64Directive() const { return GPRel64Directive; }
const char *getGPRel32Directive() const { return GPRel32Directive; }
=20
/// [Code|Data]Begin label name accessors.
@@ -424,9 +429,6 @@
//
bool hasMachoZeroFillDirective() const { return HasMachoZeroFillDirect=
ive; }
bool hasMachoTBSSDirective() const { return HasMachoTBSSDirective; }
- Structors::OutputOrder getStructorOutputOrder() const {
- return StructorOutputOrder;
- }
bool hasStaticCtorDtorReferenceInStaticMode() const {
return HasStaticCtorDtorReferenceInStaticMode;
}
@@ -487,6 +489,9 @@
bool doesAllowPeriodsInName() const {
return AllowPeriodsInName;
}
+ bool doesAllowUTF8() const {
+ return AllowUTF8;
+ }
const char *getZeroDirective() const {
return ZeroDirective;
}
@@ -554,7 +559,7 @@
ExceptionsType =3D=3D ExceptionHandling::ARM ||
ExceptionsType =3D=3D ExceptionHandling::Win64);
}
- bool doesDwarfUsesInlineInfoSection() const {
+ bool doesDwarfUseInlineInfoSection() const {
return DwarfUsesInlineInfoSection;
}
const char *getDwarfSectionOffsetDirective() const {
@@ -563,9 +568,12 @@
bool doesDwarfRequireRelocationForSectionOffset() const {
return DwarfRequiresRelocationForSectionOffset;
}
- bool doesDwarfUsesLabelOffsetForRanges() const {
+ bool doesDwarfUseLabelOffsetForRanges() const {
return DwarfUsesLabelOffsetForRanges;
}
+ bool doesDwarfUseRelocationsForStringPool() const {
+ return DwarfUsesRelocationsForStringPool;
+ }
bool useDwarfRegNumForCFI() const {
return DwarfRegNumForCFI;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCAs=
mInfoCOFF.h
--- a/head/contrib/llvm/include/llvm/MC/MCAsmInfoCOFF.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCAsmInfoCOFF.h Tue Apr 17 11:51:51=
2012 +0300
@@ -14,9 +14,21 @@
=20
namespace llvm {
class MCAsmInfoCOFF : public MCAsmInfo {
+ virtual void anchor();
protected:
explicit MCAsmInfoCOFF();
- =20
+ };
+
+ class MCAsmInfoMicrosoft : public MCAsmInfoCOFF {
+ virtual void anchor();
+ protected:
+ explicit MCAsmInfoMicrosoft();
+ };
+
+ class MCAsmInfoGNUCOFF : public MCAsmInfoCOFF {
+ virtual void anchor();
+ protected:
+ explicit MCAsmInfoGNUCOFF();
};
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCAs=
mInfoDarwin.h
--- a/head/contrib/llvm/include/llvm/MC/MCAsmInfoDarwin.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCAsmInfoDarwin.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -18,7 +18,9 @@
#include "llvm/MC/MCAsmInfo.h"
=20
namespace llvm {
- struct MCAsmInfoDarwin : public MCAsmInfo {
+ class MCAsmInfoDarwin : public MCAsmInfo {
+ virtual void anchor();
+ public:
explicit MCAsmInfoDarwin();
};
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCAs=
mLayout.h
--- a/head/contrib/llvm/include/llvm/MC/MCAsmLayout.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCAsmLayout.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -10,6 +10,7 @@
#ifndef LLVM_MC_MCASMLAYOUT_H
#define LLVM_MC_MCASMLAYOUT_H
=20
+#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
=20
namespace llvm {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCAs=
sembler.h
--- a/head/contrib/llvm/include/llvm/MC/MCAssembler.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCAssembler.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -25,7 +25,6 @@
class raw_ostream;
class MCAsmLayout;
class MCAssembler;
-class MCBinaryExpr;
class MCContext;
class MCCodeEmitter;
class MCExpr;
@@ -106,6 +105,7 @@
};
=20
class MCDataFragment : public MCFragment {
+ virtual void anchor();
SmallString<32> Contents;
=20
/// Fixups - The list of fixups in this fragment.
@@ -160,6 +160,8 @@
// object with just the MCInst and a code size, then we should just change
// MCDataFragment to have an optional MCInst at its end.
class MCInstFragment : public MCFragment {
+ virtual void anchor();
+
/// Inst - The instruction this is a fragment for.
MCInst Inst;
=20
@@ -215,6 +217,8 @@
};
=20
class MCAlignFragment : public MCFragment {
+ virtual void anchor();
+
/// Alignment - The alignment to ensure, in bytes.
unsigned Alignment;
=20
@@ -263,6 +267,8 @@
};
=20
class MCFillFragment : public MCFragment {
+ virtual void anchor();
+
/// Value - Value to use for filling bytes.
int64_t Value;
=20
@@ -300,6 +306,8 @@
};
=20
class MCOrgFragment : public MCFragment {
+ virtual void anchor();
+
/// Offset - The offset this fragment should start at.
const MCExpr *Offset;
=20
@@ -327,6 +335,8 @@
};
=20
class MCLEBFragment : public MCFragment {
+ virtual void anchor();
+
/// Value - The value this fragment should contain.
const MCExpr *Value;
=20
@@ -358,6 +368,8 @@
};
=20
class MCDwarfLineAddrFragment : public MCFragment {
+ virtual void anchor();
+
/// LineDelta - the value of the difference between the two line numbers
/// between two .loc dwarf directives.
int64_t LineDelta;
@@ -393,6 +405,8 @@
};
=20
class MCDwarfCallFrameFragment : public MCFragment {
+ virtual void anchor();
+
/// AddrDelta - The expression for the difference of the two symbols that
/// make up the address delta between two .cfi_* dwarf directives.
const MCExpr *AddrDelta;
@@ -711,43 +725,44 @@
/// \return Whether the fixup value was fully resolved. This is true if =
the
/// \arg Value result is fixed, otherwise the value may change due to
/// relocation.
- bool EvaluateFixup(const MCAsmLayout &Layout,
+ bool evaluateFixup(const MCAsmLayout &Layout,
const MCFixup &Fixup, const MCFragment *DF,
MCValue &Target, uint64_t &Value) const;
=20
/// Check whether a fixup can be satisfied, or whether it needs to be re=
laxed
/// (increased in size, in order to hold its value correctly).
- bool FixupNeedsRelaxation(const MCFixup &Fixup, const MCFragment *DF,
+ bool fixupNeedsRelaxation(const MCFixup &Fixup, const MCInstFragment *DF,
const MCAsmLayout &Layout) const;
=20
/// Check whether the given fragment needs relaxation.
- bool FragmentNeedsRelaxation(const MCInstFragment *IF,
+ bool fragmentNeedsRelaxation(const MCInstFragment *IF,
const MCAsmLayout &Layout) const;
=20
- /// LayoutOnce - Perform one layout iteration and return true if any off=
sets
+ /// layoutOnce - Perform one layout iteration and return true if any off=
sets
/// were adjusted.
- bool LayoutOnce(MCAsmLayout &Layout);
+ bool layoutOnce(MCAsmLayout &Layout);
=20
- bool LayoutSectionOnce(MCAsmLayout &Layout, MCSectionData &SD);
+ bool layoutSectionOnce(MCAsmLayout &Layout, MCSectionData &SD);
=20
- bool RelaxInstruction(MCAsmLayout &Layout, MCInstFragment &IF);
+ bool relaxInstruction(MCAsmLayout &Layout, MCInstFragment &IF);
=20
- bool RelaxLEB(MCAsmLayout &Layout, MCLEBFragment &IF);
+ bool relaxLEB(MCAsmLayout &Layout, MCLEBFragment &IF);
=20
- bool RelaxDwarfLineAddr(MCAsmLayout &Layout, MCDwarfLineAddrFragment &DF=
);
- bool RelaxDwarfCallFrameFragment(MCAsmLayout &Layout,
+ bool relaxDwarfLineAddr(MCAsmLayout &Layout, MCDwarfLineAddrFragment &DF=
);
+ bool relaxDwarfCallFrameFragment(MCAsmLayout &Layout,
MCDwarfCallFrameFragment &DF);
=20
- /// FinishLayout - Finalize a layout, including fragment lowering.
- void FinishLayout(MCAsmLayout &Layout);
+ /// finishLayout - Finalize a layout, including fragment lowering.
+ void finishLayout(MCAsmLayout &Layout);
=20
- uint64_t HandleFixup(const MCAsmLayout &Layout,
+ uint64_t handleFixup(const MCAsmLayout &Layout,
MCFragment &F, const MCFixup &Fixup);
=20
public:
/// Compute the effective fragment size assuming it is laid out at the g=
iven
/// \arg SectionAddress and \arg FragmentOffset.
- uint64_t ComputeFragmentSize(const MCAsmLayout &Layout, const MCFragment=
&F) const;
+ uint64_t computeFragmentSize(const MCAsmLayout &Layout,
+ const MCFragment &F) const;
=20
/// Find the symbol which defines the atom containing the given symbol, =
or
/// null if there is no such symbol.
@@ -760,7 +775,7 @@
bool isSymbolLinkerVisible(const MCSymbol &SD) const;
=20
/// Emit the section contents using the given object writer.
- void WriteSectionData(const MCSectionData *Section,
+ void writeSectionData(const MCSectionData *Section,
const MCAsmLayout &Layout) const;
=20
/// Check whether a given symbol has been flagged with .thumb_func.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCCo=
deEmitter.h
--- a/head/contrib/llvm/include/llvm/MC/MCCodeEmitter.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCCodeEmitter.h Tue Apr 17 11:51:51=
2012 +0300
@@ -10,12 +10,8 @@
#ifndef LLVM_MC_MCCODEEMITTER_H
#define LLVM_MC_MCCODEEMITTER_H
=20
-#include "llvm/MC/MCFixup.h"
-
-#include <cassert>
-
namespace llvm {
-class MCExpr;
+class MCFixup;
class MCInst;
class raw_ostream;
template<typename T> class SmallVectorImpl;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCCo=
deGenInfo.h
--- a/head/contrib/llvm/include/llvm/MC/MCCodeGenInfo.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCCodeGenInfo.h Tue Apr 17 11:51:51=
2012 +0300
@@ -20,7 +20,7 @@
namespace llvm {
=20
class MCCodeGenInfo {
- /// RelocationModel - Relocation model: statcic, pic, etc.
+ /// RelocationModel - Relocation model: static, pic, etc.
///
Reloc::Model RelocationModel;
=20
@@ -28,13 +28,20 @@
///
CodeModel::Model CMModel;
=20
+ /// OptLevel - Optimization level.
+ ///
+ CodeGenOpt::Level OptLevel;
+
public:
void InitMCCodeGenInfo(Reloc::Model RM =3D Reloc::Default,
- CodeModel::Model CM =3D CodeModel::Default);
+ CodeModel::Model CM =3D CodeModel::Default,
+ CodeGenOpt::Level OL =3D CodeGenOpt::Default);
=20
Reloc::Model getRelocationModel() const { return RelocationModel; }
=20
CodeModel::Model getCodeModel() const { return CMModel; }
+
+ CodeGenOpt::Level getOptLevel() const { return OptLevel; }
};
} // namespace llvm
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCCo=
ntext.h
--- a/head/contrib/llvm/include/llvm/MC/MCContext.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCContext.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -15,6 +15,7 @@
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/Support/Allocator.h"
+#include "llvm/Support/Compiler.h"
#include "llvm/Support/raw_ostream.h"
#include <vector> // FIXME: Shouldn't be needed.
=20
@@ -29,6 +30,7 @@
class MCObjectFileInfo;
class MCRegisterInfo;
class MCLineSection;
+ class SMLoc;
class StringRef;
class Twine;
class MCSectionMachO;
@@ -43,6 +45,8 @@
public:
typedef StringMap<MCSymbol*, BumpPtrAllocator&> SymbolTable;
private:
+ /// The SourceMgr for this object, if any.
+ const SourceMgr *SrcMgr;
=20
/// The MCAsmInfo for this target.
const MCAsmInfo &MAI;
@@ -98,6 +102,27 @@
MCDwarfLoc CurrentDwarfLoc;
bool DwarfLocSeen;
=20
+ /// Generate dwarf debugging info for assembly source files.
+ bool GenDwarfForAssembly;
+
+ /// The current dwarf file number when generate dwarf debugging info f=
or
+ /// assembly source files.
+ unsigned GenDwarfFileNumber;
+
+ /// The default initial text section that we generate dwarf debugging =
line
+ /// info for when generating dwarf assembly source files.
+ const MCSection *GenDwarfSection;
+ /// Symbols created for the start and end of this section.
+ MCSymbol *GenDwarfSectionStartSym, *GenDwarfSectionEndSym;
+
+ /// The information gathered from labels that will have dwarf label
+ /// entries when generating dwarf assembly source files.
+ std::vector<const MCGenDwarfLabelEntry *> MCGenDwarfLabelEntries;
+
+ /// The string to embed in the debug information for the compile unit,=
if
+ /// non-empty.
+ StringRef DwarfDebugFlags;
+
/// Honor temporary labels, this is useful for debugging semantic
/// differences between temporary and non-temporary labels (primarily =
on
/// Darwin).
@@ -116,9 +141,11 @@
=20
public:
explicit MCContext(const MCAsmInfo &MAI, const MCRegisterInfo &MRI,
- const MCObjectFileInfo *MOFI);
+ const MCObjectFileInfo *MOFI, const SourceMgr *Mgr =
=3D 0);
~MCContext();
=20
+ const SourceMgr *getSourceManager() const { return SrcMgr; }
+
const MCAsmInfo &getAsmInfo() const { return MAI; }
=20
const MCRegisterInfo &getRegisterInfo() const { return MRI; }
@@ -204,7 +231,8 @@
/// @{
=20
/// GetDwarfFile - creates an entry in the dwarf file and directory ta=
bles.
- unsigned GetDwarfFile(StringRef FileName, unsigned FileNumber);
+ unsigned GetDwarfFile(StringRef Directory, StringRef FileName,
+ unsigned FileNumber);
=20
bool isValidDwarfFileNumber(unsigned FileNumber);
=20
@@ -251,6 +279,31 @@
bool getDwarfLocSeen() { return DwarfLocSeen; }
const MCDwarfLoc &getCurrentDwarfLoc() { return CurrentDwarfLoc; }
=20
+ bool getGenDwarfForAssembly() { return GenDwarfForAssembly; }
+ void setGenDwarfForAssembly(bool Value) { GenDwarfForAssembly =3D Valu=
e; }
+ unsigned getGenDwarfFileNumber() { return GenDwarfFileNumber; }
+ unsigned nextGenDwarfFileNumber() { return ++GenDwarfFileNumber; }
+ const MCSection *getGenDwarfSection() { return GenDwarfSection; }
+ void setGenDwarfSection(const MCSection *Sec) { GenDwarfSection =3D Se=
c; }
+ MCSymbol *getGenDwarfSectionStartSym() { return GenDwarfSectionStartSy=
m; }
+ void setGenDwarfSectionStartSym(MCSymbol *Sym) {
+ GenDwarfSectionStartSym =3D Sym;
+ }
+ MCSymbol *getGenDwarfSectionEndSym() { return GenDwarfSectionEndSym; }
+ void setGenDwarfSectionEndSym(MCSymbol *Sym) {
+ GenDwarfSectionEndSym =3D Sym;
+ }
+ const std::vector<const MCGenDwarfLabelEntry *>
+ &getMCGenDwarfLabelEntries() const {
+ return MCGenDwarfLabelEntries;
+ }
+ void addMCGenDwarfLabelEntry(const MCGenDwarfLabelEntry *E) {
+ MCGenDwarfLabelEntries.push_back(E);
+ }
+
+ void setDwarfDebugFlags(StringRef S) { DwarfDebugFlags =3D S; }
+ StringRef getDwarfDebugFlags() { return DwarfDebugFlags; }
+
/// @}
=20
char *getSecureLogFile() { return SecureLogFile; }
@@ -268,6 +321,11 @@
}
void Deallocate(void *Ptr) {
}
+
+ // Unrecoverable error has occured. Display the best diagnostic we can
+ // and bail via exit(1). For now, most MC backend errors are unrecover=
able.
+ // FIXME: We should really do something about that.
+ LLVM_ATTRIBUTE_NORETURN void FatalError(SMLoc L, const Twine &Msg);
};
=20
} // end namespace llvm
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCDi=
sassembler.h
--- a/head/contrib/llvm/include/llvm/MC/MCDisassembler.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCDisassembler.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -90,7 +90,7 @@
/// @return - An array of instruction information, with one entr=
y for
/// each MCInst opcode this disassembler returns.
/// NULL if there is no info for this target.
- virtual EDInstInfo *getEDInfo() const { return (EDInstInfo*)0; }
+ virtual const EDInstInfo *getEDInfo() const { return (EDInstInfo*)0; }
=20
private:
//
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCDw=
arf.h
--- a/head/contrib/llvm/include/llvm/MC/MCDwarf.h Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/llvm/include/llvm/MC/MCDwarf.h Tue Apr 17 11:51:51 2012 =
+0300
@@ -17,20 +17,18 @@
=20
#include "llvm/ADT/StringRef.h"
#include "llvm/MC/MachineLocation.h"
-#include "llvm/MC/MCObjectWriter.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Support/Dwarf.h"
#include <vector>
=20
namespace llvm {
class MCContext;
- class MCExpr;
+ class MCObjectWriter;
class MCSection;
- class MCSectionData;
class MCStreamer;
class MCSymbol;
- class MCObjectStreamer;
- class raw_ostream;
+ class SourceMgr;
+ class SMLoc;
=20
/// MCDwarfFile - Instances of this class represent the name of the dwarf
/// .file directive and its associated dwarf file number in the MC file,
@@ -210,7 +208,7 @@
//
// This emits the Dwarf file and the line tables.
//
- static void Emit(MCStreamer *MCOS);
+ static const MCSymbol *Emit(MCStreamer *MCOS);
};
=20
class MCDwarfLineAddr {
@@ -227,23 +225,63 @@
int64_t LineDelta, uint64_t AddrDelta);
};
=20
+ class MCGenDwarfInfo {
+ public:
+ //
+ // When generating dwarf for assembly source files this emits the Dwarf
+ // sections.
+ //
+ static void Emit(MCStreamer *MCOS, const MCSymbol *LineSectionSymbol);
+ };
+
+ // When generating dwarf for assembly source files this is the info that=
is
+ // needed to be gathered for each symbol that will have a dwarf label.
+ class MCGenDwarfLabelEntry {
+ private:
+ // Name of the symbol without a leading underbar, if any.
+ StringRef Name;
+ // The dwarf file number this symbol is in.
+ unsigned FileNumber;
+ // The line number this symbol is at.
+ unsigned LineNumber;
+ // The low_pc for the dwarf label is taken from this symbol.
+ MCSymbol *Label;
+
+ public:
+ MCGenDwarfLabelEntry(StringRef name, unsigned fileNumber,
+ unsigned lineNumber, MCSymbol *label) :
+ Name(name), FileNumber(fileNumber), LineNumber(lineNumber), Label(la=
bel){}
+
+ StringRef getName() const { return Name; }
+ unsigned getFileNumber() const { return FileNumber; }
+ unsigned getLineNumber() const { return LineNumber; }
+ MCSymbol *getLabel() const { return Label; }
+
+ // This is called when label is created when we are generating dwarf f=
or
+ // assembly source files.
+ static void Make(MCSymbol *Symbol, MCStreamer *MCOS, SourceMgr &SrcMgr,
+ SMLoc &Loc);
+ };
+
class MCCFIInstruction {
public:
- enum OpType { SameValue, Remember, Restore, Move, RelMove };
+ enum OpType { SameValue, RememberState, RestoreState, Move, RelMove, E=
scape,
+ Restore};
private:
OpType Operation;
MCSymbol *Label;
// Move to & from location.
MachineLocation Destination;
MachineLocation Source;
+ std::vector<char> Values;
public:
MCCFIInstruction(OpType Op, MCSymbol *L)
: Operation(Op), Label(L) {
- assert(Op =3D=3D Remember || Op =3D=3D Restore);
+ assert(Op =3D=3D RememberState || Op =3D=3D RestoreState);
}
MCCFIInstruction(OpType Op, MCSymbol *L, unsigned Register)
: Operation(Op), Label(L), Destination(Register) {
- assert(Op =3D=3D SameValue);
+ assert(Op =3D=3D SameValue || Op =3D=3D Restore);
}
MCCFIInstruction(MCSymbol *L, const MachineLocation &D,
const MachineLocation &S)
@@ -254,16 +292,24 @@
: Operation(Op), Label(L), Destination(D), Source(S) {
assert(Op =3D=3D RelMove);
}
+ MCCFIInstruction(OpType Op, MCSymbol *L, StringRef Vals)
+ : Operation(Op), Label(L), Values(Vals.begin(), Vals.end()) {
+ assert(Op =3D=3D Escape);
+ }
OpType getOperation() const { return Operation; }
MCSymbol *getLabel() const { return Label; }
const MachineLocation &getDestination() const { return Destination; }
const MachineLocation &getSource() const { return Source; }
+ const StringRef getValues() const {
+ return StringRef(&Values[0], Values.size());
+ }
};
=20
struct MCDwarfFrameInfo {
MCDwarfFrameInfo() : Begin(0), End(0), Personality(0), Lsda(0),
Function(0), Instructions(), PersonalityEncoding(=
),
- LsdaEncoding(0), CompactUnwindEncoding(0) {}
+ LsdaEncoding(0), CompactUnwindEncoding(0),
+ IsSignalFrame(false) {}
MCSymbol *Begin;
MCSymbol *End;
const MCSymbol *Personality;
@@ -273,6 +319,7 @@
unsigned PersonalityEncoding;
unsigned LsdaEncoding;
uint32_t CompactUnwindEncoding;
+ bool IsSignalFrame;
};
=20
class MCDwarfFrameEmitter {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCEL=
FObjectWriter.h
--- a/head/contrib/llvm/include/llvm/MC/MCELFObjectWriter.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCELFObjectWriter.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -10,28 +10,91 @@
#ifndef LLVM_MC_MCELFOBJECTWRITER_H
#define LLVM_MC_MCELFOBJECTWRITER_H
=20
-#include "llvm/MC/MCObjectWriter.h"
+#include "llvm/ADT/Triple.h"
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ELF.h"
+#include <vector>
=20
namespace llvm {
+class MCAssembler;
+class MCFixup;
+class MCFragment;
+class MCObjectWriter;
+class MCSymbol;
+class MCValue;
+
+/// @name Relocation Data
+/// @{
+
+struct ELFRelocationEntry {
+ // Make these big enough for both 32-bit and 64-bit
+ uint64_t r_offset;
+ int Index;
+ unsigned Type;
+ const MCSymbol *Symbol;
+ uint64_t r_addend;
+ const MCFixup *Fixup;
+
+ ELFRelocationEntry()
+ : r_offset(0), Index(0), Type(0), Symbol(0), r_addend(0), Fixup(0) {}
+
+ ELFRelocationEntry(uint64_t RelocOffset, int Idx, unsigned RelType,
+ const MCSymbol *Sym, uint64_t Addend, const MCFixup &=
Fixup)
+ : r_offset(RelocOffset), Index(Idx), Type(RelType), Symbol(Sym),
+ r_addend(Addend), Fixup(&Fixup) {}
+
+ // Support lexicographic sorting.
+ bool operator<(const ELFRelocationEntry &RE) const {
+ return RE.r_offset < r_offset;
+ }
+};
+
class MCELFObjectTargetWriter {
- const Triple::OSType OSType;
+ const uint8_t OSABI;
const uint16_t EMachine;
const unsigned HasRelocationAddend : 1;
const unsigned Is64Bit : 1;
+
protected:
- MCELFObjectTargetWriter(bool Is64Bit_, Triple::OSType OSType_,
+
+ MCELFObjectTargetWriter(bool Is64Bit_, uint8_t OSABI_,
uint16_t EMachine_, bool HasRelocationAddend_);
=20
public:
- virtual ~MCELFObjectTargetWriter();
+ static uint8_t getOSABI(Triple::OSType OSType) {
+ switch (OSType) {
+ case Triple::FreeBSD:
+ return ELF::ELFOSABI_FREEBSD;
+ case Triple::Linux:
+ return ELF::ELFOSABI_LINUX;
+ default:
+ return ELF::ELFOSABI_NONE;
+ }
+ }
+
+ virtual ~MCELFObjectTargetWriter() {}
+
+ virtual unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixu=
p,
+ bool IsPCRel, bool IsRelocWithSymbol,
+ int64_t Addend) const =3D 0;
+ virtual unsigned getEFlags() const;
+ virtual const MCSymbol *ExplicitRelSym(const MCAssembler &Asm,
+ const MCValue &Target,
+ const MCFragment &F,
+ const MCFixup &Fixup,
+ bool IsPCRel) const;
+ virtual void adjustFixupOffset(const MCFixup &Fixup,
+ uint64_t &RelocOffset);
+
+ virtual void sortRelocs(const MCAssembler &Asm,
+ std::vector<ELFRelocationEntry> &Relocs);
=20
/// @name Accessors
/// @{
- Triple::OSType getOSType() { return OSType; }
+ uint8_t getOSABI() { return OSABI; }
uint16_t getEMachine() { return EMachine; }
bool hasRelocationAddend() { return HasRelocationAddend; }
- bool is64Bit() { return Is64Bit; }
+ bool is64Bit() const { return Is64Bit; }
/// @}
};
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCEx=
pr.h
--- a/head/contrib/llvm/include/llvm/MC/MCExpr.h Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/llvm/include/llvm/MC/MCExpr.h Tue Apr 17 11:51:51 2012 +=
0300
@@ -15,7 +15,6 @@
#include "llvm/Support/DataTypes.h"
=20
namespace llvm {
-class MCAsmInfo;
class MCAsmLayout;
class MCAssembler;
class MCContext;
@@ -162,6 +161,7 @@
VK_TPOFF,
VK_DTPOFF,
VK_TLVP, // Mach-O thread local variable relocation
+ VK_SECREL,
// FIXME: We'd really like to use the generic Kinds listed above for t=
hese.
VK_ARM_PLT, // ARM-style PLT references. i.e., (PLT) instead of @PLT
VK_ARM_TLSGD, // ditto for TLSGD, GOT, GOTOFF, TPOFF and GOTTPOFF
@@ -169,12 +169,32 @@
VK_ARM_GOTOFF,
VK_ARM_TPOFF,
VK_ARM_GOTTPOFF,
+ VK_ARM_TARGET1,
=20
VK_PPC_TOC,
VK_PPC_DARWIN_HA16, // ha16(symbol)
VK_PPC_DARWIN_LO16, // lo16(symbol)
VK_PPC_GAS_HA16, // symbol at ha
- VK_PPC_GAS_LO16 // symbol at l
+ VK_PPC_GAS_LO16, // symbol at l
+
+ VK_Mips_GPREL,
+ VK_Mips_GOT_CALL,
+ VK_Mips_GOT16,
+ VK_Mips_GOT,
+ VK_Mips_ABS_HI,
+ VK_Mips_ABS_LO,
+ VK_Mips_TLSGD,
+ VK_Mips_TLSLDM,
+ VK_Mips_DTPREL_HI,
+ VK_Mips_DTPREL_LO,
+ VK_Mips_GOTTPREL,
+ VK_Mips_TPREL_HI,
+ VK_Mips_TPREL_LO,
+ VK_Mips_GPOFF_HI,
+ VK_Mips_GPOFF_LO,
+ VK_Mips_GOT_DISP,
+ VK_Mips_GOT_PAGE,
+ VK_Mips_GOT_OFST=20
};
=20
private:
@@ -185,7 +205,9 @@
const VariantKind Kind;
=20
explicit MCSymbolRefExpr(const MCSymbol *_Symbol, VariantKind _Kind)
- : MCExpr(MCExpr::SymbolRef), Symbol(_Symbol), Kind(_Kind) {}
+ : MCExpr(MCExpr::SymbolRef), Symbol(_Symbol), Kind(_Kind) {
+ assert(Symbol);
+ }
=20
public:
/// @name Construction
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCFi=
xup.h
--- a/head/contrib/llvm/include/llvm/MC/MCFixup.h Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/llvm/include/llvm/MC/MCFixup.h Tue Apr 17 11:51:51 2012 =
+0300
@@ -11,6 +11,8 @@
#define LLVM_MC_MCFIXUP_H
=20
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/SMLoc.h"
#include <cassert>
=20
namespace llvm {
@@ -26,6 +28,14 @@
FK_PCRel_2, ///< A two-byte pc relative fixup.
FK_PCRel_4, ///< A four-byte pc relative fixup.
FK_PCRel_8, ///< A eight-byte pc relative fixup.
+ FK_GPRel_1, ///< A one-byte gp relative fixup.
+ FK_GPRel_2, ///< A two-byte gp relative fixup.
+ FK_GPRel_4, ///< A four-byte gp relative fixup.
+ FK_GPRel_8, ///< A eight-byte gp relative fixup.
+ FK_SecRel_1, ///< A one-byte section relative fixup.
+ FK_SecRel_2, ///< A two-byte section relative fixup.
+ FK_SecRel_4, ///< A four-byte section relative fixup.
+ FK_SecRel_8, ///< A eight-byte section relative fixup.
=20
FirstTargetFixupKind =3D 128,
=20
@@ -61,14 +71,17 @@
/// determine how the operand value should be encoded into the instructi=
on.
unsigned Kind;
=20
+ /// The source location which gave rise to the fixup, if any.
+ SMLoc Loc;
public:
static MCFixup Create(uint32_t Offset, const MCExpr *Value,
- MCFixupKind Kind) {
+ MCFixupKind Kind, SMLoc Loc =3D SMLoc()) {
assert(unsigned(Kind) < MaxTargetFixupKind && "Kind out of range!");
MCFixup FI;
FI.Value =3D Value;
FI.Offset =3D Offset;
FI.Kind =3D unsigned(Kind);
+ FI.Loc =3D Loc;
return FI;
}
=20
@@ -83,13 +96,15 @@
/// size. It is an error to pass an unsupported size.
static MCFixupKind getKindForSize(unsigned Size, bool isPCRel) {
switch (Size) {
- default: assert(0 && "Invalid generic fixup size!");
+ default: llvm_unreachable("Invalid generic fixup size!");
case 1: return isPCRel ? FK_PCRel_1 : FK_Data_1;
case 2: return isPCRel ? FK_PCRel_2 : FK_Data_2;
case 4: return isPCRel ? FK_PCRel_4 : FK_Data_4;
case 8: return isPCRel ? FK_PCRel_8 : FK_Data_8;
}
}
+
+ SMLoc getLoc() const { return Loc; }
};
=20
} // End llvm namespace
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCIn=
st.h
--- a/head/contrib/llvm/include/llvm/MC/MCInst.h Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/llvm/include/llvm/MC/MCInst.h Tue Apr 17 11:51:51 2012 +=
0300
@@ -19,12 +19,14 @@
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/SMLoc.h"
=20
namespace llvm {
class raw_ostream;
class MCAsmInfo;
class MCInstPrinter;
class MCExpr;
+class MCInst;
=20
/// MCOperand - Instances of this class represent operands of the MCInst c=
lass.
/// This is a simple discriminated union.
@@ -34,7 +36,8 @@
kRegister, ///< Register operand.
kImmediate, ///< Immediate operand.
kFPImmediate, ///< Floating-point immediate operand.
- kExpr ///< Relocatable immediate operand.
+ kExpr, ///< Relocatable immediate operand.
+ kInst ///< Sub-instruction operand.
};
unsigned char Kind;
=20
@@ -43,6 +46,7 @@
int64_t ImmVal;
double FPImmVal;
const MCExpr *ExprVal;
+ const MCInst *InstVal;
};
public:
=20
@@ -53,6 +57,7 @@
bool isImm() const { return Kind =3D=3D kImmediate; }
bool isFPImm() const { return Kind =3D=3D kFPImmediate; }
bool isExpr() const { return Kind =3D=3D kExpr; }
+ bool isInst() const { return Kind =3D=3D kInst; }
=20
/// getReg - Returns the register number.
unsigned getReg() const {
@@ -94,6 +99,15 @@
ExprVal =3D Val;
}
=20
+ const MCInst *getInst() const {
+ assert(isInst() && "This is not a sub-instruction");
+ return InstVal;
+ }
+ void setInst(const MCInst *Val) {
+ assert(isInst() && "This is not a sub-instruction");
+ InstVal =3D Val;
+ }
+
static MCOperand CreateReg(unsigned Reg) {
MCOperand Op;
Op.Kind =3D kRegister;
@@ -118,23 +132,33 @@
Op.ExprVal =3D Val;
return Op;
}
+ static MCOperand CreateInst(const MCInst *Val) {
+ MCOperand Op;
+ Op.Kind =3D kInst;
+ Op.InstVal =3D Val;
+ return Op;
+ }
=20
void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
void dump() const;
};
=20
+template <> struct isPodLike<MCOperand> { static const bool value =3D true=
; };
=20
/// MCInst - Instances of this class represent a single low-level machine
/// instruction.
class MCInst {
unsigned Opcode;
+ SMLoc Loc;
SmallVector<MCOperand, 8> Operands;
public:
MCInst() : Opcode(0) {}
=20
void setOpcode(unsigned Op) { Opcode =3D Op; }
+ unsigned getOpcode() const { return Opcode; }
=20
- unsigned getOpcode() const { return Opcode; }
+ void setLoc(SMLoc loc) { Loc =3D loc; }
+ SMLoc getLoc() const { return Loc; }
=20
const MCOperand &getOperand(unsigned i) const { return Operands[i]; }
MCOperand &getOperand(unsigned i) { return Operands[i]; }
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCIn=
stPrinter.h
--- a/head/contrib/llvm/include/llvm/MC/MCInstPrinter.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCInstPrinter.h Tue Apr 17 11:51:51=
2012 +0300
@@ -14,6 +14,8 @@
class MCInst;
class raw_ostream;
class MCAsmInfo;
+class MCInstrInfo;
+class MCRegisterInfo;
class StringRef;
=20
/// MCInstPrinter - This is an instance of a target assembly language prin=
ter
@@ -25,6 +27,8 @@
/// assembly emission is disable.
raw_ostream *CommentStream;
const MCAsmInfo &MAI;
+ const MCInstrInfo &MII;
+ const MCRegisterInfo &MRI;
=20
/// The current set of available features.
unsigned AvailableFeatures;
@@ -32,8 +36,9 @@
/// Utility function for printing annotations.
void printAnnotation(raw_ostream &OS, StringRef Annot);
public:
- MCInstPrinter(const MCAsmInfo &mai)
- : CommentStream(0), MAI(mai), AvailableFeatures(0) {}
+ MCInstPrinter(const MCAsmInfo &mai, const MCInstrInfo &mii,
+ const MCRegisterInfo &mri)
+ : CommentStream(0), MAI(mai), MII(mii), MRI(mri), AvailableFeatures(0)=
{}
=20
virtual ~MCInstPrinter();
=20
@@ -47,7 +52,7 @@
=20
/// getOpcodeName - Return the name of the specified opcode enum (e.g.
/// "MOV32ri") or empty if we can't resolve it.
- virtual StringRef getOpcodeName(unsigned Opcode) const;
+ StringRef getOpcodeName(unsigned Opcode) const;
=20
/// printRegName - Print the assembler register name.
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCIn=
strAnalysis.h
--- a/head/contrib/llvm/include/llvm/MC/MCInstrAnalysis.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCInstrAnalysis.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -33,7 +33,7 @@
}
=20
virtual bool isConditionalBranch(const MCInst &Inst) const {
- return Info->get(Inst.getOpcode()).isBranch();
+ return Info->get(Inst.getOpcode()).isConditionalBranch();
}
=20
virtual bool isUnconditionalBranch(const MCInst &Inst) const {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCIn=
strDesc.h
--- a/head/contrib/llvm/include/llvm/MC/MCInstrDesc.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCInstrDesc.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -58,17 +58,17 @@
/// if the operand is a register. If isLookupPtrRegClass is set, then t=
his is
/// an index that is passed to TargetRegisterInfo::getPointerRegClass(x)=
to
/// get a dynamic register class.
- short RegClass;
+ int16_t RegClass;
=20
/// Flags - These are flags from the MCOI::OperandFlags enum.
- unsigned short Flags;
+ uint8_t Flags;
+
+ /// OperandType - Information about the type of the operand.
+ uint8_t OperandType;
=20
/// Lower 16 bits are used to specify which constraints are set. The hig=
her 16
/// bits are used to specify the value of constraints (4 bits each).
- unsigned Constraints;
-
- /// OperandType - Information about the type of the operand.
- MCOI::OperandType OperandType;
+ uint32_t Constraints;
/// Currently no other information.
=20
/// isLookupPtrRegClass - Set if this operand is a pointer value and it
@@ -137,11 +137,10 @@
unsigned short NumDefs; // Num of args that are definitions
unsigned short SchedClass; // enum identifying instr sched class
unsigned short Size; // Number of bytes in encoding.
- const char * Name; // Name of the instruction record in td f=
ile
unsigned Flags; // Flags identifying machine instr class
uint64_t TSFlags; // Target Specific Flag values
- const unsigned *ImplicitUses; // Registers implicitly read by this instr
- const unsigned *ImplicitDefs; // Registers implicitly defined by this i=
nstr
+ const uint16_t *ImplicitUses; // Registers implicitly read by this instr
+ const uint16_t *ImplicitDefs; // Registers implicitly defined by this i=
nstr
const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands
=20
/// getOperandConstraint - Returns the value of the specific constraint =
if
@@ -161,12 +160,6 @@
return Opcode;
}
=20
- /// getName - Return the name of the record in the .td file for this
- /// instruction, for example "ADD8ri".
- const char *getName() const {
- return Name;
- }
-
/// getNumOperands - Return the number of declared MachineOperands for t=
his
/// MachineInstruction. Note that variadic (isVariadic() returns true)
/// instructions may have additional operands at the end of the list, an=
d note
@@ -184,6 +177,10 @@
return NumDefs;
}
=20
+ /// getFlags - Return flags of this instruction.
+ ///
+ unsigned getFlags() const { return Flags; }
+
/// isVariadic - Return true if this instruction can have a variable num=
ber of
/// operands. In this case, the variable operands will be after the nor=
mal
/// operands but before the implicit definitions and uses (if any are
@@ -198,84 +195,6 @@
return Flags & (1 << MCID::HasOptionalDef);
}
=20
- /// getImplicitUses - Return a list of registers that are potentially
- /// read by any instance of this machine instruction. For example, on X=
86,
- /// the "adc" instruction adds two register operands and adds the carry =
bit in
- /// from the flags register. In this case, the instruction is marked as
- /// implicitly reading the flags. Likewise, the variable shift instruct=
ion on
- /// X86 is marked as implicitly reading the 'CL' register, which it alwa=
ys
- /// does.
- ///
- /// This method returns null if the instruction has no implicit uses.
- const unsigned *getImplicitUses() const {
- return ImplicitUses;
- }
-
- /// getNumImplicitUses - Return the number of implicit uses this instruc=
tion
- /// has.
- unsigned getNumImplicitUses() const {
- if (ImplicitUses =3D=3D 0) return 0;
- unsigned i =3D 0;
- for (; ImplicitUses[i]; ++i) /*empty*/;
- return i;
- }
-
- /// getImplicitDefs - Return a list of registers that are potentially
- /// written by any instance of this machine instruction. For example, o=
n X86,
- /// many instructions implicitly set the flags register. In this case, =
they
- /// are marked as setting the FLAGS. Likewise, many instructions always
- /// deposit their result in a physical register. For example, the X86 d=
ivide
- /// instruction always deposits the quotient and remainder in the EAX/EDX
- /// registers. For that instruction, this will return a list containing=
the
- /// EAX/EDX/EFLAGS registers.
- ///
- /// This method returns null if the instruction has no implicit defs.
- const unsigned *getImplicitDefs() const {
- return ImplicitDefs;
- }
-
- /// getNumImplicitDefs - Return the number of implicit defs this instruc=
tion
- /// has.
- unsigned getNumImplicitDefs() const {
- if (ImplicitDefs =3D=3D 0) return 0;
- unsigned i =3D 0;
- for (; ImplicitDefs[i]; ++i) /*empty*/;
- return i;
- }
-
- /// hasImplicitUseOfPhysReg - Return true if this instruction implicitly
- /// uses the specified physical register.
- bool hasImplicitUseOfPhysReg(unsigned Reg) const {
- if (const unsigned *ImpUses =3D ImplicitUses)
- for (; *ImpUses; ++ImpUses)
- if (*ImpUses =3D=3D Reg) return true;
- return false;
- }
-
- /// hasImplicitDefOfPhysReg - Return true if this instruction implicitly
- /// defines the specified physical register.
- bool hasImplicitDefOfPhysReg(unsigned Reg) const {
- if (const unsigned *ImpDefs =3D ImplicitDefs)
- for (; *ImpDefs; ++ImpDefs)
- if (*ImpDefs =3D=3D Reg) return true;
- return false;
- }
-
- /// getSchedClass - Return the scheduling class for this instruction. T=
he
- /// scheduling class is an index into the InstrItineraryData table. This
- /// returns zero if there is no known scheduling information for the
- /// instruction.
- ///
- unsigned getSchedClass() const {
- return SchedClass;
- }
-
- /// getSize - Return the number of bytes in the encoding of this instruc=
tion,
- /// or zero if the encoding size cannot be known from the opcode.
- unsigned getSize() const {
- return Size;
- }
-
/// isPseudo - Return true if this is a pseudo instruction that doesn't
/// correspond to a real machine instruction.
///
@@ -298,18 +217,6 @@
return Flags & (1 << MCID::Barrier);
}
=20
- /// findFirstPredOperandIdx() - Find the index of the first operand in t=
he
- /// operand list that is used to represent the predicate. It returns -1 =
if
- /// none is found.
- int findFirstPredOperandIdx() const {
- if (isPredicable()) {
- for (unsigned i =3D 0, e =3D getNumOperands(); i !=3D e; ++i)
- if (OpInfo[i].isPredicate())
- return i;
- }
- return -1;
- }
-
/// isTerminator - Returns true if this instruction part of the terminat=
or for
/// a basic block. Typically this is things like return and branch
/// instructions.
@@ -530,6 +437,97 @@
bool hasExtraDefRegAllocReq() const {
return Flags & (1 << MCID::ExtraDefRegAllocReq);
}
+
+
+ /// getImplicitUses - Return a list of registers that are potentially
+ /// read by any instance of this machine instruction. For example, on X=
86,
+ /// the "adc" instruction adds two register operands and adds the carry =
bit in
+ /// from the flags register. In this case, the instruction is marked as
+ /// implicitly reading the flags. Likewise, the variable shift instruct=
ion on
+ /// X86 is marked as implicitly reading the 'CL' register, which it alwa=
ys
+ /// does.
+ ///
+ /// This method returns null if the instruction has no implicit uses.
+ const uint16_t *getImplicitUses() const {
+ return ImplicitUses;
+ }
+
+ /// getNumImplicitUses - Return the number of implicit uses this instruc=
tion
+ /// has.
+ unsigned getNumImplicitUses() const {
+ if (ImplicitUses =3D=3D 0) return 0;
+ unsigned i =3D 0;
+ for (; ImplicitUses[i]; ++i) /*empty*/;
+ return i;
+ }
+
+ /// getImplicitDefs - Return a list of registers that are potentially
+ /// written by any instance of this machine instruction. For example, o=
n X86,
+ /// many instructions implicitly set the flags register. In this case, =
they
+ /// are marked as setting the FLAGS. Likewise, many instructions always
+ /// deposit their result in a physical register. For example, the X86 d=
ivide
+ /// instruction always deposits the quotient and remainder in the EAX/EDX
+ /// registers. For that instruction, this will return a list containing=
the
+ /// EAX/EDX/EFLAGS registers.
+ ///
+ /// This method returns null if the instruction has no implicit defs.
+ const uint16_t *getImplicitDefs() const {
+ return ImplicitDefs;
+ }
+
+ /// getNumImplicitDefs - Return the number of implicit defs this instruc=
tion
+ /// has.
+ unsigned getNumImplicitDefs() const {
+ if (ImplicitDefs =3D=3D 0) return 0;
+ unsigned i =3D 0;
+ for (; ImplicitDefs[i]; ++i) /*empty*/;
+ return i;
+ }
+
+ /// hasImplicitUseOfPhysReg - Return true if this instruction implicitly
+ /// uses the specified physical register.
+ bool hasImplicitUseOfPhysReg(unsigned Reg) const {
+ if (const uint16_t *ImpUses =3D ImplicitUses)
+ for (; *ImpUses; ++ImpUses)
+ if (*ImpUses =3D=3D Reg) return true;
+ return false;
+ }
+
+ /// hasImplicitDefOfPhysReg - Return true if this instruction implicitly
+ /// defines the specified physical register.
+ bool hasImplicitDefOfPhysReg(unsigned Reg) const {
+ if (const uint16_t *ImpDefs =3D ImplicitDefs)
+ for (; *ImpDefs; ++ImpDefs)
+ if (*ImpDefs =3D=3D Reg) return true;
+ return false;
+ }
+
+ /// getSchedClass - Return the scheduling class for this instruction. T=
he
+ /// scheduling class is an index into the InstrItineraryData table. This
+ /// returns zero if there is no known scheduling information for the
+ /// instruction.
+ ///
+ unsigned getSchedClass() const {
+ return SchedClass;
+ }
+
+ /// getSize - Return the number of bytes in the encoding of this instruc=
tion,
+ /// or zero if the encoding size cannot be known from the opcode.
+ unsigned getSize() const {
+ return Size;
+ }
+
+ /// findFirstPredOperandIdx() - Find the index of the first operand in t=
he
+ /// operand list that is used to represent the predicate. It returns -1 =
if
+ /// none is found.
+ int findFirstPredOperandIdx() const {
+ if (isPredicable()) {
+ for (unsigned i =3D 0, e =3D getNumOperands(); i !=3D e; ++i)
+ if (OpInfo[i].isPredicate())
+ return i;
+ }
+ return -1;
+ }
};
=20
} // end namespace llvm
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCIn=
strInfo.h
--- a/head/contrib/llvm/include/llvm/MC/MCInstrInfo.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCInstrInfo.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -24,14 +24,19 @@
/// MCInstrInfo - Interface to description of machine instruction set
///
class MCInstrInfo {
- const MCInstrDesc *Desc; // Raw array to allow static init'n
- unsigned NumOpcodes; // Number of entries in the desc array
+ const MCInstrDesc *Desc; // Raw array to allow static init'n
+ const unsigned *InstrNameIndices; // Array for name indices in InstrName=
Data
+ const char *InstrNameData; // Instruction name string pool
+ unsigned NumOpcodes; // Number of entries in the desc array
=20
public:
/// InitMCInstrInfo - Initialize MCInstrInfo, called by TableGen
/// auto-generated routines. *DO NOT USE*.
- void InitMCInstrInfo(const MCInstrDesc *D, unsigned NO) {
+ void InitMCInstrInfo(const MCInstrDesc *D, const unsigned *NI, const cha=
r *ND,
+ unsigned NO) {
Desc =3D D;
+ InstrNameIndices =3D NI;
+ InstrNameData =3D ND;
NumOpcodes =3D NO;
}
=20
@@ -44,6 +49,12 @@
assert(Opcode < NumOpcodes && "Invalid opcode!");
return Desc[Opcode];
}
+
+ /// getName - Returns the name for the instructions with the given opcod=
e.
+ const char *getName(unsigned Opcode) const {
+ assert(Opcode < NumOpcodes && "Invalid opcode!");
+ return &InstrNameData[InstrNameIndices[Opcode]];
+ }
};
=20
} // End llvm namespace
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCOb=
jectFileInfo.h
--- a/head/contrib/llvm/include/llvm/MC/MCObjectFileInfo.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCObjectFileInfo.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -14,15 +14,14 @@
#ifndef LLVM_MC_MCBJECTFILEINFO_H
#define LLVM_MC_MCBJECTFILEINFO_H
=20
-#include "llvm/MC/MCCodeGenInfo.h"
-#include "llvm/ADT/StringRef.h"
-#include "llvm/MC/SectionKind.h"
+#include "llvm/Support/CodeGen.h"
=20
namespace llvm {
-class MCContext;
-class MCSection;
-class Triple;
- =20
+ class MCContext;
+ class MCSection;
+ class StringRef;
+ class Triple;
+
class MCObjectFileInfo { =20
protected:
/// CommDirectiveSupportsAlignment - True if .comm supports alignment. =
This
@@ -47,6 +46,9 @@
unsigned FDEEncoding;
unsigned FDECFIEncoding;
unsigned TTypeEncoding;
+ // Section flags for eh_frame
+ unsigned EHSectionType;
+ unsigned EHSectionFlags;
=20
/// TextSection - Section directive for standard text.
///
@@ -82,13 +84,20 @@
/// this is the section to emit them into.
const MCSection *CompactUnwindSection;
=20
+ /// DwarfAccelNamesSection, DwarfAccelObjCSection
+ /// If we use the DWARF accelerated hash tables then we want toe emit th=
ese
+ /// sections.
+ const MCSection *DwarfAccelNamesSection;
+ const MCSection *DwarfAccelObjCSection;
+ const MCSection *DwarfAccelNamespaceSection;
+ const MCSection *DwarfAccelTypesSection;
+
// Dwarf sections for debug info. If a target supports debug info, thes=
e must
// be set.
const MCSection *DwarfAbbrevSection;
const MCSection *DwarfInfoSection;
const MCSection *DwarfLineSection;
const MCSection *DwarfFrameSection;
- const MCSection *DwarfPubNamesSection;
const MCSection *DwarfPubTypesSection;
const MCSection *DwarfDebugInlineSection;
const MCSection *DwarfStrSection;
@@ -102,7 +111,7 @@
const MCSection *TLSExtraDataSection;
=20
/// TLSDataSection - Section directive for Thread Local data.
- /// ELF and MachO only.
+ /// ELF, MachO and COFF.
const MCSection *TLSDataSection; // Defaults to ".tdata".
=20
/// TLSBSSSection - Section directive for Thread Local uninitialized dat=
a.
@@ -156,7 +165,7 @@
const MCSection *DrectveSection;
const MCSection *PDataSection;
const MCSection *XDataSection;
- =20
+
public:
void InitMCObjectFileInfo(StringRef TT, Reloc::Model RM, CodeModel::Mode=
l CM,
MCContext &ctx);
@@ -181,17 +190,26 @@
const MCSection *getTextSection() const { return TextSection; }
const MCSection *getDataSection() const { return DataSection; }
const MCSection *getBSSSection() const { return BSSSection; }
- const MCSection *getStaticCtorSection() const { return StaticCtorSection=
; }
- const MCSection *getStaticDtorSection() const { return StaticDtorSection=
; }
const MCSection *getLSDASection() const { return LSDASection; }
const MCSection *getCompactUnwindSection() const{
return CompactUnwindSection;
}
+ const MCSection *getDwarfAccelNamesSection() const {
+ return DwarfAccelNamesSection;
+ }
+ const MCSection *getDwarfAccelObjCSection() const {
+ return DwarfAccelObjCSection;
+ }
+ const MCSection *getDwarfAccelNamespaceSection() const {
+ return DwarfAccelNamespaceSection;
+ }
+ const MCSection *getDwarfAccelTypesSection() const {
+ return DwarfAccelTypesSection;
+ }
const MCSection *getDwarfAbbrevSection() const { return DwarfAbbrevSecti=
on; }
const MCSection *getDwarfInfoSection() const { return DwarfInfoSection; }
const MCSection *getDwarfLineSection() const { return DwarfLineSection; }
const MCSection *getDwarfFrameSection() const { return DwarfFrameSection=
; }
- const MCSection *getDwarfPubNamesSection() const{return DwarfPubNamesSec=
tion;}
const MCSection *getDwarfPubTypesSection() const{return DwarfPubTypesSec=
tion;}
const MCSection *getDwarfDebugInlineSection() const {
return DwarfDebugInlineSection;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCOb=
jectStreamer.h
--- a/head/contrib/llvm/include/llvm/MC/MCObjectStreamer.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCObjectStreamer.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -34,6 +34,8 @@
MCSectionData *CurSectionData;
=20
virtual void EmitInstToData(const MCInst &Inst) =3D 0;
+ virtual void EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame);
+ virtual void EmitCFIEndProcImpl(MCDwarfFrameInfo &Frame);
=20
protected:
MCObjectStreamer(MCContext &Context, MCAsmBackend &TAB,
@@ -70,14 +72,15 @@
virtual void ChangeSection(const MCSection *Section);
virtual void EmitInstruction(const MCInst &Inst);
virtual void EmitInstToFragment(const MCInst &Inst);
- virtual void EmitValueToOffset(const MCExpr *Offset, unsigned char Value=
);
+ virtual bool EmitValueToOffset(const MCExpr *Offset, unsigned char Value=
);
virtual void EmitDwarfAdvanceLineAddr(int64_t LineDelta,
const MCSymbol *LastLabel,
const MCSymbol *Label,
unsigned PointerSize);
virtual void EmitDwarfAdvanceFrameAddr(const MCSymbol *LastLabel,
const MCSymbol *Label);
- virtual void Finish();
+ virtual void EmitGPRel32Value(const MCExpr *Value);
+ virtual void FinishImpl();
=20
/// @}
};
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCOb=
jectWriter.h
--- a/head/contrib/llvm/include/llvm/MC/MCObjectWriter.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCObjectWriter.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -10,7 +10,6 @@
#ifndef LLVM_MC_MCOBJECTWRITER_H
#define LLVM_MC_MCOBJECTWRITER_H
=20
-#include "llvm/ADT/Triple.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Support/DataTypes.h"
#include <cassert>
@@ -20,11 +19,9 @@
class MCAssembler;
class MCFixup;
class MCFragment;
-class MCSymbol;
class MCSymbolData;
class MCSymbolRefExpr;
class MCValue;
-class raw_ostream;
=20
/// MCObjectWriter - Defines the object file and target independent interf=
aces
/// used by the assembler backend to write native file format object files.
@@ -188,11 +185,10 @@
/// Utility function to encode a SLEB128 value.
static void EncodeSLEB128(int64_t Value, raw_ostream &OS);
/// Utility function to encode a ULEB128 value.
- static void EncodeULEB128(uint64_t Value, raw_ostream &OS);
+ static void EncodeULEB128(uint64_t Value, raw_ostream &OS,
+ unsigned Padding =3D 0);
};
=20
-MCObjectWriter *createWinCOFFObjectWriter(raw_ostream &OS, bool is64Bit);
-
} // End llvm namespace
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCPa=
rser/MCAsmLexer.h
--- a/head/contrib/llvm/include/llvm/MC/MCParser/MCAsmLexer.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCParser/MCAsmLexer.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -71,6 +71,7 @@
bool isNot(TokenKind K) const { return Kind !=3D K; }
=20
SMLoc getLoc() const;
+ SMLoc getEndLoc() const;
=20
/// getStringContents - Get the contents of a string token (without quot=
es).
StringRef getStringContents() const {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCPa=
rser/MCAsmParser.h
--- a/head/contrib/llvm/include/llvm/MC/MCParser/MCAsmParser.h Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCParser/MCAsmParser.h Tue Apr 17 1=
1:51:51 2012 +0300
@@ -11,6 +11,7 @@
#define LLVM_MC_MCASMPARSER_H
=20
#include "llvm/Support/DataTypes.h"
+#include "llvm/ADT/ArrayRef.h"
=20
namespace llvm {
class AsmToken;
@@ -22,6 +23,7 @@
class MCStreamer;
class MCTargetAsmParser;
class SMLoc;
+class SMRange;
class SourceMgr;
class StringRef;
class Twine;
@@ -62,6 +64,9 @@
MCTargetAsmParser &getTargetParser() const { return *TargetParser; }
void setTargetParser(MCTargetAsmParser &P);
=20
+ virtual unsigned getAssemblerDialect() { return 0;}
+ virtual void setAssemblerDialect(unsigned i) { }
+
bool getShowParsedOperands() const { return ShowParsedOperands; }
void setShowParsedOperands(bool Value) { ShowParsedOperands =3D Value; }
=20
@@ -72,14 +77,16 @@
/// Msg.
///
/// \return The return value is true, if warnings are fatal.
- virtual bool Warning(SMLoc L, const Twine &Msg) =3D 0;
+ virtual bool Warning(SMLoc L, const Twine &Msg,
+ ArrayRef<SMRange> Ranges =3D ArrayRef<SMRange>()) =
=3D 0;
=20
/// Error - Emit an error at the location \arg L, with the message \arg
/// Msg.
///
/// \return The return value is always true, as an idiomatic convenience=
to
/// clients.
- virtual bool Error(SMLoc L, const Twine &Msg) =3D 0;
+ virtual bool Error(SMLoc L, const Twine &Msg,
+ ArrayRef<SMRange> Ranges =3D ArrayRef<SMRange>()) =3D=
0;
=20
/// Lex - Get the next AsmToken in the stream, possibly handling file
/// inclusion first.
@@ -89,7 +96,8 @@
const AsmToken &getTok();
=20
/// \brief Report an error at the current lexer location.
- bool TokError(const Twine &Msg);
+ bool TokError(const Twine &Msg,
+ ArrayRef<SMRange> Ranges =3D ArrayRef<SMRange>());
=20
/// ParseIdentifier - Parse an identifier or string (as a quoted identif=
ier)
/// and set \arg Res to the identifier contents.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCRe=
gisterInfo.h
--- a/head/contrib/llvm/include/llvm/MC/MCRegisterInfo.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCRegisterInfo.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -17,6 +17,7 @@
#define LLVM_MC_MCREGISTERINFO_H
=20
#include "llvm/ADT/DenseMap.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cassert>
=20
namespace llvm {
@@ -24,28 +25,18 @@
/// MCRegisterClass - Base class of TargetRegisterClass.
class MCRegisterClass {
public:
- typedef const unsigned* iterator;
- typedef const unsigned* const_iterator;
-private:
- unsigned ID;
+ typedef const uint16_t* iterator;
+ typedef const uint16_t* const_iterator;
+
const char *Name;
- const unsigned RegSize, Alignment; // Size & Alignment of register in by=
tes
- const int CopyCost;
+ const iterator RegsBegin;
+ const uint8_t *const RegSet;
+ const uint16_t RegsSize;
+ const uint16_t RegSetSize;
+ const uint16_t ID;
+ const uint16_t RegSize, Alignment; // Size & Alignment of register in by=
tes
+ const int8_t CopyCost;
const bool Allocatable;
- const iterator RegsBegin, RegsEnd;
- const unsigned char *const RegSet;
- const unsigned RegSetSize;
-public:
- MCRegisterClass(unsigned id, const char *name,
- unsigned RS, unsigned Al, int CC, bool Allocable,
- iterator RB, iterator RE, const unsigned char *Bits,
- unsigned NumBytes)
- : ID(id), Name(name), RegSize(RS), Alignment(Al), CopyCost(CC),
- Allocatable(Allocable), RegsBegin(RB), RegsEnd(RE), RegSet(Bits),
- RegSetSize(NumBytes) {
- for (iterator i =3D RegsBegin; i !=3D RegsEnd; ++i)
- assert(contains(*i) && "Bit field corrupted.");
- }
=20
/// getID() - Return the register class ID number.
///
@@ -58,11 +49,11 @@
/// begin/end - Return all of the registers in this class.
///
iterator begin() const { return RegsBegin; }
- iterator end() const { return RegsEnd; }
+ iterator end() const { return RegsBegin + RegsSize; }
=20
/// getNumRegs - Return the number of registers in this class.
///
- unsigned getNumRegs() const { return (unsigned)(RegsEnd-RegsBegin); }
+ unsigned getNumRegs() const { return RegsSize; }
=20
/// getRegister - Return the specified register in the class.
///
@@ -115,10 +106,10 @@
/// of AX.
///
struct MCRegisterDesc {
- const char *Name; // Printable name for the reg (for debuggi=
ng)
- const unsigned *Overlaps; // Overlapping registers, described above
- const unsigned *SubRegs; // Sub-register set, described above
- const unsigned *SuperRegs; // Super-register set, described above
+ const char *Name; // Printable name for the reg (for debugging)
+ uint32_t Overlaps; // Overlapping registers, described above
+ uint32_t SubRegs; // Sub-register set, described above
+ uint32_t SuperRegs; // Super-register set, described above
};
=20
/// MCRegisterInfo base class - We assume that the target defines a static
@@ -136,50 +127,82 @@
class MCRegisterInfo {
public:
typedef const MCRegisterClass *regclass_iterator;
+
+ /// DwarfLLVMRegPair - Emitted by tablegen so Dwarf<->LLVM reg mappings =
can be
+ /// performed with a binary search.
+ struct DwarfLLVMRegPair {
+ unsigned FromReg;
+ unsigned ToReg;
+
+ bool operator<(DwarfLLVMRegPair RHS) const { return FromReg < RHS.From=
Reg; }
+ };
private:
const MCRegisterDesc *Desc; // Pointer to the descriptor=
array
unsigned NumRegs; // Number of entries in the =
array
unsigned RAReg; // Return address register
const MCRegisterClass *Classes; // Pointer to the regclass a=
rray
unsigned NumClasses; // Number of entries in the =
array
- DenseMap<unsigned, int> L2DwarfRegs; // LLVM to Dwarf regs mapping
- DenseMap<unsigned, int> EHL2DwarfRegs; // LLVM to Dwarf regs mappin=
g EH
- DenseMap<unsigned, unsigned> Dwarf2LRegs; // Dwarf to LLVM regs mapping
- DenseMap<unsigned, unsigned> EHDwarf2LRegs; // Dwarf to LLVM regs mappin=
g EH
+ const uint16_t *RegLists; // Pointer to the reglists a=
rray
+ const uint16_t *SubRegIndices; // Pointer to the subreg loo=
kup
+ // array.
+ unsigned NumSubRegIndices; // Number of subreg indices.
+
+ unsigned L2DwarfRegsSize;
+ unsigned EHL2DwarfRegsSize;
+ unsigned Dwarf2LRegsSize;
+ unsigned EHDwarf2LRegsSize;
+ const DwarfLLVMRegPair *L2DwarfRegs; // LLVM to Dwarf regs mapping
+ const DwarfLLVMRegPair *EHL2DwarfRegs; // LLVM to Dwarf regs mappin=
g EH
+ const DwarfLLVMRegPair *Dwarf2LRegs; // Dwarf to LLVM regs mapping
+ const DwarfLLVMRegPair *EHDwarf2LRegs; // Dwarf to LLVM regs mappin=
g EH
DenseMap<unsigned, int> L2SEHRegs; // LLVM to SEH regs mapping
=20
public:
/// InitMCRegisterInfo - Initialize MCRegisterInfo, called by TableGen
/// auto-generated routines. *DO NOT USE*.
void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned R=
A,
- const MCRegisterClass *C, unsigned NC) {
+ const MCRegisterClass *C, unsigned NC,
+ const uint16_t *RL,
+ const uint16_t *SubIndices,
+ unsigned NumIndices) {
Desc =3D D;
NumRegs =3D NR;
RAReg =3D RA;
Classes =3D C;
+ RegLists =3D RL;
NumClasses =3D NC;
+ SubRegIndices =3D SubIndices;
+ NumSubRegIndices =3D NumIndices;
}
=20
- /// mapLLVMRegToDwarfReg - Used to initialize LLVM register to Dwarf
+ /// mapLLVMRegsToDwarfRegs - Used to initialize LLVM register to Dwarf
/// register number mapping. Called by TableGen auto-generated routines.
/// *DO NOT USE*.
- void mapLLVMRegToDwarfReg(unsigned LLVMReg, int DwarfReg, bool isEH) {
- if (isEH)
- EHL2DwarfRegs[LLVMReg] =3D DwarfReg;
- else
- L2DwarfRegs[LLVMReg] =3D DwarfReg;
+ void mapLLVMRegsToDwarfRegs(const DwarfLLVMRegPair *Map, unsigned Size,
+ bool isEH) {
+ if (isEH) {
+ EHL2DwarfRegs =3D Map;
+ EHL2DwarfRegsSize =3D Size;
+ } else {
+ L2DwarfRegs =3D Map;
+ L2DwarfRegsSize =3D Size;
+ }
}
- =20
- /// mapDwarfRegToLLVMReg - Used to initialize Dwarf register to LLVM
+
+ /// mapDwarfRegsToLLVMRegs - Used to initialize Dwarf register to LLVM
/// register number mapping. Called by TableGen auto-generated routines.
/// *DO NOT USE*.
- void mapDwarfRegToLLVMReg(unsigned DwarfReg, unsigned LLVMReg, bool isEH=
) {
- if (isEH)
- EHDwarf2LRegs[DwarfReg] =3D LLVMReg;
- else
- Dwarf2LRegs[DwarfReg] =3D LLVMReg;
+ void mapDwarfRegsToLLVMRegs(const DwarfLLVMRegPair *Map, unsigned Size,
+ bool isEH) {
+ if (isEH) {
+ EHDwarf2LRegs =3D Map;
+ EHDwarf2LRegsSize =3D Size;
+ } else {
+ Dwarf2LRegs =3D Map;
+ Dwarf2LRegsSize =3D Size;
+ }
}
- =20
+
/// mapLLVMRegToSEHReg - Used to initialize LLVM register to SEH register
/// number mapping. By default the SEH register number is just the same
/// as the LLVM register number.
@@ -212,9 +235,9 @@
/// register, or a null list of there are none. The list returned is ze=
ro
/// terminated.
///
- const unsigned *getAliasSet(unsigned RegNo) const {
+ const uint16_t *getAliasSet(unsigned RegNo) const {
// The Overlaps set always begins with Reg itself.
- return get(RegNo).Overlaps + 1;
+ return RegLists + get(RegNo).Overlaps + 1;
}
=20
/// getOverlaps - Return a list of registers that overlap Reg, including
@@ -222,8 +245,8 @@
/// list.
/// These are exactly the registers in { x | regsOverlap(x, Reg) }.
///
- const unsigned *getOverlaps(unsigned RegNo) const {
- return get(RegNo).Overlaps;
+ const uint16_t *getOverlaps(unsigned RegNo) const {
+ return RegLists + get(RegNo).Overlaps;
}
=20
/// getSubRegisters - Return the list of registers that are sub-register=
s of
@@ -231,8 +254,35 @@
/// returned is zero terminated and sorted according to super-sub regist=
er
/// relations. e.g. X86::RAX's sub-register list is EAX, AX, AL, AH.
///
- const unsigned *getSubRegisters(unsigned RegNo) const {
- return get(RegNo).SubRegs;
+ const uint16_t *getSubRegisters(unsigned RegNo) const {
+ return RegLists + get(RegNo).SubRegs;
+ }
+
+ /// getSubReg - Returns the physical register number of sub-register "In=
dex"
+ /// for physical register RegNo. Return zero if the sub-register does not
+ /// exist.
+ unsigned getSubReg(unsigned Reg, unsigned Idx) const {
+ return *(SubRegIndices + (Reg - 1) * NumSubRegIndices + Idx - 1);
+ }
+
+ /// getMatchingSuperReg - Return a super-register of the specified regis=
ter
+ /// Reg so its sub-register of index SubIdx is Reg.
+ unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
+ const MCRegisterClass *RC) const {
+ for (const uint16_t *SRs =3D getSuperRegisters(Reg); unsigned SR =3D *=
SRs;++SRs)
+ if (Reg =3D=3D getSubReg(SR, SubIdx) && RC->contains(SR))
+ return SR;
+ return 0;
+ }
+
+ /// getSubRegIndex - For a given register pair, return the sub-register =
index
+ /// if the second register is a sub-register of the first. Return zero
+ /// otherwise.
+ unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const {
+ for (unsigned I =3D 1; I <=3D NumSubRegIndices; ++I)
+ if (getSubReg(RegNo, I) =3D=3D SubRegNo)
+ return I;
+ return 0;
}
=20
/// getSuperRegisters - Return the list of registers that are super-regi=
sters
@@ -240,8 +290,8 @@
/// returned is zero terminated and sorted according to super-sub regist=
er
/// relations. e.g. X86::AL's super-register list is AX, EAX, RAX.
///
- const unsigned *getSuperRegisters(unsigned RegNo) const {
- return get(RegNo).SuperRegs;
+ const uint16_t *getSuperRegisters(unsigned RegNo) const {
+ return RegLists + get(RegNo).SuperRegs;
}
=20
/// getName - Return the human-readable symbolic target-specific name fo=
r the
@@ -261,22 +311,26 @@
/// parameter allows targets to use different numberings for EH info and
/// debugging info.
int getDwarfRegNum(unsigned RegNum, bool isEH) const {
- const DenseMap<unsigned, int> &M =3D isEH ? EHL2DwarfRegs : L2DwarfReg=
s;
- const DenseMap<unsigned, int>::const_iterator I =3D M.find(RegNum);
- if (I =3D=3D M.end()) return -1;
- return I->second;
+ const DwarfLLVMRegPair *M =3D isEH ? EHL2DwarfRegs : L2DwarfRegs;
+ unsigned Size =3D isEH ? EHL2DwarfRegsSize : L2DwarfRegsSize;
+
+ DwarfLLVMRegPair Key =3D { RegNum, 0 };
+ const DwarfLLVMRegPair *I =3D std::lower_bound(M, M+Size, Key);
+ if (I =3D=3D M+Size || I->FromReg !=3D RegNum)
+ return -1;
+ return I->ToReg;
}
=20
/// getLLVMRegNum - Map a dwarf register back to a target register.
///
int getLLVMRegNum(unsigned RegNum, bool isEH) const {
- const DenseMap<unsigned, unsigned> &M =3D isEH ? EHDwarf2LRegs : Dwarf=
2LRegs;
- const DenseMap<unsigned, unsigned>::const_iterator I =3D M.find(RegNum=
);
- if (I =3D=3D M.end()) {
- assert(0 && "Invalid RegNum");
- return -1;
- }
- return I->second;
+ const DwarfLLVMRegPair *M =3D isEH ? EHDwarf2LRegs : Dwarf2LRegs;
+ unsigned Size =3D isEH ? EHDwarf2LRegsSize : Dwarf2LRegsSize;
+
+ DwarfLLVMRegPair Key =3D { RegNum, 0 };
+ const DwarfLLVMRegPair *I =3D std::lower_bound(M, M+Size, Key);
+ assert(I !=3D M+Size && I->FromReg =3D=3D RegNum && "Invalid RegNum");
+ return I->ToReg;
}
=20
/// getSEHRegNum - Map a target register to an equivalent SEH register
@@ -301,7 +355,7 @@
return Classes[i];
}
};
-=20
+
} // End llvm namespace
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCSe=
ction.h
--- a/head/contrib/llvm/include/llvm/MC/MCSection.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCSection.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -14,12 +14,10 @@
#ifndef LLVM_MC_MCSECTION_H
#define LLVM_MC_MCSECTION_H
=20
-#include "llvm/ADT/StringRef.h"
#include "llvm/MC/SectionKind.h"
#include "llvm/Support/Casting.h"
=20
namespace llvm {
- class MCContext;
class MCAsmInfo;
class raw_ostream;
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCSe=
ctionCOFF.h
--- a/head/contrib/llvm/include/llvm/MC/MCSectionCOFF.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCSectionCOFF.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,8 +15,8 @@
#define LLVM_MC_MCSECTIONCOFF_H
=20
#include "llvm/MC/MCSection.h"
-
#include "llvm/Support/COFF.h"
+#include "llvm/ADT/StringRef.h"
=20
namespace llvm {
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCSe=
ctionELF.h
--- a/head/contrib/llvm/include/llvm/MC/MCSectionELF.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCSectionELF.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -16,6 +16,7 @@
=20
#include "llvm/MC/MCSection.h"
#include "llvm/Support/ELF.h"
+#include "llvm/ADT/StringRef.h"
=20
namespace llvm {
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCSe=
ctionMachO.h
--- a/head/contrib/llvm/include/llvm/MC/MCSectionMachO.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCSectionMachO.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -15,6 +15,7 @@
#define LLVM_MC_MCSECTIONMACHO_H
=20
#include "llvm/MC/MCSection.h"
+#include "llvm/ADT/StringRef.h"
=20
namespace llvm {
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/MC/MCSt=
reamer.h
--- a/head/contrib/llvm/include/llvm/MC/MCStreamer.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/include/llvm/MC/MCStreamer.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -23,7 +23,6 @@
=20
namespace llvm {
class MCAsmBackend;
- class MCAsmInfo;
class MCCodeEmitter;
class MCContext;
class MCExpr;
@@ -32,7 +31,6 @@
class MCSection;
class MCSymbol;
class StringRef;
- class TargetLoweringObjectFile;
class Twine;
class raw_ostream;
class formatted_raw_ostream;
@@ -94,6 +92,10 @@
=20
const MCExpr *ForceExpAbs(const MCExpr* Expr);
=20
+ void RecordProcStart(MCDwarfFrameInfo &Frame);
+ virtual void EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame);
+ void RecordProcEnd(MCDwarfFrameInfo &Frame);
+ virtual void EmitCFIEndProcImpl(MCDwarfFrameInfo &CurFrame);
void EmitFrames(bool usingCFI);
=20
MCWin64EHUnwindInfo *getCurrentW64UnwindInfo(){return CurrentW64Unwind=
Info;}
@@ -334,6 +336,11 @@
/// EndCOFFSymbolDef - Marks the end of the symbol definition.
virtual void EndCOFFSymbolDef() =3D 0;
=20
+ /// EmitCOFFSecRel32 - Emits a COFF section relative relocation.
+ ///
+ /// @param Symbol - Symbol the section relative realocation should poi=
nt to.
+ virtual void EmitCOFFSecRel32(MCSymbol const *Symbol);
+
/// EmitELFSize - Emit an ELF .size directive.
///
/// This corresponds to an assembler statement such as:
@@ -420,7 +427,8 @@
=20
/// EmitULEB128Value - Special case of EmitULEB128Value that avoids the
/// client having to pass in a MCExpr for constant integers.
- void EmitULEB128IntValue(uint64_t Value, unsigned AddrSpace =3D 0);
+ void EmitULEB128IntValue(uint64_t Value, unsigned AddrSpace =3D 0,
+ unsigned Padding =3D 0);
=20
/// EmitSLEB128Value - Special case of EmitSLEB128Value that avoids the
/// client having to pass in a MCExpr for constant integers.
@@ -431,6 +439,13 @@
void EmitSymbolValue(const MCSymbol *Sym, unsigned Size,
unsigned AddrSpace =3D 0);
=20
+ /// EmitGPRel64Value - Emit the expression @p Value into the output as=
a
+ /// gprel64 (64-bit GP relative) value.
+ ///
+ /// This is used to implement assembler directives such as .gpdword on
+ /// targets that support them.
+ virtual void EmitGPRel64Value(const MCExpr *Value);
+
/// EmitGPRel32Value - Emit the expression @p Value into the output as=
a
/// gprel32 (32-bit GP relative) value.
///
@@ -493,7 +508,8 @@
/// @param Offset - The offset to reach. This may be an expression, bu=
t the
/// expression must be associated with the current section.
/// @param Value - The value to use when filling bytes.
- virtual void EmitValueToOffset(const MCExpr *Offset,
+ /// @return false on success, true if the offset was invalid.
+ virtual bool EmitValueToOffset(const MCExpr *Offset,
unsigned char Value =3D 0) =3D 0;
=20
/// @}
@@ -505,7 +521,8 @@
/// EmitDwarfFileDirective - Associate a filename with a specified log=
ical
/// file number. This implements the DWARF2 '.file 4 "foo.c"' assembl=
er
/// directive.
- virtual bool EmitDwarfFileDirective(unsigned FileNo,StringRef Filename=
);
+ virtual bool EmitDwarfFileDirective(unsigned FileNo, StringRef Directo=
ry,
+ StringRef Filename);
=20
/// EmitDwarfLocDirective - This implements the DWARF2
// '.loc fileno lineno ...' assembler directive.
@@ -529,8 +546,8 @@
=20
virtual void EmitCompactUnwindEncoding(uint32_t CompactUnwindEncoding);
virtual void EmitCFISections(bool EH, bool Debug);
- virtual void EmitCFIStartProc();
- virtual void EmitCFIEndProc();
+ void EmitCFIStartProc();
+ void EmitCFIEndProc();
virtual void EmitCFIDefCfa(int64_t Register, int64_t Offset);
virtual void EmitCFIDefCfaOffset(int64_t Offset);
virtual void EmitCFIDefCfaRegister(int64_t Register);
@@ -540,8 +557,11 @@
virtual void EmitCFIRememberState();
virtual void EmitCFIRestoreState();
virtual void EmitCFISameValue(int64_t Register);
+ virtual void EmitCFIRestore(int64_t Register);
virtual void EmitCFIRelOffset(int64_t Register, int64_t Offset);
virtual void EmitCFIAdjustCfaOffset(int64_t Adjustment);
+ virtual void EmitCFIEscape(StringRef Values);
+ virtual void EmitCFISignalFrame();
=20
virtual void EmitWin64EHStartProc(const MCSymbol *Symbol);
virtual void EmitWin64EHEndProc();
@@ -581,8 +601,10 @@
virtual void EmitRegSave(const SmallVectorImpl<unsigned> &RegList,
bool isVector);
=20
+ /// FinishImpl - Streamer specific finalization.
+ virtual void FinishImpl() =3D 0;
/// Finish - Finish emission of machine code.
- virtual void Finish() =3D 0;
+ void Finish();
};
=20
/// createNullStreamer - Create a dummy machine code streamer, which does
@@ -613,6 +635,7 @@
bool isVerboseAsm,
bool useLoc,
bool useCFI,
+ bool useDwarfDirectory,
MCInstPrinter *InstPrint =3D 0,
MCCodeEmitter *CE =3D 0,
MCAsmBackend *TAB =3D 0,
@@ -638,14 +661,8 @@
/// createELFStreamer - Create a machine code streamer which will genera=
te
/// ELF format object files.
MCStreamer *createELFStreamer(MCContext &Ctx, MCAsmBackend &TAB,
- raw_ostream &OS, MCCodeEmitter *CE,
- bool RelaxAll, bool NoExecStack);
-
- /// createLoggingStreamer - Create a machine code streamer which just lo=
gs the
- /// API calls and then dispatches to another streamer.
- ///
- /// The new streamer takes ownership of the \arg Child.
- MCStreamer *createLoggingStreamer(MCStreamer *Child, raw_ostream &OS);
+ raw_ostream &OS, MCCodeEmitter *CE,
+ bool RelaxAll, bool NoExecStack);
=20
/// createPureStreamer - Create a machine code streamer which will gener=
ate
/// "pure" MC object files, for use with MC-JIT and testing tools.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Metadat=
a.h
--- a/head/contrib/llvm/include/llvm/Metadata.h Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/llvm/include/llvm/Metadata.h Tue Apr 17 11:51:51 2012 +0=
300
@@ -36,30 +36,27 @@
/// These are used to efficiently contain a byte sequence for metadata.
/// MDString is always unnamed.
class MDString : public Value {
+ virtual void anchor();
MDString(const MDString &); // DO NOT IMPLEMENT
=20
- StringRef Str;
- explicit MDString(LLVMContext &C, StringRef S);
-
+ explicit MDString(LLVMContext &C);
public:
static MDString *get(LLVMContext &Context, StringRef Str);
static MDString *get(LLVMContext &Context, const char *Str) {
return get(Context, Str ? StringRef(Str) : StringRef());
}
=20
- StringRef getString() const { return Str; }
+ StringRef getString() const { return getName(); }
=20
- unsigned getLength() const { return (unsigned)Str.size(); }
+ unsigned getLength() const { return (unsigned)getName().size(); }
=20
typedef StringRef::iterator iterator;
=20
/// begin() - Pointer to the first byte of the string.
- ///
- iterator begin() const { return Str.begin(); }
+ iterator begin() const { return getName().begin(); }
=20
/// end() - Pointer to one byte past the end of the string.
- ///
- iterator end() const { return Str.end(); }
+ iterator end() const { return getName().end(); }
=20
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static inline bool classof(const MDString *) { return true; }
@@ -78,6 +75,10 @@
void operator=3D(const MDNode &); // DO NOT IMPLEMENT
friend class MDNodeOperand;
friend class LLVMContextImpl;
+ friend struct FoldingSetTrait<MDNode>;
+
+ /// Hash - If the MDNode is uniqued cache the hash to speed up lookup.
+ unsigned Hash;
=20
/// NumOperands - This many 'MDNodeOperand' items are co-allocated onto =
the
/// end of this MDNode.
@@ -134,6 +135,9 @@
/// deleteTemporary - Deallocate a node created by getTemporary. The
/// node must not have any users.
static void deleteTemporary(MDNode *N);
+
+ /// replaceOperandWith - Replace a specific operand.
+ void replaceOperandWith(unsigned i, Value *NewVal);
=20
/// getOperand - Return specified operand.
Value *getOperand(unsigned i) const;
@@ -225,6 +229,9 @@
=20
/// print - Implement operator<< on NamedMDNode.
void print(raw_ostream &ROS, AssemblyAnnotationWriter *AAW =3D 0) const;
+
+ /// dump() - Allow printing of NamedMDNodes from the debugger.
+ void dump() const;
};
=20
} // end llvm namespace
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Module.h
--- a/head/contrib/llvm/include/llvm/Module.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Module.h Tue Apr 17 11:51:51 2012 +0300
@@ -30,8 +30,7 @@
class LLVMContext;
class StructType;
template<typename T> struct DenseMapInfo;
-template<typename KeyT, typename ValueT,=20
- typename KeyInfoT, typename ValueInfoT> class DenseMap;
+template<typename KeyT, typename ValueT, typename KeyInfoT> class DenseMap;
=20
template<> struct ilist_traits<Function>
: public SymbolTableListTraits<Function, Module> {
@@ -154,6 +153,39 @@
/// An enumeration for describing the size of a pointer on the target ma=
chine.
enum PointerSize { AnyPointerSize, Pointer32, Pointer64 };
=20
+ /// An enumeration for the supported behaviors of module flags. The foll=
owing
+ /// module flags behavior values are supported:
+ ///
+ /// Value Behavior
+ /// ----- --------
+ /// 1 Error
+ /// Emits an error if two values disagree.
+ ///
+ /// 2 Warning
+ /// Emits a warning if two values disagree.
+ ///
+ /// 3 Require
+ /// Emits an error when the specified value is not pre=
sent
+ /// or doesn't have the specified value. It is an erro=
r for
+ /// two (or more) llvm.module.flags with the same ID t=
o have
+ /// the Require behavior but different values. There m=
ay be
+ /// multiple Require flags per ID.
+ ///
+ /// 4 Override
+ /// Uses the specified value if the two values disagre=
e. It
+ /// is an error for two (or more) llvm.module.flags wi=
th the
+ /// same ID to have the Override behavior but different
+ /// values.
+ enum ModFlagBehavior { Error =3D 1, Warning =3D 2, Require =3D 3, Overr=
ide =3D 4 };
+
+ struct ModuleFlagEntry {
+ ModFlagBehavior Behavior;
+ MDString *Key;
+ Value *Val;
+ ModuleFlagEntry(ModFlagBehavior B, MDString *K, Value *V)
+ : Behavior(B), Key(K), Val(V) {}
+ };
+
/// @}
/// @name Member Variables
/// @{
@@ -266,8 +298,8 @@
void getMDKindNames(SmallVectorImpl<StringRef> &Result) const;
=20
=20
- typedef DenseMap<StructType*, unsigned, DenseMapInfo<StructType*>,
- DenseMapInfo<unsigned> > NumeredTypesMapTy;
+ typedef DenseMap<StructType*, unsigned, DenseMapInfo<StructType*> >
+ NumeredTypesMapTy;
=20
/// findUsedStructTypes - Walk the entire module and find all of the
/// struct types that are in use, returning them in a vector.
@@ -373,6 +405,30 @@
void eraseNamedMetadata(NamedMDNode *NMD);
=20
/// @}
+/// @name Module Flags Accessors
+/// @{
+
+ /// getModuleFlagsMetadata - Returns the module flags in the provided ve=
ctor.
+ void getModuleFlagsMetadata(SmallVectorImpl<ModuleFlagEntry> &Flags) con=
st;
+
+ /// getModuleFlagsMetadata - Returns the NamedMDNode in the module that
+ /// represents module-level flags. This method returns null if there are=
no
+ /// module-level flags.
+ NamedMDNode *getModuleFlagsMetadata() const;
+
+ /// getOrInsertModuleFlagsMetadata - Returns the NamedMDNode in the modu=
le
+ /// that represents module-level flags. If module-level flags aren't fou=
nd,
+ /// it creates the named metadata that contains them.
+ NamedMDNode *getOrInsertModuleFlagsMetadata();
+
+ /// addModuleFlag - Add a module-level flag to the module-level flags
+ /// metadata. It will create the module-level flags named metadata if it
+ /// doesn't already exist.
+ void addModuleFlag(ModFlagBehavior Behavior, StringRef Key, Value *Val);
+ void addModuleFlag(ModFlagBehavior Behavior, StringRef Key, uint32_t Val=
);
+ void addModuleFlag(MDNode *Node);
+
+/// @}
/// @name Materialization
/// @{
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Object/=
Archive.h
--- a/head/contrib/llvm/include/llvm/Object/Archive.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/include/llvm/Object/Archive.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -22,6 +22,7 @@
namespace object {
=20
class Archive : public Binary {
+ virtual void anchor();
public:
class Child {
const Archive *Parent;
@@ -34,6 +35,10 @@
return (Parent =3D=3D other.Parent) && (Data.begin() =3D=3D other.Da=
ta.begin());
}
=20
+ bool operator <(const Child &other) const {
+ return Data.begin() < other.Data.begin();
+ }
+
Child getNext() const;
error_code getName(StringRef &Result) const;
int getLastModified() const;
@@ -50,6 +55,7 @@
class child_iterator {
Child child;
public:
+ child_iterator() : child(Child(0, StringRef())) {}
child_iterator(const Child &c) : child(c) {}
const Child* operator->() const {
return &child;
@@ -63,24 +69,73 @@
return !(*this =3D=3D other);
}
=20
+ bool operator <(const child_iterator &other) const {
+ return child < other.child;
+ }
+
child_iterator& operator++() { // Preincrement
child =3D child.getNext();
return *this;
}
};
=20
+ class Symbol {
+ const Archive *Parent;
+ uint32_t SymbolIndex;
+ uint32_t StringIndex; // Extra index to the string.
+
+ public:
+ bool operator =3D=3D(const Symbol &other) const {
+ return (Parent =3D=3D other.Parent) && (SymbolIndex =3D=3D other.Sym=
bolIndex);
+ }
+
+ Symbol(const Archive *p, uint32_t symi, uint32_t stri)
+ : Parent(p)
+ , SymbolIndex(symi)
+ , StringIndex(stri) {}
+ error_code getName(StringRef &Result) const;
+ error_code getMember(child_iterator &Result) const;
+ Symbol getNext() const;
+ };
+
+ class symbol_iterator {
+ Symbol symbol;
+ public:
+ symbol_iterator(const Symbol &s) : symbol(s) {}
+ const Symbol *operator->() const {
+ return &symbol;
+ }
+
+ bool operator=3D=3D(const symbol_iterator &other) const {
+ return symbol =3D=3D other.symbol;
+ }
+
+ bool operator!=3D(const symbol_iterator &other) const {
+ return !(*this =3D=3D other);
+ }
+
+ symbol_iterator& operator++() { // Preincrement
+ symbol =3D symbol.getNext();
+ return *this;
+ }
+ };
+
Archive(MemoryBuffer *source, error_code &ec);
=20
- child_iterator begin_children() const;
+ child_iterator begin_children(bool skip_internal =3D true) const;
child_iterator end_children() const;
=20
+ symbol_iterator begin_symbols() const;
+ symbol_iterator end_symbols() const;
+
// Cast methods.
static inline bool classof(Archive const *v) { return true; }
static inline bool classof(Binary const *v) {
- return v->getType() =3D=3D Binary::isArchive;
+ return v->isArchive();
}
=20
private:
+ child_iterator SymbolTable;
child_iterator StringTable;
};
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Object/=
Binary.h
--- a/head/contrib/llvm/include/llvm/Object/Binary.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/include/llvm/Object/Binary.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -37,15 +37,24 @@
Binary(unsigned int Type, MemoryBuffer *Source);
=20
enum {
- isArchive,
+ ID_Archive,
+ // Object and children.
+ ID_StartObjects,
+ ID_COFF,
+ ID_ELF32L, // ELF 32-bit, little endian
+ ID_ELF32B, // ELF 32-bit, big endian
+ ID_ELF64L, // ELF 64-bit, little endian
+ ID_ELF64B, // ELF 64-bit, big endian
+ ID_MachO,
+ ID_EndObjects
+ };
=20
- // Object and children.
- isObject,
- isCOFF,
- isELF,
- isMachO,
- lastObject
- };
+ static inline unsigned int getELFType(bool isLittleEndian, bool is64Bits=
) {
+ if (isLittleEndian)
+ return is64Bits ? ID_ELF64L : ID_ELF32L;
+ else
+ return is64Bits ? ID_ELF64B : ID_ELF32B;
+ }
=20
public:
virtual ~Binary();
@@ -56,9 +65,37 @@
// Cast methods.
unsigned int getType() const { return TypeID; }
static inline bool classof(const Binary *v) { return true; }
+
+ // Convenience methods
+ bool isObject() const {
+ return TypeID > ID_StartObjects && TypeID < ID_EndObjects;
+ }
+
+ bool isArchive() const {
+ return TypeID =3D=3D ID_Archive;
+ }
+
+ bool isELF() const {
+ return TypeID >=3D ID_ELF32L && TypeID <=3D ID_ELF64B;
+ }
+
+ bool isMachO() const {
+ return TypeID =3D=3D ID_MachO;
+ }
+
+ bool isCOFF() const {
+ return TypeID =3D=3D ID_COFF;
+ }
};
=20
+/// @brief Create a Binary from Source, autodetecting the file type.
+///
+/// @param Source The data to create the Binary from. Ownership is transfe=
red
+/// to Result if successful. If an error is returned, Source is des=
troyed
+/// by createBinary before returning.
+/// @param Result A pointer to the resulting Binary if no error occured.
error_code createBinary(MemoryBuffer *Source, OwningPtr<Binary> &Result);
+
error_code createBinary(StringRef Path, OwningPtr<Binary> &Result);
=20
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Object/=
COFF.h
--- a/head/contrib/llvm/include/llvm/Object/COFF.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/include/llvm/Object/COFF.h Tue Apr 17 11:51:51 2012=
+0300
@@ -19,6 +19,9 @@
#include "llvm/Support/Endian.h"
=20
namespace llvm {
+ template <typename T>
+ class ArrayRef;
+
namespace object {
=20
struct coff_file_header {
@@ -45,13 +48,18 @@
support::ulittle32_t Value;
support::little16_t SectionNumber;
=20
- struct {
- support::ulittle8_t BaseType;
- support::ulittle8_t ComplexType;
- } Type;
+ support::ulittle16_t Type;
=20
support::ulittle8_t StorageClass;
support::ulittle8_t NumberOfAuxSymbols;
+
+ uint8_t getBaseType() const {
+ return Type & 0x0F;
+ }
+
+ uint8_t getComplexType() const {
+ return (Type & 0xF0) >> 4;
+ }
};
=20
struct coff_section {
@@ -73,6 +81,16 @@
support::ulittle16_t Type;
};
=20
+struct coff_aux_section_definition {
+ support::ulittle32_t Length;
+ support::ulittle16_t NumberOfRelocations;
+ support::ulittle16_t NumberOfLinenumbers;
+ support::ulittle32_t CheckSum;
+ support::ulittle16_t Number;
+ support::ulittle8_t Selection;
+ char Unused[3];
+};
+
class COFFObjectFile : public ObjectFile {
private:
const coff_file_header *Header;
@@ -81,11 +99,7 @@
const char *StringTable;
uint32_t StringTableSize;
=20
- error_code getSection(int32_t index,
- const coff_section *&Res) const;
error_code getString(uint32_t offset, StringRef &Res) const;
- error_code getSymbol(uint32_t index,
- const coff_symbol *&Res) const;
=20
const coff_symbol *toSymb(DataRefImpl Symb) const;
const coff_section *toSec(DataRefImpl Sec) const;
@@ -94,13 +108,14 @@
protected:
virtual error_code getSymbolNext(DataRefImpl Symb, SymbolRef &Res) const;
virtual error_code getSymbolName(DataRefImpl Symb, StringRef &Res) const;
- virtual error_code getSymbolOffset(DataRefImpl Symb, uint64_t &Res) cons=
t;
+ virtual error_code getSymbolFileOffset(DataRefImpl Symb, uint64_t &Res) =
const;
virtual error_code getSymbolAddress(DataRefImpl Symb, uint64_t &Res) con=
st;
virtual error_code getSymbolSize(DataRefImpl Symb, uint64_t &Res) const;
virtual error_code getSymbolNMTypeChar(DataRefImpl Symb, char &Res) cons=
t;
- virtual error_code isSymbolInternal(DataRefImpl Symb, bool &Res) const;
- virtual error_code isSymbolGlobal(DataRefImpl Symb, bool &Res) const;
- virtual error_code getSymbolType(DataRefImpl Symb, SymbolRef::SymbolType=
&Res) const;
+ virtual error_code getSymbolFlags(DataRefImpl Symb, uint32_t &Res) const;
+ virtual error_code getSymbolType(DataRefImpl Symb, SymbolRef::Type &Res)=
const;
+ virtual error_code getSymbolSection(DataRefImpl Symb,
+ section_iterator &Res) const;
=20
virtual error_code getSectionNext(DataRefImpl Sec, SectionRef &Res) cons=
t;
virtual error_code getSectionName(DataRefImpl Sec, StringRef &Res) const;
@@ -111,6 +126,10 @@
virtual error_code isSectionText(DataRefImpl Sec, bool &Res) const;
virtual error_code isSectionData(DataRefImpl Sec, bool &Res) const;
virtual error_code isSectionBSS(DataRefImpl Sec, bool &Res) const;
+ virtual error_code isSectionVirtual(DataRefImpl Sec, bool &Res) const;
+ virtual error_code isSectionZeroInit(DataRefImpl Sec, bool &Res) const;
+ virtual error_code isSectionRequiredForExecution(DataRefImpl Sec,
+ bool &Res) const;
virtual error_code sectionContainsSymbol(DataRefImpl Sec, DataRefImpl Sy=
mb,
bool &Result) const;
virtual relocation_iterator getSectionRelBegin(DataRefImpl Sec) const;
@@ -120,10 +139,12 @@
RelocationRef &Res) const;
virtual error_code getRelocationAddress(DataRefImpl Rel,
uint64_t &Res) const;
+ virtual error_code getRelocationOffset(DataRefImpl Rel,
+ uint64_t &Res) const;
virtual error_code getRelocationSymbol(DataRefImpl Rel,
SymbolRef &Res) const;
virtual error_code getRelocationType(DataRefImpl Rel,
- uint32_t &Res) const;
+ uint64_t &Res) const;
virtual error_code getRelocationTypeName(DataRefImpl Rel,
SmallVectorImpl<char> &Result) =
const;
virtual error_code getRelocationAdditionalInfo(DataRefImpl Rel,
@@ -131,16 +152,46 @@
virtual error_code getRelocationValueString(DataRefImpl Rel,
SmallVectorImpl<char> &Result) =
const;
=20
+ virtual error_code getLibraryNext(DataRefImpl LibData,
+ LibraryRef &Result) const;
+ virtual error_code getLibraryPath(DataRefImpl LibData,
+ StringRef &Result) const;
+
public:
COFFObjectFile(MemoryBuffer *Object, error_code &ec);
virtual symbol_iterator begin_symbols() const;
virtual symbol_iterator end_symbols() const;
+ virtual symbol_iterator begin_dynamic_symbols() const;
+ virtual symbol_iterator end_dynamic_symbols() const;
+ virtual library_iterator begin_libraries_needed() const;
+ virtual library_iterator end_libraries_needed() const;
virtual section_iterator begin_sections() const;
virtual section_iterator end_sections() const;
=20
virtual uint8_t getBytesInAddress() const;
virtual StringRef getFileFormatName() const;
virtual unsigned getArch() const;
+ virtual StringRef getLoadName() const;
+
+ error_code getHeader(const coff_file_header *&Res) const;
+ error_code getSection(int32_t index, const coff_section *&Res) const;
+ error_code getSymbol(uint32_t index, const coff_symbol *&Res) const;
+ template <typename T>
+ error_code getAuxSymbol(uint32_t index, const T *&Res) const {
+ const coff_symbol *s;
+ error_code ec =3D getSymbol(index, s);
+ Res =3D reinterpret_cast<const T*>(s);
+ return ec;
+ }
+ error_code getSymbolName(const coff_symbol *symbol, StringRef &Res) cons=
t;
+ error_code getSectionName(const coff_section *Sec, StringRef &Res) const;
+ error_code getSectionContents(const coff_section *Sec,
+ ArrayRef<uint8_t> &Res) const;
+
+ static inline bool classof(const Binary *v) {
+ return v->isCOFF();
+ }
+ static inline bool classof(const COFFObjectFile *v) { return true; }
};
=20
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Object/=
MachO.h
--- a/head/contrib/llvm/include/llvm/Object/MachO.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/include/llvm/Object/MachO.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -18,6 +18,7 @@
#include "llvm/Object/ObjectFile.h"
#include "llvm/Object/MachOObject.h"
#include "llvm/Support/MachO.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/SmallVector.h"
=20
namespace llvm {
@@ -31,23 +32,36 @@
=20
virtual symbol_iterator begin_symbols() const;
virtual symbol_iterator end_symbols() const;
+ virtual symbol_iterator begin_dynamic_symbols() const;
+ virtual symbol_iterator end_dynamic_symbols() const;
+ virtual library_iterator begin_libraries_needed() const;
+ virtual library_iterator end_libraries_needed() const;
virtual section_iterator begin_sections() const;
virtual section_iterator end_sections() const;
=20
virtual uint8_t getBytesInAddress() const;
virtual StringRef getFileFormatName() const;
virtual unsigned getArch() const;
+ virtual StringRef getLoadName() const;
+
+ MachOObject *getObject() { return MachOObj; }
+
+ static inline bool classof(const Binary *v) {
+ return v->isMachO();
+ }
+ static inline bool classof(const MachOObjectFile *v) { return true; }
=20
protected:
virtual error_code getSymbolNext(DataRefImpl Symb, SymbolRef &Res) const;
virtual error_code getSymbolName(DataRefImpl Symb, StringRef &Res) const;
- virtual error_code getSymbolOffset(DataRefImpl Symb, uint64_t &Res) cons=
t;
+ virtual error_code getSymbolFileOffset(DataRefImpl Symb, uint64_t &Res) =
const;
virtual error_code getSymbolAddress(DataRefImpl Symb, uint64_t &Res) con=
st;
virtual error_code getSymbolSize(DataRefImpl Symb, uint64_t &Res) const;
virtual error_code getSymbolNMTypeChar(DataRefImpl Symb, char &Res) cons=
t;
- virtual error_code isSymbolInternal(DataRefImpl Symb, bool &Res) const;
- virtual error_code isSymbolGlobal(DataRefImpl Symb, bool &Res) const;
- virtual error_code getSymbolType(DataRefImpl Symb, SymbolRef::SymbolType=
&Res) const;
+ virtual error_code getSymbolFlags(DataRefImpl Symb, uint32_t &Res) const;
+ virtual error_code getSymbolType(DataRefImpl Symb, SymbolRef::Type &Res)=
const;
+ virtual error_code getSymbolSection(DataRefImpl Symb,
+ section_iterator &Res) const;
=20
virtual error_code getSectionNext(DataRefImpl Sec, SectionRef &Res) cons=
t;
virtual error_code getSectionName(DataRefImpl Sec, StringRef &Res) const;
@@ -58,6 +72,10 @@
virtual error_code isSectionText(DataRefImpl Sec, bool &Res) const;
virtual error_code isSectionData(DataRefImpl Sec, bool &Res) const;
virtual error_code isSectionBSS(DataRefImpl Sec, bool &Res) const;
+ virtual error_code isSectionRequiredForExecution(DataRefImpl Sec,
+ bool &Res) const;
+ virtual error_code isSectionVirtual(DataRefImpl Sec, bool &Res) const;
+ virtual error_code isSectionZeroInit(DataRefImpl Sec, bool &Res) const;
virtual error_code sectionContainsSymbol(DataRefImpl DRI, DataRefImpl S,
bool &Result) const;
virtual relocation_iterator getSectionRelBegin(DataRefImpl Sec) const;
@@ -67,16 +85,22 @@
RelocationRef &Res) const;
virtual error_code getRelocationAddress(DataRefImpl Rel,
uint64_t &Res) const;
+ virtual error_code getRelocationOffset(DataRefImpl Rel,
+ uint64_t &Res) const;
virtual error_code getRelocationSymbol(DataRefImpl Rel,
SymbolRef &Res) const;
virtual error_code getRelocationType(DataRefImpl Rel,
- uint32_t &Res) const;
+ uint64_t &Res) const;
virtual error_code getRelocationTypeName(DataRefImpl Rel,
SmallVectorImpl<char> &Result) =
const;
virtual error_code getRelocationAdditionalInfo(DataRefImpl Rel,
int64_t &Res) const;
virtual error_code getRelocationValueString(DataRefImpl Rel,
SmallVectorImpl<char> &Result) =
const;
+ virtual error_code getRelocationHidden(DataRefImpl Rel, bool &Result) co=
nst;
+
+ virtual error_code getLibraryNext(DataRefImpl LibData, LibraryRef &Res) =
const;
+ virtual error_code getLibraryPath(DataRefImpl LibData, StringRef &Res) c=
onst;
=20
private:
MachOObject *MachOObj;
@@ -97,6 +121,9 @@
void getRelocation(DataRefImpl Rel,
InMemoryStruct<macho::RelocationEntry> &Res) const;
std::size_t getSectionIndex(DataRefImpl Sec) const;
+
+ void printRelocationTargetName(InMemoryStruct<macho::RelocationEntry>& R=
E,
+ raw_string_ostream &fmt) const;
};
=20
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Object/=
MachOObject.h
--- a/head/contrib/llvm/include/llvm/Object/MachOObject.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Object/MachOObject.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -177,14 +177,14 @@
void ReadULEB128s(uint64_t Index, SmallVectorImpl<uint64_t> &Out) const;
=20
/// @}
- =20
+
/// @name Object Dump Facilities
/// @{
/// dump - Support for debugging, callable in GDB: V->dump()
//
void dump() const;
void dumpHeader() const;
- =20
+
/// print - Implement operator<< on Value.
///
void print(raw_ostream &O) const;
@@ -192,7 +192,7 @@
=20
/// @}
};
- =20
+
inline raw_ostream &operator<<(raw_ostream &OS, const MachOObject &V) {
V.print(OS);
return OS;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Object/=
ObjectFile.h
--- a/head/contrib/llvm/include/llvm/Object/ObjectFile.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Object/ObjectFile.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -20,6 +20,7 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MemoryBuffer.h"
#include <cstring>
+#include <vector>
=20
namespace llvm {
namespace object {
@@ -37,6 +38,9 @@
uint32_t a, b;
} d;
uintptr_t p;
+ DataRefImpl() {
+ std::memset(this, 0, sizeof(DataRefImpl));
+ }
};
=20
template<class content_type>
@@ -78,52 +82,13 @@
return std::memcmp(&a, &b, sizeof(DataRefImpl)) =3D=3D 0;
}
=20
-/// SymbolRef - This is a value type class that represents a single symbol=
in
-/// the list of symbols in the object file.
-class SymbolRef {
- friend class SectionRef;
- DataRefImpl SymbolPimpl;
- const ObjectFile *OwningObject;
+static bool operator <(const DataRefImpl &a, const DataRefImpl &b) {
+ // Check bitwise identical. This is the only legal way to compare a unio=
n w/o
+ // knowing which member is in use.
+ return std::memcmp(&a, &b, sizeof(DataRefImpl)) < 0;
+}
=20
-public:
- SymbolRef() : OwningObject(NULL) {
- std::memset(&SymbolPimpl, 0, sizeof(SymbolPimpl));
- }
-
- enum SymbolType {
- ST_Function,
- ST_Data,
- ST_External, // Defined in another object file
- ST_Other
- };
-
- SymbolRef(DataRefImpl SymbolP, const ObjectFile *Owner);
-
- bool operator=3D=3D(const SymbolRef &Other) const;
-
- error_code getNext(SymbolRef &Result) const;
-
- error_code getName(StringRef &Result) const;
- error_code getAddress(uint64_t &Result) const;
- error_code getOffset(uint64_t &Result) const;
- error_code getSize(uint64_t &Result) const;
- error_code getSymbolType(SymbolRef::SymbolType &Result) const;
-
- /// Returns the ascii char that should be displayed in a symbol table du=
mp via
- /// nm for this symbol.
- error_code getNMTypeChar(char &Result) const;
-
- /// Returns true for symbols that are internal to the object file format=
such
- /// as section symbols.
- error_code isInternal(bool &Result) const;
-
- /// Returns true for symbols that can be used in another objects,
- /// such as library functions
- error_code isGlobal(bool &Result) const;
-
- DataRefImpl getRawDataRefImpl() const;
-};
-typedef content_iterator<SymbolRef> symbol_iterator;
+class SymbolRef;
=20
/// RelocationRef - This is a value type class that represents a single
/// relocation in the list of relocations in the object file.
@@ -132,9 +97,7 @@
const ObjectFile *OwningObject;
=20
public:
- RelocationRef() : OwningObject(NULL) {
- std::memset(&RelocationPimpl, 0, sizeof(RelocationPimpl));
- }
+ RelocationRef() : OwningObject(NULL) { }
=20
RelocationRef(DataRefImpl RelocationP, const ObjectFile *Owner);
=20
@@ -143,8 +106,14 @@
error_code getNext(RelocationRef &Result) const;
=20
error_code getAddress(uint64_t &Result) const;
+ error_code getOffset(uint64_t &Result) const;
error_code getSymbol(SymbolRef &Result) const;
- error_code getType(uint32_t &Result) const;
+ error_code getType(uint64_t &Result) const;
+
+ /// @brief Indicates whether this relocation should hidden when listing
+ /// relocations, usually because it is the trailing part of a multipart
+ /// relocation that will be printed as part of the leading relocation.
+ error_code getHidden(bool &Result) const;
=20
/// @brief Get a string that represents the type of this relocation.
///
@@ -168,13 +137,12 @@
const ObjectFile *OwningObject;
=20
public:
- SectionRef() : OwningObject(NULL) {
- std::memset(&SectionPimpl, 0, sizeof(SectionPimpl));
- }
+ SectionRef() : OwningObject(NULL) { }
=20
SectionRef(DataRefImpl SectionP, const ObjectFile *Owner);
=20
bool operator=3D=3D(const SectionRef &Other) const;
+ bool operator <(const SectionRef &Other) const;
=20
error_code getNext(SectionRef &Result) const;
=20
@@ -190,21 +158,112 @@
error_code isText(bool &Result) const;
error_code isData(bool &Result) const;
error_code isBSS(bool &Result) const;
+ error_code isRequiredForExecution(bool &Result) const;
+ error_code isVirtual(bool &Result) const;
+ error_code isZeroInit(bool &Result) const;
=20
error_code containsSymbol(SymbolRef S, bool &Result) const;
=20
relocation_iterator begin_relocations() const;
relocation_iterator end_relocations() const;
+
+ DataRefImpl getRawDataRefImpl() const;
};
typedef content_iterator<SectionRef> section_iterator;
=20
+/// SymbolRef - This is a value type class that represents a single symbol=
in
+/// the list of symbols in the object file.
+class SymbolRef {
+ friend class SectionRef;
+ DataRefImpl SymbolPimpl;
+ const ObjectFile *OwningObject;
+
+public:
+ SymbolRef() : OwningObject(NULL) { }
+
+ enum Type {
+ ST_Unknown, // Type not specified
+ ST_Data,
+ ST_Debug,
+ ST_File,
+ ST_Function,
+ ST_Other
+ };
+
+ enum Flags {
+ SF_None =3D 0,
+ SF_Undefined =3D 1U << 0, // Symbol is defined in another objec=
t file
+ SF_Global =3D 1U << 1, // Global symbol
+ SF_Weak =3D 1U << 2, // Weak symbol
+ SF_Absolute =3D 1U << 3, // Absolute symbol
+ SF_ThreadLocal =3D 1U << 4, // Thread local symbol
+ SF_Common =3D 1U << 5, // Symbol has common linkage
+ SF_FormatSpecific =3D 1U << 31 // Specific to the object file format
+ // (e.g. section symbols)
+ };
+
+ SymbolRef(DataRefImpl SymbolP, const ObjectFile *Owner);
+
+ bool operator=3D=3D(const SymbolRef &Other) const;
+ bool operator <(const SymbolRef &Other) const;
+
+ error_code getNext(SymbolRef &Result) const;
+
+ error_code getName(StringRef &Result) const;
+ error_code getAddress(uint64_t &Result) const;
+ error_code getFileOffset(uint64_t &Result) const;
+ error_code getSize(uint64_t &Result) const;
+ error_code getType(SymbolRef::Type &Result) const;
+
+ /// Returns the ascii char that should be displayed in a symbol table du=
mp via
+ /// nm for this symbol.
+ error_code getNMTypeChar(char &Result) const;
+
+ /// Get symbol flags (bitwise OR of SymbolRef::Flags)
+ error_code getFlags(uint32_t &Result) const;
+
+ /// @brief Return true for common symbols such as uninitialized globals
+ error_code isCommon(bool &Result) const;
+
+ /// @brief Get section this symbol is defined in reference to. Result is
+ /// end_sections() if it is undefined or is an absolute symbol.
+ error_code getSection(section_iterator &Result) const;
+
+ DataRefImpl getRawDataRefImpl() const;
+};
+typedef content_iterator<SymbolRef> symbol_iterator;
+
+/// LibraryRef - This is a value type class that represents a single libra=
ry in
+/// the list of libraries needed by a shared or dynamic object.
+class LibraryRef {
+ friend class SectionRef;
+ DataRefImpl LibraryPimpl;
+ const ObjectFile *OwningObject;
+
+public:
+ LibraryRef() : OwningObject(NULL) { }
+
+ LibraryRef(DataRefImpl LibraryP, const ObjectFile *Owner);
+
+ bool operator=3D=3D(const LibraryRef &Other) const;
+ bool operator <(const LibraryRef &Other) const;
+
+ error_code getNext(LibraryRef &Result) const;
+
+ // Get the path to this library, as stored in the object file.
+ error_code getPath(StringRef &Result) const;
+
+ DataRefImpl getRawDataRefImpl() const;
+};
+typedef content_iterator<LibraryRef> library_iterator;
+
const uint64_t UnknownAddressOrSize =3D ~0ULL;
=20
/// ObjectFile - This class is the base class for all object file types.
/// Concrete instances of this object are created by createObjectFile, whi=
ch
/// figure out which type to create.
class ObjectFile : public Binary {
-private:
+ virtual void anchor();
ObjectFile(); // =3D delete
ObjectFile(const ObjectFile &other); // =3D delete
=20
@@ -227,12 +286,15 @@
virtual error_code getSymbolNext(DataRefImpl Symb, SymbolRef &Res) const=
=3D 0;
virtual error_code getSymbolName(DataRefImpl Symb, StringRef &Res) const=
=3D 0;
virtual error_code getSymbolAddress(DataRefImpl Symb, uint64_t &Res) con=
st =3D0;
- virtual error_code getSymbolOffset(DataRefImpl Symb, uint64_t &Res) cons=
t =3D0;
+ virtual error_code getSymbolFileOffset(DataRefImpl Symb, uint64_t &Res) =
const =3D0;
virtual error_code getSymbolSize(DataRefImpl Symb, uint64_t &Res) const =
=3D 0;
+ virtual error_code getSymbolType(DataRefImpl Symb,
+ SymbolRef::Type &Res) const =3D 0;
virtual error_code getSymbolNMTypeChar(DataRefImpl Symb, char &Res) cons=
t =3D 0;
- virtual error_code isSymbolInternal(DataRefImpl Symb, bool &Res) const =
=3D 0;
- virtual error_code isSymbolGlobal(DataRefImpl Symb, bool &Res) const =3D=
0;
- virtual error_code getSymbolType(DataRefImpl Symb, SymbolRef::SymbolType=
&Res) const =3D 0;
+ virtual error_code getSymbolFlags(DataRefImpl Symb,
+ uint32_t &Res) const =3D 0;
+ virtual error_code getSymbolSection(DataRefImpl Symb,
+ section_iterator &Res) const =3D 0;
=20
// Same as above for SectionRef.
friend class SectionRef;
@@ -245,6 +307,11 @@
virtual error_code isSectionText(DataRefImpl Sec, bool &Res) const =3D 0;
virtual error_code isSectionData(DataRefImpl Sec, bool &Res) const =3D 0;
virtual error_code isSectionBSS(DataRefImpl Sec, bool &Res) const =3D 0;
+ virtual error_code isSectionRequiredForExecution(DataRefImpl Sec,
+ bool &Res) const =3D 0;
+ // A section is 'virtual' if its contents aren't present in the object i=
mage.
+ virtual error_code isSectionVirtual(DataRefImpl Sec, bool &Res) const =
=3D 0;
+ virtual error_code isSectionZeroInit(DataRefImpl Sec, bool &Res) const =
=3D 0;
virtual error_code sectionContainsSymbol(DataRefImpl Sec, DataRefImpl Sy=
mb,
bool &Result) const =3D 0;
virtual relocation_iterator getSectionRelBegin(DataRefImpl Sec) const =
=3D 0;
@@ -257,25 +324,42 @@
RelocationRef &Res) const =3D 0;
virtual error_code getRelocationAddress(DataRefImpl Rel,
uint64_t &Res) const =3D0;
+ virtual error_code getRelocationOffset(DataRefImpl Rel,
+ uint64_t &Res) const =3D0;
virtual error_code getRelocationSymbol(DataRefImpl Rel,
SymbolRef &Res) const =3D 0;
virtual error_code getRelocationType(DataRefImpl Rel,
- uint32_t &Res) const =3D 0;
+ uint64_t &Res) const =3D 0;
virtual error_code getRelocationTypeName(DataRefImpl Rel,
SmallVectorImpl<char> &Result) cons=
t =3D 0;
virtual error_code getRelocationAdditionalInfo(DataRefImpl Rel,
int64_t &Res) const =3D 0;
virtual error_code getRelocationValueString(DataRefImpl Rel,
SmallVectorImpl<char> &Result) cons=
t =3D 0;
+ virtual error_code getRelocationHidden(DataRefImpl Rel, bool &Result) co=
nst {
+ Result =3D false;
+ return object_error::success;
+ }
+
+ // Same for LibraryRef
+ friend class LibraryRef;
+ virtual error_code getLibraryNext(DataRefImpl Lib, LibraryRef &Res) cons=
t =3D 0;
+ virtual error_code getLibraryPath(DataRefImpl Lib, StringRef &Res) const=
=3D 0;
=20
public:
=20
virtual symbol_iterator begin_symbols() const =3D 0;
virtual symbol_iterator end_symbols() const =3D 0;
=20
+ virtual symbol_iterator begin_dynamic_symbols() const =3D 0;
+ virtual symbol_iterator end_dynamic_symbols() const =3D 0;
+
virtual section_iterator begin_sections() const =3D 0;
virtual section_iterator end_sections() const =3D 0;
=20
+ virtual library_iterator begin_libraries_needed() const =3D 0;
+ virtual library_iterator end_libraries_needed() const =3D 0;
+
/// @brief The number of bytes used to represent an address in this obje=
ct
/// file format.
virtual uint8_t getBytesInAddress() const =3D 0;
@@ -283,6 +367,11 @@
virtual StringRef getFileFormatName() const =3D 0;
virtual /* Triple::ArchType */ unsigned getArch() const =3D 0;
=20
+ /// For shared objects, returns the name which this object should be
+ /// loaded from at runtime. This corresponds to DT_SONAME on ELF and
+ /// LC_ID_DYLIB (install name) on MachO.
+ virtual StringRef getLoadName() const =3D 0;
+
/// @returns Pointer to ObjectFile subclass to handle this type of objec=
t.
/// @param ObjectPath The path to the object file. ObjectPath.isObject m=
ust
/// return true.
@@ -291,8 +380,7 @@
static ObjectFile *createObjectFile(MemoryBuffer *Object);
=20
static inline bool classof(const Binary *v) {
- return v->getType() >=3D isObject &&
- v->getType() < lastObject;
+ return v->isObject();
}
static inline bool classof(const ObjectFile *v) { return true; }
=20
@@ -311,6 +399,10 @@
return SymbolPimpl =3D=3D Other.SymbolPimpl;
}
=20
+inline bool SymbolRef::operator <(const SymbolRef &Other) const {
+ return SymbolPimpl < Other.SymbolPimpl;
+}
+
inline error_code SymbolRef::getNext(SymbolRef &Result) const {
return OwningObject->getSymbolNext(SymbolPimpl, Result);
}
@@ -323,8 +415,8 @@
return OwningObject->getSymbolAddress(SymbolPimpl, Result);
}
=20
-inline error_code SymbolRef::getOffset(uint64_t &Result) const {
- return OwningObject->getSymbolOffset(SymbolPimpl, Result);
+inline error_code SymbolRef::getFileOffset(uint64_t &Result) const {
+ return OwningObject->getSymbolFileOffset(SymbolPimpl, Result);
}
=20
inline error_code SymbolRef::getSize(uint64_t &Result) const {
@@ -335,15 +427,15 @@
return OwningObject->getSymbolNMTypeChar(SymbolPimpl, Result);
}
=20
-inline error_code SymbolRef::isInternal(bool &Result) const {
- return OwningObject->isSymbolInternal(SymbolPimpl, Result);
+inline error_code SymbolRef::getFlags(uint32_t &Result) const {
+ return OwningObject->getSymbolFlags(SymbolPimpl, Result);
}
=20
-inline error_code SymbolRef::isGlobal(bool &Result) const {
- return OwningObject->isSymbolGlobal(SymbolPimpl, Result);
+inline error_code SymbolRef::getSection(section_iterator &Result) const {
+ return OwningObject->getSymbolSection(SymbolPimpl, Result);
}
=20
-inline error_code SymbolRef::getSymbolType(SymbolRef::SymbolType &Result) =
const {
+inline error_code SymbolRef::getType(SymbolRef::Type &Result) const {
return OwningObject->getSymbolType(SymbolPimpl, Result);
}
=20
@@ -362,6 +454,10 @@
return SectionPimpl =3D=3D Other.SectionPimpl;
}
=20
+inline bool SectionRef::operator <(const SectionRef &Other) const {
+ return SectionPimpl < Other.SectionPimpl;
+}
+
inline error_code SectionRef::getNext(SectionRef &Result) const {
return OwningObject->getSectionNext(SectionPimpl, Result);
}
@@ -398,6 +494,18 @@
return OwningObject->isSectionBSS(SectionPimpl, Result);
}
=20
+inline error_code SectionRef::isRequiredForExecution(bool &Result) const {
+ return OwningObject->isSectionRequiredForExecution(SectionPimpl, Result);
+}
+
+inline error_code SectionRef::isVirtual(bool &Result) const {
+ return OwningObject->isSectionVirtual(SectionPimpl, Result);
+}
+
+inline error_code SectionRef::isZeroInit(bool &Result) const {
+ return OwningObject->isSectionZeroInit(SectionPimpl, Result);
+}
+
inline error_code SectionRef::containsSymbol(SymbolRef S, bool &Result) co=
nst {
return OwningObject->sectionContainsSymbol(SectionPimpl, S.SymbolPimpl,
Result);
@@ -411,6 +519,9 @@
return OwningObject->getSectionRelEnd(SectionPimpl);
}
=20
+inline DataRefImpl SectionRef::getRawDataRefImpl() const {
+ return SectionPimpl;
+}
=20
/// RelocationRef
inline RelocationRef::RelocationRef(DataRefImpl RelocationP,
@@ -430,11 +541,15 @@
return OwningObject->getRelocationAddress(RelocationPimpl, Result);
}
=20
+inline error_code RelocationRef::getOffset(uint64_t &Result) const {
+ return OwningObject->getRelocationOffset(RelocationPimpl, Result);
+}
+
inline error_code RelocationRef::getSymbol(SymbolRef &Result) const {
return OwningObject->getRelocationSymbol(RelocationPimpl, Result);
}
=20
-inline error_code RelocationRef::getType(uint32_t &Result) const {
+inline error_code RelocationRef::getType(uint64_t &Result) const {
return OwningObject->getRelocationType(RelocationPimpl, Result);
}
=20
@@ -452,6 +567,30 @@
return OwningObject->getRelocationValueString(RelocationPimpl, Result);
}
=20
+inline error_code RelocationRef::getHidden(bool &Result) const {
+ return OwningObject->getRelocationHidden(RelocationPimpl, Result);
+}
+// Inline function definitions.
+inline LibraryRef::LibraryRef(DataRefImpl LibraryP, const ObjectFile *Owne=
r)
+ : LibraryPimpl(LibraryP)
+ , OwningObject(Owner) {}
+
+inline bool LibraryRef::operator=3D=3D(const LibraryRef &Other) const {
+ return LibraryPimpl =3D=3D Other.LibraryPimpl;
+}
+
+inline bool LibraryRef::operator <(const LibraryRef &Other) const {
+ return LibraryPimpl < Other.LibraryPimpl;
+}
+
+inline error_code LibraryRef::getNext(LibraryRef &Result) const {
+ return OwningObject->getLibraryNext(LibraryPimpl, Result);
+}
+
+inline error_code LibraryRef::getPath(StringRef &Result) const {
+ return OwningObject->getLibraryPath(LibraryPimpl, Result);
+}
+
} // end namespace object
} // end namespace llvm
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Operato=
r.h
--- a/head/contrib/llvm/include/llvm/Operator.h Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/llvm/include/llvm/Operator.h Tue Apr 17 11:51:51 2012 +0=
300
@@ -261,8 +261,8 @@
=20
/// getPointerOperandType - Method to return the pointer operand as a
/// PointerType.
- PointerType *getPointerOperandType() const {
- return reinterpret_cast<PointerType*>(getPointerOperand()->getType());
+ Type *getPointerOperandType() const {
+ return getPointerOperand()->getType();
}
=20
unsigned getNumIndices() const { // Note: always non-negative
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Pass.h
--- a/head/contrib/llvm/include/llvm/Pass.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Pass.h Tue Apr 17 11:51:51 2012 +0300
@@ -53,7 +53,7 @@
/// Ordering of pass manager types is important here.
enum PassManagerType {
PMT_Unknown =3D 0,
- PMT_ModulePassManager =3D 1, ///< MPPassManager=20
+ PMT_ModulePassManager =3D 1, ///< MPPassManager
PMT_CallGraphPassManager, ///< CGPassManager
PMT_FunctionPassManager, ///< FPPassManager
PMT_LoopPassManager, ///< LPPassManager
@@ -84,14 +84,14 @@
PassKind Kind;
void operator=3D(const Pass&); // DO NOT IMPLEMENT
Pass(const Pass &); // DO NOT IMPLEMENT
- =20
+
public:
- explicit Pass(PassKind K, char &pid);
+ explicit Pass(PassKind K, char &pid) : Resolver(0), PassID(&pid), Kind(K=
) { }
virtual ~Pass();
=20
- =20
+
PassKind getPassKind() const { return Kind; }
- =20
+
/// getPassName - Return a nice clean name for a pass. This usually
/// implemented in terms of the name that is registered by one of the
/// Registration templates, but can be overloaded directly.
@@ -99,7 +99,7 @@
virtual const char *getPassName() const;
=20
/// getPassID - Return the PassID number that corresponds to this pass.
- virtual AnalysisID getPassID() const {
+ AnalysisID getPassID() const {
return PassID;
}
=20
@@ -119,12 +119,12 @@
const std::string &Banner) const =3D 0;
=20
/// Each pass is responsible for assigning a pass manager to itself.
- /// PMS is the stack of available pass manager.=20
- virtual void assignPassManager(PMStack &,=20
+ /// PMS is the stack of available pass manager.
+ virtual void assignPassManager(PMStack &,
PassManagerType) {}
/// Check if available pass managers are suitable for this pass or not.
virtual void preparePassManager(PMStack &);
- =20
+
/// Return what kind of Pass Manager can manage this pass.
virtual PassManagerType getPotentialPassManagerType() const;
=20
@@ -159,9 +159,9 @@
virtual void *getAdjustedAnalysisPointer(AnalysisID ID);
virtual ImmutablePass *getAsImmutablePass();
virtual PMDataManager *getAsPMDataManager();
- =20
+
/// verifyAnalysis() - This member can be implemented by a analysis pass=
to
- /// check state of analysis information.=20
+ /// check state of analysis information.
virtual void verifyAnalysis() const;
=20
// dumpPassStructure - Implement the -debug-passes=3DPassStructure option
@@ -175,6 +175,10 @@
// argument string, or null if it is not known.
static const PassInfo *lookupPassInfo(StringRef Arg);
=20
+ // createPass - Create a object for the specified pass class,
+ // or null if it is not known.
+ static Pass *createPass(AnalysisID ID);
+
/// getAnalysisIfAvailable<AnalysisType>() - Subclasses use this functio=
n to
/// get analysis information that might be around, for example to update=
it.
/// This is different than getAnalysis in that it can fail (if the analy=
sis
@@ -226,7 +230,7 @@
/// being operated on.
virtual bool runOnModule(Module &M) =3D 0;
=20
- virtual void assignPassManager(PMStack &PMS,=20
+ virtual void assignPassManager(PMStack &PMS,
PassManagerType T);
=20
/// Return what kind of Pass Manager can manage this pass.
@@ -259,9 +263,9 @@
///
bool runOnModule(Module &) { return false; }
=20
- explicit ImmutablePass(char &pid)=20
+ explicit ImmutablePass(char &pid)
: ModulePass(pid) {}
- =20
+
// Force out-of-line virtual method.
virtual ~ImmutablePass();
};
@@ -286,7 +290,7 @@
/// any necessary per-module initialization.
///
virtual bool doInitialization(Module &);
- =20
+
/// runOnFunction - Virtual method overriden by subclasses to do the
/// per-function processing of the pass.
///
@@ -297,7 +301,7 @@
///
virtual bool doFinalization(Module &);
=20
- virtual void assignPassManager(PMStack &PMS,=20
+ virtual void assignPassManager(PMStack &PMS,
PassManagerType T);
=20
/// Return what kind of Pass Manager can manage this pass.
@@ -348,7 +352,7 @@
///
virtual bool doFinalization(Module &);
=20
- virtual void assignPassManager(PMStack &PMS,=20
+ virtual void assignPassManager(PMStack &PMS,
PassManagerType T);
=20
/// Return what kind of Pass Manager can manage this pass.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/PassAna=
lysisSupport.h
--- a/head/contrib/llvm/include/llvm/PassAnalysisSupport.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/PassAnalysisSupport.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -19,6 +19,7 @@
#ifndef LLVM_PASS_ANALYSIS_SUPPORT_H
#define LLVM_PASS_ANALYSIS_SUPPORT_H
=20
+#include "llvm/Pass.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include <vector>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/PassMan=
ager.h
--- a/head/contrib/llvm/include/llvm/PassManager.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/include/llvm/PassManager.h Tue Apr 17 11:51:51 2012=
+0300
@@ -53,17 +53,13 @@
/// will be destroyed as well, so there is no need to delete the pass. =
This
/// implies that all passes MUST be allocated with 'new'.
void add(Pass *P);
-=20
+
/// run - Execute all of the passes scheduled for execution. Keep track=
of
/// whether any of the passes modifies the module, and if so, return tru=
e.
bool run(Module &M);
=20
private:
- /// addImpl - Add a pass to the queue of passes to run, without
- /// checking whether to add a printer pass.
- void addImpl(Pass *P);
-
- /// PassManagerImpl_New is the actual class. PassManager is just the=20
+ /// PassManagerImpl_New is the actual class. PassManager is just the
/// wraper to publish simple pass manager interface
PassManagerImpl *PM;
};
@@ -75,11 +71,11 @@
/// but does not take ownership of, the specified Module.
explicit FunctionPassManager(Module *M);
~FunctionPassManager();
-=20
+
/// add - Add a pass to the queue of passes to run. This passes
/// ownership of the Pass to the PassManager. When the
/// PassManager_X is destroyed, the pass will be destroyed as well, so
- /// there is no need to delete the pass. (TODO delete passes.)
+ /// there is no need to delete the pass.
/// This implies that all passes MUST be allocated with 'new'.
void add(Pass *P);
=20
@@ -88,20 +84,16 @@
/// so, return true.
///
bool run(Function &F);
- =20
+
/// doInitialization - Run all of the initializers for the function pass=
es.
///
bool doInitialization();
- =20
+
/// doFinalization - Run all of the finalizers for the function passes.
///
bool doFinalization();
- =20
+
private:
- /// addImpl - Add a pass to the queue of passes to run, without
- /// checking whether to add a printer pass.
- void addImpl(Pass *P);
-
FunctionPassManagerImpl *FPM;
Module *M;
};
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/PassMan=
agers.h
--- a/head/contrib/llvm/include/llvm/PassManagers.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/include/llvm/PassManagers.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -7,7 +7,7 @@
//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
//
-// This file declares the LLVM Pass Manager infrastructure.=20
+// This file declares the LLVM Pass Manager infrastructure.
//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
@@ -24,11 +24,11 @@
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// Overview:
// The Pass Manager Infrastructure manages passes. It's responsibilities a=
re:
-//=20
+//
// o Manage optimization pass execution order
// o Make required Analysis information available before pass P is run
// o Release memory occupied by dead passes
-// o If Analysis information is dirtied by a pass then regenerate Analys=
is=20
+// o If Analysis information is dirtied by a pass then regenerate Analys=
is
// information before it is consumed by another pass.
//
// Pass Manager Infrastructure uses multiple pass managers. They are
@@ -43,13 +43,13 @@
//
// [o] class PMTopLevelManager;
//
-// Two top level managers, PassManager and FunctionPassManager, derive fro=
m=20
-// PMTopLevelManager. PMTopLevelManager manages information used by top le=
vel=20
+// Two top level managers, PassManager and FunctionPassManager, derive from
+// PMTopLevelManager. PMTopLevelManager manages information used by top le=
vel
// managers such as last user info.
//
// [o] class PMDataManager;
//
-// PMDataManager manages information, e.g. list of available analysis info=
,=20
+// PMDataManager manages information, e.g. list of available analysis info,
// used by a pass manager to manage execution order of passes. It also pro=
vides
// a place to implement common pass manager APIs. All pass managers derive=
from
// PMDataManager.
@@ -82,7 +82,7 @@
// relies on PassManagerImpl to do all the tasks.
//
// [o] class PassManagerImpl : public Pass, public PMDataManager,
-// public PMDTopLevelManager
+// public PMTopLevelManager
//
// PassManagerImpl is a top level pass manager responsible for managing
// MPPassManagers.
@@ -109,7 +109,7 @@
ON_REGION_MSG, // " 'on Region ...\n'"
ON_LOOP_MSG, // " 'on Loop ...\n'"
ON_CG_MSG // "' on Call Graph ...\n'"
-}; =20
+};
=20
/// PassManagerPrettyStackEntry - This is used to print informative inform=
ation
/// about what pass is running when/if a stack trace is generated.
@@ -124,19 +124,19 @@
: P(p), V(&v), M(0) {} // When P is run on V
PassManagerPrettyStackEntry(Pass *p, Module &m)
: P(p), V(0), M(&m) {} // When P is run on M
- =20
+
/// print - Emit information about this stack frame to OS.
virtual void print(raw_ostream &OS) const;
};
- =20
- =20
+
+
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// PMStack
//
/// PMStack - This class implements a stack data structure of PMDataManager
/// pointers.
///
-/// Top level pass managers (see PassManager.cpp) maintain active Pass Man=
agers=20
+/// Top level pass managers (see PassManager.cpp) maintain active Pass Man=
agers
/// using PMStack. Each Pass implements assignPassManager() to connect its=
elf
/// with appropriate manager. assignPassManager() walks PMStack to find
/// suitable manager.
@@ -174,9 +174,8 @@
void initializeAllAnalysisInfo();
=20
private:
- /// This is implemented by top level pass manager and used by=20
- /// schedulePass() to add analysis info passes that are not available.
- virtual void addTopLevelPass(Pass *P) =3D 0;
+ virtual PMDataManager *getAsPMDataManager() =3D 0;
+ virtual PassManagerType getTopLevelPassManagerType() =3D 0;
=20
public:
/// Schedule pass P for execution. Make sure that passes required by
@@ -198,7 +197,7 @@
/// Find analysis usage information for the pass P.
AnalysisUsage *findAnalysisUsage(Pass *P);
=20
- virtual ~PMTopLevelManager();=20
+ virtual ~PMTopLevelManager();
=20
/// Add immutable pass and initialize it.
inline void addImmutablePass(ImmutablePass *P) {
@@ -228,7 +227,7 @@
PMStack activeStack;
=20
protected:
- =20
+
/// Collection of pass managers
SmallVector<PMDataManager *, 8> PassManagers;
=20
@@ -254,7 +253,7 @@
};
=20
=20
- =20
+
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// PMDataManager
=20
@@ -268,7 +267,7 @@
}
=20
virtual ~PMDataManager();
- =20
+
virtual Pass *getAsPass() =3D 0;
=20
/// Augment AvailableAnalysis by adding analysis made available by pass =
P.
@@ -279,16 +278,16 @@
=20
/// Remove Analysis that is not preserved by the pass
void removeNotPreservedAnalysis(Pass *P);
- =20
+
/// Remove dead passes used by P.
- void removeDeadPasses(Pass *P, StringRef Msg,=20
+ void removeDeadPasses(Pass *P, StringRef Msg,
enum PassDebuggingString);
=20
/// Remove P.
- void freePass(Pass *P, StringRef Msg,=20
+ void freePass(Pass *P, StringRef Msg,
enum PassDebuggingString);
=20
- /// Add pass P into the PassVector. Update=20
+ /// Add pass P into the PassVector. Update
/// AvailableAnalysis appropriately if ProcessAnalysis is true.
void add(Pass *P, bool ProcessAnalysis =3D true);
=20
@@ -300,7 +299,7 @@
virtual Pass *getOnTheFlyPass(Pass *P, AnalysisID PI, Function &F);
=20
/// Initialize available analysis information.
- void initializeAnalysisInfo() {=20
+ void initializeAnalysisInfo() {
AvailableAnalysis.clear();
for (unsigned i =3D 0; i < PMT_Last; ++i)
InheritedAnalysis[i] =3D NULL;
@@ -347,9 +346,9 @@
return (unsigned)PassVector.size();
}
=20
- virtual PassManagerType getPassManagerType() const {=20
+ virtual PassManagerType getPassManagerType() const {
assert ( 0 && "Invalid use of getPassManagerType");
- return PMT_Unknown;=20
+ return PMT_Unknown;
}
=20
std::map<AnalysisID, Pass*> *getAvailableAnalysis() {
@@ -377,17 +376,17 @@
// then PMT_Last active pass mangers.
std::map<AnalysisID, Pass *> *InheritedAnalysis[PMT_Last];
=20
- =20
+
/// isPassDebuggingExecutionsOrMore - Return true if -debug-pass=3DExecu=
tions
/// or higher is specified.
bool isPassDebuggingExecutionsOrMore() const;
- =20
+
private:
void dumpAnalysisUsage(StringRef Msg, const Pass *P,
const AnalysisUsage::VectorType &Set) const;
=20
- // Set of available Analysis. This information is used while scheduling=20
- // pass. If a pass requires an analysis which is not available then=20
+ // Set of available Analysis. This information is used while scheduling
+ // pass. If a pass requires an analysis which is not available then
// the required analysis pass is scheduled to run before the pass itself=
is
// scheduled to run.
std::map<AnalysisID, Pass*> AvailableAnalysis;
@@ -403,27 +402,27 @@
// FPPassManager
//
/// FPPassManager manages BBPassManagers and FunctionPasses.
-/// It batches all function passes and basic block pass managers together =
and=20
-/// sequence them to process one function at a time before processing next=20
+/// It batches all function passes and basic block pass managers together =
and
+/// sequence them to process one function at a time before processing next
/// function.
class FPPassManager : public ModulePass, public PMDataManager {
public:
static char ID;
- explicit FPPassManager()=20
+ explicit FPPassManager()
: ModulePass(ID), PMDataManager() { }
- =20
+
/// run - Execute all of the passes scheduled for execution. Keep track=
of
/// whether any of the passes modifies the module, and if so, return tru=
e.
bool runOnFunction(Function &F);
bool runOnModule(Module &M);
- =20
+
/// cleanup - After running all passes, clean up pass manager cache.
void cleanup();
=20
/// doInitialization - Run all of the initializers for the function pass=
es.
///
bool doInitialization(Module &M);
- =20
+
/// doFinalization - Run all of the finalizers for the function passes.
///
bool doFinalization(Module &M);
@@ -449,8 +448,8 @@
return FP;
}
=20
- virtual PassManagerType getPassManagerType() const {=20
- return PMT_FunctionPassManager;=20
+ virtual PassManagerType getPassManagerType() const {
+ return PMT_FunctionPassManager;
}
};
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/PassSup=
port.h
--- a/head/contrib/llvm/include/llvm/PassSupport.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/include/llvm/PassSupport.h Tue Apr 17 11:51:51 2012=
+0300
@@ -25,6 +25,7 @@
#include "llvm/PassRegistry.h"
#include "llvm/InitializePasses.h"
#include "llvm/Support/Atomic.h"
+#include "llvm/Support/Valgrind.h"
#include <vector>
=20
namespace llvm {
@@ -135,7 +136,10 @@
if (old_val =3D=3D 0) { \
function(Registry); \
sys::MemoryFence(); \
+ TsanIgnoreWritesBegin(); \
+ TsanHappensBefore(&initialized); \
initialized =3D 2; \
+ TsanIgnoreWritesEnd(); \
} else { \
sys::cas_flag tmp =3D initialized; \
sys::MemoryFence(); \
@@ -143,7 +147,8 @@
tmp =3D initialized; \
sys::MemoryFence(); \
} \
- }
+ } \
+ TsanHappensAfter(&initialized);
=20
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis) \
static void* initialize##passName##PassOnce(PassRegistry &Registry) { \
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/BlockFrequency.h
--- a/head/contrib/llvm/include/llvm/Support/BlockFrequency.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/BlockFrequency.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -14,6 +14,8 @@
#ifndef LLVM_SUPPORT_BLOCKFREQUENCY_H
#define LLVM_SUPPORT_BLOCKFREQUENCY_H
=20
+#include "llvm/Support/DataTypes.h"
+
namespace llvm {
=20
class raw_ostream;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/BranchProbability.h
--- a/head/contrib/llvm/include/llvm/Support/BranchProbability.h Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/BranchProbability.h Tue Apr 17=
11:51:51 2012 +0300
@@ -15,6 +15,7 @@
#define LLVM_SUPPORT_BRANCHPROBABILITY_H
=20
#include "llvm/Support/DataTypes.h"
+#include <cassert>
=20
namespace llvm {
=20
@@ -22,7 +23,6 @@
=20
// This class represents Branch Probability as a non-negative fraction.
class BranchProbability {
-
// Numerator
uint32_t N;
=20
@@ -30,19 +30,44 @@
uint32_t D;
=20
public:
- BranchProbability(uint32_t n, uint32_t d);
+ BranchProbability(uint32_t n, uint32_t d) : N(n), D(d) {
+ assert(d > 0 && "Denomiator cannot be 0!");
+ assert(n <=3D d && "Probability cannot be bigger than 1!");
+ }
+
+ static BranchProbability getZero() { return BranchProbability(0, 1); }
+ static BranchProbability getOne() { return BranchProbability(1, 1); }
=20
uint32_t getNumerator() const { return N; }
uint32_t getDenominator() const { return D; }
=20
// Return (1 - Probability).
- BranchProbability getCompl() {
+ BranchProbability getCompl() const {
return BranchProbability(D - N, D);
}
=20
void print(raw_ostream &OS) const;
=20
void dump() const;
+
+ bool operator=3D=3D(BranchProbability RHS) const {
+ return (uint64_t)N * RHS.D =3D=3D (uint64_t)D * RHS.N;
+ }
+ bool operator!=3D(BranchProbability RHS) const {
+ return !(*this =3D=3D RHS);
+ }
+ bool operator<(BranchProbability RHS) const {
+ return (uint64_t)N * RHS.D < (uint64_t)D * RHS.N;
+ }
+ bool operator>(BranchProbability RHS) const {
+ return RHS < *this;
+ }
+ bool operator<=3D(BranchProbability RHS) const {
+ return (uint64_t)N * RHS.D <=3D (uint64_t)D * RHS.N;
+ }
+ bool operator>=3D(BranchProbability RHS) const {
+ return RHS <=3D *this;
+ }
};
=20
raw_ostream &operator<<(raw_ostream &OS, const BranchProbability &Prob);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/CFG.h
--- a/head/contrib/llvm/include/llvm/Support/CFG.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/include/llvm/Support/CFG.h Tue Apr 17 11:51:51 2012=
+0300
@@ -71,6 +71,12 @@
unsigned getOperandNo() const {
return It.getOperandNo();
}
+
+ /// getUse - Return the operand Use in the predecessor's terminator
+ /// of the successor.
+ Use &getUse() const {
+ return It.getUse();
+ }
};
=20
typedef PredIterator<BasicBlock, Value::use_iterator> pred_iterator;
@@ -314,6 +320,7 @@
typedef Function::iterator nodes_iterator;
static nodes_iterator nodes_begin(Function *F) { return F->begin(); }
static nodes_iterator nodes_end (Function *F) { return F->end(); }
+ static unsigned size (Function *F) { return F->size(); }
};
template <> struct GraphTraits<const Function*> :
public GraphTraits<const BasicBlock*> {
@@ -323,6 +330,7 @@
typedef Function::const_iterator nodes_iterator;
static nodes_iterator nodes_begin(const Function *F) { return F->begin()=
; }
static nodes_iterator nodes_end (const Function *F) { return F->end(); }
+ static unsigned size (const Function *F) { return F->size();=
}
};
=20
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/COFF.h
--- a/head/contrib/llvm/include/llvm/Support/COFF.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/include/llvm/Support/COFF.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -24,6 +24,7 @@
#define LLVM_SUPPORT_WIN_COFF_H
=20
#include "llvm/Support/DataTypes.h"
+#include <cassert>
#include <cstring>
=20
namespace llvm {
@@ -49,8 +50,65 @@
};
=20
enum MachineTypes {
- IMAGE_FILE_MACHINE_I386 =3D 0x14C,
- IMAGE_FILE_MACHINE_AMD64 =3D 0x8664
+ IMAGE_FILE_MACHINE_UNKNOWN =3D 0x0,
+ IMAGE_FILE_MACHINE_AM33 =3D 0x13,
+ IMAGE_FILE_MACHINE_AMD64 =3D 0x8664,
+ IMAGE_FILE_MACHINE_ARM =3D 0x1C0,
+ IMAGE_FILE_MACHINE_ARMV7 =3D 0x1C4,
+ IMAGE_FILE_MACHINE_EBC =3D 0xEBC,
+ IMAGE_FILE_MACHINE_I386 =3D 0x14C,
+ IMAGE_FILE_MACHINE_IA64 =3D 0x200,
+ IMAGE_FILE_MACHINE_M32R =3D 0x9041,
+ IMAGE_FILE_MACHINE_MIPS16 =3D 0x266,
+ IMAGE_FILE_MACHINE_MIPSFPU =3D 0x366,
+ IMAGE_FILE_MACHINE_MIPSFPU16 =3D 0x466,
+ IMAGE_FILE_MACHINE_POWERPC =3D 0x1F0,
+ IMAGE_FILE_MACHINE_POWERPCFP =3D 0x1F1,
+ IMAGE_FILE_MACHINE_R4000 =3D 0x166,
+ IMAGE_FILE_MACHINE_SH3 =3D 0x1A2,
+ IMAGE_FILE_MACHINE_SH3DSP =3D 0x1A3,
+ IMAGE_FILE_MACHINE_SH4 =3D 0x1A6,
+ IMAGE_FILE_MACHINE_SH5 =3D 0x1A8,
+ IMAGE_FILE_MACHINE_THUMB =3D 0x1C2,
+ IMAGE_FILE_MACHINE_WCEMIPSV2 =3D 0x169
+ };
+
+ enum Characteristics {
+ /// The file does not contain base relocations and must be loaded at i=
ts
+ /// preferred base. If this cannot be done, the loader will error.
+ IMAGE_FILE_RELOCS_STRIPPED =3D 0x0001,
+ /// The file is valid and can be run.
+ IMAGE_FILE_EXECUTABLE_IMAGE =3D 0x0002,
+ /// COFF line numbers have been stripped. This is deprecated and shoul=
d be
+ /// 0.
+ IMAGE_FILE_LINE_NUMS_STRIPPED =3D 0x0004,
+ /// COFF symbol table entries for local symbols have been removed. Thi=
s is
+ /// deprecated and should be 0.
+ IMAGE_FILE_LOCAL_SYMS_STRIPPED =3D 0x0008,
+ /// Aggressively trim working set. This is deprecated and must be 0.
+ IMAGE_FILE_AGGRESSIVE_WS_TRIM =3D 0x0010,
+ /// Image can handle > 2GiB addresses.
+ IMAGE_FILE_LARGE_ADDRESS_AWARE =3D 0x0020,
+ /// Little endian: the LSB precedes the MSB in memory. This is depreca=
ted
+ /// and should be 0.
+ IMAGE_FILE_BYTES_REVERSED_LO =3D 0x0080,
+ /// Machine is based on a 32bit word architecture.
+ IMAGE_FILE_32BIT_MACHINE =3D 0x0100,
+ /// Debugging info has been removed.
+ IMAGE_FILE_DEBUG_STRIPPED =3D 0x0200,
+ /// If the image is on removable media, fully load it and copy it to s=
wap.
+ IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP =3D 0x0400,
+ /// If the image is on network media, fully load it and copy it to swa=
p.
+ IMAGE_FILE_NET_RUN_FROM_SWAP =3D 0x0800,
+ /// The image file is a system file, not a user program.
+ IMAGE_FILE_SYSTEM =3D 0x1000,
+ /// The image file is a DLL.
+ IMAGE_FILE_DLL =3D 0x2000,
+ /// This file should only be run on a uniprocessor machine.
+ IMAGE_FILE_UP_SYSTEM_ONLY =3D 0x4000,
+ /// Big endian: the MSB precedes the LSB in memory. This is deprecated
+ /// and should be 0.
+ IMAGE_FILE_BYTES_REVERSED_HI =3D 0x8000
};
=20
struct symbol {
@@ -231,6 +289,24 @@
IMAGE_REL_AMD64_SSPAN32 =3D 0x0010
};
=20
+ enum RelocationTypesARM {
+ IMAGE_REL_ARM_ABSOLUTE =3D 0x0000,
+ IMAGE_REL_ARM_ADDR32 =3D 0x0001,
+ IMAGE_REL_ARM_ADDR32NB =3D 0x0002,
+ IMAGE_REL_ARM_BRANCH24 =3D 0x0003,
+ IMAGE_REL_ARM_BRANCH11 =3D 0x0004,
+ IMAGE_REL_ARM_TOKEN =3D 0x0005,
+ IMAGE_REL_ARM_BLX24 =3D 0x0008,
+ IMAGE_REL_ARM_BLX11 =3D 0x0009,
+ IMAGE_REL_ARM_SECTION =3D 0x000E,
+ IMAGE_REL_ARM_SECREL =3D 0x000F,
+ IMAGE_REL_ARM_MOV32A =3D 0x0010,
+ IMAGE_REL_ARM_MOV32T =3D 0x0011,
+ IMAGE_REL_ARM_BRANCH20T =3D 0x0012,
+ IMAGE_REL_ARM_BRANCH24T =3D 0x0014,
+ IMAGE_REL_ARM_BLX23T =3D 0x0015
+ };
+
enum COMDATType {
IMAGE_COMDAT_SELECT_NODUPLICATES =3D 1,
IMAGE_COMDAT_SELECT_ANY,
@@ -292,7 +368,219 @@
AuxiliarySectionDefinition SectionDefinition;
};
=20
+ /// @brief The Import Directory Table.
+ ///
+ /// There is a single array of these and one entry per imported DLL.
+ struct ImportDirectoryTableEntry {
+ uint32_t ImportLookupTableRVA;
+ uint32_t TimeDateStamp;
+ uint32_t ForwarderChain;
+ uint32_t NameRVA;
+ uint32_t ImportAddressTableRVA;
+ };
+
+ /// @brief The PE32 Import Lookup Table.
+ ///
+ /// There is an array of these for each imported DLL. It represents eith=
er
+ /// the ordinal to import from the target DLL, or a name to lookup and i=
mport
+ /// from the target DLL.
+ ///
+ /// This also happens to be the same format used by the Import Address T=
able
+ /// when it is initially written out to the image.
+ struct ImportLookupTableEntry32 {
+ uint32_t data;
+
+ /// @brief Is this entry specified by ordinal, or name?
+ bool isOrdinal() const { return data & 0x80000000; }
+
+ /// @brief Get the ordinal value of this entry. isOrdinal must be true.
+ uint16_t getOrdinal() const {
+ assert(isOrdinal() && "ILT entry is not an ordinal!");
+ return data & 0xFFFF;
+ }
+
+ /// @brief Set the ordinal value and set isOrdinal to true.
+ void setOrdinal(uint16_t o) {
+ data =3D o;
+ data |=3D 0x80000000;
+ }
+
+ /// @brief Get the Hint/Name entry RVA. isOrdinal must be false.
+ uint32_t getHintNameRVA() const {
+ assert(!isOrdinal() && "ILT entry is not a Hint/Name RVA!");
+ return data;
+ }
+
+ /// @brief Set the Hint/Name entry RVA and set isOrdinal to false.
+ void setHintNameRVA(uint32_t rva) { data =3D rva; }
+ };
+
+ /// @brief The DOS compatible header at the front of all PEs.
+ struct DOSHeader {
+ uint16_t Magic;
+ uint16_t UsedBytesInTheLastPage;
+ uint16_t FileSizeInPages;
+ uint16_t NumberOfRelocationItems;
+ uint16_t HeaderSizeInParagraphs;
+ uint16_t MinimumExtraParagraphs;
+ uint16_t MaximumExtraParagraphs;
+ uint16_t InitialRelativeSS;
+ uint16_t InitialSP;
+ uint16_t Checksum;
+ uint16_t InitialIP;
+ uint16_t InitialRelativeCS;
+ uint16_t AddressOfRelocationTable;
+ uint16_t OverlayNumber;
+ uint16_t Reserved[4];
+ uint16_t OEMid;
+ uint16_t OEMinfo;
+ uint16_t Reserved2[10];
+ uint32_t AddressOfNewExeHeader;
+ };
+
+ struct PEHeader {
+ uint32_t Signature;
+ header COFFHeader;
+ uint16_t Magic;
+ uint8_t MajorLinkerVersion;
+ uint8_t MinorLinkerVersion;
+ uint32_t SizeOfCode;
+ uint32_t SizeOfInitializedData;
+ uint32_t SizeOfUninitializedData;
+ uint32_t AddressOfEntryPoint; // RVA
+ uint32_t BaseOfCode; // RVA
+ uint32_t BaseOfData; // RVA
+ uint64_t ImageBase;
+ uint32_t SectionAlignment;
+ uint32_t FileAlignment;
+ uint16_t MajorOperatingSystemVersion;
+ uint16_t MinorOperatingSystemVersion;
+ uint16_t MajorImageVersion;
+ uint16_t MinorImageVersion;
+ uint16_t MajorSubsystemVersion;
+ uint16_t MinorSubsystemVersion;
+ uint32_t Win32VersionValue;
+ uint32_t SizeOfImage;
+ uint32_t SizeOfHeaders;
+ uint32_t CheckSum;
+ uint16_t Subsystem;
+ uint16_t DLLCharacteristics;
+ uint64_t SizeOfStackReserve;
+ uint64_t SizeOfStackCommit;
+ uint64_t SizeOfHeapReserve;
+ uint64_t SizeOfHeapCommit;
+ uint32_t LoaderFlags;
+ uint32_t NumberOfRvaAndSize;
+ };
+
+ struct DataDirectory {
+ uint32_t RelativeVirtualAddress;
+ uint32_t Size;
+ };
+
+ enum WindowsSubsystem {
+ IMAGE_SUBSYSTEM_UNKNOWN =3D 0, ///< An unknown subsystem.
+ IMAGE_SUBSYSTEM_NATIVE =3D 1, ///< Device drivers and native Windows p=
rocesses
+ IMAGE_SUBSYSTEM_WINDOWS_GUI =3D 2, ///< The Windows GUI subsystem.
+ IMAGE_SUBSYSTEM_WINDOWS_CUI =3D 3, ///< The Windows character subsyste=
m.
+ IMAGE_SUBSYSTEM_POSIX_CUI =3D 7, ///< The POSIX character subsystem.
+ IMAGE_SUBSYSTEM_WINDOWS_CE_GUI =3D 9, ///< Windows CE.
+ IMAGE_SUBSYSTEM_EFI_APPLICATION =3D 10, ///< An EFI application.
+ IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER =3D 11, ///< An EFI driver wit=
h boot
+ /// services.
+ IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER =3D 12, ///< An EFI driver with run=
-time
+ /// services.
+ IMAGE_SUBSYSTEM_EFI_ROM =3D 13, ///< An EFI ROM image.
+ IMAGE_SUBSYSTEM_XBOX =3D 14 ///< XBOX.
+ };
+
+ enum DLLCharacteristics {
+ /// DLL can be relocated at load time.
+ IMAGE_DLL_CHARACTERISTICS_DYNAMIC_BASE =3D 0x0040,
+ /// Code integrity checks are enforced.
+ IMAGE_DLL_CHARACTERISTICS_FORCE_INTEGRITY =3D 0x0080,
+ IMAGE_DLL_CHARACTERISTICS_NX_COMPAT =3D 0x0100, ///< Image is NX compa=
tible.
+ /// Isolation aware, but do not isolate the image.
+ IMAGE_DLL_CHARACTERISTICS_NO_ISOLATION =3D 0x0200,
+ /// Does not use structured exception handling (SEH). No SEH handler m=
ay be
+ /// called in this image.
+ IMAGE_DLL_CHARACTERISTICS_NO_SEH =3D 0x0400,
+ /// Do not bind the image.
+ IMAGE_DLL_CHARACTERISTICS_NO_BIND =3D 0x0800,
+ IMAGE_DLL_CHARACTERISTICS_WDM_DRIVER =3D 0x2000, ///< A WDM driver.
+ /// Terminal Server aware.
+ IMAGE_DLL_CHARACTERISTICS_TERMINAL_SERVER_AWARE =3D 0x8000
+ };
+
+ enum DebugType {
+ IMAGE_DEBUG_TYPE_UNKNOWN =3D 0,
+ IMAGE_DEBUG_TYPE_COFF =3D 1,
+ IMAGE_DEBUG_TYPE_CODEVIEW =3D 2,
+ IMAGE_DEBUG_TYPE_FPO =3D 3,
+ IMAGE_DEBUG_TYPE_MISC =3D 4,
+ IMAGE_DEBUG_TYPE_EXCEPTION =3D 5,
+ IMAGE_DEBUG_TYPE_FIXUP =3D 6,
+ IMAGE_DEBUG_TYPE_OMAP_TO_SRC =3D 7,
+ IMAGE_DEBUG_TYPE_OMAP_FROM_SRC =3D 8,
+ IMAGE_DEBUG_TYPE_BORLAND =3D 9,
+ IMAGE_DEBUG_TYPE_CLSID =3D 11
+ };
+
+ enum BaseRelocationType {
+ IMAGE_REL_BASED_ABSOLUTE =3D 0,
+ IMAGE_REL_BASED_HIGH =3D 1,
+ IMAGE_REL_BASED_LOW =3D 2,
+ IMAGE_REL_BASED_HIGHLOW =3D 3,
+ IMAGE_REL_BASED_HIGHADJ =3D 4,
+ IMAGE_REL_BASED_MIPS_JMPADDR =3D 5,
+ IMAGE_REL_BASED_ARM_MOV32A =3D 5,
+ IMAGE_REL_BASED_ARM_MOV32T =3D 7,
+ IMAGE_REL_BASED_MIPS_JMPADDR16 =3D 9,
+ IMAGE_REL_BASED_DIR64 =3D 10
+ };
+
+ enum ImportType {
+ IMPORT_CODE =3D 0,
+ IMPORT_DATA =3D 1,
+ IMPORT_CONST =3D 2
+ };
+
+ enum ImportNameType {
+ /// Import is by ordinal. This indicates that the value in the Ordinal=
/Hint
+ /// field of the import header is the import's ordinal. If this consta=
nt is
+ /// not specified, then the Ordinal/Hint field should always be interp=
reted
+ /// as the import's hint.
+ IMPORT_ORDINAL =3D 0,
+ /// The import name is identical to the public symbol name
+ IMPORT_NAME =3D 1,
+ /// The import name is the public symbol name, but skipping the leadin=
g ?,
+ /// @, or optionally _.
+ IMPORT_NAME_NOPREFIX =3D 2,
+ /// The import name is the public symbol name, but skipping the leadin=
g ?,
+ /// @, or optionally _, and truncating at the first @.
+ IMPORT_NAME_UNDECORATE =3D 3
+ };
+
+ struct ImportHeader {
+ uint16_t Sig1; ///< Must be IMAGE_FILE_MACHINE_UNKNOWN (0).
+ uint16_t Sig2; ///< Must be 0xFFFF.
+ uint16_t Version;
+ uint16_t Machine;
+ uint32_t TimeDateStamp;
+ uint32_t SizeOfData;
+ uint16_t OrdinalHint;
+ uint16_t TypeInfo;
+
+ ImportType getType() const {
+ return static_cast<ImportType>(TypeInfo & 0x3);
+ }
+
+ ImportNameType getNameType() const {
+ return static_cast<ImportNameType>((TypeInfo & 0x1C) >> 3);
+ }
+ };
+
+} // End namespace COFF.
} // End namespace llvm.
-} // End namespace COFF.
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/CallSite.h
--- a/head/contrib/llvm/include/llvm/Support/CallSite.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/CallSite.h Tue Apr 17 11:51:51=
2012 +0300
@@ -237,6 +237,16 @@
#undef CALLSITE_DELEGATE_GETTER
#undef CALLSITE_DELEGATE_SETTER
=20
+ /// @brief Determine whether this argument is not captured.
+ bool doesNotCapture(unsigned ArgNo) const {
+ return paramHasAttr(ArgNo + 1, Attribute::NoCapture);
+ }
+
+ /// @brief Determine whether this argument is passed by value.
+ bool isByValArgument(unsigned ArgNo) const {
+ return paramHasAttr(ArgNo + 1, Attribute::ByVal);
+ }
+
/// hasArgument - Returns true if this CallSite passes the given Value* =
as an
/// argument to the called function.
bool hasArgument(const Value *Arg) const {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/Capacity.h
--- a/head/contrib/llvm/include/llvm/Support/Capacity.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/Capacity.h Tue Apr 17 11:51:51=
2012 +0300
@@ -15,6 +15,8 @@
#ifndef LLVM_SUPPORT_CAPACITY_H
#define LLVM_SUPPORT_CAPACITY_H
=20
+#include <cstddef>
+
namespace llvm {
=20
template <typename T>
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/CodeGen.h
--- a/head/contrib/llvm/include/llvm/Support/CodeGen.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/CodeGen.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -27,6 +27,26 @@
enum Model { Default, JITDefault, Small, Kernel, Medium, Large };
}
=20
+ // TLS models.
+ namespace TLSModel {
+ enum Model {
+ GeneralDynamic,
+ LocalDynamic,
+ InitialExec,
+ LocalExec
+ };
+ }
+
+ // Code generation optimization level.
+ namespace CodeGenOpt {
+ enum Level {
+ None, // -O0
+ Less, // -O1
+ Default, // -O2, -Os
+ Aggressive // -O3
+ };
+ }
+
} // end llvm namespace
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/CommandLine.h
--- a/head/contrib/llvm/include/llvm/Support/CommandLine.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/CommandLine.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -40,7 +40,7 @@
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// ParseCommandLineOptions - Command line option processing entry point.
//
-void ParseCommandLineOptions(int argc, char **argv,
+void ParseCommandLineOptions(int argc, const char * const *argv,
const char *Overview =3D 0,
bool ReadResponseFiles =3D false);
=20
@@ -83,10 +83,10 @@
//
=20
enum NumOccurrencesFlag { // Flags for the number of occurrences allo=
wed
- Optional =3D 0x01, // Zero or One occurrence
- ZeroOrMore =3D 0x02, // Zero or more occurrences allowed
- Required =3D 0x03, // One occurrence required
- OneOrMore =3D 0x04, // One or more occurrences required
+ Optional =3D 0x00, // Zero or One occurrence
+ ZeroOrMore =3D 0x01, // Zero or more occurrences allowed
+ Required =3D 0x02, // One occurrence required
+ OneOrMore =3D 0x03, // One or more occurrences required
=20
// ConsumeAfter - Indicates that this option is fed anything that follow=
s the
// last positional argument required by the application (it is an error =
if
@@ -95,23 +95,20 @@
// found. Once a filename is found, all of the succeeding arguments are
// passed, unprocessed, to the ConsumeAfter option.
//
- ConsumeAfter =3D 0x05,
-
- OccurrencesMask =3D 0x07
+ ConsumeAfter =3D 0x04
};
=20
enum ValueExpected { // Is a value required for the option?
- ValueOptional =3D 0x08, // The value can appear... or not
- ValueRequired =3D 0x10, // The value is required to appear!
- ValueDisallowed =3D 0x18, // A value may not be specified (for flag=
s)
- ValueMask =3D 0x18
+ // zero reserved for the unspecified value
+ ValueOptional =3D 0x01, // The value can appear... or not
+ ValueRequired =3D 0x02, // The value is required to appear!
+ ValueDisallowed =3D 0x03 // A value may not be specified (for flag=
s)
};
=20
enum OptionHidden { // Control whether -help shows this option
- NotHidden =3D 0x20, // Option included in -help & -help-hidden
- Hidden =3D 0x40, // -help doesn't, but -help-hidden does
- ReallyHidden =3D 0x60, // Neither -help nor -help-hidden show th=
is arg
- HiddenMask =3D 0x60
+ NotHidden =3D 0x00, // Option included in -help & -help-hidden
+ Hidden =3D 0x01, // -help doesn't, but -help-hidden does
+ ReallyHidden =3D 0x02 // Neither -help nor -help-hidden show th=
is arg
};
=20
// Formatting flags - This controls special features that the option might=
have
@@ -130,18 +127,16 @@
//
=20
enum FormattingFlags {
- NormalFormatting =3D 0x000, // Nothing special
- Positional =3D 0x080, // Is a positional argument, no '-' requ=
ired
- Prefix =3D 0x100, // Can this option directly prefix its v=
alue?
- Grouping =3D 0x180, // Can this option group with other opti=
ons?
- FormattingMask =3D 0x180 // Union of the above flags.
+ NormalFormatting =3D 0x00, // Nothing special
+ Positional =3D 0x01, // Is a positional argument, no '-' requi=
red
+ Prefix =3D 0x02, // Can this option directly prefix its va=
lue?
+ Grouping =3D 0x03 // Can this option group with other optio=
ns?
};
=20
enum MiscFlags { // Miscellaneous flags to adjust argument
- CommaSeparated =3D 0x200, // Should this cl::list split between com=
mas?
- PositionalEatsArgs =3D 0x400, // Should this positional cl::list eat -a=
rgs?
- Sink =3D 0x800, // Should this cl::list eat all unknown o=
ptions?
- MiscMask =3D 0xE00 // Union of the above flags.
+ CommaSeparated =3D 0x01, // Should this cl::list split between comm=
as?
+ PositionalEatsArgs =3D 0x02, // Should this positional cl::list eat -ar=
gs?
+ Sink =3D 0x04 // Should this cl::list eat all unknown op=
tions?
};
=20
=20
@@ -168,7 +163,15 @@
virtual void anchor();
=20
int NumOccurrences; // The number of times specified
- int Flags; // Flags for the argument
+ // Occurrences, HiddenFlag, and Formatting are all enum types but to avo=
id
+ // problems with signed enums in bitfields.
+ unsigned Occurrences : 3; // enum NumOccurrencesFlag
+ // not using the enum type for 'Value' because zero is an implementation
+ // detail representing the non-value
+ unsigned Value : 2;
+ unsigned HiddenFlag : 2; // enum OptionHidden
+ unsigned Formatting : 2; // enum FormattingFlags
+ unsigned Misc : 3;
unsigned Position; // Position of last occurrence of the option
unsigned AdditionalVals;// Greater than 0 for multi-valued option.
Option *NextRegistered; // Singly linked list of registered options.
@@ -178,21 +181,20 @@
const char *ValueStr; // String describing what the value of this opti=
on is
=20
inline enum NumOccurrencesFlag getNumOccurrencesFlag() const {
- return static_cast<enum NumOccurrencesFlag>(Flags & OccurrencesMask);
+ return (enum NumOccurrencesFlag)Occurrences;
}
inline enum ValueExpected getValueExpectedFlag() const {
- int VE =3D Flags & ValueMask;
- return VE ? static_cast<enum ValueExpected>(VE)
+ return Value ? ((enum ValueExpected)Value)
: getValueExpectedFlagDefault();
}
inline enum OptionHidden getOptionHiddenFlag() const {
- return static_cast<enum OptionHidden>(Flags & HiddenMask);
+ return (enum OptionHidden)HiddenFlag;
}
inline enum FormattingFlags getFormattingFlag() const {
- return static_cast<enum FormattingFlags>(Flags & FormattingMask);
+ return (enum FormattingFlags)Formatting;
}
inline unsigned getMiscFlags() const {
- return Flags & MiscMask;
+ return Misc;
}
inline unsigned getPosition() const { return Position; }
inline unsigned getNumAdditionalVals() const { return AdditionalVals; }
@@ -206,27 +208,21 @@
void setArgStr(const char *S) { ArgStr =3D S; }
void setDescription(const char *S) { HelpStr =3D S; }
void setValueStr(const char *S) { ValueStr =3D S; }
-
- void setFlag(unsigned Flag, unsigned FlagMask) {
- Flags &=3D ~FlagMask;
- Flags |=3D Flag;
+ void setNumOccurrencesFlag(enum NumOccurrencesFlag Val) {
+ Occurrences =3D Val;
}
-
- void setNumOccurrencesFlag(enum NumOccurrencesFlag Val) {
- setFlag(Val, OccurrencesMask);
- }
- void setValueExpectedFlag(enum ValueExpected Val) { setFlag(Val, ValueMa=
sk); }
- void setHiddenFlag(enum OptionHidden Val) { setFlag(Val, HiddenMask); }
- void setFormattingFlag(enum FormattingFlags V) { setFlag(V, FormattingMa=
sk); }
- void setMiscFlag(enum MiscFlags M) { setFlag(M, M); }
+ void setValueExpectedFlag(enum ValueExpected Val) { Value =3D Val; }
+ void setHiddenFlag(enum OptionHidden Val) { HiddenFlag =3D Val; }
+ void setFormattingFlag(enum FormattingFlags V) { Formatting =3D V; }
+ void setMiscFlag(enum MiscFlags M) { Misc |=3D M; }
void setPosition(unsigned pos) { Position =3D pos; }
protected:
- explicit Option(unsigned DefaultFlags)
- : NumOccurrences(0), Flags(DefaultFlags | NormalFormatting), Position(=
0),
+ explicit Option(enum NumOccurrencesFlag Occurrences,=20
+ enum OptionHidden Hidden)
+ : NumOccurrences(0), Occurrences(Occurrences), HiddenFlag(Hidden),=20
+ Formatting(NormalFormatting), Position(0),
AdditionalVals(0), NextRegistered(0),
ArgStr(""), HelpStr(""), ValueStr("") {
- assert(getNumOccurrencesFlag() !=3D 0 &&
- getOptionHiddenFlag() !=3D 0 && "Not all default flags specifie=
d!");
}
=20
inline void setNumAdditionalVals(unsigned n) { AdditionalVals =3D n; }
@@ -326,6 +322,8 @@
struct GenericOptionValue {
virtual ~GenericOptionValue() {}
virtual bool compare(const GenericOptionValue &V) const =3D 0;
+private:
+ virtual void anchor();
};
=20
template<class DataType> struct OptionValue;
@@ -339,7 +337,7 @@
=20
bool hasValue() const { return false; }
=20
- const DataType &getValue() const { assert(false && "no default value"); }
+ const DataType &getValue() const { llvm_unreachable("no default value");=
}
=20
// Some options may take their value from a different data type.
template<class DT>
@@ -416,6 +414,8 @@
setValue(V);
return *this;
}
+private:
+ virtual void anchor();
};
=20
template<>
@@ -431,6 +431,8 @@
setValue(V);
return *this;
}
+private:
+ virtual void anchor();
};
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -1171,14 +1173,14 @@
=20
// One option...
template<class M0t>
- explicit opt(const M0t &M0) : Option(Optional | NotHidden) {
+ explicit opt(const M0t &M0) : Option(Optional, NotHidden) {
apply(M0, this);
done();
}
=20
// Two options...
template<class M0t, class M1t>
- opt(const M0t &M0, const M1t &M1) : Option(Optional | NotHidden) {
+ opt(const M0t &M0, const M1t &M1) : Option(Optional, NotHidden) {
apply(M0, this); apply(M1, this);
done();
}
@@ -1186,21 +1188,21 @@
// Three options...
template<class M0t, class M1t, class M2t>
opt(const M0t &M0, const M1t &M1,
- const M2t &M2) : Option(Optional | NotHidden) {
+ const M2t &M2) : Option(Optional, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this);
done();
}
// Four options...
template<class M0t, class M1t, class M2t, class M3t>
opt(const M0t &M0, const M1t &M1, const M2t &M2,
- const M3t &M3) : Option(Optional | NotHidden) {
+ const M3t &M3) : Option(Optional, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
done();
}
// Five options...
template<class M0t, class M1t, class M2t, class M3t, class M4t>
opt(const M0t &M0, const M1t &M1, const M2t &M2, const M3t &M3,
- const M4t &M4) : Option(Optional | NotHidden) {
+ const M4t &M4) : Option(Optional, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
apply(M4, this);
done();
@@ -1209,7 +1211,7 @@
template<class M0t, class M1t, class M2t, class M3t,
class M4t, class M5t>
opt(const M0t &M0, const M1t &M1, const M2t &M2, const M3t &M3,
- const M4t &M4, const M5t &M5) : Option(Optional | NotHidden) {
+ const M4t &M4, const M5t &M5) : Option(Optional, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
apply(M4, this); apply(M5, this);
done();
@@ -1219,7 +1221,7 @@
class M4t, class M5t, class M6t>
opt(const M0t &M0, const M1t &M1, const M2t &M2, const M3t &M3,
const M4t &M4, const M5t &M5,
- const M6t &M6) : Option(Optional | NotHidden) {
+ const M6t &M6) : Option(Optional, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
apply(M4, this); apply(M5, this); apply(M6, this);
done();
@@ -1229,7 +1231,7 @@
class M4t, class M5t, class M6t, class M7t>
opt(const M0t &M0, const M1t &M1, const M2t &M2, const M3t &M3,
const M4t &M4, const M5t &M5, const M6t &M6,
- const M7t &M7) : Option(Optional | NotHidden) {
+ const M7t &M7) : Option(Optional, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
apply(M4, this); apply(M5, this); apply(M6, this); apply(M7, this);
done();
@@ -1338,34 +1340,34 @@
=20
// One option...
template<class M0t>
- explicit list(const M0t &M0) : Option(ZeroOrMore | NotHidden) {
+ explicit list(const M0t &M0) : Option(ZeroOrMore, NotHidden) {
apply(M0, this);
done();
}
// Two options...
template<class M0t, class M1t>
- list(const M0t &M0, const M1t &M1) : Option(ZeroOrMore | NotHidden) {
+ list(const M0t &M0, const M1t &M1) : Option(ZeroOrMore, NotHidden) {
apply(M0, this); apply(M1, this);
done();
}
// Three options...
template<class M0t, class M1t, class M2t>
list(const M0t &M0, const M1t &M1, const M2t &M2)
- : Option(ZeroOrMore | NotHidden) {
+ : Option(ZeroOrMore, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this);
done();
}
// Four options...
template<class M0t, class M1t, class M2t, class M3t>
list(const M0t &M0, const M1t &M1, const M2t &M2, const M3t &M3)
- : Option(ZeroOrMore | NotHidden) {
+ : Option(ZeroOrMore, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
done();
}
// Five options...
template<class M0t, class M1t, class M2t, class M3t, class M4t>
list(const M0t &M0, const M1t &M1, const M2t &M2, const M3t &M3,
- const M4t &M4) : Option(ZeroOrMore | NotHidden) {
+ const M4t &M4) : Option(ZeroOrMore, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
apply(M4, this);
done();
@@ -1374,7 +1376,7 @@
template<class M0t, class M1t, class M2t, class M3t,
class M4t, class M5t>
list(const M0t &M0, const M1t &M1, const M2t &M2, const M3t &M3,
- const M4t &M4, const M5t &M5) : Option(ZeroOrMore | NotHidden) {
+ const M4t &M4, const M5t &M5) : Option(ZeroOrMore, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
apply(M4, this); apply(M5, this);
done();
@@ -1384,7 +1386,7 @@
class M4t, class M5t, class M6t>
list(const M0t &M0, const M1t &M1, const M2t &M2, const M3t &M3,
const M4t &M4, const M5t &M5, const M6t &M6)
- : Option(ZeroOrMore | NotHidden) {
+ : Option(ZeroOrMore, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
apply(M4, this); apply(M5, this); apply(M6, this);
done();
@@ -1394,7 +1396,7 @@
class M4t, class M5t, class M6t, class M7t>
list(const M0t &M0, const M1t &M1, const M2t &M2, const M3t &M3,
const M4t &M4, const M5t &M5, const M6t &M6,
- const M7t &M7) : Option(ZeroOrMore | NotHidden) {
+ const M7t &M7) : Option(ZeroOrMore, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
apply(M4, this); apply(M5, this); apply(M6, this); apply(M7, this);
done();
@@ -1536,34 +1538,34 @@
=20
// One option...
template<class M0t>
- explicit bits(const M0t &M0) : Option(ZeroOrMore | NotHidden) {
+ explicit bits(const M0t &M0) : Option(ZeroOrMore, NotHidden) {
apply(M0, this);
done();
}
// Two options...
template<class M0t, class M1t>
- bits(const M0t &M0, const M1t &M1) : Option(ZeroOrMore | NotHidden) {
+ bits(const M0t &M0, const M1t &M1) : Option(ZeroOrMore, NotHidden) {
apply(M0, this); apply(M1, this);
done();
}
// Three options...
template<class M0t, class M1t, class M2t>
bits(const M0t &M0, const M1t &M1, const M2t &M2)
- : Option(ZeroOrMore | NotHidden) {
+ : Option(ZeroOrMore, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this);
done();
}
// Four options...
template<class M0t, class M1t, class M2t, class M3t>
bits(const M0t &M0, const M1t &M1, const M2t &M2, const M3t &M3)
- : Option(ZeroOrMore | NotHidden) {
+ : Option(ZeroOrMore, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
done();
}
// Five options...
template<class M0t, class M1t, class M2t, class M3t, class M4t>
bits(const M0t &M0, const M1t &M1, const M2t &M2, const M3t &M3,
- const M4t &M4) : Option(ZeroOrMore | NotHidden) {
+ const M4t &M4) : Option(ZeroOrMore, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
apply(M4, this);
done();
@@ -1572,7 +1574,7 @@
template<class M0t, class M1t, class M2t, class M3t,
class M4t, class M5t>
bits(const M0t &M0, const M1t &M1, const M2t &M2, const M3t &M3,
- const M4t &M4, const M5t &M5) : Option(ZeroOrMore | NotHidden) {
+ const M4t &M4, const M5t &M5) : Option(ZeroOrMore, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
apply(M4, this); apply(M5, this);
done();
@@ -1582,7 +1584,7 @@
class M4t, class M5t, class M6t>
bits(const M0t &M0, const M1t &M1, const M2t &M2, const M3t &M3,
const M4t &M4, const M5t &M5, const M6t &M6)
- : Option(ZeroOrMore | NotHidden) {
+ : Option(ZeroOrMore, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
apply(M4, this); apply(M5, this); apply(M6, this);
done();
@@ -1592,7 +1594,7 @@
class M4t, class M5t, class M6t, class M7t>
bits(const M0t &M0, const M1t &M1, const M2t &M2, const M3t &M3,
const M4t &M4, const M5t &M5, const M6t &M6,
- const M7t &M7) : Option(ZeroOrMore | NotHidden) {
+ const M7t &M7) : Option(ZeroOrMore, NotHidden) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
apply(M4, this); apply(M5, this); apply(M6, this); apply(M7, this);
done();
@@ -1632,27 +1634,27 @@
=20
// One option...
template<class M0t>
- explicit alias(const M0t &M0) : Option(Optional | Hidden), AliasFor(0) {
+ explicit alias(const M0t &M0) : Option(Optional, Hidden), AliasFor(0) {
apply(M0, this);
done();
}
// Two options...
template<class M0t, class M1t>
- alias(const M0t &M0, const M1t &M1) : Option(Optional | Hidden), AliasFo=
r(0) {
+ alias(const M0t &M0, const M1t &M1) : Option(Optional, Hidden), AliasFor=
(0) {
apply(M0, this); apply(M1, this);
done();
}
// Three options...
template<class M0t, class M1t, class M2t>
alias(const M0t &M0, const M1t &M1, const M2t &M2)
- : Option(Optional | Hidden), AliasFor(0) {
+ : Option(Optional, Hidden), AliasFor(0) {
apply(M0, this); apply(M1, this); apply(M2, this);
done();
}
// Four options...
template<class M0t, class M1t, class M2t, class M3t>
alias(const M0t &M0, const M1t &M1, const M2t &M2, const M3t &M3)
- : Option(Optional | Hidden), AliasFor(0) {
+ : Option(Optional, Hidden), AliasFor(0) {
apply(M0, this); apply(M1, this); apply(M2, this); apply(M3, this);
done();
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/Compiler.h
--- a/head/contrib/llvm/include/llvm/Support/Compiler.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/Compiler.h Tue Apr 17 11:51:51=
2012 +0300
@@ -49,16 +49,22 @@
#define LLVM_ATTRIBUTE_UNUSED
#endif
=20
-#ifdef __GNUC__ // aka 'ATTRIBUTE_CONST' but following LLVM Conventions.
-#define LLVM_ATTRIBUTE_READNONE __attribute__((__const__))
+#if (__GNUC__ >=3D 4) && !defined(__MINGW32__) && !defined(__CYGWIN__)
+#define LLVM_ATTRIBUTE_WEAK __attribute__((__weak__))
#else
-#define LLVM_ATTRIBUTE_READNONE
+#define LLVM_ATTRIBUTE_WEAK
#endif
=20
-#ifdef __GNUC__ // aka 'ATTRIBUTE_PURE' but following LLVM Conventions.
-#define LLVM_ATTRIBUTE_READONLY __attribute__((__pure__))
+#ifdef __GNUC__ // aka 'CONST' but following LLVM Conventions.
+#define LLVM_READNONE __attribute__((__const__))
#else
-#define LLVM_ATTRIBUTE_READONLY
+#define LLVM_READNONE
+#endif
+
+#ifdef __GNUC__ // aka 'PURE' but following LLVM Conventions.
+#define LLVM_READONLY __attribute__((__pure__))
+#else
+#define LLVM_READONLY
#endif
=20
#if (__GNUC__ >=3D 4)
@@ -67,6 +73,7 @@
#define BUILTIN_EXPECT(EXPR, VALUE) (EXPR)
#endif
=20
+
// C++ doesn't support 'extern template' of template specializations. GCC=
does,
// but requires __extension__ before it. In the header, use this:
// EXTERN_TEMPLATE_INSTANTIATION(class foo<bar>);
@@ -111,6 +118,14 @@
#define LLVM_ATTRIBUTE_NORETURN
#endif
=20
+// LLVM_EXTENSION - Support compilers where we have a keyword to suppress
+// pedantic diagnostics.
+#ifdef __GNUC__
+#define LLVM_EXTENSION __extension__
+#else
+#define LLVM_EXTENSION
+#endif
+
// LLVM_ATTRIBUTE_DEPRECATED(decl, "message")
#if __has_feature(attribute_deprecated_with_message)
# define LLVM_ATTRIBUTE_DEPRECATED(decl, message) \
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/DOTGraphTraits.h
--- a/head/contrib/llvm/include/llvm/Support/DOTGraphTraits.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/DOTGraphTraits.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -42,13 +42,13 @@
/// top of the graph.
///
template<typename GraphType>
- static std::string getGraphName(const GraphType& Graph) { return ""; }
+ static std::string getGraphName(const GraphType &) { return ""; }
=20
/// getGraphProperties - Return any custom properties that should be inc=
luded
/// in the top level graph structure for dot.
///
template<typename GraphType>
- static std::string getGraphProperties(const GraphType& Graph) {
+ static std::string getGraphProperties(const GraphType &) {
return "";
}
=20
@@ -61,44 +61,44 @@
=20
/// isNodeHidden - If the function returns true, the given node is not
/// displayed in the graph.
- static bool isNodeHidden(const void *Node) {
+ static bool isNodeHidden(const void *) {
return false;
}
=20
/// getNodeLabel - Given a node and a pointer to the top level graph, re=
turn
/// the label to print in the node.
template<typename GraphType>
- std::string getNodeLabel(const void *Node, const GraphType& Graph) {
+ std::string getNodeLabel(const void *, const GraphType &) {
return "";
}
=20
/// hasNodeAddressLabel - If this method returns true, the address of th=
e node
/// is added to the label of the node.
template<typename GraphType>
- static bool hasNodeAddressLabel(const void *Node, const GraphType& Graph=
) {
+ static bool hasNodeAddressLabel(const void *, const GraphType &) {
return false;
}
=20
/// If you want to specify custom node attributes, this is the place to =
do so
///
template<typename GraphType>
- static std::string getNodeAttributes(const void *Node,
- const GraphType& Graph) {
+ static std::string getNodeAttributes(const void *,
+ const GraphType &) {
return "";
}
=20
/// If you want to override the dot attributes printed for a particular =
edge,
/// override this method.
template<typename EdgeIter, typename GraphType>
- static std::string getEdgeAttributes(const void *Node, EdgeIter EI,
- const GraphType& Graph) {
+ static std::string getEdgeAttributes(const void *, EdgeIter,
+ const GraphType &) {
return "";
}
=20
/// getEdgeSourceLabel - If you want to label the edge source itself,
/// implement this method.
template<typename EdgeIter>
- static std::string getEdgeSourceLabel(const void *Node, EdgeIter I) {
+ static std::string getEdgeSourceLabel(const void *, EdgeIter) {
return "";
}
=20
@@ -106,7 +106,7 @@
/// should actually target another edge source, not a node. If this met=
hod is
/// implemented, getEdgeTarget should be implemented.
template<typename EdgeIter>
- static bool edgeTargetsEdgeSource(const void *Node, EdgeIter I) {
+ static bool edgeTargetsEdgeSource(const void *, EdgeIter) {
return false;
}
=20
@@ -114,7 +114,7 @@
/// called to determine which outgoing edge of Node is the target of this
/// edge.
template<typename EdgeIter>
- static EdgeIter getEdgeTarget(const void *Node, EdgeIter I) {
+ static EdgeIter getEdgeTarget(const void *, EdgeIter I) {
return I;
}
=20
@@ -126,13 +126,13 @@
=20
/// numEdgeDestLabels - If hasEdgeDestLabels, this function returns the
/// number of incoming edge labels the given node has.
- static unsigned numEdgeDestLabels(const void *Node) {
+ static unsigned numEdgeDestLabels(const void *) {
return 0;
}
=20
/// getEdgeDestLabel - If hasEdgeDestLabels, this function returns the
/// incoming edge label with the given index in the given node.
- static std::string getEdgeDestLabel(const void *Node, unsigned i) {
+ static std::string getEdgeDestLabel(const void *, unsigned) {
return "";
}
=20
@@ -143,7 +143,7 @@
/// it to add things to the output graph.
///
template<typename GraphType, typename GraphWriter>
- static void addCustomGraphFeatures(const GraphType& Graph, GraphWriter &=
GW) {}
+ static void addCustomGraphFeatures(const GraphType &, GraphWriter &) {}
};
=20
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/DataTypes.h.in
--- a/head/contrib/llvm/include/llvm/Support/DataTypes.h.in Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/DataTypes.h.in Tue Apr 17 11:5=
1:51 2012 +0300
@@ -167,9 +167,24 @@
# define UINT64_C(C) C##ui64
#endif
=20
+#ifndef PRId64
+# define PRId64 "I64d"
+#endif
+#ifndef PRIi64
+# define PRIi64 "I64i"
+#endif
+#ifndef PRIo64
+# define PRIo64 "I64o"
+#endif
+#ifndef PRIu64
+# define PRIu64 "I64u"
+#endif
#ifndef PRIx64
# define PRIx64 "I64x"
#endif
+#ifndef PRIX64
+# define PRIX64 "I64X"
+#endif
=20
#endif /* _MSC_VER */
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/Debug.h
--- a/head/contrib/llvm/include/llvm/Support/Debug.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/include/llvm/Support/Debug.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -35,14 +35,14 @@
#ifndef DEBUG_TYPE
#define DEBUG_TYPE ""
#endif
- =20
+
#ifndef NDEBUG
/// DebugFlag - This boolean is set to true if the '-debug' command line o=
ption
/// is specified. This should probably not be referenced directly, instea=
d, use
/// the DEBUG macro below.
///
extern bool DebugFlag;
- =20
+
/// isCurrentDebugType - Return true if the specified string is the debug =
type
/// specified on the command line, or if none was specified on the command=
line
/// with the -debug-only=3DX option.
@@ -54,7 +54,7 @@
/// debug output to be produced.
///
void SetCurrentDebugType(const char *Type);
- =20
+
/// DEBUG_WITH_TYPE macro - This macro should be used by passes to emit de=
bug
/// information. In the '-debug' option is specified on the commandline, =
and if
/// this is a debug build, then the code specified as the option to the ma=
cro
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/Dwarf.h
--- a/head/contrib/llvm/include/llvm/Support/Dwarf.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/include/llvm/Support/Dwarf.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -22,7 +22,8 @@
// Debug info constants.
=20
enum {
- LLVMDebugVersion =3D (11 << 16), // Current version of debug info=
rmation.
+ LLVMDebugVersion =3D (12 << 16), // Current version of debug info=
rmation.
+ LLVMDebugVersion11 =3D (11 << 16), // Constant for version 11.
LLVMDebugVersion10 =3D (10 << 16), // Constant for version 10.
LLVMDebugVersion9 =3D (9 << 16), // Constant for version 9.
LLVMDebugVersion8 =3D (8 << 16), // Constant for version 8.
@@ -130,6 +131,7 @@
DW_TAG_GNU_template_parameter_pack =3D 0x4107,
DW_TAG_GNU_formal_parameter_pack =3D 0x4108,
DW_TAG_lo_user =3D 0x4080,
+ DW_TAG_APPLE_property =3D 0x4200,
DW_TAG_hi_user =3D 0xffff,
=20
// Children flag
@@ -269,6 +271,7 @@
DW_AT_APPLE_property_setter =3D 0x3fea,
DW_AT_APPLE_property_attribute =3D 0x3feb,
DW_AT_APPLE_objc_complete_type =3D 0x3fec,
+ DW_AT_APPLE_property =3D 0x3fed,
=20
// Attribute form encodings
DW_FORM_addr =3D 0x01,
@@ -526,6 +529,7 @@
DW_LANG_D =3D 0x0013,
DW_LANG_Python =3D 0x0014,
DW_LANG_lo_user =3D 0x8000,
+ DW_LANG_Mips_Assembler =3D 0x8001,
DW_LANG_hi_user =3D 0xffff,
=20
// Identifier case codes
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/DynamicLibrary.h
--- a/head/contrib/llvm/include/llvm/Support/DynamicLibrary.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/DynamicLibrary.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -17,6 +17,9 @@
#include <string>
=20
namespace llvm {
+
+class StringRef;
+
namespace sys {
=20
/// This class provides a portable interface to dynamic libraries which =
also
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/ELF.h
--- a/head/contrib/llvm/include/llvm/Support/ELF.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/include/llvm/Support/ELF.h Tue Apr 17 11:51:51 2012=
+0300
@@ -599,7 +599,25 @@
R_ARM_THM_TLS_DESCSEQ32 =3D 0x82
};
=20
+// Mips Specific e_flags
+enum {
+ EF_MIPS_NOREORDER =3D 0x00000001, // Don't reorder instructions
+ EF_MIPS_PIC =3D 0x00000002, // Position independent code
+ EF_MIPS_CPIC =3D 0x00000004, // Call object with Position independe=
nt code
+ EF_MIPS_ARCH_1 =3D 0x00000000, // MIPS1 instruction set
+ EF_MIPS_ARCH_2 =3D 0x10000000, // MIPS2 instruction set
+ EF_MIPS_ARCH_3 =3D 0x20000000, // MIPS3 instruction set
+ EF_MIPS_ARCH_4 =3D 0x30000000, // MIPS4 instruction set
+ EF_MIPS_ARCH_5 =3D 0x40000000, // MIPS5 instruction set
+ EF_MIPS_ARCH_32 =3D 0x50000000, // MIPS32 instruction set per linux no=
t elf.h
+ EF_MIPS_ARCH_64 =3D 0x60000000, // MIPS64 instruction set per linux no=
t elf.h
+ EF_MIPS_ARCH_32R2 =3D 0x70000000, // mips32r2
+ EF_MIPS_ARCH_64R2 =3D 0x80000000, // mips64r2
+ EF_MIPS_ARCH =3D 0xf0000000 // Mask for applying EF_MIPS_ARCH_ var=
iant
+};
+
// ELF Relocation types for Mips
+// .
enum {
R_MIPS_NONE =3D 0,
R_MIPS_16 =3D 1,
@@ -611,6 +629,7 @@
R_MIPS_GPREL16 =3D 7,
R_MIPS_LITERAL =3D 8,
R_MIPS_GOT16 =3D 9,
+ R_MIPS_GOT =3D 9,
R_MIPS_PC16 =3D 10,
R_MIPS_CALL16 =3D 11,
R_MIPS_GPREL32 =3D 12,
@@ -717,6 +736,9 @@
SHT_GROUP =3D 17, // Section group.
SHT_SYMTAB_SHNDX =3D 18, // Indices for SHN_XINDEX entries.
SHT_LOOS =3D 0x60000000, // Lowest operating system-specific ty=
pe.
+ SHT_GNU_verdef =3D 0x6ffffffd, // GNU version definitions.
+ SHT_GNU_verneed =3D 0x6ffffffe, // GNU version references.
+ SHT_GNU_versym =3D 0x6fffffff, // GNU symbol versions table.
SHT_HIOS =3D 0x6fffffff, // Highest operating system-specific t=
ype.
SHT_LOPROC =3D 0x70000000, // Lowest processor architecture-speci=
fic type.
// Fixme: All this is duplicated in MCSectionELF. Why??
@@ -871,6 +893,7 @@
STT_TLS =3D 6, // Thread local data object
STT_LOOS =3D 7, // Lowest operating system-specific symbol type
STT_HIOS =3D 8, // Highest operating system-specific symbol type
+ STT_GNU_IFUNC =3D 10, // GNU indirect function
STT_LOPROC =3D 13, // Lowest processor-specific symbol type
STT_HIPROC =3D 15 // Highest processor-specific symbol type
};
@@ -1084,6 +1107,33 @@
DF_STATIC_TLS =3D 0x10 // Reject attempts to load dynamically.
};
=20
+// ElfXX_VerDef structure version (GNU versioning)
+enum {
+ VER_DEF_NONE =3D 0,
+ VER_DEF_CURRENT =3D 1
+};
+
+// VerDef Flags (ElfXX_VerDef::vd_flags)
+enum {
+ VER_FLG_BASE =3D 0x1,
+ VER_FLG_WEAK =3D 0x2,
+ VER_FLG_INFO =3D 0x4
+};
+
+// Special constants for the version table. (SHT_GNU_versym/.gnu.version)
+enum {
+ VER_NDX_LOCAL =3D 0, // Unversioned local symbol
+ VER_NDX_GLOBAL =3D 1, // Unversioned global symbol
+ VERSYM_VERSION =3D 0x7fff, // Version Index mask
+ VERSYM_HIDDEN =3D 0x8000 // Hidden bit (non-default version)
+};
+
+// ElfXX_VerNeed structure version (GNU versioning)
+enum {
+ VER_NEED_NONE =3D 0,
+ VER_NEED_CURRENT =3D 1
+};
+
} // end namespace ELF
=20
} // end namespace llvm
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/Endian.h
--- a/head/contrib/llvm/include/llvm/Support/Endian.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/Endian.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -98,6 +98,9 @@
operator value_type() const {
return endian::read_le<value_type, unaligned>(Value);
}
+ void operator=3D(value_type newValue) {
+ endian::write_le<value_type, unaligned>((void *)&Value, newValue);
+ }
private:
uint8_t Value[sizeof(value_type)];
};
@@ -108,6 +111,9 @@
operator value_type() const {
return endian::read_be<value_type, unaligned>(Value);
}
+ void operator=3D(value_type newValue) {
+ endian::write_be<value_type, unaligned>((void *)&Value, newValue);
+ }
private:
uint8_t Value[sizeof(value_type)];
};
@@ -118,6 +124,9 @@
operator value_type() const {
return endian::read_le<value_type, aligned>(&Value);
}
+ void operator=3D(value_type newValue) {
+ endian::write_le<value_type, aligned>((void *)&Value, newValue);
+ }
private:
value_type Value;
};
@@ -128,6 +137,9 @@
operator value_type() const {
return endian::read_be<value_type, aligned>(&Value);
}
+ void operator=3D(value_type newValue) {
+ endian::write_be<value_type, aligned>((void *)&Value, newValue);
+ }
private:
value_type Value;
};
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/FileSystem.h
--- a/head/contrib/llvm/include/llvm/Support/FileSystem.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/FileSystem.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -27,14 +27,21 @@
#ifndef LLVM_SUPPORT_FILE_SYSTEM_H
#define LLVM_SUPPORT_FILE_SYSTEM_H
=20
+#include "llvm/ADT/IntrusiveRefCntPtr.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Support/DataTypes.h"
-#include "llvm/Support/PathV1.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/system_error.h"
#include <ctime>
#include <iterator>
+#include <stack>
#include <string>
+#include <vector>
+
+#if HAVE_SYS_STAT_H
+#include <sys/stat.h>
+#endif
=20
namespace llvm {
namespace sys {
@@ -91,7 +98,20 @@
/// a platform specific member to store the result.
class file_status
{
- // implementation defined status field.
+ #if defined(LLVM_ON_UNIX)
+ dev_t st_dev;
+ ino_t st_ino;
+ #elif defined (LLVM_ON_WIN32)
+ uint32_t LastWriteTimeHigh;
+ uint32_t LastWriteTimeLow;
+ uint32_t VolumeSerialNumber;
+ uint32_t FileSizeHigh;
+ uint32_t FileSizeLow;
+ uint32_t FileIndexHigh;
+ uint32_t FileIndexLow;
+ #endif
+ friend bool equivalent(file_status A, file_status B);
+ friend error_code status(const Twine &path, file_status &result);
file_type Type;
public:
explicit file_status(file_type v=3Dfile_type::status_error)
@@ -101,6 +121,44 @@
void type(file_type v) { Type =3D v; }
};
=20
+/// file_magic - An "enum class" enumeration of file types based on magic =
(the first
+/// N bytes of the file).
+struct file_magic {
+ enum _ {
+ unknown =3D 0, ///< Unrecognized file
+ bitcode, ///< Bitcode file
+ archive, ///< ar style archive file
+ elf_relocatable, ///< ELF Relocatable object file
+ elf_executable, ///< ELF Executable image
+ elf_shared_object, ///< ELF dynamically linked shared lib
+ elf_core, ///< ELF core image
+ macho_object, ///< Mach-O Object file
+ macho_executable, ///< Mach-O Executable
+ macho_fixed_virtual_memory_shared_lib, ///< Mach-O Shared Lib, FVM
+ macho_core, ///< Mach-O Core File
+ macho_preload_executabl, ///< Mach-O Preloaded Executable
+ macho_dynamically_linked_shared_lib, ///< Mach-O dynlinked shared lib
+ macho_dynamic_linker, ///< The Mach-O dynamic linker
+ macho_bundle, ///< Mach-O Bundle file
+ macho_dynamically_linked_shared_lib_stub, ///< Mach-O Shared lib stub
+ macho_dsym_companion, ///< Mach-O dSYM companion file
+ coff_object, ///< COFF object file
+ pecoff_executable ///< PECOFF executable file
+ };
+
+ bool is_object() const {
+ return v_ =3D=3D unknown ? false : true;
+ }
+
+ file_magic() : v_(unknown) {}
+ file_magic(_ v) : v_(v) {}
+ explicit file_magic(int v) : v_(_(v)) {}
+ operator int() const {return v_;}
+
+private:
+ int v_;
+};
+
/// @}
/// @name Physical Operators
/// @{
@@ -241,6 +299,8 @@
=20
/// @brief Do paths represent the same thing?
///
+/// assert(status_known(A) || status_known(B));
+///
/// @param A Input path A.
/// @param B Input path B.
/// @param result Set to true if stat(A) and stat(B) have the same device =
and
@@ -397,13 +457,16 @@
error_code get_magic(const Twine &path, uint32_t len,
SmallVectorImpl<char> &result);
=20
+/// @brief Identify the type of a binary file based on how magical it is.
+file_magic identify_magic(StringRef magic);
+
/// @brief Get and identify \a path's type based on its content.
///
/// @param path Input path.
/// @param result Set to the type of file, or LLVMFileType::Unknown_FileTy=
pe.
/// @results errc::success if result has been successfully set, otherwise a
/// platform specific error_code.
-error_code identify_magic(const Twine &path, LLVMFileType &result);
+error_code identify_magic(const Twine &path, file_magic &result);
=20
/// @brief Get library paths the system linker uses.
///
@@ -479,76 +542,171 @@
bool operator>=3D(const directory_entry& rhs) const;
};
=20
+namespace detail {
+ struct DirIterState;
+
+ error_code directory_iterator_construct(DirIterState&, StringRef);
+ error_code directory_iterator_increment(DirIterState&);
+ error_code directory_iterator_destruct(DirIterState&);
+
+ /// DirIterState - Keeps state for the directory_iterator. It is referen=
ce
+ /// counted in order to preserve InputIterator semantics on copy.
+ struct DirIterState : public RefCountedBase<DirIterState> {
+ DirIterState()
+ : IterationHandle(0) {}
+
+ ~DirIterState() {
+ directory_iterator_destruct(*this);
+ }
+
+ intptr_t IterationHandle;
+ directory_entry CurrentEntry;
+ };
+}
+
/// directory_iterator - Iterates through the entries in path. There is no
/// operator++ because we need an error_code. If it's really needed we can=
make
/// it call report_fatal_error on error.
class directory_iterator {
- intptr_t IterationHandle;
- directory_entry CurrentEntry;
-
- // Platform implementations implement these functions to handle iteratio=
n.
- friend error_code directory_iterator_construct(directory_iterator &it,
- StringRef path);
- friend error_code directory_iterator_increment(directory_iterator &it);
- friend error_code directory_iterator_destruct(directory_iterator &it);
+ IntrusiveRefCntPtr<detail::DirIterState> State;
=20
public:
- explicit directory_iterator(const Twine &path, error_code &ec)
- : IterationHandle(0) {
+ explicit directory_iterator(const Twine &path, error_code &ec) {
+ State =3D new detail::DirIterState;
SmallString<128> path_storage;
- ec =3D directory_iterator_construct(*this, path.toStringRef(path_stora=
ge));
+ ec =3D detail::directory_iterator_construct(*State,
+ path.toStringRef(path_storage));
+ }
+
+ explicit directory_iterator(const directory_entry &de, error_code &ec) {
+ State =3D new detail::DirIterState;
+ ec =3D detail::directory_iterator_construct(*State, de.path());
}
=20
/// Construct end iterator.
- directory_iterator() : IterationHandle(0) {}
-
- ~directory_iterator() {
- directory_iterator_destruct(*this);
- }
+ directory_iterator() : State(new detail::DirIterState) {}
=20
// No operator++ because we need error_code.
directory_iterator &increment(error_code &ec) {
- ec =3D directory_iterator_increment(*this);
+ ec =3D directory_iterator_increment(*State);
return *this;
}
=20
- const directory_entry &operator*() const { return CurrentEntry; }
- const directory_entry *operator->() const { return &CurrentEntry; }
+ const directory_entry &operator*() const { return State->CurrentEntry; }
+ const directory_entry *operator->() const { return &State->CurrentEntry;=
}
+
+ bool operator=3D=3D(const directory_iterator &RHS) const {
+ return State->CurrentEntry =3D=3D RHS.State->CurrentEntry;
+ }
=20
bool operator!=3D(const directory_iterator &RHS) const {
- return CurrentEntry !=3D RHS.CurrentEntry;
+ return !(*this =3D=3D RHS);
}
// Other members as required by
// C++ Std, 24.1.1 Input iterators [input.iterators]
};
=20
+namespace detail {
+ /// RecDirIterState - Keeps state for the recursive_directory_iterator. =
It is
+ /// reference counted in order to preserve InputIterator semantics on co=
py.
+ struct RecDirIterState : public RefCountedBase<RecDirIterState> {
+ RecDirIterState()
+ : Level(0)
+ , HasNoPushRequest(false) {}
+
+ std::stack<directory_iterator, std::vector<directory_iterator> > Stack;
+ uint16_t Level;
+ bool HasNoPushRequest;
+ };
+}
+
/// recursive_directory_iterator - Same as directory_iterator except for it
/// recurses down into child directories.
class recursive_directory_iterator {
- uint16_t Level;
- bool HasNoPushRequest;
- // implementation directory iterator status
+ IntrusiveRefCntPtr<detail::RecDirIterState> State;
=20
public:
- explicit recursive_directory_iterator(const Twine &path, error_code &ec);
+ recursive_directory_iterator() {}
+ explicit recursive_directory_iterator(const Twine &path, error_code &ec)
+ : State(new detail::RecDirIterState) {
+ State->Stack.push(directory_iterator(path, ec));
+ if (State->Stack.top() =3D=3D directory_iterator())
+ State.reset();
+ }
// No operator++ because we need error_code.
- directory_iterator &increment(error_code &ec);
+ recursive_directory_iterator &increment(error_code &ec) {
+ static const directory_iterator end_itr;
=20
- const directory_entry &operator*() const;
- const directory_entry *operator->() const;
+ if (State->HasNoPushRequest)
+ State->HasNoPushRequest =3D false;
+ else {
+ file_status st;
+ if ((ec =3D State->Stack.top()->status(st))) return *this;
+ if (is_directory(st)) {
+ State->Stack.push(directory_iterator(*State->Stack.top(), ec));
+ if (ec) return *this;
+ if (State->Stack.top() !=3D end_itr) {
+ ++State->Level;
+ return *this;
+ }
+ State->Stack.pop();
+ }
+ }
+
+ while (!State->Stack.empty()
+ && State->Stack.top().increment(ec) =3D=3D end_itr) {
+ State->Stack.pop();
+ --State->Level;
+ }
+
+ // Check if we are done. If so, create an end iterator.
+ if (State->Stack.empty())
+ State.reset();
+
+ return *this;
+ }
+
+ const directory_entry &operator*() const { return *State->Stack.top(); }
+ const directory_entry *operator->() const { return &*State->Stack.top();=
}
=20
// observers
- /// Gets the current level. path is at level 0.
- int level() const;
+ /// Gets the current level. Starting path is at level 0.
+ int level() const { return State->Level; }
+
/// Returns true if no_push has been called for this directory_entry.
- bool no_push_request() const;
+ bool no_push_request() const { return State->HasNoPushRequest; }
=20
// modifiers
/// Goes up one level if Level > 0.
- void pop();
+ void pop() {
+ assert(State && "Cannot pop and end itertor!");
+ assert(State->Level > 0 && "Cannot pop an iterator with level < 1");
+
+ static const directory_iterator end_itr;
+ error_code ec;
+ do {
+ if (ec)
+ report_fatal_error("Error incrementing directory iterator.");
+ State->Stack.pop();
+ --State->Level;
+ } while (!State->Stack.empty()
+ && State->Stack.top().increment(ec) =3D=3D end_itr);
+
+ // Check if we are done. If so, create an end iterator.
+ if (State->Stack.empty())
+ State.reset();
+ }
+
/// Does not go down into the current directory_entry.
- void no_push();
+ void no_push() { State->HasNoPushRequest =3D true; }
=20
+ bool operator=3D=3D(const recursive_directory_iterator &RHS) const {
+ return State =3D=3D RHS.State;
+ }
+
+ bool operator!=3D(const recursive_directory_iterator &RHS) const {
+ return !(*this =3D=3D RHS);
+ }
// Other members as required by
// C++ Std, 24.1.1 Input iterators [input.iterators]
};
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/GraphWriter.h
--- a/head/contrib/llvm/include/llvm/Support/GraphWriter.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/GraphWriter.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -296,26 +296,26 @@
template<typename GraphType>
raw_ostream &WriteGraph(raw_ostream &O, const GraphType &G,
bool ShortNames =3D false,
- const std::string &Title =3D "") {
+ const Twine &Title =3D "") {
// Start the graph emission process...
GraphWriter<GraphType> W(O, G, ShortNames);
=20
// Emit the graph.
- W.writeGraph(Title);
+ W.writeGraph(Title.str());
=20
return O;
}
=20
template<typename GraphType>
-sys::Path WriteGraph(const GraphType &G, const std::string &Name,
- bool ShortNames =3D false, const std::string &Title =
=3D "") {
+sys::Path WriteGraph(const GraphType &G, const Twine &Name,
+ bool ShortNames =3D false, const Twine &Title =3D "")=
{
std::string ErrMsg;
sys::Path Filename =3D sys::Path::GetTemporaryDirectory(&ErrMsg);
if (Filename.isEmpty()) {
errs() << "Error: " << ErrMsg << "\n";
return Filename;
}
- Filename.appendComponent(Name + ".dot");
+ Filename.appendComponent((Name + ".dot").str());
if (Filename.makeUnique(true,&ErrMsg)) {
errs() << "Error: " << ErrMsg << "\n";
return sys::Path();
@@ -341,8 +341,8 @@
/// then cleanup. For use from the debugger.
///
template<typename GraphType>
-void ViewGraph(const GraphType &G, const std::string &Name,
- bool ShortNames =3D false, const std::string &Title =3D "",
+void ViewGraph(const GraphType &G, const Twine &Name,
+ bool ShortNames =3D false, const Twine &Title =3D "",
GraphProgram::Name Program =3D GraphProgram::DOT) {
sys::Path Filename =3D llvm::WriteGraph(G, Name, ShortNames, Title);
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/Host.h
--- a/head/contrib/llvm/include/llvm/Support/Host.h Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/include/llvm/Support/Host.h Tue Apr 17 11:51:51 201=
2 +0300
@@ -33,14 +33,14 @@
return !isLittleEndianHost();
}
=20
- /// getHostTriple() - Return the target triple of the running
- /// system.
+ /// getDefaultTargetTriple() - Return the default target triple the comp=
iler
+ /// has been configured to produce code for.
///
/// The target triple is a string in the format of:
/// CPU_TYPE-VENDOR-OPERATING_SYSTEM
/// or
/// CPU_TYPE-VENDOR-KERNEL-OPERATING_SYSTEM
- std::string getHostTriple();
+ std::string getDefaultTargetTriple();
=20
/// getHostCPUName - Get the LLVM name for the host CPU. The particular =
format
/// of the name is target dependent, and suitable for passing as -mcpu t=
o the
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/IRReader.h
--- a/head/contrib/llvm/include/llvm/Support/IRReader.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/IRReader.h Tue Apr 17 11:51:51=
2012 +0300
@@ -40,7 +40,8 @@
std::string ErrMsg;
Module *M =3D getLazyBitcodeModule(Buffer, Context, &ErrMsg);
if (M =3D=3D 0) {
- Err =3D SMDiagnostic(Buffer->getBufferIdentifier(), ErrMsg);
+ Err =3D SMDiagnostic(Buffer->getBufferIdentifier(), SourceMgr::DK_=
Error,
+ ErrMsg);
// ParseBitcodeFile does not take ownership of the Buffer in the
// case of an error.
delete Buffer;
@@ -60,7 +61,7 @@
LLVMContext &Context) {
OwningPtr<MemoryBuffer> File;
if (error_code ec =3D MemoryBuffer::getFileOrSTDIN(Filename.c_str(), F=
ile)) {
- Err =3D SMDiagnostic(Filename,
+ Err =3D SMDiagnostic(Filename, SourceMgr::DK_Error,
"Could not open input file: " + ec.message());
return 0;
}
@@ -80,7 +81,8 @@
std::string ErrMsg;
Module *M =3D ParseBitcodeFile(Buffer, Context, &ErrMsg);
if (M =3D=3D 0)
- Err =3D SMDiagnostic(Buffer->getBufferIdentifier(), ErrMsg);
+ Err =3D SMDiagnostic(Buffer->getBufferIdentifier(), SourceMgr::DK_=
Error,
+ ErrMsg);
// ParseBitcodeFile does not take ownership of the Buffer.
delete Buffer;
return M;
@@ -97,7 +99,7 @@
LLVMContext &Context) {
OwningPtr<MemoryBuffer> File;
if (error_code ec =3D MemoryBuffer::getFileOrSTDIN(Filename.c_str(), F=
ile)) {
- Err =3D SMDiagnostic(Filename,
+ Err =3D SMDiagnostic(Filename, SourceMgr::DK_Error,
"Could not open input file: " + ec.message());
return 0;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/InstVisitor.h
--- a/head/contrib/llvm/include/llvm/Support/InstVisitor.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/InstVisitor.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -14,6 +14,7 @@
#include "llvm/Function.h"
#include "llvm/Instructions.h"
#include "llvm/Module.h"
+#include "llvm/Support/CallSite.h"
#include "llvm/Support/ErrorHandling.h"
=20
namespace llvm {
@@ -157,54 +158,74 @@
// Specific Instruction type classes... note that all of the casts are
// necessary because we use the instruction classes as opaque types...
//
- RetTy visitReturnInst(ReturnInst &I) { DELEGATE(TerminatorI=
nst);}
- RetTy visitBranchInst(BranchInst &I) { DELEGATE(TerminatorI=
nst);}
- RetTy visitSwitchInst(SwitchInst &I) { DELEGATE(TerminatorI=
nst);}
- RetTy visitIndirectBrInst(IndirectBrInst &I) { DELEGATE(TerminatorI=
nst);}
- RetTy visitInvokeInst(InvokeInst &I) { DELEGATE(TerminatorI=
nst);}
- RetTy visitUnwindInst(UnwindInst &I) { DELEGATE(TerminatorI=
nst);}
- RetTy visitResumeInst(ResumeInst &I) { DELEGATE(TerminatorI=
nst);}
- RetTy visitUnreachableInst(UnreachableInst &I) { DELEGATE(TerminatorI=
nst);}
- RetTy visitICmpInst(ICmpInst &I) { DELEGATE(CmpInst);}
- RetTy visitFCmpInst(FCmpInst &I) { DELEGATE(CmpInst);}
- RetTy visitAllocaInst(AllocaInst &I) { DELEGATE(Instruction=
); }
- RetTy visitLoadInst(LoadInst &I) { DELEGATE(Instruction=
); }
- RetTy visitStoreInst(StoreInst &I) { DELEGATE(Instruction=
); }
- RetTy visitAtomicCmpXchgInst(AtomicCmpXchgInst &I){ DELEGATE(Instruction=
); }
- RetTy visitAtomicRMWInst(AtomicRMWInst &I) { DELEGATE(Instruction=
); }
- RetTy visitFenceInst(FenceInst &I) { DELEGATE(Instruction=
); }
- RetTy visitGetElementPtrInst(GetElementPtrInst &I){ DELEGATE(Instruction=
); }
- RetTy visitPHINode(PHINode &I) { DELEGATE(Instruction=
); }
- RetTy visitTruncInst(TruncInst &I) { DELEGATE(CastInst); }
- RetTy visitZExtInst(ZExtInst &I) { DELEGATE(CastInst); }
- RetTy visitSExtInst(SExtInst &I) { DELEGATE(CastInst); }
- RetTy visitFPTruncInst(FPTruncInst &I) { DELEGATE(CastInst); }
- RetTy visitFPExtInst(FPExtInst &I) { DELEGATE(CastInst); }
- RetTy visitFPToUIInst(FPToUIInst &I) { DELEGATE(CastInst); }
- RetTy visitFPToSIInst(FPToSIInst &I) { DELEGATE(CastInst); }
- RetTy visitUIToFPInst(UIToFPInst &I) { DELEGATE(CastInst); }
- RetTy visitSIToFPInst(SIToFPInst &I) { DELEGATE(CastInst); }
- RetTy visitPtrToIntInst(PtrToIntInst &I) { DELEGATE(CastInst); }
- RetTy visitIntToPtrInst(IntToPtrInst &I) { DELEGATE(CastInst); }
- RetTy visitBitCastInst(BitCastInst &I) { DELEGATE(CastInst); }
- RetTy visitSelectInst(SelectInst &I) { DELEGATE(Instruction=
); }
- RetTy visitCallInst(CallInst &I) { DELEGATE(Instruction=
); }
- RetTy visitVAArgInst(VAArgInst &I) { DELEGATE(Instruction=
); }
+ RetTy visitReturnInst(ReturnInst &I) { DELEGATE(TerminatorIns=
t);}
+ RetTy visitBranchInst(BranchInst &I) { DELEGATE(TerminatorIns=
t);}
+ RetTy visitSwitchInst(SwitchInst &I) { DELEGATE(TerminatorIns=
t);}
+ RetTy visitIndirectBrInst(IndirectBrInst &I) { DELEGATE(TerminatorIns=
t);}
+ RetTy visitResumeInst(ResumeInst &I) { DELEGATE(TerminatorIns=
t);}
+ RetTy visitUnreachableInst(UnreachableInst &I) { DELEGATE(TerminatorIns=
t);}
+ RetTy visitICmpInst(ICmpInst &I) { DELEGATE(CmpInst);}
+ RetTy visitFCmpInst(FCmpInst &I) { DELEGATE(CmpInst);}
+ RetTy visitAllocaInst(AllocaInst &I) { DELEGATE(UnaryInstruct=
ion);}
+ RetTy visitLoadInst(LoadInst &I) { DELEGATE(UnaryInstruct=
ion);}
+ RetTy visitStoreInst(StoreInst &I) { DELEGATE(Instruction);}
+ RetTy visitAtomicCmpXchgInst(AtomicCmpXchgInst &I) { DELEGATE(Instructio=
n);}
+ RetTy visitAtomicRMWInst(AtomicRMWInst &I) { DELEGATE(Instruction);}
+ RetTy visitFenceInst(FenceInst &I) { DELEGATE(Instruction);}
+ RetTy visitGetElementPtrInst(GetElementPtrInst &I){ DELEGATE(Instruction=
);}
+ RetTy visitPHINode(PHINode &I) { DELEGATE(Instruction);}
+ RetTy visitTruncInst(TruncInst &I) { DELEGATE(CastInst);}
+ RetTy visitZExtInst(ZExtInst &I) { DELEGATE(CastInst);}
+ RetTy visitSExtInst(SExtInst &I) { DELEGATE(CastInst);}
+ RetTy visitFPTruncInst(FPTruncInst &I) { DELEGATE(CastInst);}
+ RetTy visitFPExtInst(FPExtInst &I) { DELEGATE(CastInst);}
+ RetTy visitFPToUIInst(FPToUIInst &I) { DELEGATE(CastInst);}
+ RetTy visitFPToSIInst(FPToSIInst &I) { DELEGATE(CastInst);}
+ RetTy visitUIToFPInst(UIToFPInst &I) { DELEGATE(CastInst);}
+ RetTy visitSIToFPInst(SIToFPInst &I) { DELEGATE(CastInst);}
+ RetTy visitPtrToIntInst(PtrToIntInst &I) { DELEGATE(CastInst);}
+ RetTy visitIntToPtrInst(IntToPtrInst &I) { DELEGATE(CastInst);}
+ RetTy visitBitCastInst(BitCastInst &I) { DELEGATE(CastInst);}
+ RetTy visitSelectInst(SelectInst &I) { DELEGATE(Instruction);}
+ RetTy visitVAArgInst(VAArgInst &I) { DELEGATE(UnaryInstruct=
ion);}
RetTy visitExtractElementInst(ExtractElementInst &I) { DELEGATE(Instruct=
ion);}
- RetTy visitInsertElementInst(InsertElementInst &I) { DELEGATE(Instructio=
n); }
- RetTy visitShuffleVectorInst(ShuffleVectorInst &I) { DELEGATE(Instructio=
n); }
- RetTy visitExtractValueInst(ExtractValueInst &I) { DELEGATE(Instruction=
);}
- RetTy visitInsertValueInst(InsertValueInst &I) { DELEGATE(Instruction=
); }
- RetTy visitLandingPadInst(LandingPadInst &I) { DELEGATE(Instruction=
); }
+ RetTy visitInsertElementInst(InsertElementInst &I) { DELEGATE(Instructio=
n);}
+ RetTy visitShuffleVectorInst(ShuffleVectorInst &I) { DELEGATE(Instructio=
n);}
+ RetTy visitExtractValueInst(ExtractValueInst &I){ DELEGATE(UnaryInstruct=
ion);}
+ RetTy visitInsertValueInst(InsertValueInst &I) { DELEGATE(Instruction);=
}
+ RetTy visitLandingPadInst(LandingPadInst &I) { DELEGATE(Instruction);=
}
+
+ // Call and Invoke are slightly different as they delegate first through
+ // a generic CallSite visitor.
+ RetTy visitCallInst(CallInst &I) {
+ return static_cast<SubClass*>(this)->visitCallSite(&I);
+ }
+ RetTy visitInvokeInst(InvokeInst &I) {
+ return static_cast<SubClass*>(this)->visitCallSite(&I);
+ }
=20
// Next level propagators: If the user does not overload a specific
// instruction type, they can overload one of these to get the whole cla=
ss
// of instructions...
//
- RetTy visitTerminatorInst(TerminatorInst &I) { DELEGATE(Instruction); }
- RetTy visitBinaryOperator(BinaryOperator &I) { DELEGATE(Instruction); }
- RetTy visitCmpInst(CmpInst &I) { DELEGATE(Instruction); }
- RetTy visitCastInst(CastInst &I) { DELEGATE(Instruction); }
+ RetTy visitCastInst(CastInst &I) { DELEGATE(UnaryInstruct=
ion);}
+ RetTy visitBinaryOperator(BinaryOperator &I) { DELEGATE(Instruction);}
+ RetTy visitCmpInst(CmpInst &I) { DELEGATE(Instruction);}
+ RetTy visitTerminatorInst(TerminatorInst &I) { DELEGATE(Instruction);}
+ RetTy visitUnaryInstruction(UnaryInstruction &I){ DELEGATE(Instruction);}
+
+ // Provide a special visitor for a 'callsite' that visits both calls and
+ // invokes. When unimplemented, properly delegates to either the termina=
tor or
+ // regular instruction visitor.
+ RetTy visitCallSite(CallSite CS) {
+ assert(CS);
+ Instruction &I =3D *CS.getInstruction();
+ if (CS.isCall())
+ DELEGATE(Instruction);
+
+ assert(CS.isInvoke());
+ DELEGATE(TerminatorInst);
+ }
=20
// If the user wants a 'default' case, they can choose to override this
// function. If this function is not overloaded in the user's subclass,=
then
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/MachO.h
--- a/head/contrib/llvm/include/llvm/Support/MachO.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/include/llvm/Support/MachO.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -114,6 +114,10 @@
LoadCommandVersionMinIPhoneOS =3D 0x00000025u, // LC_VERSION_M=
IN_IPHONEOS
LoadCommandFunctionStarts =3D 0x00000026u, // LC_FUNCTION_=
STARTS
LoadCommandDyldEnvironment =3D 0x00000027u, // LC_DYLD_ENVI=
RONMENT
+ LoadCommandMain =3D 0x80000028u, // LC_MAIN
+ LoadCommandDataInCode =3D 0x00000029u, // LC_DATA_IN_C=
ODE
+ LoadCommandSourceVersion =3D 0x0000002Au, // LC_SOURCE_VE=
RSION
+ LoadCommandCodeSignDRs =3D 0x0000002Bu, // LC_DYLIB_COD=
E_SIGN_DRS
=20
// Constant bits for the "flags" field in llvm::MachO::segment_comma=
nd
SegmentCommandFlagBitHighVM =3D 0x1u, // SG_HIGHVM
@@ -240,6 +244,9 @@
NListSectionNoSection =3D 0u, // NO_SECT
NListSectionMaxSection =3D 0xffu, // MAX_SECT
=20
+ NListDescWeakRef =3D 0x40u,
+ NListDescWeakDef =3D 0x80u,
+
// Constant values for the "n_type" field in llvm::MachO::nlist and
// llvm::MachO::nlist_64 when "(n_type & NlistMaskStab) !=3D 0"
StabGlobalSymbol =3D 0x20u, // N_GSYM=09
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/ManagedStatic.h
--- a/head/contrib/llvm/include/llvm/Support/ManagedStatic.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/ManagedStatic.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -16,6 +16,7 @@
=20
#include "llvm/Support/Atomic.h"
#include "llvm/Support/Threading.h"
+#include "llvm/Support/Valgrind.h"
=20
namespace llvm {
=20
@@ -65,6 +66,7 @@
void* tmp =3D Ptr;
if (llvm_is_multithreaded()) sys::MemoryFence();
if (!tmp) RegisterManagedStatic(object_creator<C>, object_deleter<C>::=
call);
+ TsanHappensAfter(this);
=20
return *static_cast<C*>(Ptr);
}
@@ -72,6 +74,7 @@
void* tmp =3D Ptr;
if (llvm_is_multithreaded()) sys::MemoryFence();
if (!tmp) RegisterManagedStatic(object_creator<C>, object_deleter<C>::=
call);
+ TsanHappensAfter(this);
=20
return static_cast<C*>(Ptr);
}
@@ -79,6 +82,7 @@
void* tmp =3D Ptr;
if (llvm_is_multithreaded()) sys::MemoryFence();
if (!tmp) RegisterManagedStatic(object_creator<C>, object_deleter<C>::=
call);
+ TsanHappensAfter(this);
=20
return *static_cast<C*>(Ptr);
}
@@ -86,6 +90,7 @@
void* tmp =3D Ptr;
if (llvm_is_multithreaded()) sys::MemoryFence();
if (!tmp) RegisterManagedStatic(object_creator<C>, object_deleter<C>::=
call);
+ TsanHappensAfter(this);
=20
return static_cast<C*>(Ptr);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/MathExtras.h
--- a/head/contrib/llvm/include/llvm/Support/MathExtras.h Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/MathExtras.h Tue Apr 17 11:51:=
51 2012 +0300
@@ -51,6 +51,13 @@
return static_cast<int32_t>(x) =3D=3D x;
}
=20
+/// isShiftedInt<N,S> - Checks if a signed integer is an N bit number shif=
ted
+/// left by S.
+template<unsigned N, unsigned S>
+inline bool isShiftedInt(int64_t x) {
+ return isInt<N+S>(x) && (x % (1<<S) =3D=3D 0);
+}
+
/// isUInt - Checks if an unsigned integer fits into the given bit width.
template<unsigned N>
inline bool isUInt(uint64_t x) {
@@ -70,6 +77,13 @@
return static_cast<uint32_t>(x) =3D=3D x;
}
=20
+/// isShiftedUInt<N,S> - Checks if a unsigned integer is an N bit number s=
hifted
+/// left by S.
+template<unsigned N, unsigned S>
+inline bool isShiftedUInt(uint64_t x) {
+ return isUInt<N+S>(x) && (x % (1<<S) =3D=3D 0);
+}
+
/// isUIntN - Checks if an unsigned integer fits into the given (dynamic)
/// bit width.
inline bool isUIntN(unsigned N, uint64_t x) {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/MemoryObject.h
--- a/head/contrib/llvm/include/llvm/Support/MemoryObject.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/MemoryObject.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -23,19 +23,19 @@
public:
/// Destructor - Override as necessary.
virtual ~MemoryObject();
- =20
+
/// getBase - Returns the lowest valid address in the region.
///
/// @result - The lowest valid address.
virtual uint64_t getBase() const =3D 0;
- =20
+
/// getExtent - Returns the size of the region in bytes. (The reg=
ion is
- /// contiguous, so the highest valid address of the re=
gion=20
+ /// contiguous, so the highest valid address of the re=
gion
/// is getBase() + getExtent() - 1).
///
/// @result - The size of the region.
virtual uint64_t getExtent() const =3D 0;
- =20
+
/// readByte - Tries to read a single byte from the region.
///
/// @param address - The address of the byte, in the same space as getB=
ase().
@@ -43,7 +43,7 @@
/// @result - 0 if successful; -1 if not. Failure may be due to=
a
/// bounds violation or an implementation-specific err=
or.
virtual int readByte(uint64_t address, uint8_t* ptr) const =3D 0;
- =20
+
/// readBytes - Tries to read a contiguous range of bytes from the
/// region, up to the end of the region.
/// You should override this function if there is a qu=
icker
@@ -67,4 +67,3 @@
}
=20
#endif
-
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/PathV1.h
--- a/head/contrib/llvm/include/llvm/Support/PathV1.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/PathV1.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -131,20 +131,6 @@
/// @brief Find a library.
static Path FindLibrary(std::string& short_name);
=20
- /// Construct a path to the default LLVM configuration directory. The
- /// implementation must ensure that this is a well-known (same on ma=
ny
- /// systems) directory in which llvm configuration files exist. For
- /// example, on Unix, the /etc/llvm directory has been selected.
- /// @brief Construct a path to the default LLVM configuration direct=
ory
- static Path GetLLVMDefaultConfigDir();
-
- /// Construct a path to the LLVM installed configuration directory. =
The
- /// implementation must ensure that this refers to the "etc" directo=
ry of
- /// the LLVM installation. This is the location where configuration =
files
- /// will be located for a particular installation of LLVM on a machi=
ne.
- /// @brief Construct a path to the LLVM installed configuration dire=
ctory
- static Path GetLLVMConfigDir();
-
/// Construct a path to the current user's home directory. The
/// implementation must use an operating system specific mechanism f=
or
/// determining the user's home directory. For example, the environm=
ent
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/PatternMatch.h
--- a/head/contrib/llvm/include/llvm/Support/PatternMatch.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/PatternMatch.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -31,6 +31,7 @@
=20
#include "llvm/Constants.h"
#include "llvm/Instructions.h"
+#include "llvm/Operator.h"
=20
namespace llvm {
namespace PatternMatch {
@@ -97,12 +98,19 @@
Res =3D &CI->getValue();
return true;
}
+ // FIXME: Remove this.
if (ConstantVector *CV =3D dyn_cast<ConstantVector>(V))
if (ConstantInt *CI =3D
dyn_cast_or_null<ConstantInt>(CV->getSplatValue())) {
Res =3D &CI->getValue();
return true;
}
+ if (ConstantDataVector *CV =3D dyn_cast<ConstantDataVector>(V))
+ if (ConstantInt *CI =3D
+ dyn_cast_or_null<ConstantInt>(CV->getSplatValue())) {
+ Res =3D &CI->getValue();
+ return true;
+ }
return false;
}
};
@@ -143,9 +151,13 @@
bool match(ITy *V) {
if (const ConstantInt *CI =3D dyn_cast<ConstantInt>(V))
return this->isValue(CI->getValue());
+ // FIXME: Remove this.
if (const ConstantVector *CV =3D dyn_cast<ConstantVector>(V))
if (ConstantInt *CI =3D dyn_cast_or_null<ConstantInt>(CV->getSplatVa=
lue()))
return this->isValue(CI->getValue());
+ if (const ConstantDataVector *CV =3D dyn_cast<ConstantDataVector>(V))
+ if (ConstantInt *CI =3D dyn_cast_or_null<ConstantInt>(CV->getSplatVa=
lue()))
+ return this->isValue(CI->getValue());
return false;
}
};
@@ -163,12 +175,22 @@
Res =3D &CI->getValue();
return true;
}
+ =20
+ // FIXME: remove.
if (const ConstantVector *CV =3D dyn_cast<ConstantVector>(V))
if (ConstantInt *CI =3D dyn_cast_or_null<ConstantInt>(CV->getSplatVa=
lue()))
if (this->isValue(CI->getValue())) {
Res =3D &CI->getValue();
return true;
}
+ =20
+ if (const ConstantDataVector *CV =3D dyn_cast<ConstantDataVector>(V))
+ if (ConstantInt *CI =3D dyn_cast_or_null<ConstantInt>(CV->getSplatVa=
lue()))
+ if (this->isValue(CI->getValue())) {
+ Res =3D &CI->getValue();
+ return true;
+ }
+
return false;
}
};
@@ -441,6 +463,26 @@
}
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+// Class that matches exact binary ops.
+//
+template<typename SubPattern_t>
+struct Exact_match {
+ SubPattern_t SubPattern;
+
+ Exact_match(const SubPattern_t &SP) : SubPattern(SP) {}
+
+ template<typename OpTy>
+ bool match(OpTy *V) {
+ if (PossiblyExactOperator *PEO =3D dyn_cast<PossiblyExactOperator>(V))
+ return PEO->isExact() && SubPattern.match(V);
+ return false;
+ }
+};
+
+template<typename T>
+inline Exact_match<T> m_Exact(const T &SubPattern) { return SubPattern; }
+
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// Matchers for CmpInst classes
//
=20
@@ -529,10 +571,8 @@
=20
template<typename OpTy>
bool match(OpTy *V) {
- if (CastInst *I =3D dyn_cast<CastInst>(V))
- return I->getOpcode() =3D=3D Opcode && Op.match(I->getOperand(0));
- if (ConstantExpr *CE =3D dyn_cast<ConstantExpr>(V))
- return CE->getOpcode() =3D=3D Opcode && Op.match(CE->getOperand(0));
+ if (Operator *O =3D dyn_cast<Operator>(V))
+ return O->getOpcode() =3D=3D Opcode && Op.match(O->getOperand(0));
return false;
}
};
@@ -585,21 +625,18 @@
=20
template<typename OpTy>
bool match(OpTy *V) {
- if (Instruction *I =3D dyn_cast<Instruction>(V))
- if (I->getOpcode() =3D=3D Instruction::Xor)
- return matchIfNot(I->getOperand(0), I->getOperand(1));
- if (ConstantExpr *CE =3D dyn_cast<ConstantExpr>(V))
- if (CE->getOpcode() =3D=3D Instruction::Xor)
- return matchIfNot(CE->getOperand(0), CE->getOperand(1));
+ if (Operator *O =3D dyn_cast<Operator>(V))
+ if (O->getOpcode() =3D=3D Instruction::Xor)
+ return matchIfNot(O->getOperand(0), O->getOperand(1));
return false;
}
private:
bool matchIfNot(Value *LHS, Value *RHS) {
- if (ConstantInt *CI =3D dyn_cast<ConstantInt>(RHS))
- return CI->isAllOnesValue() && L.match(LHS);
- if (ConstantVector *CV =3D dyn_cast<ConstantVector>(RHS))
- return CV->isAllOnesValue() && L.match(LHS);
- return false;
+ return (isa<ConstantInt>(RHS) || isa<ConstantDataVector>(RHS) ||
+ // FIXME: Remove CV.
+ isa<ConstantVector>(RHS)) &&
+ cast<Constant>(RHS)->isAllOnesValue() &&
+ L.match(LHS);
}
};
=20
@@ -615,19 +652,16 @@
=20
template<typename OpTy>
bool match(OpTy *V) {
- if (Instruction *I =3D dyn_cast<Instruction>(V))
- if (I->getOpcode() =3D=3D Instruction::Sub)
- return matchIfNeg(I->getOperand(0), I->getOperand(1));
- if (ConstantExpr *CE =3D dyn_cast<ConstantExpr>(V))
- if (CE->getOpcode() =3D=3D Instruction::Sub)
- return matchIfNeg(CE->getOperand(0), CE->getOperand(1));
+ if (Operator *O =3D dyn_cast<Operator>(V))
+ if (O->getOpcode() =3D=3D Instruction::Sub)
+ return matchIfNeg(O->getOperand(0), O->getOperand(1));
return false;
}
private:
bool matchIfNeg(Value *LHS, Value *RHS) {
- if (ConstantInt *C =3D dyn_cast<ConstantInt>(LHS))
- return C->isZero() && L.match(RHS);
- return false;
+ return ((isa<ConstantInt>(LHS) && cast<ConstantInt>(LHS)->isZero()) ||
+ isa<ConstantAggregateZero>(LHS)) &&
+ L.match(RHS);
}
};
=20
@@ -644,12 +678,9 @@
=20
template<typename OpTy>
bool match(OpTy *V) {
- if (Instruction *I =3D dyn_cast<Instruction>(V))
- if (I->getOpcode() =3D=3D Instruction::FSub)
- return matchIfFNeg(I->getOperand(0), I->getOperand(1));
- if (ConstantExpr *CE =3D dyn_cast<ConstantExpr>(V))
- if (CE->getOpcode() =3D=3D Instruction::FSub)
- return matchIfFNeg(CE->getOperand(0), CE->getOperand(1));
+ if (Operator *O =3D dyn_cast<Operator>(V))
+ if (O->getOpcode() =3D=3D Instruction::FSub)
+ return matchIfFNeg(O->getOperand(0), O->getOperand(1));
return false;
}
private:
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/Process.h
--- a/head/contrib/llvm/include/llvm/Support/Process.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/Process.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -138,9 +138,6 @@
=20
/// Resets the terminals colors, or returns an escape sequence to do=
so.
static const char *ResetColor();
-
- /// Change the program working directory to that given by \arg Path.
- static void SetWorkingDirectory(std::string Path);
/// @}
};
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/Program.h
--- a/head/contrib/llvm/include/llvm/Support/Program.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/Program.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -17,6 +17,7 @@
#include "llvm/Support/Path.h"
=20
namespace llvm {
+class error_code;
namespace sys {
=20
// TODO: Add operations to communicate with the process, redirect its I/=
O,
@@ -122,12 +123,12 @@
/// @brief Construct a Program by finding it by name.
static Path FindProgramByName(const std::string& name);
=20
- // These methods change the specified standard stream (stdin,
- // stdout, or stderr) to binary mode. They return true if an error
- // occurred
- static bool ChangeStdinToBinary();
- static bool ChangeStdoutToBinary();
- static bool ChangeStderrToBinary();
+ // These methods change the specified standard stream (stdin, stdout, =
or
+ // stderr) to binary mode. They return errc::success if the specified =
stream
+ // was changed. Otherwise a platform dependent error is returned.
+ static error_code ChangeStdinToBinary();
+ static error_code ChangeStdoutToBinary();
+ static error_code ChangeStderrToBinary();
=20
/// A convenience function equivalent to Program prg; prg.Execute(..);
/// prg.Wait(..);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/Recycler.h
--- a/head/contrib/llvm/include/llvm/Support/Recycler.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/Recycler.h Tue Apr 17 11:51:51=
2012 +0300
@@ -17,6 +17,7 @@
=20
#include "llvm/ADT/ilist.h"
#include "llvm/Support/AlignOf.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cassert>
=20
namespace llvm {
@@ -52,7 +53,7 @@
static void noteHead(RecyclerStruct*, RecyclerStruct*) {}
=20
static void deleteNode(RecyclerStruct *) {
- assert(0 && "Recycler's ilist_traits shouldn't see a deleteNode call!"=
);
+ llvm_unreachable("Recycler's ilist_traits shouldn't see a deleteNode c=
all!");
}
};
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/SMLoc.h
--- a/head/contrib/llvm/include/llvm/Support/SMLoc.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/include/llvm/Support/SMLoc.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -15,9 +15,11 @@
#ifndef SUPPORT_SMLOC_H
#define SUPPORT_SMLOC_H
=20
+#include <cassert>
+
namespace llvm {
=20
-// SMLoc - Represents a location in source code.
+/// SMLoc - Represents a location in source code.
class SMLoc {
const char *Ptr;
public:
@@ -38,7 +40,23 @@
}
};
=20
-}
+/// SMRange - Represents a range in source code. Note that unlike standar=
d STL
+/// ranges, the locations specified are considered to be *inclusive*. For
+/// example, [X,X] *does* include X, it isn't an empty range.
+class SMRange {
+public:
+ SMLoc Start, End;
+
+ SMRange() {}
+ SMRange(SMLoc Start, SMLoc End) : Start(Start), End(End) {
+ assert(Start.isValid() =3D=3D End.isValid() &&
+ "Start and end should either both be valid or both be invalid!"=
);
+ }
+ =20
+ bool isValid() const { return Start.isValid(); }
+};
+ =20
+} // end namespace llvm
=20
#endif
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/SourceMgr.h
--- a/head/contrib/llvm/include/llvm/Support/SourceMgr.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/SourceMgr.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -17,10 +17,8 @@
#define SUPPORT_SOURCEMGR_H
=20
#include "llvm/Support/SMLoc.h"
-
+#include "llvm/ADT/ArrayRef.h"
#include <string>
-#include <vector>
-#include <cassert>
=20
namespace llvm {
class MemoryBuffer;
@@ -33,10 +31,16 @@
/// and handles diagnostic wrangling.
class SourceMgr {
public:
+ enum DiagKind {
+ DK_Error,
+ DK_Warning,
+ DK_Note
+ };
+ =20
/// DiagHandlerTy - Clients that want to handle their own diagnostics in=
a
/// custom way can register a function pointer+context as a diagnostic
/// handler. It gets called each time PrintMessage is invoked.
- typedef void (*DiagHandlerTy)(const SMDiagnostic&, void *Context);
+ typedef void (*DiagHandlerTy)(const SMDiagnostic &, void *Context);
private:
struct SrcBuffer {
/// Buffer - The memory buffer for the file.
@@ -124,11 +128,8 @@
/// PrintMessage - Emit a message about the specified location with the
/// specified string.
///
- /// @param Type - If non-null, the kind of message (e.g., "error") which=
is
- /// prefixed to the message.
- /// @param ShowLine - Should the diagnostic show the source line.
- void PrintMessage(SMLoc Loc, const Twine &Msg, const char *Type,
- bool ShowLine =3D true) const;
+ void PrintMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg,
+ ArrayRef<SMRange> Ranges =3D ArrayRef<SMRange>()) cons=
t;
=20
=20
/// GetMessage - Return an SMDiagnostic at the specified location with t=
he
@@ -136,10 +137,8 @@
///
/// @param Type - If non-null, the kind of message (e.g., "error") which=
is
/// prefixed to the message.
- /// @param ShowLine - Should the diagnostic show the source line.
- SMDiagnostic GetMessage(SMLoc Loc,
- const Twine &Msg, const char *Type,
- bool ShowLine =3D true) const;
+ SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg,=20
+ ArrayRef<SMRange> Ranges =3D ArrayRef<SMRange>()=
) const;
=20
/// PrintIncludeStack - Prints the names of included files and the line =
of the
/// file they were included from. A diagnostic handler can use this bef=
ore
@@ -158,35 +157,38 @@
SMLoc Loc;
std::string Filename;
int LineNo, ColumnNo;
+ SourceMgr::DiagKind Kind;
std::string Message, LineContents;
- unsigned ShowLine : 1;
+ std::vector<std::pair<unsigned, unsigned> > Ranges;
=20
public:
// Null diagnostic.
- SMDiagnostic() : SM(0), LineNo(0), ColumnNo(0), ShowLine(0) {}
+ SMDiagnostic()
+ : SM(0), LineNo(0), ColumnNo(0), Kind(SourceMgr::DK_Error) {}
// Diagnostic with no location (e.g. file not found, command line arg er=
ror).
- SMDiagnostic(const std::string &filename, const std::string &Msg)
- : SM(0), Filename(filename), LineNo(-1), ColumnNo(-1),
- Message(Msg), ShowLine(false) {}
+ SMDiagnostic(const std::string &filename, SourceMgr::DiagKind Kind,
+ const std::string &Msg)
+ : SM(0), Filename(filename), LineNo(-1), ColumnNo(-1), Kind(Kind),
+ Message(Msg) {}
=20
// Diagnostic with a location.
SMDiagnostic(const SourceMgr &sm, SMLoc L, const std::string &FN,
- int Line, int Col,
+ int Line, int Col, SourceMgr::DiagKind Kind,
const std::string &Msg, const std::string &LineStr,
- bool showline =3D true)
- : SM(&sm), Loc(L), Filename(FN), LineNo(Line), ColumnNo(Col), Message(=
Msg),
- LineContents(LineStr), ShowLine(showline) {}
+ ArrayRef<std::pair<unsigned,unsigned> > Ranges);
=20
const SourceMgr *getSourceMgr() const { return SM; }
SMLoc getLoc() const { return Loc; }
const std::string &getFilename() const { return Filename; }
int getLineNo() const { return LineNo; }
int getColumnNo() const { return ColumnNo; }
+ SourceMgr::DiagKind getKind() const { return Kind; }
const std::string &getMessage() const { return Message; }
const std::string &getLineContents() const { return LineContents; }
- bool getShowLine() const { return ShowLine; }
- =20
- void Print(const char *ProgName, raw_ostream &S) const;
+ const std::vector<std::pair<unsigned, unsigned> > &getRanges() const {
+ return Ranges;
+ }
+ void print(const char *ProgName, raw_ostream &S) const;
};
=20
} // end llvm namespace
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/TargetRegistry.h
--- a/head/contrib/llvm/include/llvm/Support/TargetRegistry.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/TargetRegistry.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -44,12 +44,14 @@
class MCTargetAsmLexer;
class MCTargetAsmParser;
class TargetMachine;
+ class TargetOptions;
class raw_ostream;
class formatted_raw_ostream;
=20
MCStreamer *createAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
bool isVerboseAsm,
bool useLoc, bool useCFI,
+ bool useDwarfDirectory,
MCInstPrinter *InstPrint,
MCCodeEmitter *CE,
MCAsmBackend *TAB,
@@ -73,7 +75,8 @@
StringRef TT);
typedef MCCodeGenInfo *(*MCCodeGenInfoCtorFnTy)(StringRef TT,
Reloc::Model RM,
- CodeModel::Model CM);
+ CodeModel::Model CM,
+ CodeGenOpt::Level OL);
typedef MCInstrInfo *(*MCInstrInfoCtorFnTy)(void);
typedef MCInstrAnalysis *(*MCInstrAnalysisCtorFnTy)(const MCInstrInfo*=
Info);
typedef MCRegisterInfo *(*MCRegInfoCtorFnTy)(StringRef TT);
@@ -84,8 +87,10 @@
StringRef TT,
StringRef CPU,
StringRef Features,
+ const TargetOptions &Opt=
ions,
Reloc::Model RM,
- CodeModel::Model CM);
+ CodeModel::Model CM,
+ CodeGenOpt::Level OL);
typedef AsmPrinter *(*AsmPrinterCtorTy)(TargetMachine &TM,
MCStreamer &Streamer);
typedef MCAsmBackend *(*MCAsmBackendCtorTy)(const Target &T, StringRef=
TT);
@@ -99,6 +104,8 @@
typedef MCInstPrinter *(*MCInstPrinterCtorTy)(const Target &T,
unsigned SyntaxVariant,
const MCAsmInfo &MAI,
+ const MCInstrInfo &MII,
+ const MCRegisterInfo &MR=
I,
const MCSubtargetInfo &S=
TI);
typedef MCCodeEmitter *(*MCCodeEmitterCtorTy)(const MCInstrInfo &II,
const MCSubtargetInfo &S=
TI,
@@ -116,6 +123,7 @@
bool isVerboseAsm,
bool useLoc,
bool useCFI,
+ bool useDwarfDirectory,
MCInstPrinter *InstPrint,
MCCodeEmitter *CE,
MCAsmBackend *TAB,
@@ -143,8 +151,8 @@
/// registered.
MCAsmInfoCtorFnTy MCAsmInfoCtorFn;
=20
- /// MCCodeGenInfoCtorFn - Constructor function for this target's MCCod=
eGenInfo,
- /// if registered.
+ /// MCCodeGenInfoCtorFn - Constructor function for this target's
+ /// MCCodeGenInfo, if registered.
MCCodeGenInfoCtorFnTy MCCodeGenInfoCtorFn;
=20
/// MCInstrInfoCtorFn - Constructor function for this target's MCInstr=
Info,
@@ -275,10 +283,11 @@
/// createMCCodeGenInfo - Create a MCCodeGenInfo implementation.
///
MCCodeGenInfo *createMCCodeGenInfo(StringRef Triple, Reloc::Model RM,
- CodeModel::Model CM) const {
+ CodeModel::Model CM,
+ CodeGenOpt::Level OL) const {
if (!MCCodeGenInfoCtorFn)
return 0;
- return MCCodeGenInfoCtorFn(Triple, RM, CM);
+ return MCCodeGenInfoCtorFn(Triple, RM, CM, OL);
}
=20
/// createMCInstrInfo - Create a MCInstrInfo implementation.
@@ -329,12 +338,14 @@
/// either the target triple from the module, or the target triple of =
the
/// host if that does not exist.
TargetMachine *createTargetMachine(StringRef Triple, StringRef CPU,
- StringRef Features,
- Reloc::Model RM =3D Reloc::Default,
- CodeModel::Model CM =3D CodeModel::Default)=
const {
+ StringRef Features, const TargetOptions &Opti=
ons,
+ Reloc::Model RM =3D Reloc::Default,
+ CodeModel::Model CM =3D CodeModel::Default,
+ CodeGenOpt::Level OL =3D CodeGenOpt::Default)=
const {
if (!TargetMachineCtorFn)
return 0;
- return TargetMachineCtorFn(*this, Triple, CPU, Features, RM, CM);
+ return TargetMachineCtorFn(*this, Triple, CPU, Features, Options,
+ RM, CM, OL);
}
=20
/// createMCAsmBackend - Create a target specific assembly parser.
@@ -383,10 +394,12 @@
=20
MCInstPrinter *createMCInstPrinter(unsigned SyntaxVariant,
const MCAsmInfo &MAI,
+ const MCInstrInfo &MII,
+ const MCRegisterInfo &MRI,
const MCSubtargetInfo &STI) const {
if (!MCInstPrinterCtorFn)
return 0;
- return MCInstPrinterCtorFn(*this, SyntaxVariant, MAI, STI);
+ return MCInstPrinterCtorFn(*this, SyntaxVariant, MAI, MII, MRI, STI);
}
=20
=20
@@ -426,13 +439,14 @@
bool isVerboseAsm,
bool useLoc,
bool useCFI,
+ bool useDwarfDirectory,
MCInstPrinter *InstPrint,
MCCodeEmitter *CE,
MCAsmBackend *TAB,
bool ShowInst) const {
// AsmStreamerCtorFn is default to llvm::createAsmStreamer
return AsmStreamerCtorFn(Ctx, OS, isVerboseAsm, useLoc, useCFI,
- InstPrint, CE, TAB, ShowInst);
+ useDwarfDirectory, InstPrint, CE, TAB, Show=
Inst);
}
=20
/// @}
@@ -776,7 +790,7 @@
/// extern "C" void LLVMInitializeFooTargetInfo() {
/// RegisterTarget<Triple::foo> X(TheFooTarget, "foo", "Foo descriptio=
n");
/// }
- template<Triple::ArchType TargetArchType =3D Triple::InvalidArch,
+ template<Triple::ArchType TargetArchType =3D Triple::UnknownArch,
bool HasJIT =3D false>
struct RegisterTarget {
RegisterTarget(Target &T, const char *Name, const char *Desc) {
@@ -840,8 +854,8 @@
TargetRegistry::RegisterMCCodeGenInfo(T, &Allocator);
}
private:
- static MCCodeGenInfo *Allocator(StringRef TT,
- Reloc::Model RM, CodeModel::Model CM) {
+ static MCCodeGenInfo *Allocator(StringRef TT, Reloc::Model RM,
+ CodeModel::Model CM, CodeGenOpt::Level=
OL) {
return new MCCodeGenInfoImpl();
}
};
@@ -1010,9 +1024,11 @@
private:
static TargetMachine *Allocator(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
+ const TargetOptions &Options,
Reloc::Model RM,
- CodeModel::Model CM) {
- return new TargetMachineImpl(T, TT, CPU, FS, RM, CM);
+ CodeModel::Model CM,
+ CodeGenOpt::Level OL) {
+ return new TargetMachineImpl(T, TT, CPU, FS, Options, RM, CM, OL);
}
};
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/TargetSelect.h
--- a/head/contrib/llvm/include/llvm/Support/TargetSelect.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/TargetSelect.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -149,6 +149,18 @@
#endif
} =20
=20
+ /// InitializeNativeTargetDisassembler - The main program should call
+ /// this function to initialize the native target disassembler.
+ inline bool InitializeNativeTargetDisassembler() {
+ // If we have a native target, initialize the corresponding disassembler.
+#ifdef LLVM_NATIVE_DISASSEMBLER
+ LLVM_NATIVE_DISASSEMBLER();
+ return false;
+#else
+ return true;
+#endif
+ } =20
+
}
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/Valgrind.h
--- a/head/contrib/llvm/include/llvm/Support/Valgrind.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/Valgrind.h Tue Apr 17 11:51:51=
2012 +0300
@@ -16,8 +16,23 @@
#ifndef LLVM_SYSTEM_VALGRIND_H
#define LLVM_SYSTEM_VALGRIND_H
=20
+#include "llvm/Support/Compiler.h"
+#include "llvm/Config/llvm-config.h"
#include <stddef.h>
=20
+#if LLVM_ENABLE_THREADS !=3D 0 && !defined(NDEBUG)
+// tsan (Thread Sanitizer) is a valgrind-based tool that detects these exa=
ct
+// functions by name.
+extern "C" {
+LLVM_ATTRIBUTE_WEAK void AnnotateHappensAfter(const char *file, int line,
+ const volatile void *cv);
+LLVM_ATTRIBUTE_WEAK void AnnotateHappensBefore(const char *file, int line,
+ const volatile void *cv);
+LLVM_ATTRIBUTE_WEAK void AnnotateIgnoreWritesBegin(const char *file, int l=
ine);
+LLVM_ATTRIBUTE_WEAK void AnnotateIgnoreWritesEnd(const char *file, int lin=
e);
+}
+#endif
+
namespace llvm {
namespace sys {
// True if Valgrind is controlling this process.
@@ -26,6 +41,34 @@
// Discard valgrind's translation of code in the range [Addr .. Addr + L=
en).
// Otherwise valgrind may continue to execute the old version of the cod=
e.
void ValgrindDiscardTranslations(const void *Addr, size_t Len);
+
+#if LLVM_ENABLE_THREADS !=3D 0 && !defined(NDEBUG)
+ // Thread Sanitizer is a valgrind tool that finds races in code.
+ // See http://code.google.com/p/data-race-test/wiki/DynamicAnnotations .
+
+ // This marker is used to define a happens-before arc. The race detector=
will
+ // infer an arc from the begin to the end when they share the same point=
er
+ // argument.
+ #define TsanHappensBefore(cv) \
+ AnnotateHappensBefore(__FILE__, __LINE__, cv)
+
+ // This marker defines the destination of a happens-before arc.
+ #define TsanHappensAfter(cv) \
+ AnnotateHappensAfter(__FILE__, __LINE__, cv)
+
+ // Ignore any races on writes between here and the next TsanIgnoreWrites=
End.
+ #define TsanIgnoreWritesBegin() \
+ AnnotateIgnoreWritesBegin(__FILE__, __LINE__)
+
+ // Resume checking for racy writes.
+ #define TsanIgnoreWritesEnd() \
+ AnnotateIgnoreWritesEnd(__FILE__, __LINE__)
+#else
+ #define TsanHappensBefore(cv)
+ #define TsanHappensAfter(cv)
+ #define TsanIgnoreWritesBegin()
+ #define TsanIgnoreWritesEnd()
+#endif
}
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/ValueHandle.h
--- a/head/contrib/llvm/include/llvm/Support/ValueHandle.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/ValueHandle.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -49,52 +49,61 @@
Tracking,
Weak
};
+
private:
-
PointerIntPair<ValueHandleBase**, 2, HandleBaseKind> PrevPair;
ValueHandleBase *Next;
- Value *VP;
+
+ // A subclass may want to store some information along with the value
+ // pointer. Allow them to do this by making the value pointer a pointer-=
int
+ // pair. The 'setValPtrInt' and 'getValPtrInt' methods below give them t=
his
+ // access.
+ PointerIntPair<Value*, 2> VP;
=20
explicit ValueHandleBase(const ValueHandleBase&); // DO NOT IMPLEMENT.
public:
explicit ValueHandleBase(HandleBaseKind Kind)
- : PrevPair(0, Kind), Next(0), VP(0) {}
+ : PrevPair(0, Kind), Next(0), VP(0, 0) {}
ValueHandleBase(HandleBaseKind Kind, Value *V)
- : PrevPair(0, Kind), Next(0), VP(V) {
- if (isValid(VP))
+ : PrevPair(0, Kind), Next(0), VP(V, 0) {
+ if (isValid(VP.getPointer()))
AddToUseList();
}
ValueHandleBase(HandleBaseKind Kind, const ValueHandleBase &RHS)
: PrevPair(0, Kind), Next(0), VP(RHS.VP) {
- if (isValid(VP))
+ if (isValid(VP.getPointer()))
AddToExistingUseList(RHS.getPrevPtr());
}
~ValueHandleBase() {
- if (isValid(VP))
+ if (isValid(VP.getPointer()))
RemoveFromUseList();
}
=20
Value *operator=3D(Value *RHS) {
- if (VP =3D=3D RHS) return RHS;
- if (isValid(VP)) RemoveFromUseList();
- VP =3D RHS;
- if (isValid(VP)) AddToUseList();
+ if (VP.getPointer() =3D=3D RHS) return RHS;
+ if (isValid(VP.getPointer())) RemoveFromUseList();
+ VP.setPointer(RHS);
+ if (isValid(VP.getPointer())) AddToUseList();
return RHS;
}
=20
Value *operator=3D(const ValueHandleBase &RHS) {
- if (VP =3D=3D RHS.VP) return RHS.VP;
- if (isValid(VP)) RemoveFromUseList();
- VP =3D RHS.VP;
- if (isValid(VP)) AddToExistingUseList(RHS.getPrevPtr());
- return VP;
+ if (VP.getPointer() =3D=3D RHS.VP.getPointer()) return RHS.VP.getPoint=
er();
+ if (isValid(VP.getPointer())) RemoveFromUseList();
+ VP.setPointer(RHS.VP.getPointer());
+ if (isValid(VP.getPointer())) AddToExistingUseList(RHS.getPrevPtr());
+ return VP.getPointer();
}
=20
Value *operator->() const { return getValPtr(); }
Value &operator*() const { return *getValPtr(); }
=20
protected:
- Value *getValPtr() const { return VP; }
+ Value *getValPtr() const { return VP.getPointer(); }
+
+ void setValPtrInt(unsigned K) { VP.setInt(K); }
+ unsigned getValPtrInt() const { return VP.getInt(); }
+
static bool isValid(Value *V) {
return V &&
V !=3D DenseMapInfo<Value *>::getEmptyKey() &&
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/system_error.h
--- a/head/contrib/llvm/include/llvm/Support/system_error.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/system_error.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -470,17 +470,6 @@
=20
namespace llvm {
=20
-template <class T, T v>
-struct integral_constant {
- typedef T value_type;
- static const value_type value =3D v;
- typedef integral_constant<T,v> type;
- operator value_type() { return value; }
-};
-
-typedef integral_constant<bool, true> true_type;
-typedef integral_constant<bool, false> false_type;
-
// is_error_code_enum
=20
template <class Tp> struct is_error_code_enum : public false_type {};
@@ -738,6 +727,10 @@
public:
error_code() : _val_(0), _cat_(&system_category()) {}
=20
+ static error_code success() {
+ return error_code();
+ }
+
error_code(int _val, const error_category& _cat)
: _val_(_val), _cat_(&_cat) {}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Support=
/type_traits.h
--- a/head/contrib/llvm/include/llvm/Support/type_traits.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Support/type_traits.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -17,6 +17,8 @@
#ifndef LLVM_SUPPORT_TYPE_TRAITS_H
#define LLVM_SUPPORT_TYPE_TRAITS_H
=20
+#include "llvm/Support/DataTypes.h"
+#include <cstddef>
#include <utility>
=20
// This is actually the conforming implementation which works with abstract
@@ -64,22 +66,99 @@
// std::pair's are pod-like if their elements are.
template<typename T, typename U>
struct isPodLike<std::pair<T, U> > {
- static const bool value =3D isPodLike<T>::value & isPodLike<U>::value;
+ static const bool value =3D isPodLike<T>::value && isPodLike<U>::value;
};
=20
=20
+template <class T, T v>
+struct integral_constant {
+ typedef T value_type;
+ static const value_type value =3D v;
+ typedef integral_constant<T,v> type;
+ operator value_type() { return value; }
+};
+
+typedef integral_constant<bool, true> true_type;
+typedef integral_constant<bool, false> false_type;
+
/// \brief Metafunction that determines whether the two given types are=20
/// equivalent.
-template<typename T, typename U>
-struct is_same {
- static const bool value =3D false;
+template<typename T, typename U> struct is_same : public false_type =
{};
+template<typename T> struct is_same<T, T> : public true_type {=
};
+
+/// \brief Metafunction that removes const qualification from a type.
+template <typename T> struct remove_const { typedef T type; };
+template <typename T> struct remove_const<const T> { typedef T type; };
+
+/// \brief Metafunction that removes volatile qualification from a type.
+template <typename T> struct remove_volatile { typedef T type;=
};
+template <typename T> struct remove_volatile<volatile T> { typedef T type;=
};
+
+/// \brief Metafunction that removes both const and volatile qualification=
from
+/// a type.
+template <typename T> struct remove_cv {
+ typedef typename remove_const<typename remove_volatile<T>::type>::type t=
ype;
};
=20
-template<typename T>
-struct is_same<T, T> {
- static const bool value =3D true;
+/// \brief Helper to implement is_integral metafunction.
+template <typename T> struct is_integral_impl : false_type {};
+template <> struct is_integral_impl< bool> : true_type {};
+template <> struct is_integral_impl< char> : true_type {};
+template <> struct is_integral_impl< signed char> : true_type {};
+template <> struct is_integral_impl<unsigned char> : true_type {};
+template <> struct is_integral_impl< wchar_t> : true_type {};
+template <> struct is_integral_impl< short> : true_type {};
+template <> struct is_integral_impl<unsigned short> : true_type {};
+template <> struct is_integral_impl< int> : true_type {};
+template <> struct is_integral_impl<unsigned int> : true_type {};
+template <> struct is_integral_impl< long> : true_type {};
+template <> struct is_integral_impl<unsigned long> : true_type {};
+template <> struct is_integral_impl< long long> : true_type {};
+template <> struct is_integral_impl<unsigned long long> : true_type {};
+
+/// \brief Metafunction that determines whether the given type is an integ=
ral
+/// type.
+template <typename T>
+struct is_integral : is_integral_impl<T> {};
+
+/// \brief Metafunction to remove reference from a type.
+template <typename T> struct remove_reference { typedef T type; };
+template <typename T> struct remove_reference<T&> { typedef T type; };
+
+/// \brief Metafunction that determines whether the given type is a pointer
+/// type.
+template <typename T> struct is_pointer : false_type {};
+template <typename T> struct is_pointer<T*> : true_type {};
+template <typename T> struct is_pointer<T* const> : true_type {};
+template <typename T> struct is_pointer<T* volatile> : true_type {};
+template <typename T> struct is_pointer<T* const volatile> : true_type {};
+
+/// \brief Metafunction that determines whether the given type is either an
+/// integral type or an enumeration type.
+///
+/// Note that this accepts potentially more integral types than we whiteli=
st
+/// above for is_integral because it is based on merely being convertible
+/// implicitly to an integral type.
+template <typename T> class is_integral_or_enum {
+ // Provide an overload which can be called with anything implicitly
+ // convertible to an unsigned long long. This should catch integer types=
and
+ // enumeration types at least. We blacklist classes with conversion oper=
ators
+ // below.
+ static double check_int_convertible(unsigned long long);
+ static char check_int_convertible(...);
+
+ typedef typename remove_reference<T>::type UnderlyingT;
+ static UnderlyingT &nonce_instance;
+
+public:
+ enum {
+ value =3D (!is_class<UnderlyingT>::value && !is_pointer<UnderlyingT>::=
value &&
+ !is_same<UnderlyingT, float>::value &&
+ !is_same<UnderlyingT, double>::value &&
+ sizeof(char) !=3D sizeof(check_int_convertible(nonce_instance=
)))
+ };
};
- =20
+
// enable_if_c - Enable/disable a template based on a metafunction
template<bool Cond, typename T =3D void>
struct enable_if_c {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/TableGe=
n/Record.h
--- a/head/contrib/llvm/include/llvm/TableGen/Record.h Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/include/llvm/TableGen/Record.h Tue Apr 17 11:51:51 =
2012 +0300
@@ -20,6 +20,7 @@
#include "llvm/Support/Allocator.h"
#include "llvm/Support/SourceMgr.h"
#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include <map>
=20
@@ -32,7 +33,6 @@
class IntRecTy;
class StringRecTy;
class ListRecTy;
-class CodeRecTy;
class DagRecTy;
class RecordRecTy;
=20
@@ -43,7 +43,6 @@
class BitsInit;
class IntInit;
class StringInit;
-class CodeInit;
class ListInit;
class UnOpInit;
class BinOpInit;
@@ -68,6 +67,7 @@
=20
class RecTy {
ListRecTy *ListTy;
+ virtual void anchor();
public:
RecTy() : ListTy(0) {}
virtual ~RecTy() {}
@@ -99,7 +99,6 @@
virtual Init *convertValue( TernOpInit *UI) {
return convertValue((TypedInit*)UI);
}
- virtual Init *convertValue( CodeInit *CI) { return 0; }
virtual Init *convertValue(VarBitInit *VB) { return 0; }
virtual Init *convertValue( DefInit *DI) { return 0; }
virtual Init *convertValue( DagInit *DI) { return 0; }
@@ -119,7 +118,6 @@
virtual bool baseClassOf(const IntRecTy *RHS) const { return false; }
virtual bool baseClassOf(const StringRecTy *RHS) const { return false; }
virtual bool baseClassOf(const ListRecTy *RHS) const { return false; }
- virtual bool baseClassOf(const CodeRecTy *RHS) const { return false; }
virtual bool baseClassOf(const DagRecTy *RHS) const { return false; }
virtual bool baseClassOf(const RecordRecTy *RHS) const { return false; }
};
@@ -144,7 +142,6 @@
virtual Init *convertValue( IntInit *II);
virtual Init *convertValue(StringInit *SI) { return 0; }
virtual Init *convertValue( ListInit *LI) { return 0; }
- virtual Init *convertValue( CodeInit *CI) { return 0; }
virtual Init *convertValue(VarBitInit *VB) { return (Init*)VB; }
virtual Init *convertValue( DefInit *DI) { return 0; }
virtual Init *convertValue( DagInit *DI) { return 0; }
@@ -165,7 +162,6 @@
virtual bool baseClassOf(const IntRecTy *RHS) const { return true; }
virtual bool baseClassOf(const StringRecTy *RHS) const { return false; }
virtual bool baseClassOf(const ListRecTy *RHS) const { return false; }
- virtual bool baseClassOf(const CodeRecTy *RHS) const { return false; }
virtual bool baseClassOf(const DagRecTy *RHS) const { return false; }
virtual bool baseClassOf(const RecordRecTy *RHS) const { return false; }
=20
@@ -189,7 +185,6 @@
virtual Init *convertValue( IntInit *II);
virtual Init *convertValue(StringInit *SI) { return 0; }
virtual Init *convertValue( ListInit *LI) { return 0; }
- virtual Init *convertValue( CodeInit *CI) { return 0; }
virtual Init *convertValue(VarBitInit *VB) { return 0; }
virtual Init *convertValue( DefInit *DI) { return 0; }
virtual Init *convertValue( DagInit *DI) { return 0; }
@@ -212,7 +207,6 @@
virtual bool baseClassOf(const IntRecTy *RHS) const { return true; }
virtual bool baseClassOf(const StringRecTy *RHS) const { return false; }
virtual bool baseClassOf(const ListRecTy *RHS) const { return false; }
- virtual bool baseClassOf(const CodeRecTy *RHS) const { return false; }
virtual bool baseClassOf(const DagRecTy *RHS) const { return false; }
virtual bool baseClassOf(const RecordRecTy *RHS) const { return false; }
=20
@@ -233,7 +227,6 @@
virtual Init *convertValue( IntInit *II) { return (Init*)II; }
virtual Init *convertValue(StringInit *SI) { return 0; }
virtual Init *convertValue( ListInit *LI) { return 0; }
- virtual Init *convertValue( CodeInit *CI) { return 0; }
virtual Init *convertValue(VarBitInit *VB) { return 0; }
virtual Init *convertValue( DefInit *DI) { return 0; }
virtual Init *convertValue( DagInit *DI) { return 0; }
@@ -255,7 +248,6 @@
virtual bool baseClassOf(const IntRecTy *RHS) const { return true; }
virtual bool baseClassOf(const StringRecTy *RHS) const { return false; }
virtual bool baseClassOf(const ListRecTy *RHS) const { return false; }
- virtual bool baseClassOf(const CodeRecTy *RHS) const { return false; }
virtual bool baseClassOf(const DagRecTy *RHS) const { return false; }
virtual bool baseClassOf(const RecordRecTy *RHS) const { return false; }
=20
@@ -279,7 +271,6 @@
virtual Init *convertValue( BinOpInit *BO);
virtual Init *convertValue( TernOpInit *BO) { return RecTy::convertValue=
(BO);}
=20
- virtual Init *convertValue( CodeInit *CI) { return 0; }
virtual Init *convertValue(VarBitInit *VB) { return 0; }
virtual Init *convertValue( DefInit *DI) { return 0; }
virtual Init *convertValue( DagInit *DI) { return 0; }
@@ -298,7 +289,6 @@
virtual bool baseClassOf(const IntRecTy *RHS) const { return false; }
virtual bool baseClassOf(const StringRecTy *RHS) const { return true; }
virtual bool baseClassOf(const ListRecTy *RHS) const { return false; }
- virtual bool baseClassOf(const CodeRecTy *RHS) const { return false; }
virtual bool baseClassOf(const DagRecTy *RHS) const { return false; }
virtual bool baseClassOf(const RecordRecTy *RHS) const { return false; }
};
@@ -322,7 +312,6 @@
virtual Init *convertValue( IntInit *II) { return 0; }
virtual Init *convertValue(StringInit *SI) { return 0; }
virtual Init *convertValue( ListInit *LI);
- virtual Init *convertValue( CodeInit *CI) { return 0; }
virtual Init *convertValue(VarBitInit *VB) { return 0; }
virtual Init *convertValue( DefInit *DI) { return 0; }
virtual Init *convertValue( DagInit *DI) { return 0; }
@@ -346,47 +335,6 @@
virtual bool baseClassOf(const ListRecTy *RHS) const {
return RHS->getElementType()->typeIsConvertibleTo(Ty);
}
- virtual bool baseClassOf(const CodeRecTy *RHS) const { return false; }
- virtual bool baseClassOf(const DagRecTy *RHS) const { return false; }
- virtual bool baseClassOf(const RecordRecTy *RHS) const { return false; }
-};
-
-/// CodeRecTy - 'code' - Represent an code fragment, function or method.
-///
-class CodeRecTy : public RecTy {
- static CodeRecTy Shared;
- CodeRecTy() {}
-public:
- static CodeRecTy *get() { return &Shared; }
-
- virtual Init *convertValue( UnsetInit *UI) { return (Init*)UI; }
- virtual Init *convertValue( BitInit *BI) { return 0; }
- virtual Init *convertValue( BitsInit *BI) { return 0; }
- virtual Init *convertValue( IntInit *II) { return 0; }
- virtual Init *convertValue(StringInit *SI) { return 0; }
- virtual Init *convertValue( ListInit *LI) { return 0; }
- virtual Init *convertValue( CodeInit *CI) { return (Init*)CI; }
- virtual Init *convertValue(VarBitInit *VB) { return 0; }
- virtual Init *convertValue( DefInit *DI) { return 0; }
- virtual Init *convertValue( DagInit *DI) { return 0; }
- virtual Init *convertValue( UnOpInit *UI) { return RecTy::convertValue(U=
I);}
- virtual Init *convertValue( BinOpInit *UI) { return RecTy::convertValue(=
UI);}
- virtual Init *convertValue( TernOpInit *UI) { return RecTy::convertValue=
(UI);}
- virtual Init *convertValue( TypedInit *TI);
- virtual Init *convertValue( VarInit *VI) { return RecTy::convertValue(=
VI);}
- virtual Init *convertValue( FieldInit *FI) { return RecTy::convertValue(=
FI);}
-
- std::string getAsString() const { return "code"; }
-
- bool typeIsConvertibleTo(const RecTy *RHS) const {
- return RHS->baseClassOf(this);
- }
- virtual bool baseClassOf(const BitRecTy *RHS) const { return false; }
- virtual bool baseClassOf(const BitsRecTy *RHS) const { return false; }
- virtual bool baseClassOf(const IntRecTy *RHS) const { return false; }
- virtual bool baseClassOf(const StringRecTy *RHS) const { return false; }
- virtual bool baseClassOf(const ListRecTy *RHS) const { return false; }
- virtual bool baseClassOf(const CodeRecTy *RHS) const { return true; }
virtual bool baseClassOf(const DagRecTy *RHS) const { return false; }
virtual bool baseClassOf(const RecordRecTy *RHS) const { return false; }
};
@@ -405,7 +353,6 @@
virtual Init *convertValue( IntInit *II) { return 0; }
virtual Init *convertValue(StringInit *SI) { return 0; }
virtual Init *convertValue( ListInit *LI) { return 0; }
- virtual Init *convertValue( CodeInit *CI) { return 0; }
virtual Init *convertValue(VarBitInit *VB) { return 0; }
virtual Init *convertValue( DefInit *DI) { return 0; }
virtual Init *convertValue( UnOpInit *BO);
@@ -427,7 +374,6 @@
virtual bool baseClassOf(const IntRecTy *RHS) const { return false; }
virtual bool baseClassOf(const StringRecTy *RHS) const { return false; }
virtual bool baseClassOf(const ListRecTy *RHS) const { return false; }
- virtual bool baseClassOf(const CodeRecTy *RHS) const { return false; }
virtual bool baseClassOf(const DagRecTy *RHS) const { return true; }
virtual bool baseClassOf(const RecordRecTy *RHS) const { return false; }
};
@@ -451,7 +397,6 @@
virtual Init *convertValue( IntInit *II) { return 0; }
virtual Init *convertValue(StringInit *SI) { return 0; }
virtual Init *convertValue( ListInit *LI) { return 0; }
- virtual Init *convertValue( CodeInit *CI) { return 0; }
virtual Init *convertValue(VarBitInit *VB) { return 0; }
virtual Init *convertValue( UnOpInit *UI) { return RecTy::convertValue(U=
I);}
virtual Init *convertValue( BinOpInit *UI) { return RecTy::convertValue(=
UI);}
@@ -472,7 +417,6 @@
virtual bool baseClassOf(const IntRecTy *RHS) const { return false; }
virtual bool baseClassOf(const StringRecTy *RHS) const { return false; }
virtual bool baseClassOf(const ListRecTy *RHS) const { return false; }
- virtual bool baseClassOf(const CodeRecTy *RHS) const { return false; }
virtual bool baseClassOf(const DagRecTy *RHS) const { return false; }
virtual bool baseClassOf(const RecordRecTy *RHS) const;
};
@@ -489,6 +433,7 @@
class Init {
Init(const Init &); // Do not define.
Init &operator=3D(const Init &); // Do not define.
+ virtual void anchor();
=20
protected:
Init(void) {}
@@ -617,6 +562,7 @@
UnsetInit() : Init() {}
UnsetInit(const UnsetInit &); // Do not define.
UnsetInit &operator=3D(const UnsetInit &Other); // Do not define.
+ virtual void anchor();
=20
public:
static UnsetInit *get();
@@ -638,6 +584,7 @@
explicit BitInit(bool V) : Value(V) {}
BitInit(const BitInit &Other); // Do not define.
BitInit &operator=3D(BitInit &Other); // Do not define.
+ virtual void anchor();
=20
public:
static BitInit *get(bool V);
@@ -725,8 +672,7 @@
///
virtual Init *resolveBitReference(Record &R, const RecordVal *RV,
unsigned Bit) const {
- assert(0 && "Illegal bit reference off int");
- return 0;
+ llvm_unreachable("Illegal bit reference off int");
}
=20
/// resolveListElementReference - This method is used to implement
@@ -734,8 +680,7 @@
/// now, we return the resolved value, otherwise we return null.
virtual Init *resolveListElementReference(Record &R, const RecordVal *RV,
unsigned Elt) const {
- assert(0 && "Illegal element reference off int");
- return 0;
+ llvm_unreachable("Illegal element reference off int");
}
};
=20
@@ -750,9 +695,10 @@
=20
StringInit(const StringInit &Other); // Do not define.
StringInit &operator=3D(const StringInit &Other); // Do not define.
+ virtual void anchor();
=20
public:
- static StringInit *get(const std::string &V);
+ static StringInit *get(StringRef);
=20
const std::string &getValue() const { return Value; }
=20
@@ -769,8 +715,7 @@
///
virtual Init *resolveBitReference(Record &R, const RecordVal *RV,
unsigned Bit) const {
- assert(0 && "Illegal bit reference off string");
- return 0;
+ llvm_unreachable("Illegal bit reference off string");
}
=20
/// resolveListElementReference - This method is used to implement
@@ -778,33 +723,10 @@
/// now, we return the resolved value, otherwise we return null.
virtual Init *resolveListElementReference(Record &R, const RecordVal *RV,
unsigned Elt) const {
- assert(0 && "Illegal element reference off string");
- return 0;
+ llvm_unreachable("Illegal element reference off string");
}
};
=20
-/// CodeInit - "[{...}]" - Represent a code fragment.
-///
-class CodeInit : public Init {
- std::string Value;
-
- explicit CodeInit(const std::string &V) : Value(V) {}
-
- CodeInit(const CodeInit &Other); // Do not define.
- CodeInit &operator=3D(const CodeInit &Other); // Do not define.
-
-public:
- static CodeInit *get(const std::string &V);
-
- const std::string &getValue() const { return Value; }
-
- virtual Init *convertInitializerTo(RecTy *Ty) const {
- return Ty->convertValue(const_cast<CodeInit *>(this));
- }
-
- virtual std::string getAsString() const { return "[{" + Value + "}]"; }
-};
-
/// ListInit - [AL, AH, CL] - Represent a list of defs
///
class ListInit : public TypedInit, public FoldingSetNode {
@@ -861,8 +783,7 @@
///
virtual Init *resolveBitReference(Record &R, const RecordVal *RV,
unsigned Bit) const {
- assert(0 && "Illegal bit reference off list");
- return 0;
+ llvm_unreachable("Illegal bit reference off list");
}
=20
/// resolveListElementReference - This method is used to implement
@@ -1058,9 +979,11 @@
/// VarInit - 'Opcode' - Represent a reference to an entire variable objec=
t.
///
class VarInit : public TypedInit {
- std::string VarName;
+ Init *VarName;
=20
explicit VarInit(const std::string &VN, RecTy *T)
+ : TypedInit(T), VarName(StringInit::get(VN)) {}
+ explicit VarInit(Init *VN, RecTy *T)
: TypedInit(T), VarName(VN) {}
=20
VarInit(const VarInit &Other); // Do not define.
@@ -1074,7 +997,11 @@
return Ty->convertValue(const_cast<VarInit *>(this));
}
=20
- const std::string &getName() const { return VarName; }
+ const std::string &getName() const;
+ Init *getNameInit() const { return VarName; }
+ std::string getNameInitAsString() const {
+ return getNameInit()->getAsUnquotedString();
+ }
=20
virtual Init *resolveBitReference(Record &R, const RecordVal *RV,
unsigned Bit) const;
@@ -1092,7 +1019,7 @@
///
virtual Init *resolveReferences(Record &R, const RecordVal *RV) const;
=20
- virtual std::string getAsString() const { return VarName; }
+ virtual std::string getAsString() const { return getName(); }
};
=20
=20
@@ -1201,8 +1128,7 @@
///
virtual Init *resolveBitReference(Record &R, const RecordVal *RV,
unsigned Bit) const {
- assert(0 && "Illegal bit reference off def");
- return 0;
+ llvm_unreachable("Illegal bit reference off def");
}
=20
/// resolveListElementReference - This method is used to implement
@@ -1210,8 +1136,7 @@
/// now, we return the resolved value, otherwise we return null.
virtual Init *resolveListElementReference(Record &R, const RecordVal *RV,
unsigned Elt) const {
- assert(0 && "Illegal element reference off def");
- return 0;
+ llvm_unreachable("Illegal element reference off def");
}
};
=20
@@ -1320,14 +1245,12 @@
=20
virtual Init *resolveBitReference(Record &R, const RecordVal *RV,
unsigned Bit) const {
- assert(0 && "Illegal bit reference off dag");
- return 0;
+ llvm_unreachable("Illegal bit reference off dag");
}
=20
virtual Init *resolveListElementReference(Record &R, const RecordVal *RV,
unsigned Elt) const {
- assert(0 && "Illegal element reference off dag");
- return 0;
+ llvm_unreachable("Illegal element reference off dag");
}
};
=20
@@ -1345,6 +1268,10 @@
RecordVal(const std::string &N, RecTy *T, unsigned P);
=20
const std::string &getName() const;
+ const Init *getNameInit() const { return Name; }
+ std::string getNameInitAsString() const {
+ return getNameInit()->getAsUnquotedString();
+ }
=20
unsigned getPrefix() const { return Prefix; }
RecTy *getType() const { return Ty; }
@@ -1375,7 +1302,7 @@
unsigned ID;
Init *Name;
SMLoc Loc;
- std::vector<std::string> TemplateArgs;
+ std::vector<Init *> TemplateArgs;
std::vector<RecordVal> Values;
std::vector<Record*> SuperClasses;
=20
@@ -1384,13 +1311,21 @@
=20
DefInit *TheInit;
=20
+ void init();
void checkName();
=20
public:
=20
// Constructs a record.
explicit Record(const std::string &N, SMLoc loc, RecordKeeper &records) :
- ID(LastID++), Name(StringInit::get(N)), Loc(loc), TrackedRecords(recor=
ds), TheInit(0) {}
+ ID(LastID++), Name(StringInit::get(N)), Loc(loc), TrackedRecords(recor=
ds),
+ TheInit(0) {
+ init();
+ }
+ explicit Record(Init *N, SMLoc loc, RecordKeeper &records) :
+ ID(LastID++), Name(N), Loc(loc), TrackedRecords(records), TheInit(0) {
+ init();
+ }
~Record() {}
=20
=20
@@ -1400,6 +1335,13 @@
unsigned getID() const { return ID; }
=20
const std::string &getName() const;
+ Init *getNameInit() const {
+ return Name;
+ }
+ const std::string getNameInitAsString() const {
+ return getNameInit()->getAsUnquotedString();
+ }
+
void setName(Init *Name); // Also updates RecordKeeper.
void setName(const std::string &Name); // Also updates RecordKeeper.
=20
@@ -1408,46 +1350,69 @@
/// get the corresponding DefInit.
DefInit *getDefInit();
=20
- const std::vector<std::string> &getTemplateArgs() const {
+ const std::vector<Init *> &getTemplateArgs() const {
return TemplateArgs;
}
const std::vector<RecordVal> &getValues() const { return Values; }
const std::vector<Record*> &getSuperClasses() const { return SuperClas=
ses; }
=20
- bool isTemplateArg(StringRef Name) const {
+ bool isTemplateArg(Init *Name) const {
for (unsigned i =3D 0, e =3D TemplateArgs.size(); i !=3D e; ++i)
if (TemplateArgs[i] =3D=3D Name) return true;
return false;
}
+ bool isTemplateArg(StringRef Name) const {
+ return isTemplateArg(StringInit::get(Name.str()));
+ }
=20
+ const RecordVal *getValue(const Init *Name) const {
+ for (unsigned i =3D 0, e =3D Values.size(); i !=3D e; ++i)
+ if (Values[i].getNameInit() =3D=3D Name) return &Values[i];
+ return 0;
+ }
const RecordVal *getValue(StringRef Name) const {
+ return getValue(StringInit::get(Name));
+ }
+ RecordVal *getValue(const Init *Name) {
for (unsigned i =3D 0, e =3D Values.size(); i !=3D e; ++i)
- if (Values[i].getName() =3D=3D Name) return &Values[i];
+ if (Values[i].getNameInit() =3D=3D Name) return &Values[i];
return 0;
}
RecordVal *getValue(StringRef Name) {
- for (unsigned i =3D 0, e =3D Values.size(); i !=3D e; ++i)
- if (Values[i].getName() =3D=3D Name) return &Values[i];
- return 0;
+ return getValue(StringInit::get(Name));
}
=20
- void addTemplateArg(StringRef Name) {
+ void addTemplateArg(Init *Name) {
assert(!isTemplateArg(Name) && "Template arg already defined!");
TemplateArgs.push_back(Name);
}
+ void addTemplateArg(StringRef Name) {
+ addTemplateArg(StringInit::get(Name.str()));
+ }
=20
void addValue(const RecordVal &RV) {
- assert(getValue(RV.getName()) =3D=3D 0 && "Value already added!");
+ assert(getValue(RV.getNameInit()) =3D=3D 0 && "Value already added!");
Values.push_back(RV);
+ if (Values.size() > 1)
+ // Keep NAME at the end of the list. It makes record dumps a
+ // bit prettier and allows TableGen tests to be written more
+ // naturally. Tests can use CHECK-NEXT to look for Record
+ // fields they expect to see after a def. They can't do that if
+ // NAME is the first Record field.
+ std::swap(Values[Values.size() - 2], Values[Values.size() - 1]);
+ }
+
+ void removeValue(Init *Name) {
+ for (unsigned i =3D 0, e =3D Values.size(); i !=3D e; ++i)
+ if (Values[i].getNameInit() =3D=3D Name) {
+ Values.erase(Values.begin()+i);
+ return;
+ }
+ llvm_unreachable("Cannot remove an entry that does not exist!");
}
=20
void removeValue(StringRef Name) {
- for (unsigned i =3D 0, e =3D Values.size(); i !=3D e; ++i)
- if (Values[i].getName() =3D=3D Name) {
- Values.erase(Values.begin()+i);
- return;
- }
- assert(0 && "Cannot remove an entry that does not exist!");
+ removeValue(StringInit::get(Name.str()));
}
=20
bool isSubClassOf(const Record *R) const {
@@ -1459,7 +1424,7 @@
=20
bool isSubClassOf(StringRef Name) const {
for (unsigned i =3D 0, e =3D SuperClasses.size(); i !=3D e; ++i)
- if (SuperClasses[i]->getName() =3D=3D Name)
+ if (SuperClasses[i]->getNameInitAsString() =3D=3D Name)
return true;
return false;
}
@@ -1553,12 +1518,6 @@
/// the value is not the right type.
///
DagInit *getValueAsDag(StringRef FieldName) const;
-
- /// getValueAsCode - This method looks up the specified field and returns
- /// its value as the string data in a CodeInit, throwing an exception if=
the
- /// field does not exist or if the value is not a code object.
- ///
- std::string getValueAsCode(StringRef FieldName) const;
};
=20
raw_ostream &operator<<(raw_ostream &OS, const Record &R);
@@ -1576,6 +1535,7 @@
=20
class RecordKeeper {
std::map<std::string, Record*> Classes, Defs;
+
public:
~RecordKeeper() {
for (std::map<std::string, Record*>::iterator I =3D Classes.begin(),
@@ -1598,12 +1558,12 @@
return I =3D=3D Defs.end() ? 0 : I->second;
}
void addClass(Record *R) {
- assert(getClass(R->getName()) =3D=3D 0 && "Class already exists!");
- Classes.insert(std::make_pair(R->getName(), R));
+ assert(getClass(R->getNameInitAsString()) =3D=3D 0 && "Class already e=
xists!");
+ Classes.insert(std::make_pair(R->getNameInitAsString(), R));
}
void addDef(Record *R) {
- assert(getDef(R->getName()) =3D=3D 0 && "Def already exists!");
- Defs.insert(std::make_pair(R->getName(), R));
+ assert(getDef(R->getNameInitAsString()) =3D=3D 0 && "Def already exist=
s!");
+ Defs.insert(std::make_pair(R->getNameInitAsString(), R));
}
=20
/// removeClass - Remove, but do not delete, the specified record.
@@ -1650,6 +1610,16 @@
=20
raw_ostream &operator<<(raw_ostream &OS, const RecordKeeper &RK);
=20
+/// QualifyName - Return an Init with a qualifier prefix referring
+/// to CurRec's name.
+Init *QualifyName(Record &CurRec, MultiClass *CurMultiClass,
+ Init *Name, const std::string &Scoper);
+
+/// QualifyName - Return an Init with a qualifier prefix referring
+/// to CurRec's name.
+Init *QualifyName(Record &CurRec, MultiClass *CurMultiClass,
+ const std::string &Name, const std::string &Scoper);
+
} // End llvm namespace
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/TableGe=
n/TableGenAction.h
--- a/head/contrib/llvm/include/llvm/TableGen/TableGenAction.h Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/TableGen/TableGenAction.h Tue Apr 17 1=
1:51:51 2012 +0300
@@ -21,6 +21,7 @@
class RecordKeeper;
=20
class TableGenAction {
+ virtual void anchor();
public:
virtual ~TableGenAction() {}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/TableGe=
n/TableGenBackend.h
--- a/head/contrib/llvm/include/llvm/TableGen/TableGenBackend.h Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/TableGen/TableGenBackend.h Tue Apr 17 =
11:51:51 2012 +0300
@@ -16,7 +16,6 @@
#define LLVM_TABLEGEN_TABLEGENBACKEND_H
=20
#include "llvm/Support/raw_ostream.h"
-#include <string>
=20
namespace llvm {
=20
@@ -24,6 +23,7 @@
class RecordKeeper;
=20
struct TableGenBackend {
+ virtual void anchor();
virtual ~TableGenBackend() {}
=20
// run - All TableGen backends should implement the run method, which sh=
ould
@@ -34,7 +34,7 @@
public: // Useful helper routines...
/// EmitSourceFileHeader - Output a LLVM style file header to the specif=
ied
/// ostream.
- void EmitSourceFileHeader(const std::string &Desc, raw_ostream &OS) cons=
t;
+ void EmitSourceFileHeader(StringRef Desc, raw_ostream &OS) const;
=20
};
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
Mangler.h
--- a/head/contrib/llvm/include/llvm/Target/Mangler.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/Mangler.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -17,11 +17,9 @@
#include "llvm/ADT/DenseMap.h"
=20
namespace llvm {
-class StringRef;
class Twine;
-class Value;
class GlobalValue;
-template <typename T> class SmallVectorImpl;=20
+template <typename T> class SmallVectorImpl;
class MCContext;
class MCSymbol;
class TargetData;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
Target.td
--- a/head/contrib/llvm/include/llvm/Target/Target.td Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/Target.td Tue Apr 17 11:51:51 2=
012 +0300
@@ -22,8 +22,12 @@
class RegisterClass; // Forward def
=20
// SubRegIndex - Use instances of SubRegIndex to identify subregisters.
-class SubRegIndex {
+class SubRegIndex<list<SubRegIndex> comps =3D []> {
string Namespace =3D "";
+
+ // ComposedOf - A list of two SubRegIndex instances, [A, B].
+ // This indicates that this SubRegIndex is the result of composing A and=
B.
+ list<SubRegIndex> ComposedOf =3D comps;
}
=20
// RegAltNameIndex - The alternate name set to use for register operands of
@@ -83,9 +87,15 @@
// CostPerUse - Additional cost of instructions using this register comp=
ared
// to other registers in its class. The register allocator will try to
// minimize the number of instructions using a register with a CostPerUs=
e.
- // This is used by the x86-64 and ARM Thumb targets where some registers=20
+ // This is used by the x86-64 and ARM Thumb targets where some registers
// require larger instruction encodings.
int CostPerUse =3D 0;
+
+ // CoveredBySubRegs - When this bit is set, the value of this register is
+ // completely determined by the value of its sub-registers. For example=
, the
+ // x86 register AX is covered by its sub-registers AL and AH, but EAX is=
not
+ // covered by its sub-register AX.
+ bit CoveredBySubRegs =3D 0;
}
=20
// RegisterWithSubRegs - This can be used to define instances of Register =
which
@@ -194,12 +204,15 @@
//
// (decimate GPR, 2) - Pick every N'th element, starting with the first.
//
+// (interleave A, B, ...) - Interleave the elements from each argument lis=
t.
+//
// All of these operators work on ordered sets, not lists. That means
// duplicates are removed from sub-expressions.
=20
// Set operators. The rest is defined in TargetSelectionDAG.td.
def sequence;
def decimate;
+def interleave;
=20
// RegisterTuples - Automatically generate super-registers by forming tupl=
es of
// sub-registers. This is useful for modeling register sequence constraints
@@ -356,6 +369,15 @@
// associated with them. Once we've migrated all of them over to true
// pseudo-instructions that are lowered to real instructions prior to
// the printer/emitter, we can remove this attribute and just use isPseu=
do.
+ //
+ // The intended use is:
+ // isPseudo: Does not have encoding information and should be expanded,
+ // at the latest, during lowering to MCInst.
+ //
+ // isCodeGenOnly: Does have encoding information and can go through to t=
he
+ // CodeEmitter unchanged, but duplicates a canonical instruction
+ // definition's encoding and should be ignored when constructing the
+ // assembler match tables.
bit isCodeGenOnly =3D 0;
=20
// Is this instruction a pseudo instruction for use by the assembler par=
ser.
@@ -414,7 +436,7 @@
/// NoHonorSignDependentRounding - This predicate is true if support for
/// sign-dependent-rounding is not enabled.
def NoHonorSignDependentRounding
- : Predicate<"!HonorSignDependentRoundingFPMath()">;
+ : Predicate<"!TM.Options.HonorSignDependentRoundingFPMath()">;
=20
class Requires<list<Predicate> preds> {
list<Predicate> Predicates =3D preds;
@@ -679,6 +701,11 @@
let neverHasSideEffects =3D 1;
let isAsCheapAsAMove =3D 1;
}
+def BUNDLE : Instruction {
+ let OutOperandList =3D (outs);
+ let InOperandList =3D (ins variable_ops);
+ let AsmString =3D "BUNDLE";
+}
}
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -698,7 +725,15 @@
// function of the AsmParser class to call on every matched instruction.
// This can be used to perform target specific instruction post-processi=
ng.
string AsmParserInstCleanup =3D "";
+}
+def DefaultAsmParser : AsmParser;
=20
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+// AsmParserVariant - Subtargets can have multiple different assembly pars=
ers=20
+// (e.g. AT&T vs Intel syntax on X86 for example). This class can be
+// implemented by targets to describe such variants.
+//
+class AsmParserVariant {
// Variant - AsmParsers can be of multiple different variants. Variants=
are
// used to support targets that need to parser multiple formats for the
// assembly language.
@@ -715,7 +750,7 @@
// purposes of matching.
string RegisterPrefix =3D "";
}
-def DefaultAsmParser : AsmParser;
+def DefaultAsmParserVariant : AsmParserVariant;
=20
/// AssemblerPredicate - This is a Predicate that can be used when the ass=
embler
/// matches instructions and aliases.
@@ -724,7 +759,20 @@
string AssemblerCondString =3D cond;
}
=20
-
+/// TokenAlias - This class allows targets to define assembler token
+/// operand aliases. That is, a token literal operand which is equivalent
+/// to another, canonical, token literal. For example, ARM allows:
+/// vmov.u32 s4, #0 -> vmov.i32, #0
+/// 'u32' is a more specific designator for the 32-bit integer type specif=
ier
+/// and is legal for any instruction which accepts 'i32' as a datatype suf=
fix.
+/// def : TokenAlias<".u32", ".i32">;
+///
+/// This works by marking the match class of 'From' as a subclass of the
+/// match class of 'To'.
+class TokenAlias<string From, string To> {
+ string FromToken =3D From;
+ string ToToken =3D To;
+}
=20
/// MnemonicAlias - This class allows targets to define assembler mnemonic
/// aliases. This should be used when all forms of one mnemonic are accep=
ted
@@ -813,6 +861,10 @@
// AssemblyParsers - The AsmParser instances available for this target.
list<AsmParser> AssemblyParsers =3D [DefaultAsmParser];
=20
+ /// AssemblyParserVariants - The AsmParserVariant instances available fo=
r=20
+ /// this target.
+ list<AsmParserVariant> AssemblyParserVariants =3D [DefaultAsmParserVaria=
nt];
+
// AssemblyWriters - The AsmWriter instances available for this target.
list<AsmWriter> AssemblyWriters =3D [DefaultAsmWriter];
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetCallingConv.h
--- a/head/contrib/llvm/include/llvm/Target/TargetCallingConv.h Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetCallingConv.h Tue Apr 17 =
11:51:51 2012 +0300
@@ -14,6 +14,10 @@
#ifndef LLVM_TARGET_TARGETCALLINGCONV_H
#define LLVM_TARGET_TARGETCALLINGCONV_H
=20
+#include "llvm/Support/DataTypes.h"
+#include "llvm/Support/MathExtras.h"
+#include <string>
+
namespace llvm {
=20
namespace ISD {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetCallingConv.td
--- a/head/contrib/llvm/include/llvm/Target/TargetCallingConv.td Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetCallingConv.td Tue Apr 17=
11:51:51 2012 +0300
@@ -133,3 +133,14 @@
class CallingConv<list<CCAction> actions> {
list<CCAction> Actions =3D actions;
}
+
+/// CalleeSavedRegs - A list of callee saved registers for a given calling
+/// convention. The order of registers is used by PrologEpilogInsertion w=
hen
+/// allocation stack slots for saved registers.
+///
+/// For each CalleeSavedRegs def, TableGen will emit a FOO_SaveList array =
for
+/// returning from getCalleeSavedRegs(), and a FOO_RegMask bit mask suitab=
le for
+/// returning from getCallPreservedMask().
+class CalleeSavedRegs<dag saves> {
+ dag SaveList =3D saves;
+}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetData.h
--- a/head/contrib/llvm/include/llvm/Target/TargetData.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetData.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -44,7 +44,7 @@
AGGREGATE_ALIGN =3D 'a', ///< Aggregate alignment
STACK_ALIGN =3D 's' ///< Stack objects alignment
};
- =20
+
/// Target alignment element.
///
/// Stores the alignment data associated with a given alignment type (poin=
ter,
@@ -80,7 +80,7 @@
unsigned StackNaturalAlign; ///< Stack natural alignment
=20
SmallVector<unsigned char, 8> LegalIntWidths; ///< Legal Integers.
- =20
+
/// Alignments- Where the primitive type alignment data is stored.
///
/// @sa init().
@@ -88,7 +88,7 @@
/// pointers vs. 64-bit pointers by extending TargetAlignment, but for n=
ow,
/// we don't.
SmallVector<TargetAlignElem, 16> Alignments;
- =20
+
/// InvalidAlignmentElem - This member is a signal that a requested alig=
nment
/// type and bit width were not found in the SmallVector.
static const TargetAlignElem InvalidAlignmentElem;
@@ -112,19 +112,30 @@
return &align !=3D &InvalidAlignmentElem;
}
=20
+ /// Initialise a TargetData object with default values, ensure that the
+ /// target data pass is registered.
+ void init();
+
public:
/// Default ctor.
///
/// @note This has to exist, because this is a pass, but it should never=
be
/// used.
TargetData();
- =20
+
/// Constructs a TargetData from a specification string. See init().
explicit TargetData(StringRef TargetDescription)
: ImmutablePass(ID) {
- init(TargetDescription);
+ std::string errMsg =3D parseSpecifier(TargetDescription, this);
+ assert(errMsg =3D=3D "" && "Invalid target data layout string.");
+ (void)errMsg;
}
=20
+ /// Parses a target data specification string. Returns an error message
+ /// if the string is malformed, or the empty string on success. Optional=
ly
+ /// initialises a TargetData object if passed a non-null pointer.
+ static std::string parseSpecifier(StringRef TargetDescription, TargetDat=
a* td =3D 0);
+
/// Initialize target data from properties stored in the module.
explicit TargetData(const Module *M);
=20
@@ -141,9 +152,6 @@
=20
~TargetData(); // Not virtual, do not subclass this class
=20
- //! Parse a target data layout string and initialize TargetData alignmen=
ts.
- void init(StringRef TargetDescription);
-
/// Target endianness...
bool isLittleEndian() const { return LittleEndian; }
bool isBigEndian() const { return !LittleEndian; }
@@ -152,7 +160,7 @@
/// TargetData. This representation is in the same format accepted by t=
he
/// string constructor above.
std::string getStringRepresentation() const;
- =20
+
/// isLegalInteger - This function returns true if the specified type is
/// known to be a native integer type supported by the CPU. For example,
/// i64 is not native on most 32-bit CPUs and i37 is not native on any k=
nown
@@ -166,7 +174,7 @@
return true;
return false;
}
- =20
+
bool isIllegalInteger(unsigned Width) const {
return !isLegalInteger(Width);
}
@@ -251,11 +259,11 @@
/// getABITypeAlignment - Return the minimum ABI-required alignment for =
the
/// specified type.
unsigned getABITypeAlignment(Type *Ty) const;
- =20
+
/// getABIIntegerTypeAlignment - Return the minimum ABI-required alignme=
nt for
/// an integer type of the specified bitwidth.
unsigned getABIIntegerTypeAlignment(unsigned BitWidth) const;
- =20
+
=20
/// getCallFrameTypeAlignment - Return the minimum ABI-required alignment
/// for the specified type when it is part of a call frame.
@@ -305,7 +313,7 @@
assert((Alignment & (Alignment-1)) =3D=3D 0 && "Alignment must be powe=
r of 2!");
return (Val + (Alignment-1)) & ~UIntTy(Alignment-1);
}
- =20
+
static char ID; // Pass identification, replacement for typeid
};
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetELFWriterInfo.h
--- a/head/contrib/llvm/include/llvm/Target/TargetELFWriterInfo.h Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetELFWriterInfo.h Tue Apr 1=
7 11:51:51 2012 +0300
@@ -15,9 +15,6 @@
#define LLVM_TARGET_TARGETELFWRITERINFO_H
=20
namespace llvm {
- class Function;
- class TargetData;
- class TargetMachine;
=20
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
// TargetELFWriterInfo
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetFrameLowering.h
--- a/head/contrib/llvm/include/llvm/Target/TargetFrameLowering.h Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetFrameLowering.h Tue Apr 1=
7 11:51:51 2012 +0300
@@ -15,8 +15,6 @@
#define LLVM_TARGET_TARGETFRAMELOWERING_H
=20
#include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/MC/MCDwarf.h"
-#include "llvm/ADT/ArrayRef.h"
=20
#include <utility>
#include <vector>
@@ -24,8 +22,6 @@
namespace llvm {
class CalleeSavedInfo;
class MachineFunction;
- class MachineBasicBlock;
- class MachineMove;
class RegScavenger;
=20
/// Information about stack frame layout on the target. It holds the dire=
ction
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetInstrInfo.h
--- a/head/contrib/llvm/include/llvm/Target/TargetInstrInfo.h Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetInstrInfo.h Tue Apr 17 11=
:51:51 2012 +0300
@@ -15,6 +15,7 @@
#define LLVM_TARGET_TARGETINSTRINFO_H
=20
#include "llvm/MC/MCInstrInfo.h"
+#include "llvm/CodeGen/DFAPacketizer.h"
#include "llvm/CodeGen/MachineFunction.h"
=20
namespace llvm {
@@ -278,8 +279,7 @@
/// This is only invoked in cases where AnalyzeBranch returns success. It
/// returns the number of instructions that were removed.
virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const {
- assert(0 && "Target didn't implement TargetInstrInfo::RemoveBranch!");
- return 0;
+ llvm_unreachable("Target didn't implement TargetInstrInfo::RemoveBranc=
h!");
}
=20
/// InsertBranch - Insert branch code into the end of the specified
@@ -296,8 +296,7 @@
MachineBasicBlock *FBB,
const SmallVectorImpl<MachineOperand> &Con=
d,
DebugLoc DL) const {
- assert(0 && "Target didn't implement TargetInstrInfo::InsertBranch!");
- return 0;
+ llvm_unreachable("Target didn't implement TargetInstrInfo::InsertBranc=
h!");
}
=20
/// ReplaceTailWithBranchTo - Delete the instruction OldInst and everyth=
ing
@@ -353,12 +352,28 @@
return false;
}
=20
+ /// isProfitableToUnpredicate - Return true if it's profitable to unpred=
icate
+ /// one side of a 'diamond', i.e. two sides of if-else predicated on mut=
ually
+ /// exclusive predicates.
+ /// e.g.
+ /// subeq r0, r1, #1
+ /// addne r0, r1, #1
+ /// =3D>
+ /// sub r0, r1, #1
+ /// addne r0, r1, #1
+ ///
+ /// This may be profitable is conditional instructions are always execut=
ed.
+ virtual bool isProfitableToUnpredicate(MachineBasicBlock &TMBB,
+ MachineBasicBlock &FMBB) const {
+ return false;
+ }
+
/// copyPhysReg - Emit instructions to copy a pair of physical registers.
virtual void copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, DebugLoc DL,
unsigned DestReg, unsigned SrcReg,
bool KillSrc) const {
- assert(0 && "Target didn't implement TargetInstrInfo::copyPhysReg!");
+ llvm_unreachable("Target didn't implement TargetInstrInfo::copyPhysReg=
!");
}
=20
/// storeRegToStackSlot - Store the specified register of the given regi=
ster
@@ -371,7 +386,8 @@
unsigned SrcReg, bool isKill, int Frame=
Index,
const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI) const {
- assert(0 && "Target didn't implement TargetInstrInfo::storeRegToStackSlo=
t!");
+ llvm_unreachable("Target didn't implement "
+ "TargetInstrInfo::storeRegToStackSlot!");
}
=20
/// loadRegFromStackSlot - Load the specified register of the given regi=
ster
@@ -383,7 +399,8 @@
unsigned DestReg, int FrameIndex,
const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI) const {
- assert(0 && "Target didn't implement TargetInstrInfo::loadRegFromStackSl=
ot!");
+ llvm_unreachable("Target didn't implement "
+ "TargetInstrInfo::loadRegFromStackSlot!");
}
=20
/// expandPostRAPseudo - This function is called for all pseudo instruct=
ions
@@ -535,7 +552,7 @@
=20
/// isUnpredicatedTerminator - Returns true if the instruction is a
/// terminator instruction that has not been predicated.
- virtual bool isUnpredicatedTerminator(const MachineInstr *MI) const;
+ virtual bool isUnpredicatedTerminator(const MachineInstr *MI) const =3D =
0;
=20
/// PredicateInstruction - Convert the instruction into a predicated
/// instruction. It returns true if the operation was successful.
@@ -646,7 +663,16 @@
=20
virtual int getOperandLatency(const InstrItineraryData *ItinData,
SDNode *DefNode, unsigned DefIdx,
- SDNode *UseNode, unsigned UseIdx) const;
+ SDNode *UseNode, unsigned UseIdx) const =
=3D 0;
+
+ /// getOutputLatency - Compute and return the output dependency latency =
of a
+ /// a given pair of defs which both target the same register. This is us=
ually
+ /// one.
+ virtual unsigned getOutputLatency(const InstrItineraryData *ItinData,
+ const MachineInstr *DefMI, unsigned De=
fIdx,
+ const MachineInstr *DepMI) const {
+ return 1;
+ }
=20
/// getInstrLatency - Compute the instruction latency of a given instruc=
tion.
/// If the instruction has higher cost when predicated, it's returned via
@@ -656,7 +682,7 @@
unsigned *PredCost =3D 0) const;
=20
virtual int getInstrLatency(const InstrItineraryData *ItinData,
- SDNode *Node) const;
+ SDNode *Node) const =3D 0;
=20
/// isHighLatencyDef - Return true if this opcode has high latency to its
/// result.
@@ -718,6 +744,80 @@
///
virtual void setExecutionDomain(MachineInstr *MI, unsigned Domain) const=
{}
=20
+
+ /// getPartialRegUpdateClearance - Returns the preferred minimum clearan=
ce
+ /// before an instruction with an unwanted partial register update.
+ ///
+ /// Some instructions only write part of a register, and implicitly need=
to
+ /// read the other parts of the register. This may cause unwanted stalls
+ /// preventing otherwise unrelated instructions from executing in parall=
el in
+ /// an out-of-order CPU.
+ ///
+ /// For example, the x86 instruction cvtsi2ss writes its result to bits
+ /// [31:0] of the destination xmm register. Bits [127:32] are unaffected=
, so
+ /// the instruction needs to wait for the old value of the register to b=
ecome
+ /// available:
+ ///
+ /// addps %xmm1, %xmm0
+ /// movaps %xmm0, (%rax)
+ /// cvtsi2ss %rbx, %xmm0
+ ///
+ /// In the code above, the cvtsi2ss instruction needs to wait for the ad=
dps
+ /// instruction before it can issue, even though the high bits of %xmm0
+ /// probably aren't needed.
+ ///
+ /// This hook returns the preferred clearance before MI, measured in
+ /// instructions. Other defs of MI's operand OpNum are avoided in the l=
ast N
+ /// instructions before MI. It should only return a positive value for
+ /// unwanted dependencies. If the old bits of the defined register have
+ /// useful values, or if MI is determined to otherwise read the dependen=
cy,
+ /// the hook should return 0.
+ ///
+ /// The unwanted dependency may be handled by:
+ ///
+ /// 1. Allocating the same register for an MI def and use. That makes t=
he
+ /// unwanted dependency identical to a required dependency.
+ ///
+ /// 2. Allocating a register for the def that has no defs in the previou=
s N
+ /// instructions.
+ ///
+ /// 3. Calling breakPartialRegDependency() with the same arguments. This
+ /// allows the target to insert a dependency breaking instruction.
+ ///
+ virtual unsigned
+ getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum,
+ const TargetRegisterInfo *TRI) const {
+ // The default implementation returns 0 for no partial register depend=
ency.
+ return 0;
+ }
+
+ /// breakPartialRegDependency - Insert a dependency-breaking instruction
+ /// before MI to eliminate an unwanted dependency on OpNum.
+ ///
+ /// If it wasn't possible to avoid a def in the last N instructions befo=
re MI
+ /// (see getPartialRegUpdateClearance), this hook will be called to brea=
k the
+ /// unwanted dependency.
+ ///
+ /// On x86, an xorps instruction can be used as a dependency breaker:
+ ///
+ /// addps %xmm1, %xmm0
+ /// movaps %xmm0, (%rax)
+ /// xorps %xmm0, %xmm0
+ /// cvtsi2ss %rbx, %xmm0
+ ///
+ /// An <imp-kill> operand should be added to MI if an instruction was
+ /// inserted. This ties the instructions together in the post-ra schedu=
ler.
+ ///
+ virtual void
+ breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum,
+ const TargetRegisterInfo *TRI) const {}
+
+ /// Create machine specific model for scheduling.
+ virtual DFAPacketizer*
+ CreateTargetScheduleState(const TargetMachine*, const ScheduleDAG*) co=
nst {
+ return NULL;
+ }
+
private:
int CallFrameSetupOpcode, CallFrameDestroyOpcode;
};
@@ -746,6 +846,7 @@
virtual bool hasStoreToStackSlot(const MachineInstr *MI,
const MachineMemOperand *&MMO,
int &FrameIndex) const;
+ virtual bool isUnpredicatedTerminator(const MachineInstr *MI) const;
virtual bool PredicateInstruction(MachineInstr *MI,
const SmallVectorImpl<MachineOperand> &Pred) c=
onst;
virtual void reMaterialize(MachineBasicBlock &MBB,
@@ -761,6 +862,13 @@
virtual bool isSchedulingBoundary(const MachineInstr *MI,
const MachineBasicBlock *MBB,
const MachineFunction &MF) const;
+ using TargetInstrInfo::getOperandLatency;
+ virtual int getOperandLatency(const InstrItineraryData *ItinData,
+ SDNode *DefNode, unsigned DefIdx,
+ SDNode *UseNode, unsigned UseIdx) const;
+ using TargetInstrInfo::getInstrLatency;
+ virtual int getInstrLatency(const InstrItineraryData *ItinData,
+ SDNode *Node) const;
=20
bool usePreRAHazardRecognizer() const;
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetJITInfo.h
--- a/head/contrib/llvm/include/llvm/Target/TargetJITInfo.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetJITInfo.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -17,9 +17,9 @@
#ifndef LLVM_TARGET_TARGETJITINFO_H
#define LLVM_TARGET_TARGETJITINFO_H
=20
-#include <cassert>
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/DataTypes.h"
+#include <cassert>
=20
namespace llvm {
class Function;
@@ -30,6 +30,7 @@
/// TargetJITInfo - Target specific information required by the Just-In-=
Time
/// code generator.
class TargetJITInfo {
+ virtual void anchor();
public:
virtual ~TargetJITInfo() {}
=20
@@ -45,8 +46,8 @@
/// ptr.
virtual void *emitGlobalValueIndirectSym(const GlobalValue* GV, void *=
ptr,
JITCodeEmitter &JCE) {
- assert(0 && "This target doesn't implement emitGlobalValueIndirectSy=
m!");
- return 0;
+ llvm_unreachable("This target doesn't implement "
+ "emitGlobalValueIndirectSym!");
}
=20
/// Records the required size and alignment for a call stub in bytes.
@@ -57,8 +58,6 @@
/// Returns the maximum size and alignment for a call stub on this tar=
get.
virtual StubLayout getStubLayout() {
llvm_unreachable("This target doesn't implement getStubLayout!");
- StubLayout Result =3D {0, 0};
- return Result;
}
=20
/// emitFunctionStub - Use the specified JITCodeEmitter object to emit=
a
@@ -68,15 +67,13 @@
/// aligned from the address the JCE was set up to emit at.
virtual void *emitFunctionStub(const Function* F, void *Target,
JITCodeEmitter &JCE) {
- assert(0 && "This target doesn't implement emitFunctionStub!");
- return 0;
+ llvm_unreachable("This target doesn't implement emitFunctionStub!");
}
=20
/// getPICJumpTableEntry - Returns the value of the jumptable entry fo=
r the
/// specific basic block.
virtual uintptr_t getPICJumpTableEntry(uintptr_t BB, uintptr_t JTBase)=
{
- assert(0 && "This target doesn't implement getPICJumpTableEntry!");
- return 0;
+ llvm_unreachable("This target doesn't implement getPICJumpTableEntry=
!");
}
=20
/// LazyResolverFn - This typedef is used to represent the function th=
at
@@ -97,8 +94,7 @@
/// function, and giving the JIT the target function used to do the la=
zy
/// resolving.
virtual LazyResolverFn getLazyResolverFunction(JITCompilerFn) {
- assert(0 && "Not implemented for this target!");
- return 0;
+ llvm_unreachable("Not implemented for this target!");
}
=20
/// relocate - Before the JIT can run a block of code that has been em=
itted,
@@ -114,8 +110,7 @@
/// handling thread local variables. This method returns a value only
/// meaningful to the target.
virtual char* allocateThreadLocalMemory(size_t size) {
- assert(0 && "This target does not implement thread local storage!");
- return 0;
+ llvm_unreachable("This target does not implement thread local storag=
e!");
}
=20
/// needsGOT - Allows a target to specify that it would like the
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetLibraryInfo.h
--- a/head/contrib/llvm/include/llvm/Target/TargetLibraryInfo.h Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetLibraryInfo.h Tue Apr 17 =
11:51:51 2012 +0300
@@ -11,33 +11,204 @@
#define LLVM_TARGET_TARGETLIBRARYINFO_H
=20
#include "llvm/Pass.h"
+#include "llvm/ADT/DenseMap.h"
=20
namespace llvm {
class Triple;
=20
namespace LibFunc {
enum Func {
+ /// double acos(double x);
+ acos,
+ /// long double acosl(long double x);
+ acosl,
+ /// float acosf(float x);
+ acosf,
+ /// double asin(double x);
+ asin,
+ /// long double asinl(long double x);
+ asinl,
+ /// float asinf(float x);
+ asinf,
+ /// double atan(double x);
+ atan,
+ /// long double atanl(long double x);
+ atanl,
+ /// float atanf(float x);
+ atanf,
+ /// double atan2(double y, double x);
+ atan2,
+ /// long double atan2l(long double y, long double x);
+ atan2l,
+ /// float atan2f(float y, float x);
+ atan2f,
+ /// double ceil(double x);
+ ceil,
+ /// long double ceill(long double x);
+ ceill,
+ /// float ceilf(float x);
+ ceilf,
+ /// double copysign(double x, double y);
+ copysign,
+ /// float copysignf(float x, float y);
+ copysignf,
+ /// long double copysignl(long double x, long double y);
+ copysignl,
+ /// double cos(double x);
+ cos,
+ /// long double cosl(long double x);
+ cosl,
+ /// float cosf(float x);
+ cosf,
+ /// double cosh(double x);
+ cosh,
+ /// long double coshl(long double x);
+ coshl,
+ /// float coshf(float x);
+ coshf,
+ /// double exp(double x);
+ exp,
+ /// long double expl(long double x);
+ expl,
+ /// float expf(float x);
+ expf,
+ /// double exp2(double x);
+ exp2,
+ /// long double exp2l(long double x);
+ exp2l,
+ /// float exp2f(float x);
+ exp2f,
+ /// double expm1(double x);
+ expm1,
+ /// long double expm1l(long double x);
+ expm1l,
+ /// float expm1f(float x);
+ expl1f,
+ /// double fabs(double x);
+ fabs,
+ /// long double fabsl(long double x);
+ fabsl,
+ /// float fabsf(float x);
+ fabsf,
+ /// double floor(double x);
+ floor,
+ /// long double floorl(long double x);
+ floorl,
+ /// float floorf(float x);
+ floorf,
+ /// int fiprintf(FILE *stream, const char *format, ...);
+ fiprintf,
+ /// double fmod(double x, double y);
+ fmod,
+ /// long double fmodl(long double x, long double y);
+ fmodl,
+ /// float fmodf(float x, float y);
+ fmodf,
+ /// int fputs(const char *s, FILE *stream);
+ fputs,
+ /// size_t fwrite(const void *ptr, size_t size, size_t nitems,
+ /// FILE *stream);
+ fwrite,
+ /// int iprintf(const char *format, ...);
+ iprintf,
+ /// double log(double x);
+ log,
+ /// long double logl(long double x);
+ logl,
+ /// float logf(float x);
+ logf,
+ /// double log2(double x);
+ log2,
+ /// double long double log2l(long double x);
+ log2l,
+ /// float log2f(float x);
+ log2f,
+ /// double log10(double x);
+ log10,
+ /// long double log10l(long double x);
+ log10l,
+ /// float log10f(float x);
+ log10f,
+ /// double log1p(double x);
+ log1p,
+ /// long double log1pl(long double x);
+ log1pl,
+ /// float log1pf(float x);
+ log1pf,
+ /// void *memcpy(void *s1, const void *s2, size_t n);
+ memcpy,
+ /// void *memmove(void *s1, const void *s2, size_t n);
+ memmove,
/// void *memset(void *b, int c, size_t len);
memset,
- =20
- // void *memcpy(void *s1, const void *s2, size_t n);
- memcpy,
- =20
- // void *memmove(void *s1, const void *s2, size_t n);
- memmove,
- =20
/// void memset_pattern16(void *b, const void *pattern16, size_t len=
);
memset_pattern16,
- =20
- /// int iprintf(const char *format, ...);
- iprintf,
- =20
+ /// double nearbyint(double x);
+ nearbyint,
+ /// float nearbyintf(float x);
+ nearbyintf,
+ /// long double nearbyintl(long double x);
+ nearbyintl,
+ /// double pow(double x, double y);
+ pow,
+ /// float powf(float x, float y);
+ powf,
+ /// long double powl(long double x, long double y);
+ powl,
+ /// double rint(double x);
+ rint,
+ /// float rintf(float x);
+ rintf,
+ /// long dobule rintl(long double x);
+ rintl,
+ /// double sin(double x);
+ sin,
+ /// long double sinl(long double x);
+ sinl,
+ /// float sinf(float x);
+ sinf,
+ /// double sinh(double x);
+ sinh,
+ /// long double sinhl(long double x);
+ sinhl,
+ /// float sinhf(float x);
+ sinhf,
/// int siprintf(char *str, const char *format, ...);
siprintf,
- =20
- /// int fiprintf(FILE *stream, const char *format, ...);
- fiprintf,
- =20
+ /// double sqrt(double x);
+ sqrt,
+ /// long double sqrtl(long double x);
+ sqrtl,
+ /// float sqrtf(float x);
+ sqrtf,
+ /// double tan(double x);
+ tan,
+ /// long double tanl(long double x);
+ tanl,
+ /// float tanf(float x);
+ tanf,
+ /// double tanh(double x);
+ tanh,
+ /// long double tanhl(long double x);
+ tanhl,
+ /// float tanhf(float x);
+ tanhf,
+ /// double trunc(double x);
+ trunc,
+ /// float truncf(float x);
+ truncf,
+ /// long double truncl(long double x);
+ truncl,
+ /// int __cxa_atexit(void (*f)(void *), void *p, void *d);
+ cxa_atexit,
+ /// void __cxa_guard_abort(guard_t *guard);
+ /// guard_t is int64_t in Itanium ABI or int32_t on ARM eabi.
+ cxa_guard_abort, =20
+ /// int __cxa_guard_acquire(guard_t *guard);
+ cxa_guard_acquire,
+ /// void __cxa_guard_release(guard_t *guard);
+ cxa_guard_release,
+
NumLibFuncs
};
}
@@ -46,7 +217,24 @@
/// library functions are available for the current target, and allows a
/// frontend to disable optimizations through -fno-builtin etc.
class TargetLibraryInfo : public ImmutablePass {
- unsigned char AvailableArray[(LibFunc::NumLibFuncs+7)/8];
+ virtual void anchor();
+ unsigned char AvailableArray[(LibFunc::NumLibFuncs+3)/4];
+ llvm::DenseMap<unsigned, std::string> CustomNames;
+ static const char* StandardNames[LibFunc::NumLibFuncs];
+
+ enum AvailabilityState {
+ StandardName =3D 3, // (memset to all ones)
+ CustomName =3D 1,
+ Unavailable =3D 0 // (memset to all zeros)
+ };
+ void setState(LibFunc::Func F, AvailabilityState State) {
+ AvailableArray[F/4] &=3D ~(3 << 2*(F&3));
+ AvailableArray[F/4] |=3D State << 2*(F&3);
+ }
+ AvailabilityState getState(LibFunc::Func F) const {
+ return static_cast<AvailabilityState>((AvailableArray[F/4] >> 2*(F&3))=
& 3);
+ }
+
public:
static char ID;
TargetLibraryInfo();
@@ -56,19 +244,39 @@
/// has - This function is used by optimizations that want to match on o=
r form
/// a given library function.
bool has(LibFunc::Func F) const {
- return (AvailableArray[F/8] & (1 << (F&7))) !=3D 0;
+ return getState(F) !=3D Unavailable;
+ }
+
+ StringRef getName(LibFunc::Func F) const {
+ AvailabilityState State =3D getState(F);
+ if (State =3D=3D Unavailable)
+ return StringRef();
+ if (State =3D=3D StandardName)
+ return StandardNames[F];
+ assert(State =3D=3D CustomName);
+ return CustomNames.find(F)->second;
}
=20
/// setUnavailable - this can be used by whatever sets up TargetLibraryI=
nfo to
/// ban use of specific library functions.
void setUnavailable(LibFunc::Func F) {
- AvailableArray[F/8] &=3D ~(1 << (F&7));
+ setState(F, Unavailable);
}
=20
void setAvailable(LibFunc::Func F) {
- AvailableArray[F/8] |=3D 1 << (F&7);
+ setState(F, StandardName);
}
- =20
+
+ void setAvailableWithName(LibFunc::Func F, StringRef Name) {
+ if (StandardNames[F] !=3D Name) {
+ setState(F, CustomName);
+ CustomNames[F] =3D Name;
+ assert(CustomNames.find(F) !=3D CustomNames.end());
+ } else {
+ setState(F, StandardName);
+ }
+ }
+
/// disableAllFunctions - This disables all builtins, which is used for
/// options like -fno-builtin.
void disableAllFunctions();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetLowering.h
--- a/head/contrib/llvm/include/llvm/Target/TargetLowering.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetLowering.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -25,7 +25,6 @@
#include "llvm/CallingConv.h"
#include "llvm/InlineAsm.h"
#include "llvm/Attributes.h"
-#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/RuntimeLibcalls.h"
#include "llvm/Support/DebugLoc.h"
@@ -36,41 +35,34 @@
#include <vector>
=20
namespace llvm {
- class AllocaInst;
- class APFloat;
class CallInst;
class CCState;
- class Function;
class FastISel;
class FunctionLoweringInfo;
class ImmutableCallSite;
+ class IntrinsicInst;
class MachineBasicBlock;
class MachineFunction;
- class MachineFrameInfo;
class MachineInstr;
class MachineJumpTableInfo;
class MCContext;
class MCExpr;
- class SDNode;
- class SDValue;
- class SelectionDAG;
template<typename T> class SmallVectorImpl;
class TargetData;
- class TargetMachine;
class TargetRegisterClass;
class TargetLoweringObjectFile;
class Value;
=20
- // FIXME: should this be here?
- namespace TLSModel {
- enum Model {
- GeneralDynamic,
- LocalDynamic,
- InitialExec,
- LocalExec
+ namespace Sched {
+ enum Preference {
+ None, // No preference
+ Source, // Follow source order.
+ RegPressure, // Scheduling for lowest register pressure.
+ Hybrid, // Scheduling for both latency and register pressu=
re.
+ ILP, // Scheduling for ILP in low register pressure mod=
e.
+ VLIW // Scheduling for VLIW targets.
};
}
- TLSModel::Model getTLSModel(const GlobalValue *GV, Reloc::Model reloc);
=20
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -94,7 +86,7 @@
Custom // Use the LowerOperation hook to implement custom lowerin=
g.
};
=20
- /// LegalizeAction - This enum indicates whether a types are legal for a
+ /// LegalizeTypeAction - This enum indicates whether a types are legal f=
or a
/// target, and if not, what action should be used to make them valid.
enum LegalizeTypeAction {
TypeLegal, // The target natively supports this type.
@@ -115,8 +107,6 @@
=20
static ISD::NodeType getExtendForContent(BooleanContent Content) {
switch (Content) {
- default:
- assert(false && "Unknown BooleanContent!");
case UndefinedBooleanContent:
// Extend by adding rubbish bits.
return ISD::ANY_EXTEND;
@@ -127,6 +117,7 @@
// Extend by copying the sign bit.
return ISD::SIGN_EXTEND;
}
+ llvm_unreachable("Invalid content kind");
}
=20
/// NOTE: The constructor takes ownership of TLOF.
@@ -199,9 +190,9 @@
=20
/// getRegClassFor - Return the register class that should be used for t=
he
/// specified value type.
- virtual TargetRegisterClass *getRegClassFor(EVT VT) const {
+ virtual const TargetRegisterClass *getRegClassFor(EVT VT) const {
assert(VT.isSimple() && "getRegClassFor called on illegal type!");
- TargetRegisterClass *RC =3D RegClassForVT[VT.getSimpleVT().SimpleTy];
+ const TargetRegisterClass *RC =3D RegClassForVT[VT.getSimpleVT().Simpl=
eTy];
assert(RC && "This value type is not natively supported!");
return RC;
}
@@ -292,11 +283,9 @@
VT =3D getTypeToTransformTo(Context, VT);
break;
default:
- assert(false && "Type is not legal nor is it to be expanded!");
- return VT;
+ llvm_unreachable("Type is not legal nor is it to be expanded!");
}
}
- return VT;
}
=20
/// getVectorTypeBreakdown - Vector types are broken down into some numb=
er of
@@ -520,8 +509,19 @@
/// AllowUnknown is true, this will return MVT::Other for types with no =
EVT
/// counterpart (e.g. structs), otherwise it will assert.
EVT getValueType(Type *Ty, bool AllowUnknown =3D false) const {
- EVT VT =3D EVT::getEVT(Ty, AllowUnknown);
- return VT =3D=3D MVT::iPTR ? PointerTy : VT;
+ // Lower scalar pointers to native pointer types.
+ if (Ty->isPointerTy()) return PointerTy;
+
+ if (Ty->isVectorTy()) {
+ VectorType *VTy =3D cast<VectorType>(Ty);
+ Type *Elm =3D VTy->getElementType();
+ // Lower vectors of pointers to native pointer types.
+ if (Elm->isPointerTy())=20
+ Elm =3D EVT(PointerTy).getTypeForEVT(Ty->getContext());
+ return EVT::getVectorVT(Ty->getContext(), EVT::getEVT(Elm, false),
+ VTy->getNumElements());
+ }
+ return EVT::getEVT(Ty, AllowUnknown);
}
=20
/// getByValTypeAlignment - Return the desired alignment for ByVal aggre=
gate
@@ -554,8 +554,7 @@
if (VT.isInteger()) {
return getRegisterType(Context, getTypeToTransformTo(Context, VT));
}
- assert(0 && "Unsupported extended type!");
- return EVT(MVT::Other); // Not reached
+ llvm_unreachable("Unsupported extended type!");
}
=20
/// getNumRegisters - Return the number of registers that this ValueType=
will
@@ -580,8 +579,7 @@
unsigned RegWidth =3D getRegisterType(Context, VT).getSizeInBits();
return (BitWidth + RegWidth - 1) / RegWidth;
}
- assert(0 && "Unsupported extended type!");
- return 0; // Not reached
+ llvm_unreachable("Unsupported extended type!");
}
=20
/// ShouldShrinkFPConstant - If true, then instruction selection should
@@ -646,7 +644,7 @@
/// alignment can satisfy any constraint. Similarly if SrcAlign is zero =
it
/// means there isn't a need to check it against alignment requirement,
/// probably because the source does not need to be loaded. If
- /// 'NonScalarIntSafe' is true, that means it's safe to return a
+ /// 'IsZeroVal' is true, that means it's safe to return a
/// non-scalar-integer type, e.g. empty string source, constant, or load=
ed
/// from memory. 'MemcpyStrSrc' indicates whether the memcpy source is
/// constant so it does not need to be loaded.
@@ -654,7 +652,7 @@
/// target-independent logic.
virtual EVT getOptimalMemOpType(uint64_t /*Size*/,
unsigned /*DstAlign*/, unsigned /*SrcAli=
gn*/,
- bool /*NonScalarIntSafe*/,
+ bool /*IsZeroVal*/,
bool /*MemcpyStrSrc*/,
MachineFunction &/*MF*/) const {
return MVT::Other;
@@ -679,10 +677,10 @@
return StackPointerRegisterToSaveRestore;
}
=20
- /// getExceptionAddressRegister - If a physical register, this returns
+ /// getExceptionPointerRegister - If a physical register, this returns
/// the register that receives the exception address on entry to a landi=
ng
/// pad.
- unsigned getExceptionAddressRegister() const {
+ unsigned getExceptionPointerRegister() const {
return ExceptionPointerRegister;
}
=20
@@ -772,8 +770,7 @@
LowerCustomJumpTableEntry(const MachineJumpTableInfo * /*MJTI*/,
const MachineBasicBlock * /*MBB*/, unsigned /*=
uid*/,
MCContext &/*Ctx*/) const {
- assert(0 && "Need to implement this hook if target has custom JTIs");
- return 0;
+ llvm_unreachable("Need to implement this hook if target has custom JTI=
s");
}
=20
/// getPICJumpTableRelocaBase - Returns relocation base for the given PIC
@@ -865,7 +862,6 @@
/// Mask are known to be either zero or one and return them in the
/// KnownZero/KnownOne bitsets.
virtual void computeMaskedBitsForTargetNode(const SDValue Op,
- const APInt &Mask,
APInt &KnownZero,
APInt &KnownOne,
const SelectionDAG &DAG,
@@ -1035,7 +1031,7 @@
/// addRegisterClass - Add the specified register class as an available
/// regclass for the specified value type. This indicates the selector =
can
/// handle values of that class natively.
- void addRegisterClass(EVT VT, TargetRegisterClass *RC) {
+ void addRegisterClass(EVT VT, const TargetRegisterClass *RC) {
assert((unsigned)VT.getSimpleVT().SimpleTy < array_lengthof(RegClassFo=
rVT));
AvailableRegClasses.push_back(std::make_pair(VT, RC));
RegClassForVT[VT.getSimpleVT().SimpleTy] =3D RC;
@@ -1141,26 +1137,28 @@
JumpBufAlignment =3D Align;
}
=20
- /// setMinFunctionAlignment - Set the target's minimum function alignmen=
t.
+ /// setMinFunctionAlignment - Set the target's minimum function alignmen=
t (in
+ /// log2(bytes))
void setMinFunctionAlignment(unsigned Align) {
MinFunctionAlignment =3D Align;
}
=20
/// setPrefFunctionAlignment - Set the target's preferred function align=
ment.
/// This should be set if there is a performance benefit to
- /// higher-than-minimum alignment
+ /// higher-than-minimum alignment (in log2(bytes))
void setPrefFunctionAlignment(unsigned Align) {
PrefFunctionAlignment =3D Align;
}
=20
/// setPrefLoopAlignment - Set the target's preferred loop alignment. De=
fault
/// alignment is zero, it means the target does not care about loop alig=
nment.
+ /// The alignment is specified in log2(bytes).
void setPrefLoopAlignment(unsigned Align) {
PrefLoopAlignment =3D Align;
}
=20
/// setMinStackArgumentAlignment - Set the minimum stack alignment of an
- /// argument.
+ /// argument (in log2(bytes)).
void setMinStackArgumentAlignment(unsigned Align) {
MinStackArgumentAlignment =3D Align;
}
@@ -1196,8 +1194,7 @@
const SmallVectorImpl<ISD::InputArg> &/*Ins*/,
DebugLoc /*dl*/, SelectionDAG &/*DAG*/,
SmallVectorImpl<SDValue> &/*InVals*/) const {
- assert(0 && "Not Implemented");
- return SDValue(); // this is here to silence compiler errors
+ llvm_unreachable("Not Implemented");
}
=20
/// LowerCallTo - This function lowers an abstract call to a function in=
to an
@@ -1224,7 +1221,8 @@
LowerCallTo(SDValue Chain, Type *RetTy, bool RetSExt, bool RetZExt,
bool isVarArg, bool isInreg, unsigned NumFixedArgs,
CallingConv::ID CallConv, bool isTailCall,
- bool isReturnValueUsed, SDValue Callee, ArgListTy &Args,
+ bool doesNotRet, bool isReturnValueUsed,
+ SDValue Callee, ArgListTy &Args,
SelectionDAG &DAG, DebugLoc dl) const;
=20
/// LowerCall - This hook must be implemented to lower calls into the
@@ -1236,14 +1234,13 @@
virtual SDValue
LowerCall(SDValue /*Chain*/, SDValue /*Callee*/,
CallingConv::ID /*CallConv*/, bool /*isVarArg*/,
- bool &/*isTailCall*/,
+ bool /*doesNotRet*/, bool &/*isTailCall*/,
const SmallVectorImpl<ISD::OutputArg> &/*Outs*/,
const SmallVectorImpl<SDValue> &/*OutVals*/,
const SmallVectorImpl<ISD::InputArg> &/*Ins*/,
DebugLoc /*dl*/, SelectionDAG &/*DAG*/,
SmallVectorImpl<SDValue> &/*InVals*/) const {
- assert(0 && "Not Implemented");
- return SDValue(); // this is here to silence compiler errors
+ llvm_unreachable("Not Implemented");
}
=20
/// HandleByVal - Target-specific cleanup for formal ByVal parameters.
@@ -1273,14 +1270,15 @@
const SmallVectorImpl<ISD::OutputArg> &/*Outs*/,
const SmallVectorImpl<SDValue> &/*OutVals*/,
DebugLoc /*dl*/, SelectionDAG &/*DAG*/) const {
- assert(0 && "Not Implemented");
- return SDValue(); // this is here to silence compiler errors
+ llvm_unreachable("Not Implemented");
}
=20
/// isUsedByReturnOnly - Return true if result of the specified node is =
used
- /// by a return node only. This is used to determine whether it is possi=
ble
+ /// by a return node only. It also compute and return the input chain fo=
r the
+ /// tail call.
+ /// This is used to determine whether it is possible
/// to codegen a libcall as tail call at legalization time.
- virtual bool isUsedByReturnOnly(SDNode *) const {
+ virtual bool isUsedByReturnOnly(SDNode *, SDValue &Chain) const {
return false;
}
=20
@@ -1339,7 +1337,7 @@
virtual void ReplaceNodeResults(SDNode * /*N*/,
SmallVectorImpl<SDValue> &/*Results*/,
SelectionDAG &/*DAG*/) const {
- assert(0 && "ReplaceNodeResults not implemented for this target!");
+ llvm_unreachable("ReplaceNodeResults not implemented for this target!"=
);
}
=20
/// getTargetNodeName() - This method returns the name of a target speci=
fic
@@ -1531,6 +1529,17 @@
AddrMode() : BaseGV(0), BaseOffs(0), HasBaseReg(false), Scale(0) {}
};
=20
+ /// GetAddrModeArguments - CodeGenPrepare sinks address calculations int=
o the
+ /// same BB as Load/Store instructions reading the address. This allows=
as
+ /// much computation as possible to be done in the address mode for that
+ /// operand. This hook lets targets also pass back when this should be =
done
+ /// on intrinsics which load/store.
+ virtual bool GetAddrModeArguments(IntrinsicInst *I,
+ SmallVectorImpl<Value*> &Ops,
+ Type *&AccessTy) const {
+ return false;
+ }
+
/// isLegalAddressingMode - Return true if the addressing mode represent=
ed by
/// AM is legal for this target, for a load/store of the specified type.
/// The type may be VoidTy, in which case only return true if the addres=
sing
@@ -1581,6 +1590,18 @@
return false;
}
=20
+ /// isFNegFree - Return true if an fneg operation is free to the point w=
here
+ /// it is never worthwhile to replace it with a bitwise operation.
+ virtual bool isFNegFree(EVT) const {
+ return false;
+ }
+
+ /// isFAbsFree - Return true if an fneg operation is free to the point w=
here
+ /// it is never worthwhile to replace it with a bitwise operation.
+ virtual bool isFAbsFree(EVT) const {
+ return false;
+ }
+
/// isNarrowingProfitable - Return true if it's profitable to narrow
/// operations of type VT1 to VT2. e.g. on x86, it's profitable to narrow
/// from i32 to i8 but not from i32 to i16.
@@ -1593,9 +1614,9 @@
//
SDValue BuildExactSDIV(SDValue Op1, SDValue Op2, DebugLoc dl,
SelectionDAG &DAG) const;
- SDValue BuildSDIV(SDNode *N, SelectionDAG &DAG,
+ SDValue BuildSDIV(SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization,
std::vector<SDNode*>* Created) const;
- SDValue BuildUDIV(SDNode *N, SelectionDAG &DAG,
+ SDValue BuildUDIV(SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization,
std::vector<SDNode*>* Created) const;
=20
=20
@@ -1753,7 +1774,7 @@
=20
/// RegClassForVT - This indicates the default register class to use for
/// each ValueType the target supports natively.
- TargetRegisterClass *RegClassForVT[MVT::LAST_VALUETYPE];
+ const TargetRegisterClass *RegClassForVT[MVT::LAST_VALUETYPE];
unsigned char NumRegistersForVT[MVT::LAST_VALUETYPE];
EVT RegisterTypeForVT[MVT::LAST_VALUETYPE];
=20
@@ -1925,12 +1946,9 @@
// Vectors with illegal element types are expanded.
EVT NVT =3D EVT::getVectorVT(Context, EltVT, VT.getVectorNumElements()=
/ 2);
return LegalizeKind(TypeSplitVector, NVT);
-
- assert(false && "Unable to handle this kind of vector type");
- return LegalizeKind(TypeLegal, VT);
}
=20
- std::vector<std::pair<EVT, TargetRegisterClass*> > AvailableRegClasses;
+ std::vector<std::pair<EVT, const TargetRegisterClass*> > AvailableRegCla=
sses;
=20
/// TargetDAGCombineArray - Targets can specify ISD nodes that they would
/// like PerformDAGCombine callbacks for by calling setTargetDAGCombine(=
),
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetLoweringObjectFile.h
--- a/head/contrib/llvm/include/llvm/Target/TargetLoweringObjectFile.h Tue =
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetLoweringObjectFile.h Tue =
Apr 17 11:51:51 2012 +0300
@@ -15,18 +15,17 @@
#ifndef LLVM_TARGET_TARGETLOWERINGOBJECTFILE_H
#define LLVM_TARGET_TARGETLOWERINGOBJECTFILE_H
=20
-#include "llvm/ADT/StringRef.h"
+#include "llvm/Module.h"
#include "llvm/MC/MCObjectFileInfo.h"
#include "llvm/MC/SectionKind.h"
+#include "llvm/ADT/ArrayRef.h"
=20
namespace llvm {
class MachineModuleInfo;
class Mangler;
- class MCAsmInfo;
class MCContext;
class MCExpr;
class MCSection;
- class MCSectionMachO;
class MCSymbol;
class MCStreamer;
class GlobalValue;
@@ -53,7 +52,13 @@
virtual void emitPersonalityValue(MCStreamer &Streamer,
const TargetMachine &TM,
const MCSymbol *Sym) const;
- =20
+
+ /// emitModuleFlags - Emit the module flags that the platform cares abou=
t.
+ virtual void emitModuleFlags(MCStreamer &,
+ ArrayRef<Module::ModuleFlagEntry>,
+ Mangler *, const TargetMachine &) const {
+ }
+
/// shouldEmitUsedDirectiveFor - This hook allows targets to selectively
/// decide not to emit the UsedDirective for some symbols in llvm.used.
/// FIXME: REMOVE this (rdar://7071300)
@@ -86,9 +91,7 @@
const TargetMachine &TM) const {
return SectionForGlobal(GV, getKindForGlobal(GV, TM), Mang, TM);
}
- =20
- =20
- =20
+
/// getExplicitSectionGlobal - Targets should implement this method to a=
ssign
/// a section to globals with an explicit section specfied. The
/// implementation of this method can assume that GV->hasSection() is tr=
ue.
@@ -121,7 +124,18 @@
const MCExpr *
getExprForDwarfReference(const MCSymbol *Sym, unsigned Encoding,
MCStreamer &Streamer) const;
- =20
+
+ virtual const MCSection *
+ getStaticCtorSection(unsigned Priority =3D 65535) const {
+ (void)Priority;
+ return StaticCtorSection;
+ }
+ virtual const MCSection *
+ getStaticDtorSection(unsigned Priority =3D 65535) const {
+ (void)Priority;
+ return StaticDtorSection;
+ }
+
protected:
virtual const MCSection *
SelectSectionForGlobal(const GlobalValue *GV, SectionKind Kind,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetMachine.h
--- a/head/contrib/llvm/include/llvm/Target/TargetMachine.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetMachine.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -14,7 +14,8 @@
#ifndef LLVM_TARGET_TARGETMACHINE_H
#define LLVM_TARGET_TARGETMACHINE_H
=20
-#include "llvm/MC/MCCodeGenInfo.h"
+#include "llvm/Support/CodeGen.h"
+#include "llvm/Target/TargetOptions.h"
#include "llvm/ADT/StringRef.h"
#include <cassert>
#include <string>
@@ -23,11 +24,10 @@
=20
class InstrItineraryData;
class JITCodeEmitter;
+class GlobalValue;
class MCAsmInfo;
class MCCodeGenInfo;
class MCContext;
-class Pass;
-class PassManager;
class PassManagerBase;
class Target;
class TargetData;
@@ -37,32 +37,13 @@
class TargetIntrinsicInfo;
class TargetJITInfo;
class TargetLowering;
+class TargetPassConfig;
class TargetRegisterInfo;
class TargetSelectionDAGInfo;
class TargetSubtargetInfo;
class formatted_raw_ostream;
class raw_ostream;
=20
-// Code generation optimization level.
-namespace CodeGenOpt {
- enum Level {
- None, // -O0
- Less, // -O1
- Default, // -O2, -Os
- Aggressive // -O3
- };
-}
-
-namespace Sched {
- enum Preference {
- None, // No preference
- Latency, // Scheduling for shortest total latency.
- RegPressure, // Scheduling for lowest register pressure.
- Hybrid, // Scheduling for both latency and register pressure.
- ILP // Scheduling for ILP in low register pressure mode.
- };
-}
-
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
///
/// TargetMachine - Primary interface to the complete machine description =
for
@@ -74,7 +55,7 @@
void operator=3D(const TargetMachine &); // DO NOT IMPLEMENT
protected: // Can only create subclasses.
TargetMachine(const Target &T, StringRef TargetTriple,
- StringRef CPU, StringRef FS);
+ StringRef CPU, StringRef FS, const TargetOptions &Options);
=20
/// getSubtargetImpl - virtual method implemented by subclasses that ret=
urns
/// a reference to that target's TargetSubtargetInfo-derived member vari=
able.
@@ -101,6 +82,7 @@
unsigned MCSaveTempLabels : 1;
unsigned MCUseLoc : 1;
unsigned MCUseCFI : 1;
+ unsigned MCUseDwarfDirectory : 1;
=20
public:
virtual ~TargetMachine();
@@ -111,6 +93,8 @@
const StringRef getTargetCPU() const { return TargetCPU; }
const StringRef getTargetFeatureString() const { return TargetFS; }
=20
+ TargetOptions Options;
+
// Interfaces to the major aspects of target machine information:
// -- Instruction opcode and operand information
// -- Pipelines and scheduling information
@@ -196,6 +180,14 @@
/// setMCUseCFI - Set whether all we should use dwarf's .cfi_* directive=
s.
void setMCUseCFI(bool Value) { MCUseCFI =3D Value; }
=20
+ /// hasMCUseDwarfDirectory - Check whether we should use .file directive=
s with
+ /// explicit directories.
+ bool hasMCUseDwarfDirectory() const { return MCUseDwarfDirectory; }
+
+ /// setMCUseDwarfDirectory - Set whether all we should use .file directi=
ves
+ /// with explicit directories.
+ void setMCUseDwarfDirectory(bool Value) { MCUseDwarfDirectory =3D Value;=
}
+
/// getRelocationModel - Returns the code generation relocation model. T=
he
/// choices are static, PIC, and dynamic-no-pic, and target default.
Reloc::Model getRelocationModel() const;
@@ -204,6 +196,18 @@
/// medium, large, and target default.
CodeModel::Model getCodeModel() const;
=20
+ /// getTLSModel - Returns the TLS model which should be used for the giv=
en
+ /// global variable.
+ TLSModel::Model getTLSModel(const GlobalValue *GV) const;
+
+ /// getOptLevel - Returns the optimization level: None, Less,
+ /// Default, or Aggressive.
+ CodeGenOpt::Level getOptLevel() const;
+
+ void setFastISel(bool Enable) { Options.EnableFastISel =3D Enable; }
+
+ bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
+
/// getAsmVerbosityDefault - Returns the default value of asm verbosity.
///
static bool getAsmVerbosityDefault();
@@ -236,10 +240,6 @@
CGFT_Null // Do not emit any output.
};
=20
- /// getEnableTailMergeDefault - the default setting for -enable-tail-mer=
ge
- /// on this target. User flag overrides.
- virtual bool getEnableTailMergeDefault() const { return true; }
-
/// addPassesToEmitFile - Add passes to the specified pass manager to ge=
t the
/// specified file emitted. Typically this will involve several steps o=
f code
/// generation. This method should return true if emission of this file=
type
@@ -247,8 +247,7 @@
virtual bool addPassesToEmitFile(PassManagerBase &,
formatted_raw_ostream &,
CodeGenFileType,
- CodeGenOpt::Level,
- bool =3D true) {
+ bool /*DisableVerify*/ =3D true) {
return true;
}
=20
@@ -260,8 +259,7 @@
///
virtual bool addPassesToEmitMachineCode(PassManagerBase &,
JITCodeEmitter &,
- CodeGenOpt::Level,
- bool =3D true) {
+ bool /*DisableVerify*/ =3D true)=
{
return true;
}
=20
@@ -273,8 +271,7 @@
virtual bool addPassesToEmitMC(PassManagerBase &,
MCContext *&,
raw_ostream &,
- CodeGenOpt::Level,
- bool =3D true) {
+ bool /*DisableVerify*/ =3D true) {
return true;
}
};
@@ -285,25 +282,21 @@
class LLVMTargetMachine : public TargetMachine {
protected: // Can only create subclasses.
LLVMTargetMachine(const Target &T, StringRef TargetTriple,
- StringRef CPU, StringRef FS,
- Reloc::Model RM, CodeModel::Model CM);
-
-private:
- /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
- /// both emitting to assembly files or machine code output.
- ///
- bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level,
- bool DisableVerify, MCContext *&OutCtx);
+ StringRef CPU, StringRef FS, TargetOptions Options,
+ Reloc::Model RM, CodeModel::Model CM,
+ CodeGenOpt::Level OL);
=20
public:
+ /// createPassConfig - Create a pass configuration object to be used by
+ /// addPassToEmitX methods for generating a pipeline of CodeGen passes.
+ virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
+
/// addPassesToEmitFile - Add passes to the specified pass manager to ge=
t the
/// specified file emitted. Typically this will involve several steps o=
f code
- /// generation. If OptLevel is None, the code generator should emit cod=
e as
- /// fast as possible, though the generated code may be less efficient.
+ /// generation.
virtual bool addPassesToEmitFile(PassManagerBase &PM,
formatted_raw_ostream &Out,
CodeGenFileType FileType,
- CodeGenOpt::Level,
bool DisableVerify =3D true);
=20
/// addPassesToEmitMachineCode - Add passes to the specified pass manage=
r to
@@ -314,7 +307,6 @@
///
virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
JITCodeEmitter &MCE,
- CodeGenOpt::Level,
bool DisableVerify =3D true);
=20
/// addPassesToEmitMC - Add passes to the specified pass manager to get
@@ -325,65 +317,15 @@
virtual bool addPassesToEmitMC(PassManagerBase &PM,
MCContext *&Ctx,
raw_ostream &OS,
- CodeGenOpt::Level OptLevel,
bool DisableVerify =3D true);
=20
- /// Target-Independent Code Generator Pass Configuration Options.
-
- /// addPreISelPasses - This method should add any "last minute" LLVM->LL=
VM
- /// passes (which are run just before instruction selector).
- virtual bool addPreISel(PassManagerBase &, CodeGenOpt::Level) {
- return true;
- }
-
- /// addInstSelector - This method should install an instruction selector=
pass,
- /// which converts from LLVM code to machine instructions.
- virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) {
- return true;
- }
-
- /// addPreRegAlloc - This method may be implemented by targets that want=
to
- /// run passes immediately before register allocation. This should return
- /// true if -print-machineinstrs should print after these passes.
- virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
- return false;
- }
-
- /// addPostRegAlloc - This method may be implemented by targets that want
- /// to run passes after register allocation but before prolog-epilog
- /// insertion. This should return true if -print-machineinstrs should p=
rint
- /// after these passes.
- virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
- return false;
- }
-
- /// addPreSched2 - This method may be implemented by targets that want to
- /// run passes after prolog-epilog insertion and before the second instr=
uction
- /// scheduling pass. This should return true if -print-machineinstrs sh=
ould
- /// print after these passes.
- virtual bool addPreSched2(PassManagerBase &, CodeGenOpt::Level) {
- return false;
- }
-
- /// addPreEmitPass - This pass may be implemented by targets that want t=
o run
- /// passes immediately before machine code is emitted. This should retu=
rn
- /// true if -print-machineinstrs should print out the code after the pas=
ses.
- virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) {
- return false;
- }
-
-
/// addCodeEmitter - This pass should be overridden by the target to add=
a
/// code emitter, if supported. If this is not supported, 'true' should=
be
/// returned.
- virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
+ virtual bool addCodeEmitter(PassManagerBase &,
JITCodeEmitter &) {
return true;
}
-
- /// getEnableTailMergeDefault - the default setting for -enable-tail-mer=
ge
- /// on this target. User flag overrides.
- virtual bool getEnableTailMergeDefault() const { return true; }
};
=20
} // End llvm namespace
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetOpcodes.h
--- a/head/contrib/llvm/include/llvm/Target/TargetOpcodes.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetOpcodes.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -82,7 +82,12 @@
=20
/// COPY - Target-independent register copy. This instruction can also=
be
/// used to copy between subregisters of virtual registers.
- COPY =3D 13
+ COPY =3D 13,
+
+ /// BUNDLE - This instruction represents an instruction bundle. Instru=
ctions
+ /// which immediately follow a BUNDLE instruction which are marked with
+ /// 'InsideBundle' flag are inside the bundle.
+ BUNDLE
};
} // end namespace TargetOpcode
} // end namespace llvm
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetOptions.h
--- a/head/contrib/llvm/include/llvm/Target/TargetOptions.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetOptions.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -15,151 +15,177 @@
#ifndef LLVM_TARGET_TARGETOPTIONS_H
#define LLVM_TARGET_TARGETOPTIONS_H
=20
+#include <string>
+
namespace llvm {
class MachineFunction;
+ class StringRef;
=20
// Possible float ABI settings. Used with FloatABIType in TargetOptions.=
h.
namespace FloatABI {
enum ABIType {
- Default, // Target-specific (either soft of hard depending on triple=
, etc).
+ Default, // Target-specific (either soft or hard depending on triple=
, etc).
Soft, // Soft float.
Hard // Hard float.
};
}
- =20
- /// PrintMachineCode - This flag is enabled when the -print-machineinstrs
- /// option is specified on the command line, and should enable debugging
- /// output from the code generator.
- extern bool PrintMachineCode;
=20
- /// NoFramePointerElim - This flag is enabled when the -disable-fp-elim =
is
- /// specified on the command line. If the target supports the frame poi=
nter
- /// elimination optimization, this option should disable it.
- extern bool NoFramePointerElim;
+ class TargetOptions {
+ public:
+ TargetOptions()
+ : PrintMachineCode(false), NoFramePointerElim(false),
+ NoFramePointerElimNonLeaf(false), LessPreciseFPMADOption(false),
+ NoExcessFPPrecision(false), UnsafeFPMath(false), NoInfsFPMath(fa=
lse),
+ NoNaNsFPMath(false), HonorSignDependentRoundingFPMathOption(fals=
e),
+ UseSoftFloat(false), NoZerosInBSS(false), JITExceptionHandling(f=
alse),
+ JITEmitDebugInfo(false), JITEmitDebugInfoToDisk(false),
+ GuaranteedTailCallOpt(false), DisableTailCalls(false),
+ StackAlignmentOverride(0), RealignStack(true),
+ DisableJumpTables(false), EnableFastISel(false),
+ PositionIndependentExecutable(false), EnableSegmentedStacks(fals=
e),
+ TrapFuncName(""), FloatABIType(FloatABI::Default)
+ {}
=20
- /// NoFramePointerElimNonLeaf - This flag is enabled when the
- /// -disable-non-leaf-fp-elim is specified on the command line. If the t=
arget
- /// supports the frame pointer elimination optimization, this option sho=
uld
- /// disable it for non-leaf functions.
- extern bool NoFramePointerElimNonLeaf;
+ /// PrintMachineCode - This flag is enabled when the -print-machineins=
trs
+ /// option is specified on the command line, and should enable debuggi=
ng
+ /// output from the code generator.
+ unsigned PrintMachineCode : 1;
=20
- /// DisableFramePointerElim - This returns true if frame pointer elimina=
tion
- /// optimization should be disabled for the given machine function.
- extern bool DisableFramePointerElim(const MachineFunction &MF);
+ /// NoFramePointerElim - This flag is enabled when the -disable-fp-eli=
m is
+ /// specified on the command line. If the target supports the frame p=
ointer
+ /// elimination optimization, this option should disable it.
+ unsigned NoFramePointerElim : 1;
=20
- /// LessPreciseFPMAD - This flag is enabled when the
- /// -enable-fp-mad is specified on the command line. When this flag is =
off
- /// (the default), the code generator is not allowed to generate mad
- /// (multiply add) if the result is "less precise" than doing those oper=
ations
- /// individually.
- extern bool LessPreciseFPMADOption;
- extern bool LessPreciseFPMAD();
+ /// NoFramePointerElimNonLeaf - This flag is enabled when the
+ /// -disable-non-leaf-fp-elim is specified on the command line. If the
+ /// target supports the frame pointer elimination optimization, this o=
ption
+ /// should disable it for non-leaf functions.
+ unsigned NoFramePointerElimNonLeaf : 1;
=20
- /// NoExcessFPPrecision - This flag is enabled when the
- /// -disable-excess-fp-precision flag is specified on the command line. =
When
- /// this flag is off (the default), the code generator is allowed to pro=
duce
- /// results that are "more precise" than IEEE allows. This includes use=
of
- /// FMA-like operations and use of the X86 FP registers without rounding=
all
- /// over the place.
- extern bool NoExcessFPPrecision;
+ /// DisableFramePointerElim - This returns true if frame pointer elimi=
nation
+ /// optimization should be disabled for the given machine function.
+ bool DisableFramePointerElim(const MachineFunction &MF) const;
=20
- /// UnsafeFPMath - This flag is enabled when the
- /// -enable-unsafe-fp-math flag is specified on the command line. When
- /// this flag is off (the default), the code generator is not allowed to
- /// produce results that are "less precise" than IEEE allows. This incl=
udes
- /// use of X86 instructions like FSIN and FCOS instead of libcalls.
- /// UnsafeFPMath implies LessPreciseFPMAD.
- extern bool UnsafeFPMath;
+ /// LessPreciseFPMAD - This flag is enabled when the
+ /// -enable-fp-mad is specified on the command line. When this flag i=
s off
+ /// (the default), the code generator is not allowed to generate mad
+ /// (multiply add) if the result is "less precise" than doing those
+ /// operations individually.
+ unsigned LessPreciseFPMADOption : 1;
+ bool LessPreciseFPMAD() const;
=20
- /// NoInfsFPMath - This flag is enabled when the
- /// -enable-no-infs-fp-math flag is specified on the command line. When
- /// this flag is off (the default), the code generator is not allowed to
- /// assume the FP arithmetic arguments and results are never +-Infs.
- extern bool NoInfsFPMath;
+ /// NoExcessFPPrecision - This flag is enabled when the
+ /// -disable-excess-fp-precision flag is specified on the command line.
+ /// When this flag is off (the default), the code generator is allowed=
to
+ /// produce results that are "more precise" than IEEE allows. This in=
cludes
+ /// use of FMA-like operations and use of the X86 FP registers without
+ /// rounding all over the place.
+ unsigned NoExcessFPPrecision : 1;
=20
- /// NoNaNsFPMath - This flag is enabled when the
- /// -enable-no-nans-fp-math flag is specified on the command line. When
- /// this flag is off (the default), the code generator is not allowed to
- /// assume the FP arithmetic arguments and results are never NaNs.
- extern bool NoNaNsFPMath;
+ /// UnsafeFPMath - This flag is enabled when the
+ /// -enable-unsafe-fp-math flag is specified on the command line. When
+ /// this flag is off (the default), the code generator is not allowed =
to
+ /// produce results that are "less precise" than IEEE allows. This in=
cludes
+ /// use of X86 instructions like FSIN and FCOS instead of libcalls.
+ /// UnsafeFPMath implies LessPreciseFPMAD.
+ unsigned UnsafeFPMath : 1;
=20
- /// HonorSignDependentRoundingFPMath - This returns true when the
- /// -enable-sign-dependent-rounding-fp-math is specified. If this retur=
ns
- /// false (the default), the code generator is allowed to assume that the
- /// rounding behavior is the default (round-to-zero for all floating poi=
nt to
- /// integer conversions, and round-to-nearest for all other arithmetic
- /// truncations). If this is enabled (set to true), the code generator =
must
- /// assume that the rounding mode may dynamically change.
- extern bool HonorSignDependentRoundingFPMathOption;
- extern bool HonorSignDependentRoundingFPMath();
- =20
- /// UseSoftFloat - This flag is enabled when the -soft-float flag is spe=
cified
- /// on the command line. When this flag is on, the code generator will
- /// generate libcalls to the software floating point library instead of
- /// target FP instructions.
- extern bool UseSoftFloat;
+ /// NoInfsFPMath - This flag is enabled when the
+ /// -enable-no-infs-fp-math flag is specified on the command line. When
+ /// this flag is off (the default), the code generator is not allowed =
to
+ /// assume the FP arithmetic arguments and results are never +-Infs.
+ unsigned NoInfsFPMath : 1;
=20
- /// FloatABIType - This setting is set by -float-abi=3Dxxx option is spe=
cfied
- /// on the command line. This setting may either be Default, Soft, or Ha=
rd.
- /// Default selects the target's default behavior. Soft selects the ABI =
for
- /// UseSoftFloat, but does not inidcate that FP hardware may not be used.
- /// Such a combination is unfortunately popular (e.g. arm-apple-darwin).
- /// Hard presumes that the normal FP ABI is used.
- extern FloatABI::ABIType FloatABIType;
+ /// NoNaNsFPMath - This flag is enabled when the
+ /// -enable-no-nans-fp-math flag is specified on the command line. When
+ /// this flag is off (the default), the code generator is not allowed =
to
+ /// assume the FP arithmetic arguments and results are never NaNs.
+ unsigned NoNaNsFPMath : 1;
=20
- /// NoZerosInBSS - By default some codegens place zero-initialized data =
to
- /// .bss section. This flag disables such behaviour (necessary, e.g. for
- /// crt*.o compiling).
- extern bool NoZerosInBSS;
+ /// HonorSignDependentRoundingFPMath - This returns true when the
+ /// -enable-sign-dependent-rounding-fp-math is specified. If this ret=
urns
+ /// false (the default), the code generator is allowed to assume that =
the
+ /// rounding behavior is the default (round-to-zero for all floating p=
oint
+ /// to integer conversions, and round-to-nearest for all other arithme=
tic
+ /// truncations). If this is enabled (set to true), the code generato=
r must
+ /// assume that the rounding mode may dynamically change.
+ unsigned HonorSignDependentRoundingFPMathOption : 1;
+ bool HonorSignDependentRoundingFPMath() const;
=20
- /// JITExceptionHandling - This flag indicates that the JIT should emit
- /// exception handling information.
- extern bool JITExceptionHandling;
+ /// UseSoftFloat - This flag is enabled when the -soft-float flag is
+ /// specified on the command line. When this flag is on, the code gen=
erator
+ /// will generate libcalls to the software floating point library inst=
ead of
+ /// target FP instructions.
+ unsigned UseSoftFloat : 1;
=20
- /// JITEmitDebugInfo - This flag indicates that the JIT should try to em=
it
- /// debug information and notify a debugger about it.
- extern bool JITEmitDebugInfo;
+ /// NoZerosInBSS - By default some codegens place zero-initialized dat=
a to
+ /// .bss section. This flag disables such behaviour (necessary, e.g. f=
or
+ /// crt*.o compiling).
+ unsigned NoZerosInBSS : 1;
=20
- /// JITEmitDebugInfoToDisk - This flag indicates that the JIT should wri=
te
- /// the object files generated by the JITEmitDebugInfo flag to disk. Th=
is
- /// flag is hidden and is only for debugging the debug info.
- extern bool JITEmitDebugInfoToDisk;
+ /// JITExceptionHandling - This flag indicates that the JIT should emit
+ /// exception handling information.
+ unsigned JITExceptionHandling : 1;
=20
- /// GuaranteedTailCallOpt - This flag is enabled when -tailcallopt is
- /// specified on the commandline. When the flag is on, participating tar=
gets
- /// will perform tail call optimization on all calls which use the fastcc
- /// calling convention and which satisfy certain target-independent
- /// criteria (being at the end of a function, having the same return type
- /// as their parent function, etc.), using an alternate ABI if necessary.
- extern bool GuaranteedTailCallOpt;
+ /// JITEmitDebugInfo - This flag indicates that the JIT should try to =
emit
+ /// debug information and notify a debugger about it.
+ unsigned JITEmitDebugInfo : 1;
=20
- /// StackAlignmentOverride - Override default stack alignment for target.
- extern unsigned StackAlignmentOverride;
+ /// JITEmitDebugInfoToDisk - This flag indicates that the JIT should w=
rite
+ /// the object files generated by the JITEmitDebugInfo flag to disk. =
This
+ /// flag is hidden and is only for debugging the debug info.
+ unsigned JITEmitDebugInfoToDisk : 1;
=20
- /// RealignStack - This flag indicates whether the stack should be
- /// automatically realigned, if needed.
- extern bool RealignStack;
+ /// GuaranteedTailCallOpt - This flag is enabled when -tailcallopt is
+ /// specified on the commandline. When the flag is on, participating t=
argets
+ /// will perform tail call optimization on all calls which use the fas=
tcc
+ /// calling convention and which satisfy certain target-independent
+ /// criteria (being at the end of a function, having the same return t=
ype
+ /// as their parent function, etc.), using an alternate ABI if necessa=
ry.
+ unsigned GuaranteedTailCallOpt : 1;
=20
- /// DisableJumpTables - This flag indicates jump tables should not be=20
- /// generated.
- extern bool DisableJumpTables;
+ /// DisableTailCalls - This flag controls whether we will use tail cal=
ls.
+ /// Disabling them may be useful to maintain a correct call stack.
+ unsigned DisableTailCalls : 1;
=20
- /// EnableFastISel - This flag enables fast-path instruction selection
- /// which trades away generated code quality in favor of reducing
- /// compile time.
- extern bool EnableFastISel;
- =20
- /// StrongPHIElim - This flag enables more aggressive PHI elimination
- /// wth earlier copy coalescing.
- extern bool StrongPHIElim;
+ /// StackAlignmentOverride - Override default stack alignment for targ=
et.
+ unsigned StackAlignmentOverride;
=20
- /// getTrapFunctionName - If this returns a non-empty string, this means=
isel
- /// should lower Intrinsic::trap to a call to the specified function name
- /// instead of an ISD::TRAP node.
- extern StringRef getTrapFunctionName();
+ /// RealignStack - This flag indicates whether the stack should be
+ /// automatically realigned, if needed.
+ unsigned RealignStack : 1;
=20
- extern bool EnableSegmentedStacks;
+ /// DisableJumpTables - This flag indicates jump tables should not be
+ /// generated.
+ unsigned DisableJumpTables : 1;
=20
+ /// EnableFastISel - This flag enables fast-path instruction selection
+ /// which trades away generated code quality in favor of reducing
+ /// compile time.
+ unsigned EnableFastISel : 1;
+
+ /// PositionIndependentExecutable - This flag indicates whether the co=
de
+ /// will eventually be linked into a single executable, despite the PIC
+ /// relocation model being in use. It's value is undefined (and irrele=
vant)
+ /// if the relocation model is anything other than PIC.
+ unsigned PositionIndependentExecutable : 1;
+
+ unsigned EnableSegmentedStacks : 1;
+
+ /// getTrapFunctionName - If this returns a non-empty string, this mea=
ns
+ /// isel should lower Intrinsic::trap to a call to the specified funct=
ion
+ /// name instead of an ISD::TRAP node.
+ std::string TrapFuncName;
+ StringRef getTrapFunctionName() const;
+
+ /// FloatABIType - This setting is set by -float-abi=3Dxxx option is s=
pecfied
+ /// on the command line. This setting may either be Default, Soft, or =
Hard.
+ /// Default selects the target's default behavior. Soft selects the AB=
I for
+ /// UseSoftFloat, but does not indicate that FP hardware may not be us=
ed.
+ /// Such a combination is unfortunately popular (e.g. arm-apple-darwin=
).
+ /// Hard presumes that the normal FP ABI is used.
+ FloatABI::ABIType FloatABIType;
+ };
} // End llvm namespace
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetRegisterInfo.h
--- a/head/contrib/llvm/include/llvm/Target/TargetRegisterInfo.h Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetRegisterInfo.h Tue Apr 17=
11:51:51 2012 +0300
@@ -20,6 +20,7 @@
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/ADT/ArrayRef.h"
+#include "llvm/CallingConv.h"
#include <cassert>
#include <functional>
=20
@@ -33,25 +34,18 @@
=20
class TargetRegisterClass {
public:
- typedef const unsigned* iterator;
- typedef const unsigned* const_iterator;
- typedef const EVT* vt_iterator;
+ typedef const uint16_t* iterator;
+ typedef const uint16_t* const_iterator;
+ typedef const MVT::SimpleValueType* vt_iterator;
typedef const TargetRegisterClass* const * sc_iterator;
-private:
+
+ // Instance variables filled by tablegen, do not use!
const MCRegisterClass *MC;
const vt_iterator VTs;
const unsigned *SubClassMask;
const sc_iterator SuperClasses;
const sc_iterator SuperRegClasses;
-public:
- TargetRegisterClass(const MCRegisterClass *MC, const EVT *vts,
- const unsigned *subcm,
- const TargetRegisterClass * const *supcs,
- const TargetRegisterClass * const *superregcs)
- : MC(MC), VTs(vts), SubClassMask(subcm), SuperClasses(supcs),
- SuperRegClasses(superregcs) {}
-
- virtual ~TargetRegisterClass() {} // Allow subclasses
+ ArrayRef<uint16_t> (*OrderFunc)(const MachineFunction&);
=20
/// getID() - Return the register class ID number.
///
@@ -108,7 +102,7 @@
///
bool hasType(EVT vt) const {
for(int i =3D 0; VTs[i] !=3D MVT::Other; ++i)
- if (VTs[i] =3D=3D vt)
+ if (EVT(VTs[i]) =3D=3D vt)
return true;
return false;
}
@@ -165,7 +159,7 @@
/// getSubClassMask - Returns a bit vector of subclasses, including this=
one.
/// The vector is indexed by class IDs, see hasSubClassEq() above for ho=
w to
/// use it.
- const unsigned *getSubClassMask() const {
+ const uint32_t *getSubClassMask() const {
return SubClassMask;
}
=20
@@ -196,9 +190,8 @@
///
/// By default, this method returns all registers in the class.
///
- virtual
- ArrayRef<unsigned> getRawAllocationOrder(const MachineFunction &MF) cons=
t {
- return makeArrayRef(begin(), getNumRegs());
+ ArrayRef<uint16_t> getRawAllocationOrder(const MachineFunction &MF) cons=
t {
+ return OrderFunc ? OrderFunc(MF) : makeArrayRef(begin(), getNumRegs());
}
};
=20
@@ -209,6 +202,13 @@
bool inAllocatableClass; // Register belongs to an allocatable regc=
lass.
};
=20
+/// Each TargetRegisterClass has a per register weight, and weight
+/// limit which must be less than the limits of its pressure sets.
+struct RegClassWeight {
+ unsigned RegWeigt;
+ unsigned WeightLimit;
+};
+
/// TargetRegisterInfo base class - We assume that the target defines a st=
atic
/// array of TargetRegisterDesc objects that represent all of the machine
/// registers that the target has. As such, we simply have to track a poi=
nter
@@ -332,7 +332,7 @@
if (regA =3D=3D regB) return true;
if (isVirtualRegister(regA) || isVirtualRegister(regB))
return false;
- for (const unsigned *regList =3D getOverlaps(regA)+1; *regList; ++regL=
ist) {
+ for (const uint16_t *regList =3D getOverlaps(regA)+1; *regList; ++regL=
ist) {
if (*regList =3D=3D regB) return true;
}
return false;
@@ -347,7 +347,7 @@
/// isSuperRegister - Returns true if regB is a super-register of regA.
///
bool isSuperRegister(unsigned regA, unsigned regB) const {
- for (const unsigned *regList =3D getSuperRegisters(regA); *regList;++r=
egList){
+ for (const uint16_t *regList =3D getSuperRegisters(regA); *regList;++r=
egList){
if (*regList =3D=3D regB) return true;
}
return false;
@@ -356,10 +356,33 @@
/// getCalleeSavedRegs - Return a null-terminated list of all of the
/// callee saved registers on this target. The register should be in the
/// order of desired callee-save stack frame offset. The first register =
is
- /// closed to the incoming stack pointer if stack grows down, and vice v=
ersa.
- virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF =3D=
0)
+ /// closest to the incoming stack pointer if stack grows down, and vice =
versa.
+ ///
+ virtual const uint16_t* getCalleeSavedRegs(const MachineFunction *MF =3D=
0)
cons=
t =3D 0;
=20
+ /// getCallPreservedMask - Return a mask of call-preserved registers for=
the
+ /// given calling convention on the current sub-target. The mask should
+ /// include all call-preserved aliases. This is used by the register
+ /// allocator to determine which registers can be live across a call.
+ ///
+ /// The mask is an array containing (TRI::getNumRegs()+31)/32 entries.
+ /// A set bit indicates that all bits of the corresponding register are
+ /// preserved across the function call. The bit mask is expected to be
+ /// sub-register complete, i.e. if A is preserved, so are all its
+ /// sub-registers.
+ ///
+ /// Bits are numbered from the LSB, so the bit for physical register Reg=
can
+ /// be found as (Mask[Reg / 32] >> Reg % 32) & 1.
+ ///
+ /// A NULL pointer means that no register mask will be used, and call
+ /// instructions should use implicit-def operands to indicate call clobb=
ered
+ /// registers.
+ ///
+ virtual const uint32_t *getCallPreservedMask(CallingConv::ID) const {
+ // The default mask clobbers everything. All targets should override.
+ return 0;
+ }
=20
/// getReservedRegs - Returns a bitset indexed by physical register numb=
er
/// indicating if a register is a special register that has particular u=
ses
@@ -367,24 +390,11 @@
/// used by register scavenger to determine what registers are free.
virtual BitVector getReservedRegs(const MachineFunction &MF) const =3D 0;
=20
- /// getSubReg - Returns the physical register number of sub-register "In=
dex"
- /// for physical register RegNo. Return zero if the sub-register does not
- /// exist.
- virtual unsigned getSubReg(unsigned RegNo, unsigned Index) const =3D 0;
-
- /// getSubRegIndex - For a given register pair, return the sub-register =
index
- /// if the second register is a sub-register of the first. Return zero
- /// otherwise.
- virtual unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const=
=3D 0;
-
/// getMatchingSuperReg - Return a super-register of the specified regis=
ter
/// Reg so its sub-register of index SubIdx is Reg.
unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
const TargetRegisterClass *RC) const {
- for (const unsigned *SRs =3D getSuperRegisters(Reg); unsigned SR =3D *=
SRs;++SRs)
- if (Reg =3D=3D getSubReg(SR, SubIdx) && RC->contains(SR))
- return SR;
- return 0;
+ return MCRegisterInfo::getMatchingSuperReg(Reg, SubIdx, RC->MC);
}
=20
/// canCombineSubRegIndices - Given a register class and a list of
@@ -402,11 +412,11 @@
/// getMatchingSuperRegClass - Return a subclass of the specified regist=
er
/// class A so that each register in it has a sub-register of the
/// specified sub-register index which is in the specified register clas=
s B.
+ ///
+ /// TableGen will synthesize missing A sub-classes.
virtual const TargetRegisterClass *
getMatchingSuperRegClass(const TargetRegisterClass *A,
- const TargetRegisterClass *B, unsigned Idx) con=
st {
- return 0;
- }
+ const TargetRegisterClass *B, unsigned Idx) con=
st =3D0;
=20
/// getSubClassWithSubReg - Returns the largest legal sub-class of RC th=
at
/// supports the sub-register index Idx.
@@ -419,6 +429,7 @@
/// supported by the full GR32 register class in 64-bit mode, but only b=
y the
/// GR32_ABCD regiister class in 32-bit mode.
///
+ /// TableGen will synthesize missing RC sub-classes.
virtual const TargetRegisterClass *
getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const=
=3D0;
=20
@@ -469,8 +480,7 @@
/// values. If a target supports multiple different pointer register cl=
asses,
/// kind specifies which one is indicated.
virtual const TargetRegisterClass *getPointerRegClass(unsigned Kind=3D0)=
const {
- assert(0 && "Target didn't implement getPointerRegClass!");
- return 0; // Must return a value in order to compile with VS 2005
+ llvm_unreachable("Target didn't implement getPointerRegClass!");
}
=20
/// getCrossCopyRegClass - Returns a legal register class to copy a regi=
ster
@@ -497,18 +507,37 @@
/// getRegPressureLimit - Return the register pressure "high water mark"=
for
/// the specific register class. The scheduler is in high register press=
ure
/// mode (for the specific register class) if it goes over the limit.
+ ///
+ /// Note: this is the old register pressure model that relies on a manua=
lly
+ /// specified representative register class per value type.
virtual unsigned getRegPressureLimit(const TargetRegisterClass *RC,
MachineFunction &MF) const {
return 0;
}
=20
+ /// Get the weight in units of pressure for this register class.
+ virtual const RegClassWeight &getRegClassWeight(
+ const TargetRegisterClass *RC) const =3D 0;
+
+ /// Get the number of dimensions of register pressure.
+ virtual unsigned getNumRegPressureSets() const =3D 0;
+
+ /// Get the register unit pressure limit for this dimension.
+ /// This limit must be adjusted dynamically for reserved registers.
+ virtual unsigned getRegPressureSetLimit(unsigned Idx) const =3D 0;
+
+ /// Get the dimensions of register pressure impacted by this register cl=
ass.
+ /// Returns a -1 terminated array of pressure set IDs.
+ virtual const int *getRegClassPressureSets(
+ const TargetRegisterClass *RC) const =3D 0;
+
/// getRawAllocationOrder - Returns the register allocation order for a
/// specified register class with a target-dependent hint. The returned =
list
/// may contain reserved registers that cannot be allocated.
///
/// Register allocators need only call this function to resolve
/// target-dependent hints, but it should work without hinting as well.
- virtual ArrayRef<unsigned>
+ virtual ArrayRef<uint16_t>
getRawAllocationOrder(const TargetRegisterClass *RC,
unsigned HintType, unsigned HintReg,
const MachineFunction &MF) const {
@@ -607,22 +636,22 @@
virtual void materializeFrameBaseRegister(MachineBasicBlock *MBB,
unsigned BaseReg, int FrameIdx,
int64_t Offset) const {
- assert(0 && "materializeFrameBaseRegister does not exist on this targe=
t");
+ llvm_unreachable("materializeFrameBaseRegister does not exist on this "
+ "target");
}
=20
/// resolveFrameIndex - Resolve a frame index operand of an instruction
/// to reference the indicated base register plus offset instead.
virtual void resolveFrameIndex(MachineBasicBlock::iterator I,
unsigned BaseReg, int64_t Offset) const {
- assert(0 && "resolveFrameIndex does not exist on this target");
+ llvm_unreachable("resolveFrameIndex does not exist on this target");
}
=20
/// isFrameOffsetLegal - Determine whether a given offset immediate is
/// encodable to resolve a frame index.
virtual bool isFrameOffsetLegal(const MachineInstr *MI,
int64_t Offset) const {
- assert(0 && "isFrameOffsetLegal does not exist on this target");
- return false; // Must return a value in order to compile with VS 2005
+ llvm_unreachable("isFrameOffsetLegal does not exist on this target");
}
=20
/// eliminateCallFramePseudoInstr - This method is called during prolog/=
epilog
@@ -636,7 +665,8 @@
eliminateCallFramePseudoInstr(MachineFunction &MF,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI) const {
- assert(0 && "Call Frame Pseudo Instructions do not exist on this targe=
t!");
+ llvm_unreachable("Call Frame Pseudo Instructions do not exist on this "
+ "target!");
}
=20
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetSelectionDAG.td
--- a/head/contrib/llvm/include/llvm/Target/TargetSelectionDAG.td Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetSelectionDAG.td Tue Apr 1=
7 11:51:51 2012 +0300
@@ -352,6 +352,8 @@
def ctlz : SDNode<"ISD::CTLZ" , SDTIntUnaryOp>;
def cttz : SDNode<"ISD::CTTZ" , SDTIntUnaryOp>;
def ctpop : SDNode<"ISD::CTPOP" , SDTIntUnaryOp>;
+def ctlz_zero_undef : SDNode<"ISD::CTLZ_ZERO_UNDEF", SDTIntUnaryOp>;
+def cttz_zero_undef : SDNode<"ISD::CTTZ_ZERO_UNDEF", SDTIntUnaryOp>;
def sext : SDNode<"ISD::SIGN_EXTEND", SDTIntExtendOp>;
def zext : SDNode<"ISD::ZERO_EXTEND", SDTIntExtendOp>;
def anyext : SDNode<"ISD::ANY_EXTEND" , SDTIntExtendOp>;
@@ -655,6 +657,51 @@
return cast<LoadSDNode>(N)->getMemoryVT() =3D=3D MVT::i32;
}]>;
=20
+def extloadvi1 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
+ return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() =3D=3D MVT::i1;
+}]>;
+def extloadvi8 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
+ return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() =3D=3D MVT::i8;
+}]>;
+def extloadvi16 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
+ return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() =3D=3D MVT::i1=
6;
+}]>;
+def extloadvi32 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
+ return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() =3D=3D MVT::i3=
2;
+}]>;
+def extloadvf32 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
+ return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() =3D=3D MVT::f3=
2;
+}]>;
+def extloadvf64 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
+ return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() =3D=3D MVT::f6=
4;
+}]>;
+
+def sextloadvi1 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
+ return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() =3D=3D MVT::i1;
+}]>;
+def sextloadvi8 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
+ return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() =3D=3D MVT::i8;
+}]>;
+def sextloadvi16 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
+ return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() =3D=3D MVT::i1=
6;
+}]>;
+def sextloadvi32 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
+ return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() =3D=3D MVT::i3=
2;
+}]>;
+
+def zextloadvi1 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
+ return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() =3D=3D MVT::i1;
+}]>;
+def zextloadvi8 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
+ return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() =3D=3D MVT::i8;
+}]>;
+def zextloadvi16 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
+ return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() =3D=3D MVT::i1=
6;
+}]>;
+def zextloadvi32 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
+ return cast<LoadSDNode>(N)->getMemoryVT().getScalarType() =3D=3D MVT::i3=
2;
+}]>;
+
// store fragments.
def unindexedstore : PatFrag<(ops node:$val, node:$ptr),
(st node:$val, node:$ptr), [{
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Target/=
TargetSubtargetInfo.h
--- a/head/contrib/llvm/include/llvm/Target/TargetSubtargetInfo.h Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Target/TargetSubtargetInfo.h Tue Apr 1=
7 11:51:51 2012 +0300
@@ -15,7 +15,7 @@
#define LLVM_TARGET_TARGETSUBTARGETINFO_H
=20
#include "llvm/MC/MCSubtargetInfo.h"
-#include "llvm/Target/TargetMachine.h"
+#include "llvm/Support/CodeGen.h"
=20
namespace llvm {
=20
@@ -39,7 +39,7 @@
// AntiDepBreakMode - Type of anti-dependence breaking that should
// be performed before post-RA scheduling.
typedef enum { ANTIDEP_NONE, ANTIDEP_CRITICAL, ANTIDEP_ALL } AntiDepBrea=
kMode;
- typedef SmallVectorImpl<TargetRegisterClass*> RegClassVector;
+ typedef SmallVectorImpl<const TargetRegisterClass*> RegClassVector;
=20
virtual ~TargetSubtargetInfo();
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Transfo=
rms/IPO.h
--- a/head/contrib/llvm/include/llvm/Transforms/IPO.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/include/llvm/Transforms/IPO.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -94,6 +94,7 @@
/// createAlwaysInlinerPass - Return a new pass object that inlines only=20
/// functions that are marked as "always_inline".
Pass *createAlwaysInlinerPass();
+Pass *createAlwaysInlinerPass(bool InsertLifetime);
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
/// createPruneEHPass - Return a new pass object which transforms invoke
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Transfo=
rms/IPO/InlinerPass.h
--- a/head/contrib/llvm/include/llvm/Transforms/IPO/InlinerPass.h Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Transforms/IPO/InlinerPass.h Tue Apr 1=
7 11:51:51 2012 +0300
@@ -31,7 +31,7 @@
///
struct Inliner : public CallGraphSCCPass {
explicit Inliner(char &ID);
- explicit Inliner(char &ID, int Threshold);
+ explicit Inliner(char &ID, int Threshold, bool InsertLifetime);
=20
/// getAnalysisUsage - For this class, we declare that we require and pr=
eserve
/// the call graph. If the derived class implements this method, it sho=
uld
@@ -65,28 +65,21 @@
///
virtual InlineCost getInlineCost(CallSite CS) =3D 0;
=20
- // getInlineFudgeFactor - Return a > 1.0 factor if the inliner should us=
e a
- // higher threshold to determine if the function call should be inlined.
+ /// removeDeadFunctions - Remove dead functions.
///
- virtual float getInlineFudgeFactor(CallSite CS) =3D 0;
+ /// This also includes a hack in the form of the 'AlwaysInlineOnly' flag
+ /// which restricts it to deleting functions with an 'AlwaysInline'
+ /// attribute. This is useful for the InlineAlways pass that only wants =
to
+ /// deal with that subset of the functions.
+ bool removeDeadFunctions(CallGraph &CG, bool AlwaysInlineOnly =3D false);
=20
- /// resetCachedCostInfo - erase any cached cost data from the derived cl=
ass.
- /// If the derived class has no such data this can be empty.
- ///=20
- virtual void resetCachedCostInfo(Function* Caller) =3D 0;
-
- /// growCachedCostInfo - update the cached cost info for Caller after Ca=
llee
- /// has been inlined.
- virtual void growCachedCostInfo(Function *Caller, Function *Callee) =3D =
0;
-
- /// removeDeadFunctions - Remove dead functions that are not included in
- /// DNR (Do Not Remove) list.
- bool removeDeadFunctions(CallGraph &CG,=20
- SmallPtrSet<const Function *, 16> *DNR =3D NULL=
);
private:
// InlineThreshold - Cache the value here for easy access.
unsigned InlineThreshold;
=20
+ // InsertLifetime - Insert @llvm.lifetime intrinsics.
+ bool InsertLifetime;
+
/// shouldInline - Return true if the inliner should attempt to
/// inline at the given CallSite.
bool shouldInline(CallSite CS);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Transfo=
rms/IPO/PassManagerBuilder.h
--- a/head/contrib/llvm/include/llvm/Transforms/IPO/PassManagerBuilder.h Tu=
e Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Transforms/IPO/PassManagerBuilder.h Tu=
e Apr 17 11:51:51 2012 +0300
@@ -60,6 +60,10 @@
/// out of the frontend.
EP_EarlyAsPossible,
=20
+ /// EP_ModuleOptimizerEarly - This extension point allows adding passes
+ /// just before the main module-level optimization passes.
+ EP_ModuleOptimizerEarly,
+
/// EP_LoopOptimizerEnd - This extension point allows adding loop pass=
es to
/// the end of the loop optimizer.
EP_LoopOptimizerEnd,
@@ -67,7 +71,16 @@
/// EP_ScalarOptimizerLate - This extension point allows adding optimi=
zation
/// passes after most of the main optimizations, but before the last
/// cleanup-ish optimizations.
- EP_ScalarOptimizerLate
+ EP_ScalarOptimizerLate,
+
+ /// EP_OptimizerLast -- This extension point allows adding passes that
+ /// run after everything else.
+ EP_OptimizerLast,
+
+ /// EP_EnabledOnOptLevel0 - This extension point allows adding passes =
that
+ /// should not be disabled by O0 optimization level. The passes will be
+ /// inserted after the inlining pass.
+ EP_EnabledOnOptLevel0
};
=20
/// The Optimization Level - Specify the basic optimization level.
@@ -90,6 +103,7 @@
bool DisableSimplifyLibCalls;
bool DisableUnitAtATime;
bool DisableUnrollLoops;
+ bool Vectorize;
=20
private:
/// ExtensionList - This is list of all of the extensions that are regis=
tered.
@@ -117,8 +131,9 @@
/// populateModulePassManager - This sets up the primary pass manager.
void populateModulePassManager(PassManagerBase &MPM);
void populateLTOPassManager(PassManagerBase &PM, bool Internalize,
- bool RunInliner);
+ bool RunInliner, bool DisableGVNLoadPRE =3D =
false);
};
+
/// Registers a function for adding a standard set of passes. This should=
be
/// used by optimizer plugins to allow all front ends to transparently use
/// them. Create a static instance of this class in your plugin, providin=
g a
@@ -129,5 +144,6 @@
PassManagerBuilder::addGlobalExtension(Ty, Fn);
}
};
+
} // end namespace llvm
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Transfo=
rms/Instrumentation.h
--- a/head/contrib/llvm/include/llvm/Transforms/Instrumentation.h Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Transforms/Instrumentation.h Tue Apr 1=
7 11:51:51 2012 +0300
@@ -17,6 +17,7 @@
namespace llvm {
=20
class ModulePass;
+class FunctionPass;
=20
// Insert edge profiling instrumentation
ModulePass *createEdgeProfilerPass();
@@ -29,7 +30,13 @@
=20
// Insert GCOV profiling instrumentation
ModulePass *createGCOVProfilerPass(bool EmitNotes =3D true, bool EmitData =
=3D true,
- bool Use402Format =3D false);
+ bool Use402Format =3D false,
+ bool UseExtraChecksum =3D false);
+
+// Insert AddressSanitizer (address sanity checking) instrumentation
+ModulePass *createAddressSanitizerPass();
+// Insert ThreadSanitizer (race detection) instrumentation
+FunctionPass *createThreadSanitizerPass();
=20
} // End llvm namespace
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Transfo=
rms/Scalar.h
--- a/head/contrib/llvm/include/llvm/Transforms/Scalar.h Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Transforms/Scalar.h Tue Apr 17 11:51:5=
1 2012 +0300
@@ -112,6 +112,8 @@
//
Pass *createLoopStrengthReducePass(const TargetLowering *TLI =3D 0);
=20
+Pass *createGlobalMergePass(const TargetLowering *TLI =3D 0);
+
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
//
// LoopUnswitch - This pass is a simple loop unswitching pass.
@@ -307,12 +309,6 @@
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
//
-// GEPSplitter - Split complex GEPs into simple ones
-//
-FunctionPass *createGEPSplitterPass();
-
-//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
-//
// Sink - Code Sinking
//
FunctionPass *createSinkingPass();
@@ -331,6 +327,12 @@
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
//
+// ObjCARCAPElim - ObjC ARC autorelease pool elimination.
+//
+Pass *createObjCARCAPElimPass();
+
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+//
// ObjCARCExpand - ObjC ARC preliminary simplifications.
//
Pass *createObjCARCExpandPass();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Transfo=
rms/Utils/BasicBlockUtils.h
--- a/head/contrib/llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h Tue=
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h Tue=
Apr 17 11:51:51 2012 +0300
@@ -173,9 +173,8 @@
/// complicated to handle the case where one of the edges being split
/// is an exit of a loop with other exits).
///
-BasicBlock *SplitBlockPredecessors(BasicBlock *BB, BasicBlock *const *Pred=
s,
- unsigned NumPreds, const char *Suffix,
- Pass *P =3D 0);
+BasicBlock *SplitBlockPredecessors(BasicBlock *BB, ArrayRef<BasicBlock*> P=
reds,
+ const char *Suffix, Pass *P =3D 0);
=20
/// SplitLandingPadPredecessors - This method transforms the landing pad,
/// OrigBB, by introducing two new basic blocks into the function. One of =
those
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Transfo=
rms/Utils/BuildLibCalls.h
--- a/head/contrib/llvm/include/llvm/Transforms/Utils/BuildLibCalls.h Tue A=
pr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Transforms/Utils/BuildLibCalls.h Tue A=
pr 17 11:51:51 2012 +0300
@@ -20,6 +20,7 @@
namespace llvm {
class Value;
class TargetData;
+ class TargetLibraryInfo;
=20
/// CastToCStr - Return V if it is an i8*, otherwise cast it to i8*.
Value *CastToCStr(Value *V, IRBuilder<> &B);
@@ -68,7 +69,7 @@
/// 'Op' and returns one value with the same type. If 'Op' is a long do=
uble,
/// 'l' is added as the suffix of name, if 'Op' is a float, we add a 'f'
/// suffix.
- Value *EmitUnaryFloatFnCall(Value *Op, const char *Name, IRBuilder<> &B,
+ Value *EmitUnaryFloatFnCall(Value *Op, StringRef Name, IRBuilder<> &B,
const AttrListPtr &Attrs);
=20
/// EmitPutChar - Emit a call to the putchar function. This assumes tha=
t Char
@@ -86,12 +87,13 @@
=20
/// EmitFPutS - Emit a call to the puts function. Str is required to be=
a
/// pointer and File is a pointer to FILE.
- void EmitFPutS(Value *Str, Value *File, IRBuilder<> &B, const TargetData=
*TD);
+ void EmitFPutS(Value *Str, Value *File, IRBuilder<> &B, const TargetData=
*TD,
+ const TargetLibraryInfo *TLI);
=20
/// EmitFWrite - Emit a call to the fwrite function. This assumes that =
Ptr is
/// a pointer, Size is an 'intptr_t', and File is a pointer to FILE.
void EmitFWrite(Value *Ptr, Value *Size, Value *File, IRBuilder<> &B,
- const TargetData *TD);
+ const TargetData *TD, const TargetLibraryInfo *TLI);
=20
/// SimplifyFortifiedLibCalls - Helper class for folding checked library
/// calls (e.g. __strcpy_chk) into their unchecked counterparts.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Transfo=
rms/Utils/Cloning.h
--- a/head/contrib/llvm/include/llvm/Transforms/Utils/Cloning.h Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Transforms/Utils/Cloning.h Tue Apr 17 =
11:51:51 2012 +0300
@@ -56,21 +56,13 @@
/// call instruction.
bool ContainsCalls;
=20
- /// ContainsUnwinds - This is set to true if the cloned code contains an
- /// unwind instruction.
- bool ContainsUnwinds;
- =20
/// ContainsDynamicAllocas - This is set to true if the cloned code cont=
ains
/// a 'dynamic' alloca. Dynamic allocas are allocas that are either not=
in
/// the entry block or they are in the entry block but are not a constant
/// size.
bool ContainsDynamicAllocas;
=20
- ClonedCodeInfo() {
- ContainsCalls =3D false;
- ContainsUnwinds =3D false;
- ContainsDynamicAllocas =3D false;
- }
+ ClonedCodeInfo() : ContainsCalls(false), ContainsDynamicAllocas(false) {}
};
=20
=20
@@ -134,8 +126,8 @@
/// Clone OldFunc into NewFunc, transforming the old arguments into refere=
nces
/// to VMap values. Note that if NewFunc already has basic blocks, the on=
es
/// cloned into it will be added to the end of the function. This function
-/// fills in a list of return instructions, and can optionally append the
-/// specified suffix to all values cloned.
+/// fills in a list of return instructions, and can optionally remap types
+/// and/or append the specified suffix to all values cloned.
///
/// If ModuleLevelChanges is false, VMap contains no non-identity GlobalVa=
lue
/// mappings.
@@ -145,7 +137,8 @@
bool ModuleLevelChanges,
SmallVectorImpl<ReturnInst*> &Returns,
const char *NameSuffix =3D "",=20
- ClonedCodeInfo *CodeInfo =3D 0);
+ ClonedCodeInfo *CodeInfo =3D 0,
+ ValueMapTypeRemapper *TypeMapper =3D 0);
=20
/// CloneAndPruneFunctionInto - This works exactly like CloneFunctionInto,
/// except that it does some simple constant prop and DCE on the fly. The
@@ -204,9 +197,9 @@
/// exists in the instruction stream. Similarly this will inline a recurs=
ive
/// function by one level.
///
-bool InlineFunction(CallInst *C, InlineFunctionInfo &IFI);
-bool InlineFunction(InvokeInst *II, InlineFunctionInfo &IFI);
-bool InlineFunction(CallSite CS, InlineFunctionInfo &IFI);
+bool InlineFunction(CallInst *C, InlineFunctionInfo &IFI, bool InsertLifet=
ime =3D true);
+bool InlineFunction(InvokeInst *II, InlineFunctionInfo &IFI, bool InsertLi=
fetime =3D true);
+bool InlineFunction(CallSite CS, InlineFunctionInfo &IFI, bool InsertLifet=
ime =3D true);
=20
} // End llvm namespace
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Transfo=
rms/Utils/SSAUpdater.h
--- a/head/contrib/llvm/include/llvm/Transforms/Utils/SSAUpdater.h Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Transforms/Utils/SSAUpdater.h Tue Apr =
17 11:51:51 2012 +0300
@@ -14,16 +14,18 @@
#ifndef LLVM_TRANSFORMS_UTILS_SSAUPDATER_H
#define LLVM_TRANSFORMS_UTILS_SSAUPDATER_H
=20
+#include "llvm/ADT/StringRef.h"
+
namespace llvm {
- class Value;
class BasicBlock;
- class Use;
- class PHINode;
+ class Instruction;
+ class LoadInst;
template<typename T> class SmallVectorImpl;
template<typename T> class SSAUpdaterTraits;
- class DbgDeclareInst;
- class DIBuilder;
- class BumpPtrAllocator;
+ class PHINode;
+ class Type;
+ class Use;
+ class Value;
=20
/// SSAUpdater - This class updates SSA form for a set of values defined in
/// multiple blocks. This is used when code duplication or another unstru=
ctured
@@ -137,12 +139,7 @@
/// passed into the run method). Clients should implement this with a m=
ore
/// efficient version if possible.
virtual bool isInstInList(Instruction *I,
- const SmallVectorImpl<Instruction*> &Insts) co=
nst {
- for (unsigned i =3D 0, e =3D Insts.size(); i !=3D e; ++i)
- if (Insts[i] =3D=3D I)
- return true;
- return false;
- }
+ const SmallVectorImpl<Instruction*> &Insts) co=
nst;
=20
/// doExtraRewritesBeforeFinalDeletion - This hook is invoked after all =
the
/// stores are found and inserted as available values, but=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Transfo=
rms/Utils/SSAUpdaterImpl.h
--- a/head/contrib/llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h Tue =
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h Tue =
Apr 17 11:51:51 2012 +0300
@@ -15,8 +15,16 @@
#ifndef LLVM_TRANSFORMS_UTILS_SSAUPDATERIMPL_H
#define LLVM_TRANSFORMS_UTILS_SSAUPDATERIMPL_H
=20
+#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/Support/Allocator.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/ValueHandle.h"
+
namespace llvm {
=20
+class CastInst;
+class PHINode;
template<typename T> class SSAUpdaterTraits;
=20
template<typename UpdaterT>
@@ -372,7 +380,7 @@
if (!SomePHI)
break;
if (CheckIfPHIMatches(SomePHI)) {
- RecordMatchingPHI(SomePHI);
+ RecordMatchingPHIs(BlockList);
break;
}
// Match failed: clear all the PHITag values.
@@ -429,38 +437,17 @@
return true;
}
=20
- /// RecordMatchingPHI - For a PHI node that matches, record it and its i=
nput
- /// PHIs in both the BBMap and the AvailableVals mapping.
- void RecordMatchingPHI(PhiT *PHI) {
- SmallVector<PhiT*, 20> WorkList;
- WorkList.push_back(PHI);
-
- // Record this PHI.
- BlkT *BB =3D PHI->getParent();
- ValT PHIVal =3D Traits::GetPHIValue(PHI);
- (*AvailableVals)[BB] =3D PHIVal;
- BBMap[BB]->AvailableVal =3D PHIVal;
-
- while (!WorkList.empty()) {
- PHI =3D WorkList.pop_back_val();
-
- // Iterate through the PHI's incoming values.
- for (typename Traits::PHI_iterator I =3D Traits::PHI_begin(PHI),
- E =3D Traits::PHI_end(PHI); I !=3D E; ++I) {
- ValT IncomingVal =3D I.getIncomingValue();
- PhiT *IncomingPHI =3D Traits::ValueIsPHI(IncomingVal, Updater);
- if (!IncomingPHI) continue;
- BB =3D IncomingPHI->getParent();
- BBInfo *Info =3D BBMap[BB];
- if (!Info || Info->AvailableVal)
- continue;
-
- // Record the PHI and add it to the worklist.
- (*AvailableVals)[BB] =3D IncomingVal;
- Info->AvailableVal =3D IncomingVal;
- WorkList.push_back(IncomingPHI);
+ /// RecordMatchingPHIs - For each PHI node that matches, record it in bo=
th
+ /// the BBMap and the AvailableVals mapping.
+ void RecordMatchingPHIs(BlockListTy *BlockList) {
+ for (typename BlockListTy::iterator I =3D BlockList->begin(),
+ E =3D BlockList->end(); I !=3D E; ++I)
+ if (PhiT *PHI =3D (*I)->PHITag) {
+ BlkT *BB =3D PHI->getParent();
+ ValT PHIVal =3D Traits::GetPHIValue(PHI);
+ (*AvailableVals)[BB] =3D PHIVal;
+ BBMap[BB]->AvailableVal =3D PHIVal;
}
- }
}
};
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Transfo=
rms/Utils/SimplifyIndVar.h
--- a/head/contrib/llvm/include/llvm/Transforms/Utils/SimplifyIndVar.h Tue =
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Transforms/Utils/SimplifyIndVar.h Tue =
Apr 17 11:51:51 2012 +0300
@@ -17,21 +17,23 @@
#define LLVM_TRANSFORMS_UTILS_SIMPLIFYINDVAR_H
=20
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ValueHandle.h"
=20
namespace llvm {
=20
extern cl::opt<bool> DisableIVRewrite;
=20
+class CastInst;
+class IVUsers;
class Loop;
-class LoopInfo;
-class DominatorTree;
+class LPPassManager;
+class PHINode;
class ScalarEvolution;
-class LPPassManager;
-class IVUsers;
=20
/// Interface for visiting interesting IV users that are recognized but not
/// simplified by this utility.
class IVVisitor {
+ virtual void anchor();
public:
virtual ~IVVisitor() {}
virtual void visitCast(CastInst *Cast) =3D 0;
@@ -47,12 +49,6 @@
bool simplifyLoopIVs(Loop *L, ScalarEvolution *SE, LPPassManager *LPM,
SmallVectorImpl<WeakVH> &Dead);
=20
-/// simplifyIVUsers - Simplify instructions recorded by the IVUsers pass.
-/// This is a legacy implementation to reproduce the behavior of the
-/// IndVarSimplify pass prior to DisableIVRewrite.
-bool simplifyIVUsers(IVUsers *IU, ScalarEvolution *SE, LPPassManager *LPM,
- SmallVectorImpl<WeakVH> &Dead);
-
} // namespace llvm
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Transfo=
rms/Utils/UnrollLoop.h
--- a/head/contrib/llvm/include/llvm/Transforms/Utils/UnrollLoop.h Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Transforms/Utils/UnrollLoop.h Tue Apr =
17 11:51:51 2012 +0300
@@ -22,9 +22,12 @@
class LoopInfo;
class LPPassManager;
=20
-bool UnrollLoop(Loop *L, unsigned Count, unsigned TripCount,
+bool UnrollLoop(Loop *L, unsigned Count, unsigned TripCount, bool AllowRun=
time,
unsigned TripMultiple, LoopInfo* LI, LPPassManager* LPM);
=20
+bool UnrollRuntimeLoopProlog(Loop *L, unsigned Count, LoopInfo *LI,
+ LPPassManager* LPM);
+
}
=20
#endif
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Transfo=
rms/Utils/ValueMapper.h
--- a/head/contrib/llvm/include/llvm/Transforms/Utils/ValueMapper.h Tue Apr=
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Transforms/Utils/ValueMapper.h Tue Apr=
17 11:51:51 2012 +0300
@@ -20,7 +20,7 @@
namespace llvm {
class Value;
class Instruction;
- typedef ValueMap<const Value *, TrackingVH<Value> > ValueToValueMapTy;
+ typedef ValueMap<const Value *, WeakVH> ValueToValueMapTy;
=20
/// ValueMapTypeRemapper - This is a class that can be implemented by cl=
ients
/// to remap types when cloning constants and instructions.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Type.h
--- a/head/contrib/llvm/include/llvm/Type.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Type.h Tue Apr 17 11:51:51 2012 +0300
@@ -16,6 +16,7 @@
#define LLVM_TYPE_H
=20
#include "llvm/Support/Casting.h"
+#include "llvm/Support/DataTypes.h"
=20
namespace llvm {
=20
@@ -25,6 +26,7 @@
class Module;
class LLVMContext;
class LLVMContextImpl;
+class StringRef;
template<class GraphType> struct GraphTraits;
=20
/// The instances of the Type class are immutable: once they are created,
@@ -47,23 +49,24 @@
enum TypeID {
// PrimitiveTypes - make sure LastPrimitiveTyID stays up to date.
VoidTyID =3D 0, ///< 0: type with no size
- FloatTyID, ///< 1: 32-bit floating point type
- DoubleTyID, ///< 2: 64-bit floating point type
- X86_FP80TyID, ///< 3: 80-bit floating point type (X87)
- FP128TyID, ///< 4: 128-bit floating point type (112-bit mantiss=
a)
- PPC_FP128TyID, ///< 5: 128-bit floating point type (two 64-bits, Po=
werPC)
- LabelTyID, ///< 6: Labels
- MetadataTyID, ///< 7: Metadata
- X86_MMXTyID, ///< 8: MMX vectors (64 bits, X86 specific)
+ HalfTyID, ///< 1: 16-bit floating point type
+ FloatTyID, ///< 2: 32-bit floating point type
+ DoubleTyID, ///< 3: 64-bit floating point type
+ X86_FP80TyID, ///< 4: 80-bit floating point type (X87)
+ FP128TyID, ///< 5: 128-bit floating point type (112-bit mantiss=
a)
+ PPC_FP128TyID, ///< 6: 128-bit floating point type (two 64-bits, Po=
werPC)
+ LabelTyID, ///< 7: Labels
+ MetadataTyID, ///< 8: Metadata
+ X86_MMXTyID, ///< 9: MMX vectors (64 bits, X86 specific)
=20
// Derived types... see DerivedTypes.h file.
// Make sure FirstDerivedTyID stays up to date!
- IntegerTyID, ///< 9: Arbitrary bit width integers
- FunctionTyID, ///< 10: Functions
- StructTyID, ///< 11: Structures
- ArrayTyID, ///< 12: Arrays
- PointerTyID, ///< 13: Pointers
- VectorTyID, ///< 14: SIMD 'packed' format, or other vector type
+ IntegerTyID, ///< 10: Arbitrary bit width integers
+ FunctionTyID, ///< 11: Functions
+ StructTyID, ///< 12: Structures
+ ArrayTyID, ///< 13: Arrays
+ PointerTyID, ///< 14: Pointers
+ VectorTyID, ///< 15: SIMD 'packed' format, or other vector type
=20
NumTypeIDs, // Must remain as last defined ID
LastPrimitiveTyID =3D X86_MMXTyID,
@@ -74,21 +77,32 @@
/// Context - This refers to the LLVMContext in which this type was uniq=
ued.
LLVMContext &Context;
=20
- TypeID ID : 8; // The current base type of this type.
- unsigned SubclassData : 24; // Space for subclasses to store data
+ // Due to Ubuntu GCC bug 910363:
+ // https://bugs.launchpad.net/ubuntu/+source/gcc-4.5/+bug/910363
+ // Bitpack ID and SubclassData manually.
+ // Note: TypeID : low 8 bit; SubclassData : high 24 bit.
+ uint32_t IDAndSubclassData;
=20
protected:
friend class LLVMContextImpl;
explicit Type(LLVMContext &C, TypeID tid)
- : Context(C), ID(tid), SubclassData(0),
- NumContainedTys(0), ContainedTys(0) {}
+ : Context(C), IDAndSubclassData(0),
+ NumContainedTys(0), ContainedTys(0) {
+ setTypeID(tid);
+ }
~Type() {}
-
- unsigned getSubclassData() const { return SubclassData; }
+ =20
+ void setTypeID(TypeID ID) {
+ IDAndSubclassData =3D (ID & 0xFF) | (IDAndSubclassData & 0xFFFFFF00);
+ assert(getTypeID() =3D=3D ID && "TypeID data too large for field");
+ }
+ =20
+ unsigned getSubclassData() const { return IDAndSubclassData >> 8; }
+ =20
void setSubclassData(unsigned val) {
- SubclassData =3D val;
+ IDAndSubclassData =3D (IDAndSubclassData & 0xFF) | (val << 8);
// Ensure we don't have any accidental truncation.
- assert(SubclassData =3D=3D val && "Subclass data too large for field");
+ assert(getSubclassData() =3D=3D val && "Subclass data too large for fi=
eld");
}
=20
/// NumContainedTys - Keeps track of how many Type*'s there are in the
@@ -116,49 +130,54 @@
/// getTypeID - Return the type id for the type. This will return one
/// of the TypeID enum elements defined above.
///
- TypeID getTypeID() const { return ID; }
+ TypeID getTypeID() const { return (TypeID)(IDAndSubclassData & 0xFF); }
=20
/// isVoidTy - Return true if this is 'void'.
- bool isVoidTy() const { return ID =3D=3D VoidTyID; }
+ bool isVoidTy() const { return getTypeID() =3D=3D VoidTyID; }
+
+ /// isHalfTy - Return true if this is 'half', a 16-bit IEEE fp type.
+ bool isHalfTy() const { return getTypeID() =3D=3D HalfTyID; }
=20
/// isFloatTy - Return true if this is 'float', a 32-bit IEEE fp type.
- bool isFloatTy() const { return ID =3D=3D FloatTyID; }
+ bool isFloatTy() const { return getTypeID() =3D=3D FloatTyID; }
=20
/// isDoubleTy - Return true if this is 'double', a 64-bit IEEE fp type.
- bool isDoubleTy() const { return ID =3D=3D DoubleTyID; }
+ bool isDoubleTy() const { return getTypeID() =3D=3D DoubleTyID; }
=20
/// isX86_FP80Ty - Return true if this is x86 long double.
- bool isX86_FP80Ty() const { return ID =3D=3D X86_FP80TyID; }
+ bool isX86_FP80Ty() const { return getTypeID() =3D=3D X86_FP80TyID; }
=20
/// isFP128Ty - Return true if this is 'fp128'.
- bool isFP128Ty() const { return ID =3D=3D FP128TyID; }
+ bool isFP128Ty() const { return getTypeID() =3D=3D FP128TyID; }
=20
/// isPPC_FP128Ty - Return true if this is powerpc long double.
- bool isPPC_FP128Ty() const { return ID =3D=3D PPC_FP128TyID; }
+ bool isPPC_FP128Ty() const { return getTypeID() =3D=3D PPC_FP128TyID; }
=20
/// isFloatingPointTy - Return true if this is one of the five floating =
point
/// types
bool isFloatingPointTy() const {
- return ID =3D=3D FloatTyID || ID =3D=3D DoubleTyID ||
- ID =3D=3D X86_FP80TyID || ID =3D=3D FP128TyID || ID =3D=3D PPC_FP128=
TyID;
+ return getTypeID() =3D=3D HalfTyID || getTypeID() =3D=3D FloatTyID ||
+ getTypeID() =3D=3D DoubleTyID ||
+ getTypeID() =3D=3D X86_FP80TyID || getTypeID() =3D=3D FP128TyID=
||
+ getTypeID() =3D=3D PPC_FP128TyID;
}
=20
/// isX86_MMXTy - Return true if this is X86 MMX.
- bool isX86_MMXTy() const { return ID =3D=3D X86_MMXTyID; }
+ bool isX86_MMXTy() const { return getTypeID() =3D=3D X86_MMXTyID; }
=20
/// isFPOrFPVectorTy - Return true if this is a FP type or a vector of F=
P.
///
bool isFPOrFPVectorTy() const;
=20
/// isLabelTy - Return true if this is 'label'.
- bool isLabelTy() const { return ID =3D=3D LabelTyID; }
+ bool isLabelTy() const { return getTypeID() =3D=3D LabelTyID; }
=20
/// isMetadataTy - Return true if this is 'metadata'.
- bool isMetadataTy() const { return ID =3D=3D MetadataTyID; }
+ bool isMetadataTy() const { return getTypeID() =3D=3D MetadataTyID; }
=20
/// isIntegerTy - True if this is an instance of IntegerType.
///
- bool isIntegerTy() const { return ID =3D=3D IntegerTyID; }=20
+ bool isIntegerTy() const { return getTypeID() =3D=3D IntegerTyID; }=20
=20
/// isIntegerTy - Return true if this is an IntegerType of the given wid=
th.
bool isIntegerTy(unsigned Bitwidth) const;
@@ -170,23 +189,23 @@
=20
/// isFunctionTy - True if this is an instance of FunctionType.
///
- bool isFunctionTy() const { return ID =3D=3D FunctionTyID; }
+ bool isFunctionTy() const { return getTypeID() =3D=3D FunctionTyID; }
=20
/// isStructTy - True if this is an instance of StructType.
///
- bool isStructTy() const { return ID =3D=3D StructTyID; }
+ bool isStructTy() const { return getTypeID() =3D=3D StructTyID; }
=20
/// isArrayTy - True if this is an instance of ArrayType.
///
- bool isArrayTy() const { return ID =3D=3D ArrayTyID; }
+ bool isArrayTy() const { return getTypeID() =3D=3D ArrayTyID; }
=20
/// isPointerTy - True if this is an instance of PointerType.
///
- bool isPointerTy() const { return ID =3D=3D PointerTyID; }
+ bool isPointerTy() const { return getTypeID() =3D=3D PointerTyID; }
=20
/// isVectorTy - True if this is an instance of VectorType.
///
- bool isVectorTy() const { return ID =3D=3D VectorTyID; }
+ bool isVectorTy() const { return getTypeID() =3D=3D VectorTyID; }
=20
/// canLosslesslyBitCastTo - Return true if this type could be converted=20
/// with a lossless BitCast to type 'Ty'. For example, i8* to i32*. BitC=
asts=20
@@ -202,14 +221,14 @@
/// Here are some useful little methods to query what type derived types=
are
/// Note that all other types can just compare to see if this =3D=3D Typ=
e::xxxTy;
///
- bool isPrimitiveType() const { return ID <=3D LastPrimitiveTyID; }
- bool isDerivedType() const { return ID >=3D FirstDerivedTyID; }
+ bool isPrimitiveType() const { return getTypeID() <=3D LastPrimitiveTyID=
; }
+ bool isDerivedType() const { return getTypeID() >=3D FirstDerivedTyID;=
}
=20
/// isFirstClassType - Return true if the type is "first class", meaning=
it
/// is a valid type for a Value.
///
bool isFirstClassType() const {
- return ID !=3D FunctionTyID && ID !=3D VoidTyID;
+ return getTypeID() !=3D FunctionTyID && getTypeID() !=3D VoidTyID;
}
=20
/// isSingleValueType - Return true if the type is a valid type for a
@@ -217,8 +236,9 @@
/// and array types.
///
bool isSingleValueType() const {
- return (ID !=3D VoidTyID && isPrimitiveType()) ||
- ID =3D=3D IntegerTyID || ID =3D=3D PointerTyID || ID =3D=3D Ve=
ctorTyID;
+ return (getTypeID() !=3D VoidTyID && isPrimitiveType()) ||
+ getTypeID() =3D=3D IntegerTyID || getTypeID() =3D=3D PointerTy=
ID ||
+ getTypeID() =3D=3D VectorTyID;
}
=20
/// isAggregateType - Return true if the type is an aggregate type. This
@@ -227,7 +247,7 @@
/// does not include vector types.
///
bool isAggregateType() const {
- return ID =3D=3D StructTyID || ID =3D=3D ArrayTyID;
+ return getTypeID() =3D=3D StructTyID || getTypeID() =3D=3D ArrayTyID;
}
=20
/// isSized - Return true if it makes sense to take the size of this typ=
e. To
@@ -236,12 +256,14 @@
///
bool isSized() const {
// If it's a primitive, it is always sized.
- if (ID =3D=3D IntegerTyID || isFloatingPointTy() || ID =3D=3D PointerT=
yID ||
- ID =3D=3D X86_MMXTyID)
+ if (getTypeID() =3D=3D IntegerTyID || isFloatingPointTy() ||
+ getTypeID() =3D=3D PointerTyID ||
+ getTypeID() =3D=3D X86_MMXTyID)
return true;
// If it is not something that can have a size (e.g. a function or lab=
el),
// it doesn't have a size.
- if (ID !=3D StructTyID && ID !=3D ArrayTyID && ID !=3D VectorTyID)
+ if (getTypeID() !=3D StructTyID && getTypeID() !=3D ArrayTyID &&
+ getTypeID() !=3D VectorTyID)
return false;
// Otherwise we have to try harder to decide.
return isSizedDerivedType();
@@ -294,6 +316,34 @@
unsigned getNumContainedTypes() const { return NumContainedTys; }
=20
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
+ // Helper methods corresponding to subclass methods. This forces a cast=
to
+ // the specified subclass and calls its accessor. "getVectorNumElements=
" (for
+ // example) is shorthand for cast<VectorType>(Ty)->getNumElements(). Th=
is is
+ // only intended to cover the core methods that are frequently used, hel=
per
+ // methods should not be added here.
+ =20
+ unsigned getIntegerBitWidth() const;
+
+ Type *getFunctionParamType(unsigned i) const;
+ unsigned getFunctionNumParams() const;
+ bool isFunctionVarArg() const;
+ =20
+ StringRef getStructName() const;
+ unsigned getStructNumElements() const;
+ Type *getStructElementType(unsigned N) const;
+ =20
+ Type *getSequentialElementType() const;
+ =20
+ uint64_t getArrayNumElements() const;
+ Type *getArrayElementType() const { return getSequentialElementType(); }
+
+ unsigned getVectorNumElements() const;
+ Type *getVectorElementType() const { return getSequentialElementType(); }
+
+ unsigned getPointerAddressSpace() const;
+ Type *getPointerElementType() const { return getSequentialElementType();=
}
+ =20
+ //=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
// Static members exported by the Type class itself. Useful for getting
// instances of Type.
//
@@ -306,6 +356,7 @@
//
static Type *getVoidTy(LLVMContext &C);
static Type *getLabelTy(LLVMContext &C);
+ static Type *getHalfTy(LLVMContext &C);
static Type *getFloatTy(LLVMContext &C);
static Type *getDoubleTy(LLVMContext &C);
static Type *getMetadataTy(LLVMContext &C);
@@ -324,6 +375,7 @@
// Convenience methods for getting pointer types with one of the above b=
uiltin
// types as pointee.
//
+ static PointerType *getHalfPtrTy(LLVMContext &C, unsigned AS =3D 0);
static PointerType *getFloatPtrTy(LLVMContext &C, unsigned AS =3D 0);
static PointerType *getDoublePtrTy(LLVMContext &C, unsigned AS =3D 0);
static PointerType *getX86_FP80PtrTy(LLVMContext &C, unsigned AS =3D 0);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/User.h
--- a/head/contrib/llvm/include/llvm/User.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/User.h Tue Apr 17 11:51:51 2012 +0300
@@ -19,6 +19,7 @@
#ifndef LLVM_USER_H
#define LLVM_USER_H
=20
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Value.h"
=20
namespace llvm {
@@ -34,6 +35,7 @@
void *operator new(size_t); // Do not implement
template <unsigned>
friend struct HungoffOperandTraits;
+ virtual void anchor();
protected:
/// OperandList - This is a pointer to the array of Uses for this User.
/// For nodes of fixed arity (e.g. a binary operator) this array will li=
ve
@@ -64,11 +66,11 @@
void operator delete(void *Usr);
/// placement delete - required by std, but never called.
void operator delete(void*, unsigned) {
- assert(0 && "Constructor throws?");
+ llvm_unreachable("Constructor throws?");
}
/// placement delete - required by std, but never called.
void operator delete(void*, unsigned, bool) {
- assert(0 && "Constructor throws?");
+ llvm_unreachable("Constructor throws?");
}
protected:
template <int Idx, typename U> static Use &OpFrom(const U *that) {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/include/llvm/Value.h
--- a/head/contrib/llvm/include/llvm/Value.h Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/include/llvm/Value.h Tue Apr 17 11:51:51 2012 +0300
@@ -15,9 +15,7 @@
#define LLVM_VALUE_H
=20
#include "llvm/Use.h"
-#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Casting.h"
-#include <string>
=20
namespace llvm {
=20
@@ -32,8 +30,6 @@
class InlineAsm;
class ValueSymbolTable;
template<typename ValueTy> class StringMapEntry;
-template <typename ValueTy =3D Value>
-class AssertingVH;
typedef StringMapEntry<Value*> ValueName;
class raw_ostream;
class AssemblyAnnotationWriter;
@@ -42,6 +38,7 @@
class Twine;
class MDNode;
class Type;
+class StringRef;
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// Value Class
@@ -110,26 +107,16 @@
/// All values hold a context through their type.
LLVMContext &getContext() const;
=20
- // All values can potentially be named...
- bool hasName() const { return Name !=3D 0; }
+ // All values can potentially be named.
+ bool hasName() const { return Name !=3D 0 && SubclassID !=3D MDStringVal=
; }
ValueName *getValueName() const { return Name; }
+ void setValueName(ValueName *VN) { Name =3D VN; }
=20
/// getName() - Return a constant reference to the value's name. This is=
cheap
/// and guaranteed to return the same reference as long as the value is =
not
/// modified.
- ///
- /// This is currently guaranteed to return a StringRef for which data() =
points
- /// to a valid null terminated string. The use of StringRef.data() is=20
- /// deprecated here, however, and clients should not rely on it. If such=20
- /// behavior is needed, clients should use expensive getNameStr(), or sw=
itch=20
- /// to an interface that does not depend on null termination.
StringRef getName() const;
=20
- /// getNameStr() - Return the name of the specified value, *constructing=
a
- /// string* to hold it. This is guaranteed to construct a string and is=
very
- /// expensive, clients should use getName() unless necessary.
- std::string getNameStr() const;
-
/// setName() - Change the name of the value, choosing a new unique name=
if
/// the provided name is taken.
///
@@ -205,6 +192,8 @@
BlockAddressVal, // This is an instance of BlockAddress
ConstantExprVal, // This is an instance of ConstantExpr
ConstantAggregateZeroVal, // This is an instance of ConstantAggregateZ=
ero
+ ConstantDataArrayVal, // This is an instance of ConstantDataArray
+ ConstantDataVectorVal, // This is an instance of ConstantDataVector
ConstantIntVal, // This is an instance of ConstantInt
ConstantFPVal, // This is an instance of ConstantFP
ConstantArrayVal, // This is an instance of ConstantArray
@@ -273,14 +262,32 @@
return true; // Values are always values.
}
=20
- /// stripPointerCasts - This method strips off any unneeded pointer
- /// casts from the specified value, returning the original uncasted valu=
e.
- /// Note that the returned value has pointer type if the specified value=
does.
+ /// stripPointerCasts - This method strips off any unneeded pointer cast=
s and
+ /// all-zero GEPs from the specified value, returning the original uncas=
ted
+ /// value. If this is called on a non-pointer value, it returns 'this'.
Value *stripPointerCasts();
const Value *stripPointerCasts() const {
return const_cast<Value*>(this)->stripPointerCasts();
}
=20
+ /// stripInBoundsConstantOffsets - This method strips off unneeded point=
er casts and
+ /// all-constant GEPs from the specified value, returning the original
+ /// pointer value. If this is called on a non-pointer value, it returns
+ /// 'this'.
+ Value *stripInBoundsConstantOffsets();
+ const Value *stripInBoundsConstantOffsets() const {
+ return const_cast<Value*>(this)->stripInBoundsConstantOffsets();
+ }
+
+ /// stripInBoundsOffsets - This method strips off unneeded pointer casts=
and
+ /// any in-bounds Offsets from the specified value, returning the origin=
al
+ /// pointer value. If this is called on a non-pointer value, it returns
+ /// 'this'.
+ Value *stripInBoundsOffsets();
+ const Value *stripInBoundsOffsets() const {
+ return const_cast<Value*>(this)->stripInBoundsOffsets();
+ }
+
/// isDereferenceablePointer - Test if this value is always a pointer to
/// allocated and suitably aligned memory for a simple load or store.
bool isDereferenceablePointer() const;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/AliasAn=
alysis.cpp
--- a/head/contrib/llvm/lib/Analysis/AliasAnalysis.cpp Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/AliasAnalysis.cpp Tue Apr 17 11:51:51 =
2012 +0300
@@ -440,3 +440,19 @@
return A->hasNoAliasAttr() || A->hasByValAttr();
return false;
}
+
+/// isKnownNonNull - Return true if we know that the specified value is ne=
ver
+/// null.
+bool llvm::isKnownNonNull(const Value *V) {
+ // Alloca never returns null, malloc might.
+ if (isa<AllocaInst>(V)) return true;
+
+ // A byval argument is never null.
+ if (const Argument *A =3D dyn_cast<Argument>(V))
+ return A->hasByValAttr();
+
+ // Global values are not null unless extern weak.
+ if (const GlobalValue *GV =3D dyn_cast<GlobalValue>(V))
+ return !GV->hasExternalWeakLinkage();
+ return false;
+}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/AliasAn=
alysisCounter.cpp
--- a/head/contrib/llvm/lib/Analysis/AliasAnalysisCounter.cpp Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/AliasAnalysisCounter.cpp Tue Apr 17 11=
:51:51 2012 +0300
@@ -127,9 +127,8 @@
AliasAnalysisCounter::alias(const Location &LocA, const Location &LocB) {
AliasResult R =3D getAnalysis<AliasAnalysis>().alias(LocA, LocB);
=20
- const char *AliasString;
+ const char *AliasString =3D 0;
switch (R) {
- default: llvm_unreachable("Unknown alias type!");
case NoAlias: No++; AliasString =3D "No alias"; break;
case MayAlias: May++; AliasString =3D "May alias"; break;
case PartialAlias: Partial++; AliasString =3D "Partial alias"; break;
@@ -154,9 +153,8 @@
const Location &Loc) {
ModRefResult R =3D getAnalysis<AliasAnalysis>().getModRefInfo(CS, Loc);
=20
- const char *MRString;
+ const char *MRString =3D 0;
switch (R) {
- default: llvm_unreachable("Unknown mod/ref type!");
case NoModRef: NoMR++; MRString =3D "NoModRef"; break;
case Ref: JustRef++; MRString =3D "JustRef"; break;
case Mod: JustMod++; MRString =3D "JustMod"; break;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/AliasAn=
alysisEvaluator.cpp
--- a/head/contrib/llvm/lib/Analysis/AliasAnalysisEvaluator.cpp Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/AliasAnalysisEvaluator.cpp Tue Apr 17 =
11:51:51 2012 +0300
@@ -193,8 +193,6 @@
case AliasAnalysis::MustAlias:
PrintResults("MustAlias", PrintMustAlias, *I1, *I2, F.getParent());
++MustAlias; break;
- default:
- errs() << "Unknown alias query result!\n";
}
}
}
@@ -223,8 +221,6 @@
case AliasAnalysis::ModRef:
PrintModRefResults("Both ModRef", PrintModRef, I, *V, F.getParent(=
));
++ModRef; break;
- default:
- errs() << "Unknown alias query result!\n";
}
}
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/AliasSe=
tTracker.cpp
--- a/head/contrib/llvm/lib/Analysis/AliasSetTracker.cpp Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/AliasSetTracker.cpp Tue Apr 17 11:51:5=
1 2012 +0300
@@ -189,7 +189,9 @@
}
=20
for (iterator I =3D begin(), E =3D end(); I !=3D E; ++I)
- if (AA.getModRefInfo(Inst, I.getPointer(), I.getSize()) !=3D
+ if (AA.getModRefInfo(Inst, AliasAnalysis::Location(I.getPointer(),
+ I.getSize(),
+ I.getTBAAInfo())) !=
=3D
AliasAnalysis::NoModRef)
return true;
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/BasicAl=
iasAnalysis.cpp
--- a/head/contrib/llvm/lib/Analysis/BasicAliasAnalysis.cpp Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/BasicAliasAnalysis.cpp Tue Apr 17 11:5=
1:51 2012 +0300
@@ -42,22 +42,6 @@
// Useful predicates
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
-/// isKnownNonNull - Return true if we know that the specified value is ne=
ver
-/// null.
-static bool isKnownNonNull(const Value *V) {
- // Alloca never returns null, malloc might.
- if (isa<AllocaInst>(V)) return true;
- =20
- // A byval argument is never null.
- if (const Argument *A =3D dyn_cast<Argument>(V))
- return A->hasByValAttr();
-
- // Global values are not null unless extern weak.
- if (const GlobalValue *GV =3D dyn_cast<GlobalValue>(V))
- return !GV->hasExternalWeakLinkage();
- return false;
-}
-
/// isNonEscapingLocalObject - Return true if the pointer is to a function=
-local
/// object that never escapes from the function.
static bool isNonEscapingLocalObject(const Value *V) {
@@ -100,42 +84,59 @@
=20
/// getObjectSize - Return the size of the object specified by V, or
/// UnknownSize if unknown.
-static uint64_t getObjectSize(const Value *V, const TargetData &TD) {
+static uint64_t getObjectSize(const Value *V, const TargetData &TD,
+ bool RoundToAlign =3D false) {
Type *AccessTy;
+ unsigned Align;
if (const GlobalVariable *GV =3D dyn_cast<GlobalVariable>(V)) {
if (!GV->hasDefinitiveInitializer())
return AliasAnalysis::UnknownSize;
AccessTy =3D GV->getType()->getElementType();
+ Align =3D GV->getAlignment();
} else if (const AllocaInst *AI =3D dyn_cast<AllocaInst>(V)) {
if (!AI->isArrayAllocation())
AccessTy =3D AI->getType()->getElementType();
else
return AliasAnalysis::UnknownSize;
+ Align =3D AI->getAlignment();
} else if (const CallInst* CI =3D extractMallocCall(V)) {
- if (!isArrayMalloc(V, &TD))
+ if (!RoundToAlign && !isArrayMalloc(V, &TD))
// The size is the argument to the malloc call.
if (const ConstantInt* C =3D dyn_cast<ConstantInt>(CI->getArgOperand=
(0)))
return C->getZExtValue();
return AliasAnalysis::UnknownSize;
} else if (const Argument *A =3D dyn_cast<Argument>(V)) {
- if (A->hasByValAttr())
+ if (A->hasByValAttr()) {
AccessTy =3D cast<PointerType>(A->getType())->getElementType();
- else
+ Align =3D A->getParamAlignment();
+ } else {
return AliasAnalysis::UnknownSize;
+ }
} else {
return AliasAnalysis::UnknownSize;
}
- =20
- if (AccessTy->isSized())
- return TD.getTypeAllocSize(AccessTy);
- return AliasAnalysis::UnknownSize;
+
+ if (!AccessTy->isSized())
+ return AliasAnalysis::UnknownSize;
+
+ uint64_t Size =3D TD.getTypeAllocSize(AccessTy);
+ // If there is an explicitly specified alignment, and we need to
+ // take alignment into account, round up the size. (If the alignment
+ // is implicit, getTypeAllocSize is sufficient.)
+ if (RoundToAlign && Align)
+ Size =3D RoundUpToAlignment(Size, Align);
+
+ return Size;
}
=20
/// isObjectSmallerThan - Return true if we can prove that the object spec=
ified
/// by V is smaller than Size.
static bool isObjectSmallerThan(const Value *V, uint64_t Size,
const TargetData &TD) {
- uint64_t ObjectSize =3D getObjectSize(V, TD);
+ // This function needs to use the aligned object size because we allow
+ // reads a bit past the end given sufficient alignment.
+ uint64_t ObjectSize =3D getObjectSize(V, TD, /*RoundToAlign*/true);
+ =20
return ObjectSize !=3D AliasAnalysis::UnknownSize && ObjectSize < Size;
}
=20
@@ -706,8 +707,7 @@
// pointer were passed to arguments that were neither of these, then=
it
// couldn't be no-capture.
if (!(*CI)->getType()->isPointerTy() ||
- (!CS.paramHasAttr(ArgNo+1, Attribute::NoCapture) &&
- !CS.paramHasAttr(ArgNo+1, Attribute::ByVal)))
+ (!CS.doesNotCapture(ArgNo) && !CS.isByValArgument(ArgNo)))
continue;
=20
// If this is a no-capture pointer argument, see if we can tell that=
it
@@ -978,10 +978,7 @@
//
// TODO: Returning PartialAlias instead of MayAlias is a mild hack; the
// practical effect of this is protecting TBAA in the case of dynamic
- // indices into arrays of unions. An alternative way to solve this would
- // be to have clang emit extra metadata for unions and/or union accesses.
- // A union-specific solution wouldn't handle the problem for malloc'd
- // memory however.
+ // indices into arrays of unions or malloc'd memory.
return PartialAlias;
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/BlockFr=
equencyInfo.cpp
--- a/head/contrib/llvm/lib/Analysis/BlockFrequencyInfo.cpp Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/BlockFrequencyInfo.cpp Tue Apr 17 11:5=
1:51 2012 +0300
@@ -58,6 +58,6 @@
/// that we should not rely on the value itself, but only on the compariso=
n to
/// the other block frequencies. We do this to avoid using of floating poi=
nts.
///
-BlockFrequency BlockFrequencyInfo::getBlockFreq(BasicBlock *BB) const {
+BlockFrequency BlockFrequencyInfo::getBlockFreq(const BasicBlock *BB) cons=
t {
return BFI->getBlockFreq(BB);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/BranchP=
robabilityInfo.cpp
--- a/head/contrib/llvm/lib/Analysis/BranchProbabilityInfo.cpp Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/BranchProbabilityInfo.cpp Tue Apr 17 1=
1:51:51 2012 +0300
@@ -12,11 +12,14 @@
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
#include "llvm/Constants.h"
+#include "llvm/Function.h"
#include "llvm/Instructions.h"
#include "llvm/LLVMContext.h"
#include "llvm/Metadata.h"
#include "llvm/Analysis/BranchProbabilityInfo.h"
#include "llvm/Analysis/LoopInfo.h"
+#include "llvm/ADT/PostOrderIterator.h"
+#include "llvm/Support/CFG.h"
#include "llvm/Support/Debug.h"
=20
using namespace llvm;
@@ -29,121 +32,118 @@
=20
char BranchProbabilityInfo::ID =3D 0;
=20
-namespace {
-// Please note that BranchProbabilityAnalysis is not a FunctionPass.
-// It is created by BranchProbabilityInfo (which is a FunctionPass), which
-// provides a clear interface. Thanks to that, all heuristics and other
-// private methods are hidden in the .cpp file.
-class BranchProbabilityAnalysis {
+// Weights are for internal use only. They are used by heuristics to help =
to
+// estimate edges' probability. Example:
+//
+// Using "Loop Branch Heuristics" we predict weights of edges for the
+// block BB2.
+// ...
+// |
+// V
+// BB1<-+
+// | |
+// | | (Weight =3D 124)
+// V |
+// BB2--+
+// |
+// | (Weight =3D 4)
+// V
+// BB3
+//
+// Probability of the edge BB2->BB1 =3D 124 / (124 + 4) =3D 0.96875
+// Probability of the edge BB2->BB3 =3D 4 / (124 + 4) =3D 0.03125
+static const uint32_t LBH_TAKEN_WEIGHT =3D 124;
+static const uint32_t LBH_NONTAKEN_WEIGHT =3D 4;
=20
- typedef std::pair<const BasicBlock *, const BasicBlock *> Edge;
+/// \brief Unreachable-terminating branch taken weight.
+///
+/// This is the weight for a branch being taken to a block that terminates
+/// (eventually) in unreachable. These are predicted as unlikely as possib=
le.
+static const uint32_t UR_TAKEN_WEIGHT =3D 1;
=20
- DenseMap<Edge, uint32_t> *Weights;
+/// \brief Unreachable-terminating branch not-taken weight.
+///
+/// This is the weight for a branch not being taken toward a block that
+/// terminates (eventually) in unreachable. Such a branch is essentially n=
ever
+/// taken. Set the weight to an absurdly high value so that nested loops d=
on't
+/// easily subsume it.
+static const uint32_t UR_NONTAKEN_WEIGHT =3D 1024*1024 - 1;
=20
- BranchProbabilityInfo *BP;
+static const uint32_t PH_TAKEN_WEIGHT =3D 20;
+static const uint32_t PH_NONTAKEN_WEIGHT =3D 12;
=20
- LoopInfo *LI;
+static const uint32_t ZH_TAKEN_WEIGHT =3D 20;
+static const uint32_t ZH_NONTAKEN_WEIGHT =3D 12;
=20
+static const uint32_t FPH_TAKEN_WEIGHT =3D 20;
+static const uint32_t FPH_NONTAKEN_WEIGHT =3D 12;
=20
- // Weights are for internal use only. They are used by heuristics to hel=
p to
- // estimate edges' probability. Example:
- //
- // Using "Loop Branch Heuristics" we predict weights of edges for the
- // block BB2.
- // ...
- // |
- // V
- // BB1<-+
- // | |
- // | | (Weight =3D 124)
- // V |
- // BB2--+
- // |
- // | (Weight =3D 4)
- // V
- // BB3
- //
- // Probability of the edge BB2->BB1 =3D 124 / (124 + 4) =3D 0.96875
- // Probability of the edge BB2->BB3 =3D 4 / (124 + 4) =3D 0.03125
+// Standard weight value. Used when none of the heuristics set weight for
+// the edge.
+static const uint32_t NORMAL_WEIGHT =3D 16;
=20
- static const uint32_t LBH_TAKEN_WEIGHT =3D 124;
- static const uint32_t LBH_NONTAKEN_WEIGHT =3D 4;
+// Minimum weight of an edge. Please note, that weight is NEVER 0.
+static const uint32_t MIN_WEIGHT =3D 1;
=20
- static const uint32_t RH_TAKEN_WEIGHT =3D 24;
- static const uint32_t RH_NONTAKEN_WEIGHT =3D 8;
+static uint32_t getMaxWeightFor(BasicBlock *BB) {
+ return UINT32_MAX / BB->getTerminator()->getNumSuccessors();
+}
=20
- static const uint32_t PH_TAKEN_WEIGHT =3D 20;
- static const uint32_t PH_NONTAKEN_WEIGHT =3D 12;
=20
- static const uint32_t ZH_TAKEN_WEIGHT =3D 20;
- static const uint32_t ZH_NONTAKEN_WEIGHT =3D 12;
-
- // Standard weight value. Used when none of the heuristics set weight for
- // the edge.
- static const uint32_t NORMAL_WEIGHT =3D 16;
-
- // Minimum weight of an edge. Please note, that weight is NEVER 0.
- static const uint32_t MIN_WEIGHT =3D 1;
-
- // Return TRUE if BB leads directly to a Return Instruction.
- static bool isReturningBlock(BasicBlock *BB) {
- SmallPtrSet<BasicBlock *, 8> Visited;
-
- while (true) {
- TerminatorInst *TI =3D BB->getTerminator();
- if (isa<ReturnInst>(TI))
- return true;
-
- if (TI->getNumSuccessors() > 1)
- break;
-
- // It is unreachable block which we can consider as a return instruc=
tion.
- if (TI->getNumSuccessors() =3D=3D 0)
- return true;
-
- Visited.insert(BB);
- BB =3D TI->getSuccessor(0);
-
- // Stop if cycle is detected.
- if (Visited.count(BB))
- return false;
- }
-
+/// \brief Calculate edge weights for successors lead to unreachable.
+///
+/// Predict that a successor which leads necessarily to an
+/// unreachable-terminated block as extremely unlikely.
+bool BranchProbabilityInfo::calcUnreachableHeuristics(BasicBlock *BB) {
+ TerminatorInst *TI =3D BB->getTerminator();
+ if (TI->getNumSuccessors() =3D=3D 0) {
+ if (isa<UnreachableInst>(TI))
+ PostDominatedByUnreachable.insert(BB);
return false;
}
=20
- uint32_t getMaxWeightFor(BasicBlock *BB) const {
- return UINT32_MAX / BB->getTerminator()->getNumSuccessors();
+ SmallPtrSet<BasicBlock *, 4> UnreachableEdges;
+ SmallPtrSet<BasicBlock *, 4> ReachableEdges;
+
+ for (succ_iterator I =3D succ_begin(BB), E =3D succ_end(BB); I !=3D E; +=
+I) {
+ if (PostDominatedByUnreachable.count(*I))
+ UnreachableEdges.insert(*I);
+ else
+ ReachableEdges.insert(*I);
}
=20
-public:
- BranchProbabilityAnalysis(DenseMap<Edge, uint32_t> *W,
- BranchProbabilityInfo *BP, LoopInfo *LI)
- : Weights(W), BP(BP), LI(LI) {
- }
+ // If all successors are in the set of blocks post-dominated by unreacha=
ble,
+ // this block is too.
+ if (UnreachableEdges.size() =3D=3D TI->getNumSuccessors())
+ PostDominatedByUnreachable.insert(BB);
=20
- // Metadata Weights
- bool calcMetadataWeights(BasicBlock *BB);
+ // Skip probabilities if this block has a single successor or if all were
+ // reachable.
+ if (TI->getNumSuccessors() =3D=3D 1 || UnreachableEdges.empty())
+ return false;
=20
- // Return Heuristics
- bool calcReturnHeuristics(BasicBlock *BB);
+ uint32_t UnreachableWeight =3D
+ std::max(UR_TAKEN_WEIGHT / UnreachableEdges.size(), MIN_WEIGHT);
+ for (SmallPtrSet<BasicBlock *, 4>::iterator I =3D UnreachableEdges.begin=
(),
+ E =3D UnreachableEdges.end();
+ I !=3D E; ++I)
+ setEdgeWeight(BB, *I, UnreachableWeight);
=20
- // Pointer Heuristics
- bool calcPointerHeuristics(BasicBlock *BB);
+ if (ReachableEdges.empty())
+ return true;
+ uint32_t ReachableWeight =3D
+ std::max(UR_NONTAKEN_WEIGHT / ReachableEdges.size(), NORMAL_WEIGHT);
+ for (SmallPtrSet<BasicBlock *, 4>::iterator I =3D ReachableEdges.begin(),
+ E =3D ReachableEdges.end();
+ I !=3D E; ++I)
+ setEdgeWeight(BB, *I, ReachableWeight);
=20
- // Loop Branch Heuristics
- bool calcLoopBranchHeuristics(BasicBlock *BB);
-
- // Zero Heurestics
- bool calcZeroHeuristics(BasicBlock *BB);
-
- bool runOnFunction(Function &F);
-};
-} // end anonymous namespace
+ return true;
+}
=20
// Propagate existing explicit probabilities from either profile data or
// 'expect' intrinsic processing.
-bool BranchProbabilityAnalysis::calcMetadataWeights(BasicBlock *BB) {
+bool BranchProbabilityInfo::calcMetadataWeights(BasicBlock *BB) {
TerminatorInst *TI =3D BB->getTerminator();
if (TI->getNumSuccessors() =3D=3D 1)
return false;
@@ -174,54 +174,14 @@
}
assert(Weights.size() =3D=3D TI->getNumSuccessors() && "Checked above");
for (unsigned i =3D 0, e =3D TI->getNumSuccessors(); i !=3D e; ++i)
- BP->setEdgeWeight(BB, TI->getSuccessor(i), Weights[i]);
+ setEdgeWeight(BB, TI->getSuccessor(i), Weights[i]);
=20
return true;
}
=20
-// Calculate Edge Weights using "Return Heuristics". Predict a successor w=
hich
-// leads directly to Return Instruction will not be taken.
-bool BranchProbabilityAnalysis::calcReturnHeuristics(BasicBlock *BB){
- if (BB->getTerminator()->getNumSuccessors() =3D=3D 1)
- return false;
-
- SmallPtrSet<BasicBlock *, 4> ReturningEdges;
- SmallPtrSet<BasicBlock *, 4> StayEdges;
-
- for (succ_iterator I =3D succ_begin(BB), E =3D succ_end(BB); I !=3D E; +=
+I) {
- BasicBlock *Succ =3D *I;
- if (isReturningBlock(Succ))
- ReturningEdges.insert(Succ);
- else
- StayEdges.insert(Succ);
- }
-
- if (uint32_t numStayEdges =3D StayEdges.size()) {
- uint32_t stayWeight =3D RH_TAKEN_WEIGHT / numStayEdges;
- if (stayWeight < NORMAL_WEIGHT)
- stayWeight =3D NORMAL_WEIGHT;
-
- for (SmallPtrSet<BasicBlock *, 4>::iterator I =3D StayEdges.begin(),
- E =3D StayEdges.end(); I !=3D E; ++I)
- BP->setEdgeWeight(BB, *I, stayWeight);
- }
-
- if (uint32_t numRetEdges =3D ReturningEdges.size()) {
- uint32_t retWeight =3D RH_NONTAKEN_WEIGHT / numRetEdges;
- if (retWeight < MIN_WEIGHT)
- retWeight =3D MIN_WEIGHT;
- for (SmallPtrSet<BasicBlock *, 4>::iterator I =3D ReturningEdges.begin=
(),
- E =3D ReturningEdges.end(); I !=3D E; ++I) {
- BP->setEdgeWeight(BB, *I, retWeight);
- }
- }
-
- return ReturningEdges.size() > 0;
-}
-
// Calculate Edge Weights using "Pointer Heuristics". Predict a comparsion
// between two pointer or pointer and NULL will fail.
-bool BranchProbabilityAnalysis::calcPointerHeuristics(BasicBlock *BB) {
+bool BranchProbabilityInfo::calcPointerHeuristics(BasicBlock *BB) {
BranchInst * BI =3D dyn_cast<BranchInst>(BB->getTerminator());
if (!BI || !BI->isConditional())
return false;
@@ -249,16 +209,14 @@
if (!isProb)
std::swap(Taken, NonTaken);
=20
- BP->setEdgeWeight(BB, Taken, PH_TAKEN_WEIGHT);
- BP->setEdgeWeight(BB, NonTaken, PH_NONTAKEN_WEIGHT);
+ setEdgeWeight(BB, Taken, PH_TAKEN_WEIGHT);
+ setEdgeWeight(BB, NonTaken, PH_NONTAKEN_WEIGHT);
return true;
}
=20
// Calculate Edge Weights using "Loop Branch Heuristics". Predict backedges
// as taken, exiting edges as not-taken.
-bool BranchProbabilityAnalysis::calcLoopBranchHeuristics(BasicBlock *BB) {
- uint32_t numSuccs =3D BB->getTerminator()->getNumSuccessors();
-
+bool BranchProbabilityInfo::calcLoopBranchHeuristics(BasicBlock *BB) {
Loop *L =3D LI->getLoopFor(BB);
if (!L)
return false;
@@ -267,17 +225,13 @@
SmallPtrSet<BasicBlock *, 8> ExitingEdges;
SmallPtrSet<BasicBlock *, 8> InEdges; // Edges from header to the loop.
=20
- bool isHeader =3D BB =3D=3D L->getHeader();
-
for (succ_iterator I =3D succ_begin(BB), E =3D succ_end(BB); I !=3D E; +=
+I) {
- BasicBlock *Succ =3D *I;
- Loop *SuccL =3D LI->getLoopFor(Succ);
- if (SuccL !=3D L)
- ExitingEdges.insert(Succ);
- else if (Succ =3D=3D L->getHeader())
- BackEdges.insert(Succ);
- else if (isHeader)
- InEdges.insert(Succ);
+ if (!L->contains(*I))
+ ExitingEdges.insert(*I);
+ else if (L->getHeader() =3D=3D *I)
+ BackEdges.insert(*I);
+ else
+ InEdges.insert(*I);
}
=20
if (uint32_t numBackEdges =3D BackEdges.size()) {
@@ -288,7 +242,7 @@
for (SmallPtrSet<BasicBlock *, 8>::iterator EI =3D BackEdges.begin(),
EE =3D BackEdges.end(); EI !=3D EE; ++EI) {
BasicBlock *Back =3D *EI;
- BP->setEdgeWeight(BB, Back, backWeight);
+ setEdgeWeight(BB, Back, backWeight);
}
}
=20
@@ -300,27 +254,26 @@
for (SmallPtrSet<BasicBlock *, 8>::iterator EI =3D InEdges.begin(),
EE =3D InEdges.end(); EI !=3D EE; ++EI) {
BasicBlock *Back =3D *EI;
- BP->setEdgeWeight(BB, Back, inWeight);
+ setEdgeWeight(BB, Back, inWeight);
}
}
=20
- uint32_t numExitingEdges =3D ExitingEdges.size();
- if (uint32_t numNonExitingEdges =3D numSuccs - numExitingEdges) {
- uint32_t exitWeight =3D LBH_NONTAKEN_WEIGHT / numNonExitingEdges;
+ if (uint32_t numExitingEdges =3D ExitingEdges.size()) {
+ uint32_t exitWeight =3D LBH_NONTAKEN_WEIGHT / numExitingEdges;
if (exitWeight < MIN_WEIGHT)
exitWeight =3D MIN_WEIGHT;
=20
for (SmallPtrSet<BasicBlock *, 8>::iterator EI =3D ExitingEdges.begin(=
),
EE =3D ExitingEdges.end(); EI !=3D EE; ++EI) {
BasicBlock *Exiting =3D *EI;
- BP->setEdgeWeight(BB, Exiting, exitWeight);
+ setEdgeWeight(BB, Exiting, exitWeight);
}
}
=20
return true;
}
=20
-bool BranchProbabilityAnalysis::calcZeroHeuristics(BasicBlock *BB) {
+bool BranchProbabilityInfo::calcZeroHeuristics(BasicBlock *BB) {
BranchInst * BI =3D dyn_cast<BranchInst>(BB->getTerminator());
if (!BI || !BI->isConditional())
return false;
@@ -375,45 +328,94 @@
if (!isProb)
std::swap(Taken, NonTaken);
=20
- BP->setEdgeWeight(BB, Taken, ZH_TAKEN_WEIGHT);
- BP->setEdgeWeight(BB, NonTaken, ZH_NONTAKEN_WEIGHT);
+ setEdgeWeight(BB, Taken, ZH_TAKEN_WEIGHT);
+ setEdgeWeight(BB, NonTaken, ZH_NONTAKEN_WEIGHT);
=20
return true;
}
=20
+bool BranchProbabilityInfo::calcFloatingPointHeuristics(BasicBlock *BB) {
+ BranchInst *BI =3D dyn_cast<BranchInst>(BB->getTerminator());
+ if (!BI || !BI->isConditional())
+ return false;
=20
-bool BranchProbabilityAnalysis::runOnFunction(Function &F) {
+ Value *Cond =3D BI->getCondition();
+ FCmpInst *FCmp =3D dyn_cast<FCmpInst>(Cond);
+ if (!FCmp)
+ return false;
=20
- for (Function::iterator I =3D F.begin(), E =3D F.end(); I !=3D E; ) {
- BasicBlock *BB =3D I++;
-
- if (calcMetadataWeights(BB))
- continue;
-
- if (calcLoopBranchHeuristics(BB))
- continue;
-
- if (calcReturnHeuristics(BB))
- continue;
-
- if (calcPointerHeuristics(BB))
- continue;
-
- calcZeroHeuristics(BB);
+ bool isProb;
+ if (FCmp->isEquality()) {
+ // f1 =3D=3D f2 -> Unlikely
+ // f1 !=3D f2 -> Likely
+ isProb =3D !FCmp->isTrueWhenEqual();
+ } else if (FCmp->getPredicate() =3D=3D FCmpInst::FCMP_ORD) {
+ // !isnan -> Likely
+ isProb =3D true;
+ } else if (FCmp->getPredicate() =3D=3D FCmpInst::FCMP_UNO) {
+ // isnan -> Unlikely
+ isProb =3D false;
+ } else {
+ return false;
}
=20
+ BasicBlock *Taken =3D BI->getSuccessor(0);
+ BasicBlock *NonTaken =3D BI->getSuccessor(1);
+
+ if (!isProb)
+ std::swap(Taken, NonTaken);
+
+ setEdgeWeight(BB, Taken, FPH_TAKEN_WEIGHT);
+ setEdgeWeight(BB, NonTaken, FPH_NONTAKEN_WEIGHT);
+
+ return true;
+}
+
+void BranchProbabilityInfo::getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.addRequired<LoopInfo>();
+ AU.setPreservesAll();
+}
+
+bool BranchProbabilityInfo::runOnFunction(Function &F) {
+ LastF =3D &F; // Store the last function we ran on for printing.
+ LI =3D &getAnalysis<LoopInfo>();
+ assert(PostDominatedByUnreachable.empty());
+
+ // Walk the basic blocks in post-order so that we can build up state abo=
ut
+ // the successors of a block iteratively.
+ for (po_iterator<BasicBlock *> I =3D po_begin(&F.getEntryBlock()),
+ E =3D po_end(&F.getEntryBlock());
+ I !=3D E; ++I) {
+ DEBUG(dbgs() << "Computing probabilities for " << I->getName() << "\n"=
);
+ if (calcUnreachableHeuristics(*I))
+ continue;
+ if (calcMetadataWeights(*I))
+ continue;
+ if (calcLoopBranchHeuristics(*I))
+ continue;
+ if (calcPointerHeuristics(*I))
+ continue;
+ if (calcZeroHeuristics(*I))
+ continue;
+ calcFloatingPointHeuristics(*I);
+ }
+
+ PostDominatedByUnreachable.clear();
return false;
}
=20
-void BranchProbabilityInfo::getAnalysisUsage(AnalysisUsage &AU) const {
- AU.addRequired<LoopInfo>();
- AU.setPreservesAll();
-}
-
-bool BranchProbabilityInfo::runOnFunction(Function &F) {
- LoopInfo &LI =3D getAnalysis<LoopInfo>();
- BranchProbabilityAnalysis BPA(&Weights, this, &LI);
- return BPA.runOnFunction(F);
+void BranchProbabilityInfo::print(raw_ostream &OS, const Module *) const {
+ OS << "---- Branch Probabilities ----\n";
+ // We print the probabilities from the last function the analysis ran ov=
er,
+ // or the function it is currently running over.
+ assert(LastF && "Cannot print prior to running over a function");
+ for (Function::const_iterator BI =3D LastF->begin(), BE =3D LastF->end();
+ BI !=3D BE; ++BI) {
+ for (succ_const_iterator SI =3D succ_begin(BI), SE =3D succ_end(BI);
+ SI !=3D SE; ++SI) {
+ printEdgeProbability(OS << " ", BI, *SI);
+ }
+ }
}
=20
uint32_t BranchProbabilityInfo::getSumForBlock(const BasicBlock *BB) const=
{
@@ -434,12 +436,8 @@
bool BranchProbabilityInfo::
isEdgeHot(const BasicBlock *Src, const BasicBlock *Dst) const {
// Hot probability is at least 4/5 =3D 80%
- uint32_t Weight =3D getEdgeWeight(Src, Dst);
- uint32_t Sum =3D getSumForBlock(Src);
-
- // FIXME: Implement BranchProbability::compare then change this code to
- // compare this BranchProbability against a static "hot" BranchProbabili=
ty.
- return (uint64_t)Weight * 5 > (uint64_t)Sum * 4;
+ // FIXME: Compare against a static "hot" BranchProbability.
+ return getEdgeProbability(Src, Dst) > BranchProbability(4, 5);
}
=20
BasicBlock *BranchProbabilityInfo::getHotSucc(BasicBlock *BB) const {
@@ -461,8 +459,8 @@
}
}
=20
- // FIXME: Use BranchProbability::compare.
- if ((uint64_t)MaxWeight * 5 > (uint64_t)Sum * 4)
+ // Hot probability is at least 4/5 =3D 80%
+ if (BranchProbability(MaxWeight, Sum) > BranchProbability(4, 5))
return MaxSucc;
=20
return 0;
@@ -483,8 +481,8 @@
void BranchProbabilityInfo::
setEdgeWeight(const BasicBlock *Src, const BasicBlock *Dst, uint32_t Weigh=
t) {
Weights[std::make_pair(Src, Dst)] =3D Weight;
- DEBUG(dbgs() << "set edge " << Src->getNameStr() << " -> "
- << Dst->getNameStr() << " weight to " << Weight
+ DEBUG(dbgs() << "set edge " << Src->getName() << " -> "
+ << Dst->getName() << " weight to " << Weight
<< (isEdgeHot(Src, Dst) ? " [is HOT now]\n" : "\n"));
}
=20
@@ -499,11 +497,12 @@
}
=20
raw_ostream &
-BranchProbabilityInfo::printEdgeProbability(raw_ostream &OS, BasicBlock *S=
rc,
- BasicBlock *Dst) const {
+BranchProbabilityInfo::printEdgeProbability(raw_ostream &OS,
+ const BasicBlock *Src,
+ const BasicBlock *Dst) const {
=20
const BranchProbability Prob =3D getEdgeProbability(Src, Dst);
- OS << "edge " << Src->getNameStr() << " -> " << Dst->getNameStr()
+ OS << "edge " << Src->getName() << " -> " << Dst->getName()
<< " probability is " << Prob
<< (isEdgeHot(Src, Dst) ? " [HOT edge]\n" : "\n");
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/CFGPrin=
ter.cpp
--- a/head/contrib/llvm/lib/Analysis/CFGPrinter.cpp Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/lib/Analysis/CFGPrinter.cpp Tue Apr 17 11:51:51 201=
2 +0300
@@ -77,7 +77,7 @@
}
=20
virtual bool runOnFunction(Function &F) {
- std::string Filename =3D "cfg." + F.getNameStr() + ".dot";
+ std::string Filename =3D "cfg." + F.getName().str() + ".dot";
errs() << "Writing '" << Filename << "'...";
=20
std::string ErrorInfo;
@@ -111,7 +111,7 @@
}
=20
virtual bool runOnFunction(Function &F) {
- std::string Filename =3D "cfg." + F.getNameStr() + ".dot";
+ std::string Filename =3D "cfg." + F.getName().str() + ".dot";
errs() << "Writing '" << Filename << "'...";
=20
std::string ErrorInfo;
@@ -143,7 +143,7 @@
/// being a 'dot' and 'gv' program in your path.
///
void Function::viewCFG() const {
- ViewGraph(this, "cfg" + getNameStr());
+ ViewGraph(this, "cfg" + getName());
}
=20
/// viewCFGOnly - This function is meant for use from the debugger. It wo=
rks
@@ -152,7 +152,7 @@
/// his can make the graph smaller.
///
void Function::viewCFGOnly() const {
- ViewGraph(this, "cfg" + getNameStr(), true);
+ ViewGraph(this, "cfg" + getName(), true);
}
=20
FunctionPass *llvm::createCFGPrinterPass () {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/Capture=
Tracking.cpp
--- a/head/contrib/llvm/lib/Analysis/CaptureTracking.cpp Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/CaptureTracking.cpp Tue Apr 17 11:51:5=
1 2012 +0300
@@ -16,25 +16,35 @@
//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
-#include "llvm/Analysis/CaptureTracking.h"
-#include "llvm/Constants.h"
-#include "llvm/Instructions.h"
-#include "llvm/Value.h"
-#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
-#include "llvm/Support/CallSite.h"
+#include "llvm/Analysis/CaptureTracking.h"
using namespace llvm;
=20
-/// As its comment mentions, PointerMayBeCaptured can be expensive.
-/// However, it's not easy for BasicAA to cache the result, because
-/// it's an ImmutablePass. To work around this, bound queries at a
-/// fixed number of uses.
-///
-/// TODO: Write a new FunctionPass AliasAnalysis so that it can keep
-/// a cache. Then we can move the code from BasicAliasAnalysis into
-/// that path, and remove this threshold.
-static int const Threshold =3D 20;
+CaptureTracker::~CaptureTracker() {}
+
+namespace {
+ struct SimpleCaptureTracker : public CaptureTracker {
+ explicit SimpleCaptureTracker(bool ReturnCaptures)
+ : ReturnCaptures(ReturnCaptures), Captured(false) {}
+
+ void tooManyUses() { Captured =3D true; }
+
+ bool shouldExplore(Use *U) { return true; }
+
+ bool captured(Use *U) {
+ if (isa<ReturnInst>(U->getUser()) && !ReturnCaptures)
+ return false;
+
+ Captured =3D true;
+ return true;
+ }
+
+ bool ReturnCaptures;
+
+ bool Captured;
+ };
+}
=20
/// PointerMayBeCaptured - Return true if this pointer value may be captur=
ed
/// by the enclosing function (which is required to exist). This routine =
can
@@ -45,6 +55,26 @@
/// counts as capturing it or not.
bool llvm::PointerMayBeCaptured(const Value *V,
bool ReturnCaptures, bool StoreCaptures) {
+ assert(!isa<GlobalValue>(V) &&
+ "It doesn't make sense to ask whether a global is captured.");
+
+ // TODO: If StoreCaptures is not true, we could do Fancy analysis
+ // to determine whether this store is not actually an escape point.
+ // In that case, BasicAliasAnalysis should be updated as well to
+ // take advantage of this.
+ (void)StoreCaptures;
+
+ SimpleCaptureTracker SCT(ReturnCaptures);
+ PointerMayBeCaptured(V, &SCT);
+ return SCT.Captured;
+}
+
+/// TODO: Write a new FunctionPass AliasAnalysis so that it can keep
+/// a cache. Then we can move the code from BasicAliasAnalysis into
+/// that path, and remove this threshold.
+static int const Threshold =3D 20;
+
+void llvm::PointerMayBeCaptured(const Value *V, CaptureTracker *Tracker) {
assert(V->getType()->isPointerTy() && "Capture is for pointers only!");
SmallVector<Use*, Threshold> Worklist;
SmallSet<Use*, Threshold> Visited;
@@ -55,9 +85,10 @@
// If there are lots of uses, conservatively say that the value
// is captured to avoid taking too much compile time.
if (Count++ >=3D Threshold)
- return true;
+ return Tracker->tooManyUses();
=20
Use *U =3D &UI.getUse();
+ if (!Tracker->shouldExplore(U)) continue;
Visited.insert(U);
Worklist.push_back(U);
}
@@ -86,11 +117,10 @@
// (think of self-referential objects).
CallSite::arg_iterator B =3D CS.arg_begin(), E =3D CS.arg_end();
for (CallSite::arg_iterator A =3D B; A !=3D E; ++A)
- if (A->get() =3D=3D V && !CS.paramHasAttr(A - B + 1, Attribute::No=
Capture))
+ if (A->get() =3D=3D V && !CS.doesNotCapture(A - B))
// The parameter is not marked 'nocapture' - captured.
- return true;
- // Only passed via 'nocapture' arguments, or is the called function =
- not
- // captured.
+ if (Tracker->captured(U))
+ return;
break;
}
case Instruction::Load:
@@ -99,18 +129,11 @@
case Instruction::VAArg:
// "va-arg" from a pointer does not cause it to be captured.
break;
- case Instruction::Ret:
- if (ReturnCaptures)
- return true;
- break;
case Instruction::Store:
if (V =3D=3D I->getOperand(0))
// Stored the pointer - conservatively assume it may be captured.
- // TODO: If StoreCaptures is not true, we could do Fancy analysis
- // to determine whether this store is not actually an escape point.
- // In that case, BasicAliasAnalysis should be updated as well to
- // take advantage of this.
- return true;
+ if (Tracker->captured(U))
+ return;
// Storing to the pointee does not cause the pointer to be captured.
break;
case Instruction::BitCast:
@@ -122,7 +145,8 @@
UI !=3D UE; ++UI) {
Use *U =3D &UI.getUse();
if (Visited.insert(U))
- Worklist.push_back(U);
+ if (Tracker->shouldExplore(U))
+ Worklist.push_back(U);
}
break;
case Instruction::ICmp:
@@ -136,13 +160,16 @@
break;
// Otherwise, be conservative. There are crazy ways to capture point=
ers
// using comparisons.
- return true;
+ if (Tracker->captured(U))
+ return;
+ break;
default:
// Something else - be conservative and say it is captured.
- return true;
+ if (Tracker->captured(U))
+ return;
+ break;
}
}
=20
- // All uses examined - not captured.
- return false;
+ // All uses examined.
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/Constan=
tFolding.cpp
--- a/head/contrib/llvm/lib/Analysis/ConstantFolding.cpp Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/ConstantFolding.cpp Tue Apr 17 11:51:5=
1 2012 +0300
@@ -26,6 +26,7 @@
#include "llvm/Operator.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/Target/TargetData.h"
+#include "llvm/Target/TargetLibraryInfo.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/Support/ErrorHandling.h"
@@ -51,6 +52,42 @@
if (C->isAllOnesValue() && !DestTy->isX86_MMXTy())
return Constant::getAllOnesValue(DestTy);
=20
+ // Handle a vector->integer cast.
+ if (IntegerType *IT =3D dyn_cast<IntegerType>(DestTy)) {
+ ConstantDataVector *CDV =3D dyn_cast<ConstantDataVector>(C);
+ if (CDV =3D=3D 0)
+ return ConstantExpr::getBitCast(C, DestTy);
+
+ unsigned NumSrcElts =3D CDV->getType()->getNumElements();
+ =20
+ Type *SrcEltTy =3D CDV->getType()->getElementType();
+ =20
+ // If the vector is a vector of floating point, convert it to vector o=
f int
+ // to simplify things.
+ if (SrcEltTy->isFloatingPointTy()) {
+ unsigned FPWidth =3D SrcEltTy->getPrimitiveSizeInBits();
+ Type *SrcIVTy =3D
+ VectorType::get(IntegerType::get(C->getContext(), FPWidth), NumSrc=
Elts);
+ // Ask VMCore to do the conversion now that #elts line up.
+ C =3D ConstantExpr::getBitCast(C, SrcIVTy);
+ CDV =3D cast<ConstantDataVector>(C);
+ }
+ =20
+ // Now that we know that the input value is a vector of integers, just=
shift
+ // and insert them into our result.
+ unsigned BitShift =3D TD.getTypeAllocSizeInBits(SrcEltTy);
+ APInt Result(IT->getBitWidth(), 0);
+ for (unsigned i =3D 0; i !=3D NumSrcElts; ++i) {
+ Result <<=3D BitShift;
+ if (TD.isLittleEndian())
+ Result |=3D CDV->getElementAsInteger(NumSrcElts-i-1);
+ else
+ Result |=3D CDV->getElementAsInteger(i);
+ }
+ =20
+ return ConstantInt::get(IT, Result);
+ }
+ =20
// The code below only handles casts to vectors currently.
VectorType *DestVTy =3D dyn_cast<VectorType>(DestTy);
if (DestVTy =3D=3D 0)
@@ -64,17 +101,16 @@
}
=20
// If this is a bitcast from constant vector -> vector, fold it.
- ConstantVector *CV =3D dyn_cast<ConstantVector>(C);
- if (CV =3D=3D 0)
+ if (!isa<ConstantDataVector>(C) && !isa<ConstantVector>(C))
return ConstantExpr::getBitCast(C, DestTy);
=20
// If the element types match, VMCore can fold it.
unsigned NumDstElt =3D DestVTy->getNumElements();
- unsigned NumSrcElt =3D CV->getNumOperands();
+ unsigned NumSrcElt =3D C->getType()->getVectorNumElements();
if (NumDstElt =3D=3D NumSrcElt)
return ConstantExpr::getBitCast(C, DestTy);
=20
- Type *SrcEltTy =3D CV->getType()->getElementType();
+ Type *SrcEltTy =3D C->getType()->getVectorElementType();
Type *DstEltTy =3D DestVTy->getElementType();
=20
// Otherwise, we're changing the number of elements in a vector, which=20
@@ -94,7 +130,6 @@
VectorType::get(IntegerType::get(C->getContext(), FPWidth), NumDstEl=
t);
// Recursively handle this integer conversion, if possible.
C =3D FoldBitCast(C, DestIVTy, TD);
- if (!C) return ConstantExpr::getBitCast(C, DestTy);
=20
// Finally, VMCore can handle this now that #elts line up.
return ConstantExpr::getBitCast(C, DestTy);
@@ -108,8 +143,9 @@
VectorType::get(IntegerType::get(C->getContext(), FPWidth), NumSrcEl=
t);
// Ask VMCore to do the conversion now that #elts line up.
C =3D ConstantExpr::getBitCast(C, SrcIVTy);
- CV =3D dyn_cast<ConstantVector>(C);
- if (!CV) // If VMCore wasn't able to fold it, bail out.
+ // If VMCore wasn't able to fold it, bail out.
+ if (!isa<ConstantVector>(C) && // FIXME: Remove ConstantVector.
+ !isa<ConstantDataVector>(C))
return C;
}
=20
@@ -131,7 +167,7 @@
Constant *Elt =3D Zero;
unsigned ShiftAmt =3D isLittleEndian ? 0 : SrcBitSize*(Ratio-1);
for (unsigned j =3D 0; j !=3D Ratio; ++j) {
- Constant *Src =3D dyn_cast<ConstantInt>(CV->getOperand(SrcElt++));
+ Constant *Src =3Ddyn_cast<ConstantInt>(C->getAggregateElement(SrcE=
lt++));
if (!Src) // Reject constantexpr elements.
return ConstantExpr::getBitCast(C, DestTy);
=20
@@ -148,28 +184,29 @@
}
Result.push_back(Elt);
}
- } else {
- // Handle: bitcast (<2 x i64> <i64 0, i64 1> to <4 x i32>)
- unsigned Ratio =3D NumDstElt/NumSrcElt;
- unsigned DstBitSize =3D DstEltTy->getPrimitiveSizeInBits();
+ return ConstantVector::get(Result);
+ }
+ =20
+ // Handle: bitcast (<2 x i64> <i64 0, i64 1> to <4 x i32>)
+ unsigned Ratio =3D NumDstElt/NumSrcElt;
+ unsigned DstBitSize =3D DstEltTy->getPrimitiveSizeInBits();
+ =20
+ // Loop over each source value, expanding into multiple results.
+ for (unsigned i =3D 0; i !=3D NumSrcElt; ++i) {
+ Constant *Src =3D dyn_cast<ConstantInt>(C->getAggregateElement(i));
+ if (!Src) // Reject constantexpr elements.
+ return ConstantExpr::getBitCast(C, DestTy);
=20
- // Loop over each source value, expanding into multiple results.
- for (unsigned i =3D 0; i !=3D NumSrcElt; ++i) {
- Constant *Src =3D dyn_cast<ConstantInt>(CV->getOperand(i));
- if (!Src) // Reject constantexpr elements.
- return ConstantExpr::getBitCast(C, DestTy);
+ unsigned ShiftAmt =3D isLittleEndian ? 0 : DstBitSize*(Ratio-1);
+ for (unsigned j =3D 0; j !=3D Ratio; ++j) {
+ // Shift the piece of the value into the right place, depending on
+ // endianness.
+ Constant *Elt =3D ConstantExpr::getLShr(Src,=20
+ ConstantInt::get(Src->getType(), ShiftAm=
t));
+ ShiftAmt +=3D isLittleEndian ? DstBitSize : -DstBitSize;
=20
- unsigned ShiftAmt =3D isLittleEndian ? 0 : DstBitSize*(Ratio-1);
- for (unsigned j =3D 0; j !=3D Ratio; ++j) {
- // Shift the piece of the value into the right place, depending on
- // endianness.
- Constant *Elt =3D ConstantExpr::getLShr(Src,=20
- ConstantInt::get(Src->getType(), Shift=
Amt));
- ShiftAmt +=3D isLittleEndian ? DstBitSize : -DstBitSize;
- =20
- // Truncate and remember this piece.
- Result.push_back(ConstantExpr::getTrunc(Elt, DstEltTy));
- }
+ // Truncate and remember this piece.
+ Result.push_back(ConstantExpr::getTrunc(Elt, DstEltTy));
}
}
=20
@@ -272,7 +309,7 @@
}
return false;
}
-
+ =20
if (ConstantStruct *CS =3D dyn_cast<ConstantStruct>(C)) {
const StructLayout *SL =3D TD.getStructLayout(CS->getType());
unsigned Index =3D SL->getElementContainingOffset(ByteOffset);
@@ -310,12 +347,20 @@
// not reached.
}
=20
- if (ConstantArray *CA =3D dyn_cast<ConstantArray>(C)) {
- uint64_t EltSize =3D TD.getTypeAllocSize(CA->getType()->getElementType=
());
+ if (isa<ConstantArray>(C) || isa<ConstantVector>(C) ||
+ isa<ConstantDataSequential>(C)) {
+ Type *EltTy =3D cast<SequentialType>(C->getType())->getElementType();
+ uint64_t EltSize =3D TD.getTypeAllocSize(EltTy);
uint64_t Index =3D ByteOffset / EltSize;
uint64_t Offset =3D ByteOffset - Index * EltSize;
- for (; Index !=3D CA->getType()->getNumElements(); ++Index) {
- if (!ReadDataFromGlobal(CA->getOperand(Index), Offset, CurPtr,
+ uint64_t NumElts;
+ if (ArrayType *AT =3D dyn_cast<ArrayType>(C->getType()))
+ NumElts =3D AT->getNumElements();
+ else
+ NumElts =3D cast<VectorType>(C->getType())->getNumElements();
+ =20
+ for (; Index !=3D NumElts; ++Index) {
+ if (!ReadDataFromGlobal(C->getAggregateElement(Index), Offset, CurPt=
r,
BytesLeft, TD))
return false;
if (EltSize >=3D BytesLeft)
@@ -327,30 +372,12 @@
}
return true;
}
- =20
- if (ConstantVector *CV =3D dyn_cast<ConstantVector>(C)) {
- uint64_t EltSize =3D TD.getTypeAllocSize(CV->getType()->getElementType=
());
- uint64_t Index =3D ByteOffset / EltSize;
- uint64_t Offset =3D ByteOffset - Index * EltSize;
- for (; Index !=3D CV->getType()->getNumElements(); ++Index) {
- if (!ReadDataFromGlobal(CV->getOperand(Index), Offset, CurPtr,
- BytesLeft, TD))
- return false;
- if (EltSize >=3D BytesLeft)
- return true;
=20
- Offset =3D 0;
- BytesLeft -=3D EltSize;
- CurPtr +=3D EltSize;
- }
- return true;
- }
- =20
if (ConstantExpr *CE =3D dyn_cast<ConstantExpr>(C)) {
if (CE->getOpcode() =3D=3D Instruction::IntToPtr &&
CE->getOperand(0)->getType() =3D=3D TD.getIntPtrType(CE->getContex=
t()))=20
- return ReadDataFromGlobal(CE->getOperand(0), ByteOffset, CurPtr,=20
- BytesLeft, TD);
+ return ReadDataFromGlobal(CE->getOperand(0), ByteOffset, CurPtr,=20
+ BytesLeft, TD);
}
=20
// Otherwise, unknown initializer type.
@@ -445,9 +472,9 @@
=20
// Instead of loading constant c string, use corresponding integer value
// directly if string length is small enough.
- std::string Str;
- if (TD && GetConstantStringInfo(CE, Str) && !Str.empty()) {
- unsigned StrLen =3D Str.length();
+ StringRef Str;
+ if (TD && getConstantStringInfo(CE, Str) && !Str.empty()) {
+ unsigned StrLen =3D Str.size();
Type *Ty =3D cast<PointerType>(CE->getType())->getElementType();
unsigned NumBits =3D Ty->getPrimitiveSizeInBits();
// Replace load with immediate integer if the result is an integer or =
fp
@@ -542,8 +569,8 @@
/// explicitly cast them so that they aren't implicitly casted by the
/// getelementptr.
static Constant *CastGEPIndices(ArrayRef<Constant *> Ops,
- Type *ResultTy,
- const TargetData *TD) {
+ Type *ResultTy, const TargetData *TD,
+ const TargetLibraryInfo *TLI) {
if (!TD) return 0;
Type *IntPtrTy =3D TD->getIntPtrType(ResultTy->getContext());
=20
@@ -568,7 +595,7 @@
Constant *C =3D
ConstantExpr::getGetElementPtr(Ops[0], NewIdxs);
if (ConstantExpr *CE =3D dyn_cast<ConstantExpr>(C))
- if (Constant *Folded =3D ConstantFoldConstantExpression(CE, TD))
+ if (Constant *Folded =3D ConstantFoldConstantExpression(CE, TD, TLI))
C =3D Folded;
return C;
}
@@ -576,10 +603,11 @@
/// SymbolicallyEvaluateGEP - If we can symbolically evaluate the specifie=
d GEP
/// constant expression, do so.
static Constant *SymbolicallyEvaluateGEP(ArrayRef<Constant *> Ops,
- Type *ResultTy,
- const TargetData *TD) {
+ Type *ResultTy, const TargetData =
*TD,
+ const TargetLibraryInfo *TLI) {
Constant *Ptr =3D Ops[0];
- if (!TD || !cast<PointerType>(Ptr->getType())->getElementType()->isSized=
())
+ if (!TD || !cast<PointerType>(Ptr->getType())->getElementType()->isSized=
() ||
+ !Ptr->getType()->isPointerTy())
return 0;
=20
Type *IntPtrTy =3D TD->getIntPtrType(Ptr->getContext());
@@ -602,7 +630,7 @@
Res =3D ConstantExpr::getSub(Res, CE->getOperand(1));
Res =3D ConstantExpr::getIntToPtr(Res, ResultTy);
if (ConstantExpr *ResCE =3D dyn_cast<ConstantExpr>(Res))
- Res =3D ConstantFoldConstantExpression(ResCE, TD);
+ Res =3D ConstantFoldConstantExpression(ResCE, TD, TLI);
return Res;
}
}
@@ -729,7 +757,9 @@
/// Note that this fails if not all of the operands are constant. Otherwi=
se,
/// this function can only fail when attempting to fold instructions like =
loads
/// and stores, which have no constant expression form.
-Constant *llvm::ConstantFoldInstruction(Instruction *I, const TargetData *=
TD) {
+Constant *llvm::ConstantFoldInstruction(Instruction *I,
+ const TargetData *TD,
+ const TargetLibraryInfo *TLI) {
// Handle PHI nodes quickly here...
if (PHINode *PN =3D dyn_cast<PHINode>(I)) {
Constant *CommonValue =3D 0;
@@ -765,7 +795,7 @@
=20
if (const CmpInst *CI =3D dyn_cast<CmpInst>(I))
return ConstantFoldCompareInstOperands(CI->getPredicate(), Ops[0], Ops=
[1],
- TD);
+ TD, TLI);
=20
if (const LoadInst *LI =3D dyn_cast<LoadInst>(I))
return ConstantFoldLoadInst(LI, TD);
@@ -781,28 +811,29 @@
cast<Constant>(EVI->getAggregateOperan=
d()),
EVI->getIndices());
=20
- return ConstantFoldInstOperands(I->getOpcode(), I->getType(), Ops, TD);
+ return ConstantFoldInstOperands(I->getOpcode(), I->getType(), Ops, TD, T=
LI);
}
=20
/// ConstantFoldConstantExpression - Attempt to fold the constant expressi=
on
/// using the specified TargetData. If successful, the constant result is
/// result is returned, if not, null is returned.
Constant *llvm::ConstantFoldConstantExpression(const ConstantExpr *CE,
- const TargetData *TD) {
+ const TargetData *TD,
+ const TargetLibraryInfo *TL=
I) {
SmallVector<Constant*, 8> Ops;
for (User::const_op_iterator i =3D CE->op_begin(), e =3D CE->op_end();
i !=3D e; ++i) {
Constant *NewC =3D cast<Constant>(*i);
// Recursively fold the ConstantExpr's operands.
if (ConstantExpr *NewCE =3D dyn_cast<ConstantExpr>(NewC))
- NewC =3D ConstantFoldConstantExpression(NewCE, TD);
+ NewC =3D ConstantFoldConstantExpression(NewCE, TD, TLI);
Ops.push_back(NewC);
}
=20
if (CE->isCompare())
return ConstantFoldCompareInstOperands(CE->getPredicate(), Ops[0], Ops=
[1],
- TD);
- return ConstantFoldInstOperands(CE->getOpcode(), CE->getType(), Ops, TD);
+ TD, TLI);
+ return ConstantFoldInstOperands(CE->getOpcode(), CE->getType(), Ops, TD,=
TLI);
}
=20
/// ConstantFoldInstOperands - Attempt to constant fold an instruction wit=
h the
@@ -817,7 +848,8 @@
///
Constant *llvm::ConstantFoldInstOperands(unsigned Opcode, Type *DestTy,=20
ArrayRef<Constant *> Ops,
- const TargetData *TD) {
+ const TargetData *TD,
+ const TargetLibraryInfo *TLI) { =
=20
// Handle easy binops first.
if (Instruction::isBinaryOp(Opcode)) {
if (isa<ConstantExpr>(Ops[0]) || isa<ConstantExpr>(Ops[1]))
@@ -830,11 +862,11 @@
switch (Opcode) {
default: return 0;
case Instruction::ICmp:
- case Instruction::FCmp: assert(0 && "Invalid for compares");
+ case Instruction::FCmp: llvm_unreachable("Invalid for compares");
case Instruction::Call:
if (Function *F =3D dyn_cast<Function>(Ops.back()))
if (canConstantFoldCallTo(F))
- return ConstantFoldCall(F, Ops.slice(0, Ops.size() - 1));
+ return ConstantFoldCall(F, Ops.slice(0, Ops.size() - 1), TLI);
return 0;
case Instruction::PtrToInt:
// If the input is a inttoptr, eliminate the pair. This requires know=
ing
@@ -888,9 +920,9 @@
case Instruction::ShuffleVector:
return ConstantExpr::getShuffleVector(Ops[0], Ops[1], Ops[2]);
case Instruction::GetElementPtr:
- if (Constant *C =3D CastGEPIndices(Ops, DestTy, TD))
+ if (Constant *C =3D CastGEPIndices(Ops, DestTy, TD, TLI))
return C;
- if (Constant *C =3D SymbolicallyEvaluateGEP(Ops, DestTy, TD))
+ if (Constant *C =3D SymbolicallyEvaluateGEP(Ops, DestTy, TD, TLI))
return C;
=20
return ConstantExpr::getGetElementPtr(Ops[0], Ops.slice(1));
@@ -903,7 +935,8 @@
///
Constant *llvm::ConstantFoldCompareInstOperands(unsigned Predicate,
Constant *Ops0, Constant *=
Ops1,=20
- const TargetData *TD) {
+ const TargetData *TD,
+ const TargetLibraryInfo *T=
LI) {
// fold: icmp (inttoptr x), null -> icmp x, 0
// fold: icmp (ptrtoint x), 0 -> icmp x, null
// fold: icmp (inttoptr x), (inttoptr y) -> icmp trunc/zext x, trunc/zex=
t y
@@ -920,7 +953,7 @@
Constant *C =3D ConstantExpr::getIntegerCast(CE0->getOperand(0),
IntPtrTy, false);
Constant *Null =3D Constant::getNullValue(C->getType());
- return ConstantFoldCompareInstOperands(Predicate, C, Null, TD);
+ return ConstantFoldCompareInstOperands(Predicate, C, Null, TD, TLI=
);
}
=20
// Only do this transformation if the int is intptrty in size, other=
wise
@@ -929,7 +962,7 @@
CE0->getType() =3D=3D IntPtrTy) {
Constant *C =3D CE0->getOperand(0);
Constant *Null =3D Constant::getNullValue(C->getType());
- return ConstantFoldCompareInstOperands(Predicate, C, Null, TD);
+ return ConstantFoldCompareInstOperands(Predicate, C, Null, TD, TLI=
);
}
}
=20
@@ -944,7 +977,7 @@
IntPtrTy, false);
Constant *C1 =3D ConstantExpr::getIntegerCast(CE1->getOperand(0),
IntPtrTy, false);
- return ConstantFoldCompareInstOperands(Predicate, C0, C1, TD);
+ return ConstantFoldCompareInstOperands(Predicate, C0, C1, TD, TL=
I);
}
=20
// Only do this transformation if the int is intptrty in size, oth=
erwise
@@ -953,7 +986,7 @@
CE0->getType() =3D=3D IntPtrTy &&
CE0->getOperand(0)->getType() =3D=3D CE1->getOperand(0)->getT=
ype()))
return ConstantFoldCompareInstOperands(Predicate, CE0->getOperan=
d(0),
- CE1->getOperand(0), TD);
+ CE1->getOperand(0), TD, T=
LI);
}
}
=20
@@ -962,13 +995,15 @@
if ((Predicate =3D=3D ICmpInst::ICMP_EQ || Predicate =3D=3D ICmpInst::=
ICMP_NE) &&
CE0->getOpcode() =3D=3D Instruction::Or && Ops1->isNullValue()) {
Constant *LHS =3D=20
- ConstantFoldCompareInstOperands(Predicate, CE0->getOperand(0), Ops=
1,TD);
+ ConstantFoldCompareInstOperands(Predicate, CE0->getOperand(0), Ops=
1,
+ TD, TLI);
Constant *RHS =3D=20
- ConstantFoldCompareInstOperands(Predicate, CE0->getOperand(1), Ops=
1,TD);
+ ConstantFoldCompareInstOperands(Predicate, CE0->getOperand(1), Ops=
1,
+ TD, TLI);
unsigned OpC =3D=20
Predicate =3D=3D ICmpInst::ICMP_EQ ? Instruction::And : Instructio=
n::Or;
Constant *Ops[] =3D { LHS, RHS };
- return ConstantFoldInstOperands(OpC, LHS->getType(), Ops, TD);
+ return ConstantFoldInstOperands(OpC, LHS->getType(), Ops, TD, TLI);
}
}
=20
@@ -981,56 +1016,30 @@
/// constant expression, or null if something is funny and we can't decide.
Constant *llvm::ConstantFoldLoadThroughGEPConstantExpr(Constant *C,=20
ConstantExpr *CE) {
- if (CE->getOperand(1) !=3D Constant::getNullValue(CE->getOperand(1)->get=
Type()))
+ if (!CE->getOperand(1)->isNullValue())
return 0; // Do not allow stepping over the value!
- =20
+
// Loop over all of the operands, tracking down which value we are
- // addressing...
- gep_type_iterator I =3D gep_type_begin(CE), E =3D gep_type_end(CE);
- for (++I; I !=3D E; ++I)
- if (StructType *STy =3D dyn_cast<StructType>(*I)) {
- ConstantInt *CU =3D cast<ConstantInt>(I.getOperand());
- assert(CU->getZExtValue() < STy->getNumElements() &&
- "Struct index out of range!");
- unsigned El =3D (unsigned)CU->getZExtValue();
- if (ConstantStruct *CS =3D dyn_cast<ConstantStruct>(C)) {
- C =3D CS->getOperand(El);
- } else if (isa<ConstantAggregateZero>(C)) {
- C =3D Constant::getNullValue(STy->getElementType(El));
- } else if (isa<UndefValue>(C)) {
- C =3D UndefValue::get(STy->getElementType(El));
- } else {
- return 0;
- }
- } else if (ConstantInt *CI =3D dyn_cast<ConstantInt>(I.getOperand())) {
- if (ArrayType *ATy =3D dyn_cast<ArrayType>(*I)) {
- if (CI->getZExtValue() >=3D ATy->getNumElements())
- return 0;
- if (ConstantArray *CA =3D dyn_cast<ConstantArray>(C))
- C =3D CA->getOperand(CI->getZExtValue());
- else if (isa<ConstantAggregateZero>(C))
- C =3D Constant::getNullValue(ATy->getElementType());
- else if (isa<UndefValue>(C))
- C =3D UndefValue::get(ATy->getElementType());
- else
- return 0;
- } else if (VectorType *VTy =3D dyn_cast<VectorType>(*I)) {
- if (CI->getZExtValue() >=3D VTy->getNumElements())
- return 0;
- if (ConstantVector *CP =3D dyn_cast<ConstantVector>(C))
- C =3D CP->getOperand(CI->getZExtValue());
- else if (isa<ConstantAggregateZero>(C))
- C =3D Constant::getNullValue(VTy->getElementType());
- else if (isa<UndefValue>(C))
- C =3D UndefValue::get(VTy->getElementType());
- else
- return 0;
- } else {
- return 0;
- }
- } else {
- return 0;
- }
+ // addressing.
+ for (unsigned i =3D 2, e =3D CE->getNumOperands(); i !=3D e; ++i) {
+ C =3D C->getAggregateElement(CE->getOperand(i));
+ if (C =3D=3D 0) return 0;
+ }
+ return C;
+}
+
+/// ConstantFoldLoadThroughGEPIndices - Given a constant and getelementptr
+/// indices (with an *implied* zero pointer index that is not in the list),
+/// return the constant value being addressed by a virtual load, or null if
+/// something is funny and we can't decide.
+Constant *llvm::ConstantFoldLoadThroughGEPIndices(Constant *C,
+ ArrayRef<Constant*> Indi=
ces) {
+ // Loop over all of the operands, tracking down which value we are
+ // addressing.
+ for (unsigned i =3D 0, e =3D Indices.size(); i !=3D e; ++i) {
+ C =3D C->getAggregateElement(Indices[i]);
+ if (C =3D=3D 0) return 0;
+ }
return C;
}
=20
@@ -1045,6 +1054,7 @@
llvm::canConstantFoldCallTo(const Function *F) {
switch (F->getIntrinsicID()) {
case Intrinsic::sqrt:
+ case Intrinsic::pow:
case Intrinsic::powi:
case Intrinsic::bswap:
case Intrinsic::ctpop:
@@ -1115,7 +1125,6 @@
if (Ty->isDoubleTy())
return ConstantFP::get(Ty->getContext(), APFloat(V));
llvm_unreachable("Can only constant fold float/double");
- return 0; // dummy return to suppress warning
}
=20
static Constant *ConstantFoldBinaryFP(double (*NativeFP)(double, double),
@@ -1132,7 +1141,6 @@
if (Ty->isDoubleTy())
return ConstantFP::get(Ty->getContext(), APFloat(V));
llvm_unreachable("Can only constant fold float/double");
- return 0; // dummy return to suppress warning
}
=20
/// ConstantFoldConvertToInt - Attempt to an SSE floating point to integer
@@ -1143,11 +1151,8 @@
/// available for the result. Returns null if the conversion cannot be
/// performed, otherwise returns the Constant value resulting from the
/// conversion.
-static Constant *ConstantFoldConvertToInt(ConstantFP *Op, bool roundToward=
Zero,
- Type *Ty) {
- assert(Op && "Called with NULL operand");
- APFloat Val(Op->getValueAPF());
-
+static Constant *ConstantFoldConvertToInt(const APFloat &Val,
+ bool roundTowardZero, Type *Ty) {
// All of these conversion intrinsics form an integer of at most 64bits.
unsigned ResultWidth =3D cast<IntegerType>(Ty)->getBitWidth();
assert(ResultWidth <=3D 64 &&
@@ -1168,7 +1173,8 @@
/// ConstantFoldCall - Attempt to constant fold a call to the specified fu=
nction
/// with the specified arguments, returning null if unsuccessful.
Constant *
-llvm::ConstantFoldCall(Function *F, ArrayRef<Constant *> Operands) {
+llvm::ConstantFoldCall(Function *F, ArrayRef<Constant *> Operands,
+ const TargetLibraryInfo *TLI) {
if (!F->hasName()) return 0;
StringRef Name =3D F->getName();
=20
@@ -1183,6 +1189,8 @@
=20
return ConstantInt::get(F->getContext(), Val.bitcastToAPInt());
}
+ if (!TLI)
+ return 0;
=20
if (!Ty->isFloatTy() && !Ty->isDoubleTy())
return 0;
@@ -1201,43 +1209,43 @@
Op->getValueAPF().convertToDouble();
switch (Name[0]) {
case 'a':
- if (Name =3D=3D "acos")
+ if (Name =3D=3D "acos" && TLI->has(LibFunc::acos))
return ConstantFoldFP(acos, V, Ty);
- else if (Name =3D=3D "asin")
+ else if (Name =3D=3D "asin" && TLI->has(LibFunc::asin))
return ConstantFoldFP(asin, V, Ty);
- else if (Name =3D=3D "atan")
+ else if (Name =3D=3D "atan" && TLI->has(LibFunc::atan))
return ConstantFoldFP(atan, V, Ty);
break;
case 'c':
- if (Name =3D=3D "ceil")
+ if (Name =3D=3D "ceil" && TLI->has(LibFunc::ceil))
return ConstantFoldFP(ceil, V, Ty);
- else if (Name =3D=3D "cos")
+ else if (Name =3D=3D "cos" && TLI->has(LibFunc::cos))
return ConstantFoldFP(cos, V, Ty);
- else if (Name =3D=3D "cosh")
+ else if (Name =3D=3D "cosh" && TLI->has(LibFunc::cosh))
return ConstantFoldFP(cosh, V, Ty);
- else if (Name =3D=3D "cosf")
+ else if (Name =3D=3D "cosf" && TLI->has(LibFunc::cosf))
return ConstantFoldFP(cos, V, Ty);
break;
case 'e':
- if (Name =3D=3D "exp")
+ if (Name =3D=3D "exp" && TLI->has(LibFunc::exp))
return ConstantFoldFP(exp, V, Ty);
=20
- if (Name =3D=3D "exp2") {
+ if (Name =3D=3D "exp2" && TLI->has(LibFunc::exp2)) {
// Constant fold exp2(x) as pow(2,x) in case the host doesn't ha=
ve a
// C99 library.
return ConstantFoldBinaryFP(pow, 2.0, V, Ty);
}
break;
case 'f':
- if (Name =3D=3D "fabs")
+ if (Name =3D=3D "fabs" && TLI->has(LibFunc::fabs))
return ConstantFoldFP(fabs, V, Ty);
- else if (Name =3D=3D "floor")
+ else if (Name =3D=3D "floor" && TLI->has(LibFunc::floor))
return ConstantFoldFP(floor, V, Ty);
break;
case 'l':
- if (Name =3D=3D "log" && V > 0)
+ if (Name =3D=3D "log" && V > 0 && TLI->has(LibFunc::log))
return ConstantFoldFP(log, V, Ty);
- else if (Name =3D=3D "log10" && V > 0)
+ else if (Name =3D=3D "log10" && V > 0 && TLI->has(LibFunc::log10))
return ConstantFoldFP(log10, V, Ty);
else if (F->getIntrinsicID() =3D=3D Intrinsic::sqrt &&
(Ty->isFloatTy() || Ty->isDoubleTy())) {
@@ -1248,21 +1256,21 @@
}
break;
case 's':
- if (Name =3D=3D "sin")
+ if (Name =3D=3D "sin" && TLI->has(LibFunc::sin))
return ConstantFoldFP(sin, V, Ty);
- else if (Name =3D=3D "sinh")
+ else if (Name =3D=3D "sinh" && TLI->has(LibFunc::sinh))
return ConstantFoldFP(sinh, V, Ty);
- else if (Name =3D=3D "sqrt" && V >=3D 0)
+ else if (Name =3D=3D "sqrt" && V >=3D 0 && TLI->has(LibFunc::sqrt))
return ConstantFoldFP(sqrt, V, Ty);
- else if (Name =3D=3D "sqrtf" && V >=3D 0)
+ else if (Name =3D=3D "sqrtf" && V >=3D 0 && TLI->has(LibFunc::sqrt=
f))
return ConstantFoldFP(sqrt, V, Ty);
- else if (Name =3D=3D "sinf")
+ else if (Name =3D=3D "sinf" && TLI->has(LibFunc::sinf))
return ConstantFoldFP(sin, V, Ty);
break;
case 't':
- if (Name =3D=3D "tan")
+ if (Name =3D=3D "tan" && TLI->has(LibFunc::tan))
return ConstantFoldFP(tan, V, Ty);
- else if (Name =3D=3D "tanh")
+ else if (Name =3D=3D "tanh" && TLI->has(LibFunc::tanh))
return ConstantFoldFP(tanh, V, Ty);
break;
default:
@@ -1277,10 +1285,6 @@
return ConstantInt::get(F->getContext(), Op->getValue().byteSwap()=
);
case Intrinsic::ctpop:
return ConstantInt::get(Ty, Op->getValue().countPopulation());
- case Intrinsic::cttz:
- return ConstantInt::get(Ty, Op->getValue().countTrailingZeros());
- case Intrinsic::ctlz:
- return ConstantInt::get(Ty, Op->getValue().countLeadingZeros());
case Intrinsic::convert_from_fp16: {
APFloat Val(Op->getValue());
=20
@@ -1300,24 +1304,31 @@
}
}
=20
- if (ConstantVector *Op =3D dyn_cast<ConstantVector>(Operands[0])) {
+ // Support ConstantVector in case we have an Undef in the top.
+ if (isa<ConstantVector>(Operands[0]) ||=20
+ isa<ConstantDataVector>(Operands[0])) {
+ Constant *Op =3D cast<Constant>(Operands[0]);
switch (F->getIntrinsicID()) {
default: break;
case Intrinsic::x86_sse_cvtss2si:
case Intrinsic::x86_sse_cvtss2si64:
case Intrinsic::x86_sse2_cvtsd2si:
case Intrinsic::x86_sse2_cvtsd2si64:
- if (ConstantFP *FPOp =3D dyn_cast<ConstantFP>(Op->getOperand(0)))
- return ConstantFoldConvertToInt(FPOp, /*roundTowardZero=3D*/fals=
e, Ty);
+ if (ConstantFP *FPOp =3D
+ dyn_cast_or_null<ConstantFP>(Op->getAggregateElement(0U)))
+ return ConstantFoldConvertToInt(FPOp->getValueAPF(),
+ /*roundTowardZero=3D*/false, Ty);
case Intrinsic::x86_sse_cvttss2si:
case Intrinsic::x86_sse_cvttss2si64:
case Intrinsic::x86_sse2_cvttsd2si:
case Intrinsic::x86_sse2_cvttsd2si64:
- if (ConstantFP *FPOp =3D dyn_cast<ConstantFP>(Op->getOperand(0)))
- return ConstantFoldConvertToInt(FPOp, /*roundTowardZero=3D*/true=
, Ty);
+ if (ConstantFP *FPOp =3D
+ dyn_cast_or_null<ConstantFP>(Op->getAggregateElement(0U)))
+ return ConstantFoldConvertToInt(FPOp->getValueAPF(),=20
+ /*roundTowardZero=3D*/true, Ty);
}
}
-
+ =20
if (isa<UndefValue>(Operands[0])) {
if (F->getIntrinsicID() =3D=3D Intrinsic::bswap)
return Operands[0];
@@ -1337,16 +1348,21 @@
if (ConstantFP *Op2 =3D dyn_cast<ConstantFP>(Operands[1])) {
if (Op2->getType() !=3D Op1->getType())
return 0;
- =20
+
double Op2V =3D Ty->isFloatTy() ?=20
(double)Op2->getValueAPF().convertToFloat():
Op2->getValueAPF().convertToDouble();
=20
- if (Name =3D=3D "pow")
+ if (F->getIntrinsicID() =3D=3D Intrinsic::pow) {
return ConstantFoldBinaryFP(pow, Op1V, Op2V, Ty);
- if (Name =3D=3D "fmod")
+ }
+ if (!TLI)
+ return 0;
+ if (Name =3D=3D "pow" && TLI->has(LibFunc::pow))
+ return ConstantFoldBinaryFP(pow, Op1V, Op2V, Ty);
+ if (Name =3D=3D "fmod" && TLI->has(LibFunc::fmod))
return ConstantFoldBinaryFP(fmod, Op1V, Op2V, Ty);
- if (Name =3D=3D "atan2")
+ if (Name =3D=3D "atan2" && TLI->has(LibFunc::atan2))
return ConstantFoldBinaryFP(atan2, Op1V, Op2V, Ty);
} else if (ConstantInt *Op2C =3D dyn_cast<ConstantInt>(Operands[1]))=
{
if (F->getIntrinsicID() =3D=3D Intrinsic::powi && Ty->isFloatTy())
@@ -1361,7 +1377,6 @@
return 0;
}
=20
- =20
if (ConstantInt *Op1 =3D dyn_cast<ConstantInt>(Operands[0])) {
if (ConstantInt *Op2 =3D dyn_cast<ConstantInt>(Operands[1])) {
switch (F->getIntrinsicID()) {
@@ -1375,7 +1390,7 @@
APInt Res;
bool Overflow;
switch (F->getIntrinsicID()) {
- default: assert(0 && "Invalid case");
+ default: llvm_unreachable("Invalid case");
case Intrinsic::sadd_with_overflow:
Res =3D Op1->getValue().sadd_ov(Op2->getValue(), Overflow);
break;
@@ -1401,6 +1416,14 @@
};
return ConstantStruct::get(cast<StructType>(F->getReturnType()),=
Ops);
}
+ case Intrinsic::cttz:
+ // FIXME: This should check for Op2 =3D=3D 1, and become unreach=
able if
+ // Op1 =3D=3D 0.
+ return ConstantInt::get(Ty, Op1->getValue().countTrailingZeros()=
);
+ case Intrinsic::ctlz:
+ // FIXME: This should check for Op2 =3D=3D 1, and become unreach=
able if
+ // Op1 =3D=3D 0.
+ return ConstantInt::get(Ty, Op1->getValue().countLeadingZeros());
}
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/DIBuild=
er.cpp
--- a/head/contrib/llvm/lib/Analysis/DIBuilder.cpp Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/lib/Analysis/DIBuilder.cpp Tue Apr 17 11:51:51 2012=
+0300
@@ -17,6 +17,7 @@
#include "llvm/IntrinsicInst.h"
#include "llvm/Module.h"
#include "llvm/ADT/STLExtras.h"
+#include "llvm/Support/Debug.h"
#include "llvm/Support/Dwarf.h"
=20
using namespace llvm;
@@ -76,10 +77,11 @@
StringRef Directory, StringRef Producer,
bool isOptimized, StringRef Flags,
unsigned RunTimeVer) {
- assert (Lang <=3D dwarf::DW_LANG_D && Lang >=3D dwarf::DW_LANG_C89
- && "Invalid Language tag");
- assert (!Filename.empty()=20
- && "Unable to create compile unit without filename");
+ assert(((Lang <=3D dwarf::DW_LANG_Python && Lang >=3D dwarf::DW_LANG_C89=
) ||
+ (Lang <=3D dwarf::DW_LANG_hi_user && Lang >=3D dwarf::DW_LANG_lo=
_user)) &&
+ "Invalid Language tag");
+ assert(!Filename.empty() &&
+ "Unable to create compile unit without filename");
Value *TElts[] =3D { GetTagConstant(VMContext, DW_TAG_base_type) };
TempEnumTypes =3D MDNode::getTemporary(VMContext, TElts);
Value *THElts[] =3D { TempEnumTypes };
@@ -189,7 +191,7 @@
return DIType(MDNode::get(VMContext, Elts));
}
=20
-/// createQaulifiedType - Create debugging information entry for a qualifi=
ed
+/// createQualifiedType - Create debugging information entry for a qualifi=
ed
/// type, e.g. 'const int'.
DIType DIBuilder::createQualifiedType(unsigned Tag, DIType FromTy) {
// Qualified types are encoded in DIDerivedType format.
@@ -358,13 +360,58 @@
return DIType(MDNode::get(VMContext, Elts));
}
=20
+/// createObjCIVar - Create debugging information entry for Objective-C
+/// instance variable.
+DIType DIBuilder::createObjCIVar(StringRef Name,
+ DIFile File, unsigned LineNumber,
+ uint64_t SizeInBits, uint64_t AlignInBits,
+ uint64_t OffsetInBits, unsigned Flags,
+ DIType Ty, MDNode *PropertyNode) {
+ // TAG_member is encoded in DIDerivedType format.
+ Value *Elts[] =3D {
+ GetTagConstant(VMContext, dwarf::DW_TAG_member),
+ getNonCompileUnitScope(File),
+ MDString::get(VMContext, Name),
+ File,
+ ConstantInt::get(Type::getInt32Ty(VMContext), LineNumber),
+ ConstantInt::get(Type::getInt64Ty(VMContext), SizeInBits),
+ ConstantInt::get(Type::getInt64Ty(VMContext), AlignInBits),
+ ConstantInt::get(Type::getInt64Ty(VMContext), OffsetInBits),
+ ConstantInt::get(Type::getInt32Ty(VMContext), Flags),
+ Ty,
+ PropertyNode
+ };
+ return DIType(MDNode::get(VMContext, Elts));
+}
+
+/// createObjCProperty - Create debugging information entry for Objective-C
+/// property.
+DIObjCProperty DIBuilder::createObjCProperty(StringRef Name,
+ DIFile File, unsigned LineNumber,
+ StringRef GetterName,
+ StringRef SetterName,=20
+ unsigned PropertyAttributes,
+ DIType Ty) {
+ Value *Elts[] =3D {
+ GetTagConstant(VMContext, dwarf::DW_TAG_APPLE_property),
+ MDString::get(VMContext, Name),
+ File,
+ ConstantInt::get(Type::getInt32Ty(VMContext), LineNumber),
+ MDString::get(VMContext, GetterName),
+ MDString::get(VMContext, SetterName),
+ ConstantInt::get(Type::getInt32Ty(VMContext), PropertyAttributes),
+ Ty
+ };
+ return DIObjCProperty(MDNode::get(VMContext, Elts));
+}
+
/// createClassType - Create debugging information entry for a class.
DIType DIBuilder::createClassType(DIDescriptor Context, StringRef Name,
DIFile File, unsigned LineNumber,
uint64_t SizeInBits, uint64_t AlignInBit=
s,
uint64_t OffsetInBits, unsigned Flags,
DIType DerivedFrom, DIArray Elements,
- MDNode *VTableHoder, MDNode *TemplatePar=
ams) {
+ MDNode *VTableHolder, MDNode *TemplatePa=
rams) {
// TAG_class_type is encoded in DICompositeType format.
Value *Elts[] =3D {
GetTagConstant(VMContext, dwarf::DW_TAG_class_type),
@@ -379,7 +426,7 @@
DerivedFrom,
Elements,
ConstantInt::get(Type::getInt32Ty(VMContext), 0),
- VTableHoder,
+ VTableHolder,
TemplateParams
};
return DIType(MDNode::get(VMContext, Elts));
@@ -440,7 +487,7 @@
ConstantInt::get(Type::getInt64Ty(VMContext), AlignInBits),
ConstantInt::get(Type::getInt32Ty(VMContext), 0),
ConstantInt::get(Type::getInt32Ty(VMContext), Flags),
- llvm::Constant::getNullValue(Type::getInt32Ty(VMContext)),
+ NULL,
Elements,
ConstantInt::get(Type::getInt32Ty(VMContext), RunTimeLang),
llvm::Constant::getNullValue(Type::getInt32Ty(VMContext)),
@@ -465,7 +512,7 @@
ConstantInt::get(Type::getInt64Ty(VMContext), AlignInBits),
ConstantInt::get(Type::getInt64Ty(VMContext), 0),
ConstantInt::get(Type::getInt32Ty(VMContext), Flags),
- llvm::Constant::getNullValue(Type::getInt32Ty(VMContext)),
+ NULL,
Elements,
ConstantInt::get(Type::getInt32Ty(VMContext), RunTimeLang),
llvm::Constant::getNullValue(Type::getInt32Ty(VMContext)),
@@ -484,9 +531,9 @@
ConstantInt::get(Type::getInt32Ty(VMContext), 0),
ConstantInt::get(Type::getInt64Ty(VMContext), 0),
ConstantInt::get(Type::getInt64Ty(VMContext), 0),
+ ConstantInt::get(Type::getInt64Ty(VMContext), 0),
ConstantInt::get(Type::getInt32Ty(VMContext), 0),
- ConstantInt::get(Type::getInt32Ty(VMContext), 0),
- llvm::Constant::getNullValue(Type::getInt32Ty(VMContext)),
+ NULL,
ParameterTypes,
ConstantInt::get(Type::getInt32Ty(VMContext), 0),
llvm::Constant::getNullValue(Type::getInt32Ty(VMContext)),
@@ -500,7 +547,7 @@
DIFile File, unsigned LineNumber,
uint64_t SizeInBits,
uint64_t AlignInBits,
- DIArray Elements) {
+ DIArray Elements) {
// TAG_enumeration_type is encoded in DICompositeType format.
Value *Elts[] =3D {
GetTagConstant(VMContext, dwarf::DW_TAG_enumeration_type),
@@ -512,7 +559,7 @@
ConstantInt::get(Type::getInt64Ty(VMContext), AlignInBits),
ConstantInt::get(Type::getInt32Ty(VMContext), 0),
ConstantInt::get(Type::getInt32Ty(VMContext), 0),
- llvm::Constant::getNullValue(Type::getInt32Ty(VMContext)),
+ NULL,
Elements,
ConstantInt::get(Type::getInt32Ty(VMContext), 0),
llvm::Constant::getNullValue(Type::getInt32Ty(VMContext)),
@@ -628,6 +675,31 @@
return DIType(Node);
}
=20
+/// createForwardDecl - Create a temporary forward-declared type that
+/// can be RAUW'd if the full type is seen.
+DIType DIBuilder::createForwardDecl(unsigned Tag, StringRef Name, DIFile F,
+ unsigned Line, unsigned RuntimeLang) {
+ // Create a temporary MDNode.
+ Value *Elts[] =3D {
+ GetTagConstant(VMContext, Tag),
+ NULL, // TheCU
+ MDString::get(VMContext, Name),
+ F,
+ ConstantInt::get(Type::getInt32Ty(VMContext), Line),
+ // To ease transition include sizes etc of 0.
+ ConstantInt::get(Type::getInt32Ty(VMContext), 0),
+ ConstantInt::get(Type::getInt32Ty(VMContext), 0),
+ ConstantInt::get(Type::getInt32Ty(VMContext), 0),
+ ConstantInt::get(Type::getInt32Ty(VMContext),
+ DIDescriptor::FlagFwdDecl),
+ NULL,
+ DIArray(),
+ ConstantInt::get(Type::getInt32Ty(VMContext), RuntimeLang)
+ };
+ MDNode *Node =3D MDNode::getTemporary(VMContext, Elts);
+ return DIType(Node);
+}
+
/// getOrCreateArray - Get a DIArray, create one if required.
DIArray DIBuilder::getOrCreateArray(ArrayRef<Value *> Elements) {
if (Elements.empty()) {
@@ -738,7 +810,7 @@
Elts.push_back(MDString::get(VMContext, Name));
Elts.push_back(F);
Elts.push_back(ConstantInt::get(Type::getInt32Ty(VMContext),
- (LineNo | (ArgNo << 24))));
+ (LineNo | (ArgNo << 24))));
Elts.push_back(Ty);
Elts.push_back(llvm::Constant::getNullValue(Type::getInt32Ty(VMContext))=
);
Elts.push_back(llvm::Constant::getNullValue(Type::getInt32Ty(VMContext))=
);
@@ -754,6 +826,7 @@
DIFile File, unsigned LineNo,
DIType Ty,
bool isLocalToUnit, bool isDefiniti=
on,
+ unsigned ScopeLine,
unsigned Flags, bool isOptimized,
Function *Fn,
MDNode *TParams,
@@ -777,13 +850,14 @@
ConstantInt::get(Type::getInt1Ty(VMContext), isDefinition),
ConstantInt::get(Type::getInt32Ty(VMContext), 0),
ConstantInt::get(Type::getInt32Ty(VMContext), 0),
- llvm::Constant::getNullValue(Type::getInt32Ty(VMContext)),
+ NULL,
ConstantInt::get(Type::getInt32Ty(VMContext), Flags),
ConstantInt::get(Type::getInt1Ty(VMContext), isOptimized),
Fn,
TParams,
Decl,
- THolder
+ THolder,
+ ConstantInt::get(Type::getInt32Ty(VMContext), ScopeLine)
};
MDNode *Node =3D MDNode::get(VMContext, Elts);
=20
@@ -831,7 +905,9 @@
Fn,
TParam,
llvm::Constant::getNullValue(Type::getInt32Ty(VMContext)),
- THolder
+ THolder,
+ // FIXME: Do we want to use a different scope lines?
+ ConstantInt::get(Type::getInt32Ty(VMContext), LineNo)
};
MDNode *Node =3D MDNode::get(VMContext, Elts);
return DISubprogram(Node);
@@ -854,7 +930,7 @@
/// createLexicalBlockFile - This creates a new MDNode that encapsulates
/// an existing scope with a new filename.
DILexicalBlockFile DIBuilder::createLexicalBlockFile(DIDescriptor Scope,
- DIFile File) {
+ DIFile File) {
Value *Elts[] =3D {
GetTagConstant(VMContext, dwarf::DW_TAG_lexical_block),
Scope,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/DebugIn=
fo.cpp
--- a/head/contrib/llvm/lib/Analysis/DebugInfo.cpp Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/lib/Analysis/DebugInfo.cpp Tue Apr 17 11:51:51 2012=
+0300
@@ -68,7 +68,7 @@
return 0;
=20
if (Elt < DbgNode->getNumOperands())
- if (ConstantInt *CI =3D dyn_cast<ConstantInt>(DbgNode->getOperand(Elt)=
))
+ if (ConstantInt *CI =3D dyn_cast_or_null<ConstantInt>(DbgNode->getOper=
and(Elt)))
return CI->getZExtValue();
=20
return 0;
@@ -289,6 +289,10 @@
return DbgNode && getTag() =3D=3D dwarf::DW_TAG_enumerator;
}
=20
+/// isObjCProperty - Return true if the specified tag is DW_TAG
+bool DIDescriptor::isObjCProperty() const {
+ return DbgNode && getTag() =3D=3D dwarf::DW_TAG_APPLE_property;
+}
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// Simple Descriptor Constructors and other Methods
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -373,6 +377,19 @@
return true;
}
=20
+/// Verify - Verify that an ObjC property is well formed.
+bool DIObjCProperty::Verify() const {
+ if (!DbgNode)
+ return false;
+ unsigned Tag =3D getTag();
+ if (Tag !=3D dwarf::DW_TAG_APPLE_property) return false;
+ DIType Ty =3D getType();
+ if (!Ty.Verify()) return false;
+
+ // Don't worry about the rest of the strings for now.
+ return true;
+}
+
/// Verify - Verify that a type descriptor is well formed.
bool DIType::Verify() const {
if (!DbgNode)
@@ -482,6 +499,7 @@
/// return base type size.
uint64_t DIDerivedType::getOriginalTypeSize() const {
unsigned Tag =3D getTag();
+
if (Tag =3D=3D dwarf::DW_TAG_member || Tag =3D=3D dwarf::DW_TAG_typedef =
||
Tag =3D=3D dwarf::DW_TAG_const_type || Tag =3D=3D dwarf::DW_TAG_vola=
tile_type ||
Tag =3D=3D dwarf::DW_TAG_restrict_type) {
@@ -490,7 +508,13 @@
// approach.
if (!BaseType.isValid())
return getSizeInBits();
- if (BaseType.isDerivedType())
+ // If this is a derived type, go ahead and get the base type, unless
+ // it's a reference then it's just the size of the field. Pointer types
+ // have no need of this since they're a different type of qualification
+ // on the type.
+ if (BaseType.getTag() =3D=3D dwarf::DW_TAG_reference_type)
+ return getSizeInBits();
+ else if (BaseType.isDerivedType())
return DIDerivedType(BaseType).getOriginalTypeSize();
else
return BaseType.getSizeInBits();
@@ -499,6 +523,13 @@
return getSizeInBits();
}
=20
+/// getObjCProperty - Return property node, if this ivar is associated wit=
h one.
+MDNode *DIDerivedType::getObjCProperty() const {
+ if (getVersion() <=3D LLVMDebugVersion11 || DbgNode->getNumOperands() <=
=3D 10)
+ return NULL;
+ return dyn_cast_or_null<MDNode>(DbgNode->getOperand(10));
+}
+
/// isInlinedFnArgument - Return true if this variable provides debugging
/// information for an inlined function arguments.
bool DIVariable::isInlinedFnArgument(const Function *CurFn) {
@@ -565,8 +596,7 @@
return DIType(DbgNode).getFilename();
if (isFile())
return DIFile(DbgNode).getFilename();
- assert(0 && "Invalid DIScope!");
- return StringRef();
+ llvm_unreachable("Invalid DIScope!");
}
=20
StringRef DIScope::getDirectory() const {
@@ -586,8 +616,7 @@
return DIType(DbgNode).getDirectory();
if (isFile())
return DIFile(DbgNode).getDirectory();
- assert(0 && "Invalid DIScope!");
- return StringRef();
+ llvm_unreachable("Invalid DIScope!");
}
=20
DIArray DICompileUnit::getEnumTypes() const {
@@ -632,6 +661,32 @@
}
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+// DIDescriptor: vtable anchors for all descriptors.
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+
+void DIScope::anchor() { }
+
+void DICompileUnit::anchor() { }
+
+void DIFile::anchor() { }
+
+void DIType::anchor() { }
+
+void DIBasicType::anchor() { }
+
+void DIDerivedType::anchor() { }
+
+void DICompositeType::anchor() { }
+
+void DISubprogram::anchor() { }
+
+void DILexicalBlock::anchor() { }
+
+void DINameSpace::anchor() { }
+
+void DILexicalBlockFile::anchor() { }
+
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// DIDescriptor: dump routines for all descriptors.
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
@@ -679,8 +734,13 @@
=20
if (isBasicType())
DIBasicType(DbgNode).print(OS);
- else if (isDerivedType())
- DIDerivedType(DbgNode).print(OS);
+ else if (isDerivedType()) {
+ DIDerivedType DTy =3D DIDerivedType(DbgNode);
+ DTy.print(OS);
+ DICompositeType CTy =3D getDICompositeType(DTy);
+ if (CTy.Verify())
+ CTy.print(OS);
+ }
else if (isCompositeType())
DICompositeType(DbgNode).print(OS);
else {
@@ -698,7 +758,9 @@
=20
/// print - Print derived type.
void DIDerivedType::print(raw_ostream &OS) const {
- OS << "\n\t Derived From: "; getTypeDerivedFrom().print(OS);
+ OS << "\n\t Derived From: ";
+ getTypeDerivedFrom().print(OS);
+ OS << "\n\t";
}
=20
/// print - Print composite type.
@@ -725,6 +787,9 @@
if (isDefinition())
OS << " [def] ";
=20
+ if (getScopeLineNumber() !=3D getLineNumber())
+ OS << " [Scope: " << getScopeLineNumber() << "] ";
+
OS << "\n";
}
=20
@@ -927,9 +992,30 @@
=20
/// processModule - Process entire module and collect debug info.
void DebugInfoFinder::processModule(Module &M) {
- if (NamedMDNode *CU_Nodes =3D M.getNamedMetadata("llvm.dbg.cu"))
- for (unsigned i =3D 0, e =3D CU_Nodes->getNumOperands(); i !=3D e; ++i)
- addCompileUnit(DICompileUnit(CU_Nodes->getOperand(i)));
+ if (NamedMDNode *CU_Nodes =3D M.getNamedMetadata("llvm.dbg.cu")) {
+ for (unsigned i =3D 0, e =3D CU_Nodes->getNumOperands(); i !=3D e; ++i=
) {
+ DICompileUnit CU(CU_Nodes->getOperand(i));
+ addCompileUnit(CU);
+ if (CU.getVersion() > LLVMDebugVersion10) {
+ DIArray GVs =3D CU.getGlobalVariables();
+ for (unsigned i =3D 0, e =3D GVs.getNumElements(); i !=3D e; ++i) {
+ DIGlobalVariable DIG(GVs.getElement(i));
+ if (addGlobalVariable(DIG))
+ processType(DIG.getType());
+ }
+ DIArray SPs =3D CU.getSubprograms();
+ for (unsigned i =3D 0, e =3D SPs.getNumElements(); i !=3D e; ++i)
+ processSubprogram(DISubprogram(SPs.getElement(i)));
+ DIArray EnumTypes =3D CU.getEnumTypes();
+ for (unsigned i =3D 0, e =3D EnumTypes.getNumElements(); i !=3D e;=
++i)
+ processType(DIType(EnumTypes.getElement(i)));
+ DIArray RetainedTypes =3D CU.getRetainedTypes();
+ for (unsigned i =3D 0, e =3D RetainedTypes.getNumElements(); i !=
=3D e; ++i)
+ processType(DIType(RetainedTypes.getElement(i)));
+ return;
+ }
+ }
+ }
=20
for (Module::iterator I =3D M.begin(), E =3D M.end(); I !=3D E; ++I)
for (Function::iterator FI =3D (*I).begin(), FE =3D (*I).end(); FI !=
=3D FE; ++FI)
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/Dominan=
ceFrontier.cpp
--- a/head/contrib/llvm/lib/Analysis/DominanceFrontier.cpp Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/DominanceFrontier.cpp Tue Apr 17 11:51=
:51 2012 +0300
@@ -35,6 +35,8 @@
};
}
=20
+void DominanceFrontier::anchor() { }
+
const DominanceFrontier::DomSetType &
DominanceFrontier::calculate(const DominatorTree &DT,
const DomTreeNode *Node) {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/IPA/Cal=
lGraph.cpp
--- a/head/contrib/llvm/lib/Analysis/IPA/CallGraph.cpp Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/IPA/CallGraph.cpp Tue Apr 17 11:51:51 =
2012 +0300
@@ -127,16 +127,9 @@
}
}
=20
- // Loop over all of the users of the function, looking for non-call us=
es.
- for (Value::use_iterator I =3D F->use_begin(), E =3D F->use_end(); I !=
=3D E; ++I){
- User *U =3D *I;
- if ((!isa<CallInst>(U) && !isa<InvokeInst>(U))
- || !CallSite(cast<Instruction>(U)).isCallee(I)) {
- // Not a call, or being used as a parameter rather than as the cal=
lee.
- ExternalCallingNode->addCalledFunction(CallSite(), Node);
- break;
- }
- }
+ // If this function has its address taken, anything could call it.
+ if (F->hasAddressTaken())
+ ExternalCallingNode->addCalledFunction(CallSite(), Node);
=20
// If this function is not defined in this translation unit, it could =
call
// anything.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/IPA/Glo=
balsModRef.cpp
--- a/head/contrib/llvm/lib/Analysis/IPA/GlobalsModRef.cpp Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/IPA/GlobalsModRef.cpp Tue Apr 17 11:51=
:51 2012 +0300
@@ -21,6 +21,7 @@
#include "llvm/Instructions.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
+#include "llvm/IntrinsicInst.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/CallGraph.h"
#include "llvm/Analysis/MemoryBuiltins.h"
@@ -467,6 +468,11 @@
} else if (isMalloc(&cast<Instruction>(*II)) ||
isFreeCall(&cast<Instruction>(*II))) {
FunctionEffect |=3D ModRef;
+ } else if (IntrinsicInst *Intrinsic =3D dyn_cast<IntrinsicInst>(&*=
II)) {
+ // The callgraph doesn't include intrinsic calls.
+ Function *Callee =3D Intrinsic->getCalledFunction();
+ ModRefBehavior Behaviour =3D AliasAnalysis::getModRefBehavior(Ca=
llee);
+ FunctionEffect |=3D (Behaviour & ModRef);
}
=20
if ((FunctionEffect & Mod) =3D=3D 0)
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/IVUsers=
.cpp
--- a/head/contrib/llvm/lib/Analysis/IVUsers.cpp Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/llvm/lib/Analysis/IVUsers.cpp Tue Apr 17 11:51:51 2012 +=
0300
@@ -79,10 +79,44 @@
return false;
}
=20
-/// AddUsersIfInteresting - Inspect the specified instruction. If it is a
+/// Return true if all loop headers that dominate this block are in simpli=
fied
+/// form.
+static bool isSimplifiedLoopNest(BasicBlock *BB, const DominatorTree *DT,
+ const LoopInfo *LI,
+ SmallPtrSet<Loop*,16> &SimpleLoopNests) {
+ Loop *NearestLoop =3D 0;
+ for (DomTreeNode *Rung =3D DT->getNode(BB);
+ Rung; Rung =3D Rung->getIDom()) {
+ BasicBlock *DomBB =3D Rung->getBlock();
+ Loop *DomLoop =3D LI->getLoopFor(DomBB);
+ if (DomLoop && DomLoop->getHeader() =3D=3D DomBB) {
+ // If the domtree walk reaches a loop with no preheader, return fals=
e.
+ if (!DomLoop->isLoopSimplifyForm())
+ return false;
+ // If we have already checked this loop nest, stop checking.
+ if (SimpleLoopNests.count(DomLoop))
+ break;
+ // If we have not already checked this loop nest, remember the loop
+ // header nearest to BB. The nearest loop may not contain BB.
+ if (!NearestLoop)
+ NearestLoop =3D DomLoop;
+ }
+ }
+ if (NearestLoop)
+ SimpleLoopNests.insert(NearestLoop);
+ return true;
+}
+
+/// AddUsersImpl - Inspect the specified instruction. If it is a
/// reducible SCEV, recursively add its users to the IVUsesByStride set and
/// return true. Otherwise, return false.
-bool IVUsers::AddUsersIfInteresting(Instruction *I) {
+bool IVUsers::AddUsersImpl(Instruction *I,
+ SmallPtrSet<Loop*,16> &SimpleLoopNests) {
+ // Add this IV user to the Processed set before returning false to ensur=
e that
+ // all IV users are members of the set. See IVUsers::isIVUserOrOperand.
+ if (!Processed.insert(I))
+ return true; // Instruction already handled.
+
if (!SE->isSCEVable(I->getType()))
return false; // Void and FP expressions cannot be reduced.
=20
@@ -93,9 +127,6 @@
if (Width > 64 || (TD && !TD->isLegalInteger(Width)))
return false;
=20
- if (!Processed.insert(I))
- return true; // Instruction already handled.
-
// Get the symbolic expression for this instruction.
const SCEV *ISE =3D SE->getSCEV(I);
=20
@@ -115,6 +146,18 @@
if (isa<PHINode>(User) && Processed.count(User))
continue;
=20
+ // Only consider IVUsers that are dominated by simplified loop
+ // headers. Otherwise, SCEVExpander will crash.
+ BasicBlock *UseBB =3D User->getParent();
+ // A phi's use is live out of its predecessor block.
+ if (PHINode *PHI =3D dyn_cast<PHINode>(User)) {
+ unsigned OperandNo =3D UI.getOperandNo();
+ unsigned ValNo =3D PHINode::getIncomingValueNumForOperand(OperandNo);
+ UseBB =3D PHI->getIncomingBlock(ValNo);
+ }
+ if (!isSimplifiedLoopNest(UseBB, DT, LI, SimpleLoopNests))
+ return false;
+
// Descend recursively, but not into PHI nodes outside the current loo=
p.
// It's important to see the entire expression outside the loop to get
// choices that depend on addressing mode use right, although we won't
@@ -124,12 +167,12 @@
bool AddUserToIVUsers =3D false;
if (LI->getLoopFor(User->getParent()) !=3D L) {
if (isa<PHINode>(User) || Processed.count(User) ||
- !AddUsersIfInteresting(User)) {
+ !AddUsersImpl(User, SimpleLoopNests)) {
DEBUG(dbgs() << "FOUND USER in other loop: " << *User << '\n'
<< " OF SCEV: " << *ISE << '\n');
AddUserToIVUsers =3D true;
}
- } else if (Processed.count(User) || !AddUsersIfInteresting(User)) {
+ } else if (Processed.count(User) || !AddUsersImpl(User, SimpleLoopNest=
s)) {
DEBUG(dbgs() << "FOUND USER: " << *User << '\n'
<< " OF SCEV: " << *ISE << '\n');
AddUserToIVUsers =3D true;
@@ -153,6 +196,15 @@
return true;
}
=20
+bool IVUsers::AddUsersIfInteresting(Instruction *I) {
+ // SCEVExpander can only handle users that are dominated by simplified l=
oop
+ // entries. Keep track of all loops that are only dominated by other sim=
ple
+ // loops so we don't traverse the domtree for each user.
+ SmallPtrSet<Loop*,16> SimpleLoopNests;
+
+ return AddUsersImpl(I, SimpleLoopNests);
+}
+
IVStrideUse &IVUsers::AddUser(Instruction *User, Value *Operand) {
IVUses.push_back(new IVStrideUse(this, User, Operand));
return IVUses.back();
@@ -268,6 +320,7 @@
=20
void IVStrideUse::deleted() {
// Remove this user from the list.
+ Parent->Processed.erase(this->getUser());
Parent->IVUses.erase(this);
// this now dangles!
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/InlineC=
ost.cpp
--- a/head/contrib/llvm/lib/Analysis/InlineCost.cpp Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/lib/Analysis/InlineCost.cpp Tue Apr 17 11:51:51 201=
2 +0300
@@ -11,645 +11,1012 @@
//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
+#define DEBUG_TYPE "inline-cost"
#include "llvm/Analysis/InlineCost.h"
+#include "llvm/Analysis/ConstantFolding.h"
+#include "llvm/Analysis/InstructionSimplify.h"
#include "llvm/Support/CallSite.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/InstVisitor.h"
+#include "llvm/Support/GetElementPtrTypeIterator.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/CallingConv.h"
#include "llvm/IntrinsicInst.h"
+#include "llvm/Operator.h"
+#include "llvm/GlobalAlias.h"
#include "llvm/Target/TargetData.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/SetVector.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/ADT/Statistic.h"
=20
using namespace llvm;
=20
-/// callIsSmall - If a call is likely to lower to a single target instruct=
ion,
-/// or is otherwise deemed small return true.
-/// TODO: Perhaps calls like memcpy, strcpy, etc?
-bool llvm::callIsSmall(const Function *F) {
- if (!F) return false;
+STATISTIC(NumCallsAnalyzed, "Number of call sites analyzed");
=20
- if (F->hasLocalLinkage()) return false;
+namespace {
=20
- if (!F->hasName()) return false;
+class CallAnalyzer : public InstVisitor<CallAnalyzer, bool> {
+ typedef InstVisitor<CallAnalyzer, bool> Base;
+ friend class InstVisitor<CallAnalyzer, bool>;
=20
- StringRef Name =3D F->getName();
+ // TargetData if available, or null.
+ const TargetData *const TD;
=20
- // These will all likely lower to a single selection DAG node.
- if (Name =3D=3D "copysign" || Name =3D=3D "copysignf" || Name =3D=3D "co=
pysignl" ||
- Name =3D=3D "fabs" || Name =3D=3D "fabsf" || Name =3D=3D "fabsl" ||
- Name =3D=3D "sin" || Name =3D=3D "sinf" || Name =3D=3D "sinl" ||
- Name =3D=3D "cos" || Name =3D=3D "cosf" || Name =3D=3D "cosl" ||
- Name =3D=3D "sqrt" || Name =3D=3D "sqrtf" || Name =3D=3D "sqrtl" )
+ // The called function.
+ Function &F;
+
+ int Threshold;
+ int Cost;
+ const bool AlwaysInline;
+
+ bool IsRecursive;
+ bool ExposesReturnsTwice;
+ bool HasDynamicAlloca;
+ unsigned NumInstructions, NumVectorInstructions;
+ int FiftyPercentVectorBonus, TenPercentVectorBonus;
+ int VectorBonus;
+
+ // While we walk the potentially-inlined instructions, we build up and
+ // maintain a mapping of simplified values specific to this callsite. The
+ // idea is to propagate any special information we have about arguments =
to
+ // this call through the inlinable section of the function, and account =
for
+ // likely simplifications post-inlining. The most important aspect we tr=
ack
+ // is CFG altering simplifications -- when we prove a basic block dead, =
that
+ // can cause dramatic shifts in the cost of inlining a function.
+ DenseMap<Value *, Constant *> SimplifiedValues;
+
+ // Keep track of the values which map back (through function arguments) =
to
+ // allocas on the caller stack which could be simplified through SROA.
+ DenseMap<Value *, Value *> SROAArgValues;
+
+ // The mapping of caller Alloca values to their accumulated cost savings=
. If
+ // we have to disable SROA for one of the allocas, this tells us how much
+ // cost must be added.
+ DenseMap<Value *, int> SROAArgCosts;
+
+ // Keep track of values which map to a pointer base and constant offset.
+ DenseMap<Value *, std::pair<Value *, APInt> > ConstantOffsetPtrs;
+
+ // Custom simplification helper routines.
+ bool isAllocaDerivedArg(Value *V);
+ bool lookupSROAArgAndCost(Value *V, Value *&Arg,
+ DenseMap<Value *, int>::iterator &CostIt);
+ void disableSROA(DenseMap<Value *, int>::iterator CostIt);
+ void disableSROA(Value *V);
+ void accumulateSROACost(DenseMap<Value *, int>::iterator CostIt,
+ int InstructionCost);
+ bool handleSROACandidate(bool IsSROAValid,
+ DenseMap<Value *, int>::iterator CostIt,
+ int InstructionCost);
+ bool isGEPOffsetConstant(GetElementPtrInst &GEP);
+ bool accumulateGEPOffset(GEPOperator &GEP, APInt &Offset);
+ ConstantInt *stripAndComputeInBoundsConstantOffsets(Value *&V);
+
+ // Custom analysis routines.
+ bool analyzeBlock(BasicBlock *BB);
+
+ // Disable several entry points to the visitor so we don't accidentally =
use
+ // them by declaring but not defining them here.
+ void visit(Module *); void visit(Module &);
+ void visit(Function *); void visit(Function &);
+ void visit(BasicBlock *); void visit(BasicBlock &);
+
+ // Provide base case for our instruction visit.
+ bool visitInstruction(Instruction &I);
+
+ // Our visit overrides.
+ bool visitAlloca(AllocaInst &I);
+ bool visitPHI(PHINode &I);
+ bool visitGetElementPtr(GetElementPtrInst &I);
+ bool visitBitCast(BitCastInst &I);
+ bool visitPtrToInt(PtrToIntInst &I);
+ bool visitIntToPtr(IntToPtrInst &I);
+ bool visitCastInst(CastInst &I);
+ bool visitUnaryInstruction(UnaryInstruction &I);
+ bool visitICmp(ICmpInst &I);
+ bool visitSub(BinaryOperator &I);
+ bool visitBinaryOperator(BinaryOperator &I);
+ bool visitLoad(LoadInst &I);
+ bool visitStore(StoreInst &I);
+ bool visitCallSite(CallSite CS);
+
+public:
+ CallAnalyzer(const TargetData *TD, Function &Callee, int Threshold)
+ : TD(TD), F(Callee), Threshold(Threshold), Cost(0),
+ AlwaysInline(F.hasFnAttr(Attribute::AlwaysInline)),
+ IsRecursive(false), ExposesReturnsTwice(false), HasDynamicAlloca(fal=
se),
+ NumInstructions(0), NumVectorInstructions(0),
+ FiftyPercentVectorBonus(0), TenPercentVectorBonus(0), VectorBonus(0),
+ NumConstantArgs(0), NumConstantOffsetPtrArgs(0), NumAllocaArgs(0),
+ NumConstantPtrCmps(0), NumConstantPtrDiffs(0),
+ NumInstructionsSimplified(0), SROACostSavings(0), SROACostSavingsLos=
t(0) {
+ }
+
+ bool analyzeCall(CallSite CS);
+
+ int getThreshold() { return Threshold; }
+ int getCost() { return Cost; }
+
+ // Keep a bunch of stats about the cost savings found so we can print th=
em
+ // out when debugging.
+ unsigned NumConstantArgs;
+ unsigned NumConstantOffsetPtrArgs;
+ unsigned NumAllocaArgs;
+ unsigned NumConstantPtrCmps;
+ unsigned NumConstantPtrDiffs;
+ unsigned NumInstructionsSimplified;
+ unsigned SROACostSavings;
+ unsigned SROACostSavingsLost;
+
+ void dump();
+};
+
+} // namespace
+
+/// \brief Test whether the given value is an Alloca-derived function argu=
ment.
+bool CallAnalyzer::isAllocaDerivedArg(Value *V) {
+ return SROAArgValues.count(V);
+}
+
+/// \brief Lookup the SROA-candidate argument and cost iterator which V ma=
ps to.
+/// Returns false if V does not map to a SROA-candidate.
+bool CallAnalyzer::lookupSROAArgAndCost(
+ Value *V, Value *&Arg, DenseMap<Value *, int>::iterator &CostIt) {
+ if (SROAArgValues.empty() || SROAArgCosts.empty())
+ return false;
+
+ DenseMap<Value *, Value *>::iterator ArgIt =3D SROAArgValues.find(V);
+ if (ArgIt =3D=3D SROAArgValues.end())
+ return false;
+
+ Arg =3D ArgIt->second;
+ CostIt =3D SROAArgCosts.find(Arg);
+ return CostIt !=3D SROAArgCosts.end();
+}
+
+/// \brief Disable SROA for the candidate marked by this cost iterator.
+///
+/// This markes the candidate as no longer viable for SROA, and adds the c=
ost
+/// savings associated with it back into the inline cost measurement.
+void CallAnalyzer::disableSROA(DenseMap<Value *, int>::iterator CostIt) {
+ // If we're no longer able to perform SROA we need to undo its cost savi=
ngs
+ // and prevent subsequent analysis.
+ Cost +=3D CostIt->second;
+ SROACostSavings -=3D CostIt->second;
+ SROACostSavingsLost +=3D CostIt->second;
+ SROAArgCosts.erase(CostIt);
+}
+
+/// \brief If 'V' maps to a SROA candidate, disable SROA for it.
+void CallAnalyzer::disableSROA(Value *V) {
+ Value *SROAArg;
+ DenseMap<Value *, int>::iterator CostIt;
+ if (lookupSROAArgAndCost(V, SROAArg, CostIt))
+ disableSROA(CostIt);
+}
+
+/// \brief Accumulate the given cost for a particular SROA candidate.
+void CallAnalyzer::accumulateSROACost(DenseMap<Value *, int>::iterator Cos=
tIt,
+ int InstructionCost) {
+ CostIt->second +=3D InstructionCost;
+ SROACostSavings +=3D InstructionCost;
+}
+
+/// \brief Helper for the common pattern of handling a SROA candidate.
+/// Either accumulates the cost savings if the SROA remains valid, or disa=
bles
+/// SROA for the candidate.
+bool CallAnalyzer::handleSROACandidate(bool IsSROAValid,
+ DenseMap<Value *, int>::iterator Co=
stIt,
+ int InstructionCost) {
+ if (IsSROAValid) {
+ accumulateSROACost(CostIt, InstructionCost);
+ return true;
+ }
+
+ disableSROA(CostIt);
+ return false;
+}
+
+/// \brief Check whether a GEP's indices are all constant.
+///
+/// Respects any simplified values known during the analysis of this calls=
ite.
+bool CallAnalyzer::isGEPOffsetConstant(GetElementPtrInst &GEP) {
+ for (User::op_iterator I =3D GEP.idx_begin(), E =3D GEP.idx_end(); I !=
=3D E; ++I)
+ if (!isa<Constant>(*I) && !SimplifiedValues.lookup(*I))
+ return false;
+
+ return true;
+}
+
+/// \brief Accumulate a constant GEP offset into an APInt if possible.
+///
+/// Returns false if unable to compute the offset for any reason. Respects=
any
+/// simplified values known during the analysis of this callsite.
+bool CallAnalyzer::accumulateGEPOffset(GEPOperator &GEP, APInt &Offset) {
+ if (!TD)
+ return false;
+
+ unsigned IntPtrWidth =3D TD->getPointerSizeInBits();
+ assert(IntPtrWidth =3D=3D Offset.getBitWidth());
+
+ for (gep_type_iterator GTI =3D gep_type_begin(GEP), GTE =3D gep_type_end=
(GEP);
+ GTI !=3D GTE; ++GTI) {
+ ConstantInt *OpC =3D dyn_cast<ConstantInt>(GTI.getOperand());
+ if (!OpC)
+ if (Constant *SimpleOp =3D SimplifiedValues.lookup(GTI.getOperand()))
+ OpC =3D dyn_cast<ConstantInt>(SimpleOp);
+ if (!OpC)
+ return false;
+ if (OpC->isZero()) continue;
+
+ // Handle a struct index, which adds its field offset to the pointer.
+ if (StructType *STy =3D dyn_cast<StructType>(*GTI)) {
+ unsigned ElementIdx =3D OpC->getZExtValue();
+ const StructLayout *SL =3D TD->getStructLayout(STy);
+ Offset +=3D APInt(IntPtrWidth, SL->getElementOffset(ElementIdx));
+ continue;
+ }
+
+ APInt TypeSize(IntPtrWidth, TD->getTypeAllocSize(GTI.getIndexedType())=
);
+ Offset +=3D OpC->getValue().sextOrTrunc(IntPtrWidth) * TypeSize;
+ }
+ return true;
+}
+
+bool CallAnalyzer::visitAlloca(AllocaInst &I) {
+ // FIXME: Check whether inlining will turn a dynamic alloca into a static
+ // alloca, and handle that case.
+
+ // We will happily inline static alloca instructions or dynamic alloca
+ // instructions in always-inline situations.
+ if (AlwaysInline || I.isStaticAlloca())
+ return Base::visitAlloca(I);
+
+ // FIXME: This is overly conservative. Dynamic allocas are inefficient f=
or
+ // a variety of reasons, and so we would like to not inline them into
+ // functions which don't currently have a dynamic alloca. This simply
+ // disables inlining altogether in the presence of a dynamic alloca.
+ HasDynamicAlloca =3D true;
+ return false;
+}
+
+bool CallAnalyzer::visitPHI(PHINode &I) {
+ // FIXME: We should potentially be tracking values through phi nodes,
+ // especially when they collapse to a single value due to deleted CFG ed=
ges
+ // during inlining.
+
+ // FIXME: We need to propagate SROA *disabling* through phi nodes, even
+ // though we don't want to propagate it's bonuses. The idea is to disable
+ // SROA if it *might* be used in an inappropriate manner.
+
+ // Phi nodes are always zero-cost.
+ return true;
+}
+
+bool CallAnalyzer::visitGetElementPtr(GetElementPtrInst &I) {
+ Value *SROAArg;
+ DenseMap<Value *, int>::iterator CostIt;
+ bool SROACandidate =3D lookupSROAArgAndCost(I.getPointerOperand(),
+ SROAArg, CostIt);
+
+ // Try to fold GEPs of constant-offset call site argument pointers. This
+ // requires target data and inbounds GEPs.
+ if (TD && I.isInBounds()) {
+ // Check if we have a base + offset for the pointer.
+ Value *Ptr =3D I.getPointerOperand();
+ std::pair<Value *, APInt> BaseAndOffset =3D ConstantOffsetPtrs.lookup(=
Ptr);
+ if (BaseAndOffset.first) {
+ // Check if the offset of this GEP is constant, and if so accumulate=
it
+ // into Offset.
+ if (!accumulateGEPOffset(cast<GEPOperator>(I), BaseAndOffset.second)=
) {
+ // Non-constant GEPs aren't folded, and disable SROA.
+ if (SROACandidate)
+ disableSROA(CostIt);
+ return false;
+ }
+
+ // Add the result as a new mapping to Base + Offset.
+ ConstantOffsetPtrs[&I] =3D BaseAndOffset;
+
+ // Also handle SROA candidates here, we already know that the GEP is
+ // all-constant indexed.
+ if (SROACandidate)
+ SROAArgValues[&I] =3D SROAArg;
+
+ return true;
+ }
+ }
+
+ if (isGEPOffsetConstant(I)) {
+ if (SROACandidate)
+ SROAArgValues[&I] =3D SROAArg;
+
+ // Constant GEPs are modeled as free.
+ return true;
+ }
+
+ // Variable GEPs will require math and will disable SROA.
+ if (SROACandidate)
+ disableSROA(CostIt);
+ return false;
+}
+
+bool CallAnalyzer::visitBitCast(BitCastInst &I) {
+ // Propagate constants through bitcasts.
+ if (Constant *COp =3D dyn_cast<Constant>(I.getOperand(0)))
+ if (Constant *C =3D ConstantExpr::getBitCast(COp, I.getType())) {
+ SimplifiedValues[&I] =3D C;
+ return true;
+ }
+
+ // Track base/offsets through casts
+ std::pair<Value *, APInt> BaseAndOffset
+ =3D ConstantOffsetPtrs.lookup(I.getOperand(0));
+ // Casts don't change the offset, just wrap it up.
+ if (BaseAndOffset.first)
+ ConstantOffsetPtrs[&I] =3D BaseAndOffset;
+
+ // Also look for SROA candidates here.
+ Value *SROAArg;
+ DenseMap<Value *, int>::iterator CostIt;
+ if (lookupSROAArgAndCost(I.getOperand(0), SROAArg, CostIt))
+ SROAArgValues[&I] =3D SROAArg;
+
+ // Bitcasts are always zero cost.
+ return true;
+}
+
+bool CallAnalyzer::visitPtrToInt(PtrToIntInst &I) {
+ // Propagate constants through ptrtoint.
+ if (Constant *COp =3D dyn_cast<Constant>(I.getOperand(0)))
+ if (Constant *C =3D ConstantExpr::getPtrToInt(COp, I.getType())) {
+ SimplifiedValues[&I] =3D C;
+ return true;
+ }
+
+ // Track base/offset pairs when converted to a plain integer provided the
+ // integer is large enough to represent the pointer.
+ unsigned IntegerSize =3D I.getType()->getScalarSizeInBits();
+ if (TD && IntegerSize >=3D TD->getPointerSizeInBits()) {
+ std::pair<Value *, APInt> BaseAndOffset
+ =3D ConstantOffsetPtrs.lookup(I.getOperand(0));
+ if (BaseAndOffset.first)
+ ConstantOffsetPtrs[&I] =3D BaseAndOffset;
+ }
+
+ // This is really weird. Technically, ptrtoint will disable SROA. Howeve=
r,
+ // unless that ptrtoint is *used* somewhere in the live basic blocks aft=
er
+ // inlining, it will be nuked, and SROA should proceed. All of the uses =
which
+ // would block SROA would also block SROA if applied directly to a point=
er,
+ // and so we can just add the integer in here. The only places where SRO=
A is
+ // preserved either cannot fire on an integer, or won't in-and-of themse=
lves
+ // disable SROA (ext) w/o some later use that we would see and disable.
+ Value *SROAArg;
+ DenseMap<Value *, int>::iterator CostIt;
+ if (lookupSROAArgAndCost(I.getOperand(0), SROAArg, CostIt))
+ SROAArgValues[&I] =3D SROAArg;
+
+ // A ptrtoint cast is free so long as the result is large enough to stor=
e the
+ // pointer, and a legal integer type.
+ return TD && TD->isLegalInteger(IntegerSize) &&
+ IntegerSize >=3D TD->getPointerSizeInBits();
+}
+
+bool CallAnalyzer::visitIntToPtr(IntToPtrInst &I) {
+ // Propagate constants through ptrtoint.
+ if (Constant *COp =3D dyn_cast<Constant>(I.getOperand(0)))
+ if (Constant *C =3D ConstantExpr::getIntToPtr(COp, I.getType())) {
+ SimplifiedValues[&I] =3D C;
+ return true;
+ }
+
+ // Track base/offset pairs when round-tripped through a pointer without
+ // modifications provided the integer is not too large.
+ Value *Op =3D I.getOperand(0);
+ unsigned IntegerSize =3D Op->getType()->getScalarSizeInBits();
+ if (TD && IntegerSize <=3D TD->getPointerSizeInBits()) {
+ std::pair<Value *, APInt> BaseAndOffset =3D ConstantOffsetPtrs.lookup(=
Op);
+ if (BaseAndOffset.first)
+ ConstantOffsetPtrs[&I] =3D BaseAndOffset;
+ }
+
+ // "Propagate" SROA here in the same manner as we do for ptrtoint above.
+ Value *SROAArg;
+ DenseMap<Value *, int>::iterator CostIt;
+ if (lookupSROAArgAndCost(Op, SROAArg, CostIt))
+ SROAArgValues[&I] =3D SROAArg;
+
+ // An inttoptr cast is free so long as the input is a legal integer type
+ // which doesn't contain values outside the range of a pointer.
+ return TD && TD->isLegalInteger(IntegerSize) &&
+ IntegerSize <=3D TD->getPointerSizeInBits();
+}
+
+bool CallAnalyzer::visitCastInst(CastInst &I) {
+ // Propagate constants through ptrtoint.
+ if (Constant *COp =3D dyn_cast<Constant>(I.getOperand(0)))
+ if (Constant *C =3D ConstantExpr::getCast(I.getOpcode(), COp, I.getTyp=
e())) {
+ SimplifiedValues[&I] =3D C;
+ return true;
+ }
+
+ // Disable SROA in the face of arbitrary casts we don't whitelist elsewh=
ere.
+ disableSROA(I.getOperand(0));
+
+ // No-op casts don't have any cost.
+ if (I.isLosslessCast())
return true;
=20
- // These are all likely to be optimized into something smaller.
- if (Name =3D=3D "pow" || Name =3D=3D "powf" || Name =3D=3D "powl" ||
- Name =3D=3D "exp2" || Name =3D=3D "exp2l" || Name =3D=3D "exp2f" ||
- Name =3D=3D "floor" || Name =3D=3D "floorf" || Name =3D=3D "ceil" ||
- Name =3D=3D "round" || Name =3D=3D "ffs" || Name =3D=3D "ffsl" ||
- Name =3D=3D "abs" || Name =3D=3D "labs" || Name =3D=3D "llabs")
+ // trunc to a native type is free (assuming the target has compare and
+ // shift-right of the same width).
+ if (TD && isa<TruncInst>(I) &&
+ TD->isLegalInteger(TD->getTypeSizeInBits(I.getType())))
return true;
=20
+ // Result of a cmp instruction is often extended (to be used by other
+ // cmp instructions, logical or return instructions). These are usually
+ // no-ops on most sane targets.
+ if (isa<CmpInst>(I.getOperand(0)))
+ return true;
+
+ // Assume the rest of the casts require work.
+ return false;
+}
+
+bool CallAnalyzer::visitUnaryInstruction(UnaryInstruction &I) {
+ Value *Operand =3D I.getOperand(0);
+ Constant *Ops[1] =3D { dyn_cast<Constant>(Operand) };
+ if (Ops[0] || (Ops[0] =3D SimplifiedValues.lookup(Operand)))
+ if (Constant *C =3D ConstantFoldInstOperands(I.getOpcode(), I.getType(=
),
+ Ops, TD)) {
+ SimplifiedValues[&I] =3D C;
+ return true;
+ }
+
+ // Disable any SROA on the argument to arbitrary unary operators.
+ disableSROA(Operand);
+
return false;
}
=20
-/// analyzeBasicBlock - Fill in the current structure with information gle=
aned
-/// from the specified block.
-void CodeMetrics::analyzeBasicBlock(const BasicBlock *BB,
- const TargetData *TD) {
- ++NumBlocks;
- unsigned NumInstsBeforeThisBB =3D NumInsts;
- for (BasicBlock::const_iterator II =3D BB->begin(), E =3D BB->end();
- II !=3D E; ++II) {
- if (isa<PHINode>(II)) continue; // PHI nodes don't count.
-
- // Special handling for calls.
- if (isa<CallInst>(II) || isa<InvokeInst>(II)) {
- if (isa<DbgInfoIntrinsic>(II))
- continue; // Debug intrinsics don't count as size.
-
- ImmutableCallSite CS(cast<Instruction>(II));
-
- if (const Function *F =3D CS.getCalledFunction()) {
- // If a function is both internal and has a single use, then it is
- // extremely likely to get inlined in the future (it was probably
- // exposed by an interleaved devirtualization pass).
- if (F->hasInternalLinkage() && F->hasOneUse())
- ++NumInlineCandidates;
-
- // If this call is to function itself, then the function is recurs=
ive.
- // Inlining it into other functions is a bad idea, because this is
- // basically just a form of loop peeling, and our metrics aren't u=
seful
- // for that case.
- if (F =3D=3D BB->getParent())
- isRecursive =3D true;
+bool CallAnalyzer::visitICmp(ICmpInst &I) {
+ Value *LHS =3D I.getOperand(0), *RHS =3D I.getOperand(1);
+ // First try to handle simplified comparisons.
+ if (!isa<Constant>(LHS))
+ if (Constant *SimpleLHS =3D SimplifiedValues.lookup(LHS))
+ LHS =3D SimpleLHS;
+ if (!isa<Constant>(RHS))
+ if (Constant *SimpleRHS =3D SimplifiedValues.lookup(RHS))
+ RHS =3D SimpleRHS;
+ if (Constant *CLHS =3D dyn_cast<Constant>(LHS))
+ if (Constant *CRHS =3D dyn_cast<Constant>(RHS))
+ if (Constant *C =3D ConstantExpr::getICmp(I.getPredicate(), CLHS, CR=
HS)) {
+ SimplifiedValues[&I] =3D C;
+ return true;
}
=20
- if (!isa<IntrinsicInst>(II) && !callIsSmall(CS.getCalledFunction()))=
{
- // Each argument to a call takes on average one instruction to set=
up.
- NumInsts +=3D CS.arg_size();
+ // Otherwise look for a comparison between constant offset pointers with
+ // a common base.
+ Value *LHSBase, *RHSBase;
+ APInt LHSOffset, RHSOffset;
+ llvm::tie(LHSBase, LHSOffset) =3D ConstantOffsetPtrs.lookup(LHS);
+ if (LHSBase) {
+ llvm::tie(RHSBase, RHSOffset) =3D ConstantOffsetPtrs.lookup(RHS);
+ if (RHSBase && LHSBase =3D=3D RHSBase) {
+ // We have common bases, fold the icmp to a constant based on the
+ // offsets.
+ Constant *CLHS =3D ConstantInt::get(LHS->getContext(), LHSOffset);
+ Constant *CRHS =3D ConstantInt::get(RHS->getContext(), RHSOffset);
+ if (Constant *C =3D ConstantExpr::getICmp(I.getPredicate(), CLHS, CR=
HS)) {
+ SimplifiedValues[&I] =3D C;
+ ++NumConstantPtrCmps;
+ return true;
+ }
+ }
+ }
=20
- // We don't want inline asm to count as a call - that would preven=
t loop
- // unrolling. The argument setup cost is still real, though.
- if (!isa<InlineAsm>(CS.getCalledValue()))
- ++NumCalls;
+ // If the comparison is an equality comparison with null, we can simplif=
y it
+ // for any alloca-derived argument.
+ if (I.isEquality() && isa<ConstantPointerNull>(I.getOperand(1)))
+ if (isAllocaDerivedArg(I.getOperand(0))) {
+ // We can actually predict the result of comparisons between an
+ // alloca-derived value and null. Note that this fires regardless of
+ // SROA firing.
+ bool IsNotEqual =3D I.getPredicate() =3D=3D CmpInst::ICMP_NE;
+ SimplifiedValues[&I] =3D IsNotEqual ? ConstantInt::getTrue(I.getType=
())
+ : ConstantInt::getFalse(I.getType(=
));
+ return true;
+ }
+
+ // Finally check for SROA candidates in comparisons.
+ Value *SROAArg;
+ DenseMap<Value *, int>::iterator CostIt;
+ if (lookupSROAArgAndCost(I.getOperand(0), SROAArg, CostIt)) {
+ if (isa<ConstantPointerNull>(I.getOperand(1))) {
+ accumulateSROACost(CostIt, InlineConstants::InstrCost);
+ return true;
+ }
+
+ disableSROA(CostIt);
+ }
+
+ return false;
+}
+
+bool CallAnalyzer::visitSub(BinaryOperator &I) {
+ // Try to handle a special case: we can fold computing the difference of=
two
+ // constant-related pointers.
+ Value *LHS =3D I.getOperand(0), *RHS =3D I.getOperand(1);
+ Value *LHSBase, *RHSBase;
+ APInt LHSOffset, RHSOffset;
+ llvm::tie(LHSBase, LHSOffset) =3D ConstantOffsetPtrs.lookup(LHS);
+ if (LHSBase) {
+ llvm::tie(RHSBase, RHSOffset) =3D ConstantOffsetPtrs.lookup(RHS);
+ if (RHSBase && LHSBase =3D=3D RHSBase) {
+ // We have common bases, fold the subtract to a constant based on the
+ // offsets.
+ Constant *CLHS =3D ConstantInt::get(LHS->getContext(), LHSOffset);
+ Constant *CRHS =3D ConstantInt::get(RHS->getContext(), RHSOffset);
+ if (Constant *C =3D ConstantExpr::getSub(CLHS, CRHS)) {
+ SimplifiedValues[&I] =3D C;
+ ++NumConstantPtrDiffs;
+ return true;
+ }
+ }
+ }
+
+ // Otherwise, fall back to the generic logic for simplifying and handling
+ // instructions.
+ return Base::visitSub(I);
+}
+
+bool CallAnalyzer::visitBinaryOperator(BinaryOperator &I) {
+ Value *LHS =3D I.getOperand(0), *RHS =3D I.getOperand(1);
+ if (!isa<Constant>(LHS))
+ if (Constant *SimpleLHS =3D SimplifiedValues.lookup(LHS))
+ LHS =3D SimpleLHS;
+ if (!isa<Constant>(RHS))
+ if (Constant *SimpleRHS =3D SimplifiedValues.lookup(RHS))
+ RHS =3D SimpleRHS;
+ Value *SimpleV =3D SimplifyBinOp(I.getOpcode(), LHS, RHS, TD);
+ if (Constant *C =3D dyn_cast_or_null<Constant>(SimpleV)) {
+ SimplifiedValues[&I] =3D C;
+ return true;
+ }
+
+ // Disable any SROA on arguments to arbitrary, unsimplified binary opera=
tors.
+ disableSROA(LHS);
+ disableSROA(RHS);
+
+ return false;
+}
+
+bool CallAnalyzer::visitLoad(LoadInst &I) {
+ Value *SROAArg;
+ DenseMap<Value *, int>::iterator CostIt;
+ if (lookupSROAArgAndCost(I.getOperand(0), SROAArg, CostIt)) {
+ if (I.isSimple()) {
+ accumulateSROACost(CostIt, InlineConstants::InstrCost);
+ return true;
+ }
+
+ disableSROA(CostIt);
+ }
+
+ return false;
+}
+
+bool CallAnalyzer::visitStore(StoreInst &I) {
+ Value *SROAArg;
+ DenseMap<Value *, int>::iterator CostIt;
+ if (lookupSROAArgAndCost(I.getOperand(0), SROAArg, CostIt)) {
+ if (I.isSimple()) {
+ accumulateSROACost(CostIt, InlineConstants::InstrCost);
+ return true;
+ }
+
+ disableSROA(CostIt);
+ }
+
+ return false;
+}
+
+bool CallAnalyzer::visitCallSite(CallSite CS) {
+ if (CS.isCall() && cast<CallInst>(CS.getInstruction())->canReturnTwice()=
&&
+ !F.hasFnAttr(Attribute::ReturnsTwice)) {
+ // This aborts the entire analysis.
+ ExposesReturnsTwice =3D true;
+ return false;
+ }
+
+ if (IntrinsicInst *II =3D dyn_cast<IntrinsicInst>(CS.getInstruction())) {
+ switch (II->getIntrinsicID()) {
+ default:
+ return Base::visitCallSite(CS);
+
+ case Intrinsic::dbg_declare:
+ case Intrinsic::dbg_value:
+ case Intrinsic::invariant_start:
+ case Intrinsic::invariant_end:
+ case Intrinsic::lifetime_start:
+ case Intrinsic::lifetime_end:
+ case Intrinsic::memset:
+ case Intrinsic::memcpy:
+ case Intrinsic::memmove:
+ case Intrinsic::objectsize:
+ case Intrinsic::ptr_annotation:
+ case Intrinsic::var_annotation:
+ // SROA can usually chew through these intrinsics and they have no c=
ost
+ // so don't pay the price of analyzing them in detail.
+ return true;
+ }
+ }
+
+ if (Function *F =3D CS.getCalledFunction()) {
+ if (F =3D=3D CS.getInstruction()->getParent()->getParent()) {
+ // This flag will fully abort the analysis, so don't bother with any=
thing
+ // else.
+ IsRecursive =3D true;
+ return false;
+ }
+
+ if (!callIsSmall(F)) {
+ // We account for the average 1 instruction per call argument setup
+ // here.
+ Cost +=3D CS.arg_size() * InlineConstants::InstrCost;
+
+ // Everything other than inline ASM will also have a significant cost
+ // merely from making the call.
+ if (!isa<InlineAsm>(CS.getCalledValue()))
+ Cost +=3D InlineConstants::CallPenalty;
+ }
+
+ return Base::visitCallSite(CS);
+ }
+
+ // Otherwise we're in a very special case -- an indirect function call. =
See
+ // if we can be particularly clever about this.
+ Value *Callee =3D CS.getCalledValue();
+
+ // First, pay the price of the argument setup. We account for the average
+ // 1 instruction per call argument setup here.
+ Cost +=3D CS.arg_size() * InlineConstants::InstrCost;
+
+ // Next, check if this happens to be an indirect function call to a known
+ // function in this inline context. If not, we've done all we can.
+ Function *F =3D dyn_cast_or_null<Function>(SimplifiedValues.lookup(Calle=
e));
+ if (!F)
+ return Base::visitCallSite(CS);
+
+ // If we have a constant that we are calling as a function, we can peer
+ // through it and see the function target. This happens not infrequently
+ // during devirtualization and so we want to give it a hefty bonus for
+ // inlining, but cap that bonus in the event that inlining wouldn't pan
+ // out. Pretend to inline the function, with a custom threshold.
+ CallAnalyzer CA(TD, *F, InlineConstants::IndirectCallThreshold);
+ if (CA.analyzeCall(CS)) {
+ // We were able to inline the indirect call! Subtract the cost from the
+ // bonus we want to apply, but don't go below zero.
+ Cost -=3D std::max(0, InlineConstants::IndirectCallThreshold - CA.getC=
ost());
+ }
+
+ return Base::visitCallSite(CS);
+}
+
+bool CallAnalyzer::visitInstruction(Instruction &I) {
+ // We found something we don't understand or can't handle. Mark any SROA=
-able
+ // values in the operand list as no longer viable.
+ for (User::op_iterator OI =3D I.op_begin(), OE =3D I.op_end(); OI !=3D O=
E; ++OI)
+ disableSROA(*OI);
+
+ return false;
+}
+
+
+/// \brief Analyze a basic block for its contribution to the inline cost.
+///
+/// This method walks the analyzer over every instruction in the given bas=
ic
+/// block and accounts for their cost during inlining at this callsite. It
+/// aborts early if the threshold has been exceeded or an impossible to in=
line
+/// construct has been detected. It returns false if inlining is no longer
+/// viable, and true if inlining remains viable.
+bool CallAnalyzer::analyzeBlock(BasicBlock *BB) {
+ for (BasicBlock::iterator I =3D BB->begin(), E =3D llvm::prior(BB->end()=
);
+ I !=3D E; ++I) {
+ ++NumInstructions;
+ if (isa<ExtractElementInst>(I) || I->getType()->isVectorTy())
+ ++NumVectorInstructions;
+
+ // If the instruction simplified to a constant, there is no cost to th=
is
+ // instruction. Visit the instructions using our InstVisitor to accoun=
t for
+ // all of the per-instruction logic. The visit tree returns true if we
+ // consumed the instruction in any way, and false if the instruction's=
base
+ // cost should count against inlining.
+ if (Base::visit(I))
+ ++NumInstructionsSimplified;
+ else
+ Cost +=3D InlineConstants::InstrCost;
+
+ // If the visit this instruction detected an uninlinable pattern, abor=
t.
+ if (IsRecursive || ExposesReturnsTwice || HasDynamicAlloca)
+ return false;
+
+ if (NumVectorInstructions > NumInstructions/2)
+ VectorBonus =3D FiftyPercentVectorBonus;
+ else if (NumVectorInstructions > NumInstructions/10)
+ VectorBonus =3D TenPercentVectorBonus;
+ else
+ VectorBonus =3D 0;
+
+ // Check if we've past the threshold so we don't spin in huge basic
+ // blocks that will never inline.
+ if (!AlwaysInline && Cost > (Threshold + VectorBonus))
+ return false;
+ }
+
+ return true;
+}
+
+/// \brief Compute the base pointer and cumulative constant offsets for V.
+///
+/// This strips all constant offsets off of V, leaving it the base pointer=
, and
+/// accumulates the total constant offset applied in the returned constant=
. It
+/// returns 0 if V is not a pointer, and returns the constant '0' if there=
are
+/// no constant offsets applied.
+ConstantInt *CallAnalyzer::stripAndComputeInBoundsConstantOffsets(Value *&=
V) {
+ if (!TD || !V->getType()->isPointerTy())
+ return 0;
+
+ unsigned IntPtrWidth =3D TD->getPointerSizeInBits();
+ APInt Offset =3D APInt::getNullValue(IntPtrWidth);
+
+ // Even though we don't look through PHI nodes, we could be called on an
+ // instruction in an unreachable block, which may be on a cycle.
+ SmallPtrSet<Value *, 4> Visited;
+ Visited.insert(V);
+ do {
+ if (GEPOperator *GEP =3D dyn_cast<GEPOperator>(V)) {
+ if (!GEP->isInBounds() || !accumulateGEPOffset(*GEP, Offset))
+ return 0;
+ V =3D GEP->getPointerOperand();
+ } else if (Operator::getOpcode(V) =3D=3D Instruction::BitCast) {
+ V =3D cast<Operator>(V)->getOperand(0);
+ } else if (GlobalAlias *GA =3D dyn_cast<GlobalAlias>(V)) {
+ if (GA->mayBeOverridden())
+ break;
+ V =3D GA->getAliasee();
+ } else {
+ break;
+ }
+ assert(V->getType()->isPointerTy() && "Unexpected operand type!");
+ } while (Visited.insert(V));
+
+ Type *IntPtrTy =3D TD->getIntPtrType(V->getContext());
+ return cast<ConstantInt>(ConstantInt::get(IntPtrTy, Offset));
+}
+
+/// \brief Analyze a call site for potential inlining.
+///
+/// Returns true if inlining this call is viable, and false if it is not
+/// viable. It computes the cost and adjusts the threshold based on numero=
us
+/// factors and heuristics. If this method returns false but the computed =
cost
+/// is below the computed threshold, then inlining was forcibly disabled by
+/// some artifact of the rountine.
+bool CallAnalyzer::analyzeCall(CallSite CS) {
+ ++NumCallsAnalyzed;
+
+ // Track whether the post-inlining function would have more than one bas=
ic
+ // block. A single basic block is often intended for inlining. Balloon t=
he
+ // threshold by 50% until we pass the single-BB phase.
+ bool SingleBB =3D true;
+ int SingleBBBonus =3D Threshold / 2;
+ Threshold +=3D SingleBBBonus;
+
+ // Unless we are always-inlining, perform some tweaks to the cost and
+ // threshold based on the direct callsite information.
+ if (!AlwaysInline) {
+ // We want to more aggressively inline vector-dense kernels, so up the
+ // threshold, and we'll lower it if the % of vector instructions gets =
too
+ // low.
+ assert(NumInstructions =3D=3D 0);
+ assert(NumVectorInstructions =3D=3D 0);
+ FiftyPercentVectorBonus =3D Threshold;
+ TenPercentVectorBonus =3D Threshold / 2;
+
+ // Subtract off one instruction per call argument as those will be fre=
e after
+ // inlining.
+ Cost -=3D CS.arg_size() * InlineConstants::InstrCost;
+
+ // If there is only one call of the function, and it has internal link=
age,
+ // the cost of inlining it drops dramatically.
+ if (F.hasLocalLinkage() && F.hasOneUse() && &F =3D=3D CS.getCalledFunc=
tion())
+ Cost +=3D InlineConstants::LastCallToStaticBonus;
+
+ // If the instruction after the call, or if the normal destination of =
the
+ // invoke is an unreachable instruction, the function is noreturn. As=
such,
+ // there is little point in inlining this unless there is literally ze=
ro cost.
+ if (InvokeInst *II =3D dyn_cast<InvokeInst>(CS.getInstruction())) {
+ if (isa<UnreachableInst>(II->getNormalDest()->begin()))
+ Threshold =3D 1;
+ } else if (isa<UnreachableInst>(++BasicBlock::iterator(CS.getInstructi=
on())))
+ Threshold =3D 1;
+
+ // If this function uses the coldcc calling convention, prefer not to =
inline
+ // it.
+ if (F.getCallingConv() =3D=3D CallingConv::Cold)
+ Cost +=3D InlineConstants::ColdccPenalty;
+
+ // Check if we're done. This can happen due to bonuses and penalties.
+ if (Cost > Threshold)
+ return false;
+ }
+
+ if (F.empty())
+ return true;
+
+ // Track whether we've seen a return instruction. The first return
+ // instruction is free, as at least one will usually disappear in inlini=
ng.
+ bool HasReturn =3D false;
+
+ // Populate our simplified values by mapping from function arguments to =
call
+ // arguments with known important simplifications.
+ CallSite::arg_iterator CAI =3D CS.arg_begin();
+ for (Function::arg_iterator FAI =3D F.arg_begin(), FAE =3D F.arg_end();
+ FAI !=3D FAE; ++FAI, ++CAI) {
+ assert(CAI !=3D CS.arg_end());
+ if (Constant *C =3D dyn_cast<Constant>(CAI))
+ SimplifiedValues[FAI] =3D C;
+
+ Value *PtrArg =3D *CAI;
+ if (ConstantInt *C =3D stripAndComputeInBoundsConstantOffsets(PtrArg))=
{
+ ConstantOffsetPtrs[FAI] =3D std::make_pair(PtrArg, C->getValue());
+
+ // We can SROA any pointer arguments derived from alloca instruction=
s.
+ if (isa<AllocaInst>(PtrArg)) {
+ SROAArgValues[FAI] =3D PtrArg;
+ SROAArgCosts[PtrArg] =3D 0;
+ }
+ }
+ }
+ NumConstantArgs =3D SimplifiedValues.size();
+ NumConstantOffsetPtrArgs =3D ConstantOffsetPtrs.size();
+ NumAllocaArgs =3D SROAArgValues.size();
+
+ // The worklist of live basic blocks in the callee *after* inlining. We =
avoid
+ // adding basic blocks of the callee which can be proven to be dead for =
this
+ // particular call site in order to get more accurate cost estimates. Th=
is
+ // requires a somewhat heavyweight iteration pattern: we need to walk the
+ // basic blocks in a breadth-first order as we insert live successors. To
+ // accomplish this, prioritizing for small iterations because we exit af=
ter
+ // crossing our threshold, we use a small-size optimized SetVector.
+ typedef SetVector<BasicBlock *, SmallVector<BasicBlock *, 16>,
+ SmallPtrSet<BasicBlock *, 16> > BBSetVec=
tor;
+ BBSetVector BBWorklist;
+ BBWorklist.insert(&F.getEntryBlock());
+ // Note that we *must not* cache the size, this loop grows the worklist.
+ for (unsigned Idx =3D 0; Idx !=3D BBWorklist.size(); ++Idx) {
+ // Bail out the moment we cross the threshold. This means we'll under-=
count
+ // the cost, but only when undercounting doesn't matter.
+ if (!AlwaysInline && Cost > (Threshold + VectorBonus))
+ break;
+
+ BasicBlock *BB =3D BBWorklist[Idx];
+ if (BB->empty())
+ continue;
+
+ // Handle the terminator cost here where we can track returns and other
+ // function-wide constructs.
+ TerminatorInst *TI =3D BB->getTerminator();
+
+ // We never want to inline functions that contain an indirectbr. This=
is
+ // incorrect because all the blockaddress's (in static global initiali=
zers
+ // for example) would be referring to the original function, and this =
indirect
+ // jump would jump from the inlined copy of the function into the orig=
inal
+ // function which is extremely undefined behavior.
+ // FIXME: This logic isn't really right; we can safely inline functions
+ // with indirectbr's as long as no other function or global references=
the
+ // blockaddress of a block within the current function. And as a QOI =
issue,
+ // if someone is using a blockaddress without an indirectbr, and that
+ // reference somehow ends up in another function or global, we probably
+ // don't want to inline this function.
+ if (isa<IndirectBrInst>(TI))
+ return false;
+
+ if (!HasReturn && isa<ReturnInst>(TI))
+ HasReturn =3D true;
+ else
+ Cost +=3D InlineConstants::InstrCost;
+
+ // Analyze the cost of this block. If we blow through the threshold, t=
his
+ // returns false, and we can bail on out.
+ if (!analyzeBlock(BB)) {
+ if (IsRecursive || ExposesReturnsTwice || HasDynamicAlloca)
+ return false;
+ break;
+ }
+
+ // Add in the live successors by first checking whether we have termin=
ator
+ // that may be simplified based on the values simplified by this call.
+ if (BranchInst *BI =3D dyn_cast<BranchInst>(TI)) {
+ if (BI->isConditional()) {
+ Value *Cond =3D BI->getCondition();
+ if (ConstantInt *SimpleCond
+ =3D dyn_cast_or_null<ConstantInt>(SimplifiedValues.lookup(Co=
nd))) {
+ BBWorklist.insert(BI->getSuccessor(SimpleCond->isZero() ? 1 : 0)=
);
+ continue;
+ }
+ }
+ } else if (SwitchInst *SI =3D dyn_cast<SwitchInst>(TI)) {
+ Value *Cond =3D SI->getCondition();
+ if (ConstantInt *SimpleCond
+ =3D dyn_cast_or_null<ConstantInt>(SimplifiedValues.lookup(Cond=
))) {
+ BBWorklist.insert(SI->findCaseValue(SimpleCond).getCaseSuccessor()=
);
+ continue;
}
}
=20
- if (const AllocaInst *AI =3D dyn_cast<AllocaInst>(II)) {
- if (!AI->isStaticAlloca())
- this->usesDynamicAlloca =3D true;
- }
+ // If we're unable to select a particular successor, just count all of
+ // them.
+ for (unsigned TIdx =3D 0, TSize =3D TI->getNumSuccessors(); TIdx !=3D =
TSize; ++TIdx)
+ BBWorklist.insert(TI->getSuccessor(TIdx));
=20
- if (isa<ExtractElementInst>(II) || II->getType()->isVectorTy())
- ++NumVectorInsts;
-
- if (const CastInst *CI =3D dyn_cast<CastInst>(II)) {
- // Noop casts, including ptr <-> int, don't count.
- if (CI->isLosslessCast() || isa<IntToPtrInst>(CI) ||
- isa<PtrToIntInst>(CI))
- continue;
- // trunc to a native type is free (assuming the target has compare a=
nd
- // shift-right of the same width).
- if (isa<TruncInst>(CI) && TD &&
- TD->isLegalInteger(TD->getTypeSizeInBits(CI->getType())))
- continue;
- // Result of a cmp instruction is often extended (to be used by other
- // cmp instructions, logical or return instructions). These are usua=
lly
- // nop on most sane targets.
- if (isa<CmpInst>(CI->getOperand(0)))
- continue;
- } else if (const GetElementPtrInst *GEPI =3D dyn_cast<GetElementPtrIns=
t>(II)){
- // If a GEP has all constant indices, it will probably be folded with
- // a load/store.
- if (GEPI->hasAllConstantIndices())
- continue;
- }
-
- ++NumInsts;
- }
-
- if (isa<ReturnInst>(BB->getTerminator()))
- ++NumRets;
-
- // We never want to inline functions that contain an indirectbr. This is
- // incorrect because all the blockaddress's (in static global initialize=
rs
- // for example) would be referring to the original function, and this in=
direct
- // jump would jump from the inlined copy of the function into the origin=
al
- // function which is extremely undefined behavior.
- if (isa<IndirectBrInst>(BB->getTerminator()))
- containsIndirectBr =3D true;
-
- // Remember NumInsts for this BB.
- NumBBInsts[BB] =3D NumInsts - NumInstsBeforeThisBB;
-}
-
-// CountCodeReductionForConstant - Figure out an approximation for how many
-// instructions will be constant folded if the specified value is constant.
-//
-unsigned CodeMetrics::CountCodeReductionForConstant(Value *V) {
- unsigned Reduction =3D 0;
- for (Value::use_iterator UI =3D V->use_begin(), E =3D V->use_end(); UI !=
=3D E;++UI){
- User *U =3D *UI;
- if (isa<BranchInst>(U) || isa<SwitchInst>(U)) {
- // We will be able to eliminate all but one of the successors.
- const TerminatorInst &TI =3D cast<TerminatorInst>(*U);
- const unsigned NumSucc =3D TI.getNumSuccessors();
- unsigned Instrs =3D 0;
- for (unsigned I =3D 0; I !=3D NumSucc; ++I)
- Instrs +=3D NumBBInsts[TI.getSuccessor(I)];
- // We don't know which blocks will be eliminated, so use the average=
size.
- Reduction +=3D InlineConstants::InstrCost*Instrs*(NumSucc-1)/NumSucc;
- } else {
- // Figure out if this instruction will be removed due to simple cons=
tant
- // propagation.
- Instruction &Inst =3D cast<Instruction>(*U);
-
- // We can't constant propagate instructions which have effects or
- // read memory.
- //
- // FIXME: It would be nice to capture the fact that a load from a
- // pointer-to-constant-global is actually a *really* good thing to z=
ap.
- // Unfortunately, we don't know the pointer that may get propagated =
here,
- // so we can't make this decision.
- if (Inst.mayReadFromMemory() || Inst.mayHaveSideEffects() ||
- isa<AllocaInst>(Inst))
- continue;
-
- bool AllOperandsConstant =3D true;
- for (unsigned i =3D 0, e =3D Inst.getNumOperands(); i !=3D e; ++i)
- if (!isa<Constant>(Inst.getOperand(i)) && Inst.getOperand(i) !=3D =
V) {
- AllOperandsConstant =3D false;
- break;
- }
-
- if (AllOperandsConstant) {
- // We will get to remove this instruction...
- Reduction +=3D InlineConstants::InstrCost;
-
- // And any other instructions that use it which become constants
- // themselves.
- Reduction +=3D CountCodeReductionForConstant(&Inst);
- }
- }
- }
- return Reduction;
-}
-
-// CountCodeReductionForAlloca - Figure out an approximation of how much s=
maller
-// the function will be if it is inlined into a context where an argument
-// becomes an alloca.
-//
-unsigned CodeMetrics::CountCodeReductionForAlloca(Value *V) {
- if (!V->getType()->isPointerTy()) return 0; // Not a pointer
- unsigned Reduction =3D 0;
- for (Value::use_iterator UI =3D V->use_begin(), E =3D V->use_end(); UI !=
=3D E;++UI){
- Instruction *I =3D cast<Instruction>(*UI);
- if (isa<LoadInst>(I) || isa<StoreInst>(I))
- Reduction +=3D InlineConstants::InstrCost;
- else if (GetElementPtrInst *GEP =3D dyn_cast<GetElementPtrInst>(I)) {
- // If the GEP has variable indices, we won't be able to do much with=
it.
- if (GEP->hasAllConstantIndices())
- Reduction +=3D CountCodeReductionForAlloca(GEP);
- } else if (BitCastInst *BCI =3D dyn_cast<BitCastInst>(I)) {
- // Track pointer through bitcasts.
- Reduction +=3D CountCodeReductionForAlloca(BCI);
- } else {
- // If there is some other strange instruction, we're not going to be=
able
- // to do much if we inline this.
- return 0;
+ // If we had any successors at this point, than post-inlining is likel=
y to
+ // have them as well. Note that we assume any basic blocks which exist=
ed
+ // due to branches or switches which folded above will also fold after
+ // inlining.
+ if (SingleBB && TI->getNumSuccessors() > 1) {
+ // Take off the bonus we applied to the threshold.
+ Threshold -=3D SingleBBBonus;
+ SingleBB =3D false;
}
}
=20
- return Reduction;
+ Threshold +=3D VectorBonus;
+
+ return AlwaysInline || Cost < Threshold;
}
=20
-/// analyzeFunction - Fill in the current structure with information glean=
ed
-/// from the specified function.
-void CodeMetrics::analyzeFunction(Function *F, const TargetData *TD) {
- // If this function contains a call to setjmp or _setjmp, never inline
- // it. This is a hack because we depend on the user marking their local
- // variables as volatile if they are live across a setjmp call, and they
- // probably won't do this in callers.
- if (F->callsFunctionThatReturnsTwice())
- callsSetJmp =3D true;
-
- // Look at the size of the callee.
- for (Function::const_iterator BB =3D F->begin(), E =3D F->end(); BB !=3D=
E; ++BB)
- analyzeBasicBlock(&*BB, TD);
+/// \brief Dump stats about this call's analysis.
+void CallAnalyzer::dump() {
+#define DEBUG_PRINT_STAT(x) llvm::dbgs() << " " #x ": " << x << "\n"
+ DEBUG_PRINT_STAT(NumConstantArgs);
+ DEBUG_PRINT_STAT(NumConstantOffsetPtrArgs);
+ DEBUG_PRINT_STAT(NumAllocaArgs);
+ DEBUG_PRINT_STAT(NumConstantPtrCmps);
+ DEBUG_PRINT_STAT(NumConstantPtrDiffs);
+ DEBUG_PRINT_STAT(NumInstructionsSimplified);
+ DEBUG_PRINT_STAT(SROACostSavings);
+ DEBUG_PRINT_STAT(SROACostSavingsLost);
+#undef DEBUG_PRINT_STAT
}
=20
-/// analyzeFunction - Fill in the current structure with information glean=
ed
-/// from the specified function.
-void InlineCostAnalyzer::FunctionInfo::analyzeFunction(Function *F,
- const TargetData *T=
D) {
- Metrics.analyzeFunction(F, TD);
-
- // A function with exactly one return has it removed during the inlining
- // process (see InlineFunction), so don't count it.
- // FIXME: This knowledge should really be encoded outside of FunctionInf=
o.
- if (Metrics.NumRets=3D=3D1)
- --Metrics.NumInsts;
-
- // Check out all of the arguments to the function, figuring out how much
- // code can be eliminated if one of the arguments is a constant.
- ArgumentWeights.reserve(F->arg_size());
- for (Function::arg_iterator I =3D F->arg_begin(), E =3D F->arg_end(); I =
!=3D E; ++I)
- ArgumentWeights.push_back(ArgInfo(Metrics.CountCodeReductionForConstan=
t(I),
- Metrics.CountCodeReductionForAlloca(=
I)));
+InlineCost InlineCostAnalyzer::getInlineCost(CallSite CS, int Threshold) {
+ return getInlineCost(CS, CS.getCalledFunction(), Threshold);
}
=20
-/// NeverInline - returns true if the function should never be inlined into
-/// any caller
-bool InlineCostAnalyzer::FunctionInfo::NeverInline() {
- return (Metrics.callsSetJmp || Metrics.isRecursive ||
- Metrics.containsIndirectBr);
-}
-// getSpecializationBonus - The heuristic used to determine the per-call
-// performance boost for using a specialization of Callee with argument
-// specializedArgNo replaced by a constant.
-int InlineCostAnalyzer::getSpecializationBonus(Function *Callee,
- SmallVectorImpl<unsigned> &SpecializedArgNos)
-{
- if (Callee->mayBeOverridden())
- return 0;
-
- int Bonus =3D 0;
- // If this function uses the coldcc calling convention, prefer not to
- // specialize it.
- if (Callee->getCallingConv() =3D=3D CallingConv::Cold)
- Bonus -=3D InlineConstants::ColdccPenalty;
-
- // Get information about the callee.
- FunctionInfo *CalleeFI =3D &CachedFunctionInfo[Callee];
-
- // If we haven't calculated this information yet, do so now.
- if (CalleeFI->Metrics.NumBlocks =3D=3D 0)
- CalleeFI->analyzeFunction(Callee, TD);
-
- unsigned ArgNo =3D 0;
- unsigned i =3D 0;
- for (Function::arg_iterator I =3D Callee->arg_begin(), E =3D Callee->arg=
_end();
- I !=3D E; ++I, ++ArgNo)
- if (ArgNo =3D=3D SpecializedArgNos[i]) {
- ++i;
- Bonus +=3D CountBonusForConstant(I);
- }
-
- // Calls usually take a long time, so they make the specialization gain
- // smaller.
- Bonus -=3D CalleeFI->Metrics.NumCalls * InlineConstants::CallPenalty;
-
- return Bonus;
-}
-
-// ConstantFunctionBonus - Figure out how much of a bonus we can get for
-// possibly devirtualizing a function. We'll subtract the size of the func=
tion
-// we may wish to inline from the indirect call bonus providing a limit on
-// growth. Leave an upper limit of 0 for the bonus - we don't want to pena=
lize
-// inlining because we decide we don't want to give a bonus for
-// devirtualizing.
-int InlineCostAnalyzer::ConstantFunctionBonus(CallSite CS, Constant *C) {
-
- // This could just be NULL.
- if (!C) return 0;
-
- Function *F =3D dyn_cast<Function>(C);
- if (!F) return 0;
-
- int Bonus =3D InlineConstants::IndirectCallBonus + getInlineSize(CS, F);
- return (Bonus > 0) ? 0 : Bonus;
-}
-
-// CountBonusForConstant - Figure out an approximation for how much per-ca=
ll
-// performance boost we can expect if the specified value is constant.
-int InlineCostAnalyzer::CountBonusForConstant(Value *V, Constant *C) {
- unsigned Bonus =3D 0;
- for (Value::use_iterator UI =3D V->use_begin(), E =3D V->use_end(); UI !=
=3D E;++UI){
- User *U =3D *UI;
- if (CallInst *CI =3D dyn_cast<CallInst>(U)) {
- // Turning an indirect call into a direct call is a BIG win
- if (CI->getCalledValue() =3D=3D V)
- Bonus +=3D ConstantFunctionBonus(CallSite(CI), C);
- } else if (InvokeInst *II =3D dyn_cast<InvokeInst>(U)) {
- // Turning an indirect call into a direct call is a BIG win
- if (II->getCalledValue() =3D=3D V)
- Bonus +=3D ConstantFunctionBonus(CallSite(II), C);
- }
- // FIXME: Eliminating conditional branches and switches should
- // also yield a per-call performance boost.
- else {
- // Figure out the bonuses that wll accrue due to simple constant
- // propagation.
- Instruction &Inst =3D cast<Instruction>(*U);
-
- // We can't constant propagate instructions which have effects or
- // read memory.
- //
- // FIXME: It would be nice to capture the fact that a load from a
- // pointer-to-constant-global is actually a *really* good thing to z=
ap.
- // Unfortunately, we don't know the pointer that may get propagated =
here,
- // so we can't make this decision.
- if (Inst.mayReadFromMemory() || Inst.mayHaveSideEffects() ||
- isa<AllocaInst>(Inst))
- continue;
-
- bool AllOperandsConstant =3D true;
- for (unsigned i =3D 0, e =3D Inst.getNumOperands(); i !=3D e; ++i)
- if (!isa<Constant>(Inst.getOperand(i)) && Inst.getOperand(i) !=3D =
V) {
- AllOperandsConstant =3D false;
- break;
- }
-
- if (AllOperandsConstant)
- Bonus +=3D CountBonusForConstant(&Inst);
- }
- }
-
- return Bonus;
-}
-
-int InlineCostAnalyzer::getInlineSize(CallSite CS, Function *Callee) {
- // Get information about the callee.
- FunctionInfo *CalleeFI =3D &CachedFunctionInfo[Callee];
-
- // If we haven't calculated this information yet, do so now.
- if (CalleeFI->Metrics.NumBlocks =3D=3D 0)
- CalleeFI->analyzeFunction(Callee, TD);
-
- // InlineCost - This value measures how good of an inline candidate this=
call
- // site is to inline. A lower inline cost make is more likely for the c=
all to
- // be inlined. This value may go negative.
- //
- int InlineCost =3D 0;
-
- // Compute any size reductions we can expect due to arguments being pass=
ed into
- // the function.
- //
- unsigned ArgNo =3D 0;
- CallSite::arg_iterator I =3D CS.arg_begin();
- for (Function::arg_iterator FI =3D Callee->arg_begin(), FE =3D Callee->a=
rg_end();
- FI !=3D FE; ++I, ++FI, ++ArgNo) {
-
- // If an alloca is passed in, inlining this function is likely to allow
- // significant future optimization possibilities (like scalar promotio=
n, and
- // scalarization), so encourage the inlining of the function.
- //
- if (isa<AllocaInst>(I))
- InlineCost -=3D CalleeFI->ArgumentWeights[ArgNo].AllocaWeight;
-
- // If this is a constant being passed into the function, use the argum=
ent
- // weights calculated for the callee to determine how much will be fol=
ded
- // away with this information.
- else if (isa<Constant>(I))
- InlineCost -=3D CalleeFI->ArgumentWeights[ArgNo].ConstantWeight;
- }
-
- // Each argument passed in has a cost at both the caller and the callee
- // sides. Measurements show that each argument costs about the same as =
an
- // instruction.
- InlineCost -=3D (CS.arg_size() * InlineConstants::InstrCost);
-
- // Now that we have considered all of the factors that make the call sit=
e more
- // likely to be inlined, look at factors that make us not want to inline=
it.
-
- // Calls usually take a long time, so they make the inlining gain smalle=
r.
- InlineCost +=3D CalleeFI->Metrics.NumCalls * InlineConstants::CallPenalt=
y;
-
- // Look at the size of the callee. Each instruction counts as 5.
- InlineCost +=3D CalleeFI->Metrics.NumInsts*InlineConstants::InstrCost;
-
- return InlineCost;
-}
-
-int InlineCostAnalyzer::getInlineBonuses(CallSite CS, Function *Callee) {
- // Get information about the callee.
- FunctionInfo *CalleeFI =3D &CachedFunctionInfo[Callee];
-
- // If we haven't calculated this information yet, do so now.
- if (CalleeFI->Metrics.NumBlocks =3D=3D 0)
- CalleeFI->analyzeFunction(Callee, TD);
-
- bool isDirectCall =3D CS.getCalledFunction() =3D=3D Callee;
- Instruction *TheCall =3D CS.getInstruction();
- int Bonus =3D 0;
-
- // If there is only one call of the function, and it has internal linkag=
e,
- // make it almost guaranteed to be inlined.
- //
- if (Callee->hasLocalLinkage() && Callee->hasOneUse() && isDirectCall)
- Bonus +=3D InlineConstants::LastCallToStaticBonus;
-
- // If the instruction after the call, or if the normal destination of the
- // invoke is an unreachable instruction, the function is noreturn. As s=
uch,
- // there is little point in inlining this.
- if (InvokeInst *II =3D dyn_cast<InvokeInst>(TheCall)) {
- if (isa<UnreachableInst>(II->getNormalDest()->begin()))
- Bonus +=3D InlineConstants::NoreturnPenalty;
- } else if (isa<UnreachableInst>(++BasicBlock::iterator(TheCall)))
- Bonus +=3D InlineConstants::NoreturnPenalty;
-
- // If this function uses the coldcc calling convention, prefer not to in=
line
- // it.
- if (Callee->getCallingConv() =3D=3D CallingConv::Cold)
- Bonus +=3D InlineConstants::ColdccPenalty;
-
- // Add to the inline quality for properties that make the call valuable =
to
- // inline. This includes factors that indicate that the result of inlin=
ing
- // the function will be optimizable. Currently this just looks at argum=
ents
- // passed into the function.
- //
- CallSite::arg_iterator I =3D CS.arg_begin();
- for (Function::arg_iterator FI =3D Callee->arg_begin(), FE =3D Callee->a=
rg_end();
- FI !=3D FE; ++I, ++FI)
- // Compute any constant bonus due to inlining we want to give here.
- if (isa<Constant>(I))
- Bonus +=3D CountBonusForConstant(FI, cast<Constant>(I));
-
- return Bonus;
-}
-
-// getInlineCost - The heuristic used to determine if we should inline the
-// function call or not.
-//
-InlineCost InlineCostAnalyzer::getInlineCost(CallSite CS,
- SmallPtrSet<const Function*, 16> &NeverInli=
ne) {
- return getInlineCost(CS, CS.getCalledFunction(), NeverInline);
-}
-
-InlineCost InlineCostAnalyzer::getInlineCost(CallSite CS,
- Function *Callee,
- SmallPtrSet<const Function*, 16> &NeverInli=
ne) {
- Instruction *TheCall =3D CS.getInstruction();
- Function *Caller =3D TheCall->getParent()->getParent();
-
+InlineCost InlineCostAnalyzer::getInlineCost(CallSite CS, Function *Callee,
+ int Threshold) {
// Don't inline functions which can be redefined at link-time to mean
// something else. Don't inline functions marked noinline or call sites
// marked noinline.
- if (Callee->mayBeOverridden() ||
- Callee->hasFnAttr(Attribute::NoInline) || NeverInline.count(Callee) =
||
- CS.isNoInline())
+ if (!Callee || Callee->mayBeOverridden() ||
+ Callee->hasFnAttr(Attribute::NoInline) || CS.isNoInline())
return llvm::InlineCost::getNever();
=20
- // Get information about the callee.
- FunctionInfo *CalleeFI =3D &CachedFunctionInfo[Callee];
+ DEBUG(llvm::dbgs() << " Analyzing call of " << Callee->getName() <<=
"...\n");
=20
- // If we haven't calculated this information yet, do so now.
- if (CalleeFI->Metrics.NumBlocks =3D=3D 0)
- CalleeFI->analyzeFunction(Callee, TD);
+ CallAnalyzer CA(TD, *Callee, Threshold);
+ bool ShouldInline =3D CA.analyzeCall(CS);
=20
- // If we should never inline this, return a huge cost.
- if (CalleeFI->NeverInline())
+ DEBUG(CA.dump());
+
+ // Check if there was a reason to force inlining or no inlining.
+ if (!ShouldInline && CA.getCost() < CA.getThreshold())
return InlineCost::getNever();
-
- // FIXME: It would be nice to kill off CalleeFI->NeverInline. Then we
- // could move this up and avoid computing the FunctionInfo for
- // things we are going to just return always inline for. This
- // requires handling setjmp somewhere else, however.
- if (!Callee->isDeclaration() && Callee->hasFnAttr(Attribute::AlwaysInlin=
e))
+ if (ShouldInline && CA.getCost() >=3D CA.getThreshold())
return InlineCost::getAlways();
=20
- if (CalleeFI->Metrics.usesDynamicAlloca) {
- // Get information about the caller.
- FunctionInfo &CallerFI =3D CachedFunctionInfo[Caller];
-
- // If we haven't calculated this information yet, do so now.
- if (CallerFI.Metrics.NumBlocks =3D=3D 0) {
- CallerFI.analyzeFunction(Caller, TD);
-
- // Recompute the CalleeFI pointer, getting Caller could have invalid=
ated
- // it.
- CalleeFI =3D &CachedFunctionInfo[Callee];
- }
-
- // Don't inline a callee with dynamic alloca into a caller without the=
m.
- // Functions containing dynamic alloca's are inefficient in various wa=
ys;
- // don't create more inefficiency.
- if (!CallerFI.Metrics.usesDynamicAlloca)
- return InlineCost::getNever();
- }
-
- // InlineCost - This value measures how good of an inline candidate this=
call
- // site is to inline. A lower inline cost make is more likely for the c=
all to
- // be inlined. This value may go negative due to the fact that bonuses
- // are negative numbers.
- //
- int InlineCost =3D getInlineSize(CS, Callee) + getInlineBonuses(CS, Call=
ee);
- return llvm::InlineCost::get(InlineCost);
+ return llvm::InlineCost::get(CA.getCost(), CA.getThreshold());
}
-
-// getSpecializationCost - The heuristic used to determine the code-size
-// impact of creating a specialized version of Callee with argument
-// SpecializedArgNo replaced by a constant.
-InlineCost InlineCostAnalyzer::getSpecializationCost(Function *Callee,
- SmallVectorImpl<unsigned> &SpecializedArgNo=
s)
-{
- // Don't specialize functions which can be redefined at link-time to mean
- // something else.
- if (Callee->mayBeOverridden())
- return llvm::InlineCost::getNever();
-
- // Get information about the callee.
- FunctionInfo *CalleeFI =3D &CachedFunctionInfo[Callee];
-
- // If we haven't calculated this information yet, do so now.
- if (CalleeFI->Metrics.NumBlocks =3D=3D 0)
- CalleeFI->analyzeFunction(Callee, TD);
-
- int Cost =3D 0;
-
- // Look at the original size of the callee. Each instruction counts as =
5.
- Cost +=3D CalleeFI->Metrics.NumInsts * InlineConstants::InstrCost;
-
- // Offset that with the amount of code that can be constant-folded
- // away with the given arguments replaced by constants.
- for (SmallVectorImpl<unsigned>::iterator an =3D SpecializedArgNos.begin(=
),
- ae =3D SpecializedArgNos.end(); an !=3D ae; ++an)
- Cost -=3D CalleeFI->ArgumentWeights[*an].ConstantWeight;
-
- return llvm::InlineCost::get(Cost);
-}
-
-// getInlineFudgeFactor - Return a > 1.0 factor if the inliner should use a
-// higher threshold to determine if the function call should be inlined.
-float InlineCostAnalyzer::getInlineFudgeFactor(CallSite CS) {
- Function *Callee =3D CS.getCalledFunction();
-
- // Get information about the callee.
- FunctionInfo &CalleeFI =3D CachedFunctionInfo[Callee];
-
- // If we haven't calculated this information yet, do so now.
- if (CalleeFI.Metrics.NumBlocks =3D=3D 0)
- CalleeFI.analyzeFunction(Callee, TD);
-
- float Factor =3D 1.0f;
- // Single BB functions are often written to be inlined.
- if (CalleeFI.Metrics.NumBlocks =3D=3D 1)
- Factor +=3D 0.5f;
-
- // Be more aggressive if the function contains a good chunk (if it mades=
up
- // at least 10% of the instructions) of vector instructions.
- if (CalleeFI.Metrics.NumVectorInsts > CalleeFI.Metrics.NumInsts/2)
- Factor +=3D 2.0f;
- else if (CalleeFI.Metrics.NumVectorInsts > CalleeFI.Metrics.NumInsts/10)
- Factor +=3D 1.5f;
- return Factor;
-}
-
-/// growCachedCostInfo - update the cached cost info for Caller after Call=
ee has
-/// been inlined.
-void
-InlineCostAnalyzer::growCachedCostInfo(Function *Caller, Function *Callee)=
{
- CodeMetrics &CallerMetrics =3D CachedFunctionInfo[Caller].Metrics;
-
- // For small functions we prefer to recalculate the cost for better accu=
racy.
- if (CallerMetrics.NumBlocks < 10 && CallerMetrics.NumInsts < 1000) {
- resetCachedCostInfo(Caller);
- return;
- }
-
- // For large functions, we can save a lot of computation time by skipping
- // recalculations.
- if (CallerMetrics.NumCalls > 0)
- --CallerMetrics.NumCalls;
-
- if (Callee =3D=3D 0) return;
-
- CodeMetrics &CalleeMetrics =3D CachedFunctionInfo[Callee].Metrics;
-
- // If we don't have metrics for the callee, don't recalculate them just =
to
- // update an approximation in the caller. Instead, just recalculate the
- // caller info from scratch.
- if (CalleeMetrics.NumBlocks =3D=3D 0) {
- resetCachedCostInfo(Caller);
- return;
- }
-
- // Since CalleeMetrics were already calculated, we know that the CallerM=
etrics
- // reference isn't invalidated: both were in the DenseMap.
- CallerMetrics.usesDynamicAlloca |=3D CalleeMetrics.usesDynamicAlloca;
-
- // FIXME: If any of these three are true for the callee, the callee was
- // not inlined into the caller, so I think they're redundant here.
- CallerMetrics.callsSetJmp |=3D CalleeMetrics.callsSetJmp;
- CallerMetrics.isRecursive |=3D CalleeMetrics.isRecursive;
- CallerMetrics.containsIndirectBr |=3D CalleeMetrics.containsIndirectBr;
-
- CallerMetrics.NumInsts +=3D CalleeMetrics.NumInsts;
- CallerMetrics.NumBlocks +=3D CalleeMetrics.NumBlocks;
- CallerMetrics.NumCalls +=3D CalleeMetrics.NumCalls;
- CallerMetrics.NumVectorInsts +=3D CalleeMetrics.NumVectorInsts;
- CallerMetrics.NumRets +=3D CalleeMetrics.NumRets;
-
- // analyzeBasicBlock counts each function argument as an inst.
- if (CallerMetrics.NumInsts >=3D Callee->arg_size())
- CallerMetrics.NumInsts -=3D Callee->arg_size();
- else
- CallerMetrics.NumInsts =3D 0;
-
- // We are not updating the argument weights. We have already determined =
that
- // Caller is a fairly large function, so we accept the loss of precision.
-}
-
-/// clear - empty the cache of inline costs
-void InlineCostAnalyzer::clear() {
- CachedFunctionInfo.clear();
-}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/Instruc=
tionSimplify.cpp
--- a/head/contrib/llvm/lib/Analysis/InstructionSimplify.cpp Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/InstructionSimplify.cpp Tue Apr 17 11:=
51:51 2012 +0300
@@ -18,13 +18,17 @@
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
#define DEBUG_TYPE "instsimplify"
+#include "llvm/GlobalAlias.h"
#include "llvm/Operator.h"
#include "llvm/ADT/Statistic.h"
+#include "llvm/ADT/SetVector.h"
#include "llvm/Analysis/InstructionSimplify.h"
+#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/ConstantFolding.h"
#include "llvm/Analysis/Dominators.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/Support/ConstantRange.h"
+#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Support/PatternMatch.h"
#include "llvm/Support/ValueHandle.h"
#include "llvm/Target/TargetData.h"
@@ -37,23 +41,28 @@
STATISTIC(NumFactor , "Number of factorizations");
STATISTIC(NumReassoc, "Number of reassociations");
=20
-static Value *SimplifyAndInst(Value *, Value *, const TargetData *,
- const DominatorTree *, unsigned);
-static Value *SimplifyBinOp(unsigned, Value *, Value *, const TargetData *,
- const DominatorTree *, unsigned);
-static Value *SimplifyCmpInst(unsigned, Value *, Value *, const TargetData=
*,
- const DominatorTree *, unsigned);
-static Value *SimplifyOrInst(Value *, Value *, const TargetData *,
- const DominatorTree *, unsigned);
-static Value *SimplifyXorInst(Value *, Value *, const TargetData *,
- const DominatorTree *, unsigned);
+struct Query {
+ const TargetData *TD;
+ const TargetLibraryInfo *TLI;
+ const DominatorTree *DT;
+
+ Query(const TargetData *td, const TargetLibraryInfo *tli,
+ const DominatorTree *dt) : TD(td), TLI(tli), DT(dt) {};
+};
+
+static Value *SimplifyAndInst(Value *, Value *, const Query &, unsigned);
+static Value *SimplifyBinOp(unsigned, Value *, Value *, const Query &,
+ unsigned);
+static Value *SimplifyCmpInst(unsigned, Value *, Value *, const Query &,
+ unsigned);
+static Value *SimplifyOrInst(Value *, Value *, const Query &, unsigned);
+static Value *SimplifyXorInst(Value *, Value *, const Query &, unsigned);
+static Value *SimplifyTruncInst(Value *, Type *, const Query &, unsigned);
=20
/// getFalse - For a boolean type, or a vector of boolean type, return fal=
se, or
/// a vector with every element false, as appropriate for the type.
static Constant *getFalse(Type *Ty) {
- assert((Ty->isIntegerTy(1) ||
- (Ty->isVectorTy() &&
- cast<VectorType>(Ty)->getElementType()->isIntegerTy(1))) &&
+ assert(Ty->getScalarType()->isIntegerTy(1) &&
"Expected i1 type or a vector of i1!");
return Constant::getNullValue(Ty);
}
@@ -61,13 +70,25 @@
/// getTrue - For a boolean type, or a vector of boolean type, return true=
, or
/// a vector with every element true, as appropriate for the type.
static Constant *getTrue(Type *Ty) {
- assert((Ty->isIntegerTy(1) ||
- (Ty->isVectorTy() &&
- cast<VectorType>(Ty)->getElementType()->isIntegerTy(1))) &&
+ assert(Ty->getScalarType()->isIntegerTy(1) &&
"Expected i1 type or a vector of i1!");
return Constant::getAllOnesValue(Ty);
}
=20
+/// isSameCompare - Is V equivalent to the comparison "LHS Pred RHS"?
+static bool isSameCompare(Value *V, CmpInst::Predicate Pred, Value *LHS,
+ Value *RHS) {
+ CmpInst *Cmp =3D dyn_cast<CmpInst>(V);
+ if (!Cmp)
+ return false;
+ CmpInst::Predicate CPred =3D Cmp->getPredicate();
+ Value *CLHS =3D Cmp->getOperand(0), *CRHS =3D Cmp->getOperand(1);
+ if (CPred =3D=3D Pred && CLHS =3D=3D LHS && CRHS =3D=3D RHS)
+ return true;
+ return CPred =3D=3D CmpInst::getSwappedPredicate(Pred) && CLHS =3D=3D RH=
S &&
+ CRHS =3D=3D LHS;
+}
+
/// ValueDominatesPHI - Does the given value dominate the specified phi no=
de?
static bool ValueDominatesPHI(Value *V, PHINode *P, const DominatorTree *D=
T) {
Instruction *I =3D dyn_cast<Instruction>(V);
@@ -75,9 +96,20 @@
// Arguments and constants dominate all instructions.
return true;
=20
+ // If we are processing instructions (and/or basic blocks) that have not=
been
+ // fully added to a function, the parent nodes may still be null. Simply
+ // return the conservative answer in these cases.
+ if (!I->getParent() || !P->getParent() || !I->getParent()->getParent())
+ return false;
+
// If we have a DominatorTree then do a precise test.
- if (DT)
+ if (DT) {
+ if (!DT->isReachableFromEntry(P->getParent()))
+ return true;
+ if (!DT->isReachableFromEntry(I->getParent()))
+ return false;
return DT->dominates(I, P);
+ }
=20
// Otherwise, if the instruction is in the entry block, and is not an in=
voke,
// then it obviously dominates all phi nodes.
@@ -94,8 +126,8 @@
/// Also performs the transform "(A op' B) op C" -> "(A op C) op' (B op C)=
".
/// Returns the simplified value, or null if no simplification was perform=
ed.
static Value *ExpandBinOp(unsigned Opcode, Value *LHS, Value *RHS,
- unsigned OpcToExpand, const TargetData *TD,
- const DominatorTree *DT, unsigned MaxRecurse) {
+ unsigned OpcToExpand, const Query &Q,
+ unsigned MaxRecurse) {
Instruction::BinaryOps OpcodeToExpand =3D (Instruction::BinaryOps)OpcToE=
xpand;
// Recursion is always used, so bail out at once if we already hit the l=
imit.
if (!MaxRecurse--)
@@ -107,8 +139,8 @@
// It does! Try turning it into "(A op C) op' (B op C)".
Value *A =3D Op0->getOperand(0), *B =3D Op0->getOperand(1), *C =3D R=
HS;
// Do "A op C" and "B op C" both simplify?
- if (Value *L =3D SimplifyBinOp(Opcode, A, C, TD, DT, MaxRecurse))
- if (Value *R =3D SimplifyBinOp(Opcode, B, C, TD, DT, MaxRecurse)) {
+ if (Value *L =3D SimplifyBinOp(Opcode, A, C, Q, MaxRecurse))
+ if (Value *R =3D SimplifyBinOp(Opcode, B, C, Q, MaxRecurse)) {
// They do! Return "L op' R" if it simplifies or is already avai=
lable.
// If "L op' R" equals "A op' B" then "L op' R" is just the LHS.
if ((L =3D=3D A && R =3D=3D B) || (Instruction::isCommutative(Op=
codeToExpand)
@@ -117,8 +149,7 @@
return LHS;
}
// Otherwise return "L op' R" if it simplifies.
- if (Value *V =3D SimplifyBinOp(OpcodeToExpand, L, R, TD, DT,
- MaxRecurse)) {
+ if (Value *V =3D SimplifyBinOp(OpcodeToExpand, L, R, Q, MaxRecur=
se)) {
++NumExpand;
return V;
}
@@ -131,8 +162,8 @@
// It does! Try turning it into "(A op B) op' (A op C)".
Value *A =3D LHS, *B =3D Op1->getOperand(0), *C =3D Op1->getOperand(=
1);
// Do "A op B" and "A op C" both simplify?
- if (Value *L =3D SimplifyBinOp(Opcode, A, B, TD, DT, MaxRecurse))
- if (Value *R =3D SimplifyBinOp(Opcode, A, C, TD, DT, MaxRecurse)) {
+ if (Value *L =3D SimplifyBinOp(Opcode, A, B, Q, MaxRecurse))
+ if (Value *R =3D SimplifyBinOp(Opcode, A, C, Q, MaxRecurse)) {
// They do! Return "L op' R" if it simplifies or is already avai=
lable.
// If "L op' R" equals "B op' C" then "L op' R" is just the RHS.
if ((L =3D=3D B && R =3D=3D C) || (Instruction::isCommutative(Op=
codeToExpand)
@@ -141,8 +172,7 @@
return RHS;
}
// Otherwise return "L op' R" if it simplifies.
- if (Value *V =3D SimplifyBinOp(OpcodeToExpand, L, R, TD, DT,
- MaxRecurse)) {
+ if (Value *V =3D SimplifyBinOp(OpcodeToExpand, L, R, Q, MaxRecur=
se)) {
++NumExpand;
return V;
}
@@ -157,8 +187,8 @@
/// OpCodeToExtract is Mul then this tries to turn "(A*B)+(A*C)" into "A*(=
B+C)".
/// Returns the simplified value, or null if no simplification was perform=
ed.
static Value *FactorizeBinOp(unsigned Opcode, Value *LHS, Value *RHS,
- unsigned OpcToExtract, const TargetData *TD,
- const DominatorTree *DT, unsigned MaxRecurse)=
{
+ unsigned OpcToExtract, const Query &Q,
+ unsigned MaxRecurse) {
Instruction::BinaryOps OpcodeToExtract =3D (Instruction::BinaryOps)OpcTo=
Extract;
// Recursion is always used, so bail out at once if we already hit the l=
imit.
if (!MaxRecurse--)
@@ -182,7 +212,7 @@
Value *DD =3D A =3D=3D C ? D : C;
// Form "A op' (B op DD)" if it simplifies completely.
// Does "B op DD" simplify?
- if (Value *V =3D SimplifyBinOp(Opcode, B, DD, TD, DT, MaxRecurse)) {
+ if (Value *V =3D SimplifyBinOp(Opcode, B, DD, Q, MaxRecurse)) {
// It does! Return "A op' V" if it simplifies or is already availab=
le.
// If V equals B then "A op' V" is just the LHS. If V equals DD then
// "A op' V" is just the RHS.
@@ -191,7 +221,7 @@
return V =3D=3D B ? LHS : RHS;
}
// Otherwise return "A op' V" if it simplifies.
- if (Value *W =3D SimplifyBinOp(OpcodeToExtract, A, V, TD, DT, MaxRec=
urse)) {
+ if (Value *W =3D SimplifyBinOp(OpcodeToExtract, A, V, Q, MaxRecurse)=
) {
++NumFactor;
return W;
}
@@ -205,7 +235,7 @@
Value *CC =3D B =3D=3D D ? C : D;
// Form "(A op CC) op' B" if it simplifies completely..
// Does "A op CC" simplify?
- if (Value *V =3D SimplifyBinOp(Opcode, A, CC, TD, DT, MaxRecurse)) {
+ if (Value *V =3D SimplifyBinOp(Opcode, A, CC, Q, MaxRecurse)) {
// It does! Return "V op' B" if it simplifies or is already availab=
le.
// If V equals A then "V op' B" is just the LHS. If V equals CC then
// "V op' B" is just the RHS.
@@ -214,7 +244,7 @@
return V =3D=3D A ? LHS : RHS;
}
// Otherwise return "V op' B" if it simplifies.
- if (Value *W =3D SimplifyBinOp(OpcodeToExtract, V, B, TD, DT, MaxRec=
urse)) {
+ if (Value *W =3D SimplifyBinOp(OpcodeToExtract, V, B, Q, MaxRecurse)=
) {
++NumFactor;
return W;
}
@@ -227,9 +257,7 @@
/// SimplifyAssociativeBinOp - Generic simplifications for associative bin=
ary
/// operations. Returns the simpler value, or null if none was found.
static Value *SimplifyAssociativeBinOp(unsigned Opc, Value *LHS, Value *RH=
S,
- const TargetData *TD,
- const DominatorTree *DT,
- unsigned MaxRecurse) {
+ const Query &Q, unsigned MaxRecurse=
) {
Instruction::BinaryOps Opcode =3D (Instruction::BinaryOps)Opc;
assert(Instruction::isAssociative(Opcode) && "Not an associative operati=
on!");
=20
@@ -247,12 +275,12 @@
Value *C =3D RHS;
=20
// Does "B op C" simplify?
- if (Value *V =3D SimplifyBinOp(Opcode, B, C, TD, DT, MaxRecurse)) {
+ if (Value *V =3D SimplifyBinOp(Opcode, B, C, Q, MaxRecurse)) {
// It does! Return "A op V" if it simplifies or is already availabl=
e.
// If V equals B then "A op V" is just the LHS.
if (V =3D=3D B) return LHS;
// Otherwise return "A op V" if it simplifies.
- if (Value *W =3D SimplifyBinOp(Opcode, A, V, TD, DT, MaxRecurse)) {
+ if (Value *W =3D SimplifyBinOp(Opcode, A, V, Q, MaxRecurse)) {
++NumReassoc;
return W;
}
@@ -266,12 +294,12 @@
Value *C =3D Op1->getOperand(1);
=20
// Does "A op B" simplify?
- if (Value *V =3D SimplifyBinOp(Opcode, A, B, TD, DT, MaxRecurse)) {
+ if (Value *V =3D SimplifyBinOp(Opcode, A, B, Q, MaxRecurse)) {
// It does! Return "V op C" if it simplifies or is already availabl=
e.
// If V equals B then "V op C" is just the RHS.
if (V =3D=3D B) return RHS;
// Otherwise return "V op C" if it simplifies.
- if (Value *W =3D SimplifyBinOp(Opcode, V, C, TD, DT, MaxRecurse)) {
+ if (Value *W =3D SimplifyBinOp(Opcode, V, C, Q, MaxRecurse)) {
++NumReassoc;
return W;
}
@@ -289,12 +317,12 @@
Value *C =3D RHS;
=20
// Does "C op A" simplify?
- if (Value *V =3D SimplifyBinOp(Opcode, C, A, TD, DT, MaxRecurse)) {
+ if (Value *V =3D SimplifyBinOp(Opcode, C, A, Q, MaxRecurse)) {
// It does! Return "V op B" if it simplifies or is already availabl=
e.
// If V equals A then "V op B" is just the LHS.
if (V =3D=3D A) return LHS;
// Otherwise return "V op B" if it simplifies.
- if (Value *W =3D SimplifyBinOp(Opcode, V, B, TD, DT, MaxRecurse)) {
+ if (Value *W =3D SimplifyBinOp(Opcode, V, B, Q, MaxRecurse)) {
++NumReassoc;
return W;
}
@@ -308,12 +336,12 @@
Value *C =3D Op1->getOperand(1);
=20
// Does "C op A" simplify?
- if (Value *V =3D SimplifyBinOp(Opcode, C, A, TD, DT, MaxRecurse)) {
+ if (Value *V =3D SimplifyBinOp(Opcode, C, A, Q, MaxRecurse)) {
// It does! Return "B op V" if it simplifies or is already availabl=
e.
// If V equals C then "B op V" is just the RHS.
if (V =3D=3D C) return RHS;
// Otherwise return "B op V" if it simplifies.
- if (Value *W =3D SimplifyBinOp(Opcode, B, V, TD, DT, MaxRecurse)) {
+ if (Value *W =3D SimplifyBinOp(Opcode, B, V, Q, MaxRecurse)) {
++NumReassoc;
return W;
}
@@ -328,9 +356,7 @@
/// evaluating it on both branches of the select results in the same value.
/// Returns the common value if so, otherwise returns null.
static Value *ThreadBinOpOverSelect(unsigned Opcode, Value *LHS, Value *RH=
S,
- const TargetData *TD,
- const DominatorTree *DT,
- unsigned MaxRecurse) {
+ const Query &Q, unsigned MaxRecurse) {
// Recursion is always used, so bail out at once if we already hit the l=
imit.
if (!MaxRecurse--)
return 0;
@@ -347,11 +373,11 @@
Value *TV;
Value *FV;
if (SI =3D=3D LHS) {
- TV =3D SimplifyBinOp(Opcode, SI->getTrueValue(), RHS, TD, DT, MaxRecur=
se);
- FV =3D SimplifyBinOp(Opcode, SI->getFalseValue(), RHS, TD, DT, MaxRecu=
rse);
+ TV =3D SimplifyBinOp(Opcode, SI->getTrueValue(), RHS, Q, MaxRecurse);
+ FV =3D SimplifyBinOp(Opcode, SI->getFalseValue(), RHS, Q, MaxRecurse);
} else {
- TV =3D SimplifyBinOp(Opcode, LHS, SI->getTrueValue(), TD, DT, MaxRecur=
se);
- FV =3D SimplifyBinOp(Opcode, LHS, SI->getFalseValue(), TD, DT, MaxRecu=
rse);
+ TV =3D SimplifyBinOp(Opcode, LHS, SI->getTrueValue(), Q, MaxRecurse);
+ FV =3D SimplifyBinOp(Opcode, LHS, SI->getFalseValue(), Q, MaxRecurse);
}
=20
// If they simplified to the same value, then return the common value.
@@ -402,8 +428,7 @@
/// result in the same value. Returns the common value if so, otherwise r=
eturns
/// null.
static Value *ThreadCmpOverSelect(CmpInst::Predicate Pred, Value *LHS,
- Value *RHS, const TargetData *TD,
- const DominatorTree *DT,
+ Value *RHS, const Query &Q,
unsigned MaxRecurse) {
// Recursion is always used, so bail out at once if we already hit the l=
imit.
if (!MaxRecurse--)
@@ -416,40 +441,67 @@
}
assert(isa<SelectInst>(LHS) && "Not comparing with a select instruction!=
");
SelectInst *SI =3D cast<SelectInst>(LHS);
+ Value *Cond =3D SI->getCondition();
+ Value *TV =3D SI->getTrueValue();
+ Value *FV =3D SI->getFalseValue();
=20
// Now that we have "cmp select(Cond, TV, FV), RHS", analyse it.
// Does "cmp TV, RHS" simplify?
- if (Value *TCmp =3D SimplifyCmpInst(Pred, SI->getTrueValue(), RHS, TD, D=
T,
- MaxRecurse)) {
- // It does! Does "cmp FV, RHS" simplify?
- if (Value *FCmp =3D SimplifyCmpInst(Pred, SI->getFalseValue(), RHS, TD=
, DT,
- MaxRecurse)) {
- // It does! If they simplified to the same value, then use it as the
- // result of the original comparison.
- if (TCmp =3D=3D FCmp)
- return TCmp;
- Value *Cond =3D SI->getCondition();
- // If the false value simplified to false, then the result of the co=
mpare
- // is equal to "Cond && TCmp". This also catches the case when the =
false
- // value simplified to false and the true value to true, returning "=
Cond".
- if (match(FCmp, m_Zero()))
- if (Value *V =3D SimplifyAndInst(Cond, TCmp, TD, DT, MaxRecurse))
- return V;
- // If the true value simplified to true, then the result of the comp=
are
- // is equal to "Cond || FCmp".
- if (match(TCmp, m_One()))
- if (Value *V =3D SimplifyOrInst(Cond, FCmp, TD, DT, MaxRecurse))
- return V;
- // Finally, if the false value simplified to true and the true value=
to
- // false, then the result of the compare is equal to "!Cond".
- if (match(FCmp, m_One()) && match(TCmp, m_Zero()))
- if (Value *V =3D
- SimplifyXorInst(Cond, Constant::getAllOnesValue(Cond->getType(=
)),
- TD, DT, MaxRecurse))
- return V;
- }
+ Value *TCmp =3D SimplifyCmpInst(Pred, TV, RHS, Q, MaxRecurse);
+ if (TCmp =3D=3D Cond) {
+ // It not only simplified, it simplified to the select condition. Rep=
lace
+ // it with 'true'.
+ TCmp =3D getTrue(Cond->getType());
+ } else if (!TCmp) {
+ // It didn't simplify. However if "cmp TV, RHS" is equal to the select
+ // condition then we can replace it with 'true'. Otherwise give up.
+ if (!isSameCompare(Cond, Pred, TV, RHS))
+ return 0;
+ TCmp =3D getTrue(Cond->getType());
}
=20
+ // Does "cmp FV, RHS" simplify?
+ Value *FCmp =3D SimplifyCmpInst(Pred, FV, RHS, Q, MaxRecurse);
+ if (FCmp =3D=3D Cond) {
+ // It not only simplified, it simplified to the select condition. Rep=
lace
+ // it with 'false'.
+ FCmp =3D getFalse(Cond->getType());
+ } else if (!FCmp) {
+ // It didn't simplify. However if "cmp FV, RHS" is equal to the select
+ // condition then we can replace it with 'false'. Otherwise give up.
+ if (!isSameCompare(Cond, Pred, FV, RHS))
+ return 0;
+ FCmp =3D getFalse(Cond->getType());
+ }
+
+ // If both sides simplified to the same value, then use it as the result=
of
+ // the original comparison.
+ if (TCmp =3D=3D FCmp)
+ return TCmp;
+
+ // The remaining cases only make sense if the select condition has the s=
ame
+ // type as the result of the comparison, so bail out if this is not so.
+ if (Cond->getType()->isVectorTy() !=3D RHS->getType()->isVectorTy())
+ return 0;
+ // If the false value simplified to false, then the result of the compare
+ // is equal to "Cond && TCmp". This also catches the case when the false
+ // value simplified to false and the true value to true, returning "Cond=
".
+ if (match(FCmp, m_Zero()))
+ if (Value *V =3D SimplifyAndInst(Cond, TCmp, Q, MaxRecurse))
+ return V;
+ // If the true value simplified to true, then the result of the compare
+ // is equal to "Cond || FCmp".
+ if (match(TCmp, m_One()))
+ if (Value *V =3D SimplifyOrInst(Cond, FCmp, Q, MaxRecurse))
+ return V;
+ // Finally, if the false value simplified to true and the true value to
+ // false, then the result of the compare is equal to "!Cond".
+ if (match(FCmp, m_One()) && match(TCmp, m_Zero()))
+ if (Value *V =3D
+ SimplifyXorInst(Cond, Constant::getAllOnesValue(Cond->getType()),
+ Q, MaxRecurse))
+ return V;
+
return 0;
}
=20
@@ -458,8 +510,7 @@
/// it on the incoming phi values yields the same result for every value. =
If so
/// returns the common value, otherwise returns null.
static Value *ThreadBinOpOverPHI(unsigned Opcode, Value *LHS, Value *RHS,
- const TargetData *TD, const DominatorTree=
*DT,
- unsigned MaxRecurse) {
+ const Query &Q, unsigned MaxRecurse) {
// Recursion is always used, so bail out at once if we already hit the l=
imit.
if (!MaxRecurse--)
return 0;
@@ -468,13 +519,13 @@
if (isa<PHINode>(LHS)) {
PI =3D cast<PHINode>(LHS);
// Bail out if RHS and the phi may be mutually interdependent due to a=
loop.
- if (!ValueDominatesPHI(RHS, PI, DT))
+ if (!ValueDominatesPHI(RHS, PI, Q.DT))
return 0;
} else {
assert(isa<PHINode>(RHS) && "No PHI instruction operand!");
PI =3D cast<PHINode>(RHS);
// Bail out if LHS and the phi may be mutually interdependent due to a=
loop.
- if (!ValueDominatesPHI(LHS, PI, DT))
+ if (!ValueDominatesPHI(LHS, PI, Q.DT))
return 0;
}
=20
@@ -485,8 +536,8 @@
// If the incoming value is the phi node itself, it can safely be skip=
ped.
if (Incoming =3D=3D PI) continue;
Value *V =3D PI =3D=3D LHS ?
- SimplifyBinOp(Opcode, Incoming, RHS, TD, DT, MaxRecurse) :
- SimplifyBinOp(Opcode, LHS, Incoming, TD, DT, MaxRecurse);
+ SimplifyBinOp(Opcode, Incoming, RHS, Q, MaxRecurse) :
+ SimplifyBinOp(Opcode, LHS, Incoming, Q, MaxRecurse);
// If the operation failed to simplify, or simplified to a different v=
alue
// to previously, then give up.
if (!V || (CommonValue && V !=3D CommonValue))
@@ -502,8 +553,7 @@
/// incoming phi values yields the same result every time. If so returns =
the
/// common result, otherwise returns null.
static Value *ThreadCmpOverPHI(CmpInst::Predicate Pred, Value *LHS, Value =
*RHS,
- const TargetData *TD, const DominatorTree *=
DT,
- unsigned MaxRecurse) {
+ const Query &Q, unsigned MaxRecurse) {
// Recursion is always used, so bail out at once if we already hit the l=
imit.
if (!MaxRecurse--)
return 0;
@@ -517,7 +567,7 @@
PHINode *PI =3D cast<PHINode>(LHS);
=20
// Bail out if RHS and the phi may be mutually interdependent due to a l=
oop.
- if (!ValueDominatesPHI(RHS, PI, DT))
+ if (!ValueDominatesPHI(RHS, PI, Q.DT))
return 0;
=20
// Evaluate the BinOp on the incoming phi values.
@@ -526,7 +576,7 @@
Value *Incoming =3D PI->getIncomingValue(i);
// If the incoming value is the phi node itself, it can safely be skip=
ped.
if (Incoming =3D=3D PI) continue;
- Value *V =3D SimplifyCmpInst(Pred, Incoming, RHS, TD, DT, MaxRecurse);
+ Value *V =3D SimplifyCmpInst(Pred, Incoming, RHS, Q, MaxRecurse);
// If the operation failed to simplify, or simplified to a different v=
alue
// to previously, then give up.
if (!V || (CommonValue && V !=3D CommonValue))
@@ -540,13 +590,12 @@
/// SimplifyAddInst - Given operands for an Add, see if we can
/// fold the result. If not, this returns null.
static Value *SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isN=
UW,
- const TargetData *TD, const DominatorTree *D=
T,
- unsigned MaxRecurse) {
+ const Query &Q, unsigned MaxRecurse) {
if (Constant *CLHS =3D dyn_cast<Constant>(Op0)) {
if (Constant *CRHS =3D dyn_cast<Constant>(Op1)) {
Constant *Ops[] =3D { CLHS, CRHS };
- return ConstantFoldInstOperands(Instruction::Add, CLHS->getType(),
- Ops, TD);
+ return ConstantFoldInstOperands(Instruction::Add, CLHS->getType(), O=
ps,
+ Q.TD, Q.TLI);
}
=20
// Canonicalize the constant to the RHS.
@@ -576,17 +625,17 @@
=20
/// i1 add -> xor.
if (MaxRecurse && Op0->getType()->isIntegerTy(1))
- if (Value *V =3D SimplifyXorInst(Op0, Op1, TD, DT, MaxRecurse-1))
+ if (Value *V =3D SimplifyXorInst(Op0, Op1, Q, MaxRecurse-1))
return V;
=20
// Try some generic simplifications for associative operations.
- if (Value *V =3D SimplifyAssociativeBinOp(Instruction::Add, Op0, Op1, TD=
, DT,
+ if (Value *V =3D SimplifyAssociativeBinOp(Instruction::Add, Op0, Op1, Q,
MaxRecurse))
return V;
=20
// Mul distributes over Add. Try some generic simplifications based on =
this.
if (Value *V =3D FactorizeBinOp(Instruction::Add, Op0, Op1, Instruction:=
:Mul,
- TD, DT, MaxRecurse))
+ Q, MaxRecurse))
return V;
=20
// Threading Add over selects and phi nodes is pointless, so don't bothe=
r.
@@ -602,20 +651,116 @@
}
=20
Value *llvm::SimplifyAddInst(Value *Op0, Value *Op1, bool isNSW, bool isNU=
W,
- const TargetData *TD, const DominatorTree *DT=
) {
- return ::SimplifyAddInst(Op0, Op1, isNSW, isNUW, TD, DT, RecursionLimit);
+ const TargetData *TD, const TargetLibraryInfo=
*TLI,
+ const DominatorTree *DT) {
+ return ::SimplifyAddInst(Op0, Op1, isNSW, isNUW, Query (TD, TLI, DT),
+ RecursionLimit);
+}
+
+/// \brief Accumulate the constant integer offset a GEP represents.
+///
+/// Given a getelementptr instruction/constantexpr, accumulate the constant
+/// offset from the base pointer into the provided APInt 'Offset'. Returns=
true
+/// if the GEP has all-constant indices. Returns false if any non-constant
+/// index is encountered leaving the 'Offset' in an undefined state. The
+/// 'Offset' APInt must be the bitwidth of the target's pointer size.
+static bool accumulateGEPOffset(const TargetData &TD, GEPOperator *GEP,
+ APInt &Offset) {
+ unsigned IntPtrWidth =3D TD.getPointerSizeInBits();
+ assert(IntPtrWidth =3D=3D Offset.getBitWidth());
+
+ gep_type_iterator GTI =3D gep_type_begin(GEP);
+ for (User::op_iterator I =3D GEP->op_begin() + 1, E =3D GEP->op_end(); I=
!=3D E;
+ ++I, ++GTI) {
+ ConstantInt *OpC =3D dyn_cast<ConstantInt>(*I);
+ if (!OpC) return false;
+ if (OpC->isZero()) continue;
+
+ // Handle a struct index, which adds its field offset to the pointer.
+ if (StructType *STy =3D dyn_cast<StructType>(*GTI)) {
+ unsigned ElementIdx =3D OpC->getZExtValue();
+ const StructLayout *SL =3D TD.getStructLayout(STy);
+ Offset +=3D APInt(IntPtrWidth, SL->getElementOffset(ElementIdx));
+ continue;
+ }
+
+ APInt TypeSize(IntPtrWidth, TD.getTypeAllocSize(GTI.getIndexedType()));
+ Offset +=3D OpC->getValue().sextOrTrunc(IntPtrWidth) * TypeSize;
+ }
+ return true;
+}
+
+/// \brief Compute the base pointer and cumulative constant offsets for V.
+///
+/// This strips all constant offsets off of V, leaving it the base pointer=
, and
+/// accumulates the total constant offset applied in the returned constant=
. It
+/// returns 0 if V is not a pointer, and returns the constant '0' if there=
are
+/// no constant offsets applied.
+static Constant *stripAndComputeConstantOffsets(const TargetData &TD,
+ Value *&V) {
+ if (!V->getType()->isPointerTy())
+ return 0;
+
+ unsigned IntPtrWidth =3D TD.getPointerSizeInBits();
+ APInt Offset =3D APInt::getNullValue(IntPtrWidth);
+
+ // Even though we don't look through PHI nodes, we could be called on an
+ // instruction in an unreachable block, which may be on a cycle.
+ SmallPtrSet<Value *, 4> Visited;
+ Visited.insert(V);
+ do {
+ if (GEPOperator *GEP =3D dyn_cast<GEPOperator>(V)) {
+ if (!GEP->isInBounds() || !accumulateGEPOffset(TD, GEP, Offset))
+ break;
+ V =3D GEP->getPointerOperand();
+ } else if (Operator::getOpcode(V) =3D=3D Instruction::BitCast) {
+ V =3D cast<Operator>(V)->getOperand(0);
+ } else if (GlobalAlias *GA =3D dyn_cast<GlobalAlias>(V)) {
+ if (GA->mayBeOverridden())
+ break;
+ V =3D GA->getAliasee();
+ } else {
+ break;
+ }
+ assert(V->getType()->isPointerTy() && "Unexpected operand type!");
+ } while (Visited.insert(V));
+
+ Type *IntPtrTy =3D TD.getIntPtrType(V->getContext());
+ return ConstantInt::get(IntPtrTy, Offset);
+}
+
+/// \brief Compute the constant difference between two pointer values.
+/// If the difference is not a constant, returns zero.
+static Constant *computePointerDifference(const TargetData &TD,
+ Value *LHS, Value *RHS) {
+ Constant *LHSOffset =3D stripAndComputeConstantOffsets(TD, LHS);
+ if (!LHSOffset)
+ return 0;
+ Constant *RHSOffset =3D stripAndComputeConstantOffsets(TD, RHS);
+ if (!RHSOffset)
+ return 0;
+
+ // If LHS and RHS are not related via constant offsets to the same base
+ // value, there is nothing we can do here.
+ if (LHS !=3D RHS)
+ return 0;
+
+ // Otherwise, the difference of LHS - RHS can be computed as:
+ // LHS - RHS
+ // =3D (LHSOffset + Base) - (RHSOffset + Base)
+ // =3D LHSOffset - RHSOffset
+ return ConstantExpr::getSub(LHSOffset, RHSOffset);
}
=20
/// SimplifySubInst - Given operands for a Sub, see if we can
/// fold the result. If not, this returns null.
static Value *SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isN=
UW,
- const TargetData *TD, const DominatorTree *D=
T,
- unsigned MaxRecurse) {
+ const Query &Q, unsigned MaxRecurse) {
if (Constant *CLHS =3D dyn_cast<Constant>(Op0))
if (Constant *CRHS =3D dyn_cast<Constant>(Op1)) {
Constant *Ops[] =3D { CLHS, CRHS };
return ConstantFoldInstOperands(Instruction::Sub, CLHS->getType(),
- Ops, TD);
+ Ops, Q.TD, Q.TLI);
}
=20
// X - undef -> undef
@@ -643,19 +788,17 @@
Value *Y =3D 0, *Z =3D Op1;
if (MaxRecurse && match(Op0, m_Add(m_Value(X), m_Value(Y)))) { // (X + Y=
) - Z
// See if "V =3D=3D=3D Y - Z" simplifies.
- if (Value *V =3D SimplifyBinOp(Instruction::Sub, Y, Z, TD, DT, MaxRecu=
rse-1))
+ if (Value *V =3D SimplifyBinOp(Instruction::Sub, Y, Z, Q, MaxRecurse-1=
))
// It does! Now see if "X + V" simplifies.
- if (Value *W =3D SimplifyBinOp(Instruction::Add, X, V, TD, DT,
- MaxRecurse-1)) {
+ if (Value *W =3D SimplifyBinOp(Instruction::Add, X, V, Q, MaxRecurse=
-1)) {
// It does, we successfully reassociated!
++NumReassoc;
return W;
}
// See if "V =3D=3D=3D X - Z" simplifies.
- if (Value *V =3D SimplifyBinOp(Instruction::Sub, X, Z, TD, DT, MaxRecu=
rse-1))
+ if (Value *V =3D SimplifyBinOp(Instruction::Sub, X, Z, Q, MaxRecurse-1=
))
// It does! Now see if "Y + V" simplifies.
- if (Value *W =3D SimplifyBinOp(Instruction::Add, Y, V, TD, DT,
- MaxRecurse-1)) {
+ if (Value *W =3D SimplifyBinOp(Instruction::Add, Y, V, Q, MaxRecurse=
-1)) {
// It does, we successfully reassociated!
++NumReassoc;
return W;
@@ -667,19 +810,17 @@
X =3D Op0;
if (MaxRecurse && match(Op1, m_Add(m_Value(Y), m_Value(Z)))) { // X - (Y=
+ Z)
// See if "V =3D=3D=3D X - Y" simplifies.
- if (Value *V =3D SimplifyBinOp(Instruction::Sub, X, Y, TD, DT, MaxRecu=
rse-1))
+ if (Value *V =3D SimplifyBinOp(Instruction::Sub, X, Y, Q, MaxRecurse-1=
))
// It does! Now see if "V - Z" simplifies.
- if (Value *W =3D SimplifyBinOp(Instruction::Sub, V, Z, TD, DT,
- MaxRecurse-1)) {
+ if (Value *W =3D SimplifyBinOp(Instruction::Sub, V, Z, Q, MaxRecurse=
-1)) {
// It does, we successfully reassociated!
++NumReassoc;
return W;
}
// See if "V =3D=3D=3D X - Z" simplifies.
- if (Value *V =3D SimplifyBinOp(Instruction::Sub, X, Z, TD, DT, MaxRecu=
rse-1))
+ if (Value *V =3D SimplifyBinOp(Instruction::Sub, X, Z, Q, MaxRecurse-1=
))
// It does! Now see if "V - Y" simplifies.
- if (Value *W =3D SimplifyBinOp(Instruction::Sub, V, Y, TD, DT,
- MaxRecurse-1)) {
+ if (Value *W =3D SimplifyBinOp(Instruction::Sub, V, Y, Q, MaxRecurse=
-1)) {
// It does, we successfully reassociated!
++NumReassoc;
return W;
@@ -691,23 +832,39 @@
Z =3D Op0;
if (MaxRecurse && match(Op1, m_Sub(m_Value(X), m_Value(Y)))) // Z - (X -=
Y)
// See if "V =3D=3D=3D Z - X" simplifies.
- if (Value *V =3D SimplifyBinOp(Instruction::Sub, Z, X, TD, DT, MaxRecu=
rse-1))
+ if (Value *V =3D SimplifyBinOp(Instruction::Sub, Z, X, Q, MaxRecurse-1=
))
// It does! Now see if "V + Y" simplifies.
- if (Value *W =3D SimplifyBinOp(Instruction::Add, V, Y, TD, DT,
- MaxRecurse-1)) {
+ if (Value *W =3D SimplifyBinOp(Instruction::Add, V, Y, Q, MaxRecurse=
-1)) {
// It does, we successfully reassociated!
++NumReassoc;
return W;
}
=20
+ // trunc(X) - trunc(Y) -> trunc(X - Y) if everything simplifies.
+ if (MaxRecurse && match(Op0, m_Trunc(m_Value(X))) &&
+ match(Op1, m_Trunc(m_Value(Y))))
+ if (X->getType() =3D=3D Y->getType())
+ // See if "V =3D=3D=3D X - Y" simplifies.
+ if (Value *V =3D SimplifyBinOp(Instruction::Sub, X, Y, Q, MaxRecurse=
-1))
+ // It does! Now see if "trunc V" simplifies.
+ if (Value *W =3D SimplifyTruncInst(V, Op0->getType(), Q, MaxRecurs=
e-1))
+ // It does, return the simplified "trunc V".
+ return W;
+
+ // Variations on GEP(base, I, ...) - GEP(base, i, ...) -> GEP(null, I-i,=
...).
+ if (Q.TD && match(Op0, m_PtrToInt(m_Value(X))) &&
+ match(Op1, m_PtrToInt(m_Value(Y))))
+ if (Constant *Result =3D computePointerDifference(*Q.TD, X, Y))
+ return ConstantExpr::getIntegerCast(Result, Op0->getType(), true);
+
// Mul distributes over Sub. Try some generic simplifications based on =
this.
if (Value *V =3D FactorizeBinOp(Instruction::Sub, Op0, Op1, Instruction:=
:Mul,
- TD, DT, MaxRecurse))
+ Q, MaxRecurse))
return V;
=20
// i1 sub -> xor.
if (MaxRecurse && Op0->getType()->isIntegerTy(1))
- if (Value *V =3D SimplifyXorInst(Op0, Op1, TD, DT, MaxRecurse-1))
+ if (Value *V =3D SimplifyXorInst(Op0, Op1, Q, MaxRecurse-1))
return V;
=20
// Threading Sub over selects and phi nodes is pointless, so don't bothe=
r.
@@ -723,19 +880,21 @@
}
=20
Value *llvm::SimplifySubInst(Value *Op0, Value *Op1, bool isNSW, bool isNU=
W,
- const TargetData *TD, const DominatorTree *DT=
) {
- return ::SimplifySubInst(Op0, Op1, isNSW, isNUW, TD, DT, RecursionLimit);
+ const TargetData *TD, const TargetLibraryInfo=
*TLI,
+ const DominatorTree *DT) {
+ return ::SimplifySubInst(Op0, Op1, isNSW, isNUW, Query (TD, TLI, DT),
+ RecursionLimit);
}
=20
/// SimplifyMulInst - Given operands for a Mul, see if we can
/// fold the result. If not, this returns null.
-static Value *SimplifyMulInst(Value *Op0, Value *Op1, const TargetData *TD,
- const DominatorTree *DT, unsigned MaxRecurse=
) {
+static Value *SimplifyMulInst(Value *Op0, Value *Op1, const Query &Q,
+ unsigned MaxRecurse) {
if (Constant *CLHS =3D dyn_cast<Constant>(Op0)) {
if (Constant *CRHS =3D dyn_cast<Constant>(Op1)) {
Constant *Ops[] =3D { CLHS, CRHS };
return ConstantFoldInstOperands(Instruction::Mul, CLHS->getType(),
- Ops, TD);
+ Ops, Q.TD, Q.TLI);
}
=20
// Canonicalize the constant to the RHS.
@@ -755,40 +914,37 @@
return Op0;
=20
// (X / Y) * Y -> X if the division is exact.
- Value *X =3D 0, *Y =3D 0;
- if ((match(Op0, m_IDiv(m_Value(X), m_Value(Y))) && Y =3D=3D Op1) || // (=
X / Y) * Y
- (match(Op1, m_IDiv(m_Value(X), m_Value(Y))) && Y =3D=3D Op0)) { // Y=
* (X / Y)
- BinaryOperator *Div =3D cast<BinaryOperator>(Y =3D=3D Op1 ? Op0 : Op1);
- if (Div->isExact())
- return X;
- }
+ Value *X =3D 0;
+ if (match(Op0, m_Exact(m_IDiv(m_Value(X), m_Specific(Op1)))) || // (X / =
Y) * Y
+ match(Op1, m_Exact(m_IDiv(m_Value(X), m_Specific(Op0))))) // Y * (=
X / Y)
+ return X;
=20
// i1 mul -> and.
if (MaxRecurse && Op0->getType()->isIntegerTy(1))
- if (Value *V =3D SimplifyAndInst(Op0, Op1, TD, DT, MaxRecurse-1))
+ if (Value *V =3D SimplifyAndInst(Op0, Op1, Q, MaxRecurse-1))
return V;
=20
// Try some generic simplifications for associative operations.
- if (Value *V =3D SimplifyAssociativeBinOp(Instruction::Mul, Op0, Op1, TD=
, DT,
+ if (Value *V =3D SimplifyAssociativeBinOp(Instruction::Mul, Op0, Op1, Q,
MaxRecurse))
return V;
=20
// Mul distributes over Add. Try some generic simplifications based on =
this.
if (Value *V =3D ExpandBinOp(Instruction::Mul, Op0, Op1, Instruction::Ad=
d,
- TD, DT, MaxRecurse))
+ Q, MaxRecurse))
return V;
=20
// If the operation is with the result of a select instruction, check wh=
ether
// operating on either branch of the select always yields the same value.
if (isa<SelectInst>(Op0) || isa<SelectInst>(Op1))
- if (Value *V =3D ThreadBinOpOverSelect(Instruction::Mul, Op0, Op1, TD,=
DT,
+ if (Value *V =3D ThreadBinOpOverSelect(Instruction::Mul, Op0, Op1, Q,
MaxRecurse))
return V;
=20
// If the operation is with the result of a phi instruction, check wheth=
er
// operating on all incoming values of the phi always yields the same va=
lue.
if (isa<PHINode>(Op0) || isa<PHINode>(Op1))
- if (Value *V =3D ThreadBinOpOverPHI(Instruction::Mul, Op0, Op1, TD, DT,
+ if (Value *V =3D ThreadBinOpOverPHI(Instruction::Mul, Op0, Op1, Q,
MaxRecurse))
return V;
=20
@@ -796,19 +952,19 @@
}
=20
Value *llvm::SimplifyMulInst(Value *Op0, Value *Op1, const TargetData *TD,
+ const TargetLibraryInfo *TLI,
const DominatorTree *DT) {
- return ::SimplifyMulInst(Op0, Op1, TD, DT, RecursionLimit);
+ return ::SimplifyMulInst(Op0, Op1, Query (TD, TLI, DT), RecursionLimit);
}
=20
/// SimplifyDiv - Given operands for an SDiv or UDiv, see if we can
/// fold the result. If not, this returns null.
static Value *SimplifyDiv(Instruction::BinaryOps Opcode, Value *Op0, Value=
*Op1,
- const TargetData *TD, const DominatorTree *DT,
- unsigned MaxRecurse) {
+ const Query &Q, unsigned MaxRecurse) {
if (Constant *C0 =3D dyn_cast<Constant>(Op0)) {
if (Constant *C1 =3D dyn_cast<Constant>(Op1)) {
Constant *Ops[] =3D { C0, C1 };
- return ConstantFoldInstOperands(Opcode, C0->getType(), Ops, TD);
+ return ConstantFoldInstOperands(Opcode, C0->getType(), Ops, Q.TD, Q.=
TLI);
}
}
=20
@@ -842,7 +998,7 @@
Value *X =3D 0, *Y =3D 0;
if (match(Op0, m_Mul(m_Value(X), m_Value(Y))) && (X =3D=3D Op1 || Y =3D=
=3D Op1)) {
if (Y !=3D Op1) std::swap(X, Y); // Ensure expression is (X * Y) / Y, =
Y =3D Op1
- BinaryOperator *Mul =3D cast<BinaryOperator>(Op0);
+ OverflowingBinaryOperator *Mul =3D cast<OverflowingBinaryOperator>(Op0=
);
// If the Mul knows it does not overflow, then we are good to go.
if ((isSigned && Mul->hasNoSignedWrap()) ||
(!isSigned && Mul->hasNoUnsignedWrap()))
@@ -861,13 +1017,13 @@
// If the operation is with the result of a select instruction, check wh=
ether
// operating on either branch of the select always yields the same value.
if (isa<SelectInst>(Op0) || isa<SelectInst>(Op1))
- if (Value *V =3D ThreadBinOpOverSelect(Opcode, Op0, Op1, TD, DT, MaxRe=
curse))
+ if (Value *V =3D ThreadBinOpOverSelect(Opcode, Op0, Op1, Q, MaxRecurse=
))
return V;
=20
// If the operation is with the result of a phi instruction, check wheth=
er
// operating on all incoming values of the phi always yields the same va=
lue.
if (isa<PHINode>(Op0) || isa<PHINode>(Op1))
- if (Value *V =3D ThreadBinOpOverPHI(Opcode, Op0, Op1, TD, DT, MaxRecur=
se))
+ if (Value *V =3D ThreadBinOpOverPHI(Opcode, Op0, Op1, Q, MaxRecurse))
return V;
=20
return 0;
@@ -875,36 +1031,38 @@
=20
/// SimplifySDivInst - Given operands for an SDiv, see if we can
/// fold the result. If not, this returns null.
-static Value *SimplifySDivInst(Value *Op0, Value *Op1, const TargetData *T=
D,
- const DominatorTree *DT, unsigned MaxRecurs=
e) {
- if (Value *V =3D SimplifyDiv(Instruction::SDiv, Op0, Op1, TD, DT, MaxRec=
urse))
+static Value *SimplifySDivInst(Value *Op0, Value *Op1, const Query &Q,
+ unsigned MaxRecurse) {
+ if (Value *V =3D SimplifyDiv(Instruction::SDiv, Op0, Op1, Q, MaxRecurse))
return V;
=20
return 0;
}
=20
Value *llvm::SimplifySDivInst(Value *Op0, Value *Op1, const TargetData *TD,
+ const TargetLibraryInfo *TLI,
const DominatorTree *DT) {
- return ::SimplifySDivInst(Op0, Op1, TD, DT, RecursionLimit);
+ return ::SimplifySDivInst(Op0, Op1, Query (TD, TLI, DT), RecursionLimit);
}
=20
/// SimplifyUDivInst - Given operands for a UDiv, see if we can
/// fold the result. If not, this returns null.
-static Value *SimplifyUDivInst(Value *Op0, Value *Op1, const TargetData *T=
D,
- const DominatorTree *DT, unsigned MaxRecurs=
e) {
- if (Value *V =3D SimplifyDiv(Instruction::UDiv, Op0, Op1, TD, DT, MaxRec=
urse))
+static Value *SimplifyUDivInst(Value *Op0, Value *Op1, const Query &Q,
+ unsigned MaxRecurse) {
+ if (Value *V =3D SimplifyDiv(Instruction::UDiv, Op0, Op1, Q, MaxRecurse))
return V;
=20
return 0;
}
=20
Value *llvm::SimplifyUDivInst(Value *Op0, Value *Op1, const TargetData *TD,
+ const TargetLibraryInfo *TLI,
const DominatorTree *DT) {
- return ::SimplifyUDivInst(Op0, Op1, TD, DT, RecursionLimit);
+ return ::SimplifyUDivInst(Op0, Op1, Query (TD, TLI, DT), RecursionLimit);
}
=20
-static Value *SimplifyFDivInst(Value *Op0, Value *Op1, const TargetData *,
- const DominatorTree *, unsigned) {
+static Value *SimplifyFDivInst(Value *Op0, Value *Op1, const Query &Q,
+ unsigned) {
// undef / X -> undef (the undef could be a snan).
if (match(Op0, m_Undef()))
return Op0;
@@ -917,19 +1075,19 @@
}
=20
Value *llvm::SimplifyFDivInst(Value *Op0, Value *Op1, const TargetData *TD,
+ const TargetLibraryInfo *TLI,
const DominatorTree *DT) {
- return ::SimplifyFDivInst(Op0, Op1, TD, DT, RecursionLimit);
+ return ::SimplifyFDivInst(Op0, Op1, Query (TD, TLI, DT), RecursionLimit);
}
=20
/// SimplifyRem - Given operands for an SRem or URem, see if we can
/// fold the result. If not, this returns null.
static Value *SimplifyRem(Instruction::BinaryOps Opcode, Value *Op0, Value=
*Op1,
- const TargetData *TD, const DominatorTree *DT,
- unsigned MaxRecurse) {
+ const Query &Q, unsigned MaxRecurse) {
if (Constant *C0 =3D dyn_cast<Constant>(Op0)) {
if (Constant *C1 =3D dyn_cast<Constant>(Op1)) {
Constant *Ops[] =3D { C0, C1 };
- return ConstantFoldInstOperands(Opcode, C0->getType(), Ops, TD);
+ return ConstantFoldInstOperands(Opcode, C0->getType(), Ops, Q.TD, Q.=
TLI);
}
}
=20
@@ -964,13 +1122,13 @@
// If the operation is with the result of a select instruction, check wh=
ether
// operating on either branch of the select always yields the same value.
if (isa<SelectInst>(Op0) || isa<SelectInst>(Op1))
- if (Value *V =3D ThreadBinOpOverSelect(Opcode, Op0, Op1, TD, DT, MaxRe=
curse))
+ if (Value *V =3D ThreadBinOpOverSelect(Opcode, Op0, Op1, Q, MaxRecurse=
))
return V;
=20
// If the operation is with the result of a phi instruction, check wheth=
er
// operating on all incoming values of the phi always yields the same va=
lue.
if (isa<PHINode>(Op0) || isa<PHINode>(Op1))
- if (Value *V =3D ThreadBinOpOverPHI(Opcode, Op0, Op1, TD, DT, MaxRecur=
se))
+ if (Value *V =3D ThreadBinOpOverPHI(Opcode, Op0, Op1, Q, MaxRecurse))
return V;
=20
return 0;
@@ -978,36 +1136,38 @@
=20
/// SimplifySRemInst - Given operands for an SRem, see if we can
/// fold the result. If not, this returns null.
-static Value *SimplifySRemInst(Value *Op0, Value *Op1, const TargetData *T=
D,
- const DominatorTree *DT, unsigned MaxRecurs=
e) {
- if (Value *V =3D SimplifyRem(Instruction::SRem, Op0, Op1, TD, DT, MaxRec=
urse))
+static Value *SimplifySRemInst(Value *Op0, Value *Op1, const Query &Q,
+ unsigned MaxRecurse) {
+ if (Value *V =3D SimplifyRem(Instruction::SRem, Op0, Op1, Q, MaxRecurse))
return V;
=20
return 0;
}
=20
Value *llvm::SimplifySRemInst(Value *Op0, Value *Op1, const TargetData *TD,
+ const TargetLibraryInfo *TLI,
const DominatorTree *DT) {
- return ::SimplifySRemInst(Op0, Op1, TD, DT, RecursionLimit);
+ return ::SimplifySRemInst(Op0, Op1, Query (TD, TLI, DT), RecursionLimit);
}
=20
/// SimplifyURemInst - Given operands for a URem, see if we can
/// fold the result. If not, this returns null.
-static Value *SimplifyURemInst(Value *Op0, Value *Op1, const TargetData *T=
D,
- const DominatorTree *DT, unsigned MaxRecurs=
e) {
- if (Value *V =3D SimplifyRem(Instruction::URem, Op0, Op1, TD, DT, MaxRec=
urse))
+static Value *SimplifyURemInst(Value *Op0, Value *Op1, const Query &Q,
+ unsigned MaxRecurse) {
+ if (Value *V =3D SimplifyRem(Instruction::URem, Op0, Op1, Q, MaxRecurse))
return V;
=20
return 0;
}
=20
Value *llvm::SimplifyURemInst(Value *Op0, Value *Op1, const TargetData *TD,
+ const TargetLibraryInfo *TLI,
const DominatorTree *DT) {
- return ::SimplifyURemInst(Op0, Op1, TD, DT, RecursionLimit);
+ return ::SimplifyURemInst(Op0, Op1, Query (TD, TLI, DT), RecursionLimit);
}
=20
-static Value *SimplifyFRemInst(Value *Op0, Value *Op1, const TargetData *,
- const DominatorTree *, unsigned) {
+static Value *SimplifyFRemInst(Value *Op0, Value *Op1, const Query &,
+ unsigned) {
// undef % X -> undef (the undef could be a snan).
if (match(Op0, m_Undef()))
return Op0;
@@ -1020,19 +1180,19 @@
}
=20
Value *llvm::SimplifyFRemInst(Value *Op0, Value *Op1, const TargetData *TD,
+ const TargetLibraryInfo *TLI,
const DominatorTree *DT) {
- return ::SimplifyFRemInst(Op0, Op1, TD, DT, RecursionLimit);
+ return ::SimplifyFRemInst(Op0, Op1, Query (TD, TLI, DT), RecursionLimit);
}
=20
/// SimplifyShift - Given operands for an Shl, LShr or AShr, see if we can
/// fold the result. If not, this returns null.
static Value *SimplifyShift(unsigned Opcode, Value *Op0, Value *Op1,
- const TargetData *TD, const DominatorTree *DT,
- unsigned MaxRecurse) {
+ const Query &Q, unsigned MaxRecurse) {
if (Constant *C0 =3D dyn_cast<Constant>(Op0)) {
if (Constant *C1 =3D dyn_cast<Constant>(Op1)) {
Constant *Ops[] =3D { C0, C1 };
- return ConstantFoldInstOperands(Opcode, C0->getType(), Ops, TD);
+ return ConstantFoldInstOperands(Opcode, C0->getType(), Ops, Q.TD, Q.=
TLI);
}
}
=20
@@ -1057,13 +1217,13 @@
// If the operation is with the result of a select instruction, check wh=
ether
// operating on either branch of the select always yields the same value.
if (isa<SelectInst>(Op0) || isa<SelectInst>(Op1))
- if (Value *V =3D ThreadBinOpOverSelect(Opcode, Op0, Op1, TD, DT, MaxRe=
curse))
+ if (Value *V =3D ThreadBinOpOverSelect(Opcode, Op0, Op1, Q, MaxRecurse=
))
return V;
=20
// If the operation is with the result of a phi instruction, check wheth=
er
// operating on all incoming values of the phi always yields the same va=
lue.
if (isa<PHINode>(Op0) || isa<PHINode>(Op1))
- if (Value *V =3D ThreadBinOpOverPHI(Opcode, Op0, Op1, TD, DT, MaxRecur=
se))
+ if (Value *V =3D ThreadBinOpOverPHI(Opcode, Op0, Op1, Q, MaxRecurse))
return V;
=20
return 0;
@@ -1072,9 +1232,8 @@
/// SimplifyShlInst - Given operands for an Shl, see if we can
/// fold the result. If not, this returns null.
static Value *SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isN=
UW,
- const TargetData *TD, const DominatorTree *D=
T,
- unsigned MaxRecurse) {
- if (Value *V =3D SimplifyShift(Instruction::Shl, Op0, Op1, TD, DT, MaxRe=
curse))
+ const Query &Q, unsigned MaxRecurse) {
+ if (Value *V =3D SimplifyShift(Instruction::Shl, Op0, Op1, Q, MaxRecurse=
))
return V;
=20
// undef << X -> 0
@@ -1083,23 +1242,23 @@
=20
// (X >> A) << A -> X
Value *X;
- if (match(Op0, m_Shr(m_Value(X), m_Specific(Op1))) &&
- cast<PossiblyExactOperator>(Op0)->isExact())
+ if (match(Op0, m_Exact(m_Shr(m_Value(X), m_Specific(Op1)))))
return X;
return 0;
}
=20
Value *llvm::SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNU=
W,
- const TargetData *TD, const DominatorTree *DT=
) {
- return ::SimplifyShlInst(Op0, Op1, isNSW, isNUW, TD, DT, RecursionLimit);
+ const TargetData *TD, const TargetLibraryInfo=
*TLI,
+ const DominatorTree *DT) {
+ return ::SimplifyShlInst(Op0, Op1, isNSW, isNUW, Query (TD, TLI, DT),
+ RecursionLimit);
}
=20
/// SimplifyLShrInst - Given operands for an LShr, see if we can
/// fold the result. If not, this returns null.
static Value *SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact,
- const TargetData *TD, const DominatorTree *=
DT,
- unsigned MaxRecurse) {
- if (Value *V =3D SimplifyShift(Instruction::LShr, Op0, Op1, TD, DT, MaxR=
ecurse))
+ const Query &Q, unsigned MaxRecurse) {
+ if (Value *V =3D SimplifyShift(Instruction::LShr, Op0, Op1, Q, MaxRecurs=
e))
return V;
=20
// undef >>l X -> 0
@@ -1116,16 +1275,18 @@
}
=20
Value *llvm::SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact,
- const TargetData *TD, const DominatorTree *D=
T) {
- return ::SimplifyLShrInst(Op0, Op1, isExact, TD, DT, RecursionLimit);
+ const TargetData *TD,
+ const TargetLibraryInfo *TLI,
+ const DominatorTree *DT) {
+ return ::SimplifyLShrInst(Op0, Op1, isExact, Query (TD, TLI, DT),
+ RecursionLimit);
}
=20
/// SimplifyAShrInst - Given operands for an AShr, see if we can
/// fold the result. If not, this returns null.
static Value *SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact,
- const TargetData *TD, const DominatorTree *=
DT,
- unsigned MaxRecurse) {
- if (Value *V =3D SimplifyShift(Instruction::AShr, Op0, Op1, TD, DT, MaxR=
ecurse))
+ const Query &Q, unsigned MaxRecurse) {
+ if (Value *V =3D SimplifyShift(Instruction::AShr, Op0, Op1, Q, MaxRecurs=
e))
return V;
=20
// all ones >>a X -> all ones
@@ -1146,19 +1307,22 @@
}
=20
Value *llvm::SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact,
- const TargetData *TD, const DominatorTree *D=
T) {
- return ::SimplifyAShrInst(Op0, Op1, isExact, TD, DT, RecursionLimit);
+ const TargetData *TD,
+ const TargetLibraryInfo *TLI,
+ const DominatorTree *DT) {
+ return ::SimplifyAShrInst(Op0, Op1, isExact, Query (TD, TLI, DT),
+ RecursionLimit);
}
=20
/// SimplifyAndInst - Given operands for an And, see if we can
/// fold the result. If not, this returns null.
-static Value *SimplifyAndInst(Value *Op0, Value *Op1, const TargetData *TD,
- const DominatorTree *DT, unsigned MaxRecurse=
) {
+static Value *SimplifyAndInst(Value *Op0, Value *Op1, const Query &Q,
+ unsigned MaxRecurse) {
if (Constant *CLHS =3D dyn_cast<Constant>(Op0)) {
if (Constant *CRHS =3D dyn_cast<Constant>(Op1)) {
Constant *Ops[] =3D { CLHS, CRHS };
return ConstantFoldInstOperands(Instruction::And, CLHS->getType(),
- Ops, TD);
+ Ops, Q.TD, Q.TLI);
}
=20
// Canonicalize the constant to the RHS.
@@ -1197,37 +1361,46 @@
(A =3D=3D Op0 || B =3D=3D Op0))
return Op0;
=20
+ // A & (-A) =3D A if A is a power of two or zero.
+ if (match(Op0, m_Neg(m_Specific(Op1))) ||
+ match(Op1, m_Neg(m_Specific(Op0)))) {
+ if (isPowerOfTwo(Op0, Q.TD, /*OrZero*/true))
+ return Op0;
+ if (isPowerOfTwo(Op1, Q.TD, /*OrZero*/true))
+ return Op1;
+ }
+
// Try some generic simplifications for associative operations.
- if (Value *V =3D SimplifyAssociativeBinOp(Instruction::And, Op0, Op1, TD=
, DT,
+ if (Value *V =3D SimplifyAssociativeBinOp(Instruction::And, Op0, Op1, Q,
MaxRecurse))
return V;
=20
// And distributes over Or. Try some generic simplifications based on t=
his.
if (Value *V =3D ExpandBinOp(Instruction::And, Op0, Op1, Instruction::Or,
- TD, DT, MaxRecurse))
+ Q, MaxRecurse))
return V;
=20
// And distributes over Xor. Try some generic simplifications based on =
this.
if (Value *V =3D ExpandBinOp(Instruction::And, Op0, Op1, Instruction::Xo=
r,
- TD, DT, MaxRecurse))
+ Q, MaxRecurse))
return V;
=20
// Or distributes over And. Try some generic simplifications based on t=
his.
if (Value *V =3D FactorizeBinOp(Instruction::And, Op0, Op1, Instruction:=
:Or,
- TD, DT, MaxRecurse))
+ Q, MaxRecurse))
return V;
=20
// If the operation is with the result of a select instruction, check wh=
ether
// operating on either branch of the select always yields the same value.
if (isa<SelectInst>(Op0) || isa<SelectInst>(Op1))
- if (Value *V =3D ThreadBinOpOverSelect(Instruction::And, Op0, Op1, TD,=
DT,
+ if (Value *V =3D ThreadBinOpOverSelect(Instruction::And, Op0, Op1, Q,
MaxRecurse))
return V;
=20
// If the operation is with the result of a phi instruction, check wheth=
er
// operating on all incoming values of the phi always yields the same va=
lue.
if (isa<PHINode>(Op0) || isa<PHINode>(Op1))
- if (Value *V =3D ThreadBinOpOverPHI(Instruction::And, Op0, Op1, TD, DT,
+ if (Value *V =3D ThreadBinOpOverPHI(Instruction::And, Op0, Op1, Q,
MaxRecurse))
return V;
=20
@@ -1235,19 +1408,20 @@
}
=20
Value *llvm::SimplifyAndInst(Value *Op0, Value *Op1, const TargetData *TD,
+ const TargetLibraryInfo *TLI,
const DominatorTree *DT) {
- return ::SimplifyAndInst(Op0, Op1, TD, DT, RecursionLimit);
+ return ::SimplifyAndInst(Op0, Op1, Query (TD, TLI, DT), RecursionLimit);
}
=20
/// SimplifyOrInst - Given operands for an Or, see if we can
/// fold the result. If not, this returns null.
-static Value *SimplifyOrInst(Value *Op0, Value *Op1, const TargetData *TD,
- const DominatorTree *DT, unsigned MaxRecurse)=
{
+static Value *SimplifyOrInst(Value *Op0, Value *Op1, const Query &Q,
+ unsigned MaxRecurse) {
if (Constant *CLHS =3D dyn_cast<Constant>(Op0)) {
if (Constant *CRHS =3D dyn_cast<Constant>(Op1)) {
Constant *Ops[] =3D { CLHS, CRHS };
return ConstantFoldInstOperands(Instruction::Or, CLHS->getType(),
- Ops, TD);
+ Ops, Q.TD, Q.TLI);
}
=20
// Canonicalize the constant to the RHS.
@@ -1297,51 +1471,51 @@
return Constant::getAllOnesValue(Op0->getType());
=20
// Try some generic simplifications for associative operations.
- if (Value *V =3D SimplifyAssociativeBinOp(Instruction::Or, Op0, Op1, TD,=
DT,
+ if (Value *V =3D SimplifyAssociativeBinOp(Instruction::Or, Op0, Op1, Q,
MaxRecurse))
return V;
=20
// Or distributes over And. Try some generic simplifications based on t=
his.
- if (Value *V =3D ExpandBinOp(Instruction::Or, Op0, Op1, Instruction::And,
- TD, DT, MaxRecurse))
+ if (Value *V =3D ExpandBinOp(Instruction::Or, Op0, Op1, Instruction::And=
, Q,
+ MaxRecurse))
return V;
=20
// And distributes over Or. Try some generic simplifications based on t=
his.
if (Value *V =3D FactorizeBinOp(Instruction::Or, Op0, Op1, Instruction::=
And,
- TD, DT, MaxRecurse))
+ Q, MaxRecurse))
return V;
=20
// If the operation is with the result of a select instruction, check wh=
ether
// operating on either branch of the select always yields the same value.
if (isa<SelectInst>(Op0) || isa<SelectInst>(Op1))
- if (Value *V =3D ThreadBinOpOverSelect(Instruction::Or, Op0, Op1, TD, =
DT,
+ if (Value *V =3D ThreadBinOpOverSelect(Instruction::Or, Op0, Op1, Q,
MaxRecurse))
return V;
=20
// If the operation is with the result of a phi instruction, check wheth=
er
// operating on all incoming values of the phi always yields the same va=
lue.
if (isa<PHINode>(Op0) || isa<PHINode>(Op1))
- if (Value *V =3D ThreadBinOpOverPHI(Instruction::Or, Op0, Op1, TD, DT,
- MaxRecurse))
+ if (Value *V =3D ThreadBinOpOverPHI(Instruction::Or, Op0, Op1, Q, MaxR=
ecurse))
return V;
=20
return 0;
}
=20
Value *llvm::SimplifyOrInst(Value *Op0, Value *Op1, const TargetData *TD,
+ const TargetLibraryInfo *TLI,
const DominatorTree *DT) {
- return ::SimplifyOrInst(Op0, Op1, TD, DT, RecursionLimit);
+ return ::SimplifyOrInst(Op0, Op1, Query (TD, TLI, DT), RecursionLimit);
}
=20
/// SimplifyXorInst - Given operands for a Xor, see if we can
/// fold the result. If not, this returns null.
-static Value *SimplifyXorInst(Value *Op0, Value *Op1, const TargetData *TD,
- const DominatorTree *DT, unsigned MaxRecurse=
) {
+static Value *SimplifyXorInst(Value *Op0, Value *Op1, const Query &Q,
+ unsigned MaxRecurse) {
if (Constant *CLHS =3D dyn_cast<Constant>(Op0)) {
if (Constant *CRHS =3D dyn_cast<Constant>(Op1)) {
Constant *Ops[] =3D { CLHS, CRHS };
return ConstantFoldInstOperands(Instruction::Xor, CLHS->getType(),
- Ops, TD);
+ Ops, Q.TD, Q.TLI);
}
=20
// Canonicalize the constant to the RHS.
@@ -1366,13 +1540,13 @@
return Constant::getAllOnesValue(Op0->getType());
=20
// Try some generic simplifications for associative operations.
- if (Value *V =3D SimplifyAssociativeBinOp(Instruction::Xor, Op0, Op1, TD=
, DT,
+ if (Value *V =3D SimplifyAssociativeBinOp(Instruction::Xor, Op0, Op1, Q,
MaxRecurse))
return V;
=20
// And distributes over Xor. Try some generic simplifications based on =
this.
if (Value *V =3D FactorizeBinOp(Instruction::Xor, Op0, Op1, Instruction:=
:And,
- TD, DT, MaxRecurse))
+ Q, MaxRecurse))
return V;
=20
// Threading Xor over selects and phi nodes is pointless, so don't bothe=
r.
@@ -1388,8 +1562,9 @@
}
=20
Value *llvm::SimplifyXorInst(Value *Op0, Value *Op1, const TargetData *TD,
+ const TargetLibraryInfo *TLI,
const DominatorTree *DT) {
- return ::SimplifyXorInst(Op0, Op1, TD, DT, RecursionLimit);
+ return ::SimplifyXorInst(Op0, Op1, Query (TD, TLI, DT), RecursionLimit);
}
=20
static Type *GetCompareTy(Value *Op) {
@@ -1416,17 +1591,56 @@
return 0;
}
=20
+static Constant *computePointerICmp(const TargetData &TD,
+ CmpInst::Predicate Pred,
+ Value *LHS, Value *RHS) {
+ // We can only fold certain predicates on pointer comparisons.
+ switch (Pred) {
+ default:
+ return 0;
+
+ // Equality comaprisons are easy to fold.
+ case CmpInst::ICMP_EQ:
+ case CmpInst::ICMP_NE:
+ break;
+
+ // We can only handle unsigned relational comparisons because 'inbound=
s' on
+ // a GEP only protects against unsigned wrapping.
+ case CmpInst::ICMP_UGT:
+ case CmpInst::ICMP_UGE:
+ case CmpInst::ICMP_ULT:
+ case CmpInst::ICMP_ULE:
+ // However, we have to switch them to their signed variants to handle
+ // negative indices from the base pointer.
+ Pred =3D ICmpInst::getSignedPredicate(Pred);
+ break;
+ }
+
+ Constant *LHSOffset =3D stripAndComputeConstantOffsets(TD, LHS);
+ if (!LHSOffset)
+ return 0;
+ Constant *RHSOffset =3D stripAndComputeConstantOffsets(TD, RHS);
+ if (!RHSOffset)
+ return 0;
+
+ // If LHS and RHS are not related via constant offsets to the same base
+ // value, there is nothing we can do here.
+ if (LHS !=3D RHS)
+ return 0;
+
+ return ConstantExpr::getICmp(Pred, LHSOffset, RHSOffset);
+}
+
/// SimplifyICmpInst - Given operands for an ICmpInst, see if we can
/// fold the result. If not, this returns null.
static Value *SimplifyICmpInst(unsigned Predicate, Value *LHS, Value *RHS,
- const TargetData *TD, const DominatorTree *=
DT,
- unsigned MaxRecurse) {
+ const Query &Q, unsigned MaxRecurse) {
CmpInst::Predicate Pred =3D (CmpInst::Predicate)Predicate;
assert(CmpInst::isIntPredicate(Pred) && "Not an integer compare!");
=20
if (Constant *CLHS =3D dyn_cast<Constant>(LHS)) {
if (Constant *CRHS =3D dyn_cast<Constant>(RHS))
- return ConstantFoldCompareInstOperands(Pred, CLHS, CRHS, TD);
+ return ConstantFoldCompareInstOperands(Pred, CLHS, CRHS, Q.TD, Q.TLI=
);
=20
// If we have a constant, make sure it is on the RHS.
std::swap(LHS, RHS);
@@ -1443,8 +1657,7 @@
return ConstantInt::get(ITy, CmpInst::isTrueWhenEqual(Pred));
=20
// Special case logic when the operands have i1 type.
- if (OpTy->isIntegerTy(1) || (OpTy->isVectorTy() &&
- cast<VectorType>(OpTy)->getElementType()->isIntegerTy(1))) {
+ if (OpTy->getScalarType()->isIntegerTy(1)) {
switch (Pred) {
default: break;
case ICmpInst::ICMP_EQ:
@@ -1480,63 +1693,101 @@
}
}
=20
- // icmp <alloca*>, <global/alloca*/null> - Different stack variables have
- // different addresses, and what's more the address of a stack variable =
is
- // never null or equal to the address of a global. Note that generalizi=
ng
- // to the case where LHS is a global variable address or null is pointle=
ss,
- // since if both LHS and RHS are constants then we already constant fold=
ed
- // the compare, and if only one of them is then we moved it to RHS alrea=
dy.
- if (isa<AllocaInst>(LHS) && (isa<GlobalValue>(RHS) || isa<AllocaInst>(RH=
S) ||
- isa<ConstantPointerNull>(RHS)))
- // We already know that LHS !=3D RHS.
- return ConstantInt::get(ITy, CmpInst::isFalseWhenEqual(Pred));
+ // icmp <object*>, <object*/null> - Different identified objects have
+ // different addresses (unless null), and what's more the address of an
+ // identified local is never equal to another argument (again, barring n=
ull).
+ // Note that generalizing to the case where LHS is a global variable add=
ress
+ // or null is pointless, since if both LHS and RHS are constants then we
+ // already constant folded the compare, and if only one of them is then =
we
+ // moved it to RHS already.
+ Value *LHSPtr =3D LHS->stripPointerCasts();
+ Value *RHSPtr =3D RHS->stripPointerCasts();
+ if (LHSPtr =3D=3D RHSPtr)
+ return ConstantInt::get(ITy, CmpInst::isTrueWhenEqual(Pred));
+
+ // Be more aggressive about stripping pointer adjustments when checking a
+ // comparison of an alloca address to another object. We can rip off all
+ // inbounds GEP operations, even if they are variable.
+ LHSPtr =3D LHSPtr->stripInBoundsOffsets();
+ if (llvm::isIdentifiedObject(LHSPtr)) {
+ RHSPtr =3D RHSPtr->stripInBoundsOffsets();
+ if (llvm::isKnownNonNull(LHSPtr) || llvm::isKnownNonNull(RHSPtr)) {
+ // If both sides are different identified objects, they aren't equal
+ // unless they're null.
+ if (LHSPtr !=3D RHSPtr && llvm::isIdentifiedObject(RHSPtr) &&
+ Pred =3D=3D CmpInst::ICMP_EQ)
+ return ConstantInt::get(ITy, false);
+
+ // A local identified object (alloca or noalias call) can't equal any
+ // incoming argument, unless they're both null.
+ if (isa<Instruction>(LHSPtr) && isa<Argument>(RHSPtr) &&
+ Pred =3D=3D CmpInst::ICMP_EQ)
+ return ConstantInt::get(ITy, false);
+ }
+
+ // Assume that the constant null is on the right.
+ if (llvm::isKnownNonNull(LHSPtr) && isa<ConstantPointerNull>(RHSPtr)) {
+ if (Pred =3D=3D CmpInst::ICMP_EQ)
+ return ConstantInt::get(ITy, false);
+ else if (Pred =3D=3D CmpInst::ICMP_NE)
+ return ConstantInt::get(ITy, true);
+ }
+ } else if (isa<Argument>(LHSPtr)) {
+ RHSPtr =3D RHSPtr->stripInBoundsOffsets();
+ // An alloca can't be equal to an argument.
+ if (isa<AllocaInst>(RHSPtr)) {
+ if (Pred =3D=3D CmpInst::ICMP_EQ)
+ return ConstantInt::get(ITy, false);
+ else if (Pred =3D=3D CmpInst::ICMP_NE)
+ return ConstantInt::get(ITy, true);
+ }
+ }
=20
// If we are comparing with zero then try hard since this is a common ca=
se.
if (match(RHS, m_Zero())) {
bool LHSKnownNonNegative, LHSKnownNegative;
switch (Pred) {
- default:
- assert(false && "Unknown ICmp predicate!");
+ default: llvm_unreachable("Unknown ICmp predicate!");
case ICmpInst::ICMP_ULT:
return getFalse(ITy);
case ICmpInst::ICMP_UGE:
return getTrue(ITy);
case ICmpInst::ICMP_EQ:
case ICmpInst::ICMP_ULE:
- if (isKnownNonZero(LHS, TD))
+ if (isKnownNonZero(LHS, Q.TD))
return getFalse(ITy);
break;
case ICmpInst::ICMP_NE:
case ICmpInst::ICMP_UGT:
- if (isKnownNonZero(LHS, TD))
+ if (isKnownNonZero(LHS, Q.TD))
return getTrue(ITy);
break;
case ICmpInst::ICMP_SLT:
- ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, TD);
+ ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, Q.TD);
if (LHSKnownNegative)
return getTrue(ITy);
if (LHSKnownNonNegative)
return getFalse(ITy);
break;
case ICmpInst::ICMP_SLE:
- ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, TD);
+ ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, Q.TD);
if (LHSKnownNegative)
return getTrue(ITy);
- if (LHSKnownNonNegative && isKnownNonZero(LHS, TD))
+ if (LHSKnownNonNegative && isKnownNonZero(LHS, Q.TD))
return getFalse(ITy);
break;
case ICmpInst::ICMP_SGE:
- ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, TD);
+ ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, Q.TD);
if (LHSKnownNegative)
return getFalse(ITy);
if (LHSKnownNonNegative)
return getTrue(ITy);
break;
case ICmpInst::ICMP_SGT:
- ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, TD);
+ ComputeSignBit(LHS, LHSKnownNonNegative, LHSKnownNegative, Q.TD);
if (LHSKnownNegative)
return getFalse(ITy);
- if (LHSKnownNonNegative && isKnownNonZero(LHS, TD))
+ if (LHSKnownNonNegative && isKnownNonZero(LHS, Q.TD))
return getTrue(ITy);
break;
}
@@ -1564,6 +1815,9 @@
// 'srem x, CI2' produces (-|CI2|, |CI2|).
Upper =3D CI2->getValue().abs();
Lower =3D (-Upper) + 1;
+ } else if (match(LHS, m_UDiv(m_ConstantInt(CI2), m_Value()))) {
+ // 'udiv CI2, x' produces [0, CI2].
+ Upper =3D CI2->getValue() + 1;
} else if (match(LHS, m_UDiv(m_Value(), m_ConstantInt(CI2)))) {
// 'udiv x, CI2' produces [0, UINT_MAX / CI2].
APInt NegOne =3D APInt::getAllOnesValue(Width);
@@ -1616,19 +1870,19 @@
=20
// Turn icmp (ptrtoint x), (ptrtoint/constant) into a compare of the i=
nput
// if the integer type is the same size as the pointer type.
- if (MaxRecurse && TD && isa<PtrToIntInst>(LI) &&
- TD->getPointerSizeInBits() =3D=3D DstTy->getPrimitiveSizeInBits())=
{
+ if (MaxRecurse && Q.TD && isa<PtrToIntInst>(LI) &&
+ Q.TD->getPointerSizeInBits() =3D=3D DstTy->getPrimitiveSizeInBits(=
)) {
if (Constant *RHSC =3D dyn_cast<Constant>(RHS)) {
// Transfer the cast to the constant.
if (Value *V =3D SimplifyICmpInst(Pred, SrcOp,
ConstantExpr::getIntToPtr(RHSC, Sr=
cTy),
- TD, DT, MaxRecurse-1))
+ Q, MaxRecurse-1))
return V;
} else if (PtrToIntInst *RI =3D dyn_cast<PtrToIntInst>(RHS)) {
if (RI->getOperand(0)->getType() =3D=3D SrcTy)
// Compare without the cast.
if (Value *V =3D SimplifyICmpInst(Pred, SrcOp, RI->getOperand(0),
- TD, DT, MaxRecurse-1))
+ Q, MaxRecurse-1))
return V;
}
}
@@ -1640,7 +1894,7 @@
if (MaxRecurse && SrcTy =3D=3D RI->getOperand(0)->getType())
// Compare X and Y. Note that signed predicates become unsigned.
if (Value *V =3D SimplifyICmpInst(ICmpInst::getUnsignedPredicate=
(Pred),
- SrcOp, RI->getOperand(0), TD, DT,
+ SrcOp, RI->getOperand(0), Q,
MaxRecurse-1))
return V;
}
@@ -1656,15 +1910,14 @@
// also a case of comparing two zero-extended values.
if (RExt =3D=3D CI && MaxRecurse)
if (Value *V =3D SimplifyICmpInst(ICmpInst::getUnsignedPredicate=
(Pred),
- SrcOp, Trunc, TD, DT, MaxRecurse=
-1))
+ SrcOp, Trunc, Q, MaxRecurse-1))
return V;
=20
// Otherwise the upper bits of LHS are zero while RHS has a non-ze=
ro bit
// there. Use this to work out the result of the comparison.
if (RExt !=3D CI) {
switch (Pred) {
- default:
- assert(false && "Unknown ICmp predicate!");
+ default: llvm_unreachable("Unknown ICmp predicate!");
// LHS <u RHS.
case ICmpInst::ICMP_EQ:
case ICmpInst::ICMP_UGT:
@@ -1701,7 +1954,7 @@
if (MaxRecurse && SrcTy =3D=3D RI->getOperand(0)->getType())
// Compare X and Y. Note that the predicate does not change.
if (Value *V =3D SimplifyICmpInst(Pred, SrcOp, RI->getOperand(0),
- TD, DT, MaxRecurse-1))
+ Q, MaxRecurse-1))
return V;
}
// Turn icmp (sext X), Cst into a compare of X and Cst if Cst is ext=
ended
@@ -1715,16 +1968,14 @@
// If the re-extended constant didn't change then this is effectiv=
ely
// also a case of comparing two sign-extended values.
if (RExt =3D=3D CI && MaxRecurse)
- if (Value *V =3D SimplifyICmpInst(Pred, SrcOp, Trunc, TD, DT,
- MaxRecurse-1))
+ if (Value *V =3D SimplifyICmpInst(Pred, SrcOp, Trunc, Q, MaxRecu=
rse-1))
return V;
=20
// Otherwise the upper bits of LHS are all equal, while RHS has va=
rying
// bits there. Use this to work out the result of the comparison.
if (RExt !=3D CI) {
switch (Pred) {
- default:
- assert(false && "Unknown ICmp predicate!");
+ default: llvm_unreachable("Unknown ICmp predicate!");
case ICmpInst::ICMP_EQ:
return ConstantInt::getFalse(CI->getContext());
case ICmpInst::ICMP_NE:
@@ -1751,7 +2002,7 @@
if (MaxRecurse)
if (Value *V =3D SimplifyICmpInst(ICmpInst::ICMP_SLT, SrcOp,
Constant::getNullValue(SrcTy=
),
- TD, DT, MaxRecurse-1))
+ Q, MaxRecurse-1))
return V;
break;
case ICmpInst::ICMP_ULT:
@@ -1760,7 +2011,7 @@
if (MaxRecurse)
if (Value *V =3D SimplifyICmpInst(ICmpInst::ICMP_SGE, SrcOp,
Constant::getNullValue(SrcTy=
),
- TD, DT, MaxRecurse-1))
+ Q, MaxRecurse-1))
return V;
break;
}
@@ -1794,14 +2045,14 @@
if ((A =3D=3D RHS || B =3D=3D RHS) && NoLHSWrapProblem)
if (Value *V =3D SimplifyICmpInst(Pred, A =3D=3D RHS ? B : A,
Constant::getNullValue(RHS->getType(=
)),
- TD, DT, MaxRecurse-1))
+ Q, MaxRecurse-1))
return V;
=20
// icmp X, (X+Y) -> icmp 0, Y for equalities or if there is no overflo=
w.
if ((C =3D=3D LHS || D =3D=3D LHS) && NoRHSWrapProblem)
if (Value *V =3D SimplifyICmpInst(Pred,
Constant::getNullValue(LHS->getType(=
)),
- C =3D=3D LHS ? D : C, TD, DT, MaxRec=
urse-1))
+ C =3D=3D LHS ? D : C, Q, MaxRecurse-=
1))
return V;
=20
// icmp (X+Y), (X+Z) -> icmp Y,Z for equalities or if there is no over=
flow.
@@ -1810,7 +2061,7 @@
// Determine Y and Z in the form icmp (X+Y), (X+Z).
Value *Y =3D (A =3D=3D C || A =3D=3D D) ? B : A;
Value *Z =3D (C =3D=3D A || C =3D=3D B) ? D : C;
- if (Value *V =3D SimplifyICmpInst(Pred, Y, Z, TD, DT, MaxRecurse-1))
+ if (Value *V =3D SimplifyICmpInst(Pred, Y, Z, Q, MaxRecurse-1))
return V;
}
}
@@ -1822,7 +2073,7 @@
break;
case ICmpInst::ICMP_SGT:
case ICmpInst::ICMP_SGE:
- ComputeSignBit(LHS, KnownNonNegative, KnownNegative, TD);
+ ComputeSignBit(LHS, KnownNonNegative, KnownNegative, Q.TD);
if (!KnownNonNegative)
break;
// fall-through
@@ -1832,7 +2083,7 @@
return getFalse(ITy);
case ICmpInst::ICMP_SLT:
case ICmpInst::ICMP_SLE:
- ComputeSignBit(LHS, KnownNonNegative, KnownNegative, TD);
+ ComputeSignBit(LHS, KnownNonNegative, KnownNegative, Q.TD);
if (!KnownNonNegative)
break;
// fall-through
@@ -1849,7 +2100,7 @@
break;
case ICmpInst::ICMP_SGT:
case ICmpInst::ICMP_SGE:
- ComputeSignBit(RHS, KnownNonNegative, KnownNegative, TD);
+ ComputeSignBit(RHS, KnownNonNegative, KnownNegative, Q.TD);
if (!KnownNonNegative)
break;
// fall-through
@@ -1859,7 +2110,7 @@
return getTrue(ITy);
case ICmpInst::ICMP_SLT:
case ICmpInst::ICMP_SLE:
- ComputeSignBit(RHS, KnownNonNegative, KnownNegative, TD);
+ ComputeSignBit(RHS, KnownNonNegative, KnownNegative, Q.TD);
if (!KnownNonNegative)
break;
// fall-through
@@ -1870,6 +2121,15 @@
}
}
=20
+ // x udiv y <=3Du x.
+ if (LBO && match(LBO, m_UDiv(m_Specific(RHS), m_Value()))) {
+ // icmp pred (X /u Y), X
+ if (Pred =3D=3D ICmpInst::ICMP_UGT)
+ return getFalse(ITy);
+ if (Pred =3D=3D ICmpInst::ICMP_ULE)
+ return getTrue(ITy);
+ }
+
if (MaxRecurse && LBO && RBO && LBO->getOpcode() =3D=3D RBO->getOpcode()=
&&
LBO->getOperand(1) =3D=3D RBO->getOperand(1)) {
switch (LBO->getOpcode()) {
@@ -1884,7 +2144,7 @@
if (!LBO->isExact() || !RBO->isExact())
break;
if (Value *V =3D SimplifyICmpInst(Pred, LBO->getOperand(0),
- RBO->getOperand(0), TD, DT, MaxRecur=
se-1))
+ RBO->getOperand(0), Q, MaxRecurse-1))
return V;
break;
case Instruction::Shl: {
@@ -1895,7 +2155,7 @@
if (!NSW && ICmpInst::isSigned(Pred))
break;
if (Value *V =3D SimplifyICmpInst(Pred, LBO->getOperand(0),
- RBO->getOperand(0), TD, DT, MaxRecur=
se-1))
+ RBO->getOperand(0), Q, MaxRecurse-1))
return V;
break;
}
@@ -1949,7 +2209,7 @@
return V;
// Otherwise, see if "A EqP B" simplifies.
if (MaxRecurse)
- if (Value *V =3D SimplifyICmpInst(EqP, A, B, TD, DT, MaxRecurse-1))
+ if (Value *V =3D SimplifyICmpInst(EqP, A, B, Q, MaxRecurse-1))
return V;
break;
case CmpInst::ICMP_NE:
@@ -1963,7 +2223,7 @@
return V;
// Otherwise, see if "A InvEqP B" simplifies.
if (MaxRecurse)
- if (Value *V =3D SimplifyICmpInst(InvEqP, A, B, TD, DT, MaxRecurse=
-1))
+ if (Value *V =3D SimplifyICmpInst(InvEqP, A, B, Q, MaxRecurse-1))
return V;
break;
}
@@ -2019,7 +2279,7 @@
return V;
// Otherwise, see if "A EqP B" simplifies.
if (MaxRecurse)
- if (Value *V =3D SimplifyICmpInst(EqP, A, B, TD, DT, MaxRecurse-1))
+ if (Value *V =3D SimplifyICmpInst(EqP, A, B, Q, MaxRecurse-1))
return V;
break;
case CmpInst::ICMP_NE:
@@ -2033,7 +2293,7 @@
return V;
// Otherwise, see if "A InvEqP B" simplifies.
if (MaxRecurse)
- if (Value *V =3D SimplifyICmpInst(InvEqP, A, B, TD, DT, MaxRecurse=
-1))
+ if (Value *V =3D SimplifyICmpInst(InvEqP, A, B, Q, MaxRecurse-1))
return V;
break;
}
@@ -2090,37 +2350,66 @@
return getFalse(ITy);
}
=20
+ // Simplify comparisons of related pointers using a powerful, recursive
+ // GEP-walk when we have target data available..
+ if (Q.TD && LHS->getType()->isPointerTy() && RHS->getType()->isPointerTy=
())
+ if (Constant *C =3D computePointerICmp(*Q.TD, Pred, LHS, RHS))
+ return C;
+
+ if (GetElementPtrInst *GLHS =3D dyn_cast<GetElementPtrInst>(LHS)) {
+ if (GEPOperator *GRHS =3D dyn_cast<GEPOperator>(RHS)) {
+ if (GLHS->getPointerOperand() =3D=3D GRHS->getPointerOperand() &&
+ GLHS->hasAllConstantIndices() && GRHS->hasAllConstantIndices() &&
+ (ICmpInst::isEquality(Pred) ||
+ (GLHS->isInBounds() && GRHS->isInBounds() &&
+ Pred =3D=3D ICmpInst::getSignedPredicate(Pred)))) {
+ // The bases are equal and the indices are constant. Build a cons=
tant
+ // expression GEP with the same indices and a null base pointer to=
see
+ // what constant folding can make out of it.
+ Constant *Null =3D Constant::getNullValue(GLHS->getPointerOperandT=
ype());
+ SmallVector<Value *, 4> IndicesLHS(GLHS->idx_begin(), GLHS->idx_en=
d());
+ Constant *NewLHS =3D ConstantExpr::getGetElementPtr(Null, IndicesL=
HS);
+
+ SmallVector<Value *, 4> IndicesRHS(GRHS->idx_begin(), GRHS->idx_en=
d());
+ Constant *NewRHS =3D ConstantExpr::getGetElementPtr(Null, IndicesR=
HS);
+ return ConstantExpr::getICmp(Pred, NewLHS, NewRHS);
+ }
+ }
+ }
+
// If the comparison is with the result of a select instruction, check w=
hether
// comparing with either branch of the select always yields the same val=
ue.
if (isa<SelectInst>(LHS) || isa<SelectInst>(RHS))
- if (Value *V =3D ThreadCmpOverSelect(Pred, LHS, RHS, TD, DT, MaxRecurs=
e))
+ if (Value *V =3D ThreadCmpOverSelect(Pred, LHS, RHS, Q, MaxRecurse))
return V;
=20
// If the comparison is with the result of a phi instruction, check whet=
her
// doing the compare with each incoming phi value yields a common result.
if (isa<PHINode>(LHS) || isa<PHINode>(RHS))
- if (Value *V =3D ThreadCmpOverPHI(Pred, LHS, RHS, TD, DT, MaxRecurse))
+ if (Value *V =3D ThreadCmpOverPHI(Pred, LHS, RHS, Q, MaxRecurse))
return V;
=20
return 0;
}
=20
Value *llvm::SimplifyICmpInst(unsigned Predicate, Value *LHS, Value *RHS,
- const TargetData *TD, const DominatorTree *D=
T) {
- return ::SimplifyICmpInst(Predicate, LHS, RHS, TD, DT, RecursionLimit);
+ const TargetData *TD,
+ const TargetLibraryInfo *TLI,
+ const DominatorTree *DT) {
+ return ::SimplifyICmpInst(Predicate, LHS, RHS, Query (TD, TLI, DT),
+ RecursionLimit);
}
=20
/// SimplifyFCmpInst - Given operands for an FCmpInst, see if we can
/// fold the result. If not, this returns null.
static Value *SimplifyFCmpInst(unsigned Predicate, Value *LHS, Value *RHS,
- const TargetData *TD, const DominatorTree *=
DT,
- unsigned MaxRecurse) {
+ const Query &Q, unsigned MaxRecurse) {
CmpInst::Predicate Pred =3D (CmpInst::Predicate)Predicate;
assert(CmpInst::isFPPredicate(Pred) && "Not an FP compare!");
=20
if (Constant *CLHS =3D dyn_cast<Constant>(LHS)) {
if (Constant *CRHS =3D dyn_cast<Constant>(RHS))
- return ConstantFoldCompareInstOperands(Pred, CLHS, CRHS, TD);
+ return ConstantFoldCompareInstOperands(Pred, CLHS, CRHS, Q.TD, Q.TLI=
);
=20
// If we have a constant, make sure it is on the RHS.
std::swap(LHS, RHS);
@@ -2188,27 +2477,31 @@
// If the comparison is with the result of a select instruction, check w=
hether
// comparing with either branch of the select always yields the same val=
ue.
if (isa<SelectInst>(LHS) || isa<SelectInst>(RHS))
- if (Value *V =3D ThreadCmpOverSelect(Pred, LHS, RHS, TD, DT, MaxRecurs=
e))
+ if (Value *V =3D ThreadCmpOverSelect(Pred, LHS, RHS, Q, MaxRecurse))
return V;
=20
// If the comparison is with the result of a phi instruction, check whet=
her
// doing the compare with each incoming phi value yields a common result.
if (isa<PHINode>(LHS) || isa<PHINode>(RHS))
- if (Value *V =3D ThreadCmpOverPHI(Pred, LHS, RHS, TD, DT, MaxRecurse))
+ if (Value *V =3D ThreadCmpOverPHI(Pred, LHS, RHS, Q, MaxRecurse))
return V;
=20
return 0;
}
=20
Value *llvm::SimplifyFCmpInst(unsigned Predicate, Value *LHS, Value *RHS,
- const TargetData *TD, const DominatorTree *D=
T) {
- return ::SimplifyFCmpInst(Predicate, LHS, RHS, TD, DT, RecursionLimit);
+ const TargetData *TD,
+ const TargetLibraryInfo *TLI,
+ const DominatorTree *DT) {
+ return ::SimplifyFCmpInst(Predicate, LHS, RHS, Query (TD, TLI, DT),
+ RecursionLimit);
}
=20
/// SimplifySelectInst - Given operands for a SelectInst, see if we can fo=
ld
/// the result. If not, this returns null.
-Value *llvm::SimplifySelectInst(Value *CondVal, Value *TrueVal, Value *Fal=
seVal,
- const TargetData *TD, const DominatorTree =
*) {
+static Value *SimplifySelectInst(Value *CondVal, Value *TrueVal,
+ Value *FalseVal, const Query &Q,
+ unsigned MaxRecurse) {
// select true, X, Y -> X
// select false, X, Y -> Y
if (ConstantInt *CB =3D dyn_cast<ConstantInt>(CondVal))
@@ -2231,12 +2524,22 @@
return 0;
}
=20
+Value *llvm::SimplifySelectInst(Value *Cond, Value *TrueVal, Value *FalseV=
al,
+ const TargetData *TD,
+ const TargetLibraryInfo *TLI,
+ const DominatorTree *DT) {
+ return ::SimplifySelectInst(Cond, TrueVal, FalseVal, Query (TD, TLI, DT),
+ RecursionLimit);
+}
+
/// SimplifyGEPInst - Given operands for an GetElementPtrInst, see if we c=
an
/// fold the result. If not, this returns null.
-Value *llvm::SimplifyGEPInst(ArrayRef<Value *> Ops,
- const TargetData *TD, const DominatorTree *) {
+static Value *SimplifyGEPInst(ArrayRef<Value *> Ops, const Query &Q, unsig=
ned) {
// The type of the GEP pointer operand.
- PointerType *PtrTy =3D cast<PointerType>(Ops[0]->getType());
+ PointerType *PtrTy =3D dyn_cast<PointerType>(Ops[0]->getType());
+ // The GEP pointer operand is not a pointer, it's a vector of pointers.
+ if (!PtrTy)
+ return 0;
=20
// getelementptr P -> P.
if (Ops.size() =3D=3D 1)
@@ -2255,9 +2558,9 @@
if (C->isZero())
return Ops[0];
// getelementptr P, N -> P if P points to a type of zero size.
- if (TD) {
+ if (Q.TD) {
Type *Ty =3D PtrTy->getElementType();
- if (Ty->isSized() && TD->getTypeAllocSize(Ty) =3D=3D 0)
+ if (Ty->isSized() && Q.TD->getTypeAllocSize(Ty) =3D=3D 0)
return Ops[0];
}
}
@@ -2270,12 +2573,17 @@
return ConstantExpr::getGetElementPtr(cast<Constant>(Ops[0]), Ops.slice(=
1));
}
=20
+Value *llvm::SimplifyGEPInst(ArrayRef<Value *> Ops, const TargetData *TD,
+ const TargetLibraryInfo *TLI,
+ const DominatorTree *DT) {
+ return ::SimplifyGEPInst(Ops, Query (TD, TLI, DT), RecursionLimit);
+}
+
/// SimplifyInsertValueInst - Given operands for an InsertValueInst, see i=
f we
/// can fold the result. If not, this returns null.
-Value *llvm::SimplifyInsertValueInst(Value *Agg, Value *Val,
- ArrayRef<unsigned> Idxs,
- const TargetData *,
- const DominatorTree *) {
+static Value *SimplifyInsertValueInst(Value *Agg, Value *Val,
+ ArrayRef<unsigned> Idxs, const Query=
&Q,
+ unsigned) {
if (Constant *CAgg =3D dyn_cast<Constant>(Agg))
if (Constant *CVal =3D dyn_cast<Constant>(Val))
return ConstantFoldInsertValueInstruction(CAgg, CVal, Idxs);
@@ -2300,8 +2608,17 @@
return 0;
}
=20
+Value *llvm::SimplifyInsertValueInst(Value *Agg, Value *Val,
+ ArrayRef<unsigned> Idxs,
+ const TargetData *TD,
+ const TargetLibraryInfo *TLI,
+ const DominatorTree *DT) {
+ return ::SimplifyInsertValueInst(Agg, Val, Idxs, Query (TD, TLI, DT),
+ RecursionLimit);
+}
+
/// SimplifyPHINode - See if we can fold the given phi. If not, returns n=
ull.
-static Value *SimplifyPHINode(PHINode *PN, const DominatorTree *DT) {
+static Value *SimplifyPHINode(PHINode *PN, const Query &Q) {
// If all of the PHI's incoming values are the same then replace the PHI=
node
// with the common value.
Value *CommonValue =3D 0;
@@ -2329,67 +2646,77 @@
// instruction, we cannot return X as the result of the PHI node unless =
it
// dominates the PHI block.
if (HasUndefInput)
- return ValueDominatesPHI(CommonValue, PN, DT) ? CommonValue : 0;
+ return ValueDominatesPHI(CommonValue, PN, Q.DT) ? CommonValue : 0;
=20
return CommonValue;
}
=20
+static Value *SimplifyTruncInst(Value *Op, Type *Ty, const Query &Q, unsig=
ned) {
+ if (Constant *C =3D dyn_cast<Constant>(Op))
+ return ConstantFoldInstOperands(Instruction::Trunc, Ty, C, Q.TD, Q.TLI=
);
+
+ return 0;
+}
+
+Value *llvm::SimplifyTruncInst(Value *Op, Type *Ty, const TargetData *TD,
+ const TargetLibraryInfo *TLI,
+ const DominatorTree *DT) {
+ return ::SimplifyTruncInst(Op, Ty, Query (TD, TLI, DT), RecursionLimit);
+}
=20
//=3D=3D=3D Helper functions for higher up the class hierarchy.
=20
/// SimplifyBinOp - Given operands for a BinaryOperator, see if we can
/// fold the result. If not, this returns null.
static Value *SimplifyBinOp(unsigned Opcode, Value *LHS, Value *RHS,
- const TargetData *TD, const DominatorTree *DT,
- unsigned MaxRecurse) {
+ const Query &Q, unsigned MaxRecurse) {
switch (Opcode) {
case Instruction::Add:
return SimplifyAddInst(LHS, RHS, /*isNSW*/false, /*isNUW*/false,
- TD, DT, MaxRecurse);
+ Q, MaxRecurse);
case Instruction::Sub:
return SimplifySubInst(LHS, RHS, /*isNSW*/false, /*isNUW*/false,
- TD, DT, MaxRecurse);
- case Instruction::Mul: return SimplifyMulInst (LHS, RHS, TD, DT, MaxRec=
urse);
- case Instruction::SDiv: return SimplifySDivInst(LHS, RHS, TD, DT, MaxRec=
urse);
- case Instruction::UDiv: return SimplifyUDivInst(LHS, RHS, TD, DT, MaxRec=
urse);
- case Instruction::FDiv: return SimplifyFDivInst(LHS, RHS, TD, DT, MaxRec=
urse);
- case Instruction::SRem: return SimplifySRemInst(LHS, RHS, TD, DT, MaxRec=
urse);
- case Instruction::URem: return SimplifyURemInst(LHS, RHS, TD, DT, MaxRec=
urse);
- case Instruction::FRem: return SimplifyFRemInst(LHS, RHS, TD, DT, MaxRec=
urse);
+ Q, MaxRecurse);
+ case Instruction::Mul: return SimplifyMulInst (LHS, RHS, Q, MaxRecurse);
+ case Instruction::SDiv: return SimplifySDivInst(LHS, RHS, Q, MaxRecurse);
+ case Instruction::UDiv: return SimplifyUDivInst(LHS, RHS, Q, MaxRecurse);
+ case Instruction::FDiv: return SimplifyFDivInst(LHS, RHS, Q, MaxRecurse);
+ case Instruction::SRem: return SimplifySRemInst(LHS, RHS, Q, MaxRecurse);
+ case Instruction::URem: return SimplifyURemInst(LHS, RHS, Q, MaxRecurse);
+ case Instruction::FRem: return SimplifyFRemInst(LHS, RHS, Q, MaxRecurse);
case Instruction::Shl:
return SimplifyShlInst(LHS, RHS, /*isNSW*/false, /*isNUW*/false,
- TD, DT, MaxRecurse);
+ Q, MaxRecurse);
case Instruction::LShr:
- return SimplifyLShrInst(LHS, RHS, /*isExact*/false, TD, DT, MaxRecurse=
);
+ return SimplifyLShrInst(LHS, RHS, /*isExact*/false, Q, MaxRecurse);
case Instruction::AShr:
- return SimplifyAShrInst(LHS, RHS, /*isExact*/false, TD, DT, MaxRecurse=
);
- case Instruction::And: return SimplifyAndInst(LHS, RHS, TD, DT, MaxRecur=
se);
- case Instruction::Or: return SimplifyOrInst (LHS, RHS, TD, DT, MaxRecur=
se);
- case Instruction::Xor: return SimplifyXorInst(LHS, RHS, TD, DT, MaxRecur=
se);
+ return SimplifyAShrInst(LHS, RHS, /*isExact*/false, Q, MaxRecurse);
+ case Instruction::And: return SimplifyAndInst(LHS, RHS, Q, MaxRecurse);
+ case Instruction::Or: return SimplifyOrInst (LHS, RHS, Q, MaxRecurse);
+ case Instruction::Xor: return SimplifyXorInst(LHS, RHS, Q, MaxRecurse);
default:
if (Constant *CLHS =3D dyn_cast<Constant>(LHS))
if (Constant *CRHS =3D dyn_cast<Constant>(RHS)) {
Constant *COps[] =3D {CLHS, CRHS};
- return ConstantFoldInstOperands(Opcode, LHS->getType(), COps, TD);
+ return ConstantFoldInstOperands(Opcode, LHS->getType(), COps, Q.TD,
+ Q.TLI);
}
=20
// If the operation is associative, try some generic simplifications.
if (Instruction::isAssociative(Opcode))
- if (Value *V =3D SimplifyAssociativeBinOp(Opcode, LHS, RHS, TD, DT,
- MaxRecurse))
+ if (Value *V =3D SimplifyAssociativeBinOp(Opcode, LHS, RHS, Q, MaxRe=
curse))
return V;
=20
- // If the operation is with the result of a select instruction, check =
whether
+ // If the operation is with the result of a select instruction check w=
hether
// operating on either branch of the select always yields the same val=
ue.
if (isa<SelectInst>(LHS) || isa<SelectInst>(RHS))
- if (Value *V =3D ThreadBinOpOverSelect(Opcode, LHS, RHS, TD, DT,
- MaxRecurse))
+ if (Value *V =3D ThreadBinOpOverSelect(Opcode, LHS, RHS, Q, MaxRecur=
se))
return V;
=20
// If the operation is with the result of a phi instruction, check whe=
ther
// operating on all incoming values of the phi always yields the same =
value.
if (isa<PHINode>(LHS) || isa<PHINode>(RHS))
- if (Value *V =3D ThreadBinOpOverPHI(Opcode, LHS, RHS, TD, DT, MaxRec=
urse))
+ if (Value *V =3D ThreadBinOpOverPHI(Opcode, LHS, RHS, Q, MaxRecurse))
return V;
=20
return 0;
@@ -2397,119 +2724,136 @@
}
=20
Value *llvm::SimplifyBinOp(unsigned Opcode, Value *LHS, Value *RHS,
- const TargetData *TD, const DominatorTree *DT) {
- return ::SimplifyBinOp(Opcode, LHS, RHS, TD, DT, RecursionLimit);
+ const TargetData *TD, const TargetLibraryInfo *=
TLI,
+ const DominatorTree *DT) {
+ return ::SimplifyBinOp(Opcode, LHS, RHS, Query (TD, TLI, DT), RecursionL=
imit);
}
=20
/// SimplifyCmpInst - Given operands for a CmpInst, see if we can
/// fold the result.
static Value *SimplifyCmpInst(unsigned Predicate, Value *LHS, Value *RHS,
- const TargetData *TD, const DominatorTree *D=
T,
- unsigned MaxRecurse) {
+ const Query &Q, unsigned MaxRecurse) {
if (CmpInst::isIntPredicate((CmpInst::Predicate)Predicate))
- return SimplifyICmpInst(Predicate, LHS, RHS, TD, DT, MaxRecurse);
- return SimplifyFCmpInst(Predicate, LHS, RHS, TD, DT, MaxRecurse);
+ return SimplifyICmpInst(Predicate, LHS, RHS, Q, MaxRecurse);
+ return SimplifyFCmpInst(Predicate, LHS, RHS, Q, MaxRecurse);
}
=20
Value *llvm::SimplifyCmpInst(unsigned Predicate, Value *LHS, Value *RHS,
- const TargetData *TD, const DominatorTree *DT=
) {
- return ::SimplifyCmpInst(Predicate, LHS, RHS, TD, DT, RecursionLimit);
+ const TargetData *TD, const TargetLibraryInfo=
*TLI,
+ const DominatorTree *DT) {
+ return ::SimplifyCmpInst(Predicate, LHS, RHS, Query (TD, TLI, DT),
+ RecursionLimit);
+}
+
+static Value *SimplifyCallInst(CallInst *CI, const Query &) {
+ // call undef -> undef
+ if (isa<UndefValue>(CI->getCalledValue()))
+ return UndefValue::get(CI->getType());
+
+ return 0;
}
=20
/// SimplifyInstruction - See if we can compute a simplified version of th=
is
/// instruction. If not, this returns null.
Value *llvm::SimplifyInstruction(Instruction *I, const TargetData *TD,
+ const TargetLibraryInfo *TLI,
const DominatorTree *DT) {
Value *Result;
=20
switch (I->getOpcode()) {
default:
- Result =3D ConstantFoldInstruction(I, TD);
+ Result =3D ConstantFoldInstruction(I, TD, TLI);
break;
case Instruction::Add:
Result =3D SimplifyAddInst(I->getOperand(0), I->getOperand(1),
cast<BinaryOperator>(I)->hasNoSignedWrap(),
cast<BinaryOperator>(I)->hasNoUnsignedWrap(),
- TD, DT);
+ TD, TLI, DT);
break;
case Instruction::Sub:
Result =3D SimplifySubInst(I->getOperand(0), I->getOperand(1),
cast<BinaryOperator>(I)->hasNoSignedWrap(),
cast<BinaryOperator>(I)->hasNoUnsignedWrap(),
- TD, DT);
+ TD, TLI, DT);
break;
case Instruction::Mul:
- Result =3D SimplifyMulInst(I->getOperand(0), I->getOperand(1), TD, DT);
+ Result =3D SimplifyMulInst(I->getOperand(0), I->getOperand(1), TD, TLI=
, DT);
break;
case Instruction::SDiv:
- Result =3D SimplifySDivInst(I->getOperand(0), I->getOperand(1), TD, DT=
);
+ Result =3D SimplifySDivInst(I->getOperand(0), I->getOperand(1), TD, TL=
I, DT);
break;
case Instruction::UDiv:
- Result =3D SimplifyUDivInst(I->getOperand(0), I->getOperand(1), TD, DT=
);
+ Result =3D SimplifyUDivInst(I->getOperand(0), I->getOperand(1), TD, TL=
I, DT);
break;
case Instruction::FDiv:
- Result =3D SimplifyFDivInst(I->getOperand(0), I->getOperand(1), TD, DT=
);
+ Result =3D SimplifyFDivInst(I->getOperand(0), I->getOperand(1), TD, TL=
I, DT);
break;
case Instruction::SRem:
- Result =3D SimplifySRemInst(I->getOperand(0), I->getOperand(1), TD, DT=
);
+ Result =3D SimplifySRemInst(I->getOperand(0), I->getOperand(1), TD, TL=
I, DT);
break;
case Instruction::URem:
- Result =3D SimplifyURemInst(I->getOperand(0), I->getOperand(1), TD, DT=
);
+ Result =3D SimplifyURemInst(I->getOperand(0), I->getOperand(1), TD, TL=
I, DT);
break;
case Instruction::FRem:
- Result =3D SimplifyFRemInst(I->getOperand(0), I->getOperand(1), TD, DT=
);
+ Result =3D SimplifyFRemInst(I->getOperand(0), I->getOperand(1), TD, TL=
I, DT);
break;
case Instruction::Shl:
Result =3D SimplifyShlInst(I->getOperand(0), I->getOperand(1),
cast<BinaryOperator>(I)->hasNoSignedWrap(),
cast<BinaryOperator>(I)->hasNoUnsignedWrap(),
- TD, DT);
+ TD, TLI, DT);
break;
case Instruction::LShr:
Result =3D SimplifyLShrInst(I->getOperand(0), I->getOperand(1),
cast<BinaryOperator>(I)->isExact(),
- TD, DT);
+ TD, TLI, DT);
break;
case Instruction::AShr:
Result =3D SimplifyAShrInst(I->getOperand(0), I->getOperand(1),
cast<BinaryOperator>(I)->isExact(),
- TD, DT);
+ TD, TLI, DT);
break;
case Instruction::And:
- Result =3D SimplifyAndInst(I->getOperand(0), I->getOperand(1), TD, DT);
+ Result =3D SimplifyAndInst(I->getOperand(0), I->getOperand(1), TD, TLI=
, DT);
break;
case Instruction::Or:
- Result =3D SimplifyOrInst(I->getOperand(0), I->getOperand(1), TD, DT);
+ Result =3D SimplifyOrInst(I->getOperand(0), I->getOperand(1), TD, TLI,=
DT);
break;
case Instruction::Xor:
- Result =3D SimplifyXorInst(I->getOperand(0), I->getOperand(1), TD, DT);
+ Result =3D SimplifyXorInst(I->getOperand(0), I->getOperand(1), TD, TLI=
, DT);
break;
case Instruction::ICmp:
Result =3D SimplifyICmpInst(cast<ICmpInst>(I)->getPredicate(),
- I->getOperand(0), I->getOperand(1), TD, DT);
+ I->getOperand(0), I->getOperand(1), TD, TLI,=
DT);
break;
case Instruction::FCmp:
Result =3D SimplifyFCmpInst(cast<FCmpInst>(I)->getPredicate(),
- I->getOperand(0), I->getOperand(1), TD, DT);
+ I->getOperand(0), I->getOperand(1), TD, TLI,=
DT);
break;
case Instruction::Select:
Result =3D SimplifySelectInst(I->getOperand(0), I->getOperand(1),
- I->getOperand(2), TD, DT);
+ I->getOperand(2), TD, TLI, DT);
break;
case Instruction::GetElementPtr: {
SmallVector<Value*, 8> Ops(I->op_begin(), I->op_end());
- Result =3D SimplifyGEPInst(Ops, TD, DT);
+ Result =3D SimplifyGEPInst(Ops, TD, TLI, DT);
break;
}
case Instruction::InsertValue: {
InsertValueInst *IV =3D cast<InsertValueInst>(I);
Result =3D SimplifyInsertValueInst(IV->getAggregateOperand(),
IV->getInsertedValueOperand(),
- IV->getIndices(), TD, DT);
+ IV->getIndices(), TD, TLI, DT);
break;
}
case Instruction::PHI:
- Result =3D SimplifyPHINode(cast<PHINode>(I), DT);
+ Result =3D SimplifyPHINode(cast<PHINode>(I), Query (TD, TLI, DT));
+ break;
+ case Instruction::Call:
+ Result =3D SimplifyCallInst(cast<CallInst>(I), Query (TD, TLI, DT));
+ break;
+ case Instruction::Trunc:
+ Result =3D SimplifyTruncInst(I->getOperand(0), I->getType(), TD, TLI, =
DT);
break;
}
=20
@@ -2519,57 +2863,84 @@
return Result =3D=3D I ? UndefValue::get(I->getType()) : Result;
}
=20
-/// ReplaceAndSimplifyAllUses - Perform From->replaceAllUsesWith(To) and t=
hen
-/// delete the From instruction. In addition to a basic RAUW, this does a
-/// recursive simplification of the newly formed instructions. This catch=
es
-/// things where one simplification exposes other opportunities. This only
-/// simplifies and deletes scalar operations, it does not change the CFG.
+/// \brief Implementation of recursive simplification through an instructi=
ons
+/// uses.
///
-void llvm::ReplaceAndSimplifyAllUses(Instruction *From, Value *To,
- const TargetData *TD,
- const DominatorTree *DT) {
- assert(From !=3D To && "ReplaceAndSimplifyAllUses(X,X) is not valid!");
-
- // FromHandle/ToHandle - This keeps a WeakVH on the from/to values so th=
at
- // we can know if it gets deleted out from under us or replaced in a
- // recursive simplification.
- WeakVH FromHandle(From);
- WeakVH ToHandle(To);
-
- while (!From->use_empty()) {
- // Update the instruction to use the new value.
- Use &TheUse =3D From->use_begin().getUse();
- Instruction *User =3D cast<Instruction>(TheUse.getUser());
- TheUse =3D To;
-
- // Check to see if the instruction can be folded due to the operand
- // replacement. For example changing (or X, Y) into (or X, -1) can re=
place
- // the 'or' with -1.
- Value *SimplifiedVal;
- {
- // Sanity check to make sure 'User' doesn't dangle across
- // SimplifyInstruction.
- AssertingVH<> UserHandle(User);
-
- SimplifiedVal =3D SimplifyInstruction(User, TD, DT);
- if (SimplifiedVal =3D=3D 0) continue;
- }
-
- // Recursively simplify this user to the new value.
- ReplaceAndSimplifyAllUses(User, SimplifiedVal, TD, DT);
- From =3D dyn_cast_or_null<Instruction>((Value*)FromHandle);
- To =3D ToHandle;
-
- assert(ToHandle && "To value deleted by recursive simplification?");
-
- // If the recursive simplification ended up revisiting and deleting
- // 'From' then we're done.
- if (From =3D=3D 0)
- return;
+/// This is the common implementation of the recursive simplification rout=
ines.
+/// If we have a pre-simplified value in 'SimpleV', that is forcibly used =
to
+/// replace the instruction 'I'. Otherwise, we simply add 'I' to the list =
of
+/// instructions to process and attempt to simplify it using
+/// InstructionSimplify.
+///
+/// This routine returns 'true' only when *it* simplifies something. The p=
assed
+/// in simplified value does not count toward this.
+static bool replaceAndRecursivelySimplifyImpl(Instruction *I, Value *Simpl=
eV,
+ const TargetData *TD,
+ const TargetLibraryInfo *TLI,
+ const DominatorTree *DT) {
+ bool Simplified =3D false;
+ SmallSetVector<Instruction *, 8> Worklist;
+
+ // If we have an explicit value to collapse to, do that round of the
+ // simplification loop by hand initially.
+ if (SimpleV) {
+ for (Value::use_iterator UI =3D I->use_begin(), UE =3D I->use_end(); U=
I !=3D UE;
+ ++UI)
+ if (*UI !=3D I)
+ Worklist.insert(cast<Instruction>(*UI));
+
+ // Replace the instruction with its simplified value.
+ I->replaceAllUsesWith(SimpleV);
+
+ // Gracefully handle edge cases where the instruction is not wired int=
o any
+ // parent block.
+ if (I->getParent())
+ I->eraseFromParent();
+ } else {
+ Worklist.insert(I);
}
=20
- // If 'From' has value handles referring to it, do a real RAUW to update=
them.
- From->replaceAllUsesWith(To);
-
- From->eraseFromParent();
+ // Note that we must test the size on each iteration, the worklist can g=
row.
+ for (unsigned Idx =3D 0; Idx !=3D Worklist.size(); ++Idx) {
+ I =3D Worklist[Idx];
+
+ // See if this instruction simplifies.
+ SimpleV =3D SimplifyInstruction(I, TD, TLI, DT);
+ if (!SimpleV)
+ continue;
+
+ Simplified =3D true;
+
+ // Stash away all the uses of the old instruction so we can check them=
for
+ // recursive simplifications after a RAUW. This is cheaper than checki=
ng all
+ // uses of To on the recursive step in most cases.
+ for (Value::use_iterator UI =3D I->use_begin(), UE =3D I->use_end(); U=
I !=3D UE;
+ ++UI)
+ Worklist.insert(cast<Instruction>(*UI));
+
+ // Replace the instruction with its simplified value.
+ I->replaceAllUsesWith(SimpleV);
+
+ // Gracefully handle edge cases where the instruction is not wired int=
o any
+ // parent block.
+ if (I->getParent())
+ I->eraseFromParent();
+ }
+ return Simplified;
}
+
+bool llvm::recursivelySimplifyInstruction(Instruction *I,
+ const TargetData *TD,
+ const TargetLibraryInfo *TLI,
+ const DominatorTree *DT) {
+ return replaceAndRecursivelySimplifyImpl(I, 0, TD, TLI, DT);
+}
+
+bool llvm::replaceAndRecursivelySimplify(Instruction *I, Value *SimpleV,
+ const TargetData *TD,
+ const TargetLibraryInfo *TLI,
+ const DominatorTree *DT) {
+ assert(I !=3D SimpleV && "replaceAndRecursivelySimplify(X,X) is not vali=
d!");
+ assert(SimpleV && "Must provide a simplified value.");
+ return replaceAndRecursivelySimplifyImpl(I, SimpleV, TD, TLI, DT);
+}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/LazyVal=
ueInfo.cpp
--- a/head/contrib/llvm/lib/Analysis/LazyValueInfo.cpp Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/LazyValueInfo.cpp Tue Apr 17 11:51:51 =
2012 +0300
@@ -20,20 +20,25 @@
#include "llvm/IntrinsicInst.h"
#include "llvm/Analysis/ConstantFolding.h"
#include "llvm/Target/TargetData.h"
+#include "llvm/Target/TargetLibraryInfo.h"
#include "llvm/Support/CFG.h"
#include "llvm/Support/ConstantRange.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/PatternMatch.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Support/ValueHandle.h"
-#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/STLExtras.h"
#include <map>
#include <stack>
using namespace llvm;
+using namespace PatternMatch;
=20
char LazyValueInfo::ID =3D 0;
-INITIALIZE_PASS(LazyValueInfo, "lazy-value-info",
+INITIALIZE_PASS_BEGIN(LazyValueInfo, "lazy-value-info",
+ "Lazy Value Information Analysis", false, true)
+INITIALIZE_PASS_DEPENDENCY(TargetLibraryInfo)
+INITIALIZE_PASS_END(LazyValueInfo, "lazy-value-info",
"Lazy Value Information Analysis", false, true)
=20
namespace llvm {
@@ -61,10 +66,10 @@
constant,
/// notconstant - This Value is known to not have the specified value.
notconstant,
- =20
+
/// constantrange - The Value falls within this range.
constantrange,
- =20
+
/// overdefined - This value is not known to be constant, and we know =
that
/// it has a value.
overdefined
@@ -207,7 +212,7 @@
=20
// Unless we can prove that the two Constants are different, we mu=
st
// move to overdefined.
- // FIXME: use TargetData for smarter constant folding.
+ // FIXME: use TargetData/TargetLibraryInfo for smarter constant fo=
lding.
if (ConstantInt *Res =3D dyn_cast<ConstantInt>(
ConstantFoldCompareInstOperands(CmpInst::ICMP_NE,
getConstant(),
@@ -233,7 +238,7 @@
=20
// Unless we can prove that the two Constants are different, we mu=
st
// move to overdefined.
- // FIXME: use TargetData for smarter constant folding.
+ // FIXME: use TargetData/TargetLibraryInfo for smarter constant fo=
lding.
if (ConstantInt *Res =3D dyn_cast<ConstantInt>(
ConstantFoldCompareInstOperands(CmpInst::ICMP_NE,
getNotConstant(),
@@ -305,50 +310,6 @@
};
}
=20
-namespace llvm {
- template<>
- struct DenseMapInfo<LVIValueHandle> {
- typedef DenseMapInfo<Value*> PointerInfo;
- static inline LVIValueHandle getEmptyKey() {
- return LVIValueHandle(PointerInfo::getEmptyKey(),
- static_cast<LazyValueInfoCache*>(0));
- }
- static inline LVIValueHandle getTombstoneKey() {
- return LVIValueHandle(PointerInfo::getTombstoneKey(),
- static_cast<LazyValueInfoCache*>(0));
- }
- static unsigned getHashValue(const LVIValueHandle &Val) {
- return PointerInfo::getHashValue(Val);
- }
- static bool isEqual(const LVIValueHandle &LHS, const LVIValueHandle &R=
HS) {
- return LHS =3D=3D RHS;
- }
- };
- =20
- template<>
- struct DenseMapInfo<std::pair<AssertingVH<BasicBlock>, Value*> > {
- typedef std::pair<AssertingVH<BasicBlock>, Value*> PairTy;
- typedef DenseMapInfo<AssertingVH<BasicBlock> > APointerInfo;
- typedef DenseMapInfo<Value*> BPointerInfo;
- static inline PairTy getEmptyKey() {
- return std::make_pair(APointerInfo::getEmptyKey(),
- BPointerInfo::getEmptyKey());
- }
- static inline PairTy getTombstoneKey() {
- return std::make_pair(APointerInfo::getTombstoneKey(),=20
- BPointerInfo::getTombstoneKey());
- }
- static unsigned getHashValue( const PairTy &Val) {
- return APointerInfo::getHashValue(Val.first) ^=20
- BPointerInfo::getHashValue(Val.second);
- }
- static bool isEqual(const PairTy &LHS, const PairTy &RHS) {
- return APointerInfo::isEqual(LHS.first, RHS.first) &&
- BPointerInfo::isEqual(LHS.second, RHS.second);
- }
- };
-}
-
namespace {=20
/// LazyValueInfoCache - This is the cache kept by LazyValueInfo which
/// maintains information about queries across the clients' queries.
@@ -360,14 +321,18 @@
=20
/// ValueCache - This is all of the cached information for all values,
/// mapped from Value* to key information.
- DenseMap<LVIValueHandle, ValueCacheEntryTy> ValueCache;
+ std::map<LVIValueHandle, ValueCacheEntryTy> ValueCache;
=20
/// OverDefinedCache - This tracks, on a per-block basis, the set of=20
/// values that are over-defined at the end of that block. This is re=
quired
/// for cache updating.
typedef std::pair<AssertingVH<BasicBlock>, Value*> OverDefinedPairTy;
DenseSet<OverDefinedPairTy> OverDefinedCache;
- =20
+
+ /// SeenBlocks - Keep track of all blocks that we have ever seen, so we
+ /// don't spend time removing unused blocks from our caches.
+ DenseSet<AssertingVH<BasicBlock> > SeenBlocks;
+
/// BlockValueStack - This stack holds the state of the value solver
/// during a query. It basically emulates the callstack of the naive
/// recursive value lookup process.
@@ -438,6 +403,7 @@
=20
/// clear - Empty the cache.
void clear() {
+ SeenBlocks.clear();
ValueCache.clear();
OverDefinedCache.clear();
}
@@ -466,6 +432,12 @@
}
=20
void LazyValueInfoCache::eraseBlock(BasicBlock *BB) {
+ // Shortcut if we have never seen this block.
+ DenseSet<AssertingVH<BasicBlock> >::iterator I =3D SeenBlocks.find(BB);
+ if (I =3D=3D SeenBlocks.end())
+ return;
+ SeenBlocks.erase(I);
+
SmallVector<OverDefinedPairTy, 4> ToErase;
for (DenseSet<OverDefinedPairTy>::iterator I =3D OverDefinedCache.begin=
(),
E =3D OverDefinedCache.end(); I !=3D E; ++I) {
@@ -477,7 +449,7 @@
E =3D ToErase.end(); I !=3D E; ++I)
OverDefinedCache.erase(*I);
=20
- for (DenseMap<LVIValueHandle, ValueCacheEntryTy>::iterator
+ for (std::map<LVIValueHandle, ValueCacheEntryTy>::iterator
I =3D ValueCache.begin(), E =3D ValueCache.end(); I !=3D E; ++I)
I->second.erase(BB);
}
@@ -505,6 +477,7 @@
if (Constant *VC =3D dyn_cast<Constant>(Val))
return LVILatticeVal::get(VC);
=20
+ SeenBlocks.insert(BB);
return lookup(Val)[BB];
}
=20
@@ -513,6 +486,7 @@
return true;
=20
ValueCacheEntryTy &Cache =3D lookup(Val);
+ SeenBlocks.insert(BB);
LVILatticeVal &BBLV =3D Cache[BB];
=20
// OverDefinedCacheUpdater is a helper object that will update
@@ -823,9 +797,8 @@
// If the condition of the branch is an equality comparison, we may =
be
// able to infer the value.
ICmpInst *ICI =3D dyn_cast<ICmpInst>(BI->getCondition());
- if (ICI && ICI->getOperand(0) =3D=3D Val &&
- isa<Constant>(ICI->getOperand(1))) {
- if (ICI->isEquality()) {
+ if (ICI && isa<Constant>(ICI->getOperand(1))) {
+ if (ICI->isEquality() && ICI->getOperand(0) =3D=3D Val) {
// We know that V has the RHS constant if this is a true SETEQ or
// false SETNE.=20
if (isTrueDest =3D=3D (ICI->getPredicate() =3D=3D ICmpInst::ICMP=
_EQ))
@@ -835,12 +808,23 @@
return true;
}
=20
- if (ConstantInt *CI =3D dyn_cast<ConstantInt>(ICI->getOperand(1)))=
{
+ // Recognize the range checking idiom that InstCombine produces.
+ // (X-C1) u< C2 --> [C1, C1+C2)
+ ConstantInt *NegOffset =3D 0;
+ if (ICI->getPredicate() =3D=3D ICmpInst::ICMP_ULT)
+ match(ICI->getOperand(0), m_Add(m_Specific(Val),
+ m_ConstantInt(NegOffset)));
+
+ ConstantInt *CI =3D dyn_cast<ConstantInt>(ICI->getOperand(1));
+ if (CI && (ICI->getOperand(0) =3D=3D Val || NegOffset)) {
// Calculate the range of values that would satisfy the comparis=
on.
ConstantRange CmpRange(CI->getValue(), CI->getValue()+1);
ConstantRange TrueValues =3D
ConstantRange::makeICmpRegion(ICI->getPredicate(), CmpRange);
=20
+ if (NegOffset) // Apply the offset from above.
+ TrueValues =3D TrueValues.subtract(NegOffset->getValue());
+
// If we're interested in the false dest, invert the condition.
if (!isTrueDest) TrueValues =3D TrueValues.inverse();
=20
@@ -882,10 +866,11 @@
// BBFrom to BBTo.
unsigned NumEdges =3D 0;
ConstantInt *EdgeVal =3D 0;
- for (unsigned i =3D 1, e =3D SI->getNumSuccessors(); i !=3D e; ++i) {
- if (SI->getSuccessor(i) !=3D BBTo) continue;
+ for (SwitchInst::CaseIt i =3D SI->case_begin(), e =3D SI->case_end();
+ i !=3D e; ++i) {
+ if (i.getCaseSuccessor() !=3D BBTo) continue;
if (NumEdges++) break;
- EdgeVal =3D SI->getCaseValue(i);
+ EdgeVal =3D i.getCaseValue();
}
assert(EdgeVal && "Missing successor?");
if (NumEdges =3D=3D 1) {
@@ -1007,12 +992,19 @@
bool LazyValueInfo::runOnFunction(Function &F) {
if (PImpl)
getCache(PImpl).clear();
- =20
+
TD =3D getAnalysisIfAvailable<TargetData>();
+ TLI =3D &getAnalysis<TargetLibraryInfo>();
+
// Fully lazy.
return false;
}
=20
+void LazyValueInfo::getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.setPreservesAll();
+ AU.addRequired<TargetLibraryInfo>();
+}
+
void LazyValueInfo::releaseMemory() {
// If the cache was allocated, free it.
if (PImpl) {
@@ -1061,7 +1053,8 @@
// If we know the value is a constant, evaluate the conditional.
Constant *Res =3D 0;
if (Result.isConstant()) {
- Res =3D ConstantFoldCompareInstOperands(Pred, Result.getConstant(), C,=
TD);
+ Res =3D ConstantFoldCompareInstOperands(Pred, Result.getConstant(), C,=
TD,
+ TLI);
if (ConstantInt *ResCI =3D dyn_cast<ConstantInt>(Res))
return ResCI->isZero() ? False : True;
return Unknown;
@@ -1102,13 +1095,15 @@
if (Pred =3D=3D ICmpInst::ICMP_EQ) {
// !C1 =3D=3D C -> false iff C1 =3D=3D C.
Res =3D ConstantFoldCompareInstOperands(ICmpInst::ICMP_NE,
- Result.getNotConstant(), C, TD=
);
+ Result.getNotConstant(), C, TD,
+ TLI);
if (Res->isNullValue())
return False;
} else if (Pred =3D=3D ICmpInst::ICMP_NE) {
// !C1 !=3D C -> true iff C1 =3D=3D C.
Res =3D ConstantFoldCompareInstOperands(ICmpInst::ICMP_NE,
- Result.getNotConstant(), C, TD=
);
+ Result.getNotConstant(), C, TD,
+ TLI);
if (Res->isNullValue())
return True;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/Lint.cpp
--- a/head/contrib/llvm/lib/Analysis/Lint.cpp Tue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/Lint.cpp Tue Apr 17 11:51:51 2012 +0300
@@ -44,6 +44,7 @@
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/Assembly/Writer.h"
#include "llvm/Target/TargetData.h"
+#include "llvm/Target/TargetLibraryInfo.h"
#include "llvm/Pass.h"
#include "llvm/PassManager.h"
#include "llvm/IntrinsicInst.h"
@@ -103,6 +104,7 @@
AliasAnalysis *AA;
DominatorTree *DT;
TargetData *TD;
+ TargetLibraryInfo *TLI;
=20
std::string Messages;
raw_string_ostream MessagesStr;
@@ -117,6 +119,7 @@
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
AU.addRequired<AliasAnalysis>();
+ AU.addRequired<TargetLibraryInfo>();
AU.addRequired<DominatorTree>();
}
virtual void print(raw_ostream &O, const Module *M) const {}
@@ -149,6 +152,7 @@
char Lint::ID =3D 0;
INITIALIZE_PASS_BEGIN(Lint, "lint", "Statically lint-checks LLVM IR",
false, true)
+INITIALIZE_PASS_DEPENDENCY(TargetLibraryInfo)
INITIALIZE_PASS_DEPENDENCY(DominatorTree)
INITIALIZE_AG_DEPENDENCY(AliasAnalysis)
INITIALIZE_PASS_END(Lint, "lint", "Statically lint-checks LLVM IR",
@@ -174,6 +178,7 @@
AA =3D &getAnalysis<AliasAnalysis>();
DT =3D &getAnalysis<DominatorTree>();
TD =3D getAnalysisIfAvailable<TargetData>();
+ TLI =3D &getAnalysis<TargetLibraryInfo>();
visit(F);
dbgs() << MessagesStr.str();
Messages.clear();
@@ -411,9 +416,8 @@
=20
if (Align !=3D 0) {
unsigned BitWidth =3D TD->getTypeSizeInBits(Ptr->getType());
- APInt Mask =3D APInt::getAllOnesValue(BitWidth),
- KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
- ComputeMaskedBits(Ptr, Mask, KnownZero, KnownOne, TD);
+ APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
+ ComputeMaskedBits(Ptr, KnownZero, KnownOne, TD);
Assert1(!(KnownOne & APInt::getLowBitsSet(BitWidth, Log2_32(Align))),
"Undefined behavior: Memory reference address is misaligned"=
, &I);
}
@@ -471,9 +475,8 @@
if (isa<UndefValue>(V)) return true;
=20
unsigned BitWidth =3D cast<IntegerType>(V->getType())->getBitWidth();
- APInt Mask =3D APInt::getAllOnesValue(BitWidth),
- KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
- ComputeMaskedBits(V, Mask, KnownZero, KnownOne, TD);
+ APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
+ ComputeMaskedBits(V, KnownZero, KnownOne, TD);
return KnownZero.isAllOnesValue();
}
=20
@@ -614,10 +617,10 @@
=20
// As a last resort, try SimplifyInstruction or constant folding.
if (Instruction *Inst =3D dyn_cast<Instruction>(V)) {
- if (Value *W =3D SimplifyInstruction(Inst, TD, DT))
+ if (Value *W =3D SimplifyInstruction(Inst, TD, TLI, DT))
return findValueImpl(W, OffsetOk, Visited);
} else if (ConstantExpr *CE =3D dyn_cast<ConstantExpr>(V)) {
- if (Value *W =3D ConstantFoldConstantExpression(CE, TD))
+ if (Value *W =3D ConstantFoldConstantExpression(CE, TD, TLI))
if (W !=3D V)
return findValueImpl(W, OffsetOk, Visited);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/Loads.c=
pp
--- a/head/contrib/llvm/lib/Analysis/Loads.cpp Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/llvm/lib/Analysis/Loads.cpp Tue Apr 17 11:51:51 2012 +03=
00
@@ -17,6 +17,7 @@
#include "llvm/GlobalAlias.h"
#include "llvm/GlobalVariable.h"
#include "llvm/IntrinsicInst.h"
+#include "llvm/LLVMContext.h"
#include "llvm/Operator.h"
using namespace llvm;
=20
@@ -160,10 +161,15 @@
/// MaxInstsToScan specifies the maximum instructions to scan in the block=
. If
/// it is set to 0, it will scan the whole block. You can also optionally
/// specify an alias analysis implementation, which makes this more precis=
e.
+///
+/// If TBAATag is non-null and a load or store is found, the TBAA tag from=
the
+/// load or store is recorded there. If there is no TBAA tag or if no acc=
ess
+/// is found, it is left unmodified.
Value *llvm::FindAvailableLoadedValue(Value *Ptr, BasicBlock *ScanBB,
BasicBlock::iterator &ScanFrom,
unsigned MaxInstsToScan,
- AliasAnalysis *AA) {
+ AliasAnalysis *AA,
+ MDNode **TBAATag) {
if (MaxInstsToScan =3D=3D 0) MaxInstsToScan =3D ~0U;
=20
// If we're using alias analysis to disambiguate get the size of *Ptr.
@@ -191,15 +197,19 @@
// (This is true even if the load is volatile or atomic, although
// those cases are unlikely.)
if (LoadInst *LI =3D dyn_cast<LoadInst>(Inst))
- if (AreEquivalentAddressValues(LI->getOperand(0), Ptr))
+ if (AreEquivalentAddressValues(LI->getOperand(0), Ptr)) {
+ if (TBAATag) *TBAATag =3D LI->getMetadata(LLVMContext::MD_tbaa);
return LI;
+ }
=20
if (StoreInst *SI =3D dyn_cast<StoreInst>(Inst)) {
// If this is a store through Ptr, the value is available!
// (This is true even if the store is volatile or atomic, although
// those cases are unlikely.)
- if (AreEquivalentAddressValues(SI->getOperand(1), Ptr))
+ if (AreEquivalentAddressValues(SI->getOperand(1), Ptr)) {
+ if (TBAATag) *TBAATag =3D SI->getMetadata(LLVMContext::MD_tbaa);
return SI->getOperand(0);
+ }
=20
// If Ptr is an alloca and this is a store to a different alloca, ig=
nore
// the store. This is a trivial form of alias analysis that is impo=
rtant
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/LoopDep=
endenceAnalysis.cpp
--- a/head/contrib/llvm/lib/Analysis/LoopDependenceAnalysis.cpp Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/LoopDependenceAnalysis.cpp Tue Apr 17 =
11:51:51 2012 +0300
@@ -91,8 +91,6 @@
if (StoreInst *i =3D dyn_cast<StoreInst>(I))
return i->getPointerOperand();
llvm_unreachable("Value is no load or store instruction!");
- // Never reached.
- return 0;
}
=20
static AliasAnalysis::AliasResult UnderlyingObjectsAlias(AliasAnalysis *AA,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/LoopInf=
o.cpp
--- a/head/contrib/llvm/lib/Analysis/LoopInfo.cpp Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/llvm/lib/Analysis/LoopInfo.cpp Tue Apr 17 11:51:51 2012 =
+0300
@@ -19,6 +19,7 @@
#include "llvm/Instructions.h"
#include "llvm/Analysis/Dominators.h"
#include "llvm/Analysis/LoopIterator.h"
+#include "llvm/Analysis/ValueTracking.h"
#include "llvm/Assembly/Writer.h"
#include "llvm/Support/CFG.h"
#include "llvm/Support/CommandLine.h"
@@ -95,7 +96,7 @@
// Test if the value is already loop-invariant.
if (isLoopInvariant(I))
return true;
- if (!I->isSafeToSpeculativelyExecute())
+ if (!isSafeToSpeculativelyExecute(I))
return false;
if (I->mayReadFromMemory())
return false;
@@ -165,99 +166,6 @@
return 0;
}
=20
-/// getTripCount - Return a loop-invariant LLVM value indicating the numbe=
r of
-/// times the loop will be executed. Note that this means that the backed=
ge
-/// of the loop executes N-1 times. If the trip-count cannot be determine=
d,
-/// this returns null.
-///
-/// The IndVarSimplify pass transforms loops to have a form that this
-/// function easily understands.
-///
-Value *Loop::getTripCount() const {
- // Canonical loops will end with a 'cmp ne I, V', where I is the increme=
nted
- // canonical induction variable and V is the trip count of the loop.
- PHINode *IV =3D getCanonicalInductionVariable();
- if (IV =3D=3D 0 || IV->getNumIncomingValues() !=3D 2) return 0;
-
- bool P0InLoop =3D contains(IV->getIncomingBlock(0));
- Value *Inc =3D IV->getIncomingValue(!P0InLoop);
- BasicBlock *BackedgeBlock =3D IV->getIncomingBlock(!P0InLoop);
-
- if (BranchInst *BI =3D dyn_cast<BranchInst>(BackedgeBlock->getTerminator=
()))
- if (BI->isConditional()) {
- if (ICmpInst *ICI =3D dyn_cast<ICmpInst>(BI->getCondition())) {
- if (ICI->getOperand(0) =3D=3D Inc) {
- if (BI->getSuccessor(0) =3D=3D getHeader()) {
- if (ICI->getPredicate() =3D=3D ICmpInst::ICMP_NE)
- return ICI->getOperand(1);
- } else if (ICI->getPredicate() =3D=3D ICmpInst::ICMP_EQ) {
- return ICI->getOperand(1);
- }
- }
- }
- }
-
- return 0;
-}
-
-/// getSmallConstantTripCount - Returns the trip count of this loop as a
-/// normal unsigned value, if possible. Returns 0 if the trip count is unk=
nown
-/// or not constant. Will also return 0 if the trip count is very large
-/// (>=3D 2^32)
-unsigned Loop::getSmallConstantTripCount() const {
- Value* TripCount =3D this->getTripCount();
- if (TripCount) {
- if (ConstantInt *TripCountC =3D dyn_cast<ConstantInt>(TripCount)) {
- // Guard against huge trip counts.
- if (TripCountC->getValue().getActiveBits() <=3D 32) {
- return (unsigned)TripCountC->getZExtValue();
- }
- }
- }
- return 0;
-}
-
-/// getSmallConstantTripMultiple - Returns the largest constant divisor of=
the
-/// trip count of this loop as a normal unsigned value, if possible. This
-/// means that the actual trip count is always a multiple of the returned
-/// value (don't forget the trip count could very well be zero as well!).
-///
-/// Returns 1 if the trip count is unknown or not guaranteed to be the
-/// multiple of a constant (which is also the case if the trip count is si=
mply
-/// constant, use getSmallConstantTripCount for that case), Will also retu=
rn 1
-/// if the trip count is very large (>=3D 2^32).
-unsigned Loop::getSmallConstantTripMultiple() const {
- Value* TripCount =3D this->getTripCount();
- // This will hold the ConstantInt result, if any
- ConstantInt *Result =3D NULL;
- if (TripCount) {
- // See if the trip count is constant itself
- Result =3D dyn_cast<ConstantInt>(TripCount);
- // if not, see if it is a multiplication
- if (!Result)
- if (BinaryOperator *BO =3D dyn_cast<BinaryOperator>(TripCount)) {
- switch (BO->getOpcode()) {
- case BinaryOperator::Mul:
- Result =3D dyn_cast<ConstantInt>(BO->getOperand(1));
- break;
- case BinaryOperator::Shl:
- if (ConstantInt *CI =3D dyn_cast<ConstantInt>(BO->getOperand(1)))
- if (CI->getValue().getActiveBits() <=3D 5)
- return 1u << CI->getZExtValue();
- break;
- default:
- break;
- }
- }
- }
- // Guard against huge trip counts.
- if (Result && Result->getValue().getActiveBits() <=3D 32) {
- return (unsigned)Result->getZExtValue();
- } else {
- return 1;
- }
-}
-
/// isLCSSAForm - Return true if the Loop is in LCSSA form
bool Loop::isLCSSAForm(DominatorTree &DT) const {
// Sort the blocks vector so that we can use binary search to do quick
@@ -297,6 +205,17 @@
return getLoopPreheader() && getLoopLatch() && hasDedicatedExits();
}
=20
+/// isSafeToClone - Return true if the loop body is safe to clone in pract=
ice.
+/// Routines that reform the loop CFG and split edges often fail on indire=
ctbr.
+bool Loop::isSafeToClone() const {
+ // Return false if any loop blocks contain indirectbrs.
+ for (Loop::block_iterator I =3D block_begin(), E =3D block_end(); I !=3D=
E; ++I) {
+ if (isa<IndirectBrInst>((*I)->getTerminator()))
+ return false;
+ }
+ return true;
+}
+
/// hasDedicatedExits - Return true if no exit block for the loop
/// has a predecessor that is outside the loop.
bool Loop::hasDedicatedExits() const {
@@ -477,21 +396,19 @@
/// removeBlocksFromAncestors - Remove unloop's blocks from all ancestors =
below
/// their new parents.
void UnloopUpdater::removeBlocksFromAncestors() {
- // Remove unloop's blocks from all ancestors below their new parents.
+ // Remove all unloop's blocks (including those in nested subloops) from
+ // ancestors below the new parent loop.
for (Loop::block_iterator BI =3D Unloop->block_begin(),
BE =3D Unloop->block_end(); BI !=3D BE; ++BI) {
- Loop *NewParent =3D LI->getLoopFor(*BI);
- // If this block is an immediate subloop, remove all blocks (including
- // nested subloops) from ancestors below the new parent loop.
- // Otherwise, if this block is in a nested subloop, skip it.
- if (SubloopParents.count(NewParent))
- NewParent =3D SubloopParents[NewParent];
- else if (Unloop->contains(NewParent))
- continue;
-
+ Loop *OuterParent =3D LI->getLoopFor(*BI);
+ if (Unloop->contains(OuterParent)) {
+ while (OuterParent->getParentLoop() !=3D Unloop)
+ OuterParent =3D OuterParent->getParentLoop();
+ OuterParent =3D SubloopParents[OuterParent];
+ }
// Remove blocks from former Ancestors except Unloop itself which will=
be
// deleted.
- for (Loop *OldParent =3D Unloop->getParentLoop(); OldParent !=3D NewPa=
rent;
+ for (Loop *OldParent =3D Unloop->getParentLoop(); OldParent !=3D Outer=
Parent;
OldParent =3D OldParent->getParentLoop()) {
assert(OldParent && "new loop is not an ancestor of the original");
OldParent->removeBlockFromLoop(*BI);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/LoopPas=
s.cpp
--- a/head/contrib/llvm/lib/Analysis/LoopPass.cpp Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/llvm/lib/Analysis/LoopPass.cpp Tue Apr 17 11:51:51 2012 =
+0300
@@ -14,10 +14,8 @@
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
#include "llvm/Analysis/LoopPass.h"
-#include "llvm/DebugInfoProbe.h"
#include "llvm/Assembly/PrintModulePass.h"
#include "llvm/Support/Debug.h"
-#include "llvm/Support/ManagedStatic.h"
#include "llvm/Support/Timer.h"
using namespace llvm;
=20
@@ -54,20 +52,6 @@
}
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
-// DebugInfoProbe
-
-static DebugInfoProbeInfo *TheDebugProbe;
-static void createDebugInfoProbe() {
- if (TheDebugProbe) return;
-
- // Constructed the first time this is called. This guarantees that the
- // object will be constructed, if -enable-debug-info-probe is set,
- // before static globals, thus it will be destroyed before them.
- static ManagedStatic<DebugInfoProbeInfo> DIP;
- TheDebugProbe =3D &*DIP;
-}
-
-//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// LPPassManager
//
=20
@@ -195,7 +179,6 @@
bool LPPassManager::runOnFunction(Function &F) {
LI =3D &getAnalysis<LoopInfo>();
bool Changed =3D false;
- createDebugInfoProbe();
=20
// Collect inherited analysis from Module level pass manager.
populateInheritedAnalysis(TPM->activeStack);
@@ -227,21 +210,19 @@
// Run all passes on the current Loop.
for (unsigned Index =3D 0; Index < getNumContainedPasses(); ++Index) {
LoopPass *P =3D getContainedPass(Index);
+
dumpPassInfo(P, EXECUTION_MSG, ON_LOOP_MSG,
CurrentLoop->getHeader()->getName());
dumpRequiredSet(P);
=20
initializeAnalysisImpl(P);
- if (TheDebugProbe)
- TheDebugProbe->initialize(P, F);
+
{
PassManagerPrettyStackEntry X(P, *CurrentLoop->getHeader());
TimeRegion PassTimer(getPassTimer(P));
=20
Changed |=3D P->runOnLoop(CurrentLoop, *this);
}
- if (TheDebugProbe)
- TheDebugProbe->finalize(P, F);
=20
if (Changed)
dumpPassInfo(P, MODIFICATION_MSG, ON_LOOP_MSG,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/MemDepP=
rinter.cpp
--- a/head/contrib/llvm/lib/Analysis/MemDepPrinter.cpp Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/MemDepPrinter.cpp Tue Apr 17 11:51:51 =
2012 +0300
@@ -130,7 +130,7 @@
AliasAnalysis::Location Loc =3D AA.getLocation(LI);
MDA.getNonLocalPointerDependency(Loc, true, LI->getParent(), NLDI);
} else if (StoreInst *SI =3D dyn_cast<StoreInst>(Inst)) {
- if (!LI->isUnordered()) {
+ if (!SI->isUnordered()) {
// FIXME: Handle atomic/volatile stores.
Deps[Inst].insert(std::make_pair(getInstTypePair(0, Unknown),
static_cast<BasicBlock *>(0)));
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/MemoryB=
uiltins.cpp
--- a/head/contrib/llvm/lib/Analysis/MemoryBuiltins.cpp Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/MemoryBuiltins.cpp Tue Apr 17 11:51:51=
2012 +0300
@@ -48,10 +48,10 @@
// FIXME: workaround for PR5130, this will be obsolete when a nobuiltin=20
// attribute will exist.
FunctionType *FTy =3D Callee->getFunctionType();
- if (FTy->getNumParams() !=3D 1)
- return false;
- return FTy->getParamType(0)->isIntegerTy(32) ||
- FTy->getParamType(0)->isIntegerTy(64);
+ return FTy->getReturnType() =3D=3D Type::getInt8PtrTy(FTy->getContext())=
&&
+ FTy->getNumParams() =3D=3D 1 &&
+ (FTy->getParamType(0)->isIntegerTy(32) ||
+ FTy->getParamType(0)->isIntegerTy(64));
}
=20
/// extractMallocCall - Returns the corresponding CallInst if the instruct=
ion
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/MemoryD=
ependenceAnalysis.cpp
--- a/head/contrib/llvm/lib/Analysis/MemoryDependenceAnalysis.cpp Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/MemoryDependenceAnalysis.cpp Tue Apr 1=
7 11:51:51 2012 +0300
@@ -22,6 +22,7 @@
#include "llvm/Function.h"
#include "llvm/LLVMContext.h"
#include "llvm/Analysis/AliasAnalysis.h"
+#include "llvm/Analysis/CaptureTracking.h"
#include "llvm/Analysis/Dominators.h"
#include "llvm/Analysis/InstructionSimplify.h"
#include "llvm/Analysis/MemoryBuiltins.h"
@@ -91,6 +92,7 @@
bool MemoryDependenceAnalysis::runOnFunction(Function &) {
AA =3D &getAnalysis<AliasAnalysis>();
TD =3D getAnalysisIfAvailable<TargetData>();
+ DT =3D getAnalysisIfAvailable<DominatorTree>();
if (PredCache =3D=3D 0)
PredCache.reset(new PredIteratorCache());
return false;
@@ -321,14 +323,100 @@
!TD.fitsInLegalInteger(NewLoadByteSize*8))
return 0;
=20
+ if (LIOffs+NewLoadByteSize > MemLocEnd &&
+ LI->getParent()->getParent()->hasFnAttr(Attribute::AddressSafety))=
{
+ // We will be reading past the location accessed by the original pro=
gram.
+ // While this is safe in a regular build, Address Safety analysis to=
ols
+ // may start reporting false warnings. So, don't do widening.
+ return 0;
+ }
+
// If a load of this width would include all of MemLoc, then we succee=
d.
if (LIOffs+NewLoadByteSize >=3D MemLocEnd)
return NewLoadByteSize;
=20
NewLoadByteSize <<=3D 1;
}
- =20
- return 0;
+}
+
+namespace {
+ /// Only find pointer captures which happen before the given instruction=
. Uses
+ /// the dominator tree to determine whether one instruction is before an=
other.
+ struct CapturesBefore : public CaptureTracker {
+ CapturesBefore(const Instruction *I, DominatorTree *DT)
+ : BeforeHere(I), DT(DT), Captured(false) {}
+
+ void tooManyUses() { Captured =3D true; }
+
+ bool shouldExplore(Use *U) {
+ Instruction *I =3D cast<Instruction>(U->getUser());
+ BasicBlock *BB =3D I->getParent();
+ if (BeforeHere !=3D I &&
+ (!DT->isReachableFromEntry(BB) || DT->dominates(BeforeHere, I)))
+ return false;
+ return true;
+ }
+
+ bool captured(Use *U) {
+ Instruction *I =3D cast<Instruction>(U->getUser());
+ BasicBlock *BB =3D I->getParent();
+ if (BeforeHere !=3D I &&
+ (!DT->isReachableFromEntry(BB) || DT->dominates(BeforeHere, I)))
+ return false;
+ Captured =3D true;
+ return true;
+ }
+
+ const Instruction *BeforeHere;
+ DominatorTree *DT;
+
+ bool Captured;
+ };
+}
+
+AliasAnalysis::ModRefResult
+MemoryDependenceAnalysis::getModRefInfo(const Instruction *Inst,
+ const AliasAnalysis::Location &Mem=
Loc) {
+ AliasAnalysis::ModRefResult MR =3D AA->getModRefInfo(Inst, MemLoc);
+ if (MR !=3D AliasAnalysis::ModRef) return MR;
+
+ // FIXME: this is really just shoring-up a deficiency in alias analysis.
+ // BasicAA isn't willing to spend linear time determining whether an all=
oca
+ // was captured before or after this particular call, while we are. Howe=
ver,
+ // with a smarter AA in place, this test is just wasting compile time.
+ if (!DT) return AliasAnalysis::ModRef;
+ const Value *Object =3D GetUnderlyingObject(MemLoc.Ptr, TD);
+ if (!isIdentifiedObject(Object) || isa<GlobalValue>(Object))
+ return AliasAnalysis::ModRef;
+ ImmutableCallSite CS(Inst);
+ if (!CS.getInstruction()) return AliasAnalysis::ModRef;
+
+ CapturesBefore CB(Inst, DT);
+ llvm::PointerMayBeCaptured(Object, &CB);
+
+ if (isa<Constant>(Object) || CS.getInstruction() =3D=3D Object || CB.Cap=
tured)
+ return AliasAnalysis::ModRef;
+
+ unsigned ArgNo =3D 0;
+ for (ImmutableCallSite::arg_iterator CI =3D CS.arg_begin(), CE =3D CS.ar=
g_end();
+ CI !=3D CE; ++CI, ++ArgNo) {
+ // Only look at the no-capture or byval pointer arguments. If this
+ // pointer were passed to arguments that were neither of these, then it
+ // couldn't be no-capture.
+ if (!(*CI)->getType()->isPointerTy() ||
+ (!CS.doesNotCapture(ArgNo) && !CS.isByValArgument(ArgNo)))
+ continue;
+
+ // If this is a no-capture pointer argument, see if we can tell that it
+ // is impossible to alias the pointer we're checking. If not, we have=
to
+ // assume that the call could touch the pointer, even though it doesn't
+ // escape.
+ if (!AA->isNoAlias(AliasAnalysis::Location(*CI),
+ AliasAnalysis::Location(Object))) {
+ return AliasAnalysis::ModRef;
+ }
+ }
+ return AliasAnalysis::NoModRef;
}
=20
/// getPointerDependencyFrom - Return the instruction on which a memory
@@ -478,7 +566,7 @@
}
=20
// See if this instruction (e.g. a call or vaarg) mod/ref's the pointe=
r.
- switch (AA->getModRefInfo(Inst, MemLoc)) {
+ switch (getModRefInfo(Inst, MemLoc)) {
case AliasAnalysis::NoModRef:
// If the call has no effect on the queried pointer, just ignore it.
continue;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/PHITran=
sAddr.cpp
--- a/head/contrib/llvm/lib/Analysis/PHITransAddr.cpp Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/lib/Analysis/PHITransAddr.cpp Tue Apr 17 11:51:51 2=
012 +0300
@@ -12,6 +12,7 @@
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
#include "llvm/Analysis/PHITransAddr.h"
+#include "llvm/Analysis/ValueTracking.h"
#include "llvm/Constants.h"
#include "llvm/Instructions.h"
#include "llvm/Analysis/Dominators.h"
@@ -27,7 +28,7 @@
return true;
=20
if (isa<CastInst>(Inst) &&
- Inst->isSafeToSpeculativelyExecute())
+ isSafeToSpeculativelyExecute(Inst))
return true;
=20
if (Inst->getOpcode() =3D=3D Instruction::Add &&
@@ -73,7 +74,6 @@
errs() << *I << '\n';
llvm_unreachable("Either something is missing from InstInputs or "
"CanPHITrans is wrong.");
- return false;
}
=20
// Validate the operands of the instruction.
@@ -100,7 +100,6 @@
for (unsigned i =3D 0, e =3D InstInputs.size(); i !=3D e; ++i)
errs() << " InstInput #" << i << " is " << *InstInputs[i] << "\n";
llvm_unreachable("This is unexpected.");
- return false;
}
=20
// a-ok.
@@ -186,7 +185,7 @@
// operands need to be phi translated, and if so, reconstruct it.
=20
if (CastInst *Cast =3D dyn_cast<CastInst>(Inst)) {
- if (!Cast->isSafeToSpeculativelyExecute()) return 0;
+ if (!isSafeToSpeculativelyExecute(Cast)) return 0;
Value *PHIIn =3D PHITranslateSubExpr(Cast->getOperand(0), CurBB, PredB=
B, DT);
if (PHIIn =3D=3D 0) return 0;
if (PHIIn =3D=3D Cast->getOperand(0))
@@ -228,7 +227,7 @@
return GEP;
=20
// Simplify the GEP to handle 'gep x, 0' -> x etc.
- if (Value *V =3D SimplifyGEPInst(GEPOps, TD, DT)) {
+ if (Value *V =3D SimplifyGEPInst(GEPOps, TD, TLI, DT)) {
for (unsigned i =3D 0, e =3D GEPOps.size(); i !=3D e; ++i)
RemoveInstInputs(GEPOps[i], InstInputs);
=20
@@ -284,7 +283,7 @@
}
=20
// See if the add simplifies away.
- if (Value *Res =3D SimplifyAddInst(LHS, RHS, isNSW, isNUW, TD, DT)) {
+ if (Value *Res =3D SimplifyAddInst(LHS, RHS, isNSW, isNUW, TD, TLI, DT=
)) {
// If we simplified the operands, the LHS is no longer an input, but=
Res
// is.
RemoveInstInputs(LHS, InstInputs);
@@ -381,7 +380,7 @@
=20
// Handle cast of PHI translatable value.
if (CastInst *Cast =3D dyn_cast<CastInst>(Inst)) {
- if (!Cast->isSafeToSpeculativelyExecute()) return 0;
+ if (!isSafeToSpeculativelyExecute(Cast)) return 0;
Value *OpVal =3D InsertPHITranslatedSubExpr(Cast->getOperand(0),
CurBB, PredBB, DT, NewInsts);
if (OpVal =3D=3D 0) return 0;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/PathNum=
bering.cpp
--- a/head/contrib/llvm/lib/Analysis/PathNumbering.cpp Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/PathNumbering.cpp Tue Apr 17 11:51:51 =
2012 +0300
@@ -386,8 +386,8 @@
}
=20
TerminatorInst* terminator =3D currentNode->getBlock()->getTerminator(=
);
- if(isa<ReturnInst>(terminator) || isa<UnreachableInst>(terminator)
- || isa<ResumeInst>(terminator) || isa<UnwindInst>(terminator))
+ if(isa<ReturnInst>(terminator) || isa<UnreachableInst>(terminator) ||
+ isa<ResumeInst>(terminator))
addEdge(currentNode, getExit(),0);
=20
currentNode->setColor(BallLarusNode::GRAY);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/PathPro=
fileVerifier.cpp
--- a/head/contrib/llvm/lib/Analysis/PathProfileVerifier.cpp Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/PathProfileVerifier.cpp Tue Apr 17 11:=
51:51 2012 +0300
@@ -137,22 +137,22 @@
BasicBlock* source =3D nextEdge->getSource();
BasicBlock* target =3D nextEdge->getTarget();
unsigned duplicateNumber =3D nextEdge->getDuplicateNumber();
- DEBUG(dbgs () << source->getNameStr() << " --{" << duplicateNumber
- << "}--> " << target->getNameStr());
+ DEBUG(dbgs() << source->getName() << " --{" << duplicateNumber
+ << "}--> " << target->getName());
=20
// Ensure all the referenced edges exist
// TODO: make this a separate function
if( !arrayMap.count(source) ) {
- errs() << " error [" << F->getNameStr() << "()]: source '"
- << source->getNameStr()
+ errs() << " error [" << F->getName() << "()]: source '"
+ << source->getName()
<< "' does not exist in the array map.\n";
} else if( !arrayMap[source].count(target) ) {
- errs() << " error [" << F->getNameStr() << "()]: target '"
- << target->getNameStr()
+ errs() << " error [" << F->getName() << "()]: target '"
+ << target->getName()
<< "' does not exist in the array map.\n";
} else if( !arrayMap[source][target].count(duplicateNumber) ) {
- errs() << " error [" << F->getNameStr() << "()]: edge "
- << source->getNameStr() << " -> " << target->getNameStr()
+ errs() << " error [" << F->getName() << "()]: edge "
+ << source->getName() << " -> " << target->getName()
<< " duplicate number " << duplicateNumber
<< " does not exist in the array map.\n";
} else {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/Profile=
EstimatorPass.cpp
--- a/head/contrib/llvm/lib/Analysis/ProfileEstimatorPass.cpp Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/ProfileEstimatorPass.cpp Tue Apr 17 11=
:51:51 2012 +0300
@@ -332,7 +332,7 @@
// Clear Minimal Edges.
MinimalWeight.clear();
=20
- DEBUG(dbgs() << "Working on function " << F.getNameStr() << "\n");
+ DEBUG(dbgs() << "Working on function " << F.getName() << "\n");
=20
// Since the entry block is the first one and has no predecessors, the e=
dge
// (0,entry) is inserted with the starting weight of 1.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/Profile=
InfoLoaderPass.cpp
--- a/head/contrib/llvm/lib/Analysis/ProfileInfoLoaderPass.cpp Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/ProfileInfoLoaderPass.cpp Tue Apr 17 1=
1:51:51 2012 +0300
@@ -160,7 +160,7 @@
ReadCount =3D 0;
for (Module::iterator F =3D M.begin(), E =3D M.end(); F !=3D E; ++F) {
if (F->isDeclaration()) continue;
- DEBUG(dbgs()<<"Working on "<<F->getNameStr()<<"\n");
+ DEBUG(dbgs() << "Working on " << F->getName() << "\n");
readEdge(getEdge(0,&F->getEntryBlock()), Counters);
for (Function::iterator BB =3D F->begin(), E =3D F->end(); BB !=3D E=
; ++BB) {
TerminatorInst *TI =3D BB->getTerminator();
@@ -181,7 +181,7 @@
ReadCount =3D 0;
for (Module::iterator F =3D M.begin(), E =3D M.end(); F !=3D E; ++F) {
if (F->isDeclaration()) continue;
- DEBUG(dbgs()<<"Working on "<<F->getNameStr()<<"\n");
+ DEBUG(dbgs() << "Working on " << F->getName() << "\n");
readEdge(getEdge(0,&F->getEntryBlock()), Counters);
for (Function::iterator BB =3D F->begin(), E =3D F->end(); BB !=3D E=
; ++BB) {
TerminatorInst *TI =3D BB->getTerminator();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/Profile=
VerifierPass.cpp
--- a/head/contrib/llvm/lib/Analysis/ProfileVerifierPass.cpp Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/ProfileVerifierPass.cpp Tue Apr 17 11:=
51:51 2012 +0300
@@ -30,7 +30,7 @@
ProfileVerifierDisableAssertions("profile-verifier-noassert",
cl::desc("Disable assertions"));
=20
-namespace llvm {
+namespace {
template<class FType, class BType>
class ProfileVerifierPassT : public FunctionPass {
=20
@@ -125,8 +125,8 @@
outCount++;
}
}
- dbgs() << "Block " << BB->getNameStr() << " in "=20
- << BB->getParent()->getNameStr() << ":"
+ dbgs() << "Block " << BB->getName() << " in "
+ << BB->getParent()->getName() << ":"
<< "BBWeight=3D" << format("%20.20g",BBWeight) << ","
<< "inWeight=3D" << format("%20.20g",inWeight) << ","
<< "inCount=3D" << inCount << ","
@@ -143,8 +143,8 @@
=20
template<class FType, class BType>
void ProfileVerifierPassT<FType, BType>::debugEntry (DetailedBlockInfo *=
DI) {
- dbgs() << "TROUBLE: Block " << DI->BB->getNameStr() << " in "
- << DI->BB->getParent()->getNameStr() << ":"
+ dbgs() << "TROUBLE: Block " << DI->BB->getName() << " in "
+ << DI->BB->getParent()->getName() << ":"
<< "BBWeight=3D" << format("%20.20g",DI->BBWeight) << ","
<< "inWeight=3D" << format("%20.20g",DI->inWeight) << ","
<< "inCount=3D" << DI->inCount << ","
@@ -201,13 +201,13 @@
double EdgeWeight =3D PI->getEdgeWeight(E);
if (EdgeWeight =3D=3D ProfileInfoT<FType, BType>::MissingValue) {
dbgs() << "Edge " << E << " in Function "=20
- << ProfileInfoT<FType, BType>::getFunction(E)->getNameStr() <=
< ": ";
+ << ProfileInfoT<FType, BType>::getFunction(E)->getName() << "=
: ";
ASSERTMESSAGE("Edge has missing value");
return 0;
} else {
if (EdgeWeight < 0) {
dbgs() << "Edge " << E << " in Function "=20
- << ProfileInfoT<FType, BType>::getFunction(E)->getNameStr()=
<< ": ";
+ << ProfileInfoT<FType, BType>::getFunction(E)->getName() <<=
": ";
ASSERTMESSAGE("Edge has negative value");
}
return EdgeWeight;
@@ -220,8 +220,8 @@
DetailedBlockInfo *D=
I) {
if (Error) {
DEBUG(debugEntry(DI));
- dbgs() << "Block " << DI->BB->getNameStr() << " in Function "=20
- << DI->BB->getParent()->getNameStr() << ": ";
+ dbgs() << "Block " << DI->BB->getName() << " in Function "
+ << DI->BB->getParent()->getName() << ": ";
ASSERTMESSAGE(Message);
}
return;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/RegionI=
nfo.cpp
--- a/head/contrib/llvm/lib/Analysis/RegionInfo.cpp Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/lib/Analysis/RegionInfo.cpp Tue Apr 17 11:51:51 201=
2 +0300
@@ -186,18 +186,16 @@
raw_string_ostream OS(entryName);
=20
WriteAsOperand(OS, getEntry(), false);
- entryName =3D OS.str();
} else
- entryName =3D getEntry()->getNameStr();
+ entryName =3D getEntry()->getName();
=20
if (getExit()) {
if (getExit()->getName().empty()) {
raw_string_ostream OS(exitName);
=20
WriteAsOperand(OS, getExit(), false);
- exitName =3D OS.str();
} else
- exitName =3D getExit()->getNameStr();
+ exitName =3D getExit()->getName();
} else
exitName =3D "<Function Return>";
=20
@@ -652,7 +650,7 @@
// This basic block is a start block of a region. It is already in the
// BBtoRegion relation. Only the child basic blocks have to be updated.
if (it !=3D BBtoRegion.end()) {
- Region *newRegion =3D it->second;;
+ Region *newRegion =3D it->second;
region->addSubRegion(getTopMostParent(newRegion));
region =3D newRegion;
} else {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/ScalarE=
volution.cpp
--- a/head/contrib/llvm/lib/Analysis/ScalarEvolution.cpp Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/ScalarEvolution.cpp Tue Apr 17 11:51:5=
1 2012 +0300
@@ -74,6 +74,7 @@
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/Assembly/Writer.h"
#include "llvm/Target/TargetData.h"
+#include "llvm/Target/TargetLibraryInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/ConstantRange.h"
#include "llvm/Support/Debug.h"
@@ -108,6 +109,7 @@
"Scalar Evolution Analysis", false, true)
INITIALIZE_PASS_DEPENDENCY(LoopInfo)
INITIALIZE_PASS_DEPENDENCY(DominatorTree)
+INITIALIZE_PASS_DEPENDENCY(TargetLibraryInfo)
INITIALIZE_PASS_END(ScalarEvolution, "scalar-evolution",
"Scalar Evolution Analysis", false, true)
char ScalarEvolution::ID =3D 0;
@@ -188,6 +190,14 @@
OS << OpStr;
}
OS << ")";
+ switch (NAry->getSCEVType()) {
+ case scAddExpr:
+ case scMulExpr:
+ if (NAry->getNoWrapFlags(FlagNUW))
+ OS << "<nuw>";
+ if (NAry->getNoWrapFlags(FlagNSW))
+ OS << "<nsw>";
+ }
return;
}
case scUDivExpr: {
@@ -249,11 +259,9 @@
return cast<SCEVUnknown>(this)->getType();
case scCouldNotCompute:
llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!");
- return 0;
- default: break;
- }
- llvm_unreachable("Unknown SCEV kind!");
- return 0;
+ default:
+ llvm_unreachable("Unknown SCEV kind!");
+ }
}
=20
bool SCEV::isZero() const {
@@ -274,6 +282,20 @@
return false;
}
=20
+/// isNonConstantNegative - Return true if the specified scev is negated, =
but
+/// not a constant.
+bool SCEV::isNonConstantNegative() const {
+ const SCEVMulExpr *Mul =3D dyn_cast<SCEVMulExpr>(this);
+ if (!Mul) return false;
+
+ // If there is a constant factor, it will be first.
+ const SCEVConstant *SC =3D dyn_cast<SCEVConstant>(Mul->getOperand(0));
+ if (!SC) return false;
+
+ // Return true if the value is negative, this matches things like (-42 *=
V).
+ return SC->getValue()->getValue().isNegative();
+}
+
SCEVCouldNotCompute::SCEVCouldNotCompute() :
SCEV(FoldingSetNodeIDRef(), scCouldNotCompute) {}
=20
@@ -587,11 +609,8 @@
}
=20
default:
- break;
+ llvm_unreachable("Unknown SCEV kind!");
}
-
- llvm_unreachable("Unknown SCEV kind!");
- return 0;
}
};
}
@@ -2581,7 +2600,7 @@
=20
Constant *C =3D ConstantExpr::getSizeOf(AllocTy);
if (ConstantExpr *CE =3D dyn_cast<ConstantExpr>(C))
- if (Constant *Folded =3D ConstantFoldConstantExpression(CE, TD))
+ if (Constant *Folded =3D ConstantFoldConstantExpression(CE, TD, TLI))
C =3D Folded;
Type *Ty =3D getEffectiveSCEVType(PointerType::getUnqual(AllocTy));
return getTruncateOrZeroExtend(getSCEV(C), Ty);
@@ -2590,7 +2609,7 @@
const SCEV *ScalarEvolution::getAlignOfExpr(Type *AllocTy) {
Constant *C =3D ConstantExpr::getAlignOf(AllocTy);
if (ConstantExpr *CE =3D dyn_cast<ConstantExpr>(C))
- if (Constant *Folded =3D ConstantFoldConstantExpression(CE, TD))
+ if (Constant *Folded =3D ConstantFoldConstantExpression(CE, TD, TLI))
C =3D Folded;
Type *Ty =3D getEffectiveSCEVType(PointerType::getUnqual(AllocTy));
return getTruncateOrZeroExtend(getSCEV(C), Ty);
@@ -2607,7 +2626,7 @@
=20
Constant *C =3D ConstantExpr::getOffsetOf(STy, FieldNo);
if (ConstantExpr *CE =3D dyn_cast<ConstantExpr>(C))
- if (Constant *Folded =3D ConstantFoldConstantExpression(CE, TD))
+ if (Constant *Folded =3D ConstantFoldConstantExpression(CE, TD, TLI))
C =3D Folded;
Type *Ty =3D getEffectiveSCEVType(PointerType::getUnqual(STy));
return getTruncateOrZeroExtend(getSCEV(C), Ty);
@@ -2617,7 +2636,7 @@
Constant *FieldNo) {
Constant *C =3D ConstantExpr::getOffsetOf(CTy, FieldNo);
if (ConstantExpr *CE =3D dyn_cast<ConstantExpr>(C))
- if (Constant *Folded =3D ConstantFoldConstantExpression(CE, TD))
+ if (Constant *Folded =3D ConstantFoldConstantExpression(CE, TD, TLI))
C =3D Folded;
Type *Ty =3D getEffectiveSCEVType(PointerType::getUnqual(CTy));
return getTruncateOrZeroExtend(getSCEV(C), Ty);
@@ -3108,7 +3127,7 @@
// PHI's incoming blocks are in a different loop, in which case doing so
// risks breaking LCSSA form. Instcombine would normally zap these, but
// it doesn't have DominatorTree information, so it may miss cases.
- if (Value *V =3D SimplifyInstruction(PN, TD, DT))
+ if (Value *V =3D SimplifyInstruction(PN, TD, TLI, DT))
if (LI->replacementPreservesLCSSAForm(PN, V))
return getSCEV(V);
=20
@@ -3168,7 +3187,7 @@
=20
// Add the total offset from all the GEP indices to the base.
return getAddExpr(BaseS, TotalOffset,
- isInBounds ? SCEV::FlagNSW : SCEV::FlagAnyWrap);
+ isInBounds ? SCEV::FlagNUW : SCEV::FlagAnyWrap);
}
=20
/// GetMinTrailingZeros - Determine the minimum number of zero bits that S=
is
@@ -3242,9 +3261,8 @@
if (const SCEVUnknown *U =3D dyn_cast<SCEVUnknown>(S)) {
// For a SCEVUnknown, ask ValueTracking.
unsigned BitWidth =3D getTypeSizeInBits(U->getType());
- APInt Mask =3D APInt::getAllOnesValue(BitWidth);
APInt Zeros(BitWidth, 0), Ones(BitWidth, 0);
- ComputeMaskedBits(U->getValue(), Mask, Zeros, Ones);
+ ComputeMaskedBits(U->getValue(), Zeros, Ones);
return Zeros.countTrailingOnes();
}
=20
@@ -3382,9 +3400,8 @@
=20
if (const SCEVUnknown *U =3D dyn_cast<SCEVUnknown>(S)) {
// For a SCEVUnknown, ask ValueTracking.
- APInt Mask =3D APInt::getAllOnesValue(BitWidth);
APInt Zeros(BitWidth, 0), Ones(BitWidth, 0);
- ComputeMaskedBits(U->getValue(), Mask, Zeros, Ones, TD);
+ ComputeMaskedBits(U->getValue(), Zeros, Ones, TD);
if (Ones =3D=3D ~Zeros + 1)
return setUnsignedRange(U, ConservativeResult);
return setUnsignedRange(U,
@@ -3584,6 +3601,12 @@
// because it leads to N-1 getAddExpr calls for N ultimate operands.
// Instead, gather up all the operands and make a single getAddExpr ca=
ll.
// LLVM IR canonical form means we need only traverse the left operand=
s.
+ //
+ // Don't apply this instruction's NSW or NUW flags to the new
+ // expression. The instruction may be guarded by control flow that the
+ // no-wrap behavior depends on. Non-control-equivalent instructions ca=
n be
+ // mapped to the same SCEV expression, and it would be incorrect to tr=
ansfer
+ // NSW/NUW semantics to those operations.
SmallVector<const SCEV *, 4> AddOps;
AddOps.push_back(getSCEV(U->getOperand(1)));
for (Value *Op =3D U->getOperand(0); ; Op =3D U->getOperand(0)) {
@@ -3598,16 +3621,10 @@
AddOps.push_back(Op1);
}
AddOps.push_back(getSCEV(U->getOperand(0)));
- SCEV::NoWrapFlags Flags =3D SCEV::FlagAnyWrap;
- OverflowingBinaryOperator *OBO =3D cast<OverflowingBinaryOperator>(V);
- if (OBO->hasNoSignedWrap())
- setFlags(Flags, SCEV::FlagNSW);
- if (OBO->hasNoUnsignedWrap())
- setFlags(Flags, SCEV::FlagNUW);
- return getAddExpr(AddOps, Flags);
+ return getAddExpr(AddOps);
}
case Instruction::Mul: {
- // See the Add code above.
+ // Don't transfer NSW/NUW for the same reason as AddExpr.
SmallVector<const SCEV *, 4> MulOps;
MulOps.push_back(getSCEV(U->getOperand(1)));
for (Value *Op =3D U->getOperand(0);
@@ -3641,9 +3658,8 @@
// knew about to reconstruct a low-bits mask value.
unsigned LZ =3D A.countLeadingZeros();
unsigned BitWidth =3D A.getBitWidth();
- APInt AllOnes =3D APInt::getAllOnesValue(BitWidth);
APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
- ComputeMaskedBits(U->getOperand(0), AllOnes, KnownZero, KnownOne, TD=
);
+ ComputeMaskedBits(U->getOperand(0), KnownZero, KnownOne, TD);
=20
APInt EffectiveMask =3D APInt::getLowBitsSet(BitWidth, BitWidth - LZ=
);
=20
@@ -3915,13 +3931,19 @@
//
=20
/// getSmallConstantTripCount - Returns the maximum trip count of this loo=
p as a
-/// normal unsigned value, if possible. Returns 0 if the trip count is unk=
nown
-/// or not constant. Will also return 0 if the maximum trip count is very =
large
-/// (>=3D 2^32)
-unsigned ScalarEvolution::getSmallConstantTripCount(Loop *L,
- BasicBlock *ExitBlock)=
{
+/// normal unsigned value. Returns 0 if the trip count is unknown or not
+/// constant. Will also return 0 if the maximum trip count is very large (=
>=3D
+/// 2^32).
+///
+/// This "trip count" assumes that control exits via ExitingBlock. More
+/// precisely, it is the number of times that control may reach ExitingBlo=
ck
+/// before taking the branch. For loops with multiple exits, it may not be=
the
+/// number times that the loop header executes because the loop may exit
+/// prematurely via another branch.
+unsigned ScalarEvolution::
+getSmallConstantTripCount(Loop *L, BasicBlock *ExitingBlock) {
const SCEVConstant *ExitCount =3D
- dyn_cast<SCEVConstant>(getExitCount(L, ExitBlock));
+ dyn_cast<SCEVConstant>(getExitCount(L, ExitingBlock));
if (!ExitCount)
return 0;
=20
@@ -3944,9 +3966,12 @@
/// multiple of a constant (which is also the case if the trip count is si=
mply
/// constant, use getSmallConstantTripCount for that case), Will also retu=
rn 1
/// if the trip count is very large (>=3D 2^32).
-unsigned ScalarEvolution::getSmallConstantTripMultiple(Loop *L,
- BasicBlock *ExitBlo=
ck) {
- const SCEV *ExitCount =3D getExitCount(L, ExitBlock);
+///
+/// As explained in the comments for getSmallConstantTripCount, this assum=
es
+/// that control exits the loop via ExitingBlock.
+unsigned ScalarEvolution::
+getSmallConstantTripMultiple(Loop *L, BasicBlock *ExitingBlock) {
+ const SCEV *ExitCount =3D getExitCount(L, ExitingBlock);
if (ExitCount =3D=3D getCouldNotCompute())
return 1;
=20
@@ -4153,13 +4178,19 @@
}
=20
/// getExact - Get the exact loop backedge taken count considering all loop
-/// exits. If all exits are computable, this is the minimum computed count.
+/// exits. A computable result can only be return for loops with a single =
exit.
+/// Returning the minimum taken count among all exits is incorrect because=
one
+/// of the loop's exit limit's may have been skipped. HowFarToZero assumes=
that
+/// the limit of each loop test is never skipped. This is a valid assumpti=
on as
+/// long as the loop exits via that test. For precise results, it is the
+/// caller's responsibility to specify the relevant loop exit using
+/// getExact(ExitingBlock, SE).
const SCEV *
ScalarEvolution::BackedgeTakenInfo::getExact(ScalarEvolution *SE) const {
// If any exits were not computable, the loop is not computable.
if (!ExitNotTaken.isCompleteList()) return SE->getCouldNotCompute();
=20
- // We need at least one computable exit.
+ // We need exactly one computable exit.
if (!ExitNotTaken.ExitingBlock) return SE->getCouldNotCompute();
assert(ExitNotTaken.ExactNotTaken && "uninitialized not-taken info");
=20
@@ -4171,8 +4202,8 @@
=20
if (!BECount)
BECount =3D ENT->ExactNotTaken;
- else
- BECount =3D SE->getUMinFromMismatchedTypes(BECount, ENT->ExactNotTak=
en);
+ else if (BECount !=3D ENT->ExactNotTaken)
+ return SE->getCouldNotCompute();
}
assert(BECount && "Invalid not taken count for loop exit");
return BECount;
@@ -4253,8 +4284,15 @@
=20
if (MaxBECount =3D=3D getCouldNotCompute())
MaxBECount =3D EL.Max;
- else if (EL.Max !=3D getCouldNotCompute())
- MaxBECount =3D getUMinFromMismatchedTypes(MaxBECount, EL.Max);
+ else if (EL.Max !=3D getCouldNotCompute()) {
+ // We cannot take the "min" MaxBECount, because non-unit stride loop=
s may
+ // skip some loop tests. Taking the max over the exits is sufficient=
ly
+ // conservative. TODO: We could do better taking into consideration
+ // that (1) the loop has unit stride (2) the last loop test is
+ // less-than/greater-than (3) any loop test is less-than/greater-tha=
n AND
+ // falls-through some constant times less then the other tests.
+ MaxBECount =3D getUMaxFromMismatchedTypes(MaxBECount, EL.Max);
+ }
}
=20
return BackedgeTakenInfo(ExitCounts, CouldComputeBECount, MaxBECount);
@@ -4539,40 +4577,6 @@
return cast<SCEVConstant>(Val)->getValue();
}
=20
-/// GetAddressedElementFromGlobal - Given a global variable with an initia=
lizer
-/// and a GEP expression (missing the pointer index) indexing into it, ret=
urn
-/// the addressed element of the initializer or null if the index expressi=
on is
-/// invalid.
-static Constant *
-GetAddressedElementFromGlobal(GlobalVariable *GV,
- const std::vector<ConstantInt*> &Indices) {
- Constant *Init =3D GV->getInitializer();
- for (unsigned i =3D 0, e =3D Indices.size(); i !=3D e; ++i) {
- uint64_t Idx =3D Indices[i]->getZExtValue();
- if (ConstantStruct *CS =3D dyn_cast<ConstantStruct>(Init)) {
- assert(Idx < CS->getNumOperands() && "Bad struct index!");
- Init =3D cast<Constant>(CS->getOperand(Idx));
- } else if (ConstantArray *CA =3D dyn_cast<ConstantArray>(Init)) {
- if (Idx >=3D CA->getNumOperands()) return 0; // Bogus program
- Init =3D cast<Constant>(CA->getOperand(Idx));
- } else if (isa<ConstantAggregateZero>(Init)) {
- if (StructType *STy =3D dyn_cast<StructType>(Init->getType())) {
- assert(Idx < STy->getNumElements() && "Bad struct index!");
- Init =3D Constant::getNullValue(STy->getElementType(Idx));
- } else if (ArrayType *ATy =3D dyn_cast<ArrayType>(Init->getType())) {
- if (Idx >=3D ATy->getNumElements()) return 0; // Bogus program
- Init =3D Constant::getNullValue(ATy->getElementType());
- } else {
- llvm_unreachable("Unknown constant aggregate type!");
- }
- return 0;
- } else {
- return 0; // Unknown initializer type
- }
- }
- return Init;
-}
-
/// ComputeLoadConstantCompareExitLimit - Given an exit condition of
/// 'icmp op load X, cst', try to see if we can compute the backedge
/// execution count.
@@ -4600,7 +4604,7 @@
=20
// Okay, we allow one non-constant index into the GEP instruction.
Value *VarIdx =3D 0;
- std::vector<ConstantInt*> Indexes;
+ std::vector<Constant*> Indexes;
unsigned VarIdxNum =3D 0;
for (unsigned i =3D 2, e =3D GEP->getNumOperands(); i !=3D e; ++i)
if (ConstantInt *CI =3D dyn_cast<ConstantInt>(GEP->getOperand(i))) {
@@ -4612,6 +4616,10 @@
Indexes.push_back(0);
}
=20
+ // Loop-invariant loads may be a byproduct of loop optimization. Skip th=
em.
+ if (!VarIdx)
+ return getCouldNotCompute();
+
// Okay, we know we have a (load (gep GV, 0, X)) comparison with a const=
ant.
// Check to see if X is a loop variant variable value now.
const SCEV *Idx =3D getSCEV(VarIdx);
@@ -4634,7 +4642,8 @@
// Form the GEP offset.
Indexes[VarIdxNum] =3D Val;
=20
- Constant *Result =3D GetAddressedElementFromGlobal(GV, Indexes);
+ Constant *Result =3D ConstantFoldLoadThroughGEPIndices(GV->getInitiali=
zer(),
+ Indexes);
if (Result =3D=3D 0) break; // Cannot compute!
=20
// Evaluate the condition for this iteration.
@@ -4658,7 +4667,8 @@
/// specified type, assuming that all operands were constants.
static bool CanConstantFold(const Instruction *I) {
if (isa<BinaryOperator>(I) || isa<CmpInst>(I) ||
- isa<SelectInst>(I) || isa<CastInst>(I) || isa<GetElementPtrInst>(I))
+ isa<SelectInst>(I) || isa<CastInst>(I) || isa<GetElementPtrInst>(I) =
||
+ isa<LoadInst>(I))
return true;
=20
if (const CallInst *CI =3D dyn_cast<CallInst>(I))
@@ -4748,16 +4758,23 @@
/// reason, return null.
static Constant *EvaluateExpression(Value *V, const Loop *L,
DenseMap<Instruction *, Constant *> &V=
als,
- const TargetData *TD) {
+ const TargetData *TD,
+ const TargetLibraryInfo *TLI) {
// Convenient constant check, but redundant for recursive calls.
if (Constant *C =3D dyn_cast<Constant>(V)) return C;
-
- Instruction *I =3D cast<Instruction>(V);
+ Instruction *I =3D dyn_cast<Instruction>(V);
+ if (!I) return 0;
+
if (Constant *C =3D Vals.lookup(I)) return C;
=20
- assert(!isa<PHINode>(I) && "loop header phis should be mapped to constan=
t");
- assert(canConstantEvolve(I, L) && "cannot evaluate expression in this lo=
op");
- (void)L;
+ // An instruction inside the loop depends on a value outside the loop th=
at we
+ // weren't given a mapping for, or a value such as a call inside the loo=
p.
+ if (!canConstantEvolve(I, L)) return 0;
+
+ // An unmapped PHI can be due to a branch or another loop inside this lo=
op,
+ // or due to this not being the initial iteration through a loop where we
+ // couldn't compute the evolution of this particular PHI last time.
+ if (isa<PHINode>(I)) return 0;
=20
std::vector<Constant*> Operands(I->getNumOperands());
=20
@@ -4768,16 +4785,21 @@
if (!Operands[i]) return 0;
continue;
}
- Constant *C =3D EvaluateExpression(Operand, L, Vals, TD);
+ Constant *C =3D EvaluateExpression(Operand, L, Vals, TD, TLI);
Vals[Operand] =3D C;
if (!C) return 0;
Operands[i] =3D C;
}
=20
- if (const CmpInst *CI =3D dyn_cast<CmpInst>(I))
+ if (CmpInst *CI =3D dyn_cast<CmpInst>(I))
return ConstantFoldCompareInstOperands(CI->getPredicate(), Operands[0],
- Operands[1], TD);
- return ConstantFoldInstOperands(I->getOpcode(), I->getType(), Operands, =
TD);
+ Operands[1], TD, TLI);
+ if (LoadInst *LI =3D dyn_cast<LoadInst>(I)) {
+ if (!LI->isVolatile())
+ return ConstantFoldLoadFromConstPtr(Operands[0], TD);
+ }
+ return ConstantFoldInstOperands(I->getOpcode(), I->getType(), Operands, =
TD,
+ TLI);
}
=20
/// getConstantEvolutionLoopExitValue - If we know that the specified Phi =
is
@@ -4798,23 +4820,26 @@
=20
Constant *&RetVal =3D ConstantEvolutionLoopExitValue[PN];
=20
- // FIXME: Nick's fix for PR11034 will seed constants for multiple header=
phis.
DenseMap<Instruction *, Constant *> CurrentIterVals;
+ BasicBlock *Header =3D L->getHeader();
+ assert(PN->getParent() =3D=3D Header && "Can't evaluate PHI not in loop =
header!");
=20
// Since the loop is canonicalized, the PHI node must have two entries. =
One
// entry must be a constant (coming in from outside of the loop), and the
// second must be derived from the same PHI.
bool SecondIsBackedge =3D L->contains(PN->getIncomingBlock(1));
- Constant *StartCST =3D
- dyn_cast<Constant>(PN->getIncomingValue(!SecondIsBackedge));
- if (StartCST =3D=3D 0)
- return RetVal =3D 0; // Must be a constant.
- CurrentIterVals[PN] =3D StartCST;
+ PHINode *PHI =3D 0;
+ for (BasicBlock::iterator I =3D Header->begin();
+ (PHI =3D dyn_cast<PHINode>(I)); ++I) {
+ Constant *StartCST =3D
+ dyn_cast<Constant>(PHI->getIncomingValue(!SecondIsBackedge));
+ if (StartCST =3D=3D 0) continue;
+ CurrentIterVals[PHI] =3D StartCST;
+ }
+ if (!CurrentIterVals.count(PN))
+ return RetVal =3D 0;
=20
Value *BEValue =3D PN->getIncomingValue(SecondIsBackedge);
- if (getConstantEvolvingPHI(BEValue, L) !=3D PN &&
- !isa<Constant>(BEValue))
- return RetVal =3D 0; // Not derived from same PHI.
=20
// Execute the loop symbolically to determine the exit value.
if (BEs.getActiveBits() >=3D 32)
@@ -4826,15 +4851,46 @@
if (IterationNum =3D=3D NumIterations)
return RetVal =3D CurrentIterVals[PN]; // Got exit value!
=20
- // Compute the value of the PHI node for the next iteration.
+ // Compute the value of the PHIs for the next iteration.
// EvaluateExpression adds non-phi values to the CurrentIterVals map.
- Constant *NextPHI =3D EvaluateExpression(BEValue, L, CurrentIterVals, =
TD);
- if (NextPHI =3D=3D CurrentIterVals[PN])
- return RetVal =3D NextPHI; // Stopped evolving!
+ DenseMap<Instruction *, Constant *> NextIterVals;
+ Constant *NextPHI =3D EvaluateExpression(BEValue, L, CurrentIterVals, =
TD,
+ TLI);
if (NextPHI =3D=3D 0)
return 0; // Couldn't evaluate!
- DenseMap<Instruction *, Constant *> NextIterVals;
NextIterVals[PN] =3D NextPHI;
+
+ bool StoppedEvolving =3D NextPHI =3D=3D CurrentIterVals[PN];
+
+ // Also evaluate the other PHI nodes. However, we don't get to stop i=
f we
+ // cease to be able to evaluate one of them or if they stop evolving,
+ // because that doesn't necessarily prevent us from computing PN.
+ SmallVector<std::pair<PHINode *, Constant *>, 8> PHIsToCompute;
+ for (DenseMap<Instruction *, Constant *>::const_iterator
+ I =3D CurrentIterVals.begin(), E =3D CurrentIterVals.end(); I !=
=3D E; ++I){
+ PHINode *PHI =3D dyn_cast<PHINode>(I->first);
+ if (!PHI || PHI =3D=3D PN || PHI->getParent() !=3D Header) continue;
+ PHIsToCompute.push_back(std::make_pair(PHI, I->second));
+ }
+ // We use two distinct loops because EvaluateExpression may invalidate=
any
+ // iterators into CurrentIterVals.
+ for (SmallVectorImpl<std::pair<PHINode *, Constant*> >::const_iterator
+ I =3D PHIsToCompute.begin(), E =3D PHIsToCompute.end(); I !=
=3D E; ++I) {
+ PHINode *PHI =3D I->first;
+ Constant *&NextPHI =3D NextIterVals[PHI];
+ if (!NextPHI) { // Not already computed.
+ Value *BEValue =3D PHI->getIncomingValue(SecondIsBackedge);
+ NextPHI =3D EvaluateExpression(BEValue, L, CurrentIterVals, TD, TL=
I);
+ }
+ if (NextPHI !=3D I->second)
+ StoppedEvolving =3D false;
+ }
+
+ // If all entries in CurrentIterVals =3D=3D NextIterVals then we can s=
top
+ // iterating, the loop can't continue to change.
+ if (StoppedEvolving)
+ return RetVal =3D CurrentIterVals[PN];
+
CurrentIterVals.swap(NextIterVals);
}
}
@@ -4844,9 +4900,9 @@
/// try to evaluate a few iterations of the loop until we get the exit
/// condition gets a value of ExitWhen (true or false). If we cannot
/// evaluate the trip count of the loop, return getCouldNotCompute().
-const SCEV * ScalarEvolution::ComputeExitCountExhaustively(const Loop *L,
- Value *Cond,
- bool ExitWhen) {
+const SCEV *ScalarEvolution::ComputeExitCountExhaustively(const Loop *L,
+ Value *Cond,
+ bool ExitWhen) {
PHINode *PN =3D getConstantEvolvingPHI(Cond, L);
if (PN =3D=3D 0) return getCouldNotCompute();
=20
@@ -4854,29 +4910,33 @@
// That's the only form we support here.
if (PN->getNumIncomingValues() !=3D 2) return getCouldNotCompute();
=20
+ DenseMap<Instruction *, Constant *> CurrentIterVals;
+ BasicBlock *Header =3D L->getHeader();
+ assert(PN->getParent() =3D=3D Header && "Can't evaluate PHI not in loop =
header!");
+
// One entry must be a constant (coming in from outside of the loop), an=
d the
// second must be derived from the same PHI.
bool SecondIsBackedge =3D L->contains(PN->getIncomingBlock(1));
- Constant *StartCST =3D
- dyn_cast<Constant>(PN->getIncomingValue(!SecondIsBackedge));
- if (StartCST =3D=3D 0) return getCouldNotCompute(); // Must be a consta=
nt.
-
- Value *BEValue =3D PN->getIncomingValue(SecondIsBackedge);
- if (getConstantEvolvingPHI(BEValue, L) !=3D PN &&
- !isa<Constant>(BEValue))
- return getCouldNotCompute(); // Not derived from same PHI.
+ PHINode *PHI =3D 0;
+ for (BasicBlock::iterator I =3D Header->begin();
+ (PHI =3D dyn_cast<PHINode>(I)); ++I) {
+ Constant *StartCST =3D
+ dyn_cast<Constant>(PHI->getIncomingValue(!SecondIsBackedge));
+ if (StartCST =3D=3D 0) continue;
+ CurrentIterVals[PHI] =3D StartCST;
+ }
+ if (!CurrentIterVals.count(PN))
+ return getCouldNotCompute();
=20
// Okay, we find a PHI node that defines the trip count of this loop. E=
xecute
// the loop symbolically to determine when the condition gets a value of
// "ExitWhen".
- unsigned IterationNum =3D 0;
+
unsigned MaxIterations =3D MaxBruteForceIterations; // Limit analysis.
- for (Constant *PHIVal =3D StartCST;
- IterationNum !=3D MaxIterations; ++IterationNum) {
- DenseMap<Instruction *, Constant *> PHIValMap;
- PHIValMap[PN] =3D PHIVal;
+ for (unsigned IterationNum =3D 0; IterationNum !=3D MaxIterations;++Iter=
ationNum){
ConstantInt *CondVal =3D
- dyn_cast_or_null<ConstantInt>(EvaluateExpression(Cond, L, PHIValMap,=
TD));
+ dyn_cast_or_null<ConstantInt>(EvaluateExpression(Cond, L, CurrentIte=
rVals,
+ TD, TLI));
=20
// Couldn't symbolically evaluate.
if (!CondVal) return getCouldNotCompute();
@@ -4886,11 +4946,29 @@
return getConstant(Type::getInt32Ty(getContext()), IterationNum);
}
=20
- // Compute the value of the PHI node for the next iteration.
- Constant *NextPHI =3D EvaluateExpression(BEValue, L, PHIValMap, TD);
- if (NextPHI =3D=3D 0 || NextPHI =3D=3D PHIVal)
- return getCouldNotCompute();// Couldn't evaluate or not making progr=
ess...
- PHIVal =3D NextPHI;
+ // Update all the PHI nodes for the next iteration.
+ DenseMap<Instruction *, Constant *> NextIterVals;
+
+ // Create a list of which PHIs we need to compute. We want to do this =
before
+ // calling EvaluateExpression on them because that may invalidate iter=
ators
+ // into CurrentIterVals.
+ SmallVector<PHINode *, 8> PHIsToCompute;
+ for (DenseMap<Instruction *, Constant *>::const_iterator
+ I =3D CurrentIterVals.begin(), E =3D CurrentIterVals.end(); I !=
=3D E; ++I){
+ PHINode *PHI =3D dyn_cast<PHINode>(I->first);
+ if (!PHI || PHI->getParent() !=3D Header) continue;
+ PHIsToCompute.push_back(PHI);
+ }
+ for (SmallVectorImpl<PHINode *>::const_iterator I =3D PHIsToCompute.be=
gin(),
+ E =3D PHIsToCompute.end(); I !=3D E; ++I) {
+ PHINode *PHI =3D *I;
+ Constant *&NextPHI =3D NextIterVals[PHI];
+ if (NextPHI) continue; // Already computed!
+
+ Value *BEValue =3D PHI->getIncomingValue(SecondIsBackedge);
+ NextPHI =3D EvaluateExpression(BEValue, L, CurrentIterVals, TD, TLI);
+ }
+ CurrentIterVals.swap(NextIterVals);
}
=20
// Too many iterations were needed to evaluate.
@@ -4921,6 +4999,98 @@
return C;
}
=20
+/// This builds up a Constant using the ConstantExpr interface. That way,=
we
+/// will return Constants for objects which aren't represented by a
+/// SCEVConstant, because SCEVConstant is restricted to ConstantInt.
+/// Returns NULL if the SCEV isn't representable as a Constant.
+static Constant *BuildConstantFromSCEV(const SCEV *V) {
+ switch (V->getSCEVType()) {
+ default: // TODO: smax, umax.
+ case scCouldNotCompute:
+ case scAddRecExpr:
+ break;
+ case scConstant:
+ return cast<SCEVConstant>(V)->getValue();
+ case scUnknown:
+ return dyn_cast<Constant>(cast<SCEVUnknown>(V)->getValue());
+ case scSignExtend: {
+ const SCEVSignExtendExpr *SS =3D cast<SCEVSignExtendExpr>(V);
+ if (Constant *CastOp =3D BuildConstantFromSCEV(SS->getOperand()))
+ return ConstantExpr::getSExt(CastOp, SS->getType());
+ break;
+ }
+ case scZeroExtend: {
+ const SCEVZeroExtendExpr *SZ =3D cast<SCEVZeroExtendExpr>(V);
+ if (Constant *CastOp =3D BuildConstantFromSCEV(SZ->getOperand()))
+ return ConstantExpr::getZExt(CastOp, SZ->getType());
+ break;
+ }
+ case scTruncate: {
+ const SCEVTruncateExpr *ST =3D cast<SCEVTruncateExpr>(V);
+ if (Constant *CastOp =3D BuildConstantFromSCEV(ST->getOperand()))
+ return ConstantExpr::getTrunc(CastOp, ST->getType());
+ break;
+ }
+ case scAddExpr: {
+ const SCEVAddExpr *SA =3D cast<SCEVAddExpr>(V);
+ if (Constant *C =3D BuildConstantFromSCEV(SA->getOperand(0))) {
+ if (C->getType()->isPointerTy())
+ C =3D ConstantExpr::getBitCast(C, Type::getInt8PtrTy(C->getConte=
xt()));
+ for (unsigned i =3D 1, e =3D SA->getNumOperands(); i !=3D e; ++i) {
+ Constant *C2 =3D BuildConstantFromSCEV(SA->getOperand(i));
+ if (!C2) return 0;
+
+ // First pointer!
+ if (!C->getType()->isPointerTy() && C2->getType()->isPointerTy()=
) {
+ std::swap(C, C2);
+ // The offsets have been converted to bytes. We can add bytes=
to an
+ // i8* by GEP with the byte count in the first index.
+ C =3D ConstantExpr::getBitCast(C,Type::getInt8PtrTy(C->getCont=
ext()));
+ }
+
+ // Don't bother trying to sum two pointers. We probably can't
+ // statically compute a load that results from it anyway.
+ if (C2->getType()->isPointerTy())
+ return 0;
+
+ if (C->getType()->isPointerTy()) {
+ if (cast<PointerType>(C->getType())->getElementType()->isStruc=
tTy())
+ C2 =3D ConstantExpr::getIntegerCast(
+ C2, Type::getInt32Ty(C->getContext()), true);
+ C =3D ConstantExpr::getGetElementPtr(C, C2);
+ } else
+ C =3D ConstantExpr::getAdd(C, C2);
+ }
+ return C;
+ }
+ break;
+ }
+ case scMulExpr: {
+ const SCEVMulExpr *SM =3D cast<SCEVMulExpr>(V);
+ if (Constant *C =3D BuildConstantFromSCEV(SM->getOperand(0))) {
+ // Don't bother with pointers at all.
+ if (C->getType()->isPointerTy()) return 0;
+ for (unsigned i =3D 1, e =3D SM->getNumOperands(); i !=3D e; ++i) {
+ Constant *C2 =3D BuildConstantFromSCEV(SM->getOperand(i));
+ if (!C2 || C2->getType()->isPointerTy()) return 0;
+ C =3D ConstantExpr::getMul(C, C2);
+ }
+ return C;
+ }
+ break;
+ }
+ case scUDivExpr: {
+ const SCEVUDivExpr *SU =3D cast<SCEVUDivExpr>(V);
+ if (Constant *LHS =3D BuildConstantFromSCEV(SU->getLHS()))
+ if (Constant *RHS =3D BuildConstantFromSCEV(SU->getRHS()))
+ if (LHS->getType() =3D=3D RHS->getType())
+ return ConstantExpr::getUDiv(LHS, RHS);
+ break;
+ }
+ }
+ return 0;
+}
+
const SCEV *ScalarEvolution::computeSCEVAtScope(const SCEV *V, const Loop =
*L) {
if (isa<SCEVConstant>(V)) return V;
=20
@@ -4973,11 +5143,7 @@
const SCEV *OpV =3D getSCEVAtScope(OrigV, L);
MadeImprovement |=3D OrigV !=3D OpV;
=20
- Constant *C =3D 0;
- if (const SCEVConstant *SC =3D dyn_cast<SCEVConstant>(OpV))
- C =3D SC->getValue();
- if (const SCEVUnknown *SU =3D dyn_cast<SCEVUnknown>(OpV))
- C =3D dyn_cast<Constant>(SU->getValue());
+ Constant *C =3D BuildConstantFromSCEV(OpV);
if (!C) return V;
if (C->getType() !=3D Op->getType())
C =3D ConstantExpr::getCast(CastInst::getCastOpcode(C, false,
@@ -4992,10 +5158,14 @@
Constant *C =3D 0;
if (const CmpInst *CI =3D dyn_cast<CmpInst>(I))
C =3D ConstantFoldCompareInstOperands(CI->getPredicate(),
- Operands[0], Operands[1], =
TD);
- else
+ Operands[0], Operands[1], =
TD,
+ TLI);
+ else if (const LoadInst *LI =3D dyn_cast<LoadInst>(I)) {
+ if (!LI->isVolatile())
+ C =3D ConstantFoldLoadFromConstPtr(Operands[0], TD);
+ } else
C =3D ConstantFoldInstOperands(I->getOpcode(), I->getType(),
- Operands, TD);
+ Operands, TD, TLI);
if (!C) return V;
return getSCEV(C);
}
@@ -5113,7 +5283,6 @@
}
=20
llvm_unreachable("Unknown SCEV type!");
- return 0;
}
=20
/// getSCEVAtScope - This is a convenience function which does
@@ -5350,10 +5519,10 @@
// behavior. Loops must exhibit defined behavior until a wrapped value is
// actually used. So the trip count computed by udiv could be smaller th=
an the
// number of well-defined iterations.
- if (AddRec->getNoWrapFlags(SCEV::FlagNW))
+ if (AddRec->getNoWrapFlags(SCEV::FlagNW)) {
// FIXME: We really want an "isexact" bit for udiv.
return getUDivExpr(Distance, CountDown ? getNegativeSCEV(Step) : Step);
-
+ }
// Then, try to solve the above equation provided that Start is constant.
if (const SCEVConstant *StartC =3D dyn_cast<SCEVConstant>(Start))
return SolveLinEquationWithOverflow(StepC->getValue()->getValue(),
@@ -5744,7 +5913,6 @@
switch (Pred) {
default:
llvm_unreachable("Unexpected ICmpInst::Predicate value!");
- break;
case ICmpInst::ICMP_SGT:
Pred =3D ICmpInst::ICMP_SLT;
std::swap(LHS, RHS);
@@ -6089,8 +6257,9 @@
return getCouldNotCompute();
=20
// Check to see if we have a flag which makes analysis easy.
- bool NoWrap =3D isSigned ? AddRec->getNoWrapFlags(SCEV::FlagNSW) :
- AddRec->getNoWrapFlags(SCEV::FlagNUW);
+ bool NoWrap =3D isSigned ?
+ AddRec->getNoWrapFlags((SCEV::NoWrapFlags)(SCEV::FlagNSW | SCEV::FlagN=
W)) :
+ AddRec->getNoWrapFlags((SCEV::NoWrapFlags)(SCEV::FlagNUW | SCEV::FlagN=
W));
=20
if (AddRec->isAffine()) {
unsigned BitWidth =3D getTypeSizeInBits(AddRec->getType());
@@ -6381,6 +6550,7 @@
this->F =3D &F;
LI =3D &getAnalysis<LoopInfo>();
TD =3D getAnalysisIfAvailable<TargetData>();
+ TLI =3D &getAnalysis<TargetLibraryInfo>();
DT =3D &getAnalysis<DominatorTree>();
return false;
}
@@ -6417,6 +6587,7 @@
AU.setPreservesAll();
AU.addRequiredTransitive<LoopInfo>();
AU.addRequiredTransitive<DominatorTree>();
+ AU.addRequired<TargetLibraryInfo>();
}
=20
bool ScalarEvolution::hasLoopInvariantBackedgeTakenCount(const Loop *L) {
@@ -6592,11 +6763,8 @@
return LoopInvariant;
case scCouldNotCompute:
llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!");
- return LoopVariant;
- default: break;
- }
- llvm_unreachable("Unknown SCEV kind!");
- return LoopVariant;
+ default: llvm_unreachable("Unknown SCEV kind!");
+ }
}
=20
bool ScalarEvolution::isLoopInvariant(const SCEV *S, const Loop *L) {
@@ -6678,11 +6846,9 @@
return ProperlyDominatesBlock;
case scCouldNotCompute:
llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!");
- return DoesNotDominateBlock;
- default: break;
- }
- llvm_unreachable("Unknown SCEV kind!");
- return DoesNotDominateBlock;
+ default:
+ llvm_unreachable("Unknown SCEV kind!");
+ }
}
=20
bool ScalarEvolution::dominates(const SCEV *S, const BasicBlock *BB) {
@@ -6728,11 +6894,9 @@
return false;
case scCouldNotCompute:
llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!");
- return false;
- default: break;
- }
- llvm_unreachable("Unknown SCEV kind!");
- return false;
+ default:
+ llvm_unreachable("Unknown SCEV kind!");
+ }
}
=20
void ScalarEvolution::forgetMemoizedResults(const SCEV *S) {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/ScalarE=
volutionExpander.cpp
--- a/head/contrib/llvm/lib/Analysis/ScalarEvolutionExpander.cpp Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/ScalarEvolutionExpander.cpp Tue Apr 17=
11:51:51 2012 +0300
@@ -19,6 +19,7 @@
#include "llvm/LLVMContext.h"
#include "llvm/Support/Debug.h"
#include "llvm/Target/TargetData.h"
+#include "llvm/Target/TargetLowering.h"
#include "llvm/ADT/STLExtras.h"
=20
using namespace llvm;
@@ -30,6 +31,19 @@
Value *SCEVExpander::ReuseOrCreateCast(Value *V, Type *Ty,
Instruction::CastOps Op,
BasicBlock::iterator IP) {
+ // This function must be called with the builder having a valid insertion
+ // point. It doesn't need to be the actual IP where the uses of the retu=
rned
+ // cast will be added, but it must dominate such IP.
+ // We use this precondition to produce a cast that will dominate all its
+ // uses. In particular, this is crucial for the case where the builder's
+ // insertion point *is* the point where we were asked to put the cast.
+ // Since we don't know the the builder's insertion point is actually
+ // where the uses will be added (only that it dominates it), we are
+ // not allowed to move it.
+ BasicBlock::iterator BIP =3D Builder.GetInsertPoint();
+
+ Instruction *Ret =3D NULL;
+
// Check to see if there is already a cast!
for (Value::use_iterator UI =3D V->use_begin(), E =3D V->use_end();
UI !=3D E; ++UI) {
@@ -37,27 +51,35 @@
if (U->getType() =3D=3D Ty)
if (CastInst *CI =3D dyn_cast<CastInst>(U))
if (CI->getOpcode() =3D=3D Op) {
- // If the cast isn't where we want it, fix it.
- if (BasicBlock::iterator(CI) !=3D IP) {
+ // If the cast isn't where we want it, create a new cast at IP.
+ // Likewise, do not reuse a cast at BIP because it must dominate
+ // instructions that might be inserted before BIP.
+ if (BasicBlock::iterator(CI) !=3D IP || BIP =3D=3D IP) {
// Create a new cast, and leave the old cast in place in case
// it is being used as an insert point. Clear its operand
// so that it doesn't hold anything live.
- Instruction *NewCI =3D CastInst::Create(Op, V, Ty, "", IP);
- NewCI->takeName(CI);
- CI->replaceAllUsesWith(NewCI);
+ Ret =3D CastInst::Create(Op, V, Ty, "", IP);
+ Ret->takeName(CI);
+ CI->replaceAllUsesWith(Ret);
CI->setOperand(0, UndefValue::get(V->getType()));
- rememberInstruction(NewCI);
- return NewCI;
+ break;
}
- rememberInstruction(CI);
- return CI;
+ Ret =3D CI;
+ break;
}
}
=20
// Create a new cast.
- Instruction *I =3D CastInst::Create(Op, V, Ty, V->getName(), IP);
- rememberInstruction(I);
- return I;
+ if (!Ret)
+ Ret =3D CastInst::Create(Op, V, Ty, V->getName(), IP);
+
+ // We assert at the end of the function since IP might point to an
+ // instruction with different dominance properties than a cast
+ // (an invoke for example) and not dominate BIP (but the cast does).
+ assert(SE.DT->dominates(Ret, BIP));
+
+ rememberInstruction(Ret);
+ return Ret;
}
=20
/// InsertNoopCastOfTo - Insert a cast of V to the specified type,
@@ -73,9 +95,14 @@
"InsertNoopCastOfTo cannot change sizes!");
=20
// Short-circuit unnecessary bitcasts.
- if (Op =3D=3D Instruction::BitCast && V->getType() =3D=3D Ty)
- return V;
-
+ if (Op =3D=3D Instruction::BitCast) {
+ if (V->getType() =3D=3D Ty)
+ return V;
+ if (CastInst *CI =3D dyn_cast<CastInst>(V)) {
+ if (CI->getOperand(0)->getType() =3D=3D Ty)
+ return CI->getOperand(0);
+ }
+ }
// Short-circuit unnecessary inttoptr<->ptrtoint casts.
if ((Op =3D=3D Instruction::PtrToInt || Op =3D=3D Instruction::IntToPtr)=
&&
SE.getTypeSizeInBits(Ty) =3D=3D SE.getTypeSizeInBits(V->getType())) {
@@ -115,8 +142,7 @@
BasicBlock::iterator IP =3D I; ++IP;
if (InvokeInst *II =3D dyn_cast<InvokeInst>(I))
IP =3D II->getNormalDest()->begin();
- while (isa<PHINode>(IP) || isa<DbgInfoIntrinsic>(IP) ||
- isa<LandingPadInst>(IP))
+ while (isa<PHINode>(IP) || isa<LandingPadInst>(IP))
++IP;
return ReuseOrCreateCast(I, Ty, Op, IP);
}
@@ -492,6 +518,9 @@
V =3D InsertNoopCastOfTo(V,
Type::getInt8PtrTy(Ty->getContext(), PTy->getAddressSpace()));
=20
+ assert(!isa<Instruction>(V) ||
+ SE.DT->dominates(cast<Instruction>(V), Builder.GetInsertPoint()=
));
+
// Expand the operands for a plain byte offset.
Value *Idx =3D expandCodeFor(SE.getAddExpr(Ops), Ty);
=20
@@ -588,20 +617,6 @@
return expand(SE.getAddExpr(Ops));
}
=20
-/// isNonConstantNegative - Return true if the specified scev is negated, =
but
-/// not a constant.
-static bool isNonConstantNegative(const SCEV *F) {
- const SCEVMulExpr *Mul =3D dyn_cast<SCEVMulExpr>(F);
- if (!Mul) return false;
-
- // If there is a constant factor, it will be first.
- const SCEVConstant *SC =3D dyn_cast<SCEVConstant>(Mul->getOperand(0));
- if (!SC) return false;
-
- // Return true if the value is negative, this matches things like (-42 *=
V).
- return SC->getValue()->getValue().isNegative();
-}
-
/// PickMostRelevantLoop - Given two loops pick the one that's most releva=
nt for
/// SCEV expansion. If they are nested, this is the most nested. If they a=
re
/// neighboring, pick the later.
@@ -655,7 +670,6 @@
return RelevantLoops[D] =3D Result;
}
llvm_unreachable("Unexpected SCEV type!");
- return 0;
}
=20
namespace {
@@ -680,10 +694,10 @@
// If one operand is a non-constant negative and the other is not,
// put the non-constant negative on the right so that a sub can
// be used instead of a negate and add.
- if (isNonConstantNegative(LHS.second)) {
- if (!isNonConstantNegative(RHS.second))
+ if (LHS.second->isNonConstantNegative()) {
+ if (!RHS.second->isNonConstantNegative())
return false;
- } else if (isNonConstantNegative(RHS.second))
+ } else if (RHS.second->isNonConstantNegative())
return true;
=20
// Otherwise they are equivalent according to this comparison.
@@ -744,7 +758,7 @@
for (++I; I !=3D E && I->first =3D=3D CurLoop; ++I)
NewOps.push_back(I->second);
Sum =3D expandAddToGEP(NewOps.begin(), NewOps.end(), PTy, Ty, expand=
(Op));
- } else if (isNonConstantNegative(Op)) {
+ } else if (Op->isNonConstantNegative()) {
// Instead of doing a negate and add, just do a subtract.
Value *W =3D expandCodeFor(SE.getNegativeSCEV(Op), Ty);
Sum =3D InsertNoopCastOfTo(Sum, Ty);
@@ -875,6 +889,94 @@
return isNormalAddRecExprPHI(PN, IncV, L);
}
=20
+/// getIVIncOperand returns an induction variable increment's induction
+/// variable operand.
+///
+/// If allowScale is set, any type of GEP is allowed as long as the nonIV
+/// operands dominate InsertPos.
+///
+/// If allowScale is not set, ensure that a GEP increment conforms to one =
of the
+/// simple patterns generated by getAddRecExprPHILiterally and
+/// expandAddtoGEP. If the pattern isn't recognized, return NULL.
+Instruction *SCEVExpander::getIVIncOperand(Instruction *IncV,
+ Instruction *InsertPos,
+ bool allowScale) {
+ if (IncV =3D=3D InsertPos)
+ return NULL;
+
+ switch (IncV->getOpcode()) {
+ default:
+ return NULL;
+ // Check for a simple Add/Sub or GEP of a loop invariant step.
+ case Instruction::Add:
+ case Instruction::Sub: {
+ Instruction *OInst =3D dyn_cast<Instruction>(IncV->getOperand(1));
+ if (!OInst || SE.DT->dominates(OInst, InsertPos))
+ return dyn_cast<Instruction>(IncV->getOperand(0));
+ return NULL;
+ }
+ case Instruction::BitCast:
+ return dyn_cast<Instruction>(IncV->getOperand(0));
+ case Instruction::GetElementPtr:
+ for (Instruction::op_iterator I =3D IncV->op_begin()+1, E =3D IncV->op=
_end();
+ I !=3D E; ++I) {
+ if (isa<Constant>(*I))
+ continue;
+ if (Instruction *OInst =3D dyn_cast<Instruction>(*I)) {
+ if (!SE.DT->dominates(OInst, InsertPos))
+ return NULL;
+ }
+ if (allowScale) {
+ // allow any kind of GEP as long as it can be hoisted.
+ continue;
+ }
+ // This must be a pointer addition of constants (pretty), which is a=
lready
+ // handled, or some number of address-size elements (ugly). Ugly geps
+ // have 2 operands. i1* is used by the expander to represent an
+ // address-size element.
+ if (IncV->getNumOperands() !=3D 2)
+ return NULL;
+ unsigned AS =3D cast<PointerType>(IncV->getType())->getAddressSpace(=
);
+ if (IncV->getType() !=3D Type::getInt1PtrTy(SE.getContext(), AS)
+ && IncV->getType() !=3D Type::getInt8PtrTy(SE.getContext(), AS))
+ return NULL;
+ break;
+ }
+ return dyn_cast<Instruction>(IncV->getOperand(0));
+ }
+}
+
+/// hoistStep - Attempt to hoist a simple IV increment above InsertPos to =
make
+/// it available to other uses in this loop. Recursively hoist any operand=
s,
+/// until we reach a value that dominates InsertPos.
+bool SCEVExpander::hoistIVInc(Instruction *IncV, Instruction *InsertPos) {
+ if (SE.DT->dominates(IncV, InsertPos))
+ return true;
+
+ // InsertPos must itself dominate IncV so that IncV's new position satis=
fies
+ // its existing users.
+ if (!SE.DT->dominates(InsertPos->getParent(), IncV->getParent()))
+ return false;
+
+ // Check that the chain of IV operands leading back to Phi can be hoiste=
d.
+ SmallVector<Instruction*, 4> IVIncs;
+ for(;;) {
+ Instruction *Oper =3D getIVIncOperand(IncV, InsertPos, /*allowScale*/t=
rue);
+ if (!Oper)
+ return false;
+ // IncV is safe to hoist.
+ IVIncs.push_back(IncV);
+ IncV =3D Oper;
+ if (SE.DT->dominates(IncV, InsertPos))
+ break;
+ }
+ for (SmallVectorImpl<Instruction*>::reverse_iterator I =3D IVIncs.rbegin=
(),
+ E =3D IVIncs.rend(); I !=3D E; ++I) {
+ (*I)->moveBefore(InsertPos);
+ }
+ return true;
+}
+
/// Determine if this cyclic phi is in a form that would have been generat=
ed by
/// LSR. We don't care if the phi was actually expanded in this pass, as l=
ong
/// as it is in a low-cost form, for example, no implied multiplication. T=
his
@@ -882,51 +984,43 @@
/// expandAddtoGEP.
bool SCEVExpander::isExpandedAddRecExprPHI(PHINode *PN, Instruction *IncV,
const Loop *L) {
- switch (IncV->getOpcode()) {
- // Check for a simple Add/Sub or GEP of a loop invariant step.
- case Instruction::Add:
- case Instruction::Sub:
- return IncV->getOperand(0) =3D=3D PN
- && L->isLoopInvariant(IncV->getOperand(1));
- case Instruction::BitCast:
- IncV =3D dyn_cast<GetElementPtrInst>(IncV->getOperand(0));
- if (!IncV)
- return false;
- // fall-thru to GEP handling
- case Instruction::GetElementPtr: {
- // This must be a pointer addition of constants (pretty) or some numbe=
r of
- // address-size elements (ugly).
- for (Instruction::op_iterator I =3D IncV->op_begin()+1, E =3D IncV->op=
_end();
- I !=3D E; ++I) {
- if (isa<Constant>(*I))
- continue;
- // ugly geps have 2 operands.
- // i1* is used by the expander to represent an address-size element.
- if (IncV->getNumOperands() !=3D 2)
- return false;
- unsigned AS =3D cast<PointerType>(IncV->getType())->getAddressSpace(=
);
- if (IncV->getType() !=3D Type::getInt1PtrTy(SE.getContext(), AS)
- && IncV->getType() !=3D Type::getInt8PtrTy(SE.getContext(), AS))
- return false;
- // Ensure the operands dominate the insertion point. I don't know of=
a
- // case when this would not be true, so this is somewhat untested.
- if (L =3D=3D IVIncInsertLoop) {
- for (User::op_iterator OI =3D IncV->op_begin()+1,
- OE =3D IncV->op_end(); OI !=3D OE; ++OI)
- if (Instruction *OInst =3D dyn_cast<Instruction>(OI))
- if (!SE.DT->dominates(OInst, IVIncInsertPos))
- return false;
- }
- break;
+ for(Instruction *IVOper =3D IncV;
+ (IVOper =3D getIVIncOperand(IVOper, L->getLoopPreheader()->getTermin=
ator(),
+ /*allowScale=3D*/false));) {
+ if (IVOper =3D=3D PN)
+ return true;
+ }
+ return false;
+}
+
+/// expandIVInc - Expand an IV increment at Builder's current InsertPos.
+/// Typically this is the LatchBlock terminator or IVIncInsertPos, but we =
may
+/// need to materialize IV increments elsewhere to handle difficult situat=
ions.
+Value *SCEVExpander::expandIVInc(PHINode *PN, Value *StepV, const Loop *L,
+ Type *ExpandTy, Type *IntTy,
+ bool useSubtract) {
+ Value *IncV;
+ // If the PHI is a pointer, use a GEP, otherwise use an add or sub.
+ if (ExpandTy->isPointerTy()) {
+ PointerType *GEPPtrTy =3D cast<PointerType>(ExpandTy);
+ // If the step isn't constant, don't use an implicitly scaled GEP, bec=
ause
+ // that would require a multiply inside the loop.
+ if (!isa<ConstantInt>(StepV))
+ GEPPtrTy =3D PointerType::get(Type::getInt1Ty(SE.getContext()),
+ GEPPtrTy->getAddressSpace());
+ const SCEV *const StepArray[1] =3D { SE.getSCEV(StepV) };
+ IncV =3D expandAddToGEP(StepArray, StepArray+1, GEPPtrTy, IntTy, PN);
+ if (IncV->getType() !=3D PN->getType()) {
+ IncV =3D Builder.CreateBitCast(IncV, PN->getType());
+ rememberInstruction(IncV);
}
- IncV =3D dyn_cast<Instruction>(IncV->getOperand(0));
- if (IncV && IncV->getOpcode() =3D=3D Instruction::BitCast)
- IncV =3D dyn_cast<Instruction>(IncV->getOperand(0));
- return IncV =3D=3D PN;
+ } else {
+ IncV =3D useSubtract ?
+ Builder.CreateSub(PN, StepV, Twine(IVName) + ".iv.next") :
+ Builder.CreateAdd(PN, StepV, Twine(IVName) + ".iv.next");
+ rememberInstruction(IncV);
}
- default:
- return false;
- }
+ return IncV;
}
=20
/// getAddRecExprPHILiterally - Helper for expandAddRecExprLiterally. Expa=
nd
@@ -956,26 +1050,28 @@
if (LSRMode) {
if (!isExpandedAddRecExprPHI(PN, IncV, L))
continue;
+ if (L =3D=3D IVIncInsertLoop && !hoistIVInc(IncV, IVIncInsertPos))
+ continue;
}
else {
if (!isNormalAddRecExprPHI(PN, IncV, L))
continue;
+ if (L =3D=3D IVIncInsertLoop)
+ do {
+ if (SE.DT->dominates(IncV, IVIncInsertPos))
+ break;
+ // Make sure the increment is where we want it. But don't move=
it
+ // down past a potential existing post-inc user.
+ IncV->moveBefore(IVIncInsertPos);
+ IVIncInsertPos =3D IncV;
+ IncV =3D cast<Instruction>(IncV->getOperand(0));
+ } while (IncV !=3D PN);
}
// Ok, the add recurrence looks usable.
// Remember this PHI, even in post-inc mode.
InsertedValues.insert(PN);
// Remember the increment.
rememberInstruction(IncV);
- if (L =3D=3D IVIncInsertLoop)
- do {
- if (SE.DT->dominates(IncV, IVIncInsertPos))
- break;
- // Make sure the increment is where we want it. But don't move it
- // down past a potential existing post-inc user.
- IncV->moveBefore(IVIncInsertPos);
- IVIncInsertPos =3D IncV;
- IncV =3D cast<Instruction>(IncV->getOperand(0));
- } while (IncV !=3D PN);
return PN;
}
}
@@ -984,6 +1080,16 @@
BasicBlock *SaveInsertBB =3D Builder.GetInsertBlock();
BasicBlock::iterator SaveInsertPt =3D Builder.GetInsertPoint();
=20
+ // Another AddRec may need to be recursively expanded below. For example=
, if
+ // this AddRec is quadratic, the StepV may itself be an AddRec in this
+ // loop. Remove this loop from the PostIncLoops set before expanding such
+ // AddRecs. Otherwise, we cannot find a valid position for the step
+ // (i.e. StepV can never dominate its loop header). Ideally, we could do
+ // SavedIncLoops.swap(PostIncLoops), but we generally have a single elem=
ent,
+ // so it's not worth implementing SmallPtrSet::swap.
+ PostIncLoopSet SavedPostIncLoops =3D PostIncLoops;
+ PostIncLoops.clear();
+
// Expand code for the start value.
Value *StartV =3D expandCodeFor(Normalized->getStart(), ExpandTy,
L->getHeader()->begin());
@@ -993,16 +1099,16 @@
SE.DT->properlyDominates(cast<Instruction>(StartV)->getParent(),
L->getHeader()));
=20
- // Expand code for the step value. Insert instructions right before the
- // terminator corresponding to the back-edge. Do this before creating th=
e PHI
- // so that PHI reuse code doesn't see an incomplete PHI. If the stride is
- // negative, insert a sub instead of an add for the increment (unless it=
's a
- // constant, because subtracts of constants are canonicalized to adds).
+ // Expand code for the step value. Do this before creating the PHI so th=
at PHI
+ // reuse code doesn't see an incomplete PHI.
const SCEV *Step =3D Normalized->getStepRecurrence(SE);
- bool isPointer =3D ExpandTy->isPointerTy();
- bool isNegative =3D !isPointer && isNonConstantNegative(Step);
- if (isNegative)
+ // If the stride is negative, insert a sub instead of an add for the inc=
rement
+ // (unless it's a constant, because subtracts of constants are canonical=
ized
+ // to adds).
+ bool useSubtract =3D !ExpandTy->isPointerTy() && Step->isNonConstantNega=
tive();
+ if (useSubtract)
Step =3D SE.getNegativeSCEV(Step);
+ // Expand the step somewhere that dominates the loop header.
Value *StepV =3D expandCodeFor(Step, IntTy, L->getHeader()->begin());
=20
// Create the PHI.
@@ -1023,33 +1129,14 @@
continue;
}
=20
- // Create a step value and add it to the PHI. If IVIncInsertLoop is
- // non-null and equal to the addrec's loop, insert the instructions
- // at IVIncInsertPos.
+ // Create a step value and add it to the PHI.
+ // If IVIncInsertLoop is non-null and equal to the addrec's loop, inse=
rt the
+ // instructions at IVIncInsertPos.
Instruction *InsertPos =3D L =3D=3D IVIncInsertLoop ?
IVIncInsertPos : Pred->getTerminator();
Builder.SetInsertPoint(InsertPos);
- Value *IncV;
- // If the PHI is a pointer, use a GEP, otherwise use an add or sub.
- if (isPointer) {
- PointerType *GEPPtrTy =3D cast<PointerType>(ExpandTy);
- // If the step isn't constant, don't use an implicitly scaled GEP, b=
ecause
- // that would require a multiply inside the loop.
- if (!isa<ConstantInt>(StepV))
- GEPPtrTy =3D PointerType::get(Type::getInt1Ty(SE.getContext()),
- GEPPtrTy->getAddressSpace());
- const SCEV *const StepArray[1] =3D { SE.getSCEV(StepV) };
- IncV =3D expandAddToGEP(StepArray, StepArray+1, GEPPtrTy, IntTy, PN);
- if (IncV->getType() !=3D PN->getType()) {
- IncV =3D Builder.CreateBitCast(IncV, PN->getType());
- rememberInstruction(IncV);
- }
- } else {
- IncV =3D isNegative ?
- Builder.CreateSub(PN, StepV, Twine(IVName) + ".iv.next") :
- Builder.CreateAdd(PN, StepV, Twine(IVName) + ".iv.next");
- rememberInstruction(IncV);
- }
+ Value *IncV =3D expandIVInc(PN, StepV, L, ExpandTy, IntTy, useSubtract=
);
+
PN->addIncoming(IncV, Pred);
}
=20
@@ -1057,6 +1144,10 @@
if (SaveInsertBB)
restoreInsertPoint(SaveInsertBB, SaveInsertPt);
=20
+ // After expanding subexpressions, restore the PostIncLoops set so the c=
aller
+ // can ensure that IVIncrement dominates the current uses.
+ PostIncLoops =3D SavedPostIncLoops;
+
// Remember this PHI, even in post-inc mode.
InsertedValues.insert(PN);
=20
@@ -1124,10 +1215,31 @@
// For an expansion to use the postinc form, the client must call
// expandCodeFor with an InsertPoint that is either outside the PostIn=
cLoop
// or dominated by IVIncInsertPos.
- assert((!isa<Instruction>(Result) ||
- SE.DT->dominates(cast<Instruction>(Result),
- Builder.GetInsertPoint())) &&
- "postinc expansion does not dominate use");
+ if (isa<Instruction>(Result)
+ && !SE.DT->dominates(cast<Instruction>(Result),
+ Builder.GetInsertPoint())) {
+ // The induction variable's postinc expansion does not dominate this=
use.
+ // IVUsers tries to prevent this case, so it is rare. However, it can
+ // happen when an IVUser outside the loop is not dominated by the la=
tch
+ // block. Adjusting IVIncInsertPos before expansion begins cannot ha=
ndle
+ // all cases. Consider a phi outide whose operand is replaced during
+ // expansion with the value of the postinc user. Without fundamental=
ly
+ // changing the way postinc users are tracked, the only remedy is
+ // inserting an extra IV increment. StepV might fold into PostLoopOf=
fset,
+ // but hopefully expandCodeFor handles that.
+ bool useSubtract =3D
+ !ExpandTy->isPointerTy() && Step->isNonConstantNegative();
+ if (useSubtract)
+ Step =3D SE.getNegativeSCEV(Step);
+ // Expand the step somewhere that dominates the loop header.
+ BasicBlock *SaveInsertBB =3D Builder.GetInsertBlock();
+ BasicBlock::iterator SaveInsertPt =3D Builder.GetInsertPoint();
+ Value *StepV =3D expandCodeFor(Step, IntTy, L->getHeader()->begin());
+ // Restore the insertion point to the place where the caller has
+ // determined dominates all uses.
+ restoreInsertPoint(SaveInsertBB, SaveInsertPt);
+ Result =3D expandIVInc(PN, StepV, L, ExpandTy, IntTy, useSubtract);
+ }
}
=20
// Re-apply any non-loop-dominating scale.
@@ -1363,10 +1475,7 @@
}
=20
Value *SCEVExpander::expandCodeFor(const SCEV *SH, Type *Ty,
- Instruction *I) {
- BasicBlock::iterator IP =3D I;
- while (isInsertedInstruction(IP) || isa<DbgInfoIntrinsic>(IP))
- ++IP;
+ Instruction *IP) {
Builder.SetInsertPoint(IP->getParent(), IP);
return expandCodeFor(SH, Ty);
}
@@ -1392,14 +1501,23 @@
if (!L) break;
if (BasicBlock *Preheader =3D L->getLoopPreheader())
InsertPt =3D Preheader->getTerminator();
+ else {
+ // LSR sets the insertion point for AddRec start/step values to the
+ // block start to simplify value reuse, even though it's an invalid
+ // position. SCEVExpander must correct for this in all cases.
+ InsertPt =3D L->getHeader()->getFirstInsertionPt();
+ }
} else {
// If the SCEV is computable at this level, insert it into the header
// after the PHIs (and after any other instructions that we've inser=
ted
// there) so that it is guaranteed to dominate any user inside the l=
oop.
if (L && SE.hasComputableLoopEvolution(S, L) && !PostIncLoops.count(=
L))
InsertPt =3D L->getHeader()->getFirstInsertionPt();
- while (isInsertedInstruction(InsertPt) || isa<DbgInfoIntrinsic>(Inse=
rtPt))
+ while (InsertPt !=3D Builder.GetInsertPoint()
+ && (isInsertedInstruction(InsertPt)
+ || isa<DbgInfoIntrinsic>(InsertPt))) {
InsertPt =3D llvm::next(BasicBlock::iterator(InsertPt));
+ }
break;
}
=20
@@ -1434,23 +1552,9 @@
InsertedPostIncValues.insert(I);
else
InsertedValues.insert(I);
-
- // If we just claimed an existing instruction and that instruction had
- // been the insert point, adjust the insert point forward so that
- // subsequently inserted code will be dominated.
- if (Builder.GetInsertPoint() =3D=3D I) {
- BasicBlock::iterator It =3D cast<Instruction>(I);
- do { ++It; } while (isInsertedInstruction(It) ||
- isa<DbgInfoIntrinsic>(It));
- Builder.SetInsertPoint(Builder.GetInsertBlock(), It);
- }
}
=20
void SCEVExpander::restoreInsertPoint(BasicBlock *BB, BasicBlock::iterator=
I) {
- // If we acquired more instructions since the old insert point was saved,
- // advance past them.
- while (isInsertedInstruction(I) || isa<DbgInfoIntrinsic>(I)) ++I;
-
Builder.SetInsertPoint(BB, I);
}
=20
@@ -1478,40 +1582,13 @@
return V;
}
=20
-/// hoistStep - Attempt to hoist an IV increment above a potential use.
-///
-/// To successfully hoist, two criteria must be met:
-/// - IncV operands dominate InsertPos and
-/// - InsertPos dominates IncV
-///
-/// Meeting the second condition means that we don't need to check all of =
IncV's
-/// existing uses (it's moving up in the domtree).
-///
-/// This does not yet recursively hoist the operands, although that would
-/// not be difficult.
-///
-/// This does not require a SCEVExpander instance and could be replaced by=
a
-/// general code-insertion helper.
-bool SCEVExpander::hoistStep(Instruction *IncV, Instruction *InsertPos,
- const DominatorTree *DT) {
- if (DT->dominates(IncV, InsertPos))
- return true;
-
- if (!DT->dominates(InsertPos->getParent(), IncV->getParent()))
- return false;
-
- if (IncV->mayHaveSideEffects())
- return false;
-
- // Attempt to hoist IncV
- for (User::op_iterator OI =3D IncV->op_begin(), OE =3D IncV->op_end();
- OI !=3D OE; ++OI) {
- Instruction *OInst =3D dyn_cast<Instruction>(OI);
- if (OInst && !DT->dominates(OInst, InsertPos))
- return false;
- }
- IncV->moveBefore(InsertPos);
- return true;
+/// Sort values by integer width for replaceCongruentIVs.
+static bool width_descending(Value *lhs, Value *rhs) {
+ // Put pointers at the back and make sure pointer < pointer =3D false.
+ if (!lhs->getType()->isIntegerTy() || !rhs->getType()->isIntegerTy())
+ return rhs->getType()->isIntegerTy() && !lhs->getType()->isIntegerTy();
+ return rhs->getType()->getPrimitiveSizeInBits()
+ < lhs->getType()->getPrimitiveSizeInBits();
}
=20
/// replaceCongruentIVs - Check for congruent phis in this loop header and
@@ -1521,23 +1598,45 @@
/// This does not depend on any SCEVExpander state but should be used in
/// the same context that SCEVExpander is used.
unsigned SCEVExpander::replaceCongruentIVs(Loop *L, const DominatorTree *D=
T,
- SmallVectorImpl<WeakVH> &DeadIn=
sts) {
+ SmallVectorImpl<WeakVH> &DeadIn=
sts,
+ const TargetLowering *TLI) {
+ // Find integer phis in order of increasing width.
+ SmallVector<PHINode*, 8> Phis;
+ for (BasicBlock::iterator I =3D L->getHeader()->begin();
+ PHINode *Phi =3D dyn_cast<PHINode>(I); ++I) {
+ Phis.push_back(Phi);
+ }
+ if (TLI)
+ std::sort(Phis.begin(), Phis.end(), width_descending);
+
unsigned NumElim =3D 0;
DenseMap<const SCEV *, PHINode *> ExprToIVMap;
- for (BasicBlock::iterator I =3D L->getHeader()->begin(); isa<PHINode>(I)=
; ++I) {
- PHINode *Phi =3D cast<PHINode>(I);
+ // Process phis from wide to narrow. Mapping wide phis to the their trun=
cation
+ // so narrow phis can reuse them.
+ for (SmallVectorImpl<PHINode*>::const_iterator PIter =3D Phis.begin(),
+ PEnd =3D Phis.end(); PIter !=3D PEnd; ++PIter) {
+ PHINode *Phi =3D *PIter;
+
if (!SE.isSCEVable(Phi->getType()))
continue;
=20
PHINode *&OrigPhiRef =3D ExprToIVMap[SE.getSCEV(Phi)];
if (!OrigPhiRef) {
OrigPhiRef =3D Phi;
+ if (Phi->getType()->isIntegerTy() && TLI
+ && TLI->isTruncateFree(Phi->getType(), Phis.back()->getType())) {
+ // This phi can be freely truncated to the narrowest phi type. Map=
the
+ // truncated expression to it so it will be reused for narrow type=
s.
+ const SCEV *TruncExpr =3D
+ SE.getTruncateExpr(SE.getSCEV(Phi), Phis.back()->getType());
+ ExprToIVMap[TruncExpr] =3D Phi;
+ }
continue;
}
=20
- // If one phi derives from the other via GEPs, types may differ.
- // We could consider adding a bitcast here to handle it.
- if (OrigPhiRef->getType() !=3D Phi->getType())
+ // Replacing a pointer phi with an integer phi or vice-versa doesn't m=
ake
+ // sense.
+ if (OrigPhiRef->getType()->isPointerTy() !=3D Phi->getType()->isPointe=
rTy())
continue;
=20
if (BasicBlock *LatchBlock =3D L->getLoopLatch()) {
@@ -1546,32 +1645,56 @@
Instruction *IsomorphicInc =3D
cast<Instruction>(Phi->getIncomingValueForBlock(LatchBlock));
=20
- // If this phi is more canonical, swap it with the original.
- if (!isExpandedAddRecExprPHI(OrigPhiRef, OrigInc, L)
- && isExpandedAddRecExprPHI(Phi, IsomorphicInc, L)) {
+ // If this phi has the same width but is more canonical, replace the
+ // original with it. As part of the "more canonical" determination,
+ // respect a prior decision to use an IV chain.
+ if (OrigPhiRef->getType() =3D=3D Phi->getType()
+ && !(ChainedPhis.count(Phi)
+ || isExpandedAddRecExprPHI(OrigPhiRef, OrigInc, L))
+ && (ChainedPhis.count(Phi)
+ || isExpandedAddRecExprPHI(Phi, IsomorphicInc, L))) {
std::swap(OrigPhiRef, Phi);
std::swap(OrigInc, IsomorphicInc);
}
// Replacing the congruent phi is sufficient because acyclic redunda=
ncy
// elimination, CSE/GVN, should handle the rest. However, once SCEV =
proves
// that a phi is congruent, it's often the head of an IV user cycle =
that
- // is isomorphic with the original phi. So it's worth eagerly cleani=
ng up
- // the common case of a single IV increment.
- if (OrigInc !=3D IsomorphicInc &&
- OrigInc->getType() =3D=3D IsomorphicInc->getType() &&
- SE.getSCEV(OrigInc) =3D=3D SE.getSCEV(IsomorphicInc) &&
- hoistStep(OrigInc, IsomorphicInc, DT)) {
+ // is isomorphic with the original phi. It's worth eagerly cleaning =
up the
+ // common case of a single IV increment so that DeleteDeadPHIs can r=
emove
+ // cycles that had postinc uses.
+ const SCEV *TruncExpr =3D SE.getTruncateOrNoop(SE.getSCEV(OrigInc),
+ IsomorphicInc->getType(=
));
+ if (OrigInc !=3D IsomorphicInc
+ && TruncExpr =3D=3D SE.getSCEV(IsomorphicInc)
+ && ((isa<PHINode>(OrigInc) && isa<PHINode>(IsomorphicInc))
+ || hoistIVInc(OrigInc, IsomorphicInc))) {
DEBUG_WITH_TYPE(DebugType, dbgs()
<< "INDVARS: Eliminated congruent iv.inc: "
<< *IsomorphicInc << '\n');
- IsomorphicInc->replaceAllUsesWith(OrigInc);
+ Value *NewInc =3D OrigInc;
+ if (OrigInc->getType() !=3D IsomorphicInc->getType()) {
+ Instruction *IP =3D isa<PHINode>(OrigInc)
+ ? (Instruction*)L->getHeader()->getFirstInsertionPt()
+ : OrigInc->getNextNode();
+ IRBuilder<> Builder(IP);
+ Builder.SetCurrentDebugLocation(IsomorphicInc->getDebugLoc());
+ NewInc =3D Builder.
+ CreateTruncOrBitCast(OrigInc, IsomorphicInc->getType(), IVName=
);
+ }
+ IsomorphicInc->replaceAllUsesWith(NewInc);
DeadInsts.push_back(IsomorphicInc);
}
}
DEBUG_WITH_TYPE(DebugType, dbgs()
<< "INDVARS: Eliminated congruent iv: " << *Phi << '\n=
');
++NumElim;
- Phi->replaceAllUsesWith(OrigPhiRef);
+ Value *NewIV =3D OrigPhiRef;
+ if (OrigPhiRef->getType() !=3D Phi->getType()) {
+ IRBuilder<> Builder(L->getHeader()->getFirstInsertionPt());
+ Builder.SetCurrentDebugLocation(Phi->getDebugLoc());
+ NewIV =3D Builder.CreateTruncOrBitCast(OrigPhiRef, Phi->getType(), I=
VName);
+ }
+ Phi->replaceAllUsesWith(NewIV);
DeadInsts.push_back(Phi);
}
return NumElim;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/ScalarE=
volutionNormalization.cpp
--- a/head/contrib/llvm/lib/Analysis/ScalarEvolutionNormalization.cpp Tue A=
pr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/ScalarEvolutionNormalization.cpp Tue A=
pr 17 11:51:51 2012 +0300
@@ -118,7 +118,6 @@
// Conservatively use AnyWrap until/unless we need FlagNW.
const SCEV *Result =3D SE.getAddRecExpr(Operands, L, SCEV::FlagAnyWrap=
);
switch (Kind) {
- default: llvm_unreachable("Unexpected transform name!");
case NormalizeAutodetect:
if (IVUseShouldUsePostIncValue(User, OperandValToReplace, L, &DT)) {
const SCEV *TransformedStep =3D
@@ -191,7 +190,6 @@
}
=20
llvm_unreachable("Unexpected SCEV kind!");
- return 0;
}
=20
/// Manage recursive transformation across an expression DAG. Revisiting
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/SparseP=
ropagation.cpp
--- a/head/contrib/llvm/lib/Analysis/SparsePropagation.cpp Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/SparsePropagation.cpp Tue Apr 17 11:51=
:51 2012 +0300
@@ -194,8 +194,8 @@
Succs.assign(TI.getNumSuccessors(), true);
return;
}
- =20
- Succs[SI.findCaseValue(cast<ConstantInt>(C))] =3D true;
+ SwitchInst::CaseIt Case =3D SI.findCaseValue(cast<ConstantInt>(C));
+ Succs[Case.getSuccessorIndex()] =3D true;
}
=20
=20
@@ -327,13 +327,13 @@
}
=20
void SparseSolver::Print(Function &F, raw_ostream &OS) const {
- OS << "\nFUNCTION: " << F.getNameStr() << "\n";
+ OS << "\nFUNCTION: " << F.getName() << "\n";
for (Function::iterator BB =3D F.begin(), E =3D F.end(); BB !=3D E; ++BB=
) {
if (!BBExecutable.count(BB))
OS << "INFEASIBLE: ";
OS << "\t";
if (BB->hasName())
- OS << BB->getNameStr() << ":\n";
+ OS << BB->getName() << ":\n";
else
OS << "; anon bb\n";
for (BasicBlock::iterator I =3D BB->begin(), E =3D BB->end(); I !=3D E=
; ++I) {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/Trace.c=
pp
--- a/head/contrib/llvm/lib/Analysis/Trace.cpp Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/llvm/lib/Analysis/Trace.cpp Tue Apr 17 11:51:51 2012 +03=
00
@@ -34,7 +34,7 @@
///
void Trace::print(raw_ostream &O) const {
Function *F =3D getFunction();
- O << "; Trace from function " << F->getNameStr() << ", blocks:\n";
+ O << "; Trace from function " << F->getName() << ", blocks:\n";
for (const_iterator i =3D begin(), e =3D end(); i !=3D e; ++i) {
O << "; ";
WriteAsOperand(O, *i, true, getModule());
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Analysis/ValueTr=
acking.cpp
--- a/head/contrib/llvm/lib/Analysis/ValueTracking.cpp Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/lib/Analysis/ValueTracking.cpp Tue Apr 17 11:51:51 =
2012 +0300
@@ -20,8 +20,10 @@
#include "llvm/GlobalAlias.h"
#include "llvm/IntrinsicInst.h"
#include "llvm/LLVMContext.h"
+#include "llvm/Metadata.h"
#include "llvm/Operator.h"
#include "llvm/Target/TargetData.h"
+#include "llvm/Support/ConstantRange.h"
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/PatternMatch.h"
@@ -41,10 +43,176 @@
return TD ? TD->getPointerSizeInBits() : 0;
}
=20
-/// ComputeMaskedBits - Determine which of the bits specified in Mask are
-/// known to be either zero or one and return them in the KnownZero/KnownO=
ne
-/// bit sets. This code only analyzes bits in Mask, in order to short-cir=
cuit
-/// processing.
+static void ComputeMaskedBitsAddSub(bool Add, Value *Op0, Value *Op1, bool=
NSW,
+ APInt &KnownZero, APInt &KnownOne,
+ APInt &KnownZero2, APInt &KnownOne2,
+ const TargetData *TD, unsigned Depth) {
+ if (!Add) {
+ if (ConstantInt *CLHS =3D dyn_cast<ConstantInt>(Op0)) {
+ // We know that the top bits of C-X are clear if X contains less bits
+ // than C (i.e. no wrap-around can happen). For example, 20-X is
+ // positive if we can prove that X is >=3D 0 and < 16.
+ if (!CLHS->getValue().isNegative()) {
+ unsigned BitWidth =3D KnownZero.getBitWidth();
+ unsigned NLZ =3D (CLHS->getValue()+1).countLeadingZeros();
+ // NLZ can't be BitWidth with no sign bit
+ APInt MaskV =3D APInt::getHighBitsSet(BitWidth, NLZ+1);
+ llvm::ComputeMaskedBits(Op1, KnownZero2, KnownOne2, TD, Depth+1);
+ =20
+ // If all of the MaskV bits are known to be zero, then we know the
+ // output top bits are zero, because we now know that the output is
+ // from [0-C].
+ if ((KnownZero2 & MaskV) =3D=3D MaskV) {
+ unsigned NLZ2 =3D CLHS->getValue().countLeadingZeros();
+ // Top bits known zero.
+ KnownZero =3D APInt::getHighBitsSet(BitWidth, NLZ2);
+ }
+ }
+ }
+ }
+
+ unsigned BitWidth =3D KnownZero.getBitWidth();
+
+ // If one of the operands has trailing zeros, then the bits that the
+ // other operand has in those bit positions will be preserved in the
+ // result. For an add, this works with either operand. For a subtract,
+ // this only works if the known zeros are in the right operand.
+ APInt LHSKnownZero(BitWidth, 0), LHSKnownOne(BitWidth, 0);
+ llvm::ComputeMaskedBits(Op0, LHSKnownZero, LHSKnownOne, TD, Depth+1);
+ assert((LHSKnownZero & LHSKnownOne) =3D=3D 0 &&
+ "Bits known to be one AND zero?");
+ unsigned LHSKnownZeroOut =3D LHSKnownZero.countTrailingOnes();
+
+ llvm::ComputeMaskedBits(Op1, KnownZero2, KnownOne2, TD, Depth+1);
+ assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND ze=
ro?");=20
+ unsigned RHSKnownZeroOut =3D KnownZero2.countTrailingOnes();
+
+ // Determine which operand has more trailing zeros, and use that
+ // many bits from the other operand.
+ if (LHSKnownZeroOut > RHSKnownZeroOut) {
+ if (Add) {
+ APInt Mask =3D APInt::getLowBitsSet(BitWidth, LHSKnownZeroOut);
+ KnownZero |=3D KnownZero2 & Mask;
+ KnownOne |=3D KnownOne2 & Mask;
+ } else {
+ // If the known zeros are in the left operand for a subtract,
+ // fall back to the minimum known zeros in both operands.
+ KnownZero |=3D APInt::getLowBitsSet(BitWidth,
+ std::min(LHSKnownZeroOut,
+ RHSKnownZeroOut));
+ }
+ } else if (RHSKnownZeroOut >=3D LHSKnownZeroOut) {
+ APInt Mask =3D APInt::getLowBitsSet(BitWidth, RHSKnownZeroOut);
+ KnownZero |=3D LHSKnownZero & Mask;
+ KnownOne |=3D LHSKnownOne & Mask;
+ }
+
+ // Are we still trying to solve for the sign bit?
+ if (!KnownZero.isNegative() && !KnownOne.isNegative()) {
+ if (NSW) {
+ if (Add) {
+ // Adding two positive numbers can't wrap into negative
+ if (LHSKnownZero.isNegative() && KnownZero2.isNegative())
+ KnownZero |=3D APInt::getSignBit(BitWidth);
+ // and adding two negative numbers can't wrap into positive.
+ else if (LHSKnownOne.isNegative() && KnownOne2.isNegative())
+ KnownOne |=3D APInt::getSignBit(BitWidth);
+ } else {
+ // Subtracting a negative number from a positive one can't wrap
+ if (LHSKnownZero.isNegative() && KnownOne2.isNegative())
+ KnownZero |=3D APInt::getSignBit(BitWidth);
+ // neither can subtracting a positive number from a negative one.
+ else if (LHSKnownOne.isNegative() && KnownZero2.isNegative())
+ KnownOne |=3D APInt::getSignBit(BitWidth);
+ }
+ }
+ }
+}
+
+static void ComputeMaskedBitsMul(Value *Op0, Value *Op1, bool NSW,
+ APInt &KnownZero, APInt &KnownOne,
+ APInt &KnownZero2, APInt &KnownOne2,
+ const TargetData *TD, unsigned Depth) {
+ unsigned BitWidth =3D KnownZero.getBitWidth();
+ ComputeMaskedBits(Op1, KnownZero, KnownOne, TD, Depth+1);
+ ComputeMaskedBits(Op0, KnownZero2, KnownOne2, TD, Depth+1);
+ assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND zero=
?");
+ assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND ze=
ro?");
+
+ bool isKnownNegative =3D false;
+ bool isKnownNonNegative =3D false;
+ // If the multiplication is known not to overflow, compute the sign bit.
+ if (NSW) {
+ if (Op0 =3D=3D Op1) {
+ // The product of a number with itself is non-negative.
+ isKnownNonNegative =3D true;
+ } else {
+ bool isKnownNonNegativeOp1 =3D KnownZero.isNegative();
+ bool isKnownNonNegativeOp0 =3D KnownZero2.isNegative();
+ bool isKnownNegativeOp1 =3D KnownOne.isNegative();
+ bool isKnownNegativeOp0 =3D KnownOne2.isNegative();
+ // The product of two numbers with the same sign is non-negative.
+ isKnownNonNegative =3D (isKnownNegativeOp1 && isKnownNegativeOp0) ||
+ (isKnownNonNegativeOp1 && isKnownNonNegativeOp0);
+ // The product of a negative number and a non-negative number is eit=
her
+ // negative or zero.
+ if (!isKnownNonNegative)
+ isKnownNegative =3D (isKnownNegativeOp1 && isKnownNonNegativeOp0 &&
+ isKnownNonZero(Op0, TD, Depth)) ||
+ (isKnownNegativeOp0 && isKnownNonNegativeOp1 &&
+ isKnownNonZero(Op1, TD, Depth));
+ }
+ }
+
+ // If low bits are zero in either operand, output low known-0 bits.
+ // Also compute a conserative estimate for high known-0 bits.
+ // More trickiness is possible, but this is sufficient for the
+ // interesting case of alignment computation.
+ KnownOne.clearAllBits();
+ unsigned TrailZ =3D KnownZero.countTrailingOnes() +
+ KnownZero2.countTrailingOnes();
+ unsigned LeadZ =3D std::max(KnownZero.countLeadingOnes() +
+ KnownZero2.countLeadingOnes(),
+ BitWidth) - BitWidth;
+
+ TrailZ =3D std::min(TrailZ, BitWidth);
+ LeadZ =3D std::min(LeadZ, BitWidth);
+ KnownZero =3D APInt::getLowBitsSet(BitWidth, TrailZ) |
+ APInt::getHighBitsSet(BitWidth, LeadZ);
+
+ // Only make use of no-wrap flags if we failed to compute the sign bit
+ // directly. This matters if the multiplication always overflows, in
+ // which case we prefer to follow the result of the direct computation,
+ // though as the program is invoking undefined behaviour we can choose
+ // whatever we like here.
+ if (isKnownNonNegative && !KnownOne.isNegative())
+ KnownZero.setBit(BitWidth - 1);
+ else if (isKnownNegative && !KnownZero.isNegative())
+ KnownOne.setBit(BitWidth - 1);
+}
+
+void llvm::computeMaskedBitsLoad(const MDNode &Ranges, APInt &KnownZero) {
+ unsigned BitWidth =3D KnownZero.getBitWidth();
+ unsigned NumRanges =3D Ranges.getNumOperands() / 2;
+ assert(NumRanges >=3D 1);
+
+ // Use the high end of the ranges to find leading zeros.
+ unsigned MinLeadingZeros =3D BitWidth;
+ for (unsigned i =3D 0; i < NumRanges; ++i) {
+ ConstantInt *Lower =3D cast<ConstantInt>(Ranges.getOperand(2*i + 0));
+ ConstantInt *Upper =3D cast<ConstantInt>(Ranges.getOperand(2*i + 1));
+ ConstantRange Range(Lower->getValue(), Upper->getValue());
+ if (Range.isWrappedSet())
+ MinLeadingZeros =3D 0; // -1 has no zeros
+ unsigned LeadingZeros =3D (Upper->getValue() - 1).countLeadingZeros();
+ MinLeadingZeros =3D std::min(LeadingZeros, MinLeadingZeros);
+ }
+
+ KnownZero =3D APInt::getHighBitsSet(BitWidth, MinLeadingZeros);
+}
+/// ComputeMaskedBits - Determine which of the bits are known to be either=
zero
+/// or one and return them in the KnownZero/KnownOne bit sets.
+///
/// NOTE: we cannot consider 'undef' to be "IsZero" here. The problem is =
that
/// we cannot optimize based on the assumption that it is zero without cha=
nging
/// it to be an explicit zero. If we don't change it to zero, other code =
could
@@ -54,67 +222,75 @@
///
/// This function is defined on values with integer type, values with poin=
ter
/// type (but only if TD is non-null), and vectors of integers. In the ca=
se
-/// where V is a vector, the mask, known zero, and known one values are the
+/// where V is a vector, known zero, and known one values are the
/// same width as the vector element, and the bit is set only if it is true
/// for all of the elements in the vector.
-void llvm::ComputeMaskedBits(Value *V, const APInt &Mask,
- APInt &KnownZero, APInt &KnownOne,
+void llvm::ComputeMaskedBits(Value *V, APInt &KnownZero, APInt &KnownOne,
const TargetData *TD, unsigned Depth) {
assert(V && "No Value?");
assert(Depth <=3D MaxDepth && "Limit Search Depth");
- unsigned BitWidth =3D Mask.getBitWidth();
- assert((V->getType()->isIntOrIntVectorTy() || V->getType()->isPointerTy(=
))
- && "Not integer or pointer type!");
+ unsigned BitWidth =3D KnownZero.getBitWidth();
+
+ assert((V->getType()->isIntOrIntVectorTy() ||
+ V->getType()->getScalarType()->isPointerTy()) &&
+ "Not integer or pointer type!");
assert((!TD ||
TD->getTypeSizeInBits(V->getType()->getScalarType()) =3D=3D BitW=
idth) &&
(!V->getType()->isIntOrIntVectorTy() ||
V->getType()->getScalarSizeInBits() =3D=3D BitWidth) &&
- KnownZero.getBitWidth() =3D=3D BitWidth &&=20
+ KnownZero.getBitWidth() =3D=3D BitWidth &&
KnownOne.getBitWidth() =3D=3D BitWidth &&
"V, Mask, KnownOne and KnownZero should have same BitWidth");
=20
if (ConstantInt *CI =3D dyn_cast<ConstantInt>(V)) {
// We know all of the bits for a constant!
- KnownOne =3D CI->getValue() & Mask;
- KnownZero =3D ~KnownOne & Mask;
+ KnownOne =3D CI->getValue();
+ KnownZero =3D ~KnownOne;
return;
}
// Null and aggregate-zero are all-zeros.
if (isa<ConstantPointerNull>(V) ||
isa<ConstantAggregateZero>(V)) {
KnownOne.clearAllBits();
- KnownZero =3D Mask;
+ KnownZero =3D APInt::getAllOnesValue(BitWidth);
return;
}
// Handle a constant vector by taking the intersection of the known bits=
of
- // each element.
- if (ConstantVector *CV =3D dyn_cast<ConstantVector>(V)) {
+ // each element. There is no real need to handle ConstantVector here, b=
ecause
+ // we don't handle undef in any particularly useful way.
+ if (ConstantDataSequential *CDS =3D dyn_cast<ConstantDataSequential>(V))=
{
+ // We know that CDS must be a vector of integers. Take the intersectio=
n of
+ // each element.
KnownZero.setAllBits(); KnownOne.setAllBits();
- for (unsigned i =3D 0, e =3D CV->getNumOperands(); i !=3D e; ++i) {
- APInt KnownZero2(BitWidth, 0), KnownOne2(BitWidth, 0);
- ComputeMaskedBits(CV->getOperand(i), Mask, KnownZero2, KnownOne2,
- TD, Depth);
- KnownZero &=3D KnownZero2;
- KnownOne &=3D KnownOne2;
+ APInt Elt(KnownZero.getBitWidth(), 0);
+ for (unsigned i =3D 0, e =3D CDS->getNumElements(); i !=3D e; ++i) {
+ Elt =3D CDS->getElementAsInteger(i);
+ KnownZero &=3D ~Elt;
+ KnownOne &=3D Elt; =20
}
return;
}
+ =20
// The address of an aligned GlobalValue has trailing zeros.
if (GlobalValue *GV =3D dyn_cast<GlobalValue>(V)) {
unsigned Align =3D GV->getAlignment();
- if (Align =3D=3D 0 && TD && GV->getType()->getElementType()->isSized()=
) {
- Type *ObjectType =3D GV->getType()->getElementType();
- // If the object is defined in the current Module, we'll be giving
- // it the preferred alignment. Otherwise, we have to assume that it
- // may only have the minimum ABI alignment.
- if (!GV->isDeclaration() && !GV->mayBeOverridden())
- Align =3D TD->getPrefTypeAlignment(ObjectType);
- else
- Align =3D TD->getABITypeAlignment(ObjectType);
+ if (Align =3D=3D 0 && TD) {
+ if (GlobalVariable *GVar =3D dyn_cast<GlobalVariable>(GV)) {
+ Type *ObjectType =3D GVar->getType()->getElementType();
+ if (ObjectType->isSized()) {
+ // If the object is defined in the current Module, we'll be givi=
ng
+ // it the preferred alignment. Otherwise, we have to assume that=
it
+ // may only have the minimum ABI alignment.
+ if (!GVar->isDeclaration() && !GVar->isWeakForLinker())
+ Align =3D TD->getPreferredAlignment(GVar);
+ else
+ Align =3D TD->getABITypeAlignment(ObjectType);
+ }
+ }
}
if (Align > 0)
- KnownZero =3D Mask & APInt::getLowBitsSet(BitWidth,
- CountTrailingZeros_32(Align)=
);
+ KnownZero =3D APInt::getLowBitsSet(BitWidth,
+ CountTrailingZeros_32(Align));
else
KnownZero.clearAllBits();
KnownOne.clearAllBits();
@@ -126,8 +302,7 @@
if (GA->mayBeOverridden()) {
KnownZero.clearAllBits(); KnownOne.clearAllBits();
} else {
- ComputeMaskedBits(GA->getAliasee(), Mask, KnownZero, KnownOne,
- TD, Depth+1);
+ ComputeMaskedBits(GA->getAliasee(), KnownZero, KnownOne, TD, Depth+1=
);
}
return;
}
@@ -136,15 +311,15 @@
// Get alignment information off byval arguments if specified in the I=
R.
if (A->hasByValAttr())
if (unsigned Align =3D A->getParamAlignment())
- KnownZero =3D Mask & APInt::getLowBitsSet(BitWidth,
- CountTrailingZeros_32(Alig=
n));
+ KnownZero =3D APInt::getLowBitsSet(BitWidth,
+ CountTrailingZeros_32(Align));
return;
}
=20
// Start out not knowing anything.
KnownZero.clearAllBits(); KnownOne.clearAllBits();
=20
- if (Depth =3D=3D MaxDepth || Mask =3D=3D 0)
+ if (Depth =3D=3D MaxDepth)
return; // Limit search depth.
=20
Operator *I =3D dyn_cast<Operator>(V);
@@ -153,12 +328,14 @@
APInt KnownZero2(KnownZero), KnownOne2(KnownOne);
switch (I->getOpcode()) {
default: break;
+ case Instruction::Load:
+ if (MDNode *MD =3D cast<LoadInst>(I)->getMetadata(LLVMContext::MD_rang=
e))
+ computeMaskedBitsLoad(*MD, KnownZero);
+ return;
case Instruction::And: {
// If either the LHS or the RHS are Zero, the result is zero.
- ComputeMaskedBits(I->getOperand(1), Mask, KnownZero, KnownOne, TD, Dep=
th+1);
- APInt Mask2(Mask & ~KnownZero);
- ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero2, KnownOne2, TD,
- Depth+1);
+ ComputeMaskedBits(I->getOperand(1), KnownZero, KnownOne, TD, Depth+1);
+ ComputeMaskedBits(I->getOperand(0), KnownZero2, KnownOne2, TD, Depth+1=
);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND ze=
ro?");=20
assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND =
zero?");=20
=20
@@ -169,10 +346,8 @@
return;
}
case Instruction::Or: {
- ComputeMaskedBits(I->getOperand(1), Mask, KnownZero, KnownOne, TD, Dep=
th+1);
- APInt Mask2(Mask & ~KnownOne);
- ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero2, KnownOne2, TD,
- Depth+1);
+ ComputeMaskedBits(I->getOperand(1), KnownZero, KnownOne, TD, Depth+1);
+ ComputeMaskedBits(I->getOperand(0), KnownZero2, KnownOne2, TD, Depth+1=
);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND ze=
ro?");=20
assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND =
zero?");=20
=20
@@ -183,9 +358,8 @@
return;
}
case Instruction::Xor: {
- ComputeMaskedBits(I->getOperand(1), Mask, KnownZero, KnownOne, TD, Dep=
th+1);
- ComputeMaskedBits(I->getOperand(0), Mask, KnownZero2, KnownOne2, TD,
- Depth+1);
+ ComputeMaskedBits(I->getOperand(1), KnownZero, KnownOne, TD, Depth+1);
+ ComputeMaskedBits(I->getOperand(0), KnownZero2, KnownOne2, TD, Depth+1=
);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND ze=
ro?");=20
assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND =
zero?");=20
=20
@@ -197,55 +371,32 @@
return;
}
case Instruction::Mul: {
- APInt Mask2 =3D APInt::getAllOnesValue(BitWidth);
- ComputeMaskedBits(I->getOperand(1), Mask2, KnownZero, KnownOne, TD,Dep=
th+1);
- ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero2, KnownOne2, TD,
- Depth+1);
- assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND ze=
ro?");=20
- assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND =
zero?");=20
- =20
- // If low bits are zero in either operand, output low known-0 bits.
- // Also compute a conserative estimate for high known-0 bits.
- // More trickiness is possible, but this is sufficient for the
- // interesting case of alignment computation.
- KnownOne.clearAllBits();
- unsigned TrailZ =3D KnownZero.countTrailingOnes() +
- KnownZero2.countTrailingOnes();
- unsigned LeadZ =3D std::max(KnownZero.countLeadingOnes() +
- KnownZero2.countLeadingOnes(),
- BitWidth) - BitWidth;
-
- TrailZ =3D std::min(TrailZ, BitWidth);
- LeadZ =3D std::min(LeadZ, BitWidth);
- KnownZero =3D APInt::getLowBitsSet(BitWidth, TrailZ) |
- APInt::getHighBitsSet(BitWidth, LeadZ);
- KnownZero &=3D Mask;
- return;
+ bool NSW =3D cast<OverflowingBinaryOperator>(I)->hasNoSignedWrap();
+ ComputeMaskedBitsMul(I->getOperand(0), I->getOperand(1), NSW,
+ KnownZero, KnownOne, KnownZero2, KnownOne2, TD, D=
epth);
+ break;
}
case Instruction::UDiv: {
// For the purposes of computing leading zeros we can conservatively
// treat a udiv as a logical right shift by the power of 2 known to
// be less than the denominator.
- APInt AllOnes =3D APInt::getAllOnesValue(BitWidth);
- ComputeMaskedBits(I->getOperand(0),
- AllOnes, KnownZero2, KnownOne2, TD, Depth+1);
+ ComputeMaskedBits(I->getOperand(0), KnownZero2, KnownOne2, TD, Depth+1=
);
unsigned LeadZ =3D KnownZero2.countLeadingOnes();
=20
KnownOne2.clearAllBits();
KnownZero2.clearAllBits();
- ComputeMaskedBits(I->getOperand(1),
- AllOnes, KnownZero2, KnownOne2, TD, Depth+1);
+ ComputeMaskedBits(I->getOperand(1), KnownZero2, KnownOne2, TD, Depth+1=
);
unsigned RHSUnknownLeadingOnes =3D KnownOne2.countLeadingZeros();
if (RHSUnknownLeadingOnes !=3D BitWidth)
LeadZ =3D std::min(BitWidth,
LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
=20
- KnownZero =3D APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
+ KnownZero =3D APInt::getHighBitsSet(BitWidth, LeadZ);
return;
}
case Instruction::Select:
- ComputeMaskedBits(I->getOperand(2), Mask, KnownZero, KnownOne, TD, Dep=
th+1);
- ComputeMaskedBits(I->getOperand(1), Mask, KnownZero2, KnownOne2, TD,
+ ComputeMaskedBits(I->getOperand(2), KnownZero, KnownOne, TD, Depth+1);
+ ComputeMaskedBits(I->getOperand(1), KnownZero2, KnownOne2, TD,
Depth+1);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND ze=
ro?");=20
assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND =
zero?");=20
@@ -278,11 +429,9 @@
else
SrcBitWidth =3D SrcTy->getScalarSizeInBits();
=20
- APInt MaskIn =3D Mask.zextOrTrunc(SrcBitWidth);
KnownZero =3D KnownZero.zextOrTrunc(SrcBitWidth);
KnownOne =3D KnownOne.zextOrTrunc(SrcBitWidth);
- ComputeMaskedBits(I->getOperand(0), MaskIn, KnownZero, KnownOne, TD,
- Depth+1);
+ ComputeMaskedBits(I->getOperand(0), KnownZero, KnownOne, TD, Depth+1);
KnownZero =3D KnownZero.zextOrTrunc(BitWidth);
KnownOne =3D KnownOne.zextOrTrunc(BitWidth);
// Any top bits are known to be zero.
@@ -296,8 +445,7 @@
// TODO: For now, not handling conversions like:
// (bitcast i64 %x to <2 x i32>)
!I->getType()->isVectorTy()) {
- ComputeMaskedBits(I->getOperand(0), Mask, KnownZero, KnownOne, TD,
- Depth+1);
+ ComputeMaskedBits(I->getOperand(0), KnownZero, KnownOne, TD, Depth+1=
);
return;
}
break;
@@ -306,11 +454,9 @@
// Compute the bits in the result that are not present in the input.
unsigned SrcBitWidth =3D I->getOperand(0)->getType()->getScalarSizeInB=
its();
=20
- APInt MaskIn =3D Mask.trunc(SrcBitWidth);
KnownZero =3D KnownZero.trunc(SrcBitWidth);
KnownOne =3D KnownOne.trunc(SrcBitWidth);
- ComputeMaskedBits(I->getOperand(0), MaskIn, KnownZero, KnownOne, TD,
- Depth+1);
+ ComputeMaskedBits(I->getOperand(0), KnownZero, KnownOne, TD, Depth+1);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND ze=
ro?");=20
KnownZero =3D KnownZero.zext(BitWidth);
KnownOne =3D KnownOne.zext(BitWidth);
@@ -327,9 +473,7 @@
// (shl X, C1) & C2 =3D=3D 0 iff (X & C2 >>u C1) =3D=3D 0
if (ConstantInt *SA =3D dyn_cast<ConstantInt>(I->getOperand(1))) {
uint64_t ShiftAmt =3D SA->getLimitedValue(BitWidth);
- APInt Mask2(Mask.lshr(ShiftAmt));
- ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero, KnownOne, TD,
- Depth+1);
+ ComputeMaskedBits(I->getOperand(0), KnownZero, KnownOne, TD, Depth+1=
);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND =
zero?");=20
KnownZero <<=3D ShiftAmt;
KnownOne <<=3D ShiftAmt;
@@ -344,9 +488,7 @@
uint64_t ShiftAmt =3D SA->getLimitedValue(BitWidth);
=20
// Unsigned shift right.
- APInt Mask2(Mask.shl(ShiftAmt));
- ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero,KnownOne, TD,
- Depth+1);
+ ComputeMaskedBits(I->getOperand(0), KnownZero,KnownOne, TD, Depth+1);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND =
zero?");=20
KnownZero =3D APIntOps::lshr(KnownZero, ShiftAmt);
KnownOne =3D APIntOps::lshr(KnownOne, ShiftAmt);
@@ -362,9 +504,7 @@
uint64_t ShiftAmt =3D SA->getLimitedValue(BitWidth-1);
=20
// Signed shift right.
- APInt Mask2(Mask.shl(ShiftAmt));
- ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero, KnownOne, TD,
- Depth+1);
+ ComputeMaskedBits(I->getOperand(0), KnownZero, KnownOne, TD, Depth+1=
);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND =
zero?");=20
KnownZero =3D APIntOps::lshr(KnownZero, ShiftAmt);
KnownOne =3D APIntOps::lshr(KnownOne, ShiftAmt);
@@ -378,100 +518,25 @@
}
break;
case Instruction::Sub: {
- if (ConstantInt *CLHS =3D dyn_cast<ConstantInt>(I->getOperand(0))) {
- // We know that the top bits of C-X are clear if X contains less bits
- // than C (i.e. no wrap-around can happen). For example, 20-X is
- // positive if we can prove that X is >=3D 0 and < 16.
- if (!CLHS->getValue().isNegative()) {
- unsigned NLZ =3D (CLHS->getValue()+1).countLeadingZeros();
- // NLZ can't be BitWidth with no sign bit
- APInt MaskV =3D APInt::getHighBitsSet(BitWidth, NLZ+1);
- ComputeMaskedBits(I->getOperand(1), MaskV, KnownZero2, KnownOne2,
- TD, Depth+1);
- =20
- // If all of the MaskV bits are known to be zero, then we know the
- // output top bits are zero, because we now know that the output is
- // from [0-C].
- if ((KnownZero2 & MaskV) =3D=3D MaskV) {
- unsigned NLZ2 =3D CLHS->getValue().countLeadingZeros();
- // Top bits known zero.
- KnownZero =3D APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
- }
- } =20
- }
+ bool NSW =3D cast<OverflowingBinaryOperator>(I)->hasNoSignedWrap();
+ ComputeMaskedBitsAddSub(false, I->getOperand(0), I->getOperand(1), NSW,
+ KnownZero, KnownOne, KnownZero2, KnownOne2, TD,
+ Depth);
+ break;
}
- // fall through
case Instruction::Add: {
- // If one of the operands has trailing zeros, then the bits that the
- // other operand has in those bit positions will be preserved in the
- // result. For an add, this works with either operand. For a subtract,
- // this only works if the known zeros are in the right operand.
- APInt LHSKnownZero(BitWidth, 0), LHSKnownOne(BitWidth, 0);
- APInt Mask2 =3D APInt::getLowBitsSet(BitWidth,
- BitWidth - Mask.countLeadingZeros()=
);
- ComputeMaskedBits(I->getOperand(0), Mask2, LHSKnownZero, LHSKnownOne, =
TD,
- Depth+1);
- assert((LHSKnownZero & LHSKnownOne) =3D=3D 0 &&
- "Bits known to be one AND zero?");
- unsigned LHSKnownZeroOut =3D LHSKnownZero.countTrailingOnes();
-
- ComputeMaskedBits(I->getOperand(1), Mask2, KnownZero2, KnownOne2, TD,=20
- Depth+1);
- assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND =
zero?");=20
- unsigned RHSKnownZeroOut =3D KnownZero2.countTrailingOnes();
-
- // Determine which operand has more trailing zeros, and use that
- // many bits from the other operand.
- if (LHSKnownZeroOut > RHSKnownZeroOut) {
- if (I->getOpcode() =3D=3D Instruction::Add) {
- APInt Mask =3D APInt::getLowBitsSet(BitWidth, LHSKnownZeroOut);
- KnownZero |=3D KnownZero2 & Mask;
- KnownOne |=3D KnownOne2 & Mask;
- } else {
- // If the known zeros are in the left operand for a subtract,
- // fall back to the minimum known zeros in both operands.
- KnownZero |=3D APInt::getLowBitsSet(BitWidth,
- std::min(LHSKnownZeroOut,
- RHSKnownZeroOut));
- }
- } else if (RHSKnownZeroOut >=3D LHSKnownZeroOut) {
- APInt Mask =3D APInt::getLowBitsSet(BitWidth, RHSKnownZeroOut);
- KnownZero |=3D LHSKnownZero & Mask;
- KnownOne |=3D LHSKnownOne & Mask;
- }
-
- // Are we still trying to solve for the sign bit?
- if (Mask.isNegative() && !KnownZero.isNegative() && !KnownOne.isNegati=
ve()){
- OverflowingBinaryOperator *OBO =3D cast<OverflowingBinaryOperator>(I=
);
- if (OBO->hasNoSignedWrap()) {
- if (I->getOpcode() =3D=3D Instruction::Add) {
- // Adding two positive numbers can't wrap into negative
- if (LHSKnownZero.isNegative() && KnownZero2.isNegative())
- KnownZero |=3D APInt::getSignBit(BitWidth);
- // and adding two negative numbers can't wrap into positive.
- else if (LHSKnownOne.isNegative() && KnownOne2.isNegative())
- KnownOne |=3D APInt::getSignBit(BitWidth);
- } else {
- // Subtracting a negative number from a positive one can't wrap
- if (LHSKnownZero.isNegative() && KnownOne2.isNegative())
- KnownZero |=3D APInt::getSignBit(BitWidth);
- // neither can subtracting a positive number from a negative one.
- else if (LHSKnownOne.isNegative() && KnownZero2.isNegative())
- KnownOne |=3D APInt::getSignBit(BitWidth);
- }
- }
- }
-
- return;
+ bool NSW =3D cast<OverflowingBinaryOperator>(I)->hasNoSignedWrap();
+ ComputeMaskedBitsAddSub(true, I->getOperand(0), I->getOperand(1), NSW,
+ KnownZero, KnownOne, KnownZero2, KnownOne2, TD,
+ Depth);
+ break;
}
case Instruction::SRem:
if (ConstantInt *Rem =3D dyn_cast<ConstantInt>(I->getOperand(1))) {
APInt RA =3D Rem->getValue().abs();
if (RA.isPowerOf2()) {
APInt LowBits =3D RA - 1;
- APInt Mask2 =3D LowBits | APInt::getSignBit(BitWidth);
- ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero2, KnownOne2, =
TD,=20
- Depth+1);
+ ComputeMaskedBits(I->getOperand(0), KnownZero2, KnownOne2, TD, Dep=
th+1);
=20
// The low bits of the first operand are unchanged by the srem.
KnownZero =3D KnownZero2 & LowBits;
@@ -487,19 +552,15 @@
if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) !=3D 0))
KnownOne |=3D ~LowBits;
=20
- KnownZero &=3D Mask;
- KnownOne &=3D Mask;
-
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AN=
D zero?");=20
}
}
=20
// The sign bit is the LHS's sign bit, except when the result of the
// remainder is zero.
- if (Mask.isNegative() && KnownZero.isNonNegative()) {
- APInt Mask2 =3D APInt::getSignBit(BitWidth);
+ if (KnownZero.isNonNegative()) {
APInt LHSKnownZero(BitWidth, 0), LHSKnownOne(BitWidth, 0);
- ComputeMaskedBits(I->getOperand(0), Mask2, LHSKnownZero, LHSKnownOne=
, TD,
+ ComputeMaskedBits(I->getOperand(0), LHSKnownZero, LHSKnownOne, TD,
Depth+1);
// If it's known zero, our sign bit is also zero.
if (LHSKnownZero.isNegative())
@@ -512,27 +573,24 @@
APInt RA =3D Rem->getValue();
if (RA.isPowerOf2()) {
APInt LowBits =3D (RA - 1);
- APInt Mask2 =3D LowBits & Mask;
- KnownZero |=3D ~LowBits & Mask;
- ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero, KnownOne, TD,
+ ComputeMaskedBits(I->getOperand(0), KnownZero, KnownOne, TD,
Depth+1);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AN=
D zero?");
+ KnownZero |=3D ~LowBits;
+ KnownOne &=3D LowBits;
break;
}
}
=20
// Since the result is less than or equal to either operand, any leadi=
ng
// zero bits in either operand must also exist in the result.
- APInt AllOnes =3D APInt::getAllOnesValue(BitWidth);
- ComputeMaskedBits(I->getOperand(0), AllOnes, KnownZero, KnownOne,
- TD, Depth+1);
- ComputeMaskedBits(I->getOperand(1), AllOnes, KnownZero2, KnownOne2,
- TD, Depth+1);
+ ComputeMaskedBits(I->getOperand(0), KnownZero, KnownOne, TD, Depth+1);
+ ComputeMaskedBits(I->getOperand(1), KnownZero2, KnownOne2, TD, Depth+1=
);
=20
unsigned Leaders =3D std::max(KnownZero.countLeadingOnes(),
KnownZero2.countLeadingOnes());
KnownOne.clearAllBits();
- KnownZero =3D APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
+ KnownZero =3D APInt::getHighBitsSet(BitWidth, Leaders);
break;
}
=20
@@ -543,17 +601,15 @@
Align =3D TD->getABITypeAlignment(AI->getType()->getElementType());
=20
if (Align > 0)
- KnownZero =3D Mask & APInt::getLowBitsSet(BitWidth,
- CountTrailingZeros_32(Align)=
);
+ KnownZero =3D APInt::getLowBitsSet(BitWidth, CountTrailingZeros_32(A=
lign));
break;
}
case Instruction::GetElementPtr: {
// Analyze all of the subscripts of this getelementptr instruction
// to determine if we can prove known low zero bits.
- APInt LocalMask =3D APInt::getAllOnesValue(BitWidth);
APInt LocalKnownZero(BitWidth, 0), LocalKnownOne(BitWidth, 0);
- ComputeMaskedBits(I->getOperand(0), LocalMask,
- LocalKnownZero, LocalKnownOne, TD, Depth+1);
+ ComputeMaskedBits(I->getOperand(0), LocalKnownZero, LocalKnownOne, TD,
+ Depth+1);
unsigned TrailZ =3D LocalKnownZero.countTrailingOnes();
=20
gep_type_iterator GTI =3D gep_type_begin(I);
@@ -573,17 +629,15 @@
if (!IndexedTy->isSized()) return;
unsigned GEPOpiBits =3D Index->getType()->getScalarSizeInBits();
uint64_t TypeSize =3D TD ? TD->getTypeAllocSize(IndexedTy) : 1;
- LocalMask =3D APInt::getAllOnesValue(GEPOpiBits);
LocalKnownZero =3D LocalKnownOne =3D APInt(GEPOpiBits, 0);
- ComputeMaskedBits(Index, LocalMask,
- LocalKnownZero, LocalKnownOne, TD, Depth+1);
+ ComputeMaskedBits(Index, LocalKnownZero, LocalKnownOne, TD, Depth+=
1);
TrailZ =3D std::min(TrailZ,
unsigned(CountTrailingZeros_64(TypeSize) +
LocalKnownZero.countTrailingOnes()));
}
}
=20
- KnownZero =3D APInt::getLowBitsSet(BitWidth, TrailZ) & Mask;
+ KnownZero =3D APInt::getLowBitsSet(BitWidth, TrailZ);
break;
}
case Instruction::PHI: {
@@ -618,17 +672,13 @@
break;
// Ok, we have a PHI of the form L op=3D R. Check for low
// zero bits.
- APInt Mask2 =3D APInt::getAllOnesValue(BitWidth);
- ComputeMaskedBits(R, Mask2, KnownZero2, KnownOne2, TD, Depth+1);
- Mask2 =3D APInt::getLowBitsSet(BitWidth,
- KnownZero2.countTrailingOnes());
+ ComputeMaskedBits(R, KnownZero2, KnownOne2, TD, Depth+1);
=20
// We need to take the minimum number of known bits
APInt KnownZero3(KnownZero), KnownOne3(KnownOne);
- ComputeMaskedBits(L, Mask2, KnownZero3, KnownOne3, TD, Depth+1);
+ ComputeMaskedBits(L, KnownZero3, KnownOne3, TD, Depth+1);
=20
- KnownZero =3D Mask &
- APInt::getLowBitsSet(BitWidth,
+ KnownZero =3D APInt::getLowBitsSet(BitWidth,
std::min(KnownZero2.countTraili=
ngOnes(),
KnownZero3.countTraili=
ngOnes()));
break;
@@ -657,8 +707,8 @@
KnownOne2 =3D APInt(BitWidth, 0);
// Recurse, but cap the recursion to one level, because we don't
// want to waste time spinning around in loops.
- ComputeMaskedBits(P->getIncomingValue(i), KnownZero | KnownOne,
- KnownZero2, KnownOne2, TD, MaxDepth-1);
+ ComputeMaskedBits(P->getIncomingValue(i), KnownZero2, KnownOne2, T=
D,
+ MaxDepth-1);
KnownZero &=3D KnownZero2;
KnownOne &=3D KnownOne2;
// If all bits have been ruled out, there's no need to check
@@ -673,10 +723,17 @@
if (IntrinsicInst *II =3D dyn_cast<IntrinsicInst>(I)) {
switch (II->getIntrinsicID()) {
default: break;
- case Intrinsic::ctpop:
case Intrinsic::ctlz:
case Intrinsic::cttz: {
unsigned LowBits =3D Log2_32(BitWidth)+1;
+ // If this call is undefined for 0, the result will be less than 2=
^n.
+ if (II->getArgOperand(1) =3D=3D ConstantInt::getTrue(II->getContex=
t()))
+ LowBits -=3D 1;
+ KnownZero =3D APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
+ break;
+ }
+ case Intrinsic::ctpop: {
+ unsigned LowBits =3D Log2_32(BitWidth)+1;
KnownZero =3D APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
break;
}
@@ -687,6 +744,34 @@
}
}
break;
+ case Instruction::ExtractValue:
+ if (IntrinsicInst *II =3D dyn_cast<IntrinsicInst>(I->getOperand(0))) {
+ ExtractValueInst *EVI =3D cast<ExtractValueInst>(I);
+ if (EVI->getNumIndices() !=3D 1) break;
+ if (EVI->getIndices()[0] =3D=3D 0) {
+ switch (II->getIntrinsicID()) {
+ default: break;
+ case Intrinsic::uadd_with_overflow:
+ case Intrinsic::sadd_with_overflow:
+ ComputeMaskedBitsAddSub(true, II->getArgOperand(0),
+ II->getArgOperand(1), false, KnownZero,
+ KnownOne, KnownZero2, KnownOne2, TD, Dep=
th);
+ break;
+ case Intrinsic::usub_with_overflow:
+ case Intrinsic::ssub_with_overflow:
+ ComputeMaskedBitsAddSub(false, II->getArgOperand(0),
+ II->getArgOperand(1), false, KnownZero,
+ KnownOne, KnownZero2, KnownOne2, TD, Dep=
th);
+ break;
+ case Intrinsic::umul_with_overflow:
+ case Intrinsic::smul_with_overflow:
+ ComputeMaskedBitsMul(II->getArgOperand(0), II->getArgOperand(1),
+ false, KnownZero, KnownOne,
+ KnownZero2, KnownOne2, TD, Depth);
+ break;
+ }
+ }
+ }
}
}
=20
@@ -702,8 +787,7 @@
}
APInt ZeroBits(BitWidth, 0);
APInt OneBits(BitWidth, 0);
- ComputeMaskedBits(V, APInt::getSignBit(BitWidth), ZeroBits, OneBits, TD,
- Depth);
+ ComputeMaskedBits(V, ZeroBits, OneBits, TD, Depth);
KnownOne =3D OneBits[BitWidth - 1];
KnownZero =3D ZeroBits[BitWidth - 1];
}
@@ -712,10 +796,15 @@
/// bit set when defined. For vectors return true if every element is know=
n to
/// be a power of two when defined. Supports values with integer or point=
er
/// types and vectors of integers.
-bool llvm::isPowerOfTwo(Value *V, const TargetData *TD, unsigned Depth) {
- if (ConstantInt *CI =3D dyn_cast<ConstantInt>(V))
- return CI->getValue().isPowerOf2();
- // TODO: Handle vector constants.
+bool llvm::isPowerOfTwo(Value *V, const TargetData *TD, bool OrZero,
+ unsigned Depth) {
+ if (Constant *C =3D dyn_cast<Constant>(V)) {
+ if (C->isNullValue())
+ return OrZero;
+ if (ConstantInt *CI =3D dyn_cast<ConstantInt>(C))
+ return CI->getValue().isPowerOf2();
+ // TODO: Handle vector constants.
+ }
=20
// 1 << X is clearly a power of two if the one is not shifted off the en=
d. If
// it is shifted off the end then the result is undefined.
@@ -731,21 +820,36 @@
if (Depth++ =3D=3D MaxDepth)
return false;
=20
+ Value *X =3D 0, *Y =3D 0;
+ // A shift of a power of two is a power of two or zero.
+ if (OrZero && (match(V, m_Shl(m_Value(X), m_Value())) ||
+ match(V, m_Shr(m_Value(X), m_Value()))))
+ return isPowerOfTwo(X, TD, /*OrZero*/true, Depth);
+
if (ZExtInst *ZI =3D dyn_cast<ZExtInst>(V))
- return isPowerOfTwo(ZI->getOperand(0), TD, Depth);
+ return isPowerOfTwo(ZI->getOperand(0), TD, OrZero, Depth);
=20
if (SelectInst *SI =3D dyn_cast<SelectInst>(V))
- return isPowerOfTwo(SI->getTrueValue(), TD, Depth) &&
- isPowerOfTwo(SI->getFalseValue(), TD, Depth);
+ return isPowerOfTwo(SI->getTrueValue(), TD, OrZero, Depth) &&
+ isPowerOfTwo(SI->getFalseValue(), TD, OrZero, Depth);
+
+ if (OrZero && match(V, m_And(m_Value(X), m_Value(Y)))) {
+ // A power of two and'd with anything is a power of two or zero.
+ if (isPowerOfTwo(X, TD, /*OrZero*/true, Depth) ||
+ isPowerOfTwo(Y, TD, /*OrZero*/true, Depth))
+ return true;
+ // X & (-X) is always a power of two or zero.
+ if (match(X, m_Neg(m_Specific(Y))) || match(Y, m_Neg(m_Specific(X))))
+ return true;
+ return false;
+ }
=20
// An exact divide or right shift can only shift off zero bits, so the r=
esult
// is a power of two only if the first operand is a power of two and not
// copying a sign bit (sdiv int_min, 2).
- if (match(V, m_LShr(m_Value(), m_Value())) ||
- match(V, m_UDiv(m_Value(), m_Value()))) {
- PossiblyExactOperator *PEO =3D cast<PossiblyExactOperator>(V);
- if (PEO->isExact())
- return isPowerOfTwo(PEO->getOperand(0), TD, Depth);
+ if (match(V, m_Exact(m_LShr(m_Value(), m_Value()))) ||
+ match(V, m_Exact(m_UDiv(m_Value(), m_Value())))) {
+ return isPowerOfTwo(cast<Operator>(V)->getOperand(0), TD, OrZero, Dept=
h);
}
=20
return false;
@@ -767,7 +871,7 @@
}
=20
// The remaining tests are all recursive, so bail out if we hit the limi=
t.
- if (Depth++ =3D=3D MaxDepth)
+ if (Depth++ >=3D MaxDepth)
return false;
=20
unsigned BitWidth =3D getBitWidth(V->getType(), TD);
@@ -785,13 +889,13 @@
// if the lowest bit is shifted off the end.
if (BitWidth && match(V, m_Shl(m_Value(X), m_Value(Y)))) {
// shl nuw can't remove any non-zero bits.
- BinaryOperator *BO =3D cast<BinaryOperator>(V);
+ OverflowingBinaryOperator *BO =3D cast<OverflowingBinaryOperator>(V);
if (BO->hasNoUnsignedWrap())
return isKnownNonZero(X, TD, Depth);
=20
APInt KnownZero(BitWidth, 0);
APInt KnownOne(BitWidth, 0);
- ComputeMaskedBits(X, APInt(BitWidth, 1), KnownZero, KnownOne, TD, Dept=
h);
+ ComputeMaskedBits(X, KnownZero, KnownOne, TD, Depth);
if (KnownOne[0])
return true;
}
@@ -799,7 +903,7 @@
// defined if the sign bit is shifted off the end.
else if (match(V, m_Shr(m_Value(X), m_Value(Y)))) {
// shr exact can only shift out zero bits.
- BinaryOperator *BO =3D cast<BinaryOperator>(V);
+ PossiblyExactOperator *BO =3D cast<PossiblyExactOperator>(V);
if (BO->isExact())
return isKnownNonZero(X, TD, Depth);
=20
@@ -809,10 +913,8 @@
return true;
}
// div exact can only produce a zero if the dividend is zero.
- else if (match(V, m_IDiv(m_Value(X), m_Value()))) {
- BinaryOperator *BO =3D cast<BinaryOperator>(V);
- if (BO->isExact())
- return isKnownNonZero(X, TD, Depth);
+ else if (match(V, m_Exact(m_IDiv(m_Value(X), m_Value())))) {
+ return isKnownNonZero(X, TD, Depth);
}
// X + Y.
else if (match(V, m_Add(m_Value(X), m_Value(Y)))) {
@@ -835,20 +937,29 @@
APInt Mask =3D APInt::getSignedMaxValue(BitWidth);
// The sign bit of X is set. If some other bit is set then X is not=
equal
// to INT_MIN.
- ComputeMaskedBits(X, Mask, KnownZero, KnownOne, TD, Depth);
+ ComputeMaskedBits(X, KnownZero, KnownOne, TD, Depth);
if ((KnownOne & Mask) !=3D 0)
return true;
// The sign bit of Y is set. If some other bit is set then Y is not=
equal
// to INT_MIN.
- ComputeMaskedBits(Y, Mask, KnownZero, KnownOne, TD, Depth);
+ ComputeMaskedBits(Y, KnownZero, KnownOne, TD, Depth);
if ((KnownOne & Mask) !=3D 0)
return true;
}
=20
// The sum of a non-negative number and a power of two is not zero.
- if (XKnownNonNegative && isPowerOfTwo(Y, TD, Depth))
+ if (XKnownNonNegative && isPowerOfTwo(Y, TD, /*OrZero*/false, Depth))
return true;
- if (YKnownNonNegative && isPowerOfTwo(X, TD, Depth))
+ if (YKnownNonNegative && isPowerOfTwo(X, TD, /*OrZero*/false, Depth))
+ return true;
+ }
+ // X * Y.
+ else if (match(V, m_Mul(m_Value(X), m_Value(Y)))) {
+ OverflowingBinaryOperator *BO =3D cast<OverflowingBinaryOperator>(V);
+ // If X and Y are non-zero then so is X * Y as long as the multiplicat=
ion
+ // does not overflow.
+ if ((BO->hasNoSignedWrap() || BO->hasNoUnsignedWrap()) &&
+ isKnownNonZero(X, TD, Depth) && isKnownNonZero(Y, TD, Depth))
return true;
}
// (C ? X : Y) !=3D 0 if X !=3D 0 and Y !=3D 0.
@@ -861,8 +972,7 @@
if (!BitWidth) return false;
APInt KnownZero(BitWidth, 0);
APInt KnownOne(BitWidth, 0);
- ComputeMaskedBits(V, APInt::getAllOnesValue(BitWidth), KnownZero, KnownO=
ne,
- TD, Depth);
+ ComputeMaskedBits(V, KnownZero, KnownOne, TD, Depth);
return KnownOne !=3D 0;
}
=20
@@ -878,7 +988,7 @@
bool llvm::MaskedValueIsZero(Value *V, const APInt &Mask,
const TargetData *TD, unsigned Depth) {
APInt KnownZero(Mask.getBitWidth(), 0), KnownOne(Mask.getBitWidth(), 0);
- ComputeMaskedBits(V, Mask, KnownZero, KnownOne, TD, Depth);
+ ComputeMaskedBits(V, KnownZero, KnownOne, TD, Depth);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND zero=
?");=20
return (KnownZero & Mask) =3D=3D Mask;
}
@@ -917,30 +1027,28 @@
Tmp =3D TyBits - U->getOperand(0)->getType()->getScalarSizeInBits();
return ComputeNumSignBits(U->getOperand(0), TD, Depth+1) + Tmp;
=20
- case Instruction::AShr:
+ case Instruction::AShr: {
Tmp =3D ComputeNumSignBits(U->getOperand(0), TD, Depth+1);
- // ashr X, C -> adds C sign bits.
- if (ConstantInt *C =3D dyn_cast<ConstantInt>(U->getOperand(1))) {
- Tmp +=3D C->getZExtValue();
+ // ashr X, C -> adds C sign bits. Vectors too.
+ const APInt *ShAmt;
+ if (match(U->getOperand(1), m_APInt(ShAmt))) {
+ Tmp +=3D ShAmt->getZExtValue();
if (Tmp > TyBits) Tmp =3D TyBits;
}
- // vector ashr X, <C, C, C, C> -> adds C sign bits
- if (ConstantVector *C =3D dyn_cast<ConstantVector>(U->getOperand(1))) {
- if (ConstantInt *CI =3D dyn_cast_or_null<ConstantInt>(C->getSplatVal=
ue())) {
- Tmp +=3D CI->getZExtValue();
- if (Tmp > TyBits) Tmp =3D TyBits;
- }
- }
return Tmp;
- case Instruction::Shl:
- if (ConstantInt *C =3D dyn_cast<ConstantInt>(U->getOperand(1))) {
+ }
+ case Instruction::Shl: {
+ const APInt *ShAmt;
+ if (match(U->getOperand(1), m_APInt(ShAmt))) {
// shl destroys sign bits.
Tmp =3D ComputeNumSignBits(U->getOperand(0), TD, Depth+1);
- if (C->getZExtValue() >=3D TyBits || // Bad shift.
- C->getZExtValue() >=3D Tmp) break; // Shifted all sign bits o=
ut.
- return Tmp - C->getZExtValue();
+ Tmp2 =3D ShAmt->getZExtValue();
+ if (Tmp2 >=3D TyBits || // Bad shift.
+ Tmp2 >=3D Tmp) break; // Shifted all sign bits out.
+ return Tmp - Tmp2;
}
break;
+ }
case Instruction::And:
case Instruction::Or:
case Instruction::Xor: // NOT is handled here.
@@ -971,13 +1079,11 @@
if (ConstantInt *CRHS =3D dyn_cast<ConstantInt>(U->getOperand(1)))
if (CRHS->isAllOnesValue()) {
APInt KnownZero(TyBits, 0), KnownOne(TyBits, 0);
- APInt Mask =3D APInt::getAllOnesValue(TyBits);
- ComputeMaskedBits(U->getOperand(0), Mask, KnownZero, KnownOne, TD,
- Depth+1);
+ ComputeMaskedBits(U->getOperand(0), KnownZero, KnownOne, TD, Depth=
+1);
=20
// If the input is known to be 0 or 1, the output is 0/-1, which i=
s all
// sign bits set.
- if ((KnownZero | APInt(TyBits, 1)) =3D=3D Mask)
+ if ((KnownZero | APInt(TyBits, 1)).isAllOnesValue())
return TyBits;
=20
// If we are subtracting one from a positive number, there is no c=
arry
@@ -998,12 +1104,10 @@
if (ConstantInt *CLHS =3D dyn_cast<ConstantInt>(U->getOperand(0)))
if (CLHS->isNullValue()) {
APInt KnownZero(TyBits, 0), KnownOne(TyBits, 0);
- APInt Mask =3D APInt::getAllOnesValue(TyBits);
- ComputeMaskedBits(U->getOperand(1), Mask, KnownZero, KnownOne,=20
- TD, Depth+1);
+ ComputeMaskedBits(U->getOperand(1), KnownZero, KnownOne, TD, Depth=
+1);
// If the input is known to be 0 or 1, the output is 0/-1, which i=
s all
// sign bits set.
- if ((KnownZero | APInt(TyBits, 1)) =3D=3D Mask)
+ if ((KnownZero | APInt(TyBits, 1)).isAllOnesValue())
return TyBits;
=20
// If the input is known to be positive (the sign bit is known cle=
ar),
@@ -1045,8 +1149,8 @@
// Finally, if we can prove that the top bits of the result are 0's or 1=
's,
// use this information.
APInt KnownZero(TyBits, 0), KnownOne(TyBits, 0);
- APInt Mask =3D APInt::getAllOnesValue(TyBits);
- ComputeMaskedBits(V, Mask, KnownZero, KnownOne, TD, Depth);
+ APInt Mask;
+ ComputeMaskedBits(V, KnownZero, KnownOne, TD, Depth);
=20
if (KnownZero.isNegative()) { // sign bit is 0
Mask =3D KnownZero;
@@ -1282,23 +1386,21 @@
}
}
=20
- // A ConstantArray is splatable if all its members are equal and also
- // splatable.
- if (ConstantArray *CA =3D dyn_cast<ConstantArray>(V)) {
- if (CA->getNumOperands() =3D=3D 0)
- return 0;
- =20
- Value *Val =3D isBytewiseValue(CA->getOperand(0));
+ // A ConstantDataArray/Vector is splatable if all its members are equal =
and
+ // also splatable.
+ if (ConstantDataSequential *CA =3D dyn_cast<ConstantDataSequential>(V)) {
+ Value *Elt =3D CA->getElementAsConstant(0);
+ Value *Val =3D isBytewiseValue(Elt);
if (!Val)
return 0;
=20
- for (unsigned I =3D 1, E =3D CA->getNumOperands(); I !=3D E; ++I)
- if (CA->getOperand(I-1) !=3D CA->getOperand(I))
+ for (unsigned I =3D 1, E =3D CA->getNumElements(); I !=3D E; ++I)
+ if (CA->getElementAsConstant(I) !=3D Elt)
return 0;
=20
return Val;
}
- =20
+
// Conceptually, we could handle things like:
// %a =3D zext i8 %X to i16
// %b =3D shl i16 %a, 8
@@ -1395,50 +1497,44 @@
Value *llvm::FindInsertedValue(Value *V, ArrayRef<unsigned> idx_range,
Instruction *InsertBefore) {
// Nothing to index? Just return V then (this is useful at the end of our
- // recursion)
+ // recursion).
if (idx_range.empty())
return V;
- // We have indices, so V should have an indexable type
- assert((V->getType()->isStructTy() || V->getType()->isArrayTy())
- && "Not looking at a struct or array?");
- assert(ExtractValueInst::getIndexedType(V->getType(), idx_range)
- && "Invalid indices for type?");
- CompositeType *PTy =3D cast<CompositeType>(V->getType());
+ // We have indices, so V should have an indexable type.
+ assert((V->getType()->isStructTy() || V->getType()->isArrayTy()) &&
+ "Not looking at a struct or array?");
+ assert(ExtractValueInst::getIndexedType(V->getType(), idx_range) &&
+ "Invalid indices for type?");
=20
- if (isa<UndefValue>(V))
- return UndefValue::get(ExtractValueInst::getIndexedType(PTy,
- idx_range));
- else if (isa<ConstantAggregateZero>(V))
- return Constant::getNullValue(ExtractValueInst::getIndexedType(PTy,=20
- idx_rang=
e));
- else if (Constant *C =3D dyn_cast<Constant>(V)) {
- if (isa<ConstantArray>(C) || isa<ConstantStruct>(C))
- // Recursively process this constant
- return FindInsertedValue(C->getOperand(idx_range[0]), idx_range.slic=
e(1),
- InsertBefore);
- } else if (InsertValueInst *I =3D dyn_cast<InsertValueInst>(V)) {
+ if (Constant *C =3D dyn_cast<Constant>(V)) {
+ C =3D C->getAggregateElement(idx_range[0]);
+ if (C =3D=3D 0) return 0;
+ return FindInsertedValue(C, idx_range.slice(1), InsertBefore);
+ }
+ =20
+ if (InsertValueInst *I =3D dyn_cast<InsertValueInst>(V)) {
// Loop the indices for the insertvalue instruction in parallel with t=
he
// requested indices
const unsigned *req_idx =3D idx_range.begin();
for (const unsigned *i =3D I->idx_begin(), *e =3D I->idx_end();
i !=3D e; ++i, ++req_idx) {
if (req_idx =3D=3D idx_range.end()) {
- if (InsertBefore)
- // The requested index identifies a part of a nested aggregate. =
Handle
- // this specially. For example,
- // %A =3D insertvalue { i32, {i32, i32 } } undef, i32 10, 1, 0
- // %B =3D insertvalue { i32, {i32, i32 } } %A, i32 11, 1, 1
- // %C =3D extractvalue {i32, { i32, i32 } } %B, 1
- // This can be changed into
- // %A =3D insertvalue {i32, i32 } undef, i32 10, 0
- // %C =3D insertvalue {i32, i32 } %A, i32 11, 1
- // which allows the unused 0,0 element from the nested struct to=
be
- // removed.
- return BuildSubAggregate(V, makeArrayRef(idx_range.begin(), req_=
idx),
- InsertBefore);
- else
- // We can't handle this without inserting insertvalues
+ // We can't handle this without inserting insertvalues
+ if (!InsertBefore)
return 0;
+
+ // The requested index identifies a part of a nested aggregate. Ha=
ndle
+ // this specially. For example,
+ // %A =3D insertvalue { i32, {i32, i32 } } undef, i32 10, 1, 0
+ // %B =3D insertvalue { i32, {i32, i32 } } %A, i32 11, 1, 1
+ // %C =3D extractvalue {i32, { i32, i32 } } %B, 1
+ // This can be changed into
+ // %A =3D insertvalue {i32, i32 } undef, i32 10, 0
+ // %C =3D insertvalue {i32, i32 } %A, i32 11, 1
+ // which allows the unused 0,0 element from the nested struct to be
+ // removed.
+ return BuildSubAggregate(V, makeArrayRef(idx_range.begin(), req_id=
x),
+ InsertBefore);
}
=20
// This insert value inserts something else than what we are looking=
for.
@@ -1454,7 +1550,9 @@
return FindInsertedValue(I->getInsertedValueOperand(),
makeArrayRef(req_idx, idx_range.end()),
InsertBefore);
- } else if (ExtractValueInst *I =3D dyn_cast<ExtractValueInst>(V)) {
+ }
+ =20
+ if (ExtractValueInst *I =3D dyn_cast<ExtractValueInst>(V)) {
// If we're extracting a value from an aggregrate that was extracted f=
rom
// something else, we can extract from that something else directly in=
stead.
// However, we will need to chain I's indices with the requested indic=
es.
@@ -1486,7 +1584,8 @@
Value *llvm::GetPointerBaseWithConstantOffset(Value *Ptr, int64_t &Offset,
const TargetData &TD) {
Operator *PtrOp =3D dyn_cast<Operator>(Ptr);
- if (PtrOp =3D=3D 0) return Ptr;
+ if (PtrOp =3D=3D 0 || Ptr->getType()->isVectorTy())
+ return Ptr;
=20
// Just look through bitcasts.
if (PtrOp->getOpcode() =3D=3D Instruction::BitCast)
@@ -1521,34 +1620,19 @@
}
=20
=20
-/// GetConstantStringInfo - This function computes the length of a
+/// getConstantStringInfo - This function computes the length of a
/// null-terminated C string pointed to by V. If successful, it returns t=
rue
/// and returns the string in Str. If unsuccessful, it returns false.
-bool llvm::GetConstantStringInfo(const Value *V, std::string &Str,
- uint64_t Offset,
- bool StopAtNul) {
- // If V is NULL then return false;
- if (V =3D=3D NULL) return false;
+bool llvm::getConstantStringInfo(const Value *V, StringRef &Str,
+ uint64_t Offset, bool TrimAtNul) {
+ assert(V);
=20
- // Look through bitcast instructions.
- if (const BitCastInst *BCI =3D dyn_cast<BitCastInst>(V))
- return GetConstantStringInfo(BCI->getOperand(0), Str, Offset, StopAtNu=
l);
+ // Look through bitcast instructions and geps.
+ V =3D V->stripPointerCasts();
=20
- // If the value is not a GEP instruction nor a constant expression with a
- // GEP instruction, then return false because ConstantArray can't occur
- // any other way
- const User *GEP =3D 0;
- if (const GetElementPtrInst *GEPI =3D dyn_cast<GetElementPtrInst>(V)) {
- GEP =3D GEPI;
- } else if (const ConstantExpr *CE =3D dyn_cast<ConstantExpr>(V)) {
- if (CE->getOpcode() =3D=3D Instruction::BitCast)
- return GetConstantStringInfo(CE->getOperand(0), Str, Offset, StopAtN=
ul);
- if (CE->getOpcode() !=3D Instruction::GetElementPtr)
- return false;
- GEP =3D CE;
- }
- =20
- if (GEP) {
+ // If the value is a GEP instructionor constant expression, treat it as=
an
+ // offset.
+ if (const GEPOperator *GEP =3D dyn_cast<GEPOperator>(V)) {
// Make sure the GEP has exactly three arguments.
if (GEP->getNumOperands() !=3D 3)
return false;
@@ -1573,51 +1657,48 @@
StartIdx =3D CI->getZExtValue();
else
return false;
- return GetConstantStringInfo(GEP->getOperand(0), Str, StartIdx+Offset,
- StopAtNul);
+ return getConstantStringInfo(GEP->getOperand(0), Str, StartIdx+Offset);
}
- =20
+
// The GEP instruction, constant or instruction, must reference a global
// variable that is a constant and is initialized. The referenced consta=
nt
// initializer is the array that we'll use for optimization.
- const GlobalVariable* GV =3D dyn_cast<GlobalVariable>(V);
+ const GlobalVariable *GV =3D dyn_cast<GlobalVariable>(V);
if (!GV || !GV->isConstant() || !GV->hasDefinitiveInitializer())
return false;
- const Constant *GlobalInit =3D GV->getInitializer();
- =20
- // Handle the ConstantAggregateZero case
- if (isa<ConstantAggregateZero>(GlobalInit)) {
+
+ // Handle the all-zeros case
+ if (GV->getInitializer()->isNullValue()) {
// This is a degenerate case. The initializer is constant zero so the
// length of the string must be zero.
- Str.clear();
+ Str =3D "";
return true;
}
=20
// Must be a Constant Array
- const ConstantArray *Array =3D dyn_cast<ConstantArray>(GlobalInit);
- if (Array =3D=3D 0 || !Array->getType()->getElementType()->isIntegerTy(8=
))
+ const ConstantDataArray *Array =3D
+ dyn_cast<ConstantDataArray>(GV->getInitializer());
+ if (Array =3D=3D 0 || !Array->isString())
return false;
=20
// Get the number of elements in the array
- uint64_t NumElts =3D Array->getType()->getNumElements();
- =20
+ uint64_t NumElts =3D Array->getType()->getArrayNumElements();
+
+ // Start out with the entire array in the StringRef.
+ Str =3D Array->getAsString();
+
if (Offset > NumElts)
return false;
=20
- // Traverse the constant array from 'Offset' which is the place the GEP =
refers
- // to in the array.
- Str.reserve(NumElts-Offset);
- for (unsigned i =3D Offset; i !=3D NumElts; ++i) {
- const Constant *Elt =3D Array->getOperand(i);
- const ConstantInt *CI =3D dyn_cast<ConstantInt>(Elt);
- if (!CI) // This array isn't suitable, non-int initializer.
- return false;
- if (StopAtNul && CI->isZero())
- return true; // we found end of string, success!
- Str +=3D (char)CI->getZExtValue();
+ // Skip over 'offset' bytes.
+ Str =3D Str.substr(Offset);
+ =20
+ if (TrimAtNul) {
+ // Trim off the \0 and anything after it. If the array is not nul
+ // terminated, we just return the whole end of string. The client may=
know
+ // some other way that the string is length-bound.
+ Str =3D Str.substr(0, Str.find('\0'));
}
- =20
- // The array isn't null terminated, but maybe this is a memcpy, not a st=
rcpy.
return true;
}
=20
@@ -1629,8 +1710,7 @@
/// the specified pointer, return 'len+1'. If we can't, return 0.
static uint64_t GetStringLengthH(Value *V, SmallPtrSet<PHINode*, 32> &PHIs=
) {
// Look through noop bitcast instructions.
- if (BitCastInst *BCI =3D dyn_cast<BitCastInst>(V))
- return GetStringLengthH(BCI->getOperand(0), PHIs);
+ V =3D V->stripPointerCasts();
=20
// If this is a PHI node, there are two cases: either we have already se=
en it
// or we haven't.
@@ -1666,75 +1746,13 @@
if (Len1 !=3D Len2) return 0;
return Len1;
}
-
- // If the value is not a GEP instruction nor a constant expression with a
- // GEP instruction, then return unknown.
- User *GEP =3D 0;
- if (GetElementPtrInst *GEPI =3D dyn_cast<GetElementPtrInst>(V)) {
- GEP =3D GEPI;
- } else if (ConstantExpr *CE =3D dyn_cast<ConstantExpr>(V)) {
- if (CE->getOpcode() !=3D Instruction::GetElementPtr)
- return 0;
- GEP =3D CE;
- } else {
- return 0;
- }
-
- // Make sure the GEP has exactly three arguments.
- if (GEP->getNumOperands() !=3D 3)
+ =20
+ // Otherwise, see if we can read the string.
+ StringRef StrData;
+ if (!getConstantStringInfo(V, StrData))
return 0;
=20
- // Check to make sure that the first operand of the GEP is an integer and
- // has value 0 so that we are sure we're indexing into the initializer.
- if (ConstantInt *Idx =3D dyn_cast<ConstantInt>(GEP->getOperand(1))) {
- if (!Idx->isZero())
- return 0;
- } else
- return 0;
-
- // If the second index isn't a ConstantInt, then this is a variable index
- // into the array. If this occurs, we can't say anything meaningful abo=
ut
- // the string.
- uint64_t StartIdx =3D 0;
- if (ConstantInt *CI =3D dyn_cast<ConstantInt>(GEP->getOperand(2)))
- StartIdx =3D CI->getZExtValue();
- else
- return 0;
-
- // The GEP instruction, constant or instruction, must reference a global
- // variable that is a constant and is initialized. The referenced consta=
nt
- // initializer is the array that we'll use for optimization.
- GlobalVariable* GV =3D dyn_cast<GlobalVariable>(GEP->getOperand(0));
- if (!GV || !GV->isConstant() || !GV->hasInitializer() ||
- GV->mayBeOverridden())
- return 0;
- Constant *GlobalInit =3D GV->getInitializer();
-
- // Handle the ConstantAggregateZero case, which is a degenerate case. The
- // initializer is constant zero so the length of the string must be zero.
- if (isa<ConstantAggregateZero>(GlobalInit))
- return 1; // Len =3D 0 offset by 1.
-
- // Must be a Constant Array
- ConstantArray *Array =3D dyn_cast<ConstantArray>(GlobalInit);
- if (!Array || !Array->getType()->getElementType()->isIntegerTy(8))
- return false;
-
- // Get the number of elements in the array
- uint64_t NumElts =3D Array->getType()->getNumElements();
-
- // Traverse the constant array from StartIdx (derived above) which is
- // the place the GEP refers to in the array.
- for (unsigned i =3D StartIdx; i !=3D NumElts; ++i) {
- Constant *Elt =3D Array->getOperand(i);
- ConstantInt *CI =3D dyn_cast<ConstantInt>(Elt);
- if (!CI) // This array isn't suitable, non-int initializer.
- return 0;
- if (CI->isZero())
- return i-StartIdx+1; // We found end of string, success!
- }
-
- return 0; // The array isn't null terminated, conservatively return 'unk=
nown'.
+ return StrData.size()+1;
}
=20
/// GetStringLength - If we can compute the length of the string pointed t=
o by
@@ -1793,3 +1811,94 @@
}
return true;
}
+
+bool llvm::isSafeToSpeculativelyExecute(const Value *V,
+ const TargetData *TD) {
+ const Operator *Inst =3D dyn_cast<Operator>(V);
+ if (!Inst)
+ return false;
+
+ for (unsigned i =3D 0, e =3D Inst->getNumOperands(); i !=3D e; ++i)
+ if (Constant *C =3D dyn_cast<Constant>(Inst->getOperand(i)))
+ if (C->canTrap())
+ return false;
+
+ switch (Inst->getOpcode()) {
+ default:
+ return true;
+ case Instruction::UDiv:
+ case Instruction::URem:
+ // x / y is undefined if y =3D=3D 0, but calcuations like x / 3 are sa=
fe.
+ return isKnownNonZero(Inst->getOperand(1), TD);
+ case Instruction::SDiv:
+ case Instruction::SRem: {
+ Value *Op =3D Inst->getOperand(1);
+ // x / y is undefined if y =3D=3D 0
+ if (!isKnownNonZero(Op, TD))
+ return false;
+ // x / y might be undefined if y =3D=3D -1
+ unsigned BitWidth =3D getBitWidth(Op->getType(), TD);
+ if (BitWidth =3D=3D 0)
+ return false;
+ APInt KnownZero(BitWidth, 0);
+ APInt KnownOne(BitWidth, 0);
+ ComputeMaskedBits(Op, KnownZero, KnownOne, TD);
+ return !!KnownZero;
+ }
+ case Instruction::Load: {
+ const LoadInst *LI =3D cast<LoadInst>(Inst);
+ if (!LI->isUnordered())
+ return false;
+ return LI->getPointerOperand()->isDereferenceablePointer();
+ }
+ case Instruction::Call: {
+ if (const IntrinsicInst *II =3D dyn_cast<IntrinsicInst>(Inst)) {
+ switch (II->getIntrinsicID()) {
+ // These synthetic intrinsics have no side-effects, and just mark
+ // information about their operands.
+ // FIXME: There are other no-op synthetic instructions that potenti=
ally
+ // should be considered at least *safe* to speculate...
+ case Intrinsic::dbg_declare:
+ case Intrinsic::dbg_value:
+ return true;
+
+ case Intrinsic::bswap:
+ case Intrinsic::ctlz:
+ case Intrinsic::ctpop:
+ case Intrinsic::cttz:
+ case Intrinsic::objectsize:
+ case Intrinsic::sadd_with_overflow:
+ case Intrinsic::smul_with_overflow:
+ case Intrinsic::ssub_with_overflow:
+ case Intrinsic::uadd_with_overflow:
+ case Intrinsic::umul_with_overflow:
+ case Intrinsic::usub_with_overflow:
+ return true;
+ // TODO: some fp intrinsics are marked as having the same error han=
dling
+ // as libm. They're safe to speculate when they won't error.
+ // TODO: are convert_{from,to}_fp16 safe?
+ // TODO: can we list target-specific intrinsics here?
+ default: break;
+ }
+ }
+ return false; // The called function could have undefined behavior or
+ // side-effects, even if marked readnone nounwind.
+ }
+ case Instruction::VAArg:
+ case Instruction::Alloca:
+ case Instruction::Invoke:
+ case Instruction::PHI:
+ case Instruction::Store:
+ case Instruction::Ret:
+ case Instruction::Br:
+ case Instruction::IndirectBr:
+ case Instruction::Switch:
+ case Instruction::Unreachable:
+ case Instruction::Fence:
+ case Instruction::LandingPad:
+ case Instruction::AtomicRMW:
+ case Instruction::AtomicCmpXchg:
+ case Instruction::Resume:
+ return false; // Misc instructions which have effects
+ }
+}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Archive/ArchiveR=
eader.cpp
--- a/head/contrib/llvm/lib/Archive/ArchiveReader.cpp Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/lib/Archive/ArchiveReader.cpp Tue Apr 17 11:51:51 2=
012 +0300
@@ -12,9 +12,11 @@
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
#include "ArchiveInternals.h"
+#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/Bitcode/ReaderWriter.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Module.h"
+#include <cstdio>
#include <cstdlib>
#include <memory>
using namespace llvm;
@@ -504,7 +506,7 @@
// Modules that define those symbols.
bool
Archive::findModulesDefiningSymbols(std::set<std::string>& symbols,
- std::set<Module*>& result,
+ SmallVectorImpl<Module*>& result,
std::string* error) {
if (!mapfile || !base) {
if (error)
@@ -569,21 +571,26 @@
// At this point we have a valid symbol table (one way or another) so we
// just use it to quickly find the symbols requested.
=20
+ SmallPtrSet<Module*, 16> Added;
for (std::set<std::string>::iterator I=3Dsymbols.begin(),
- E=3Dsymbols.end(); I !=3D E;) {
+ Next =3D I,
+ E=3Dsymbols.end(); I !=3D E; I =3D Next) {
+ // Increment Next before we invalidate it.
+ ++Next;
+
// See if this symbol exists
Module* m =3D findModuleDefiningSymbol(*I,error);
- if (m) {
- // The symbol exists, insert the Module into our result, duplicates =
will
- // be ignored.
- result.insert(m);
+ if (!m)
+ continue;
+ bool NewMember =3D Added.insert(m);
+ if (!NewMember)
+ continue;
=20
- // Remove the symbol now that its been resolved, being careful to
- // post-increment the iterator.
- symbols.erase(I++);
- } else {
- ++I;
- }
+ // The symbol exists, insert the Module into our result.
+ result.push_back(m);
+
+ // Remove the symbol now that its been resolved.
+ symbols.erase(I);
}
return true;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Archive/ArchiveW=
riter.cpp
--- a/head/contrib/llvm/lib/Archive/ArchiveWriter.cpp Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/lib/Archive/ArchiveWriter.cpp Tue Apr 17 11:51:51 2=
012 +0300
@@ -182,11 +182,11 @@
if (hasSlash || filePath.str().length() > 15)
flags |=3D ArchiveMember::HasLongFilenameFlag;
=20
- sys::LLVMFileType type;
+ sys::fs::file_magic type;
if (sys::fs::identify_magic(mbr->path.str(), type))
- type =3D sys::Unknown_FileType;
+ type =3D sys::fs::file_magic::unknown;
switch (type) {
- case sys::Bitcode_FileType:
+ case sys::fs::file_magic::bitcode:
flags |=3D ArchiveMember::BitcodeFlag;
break;
default:
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/AsmParser/LLLexe=
r.cpp
--- a/head/contrib/llvm/lib/AsmParser/LLLexer.cpp Tue Apr 17 11:36:47 2012 =
+0300
+++ b/head/contrib/llvm/lib/AsmParser/LLLexer.cpp Tue Apr 17 11:51:51 2012 =
+0300
@@ -29,7 +29,7 @@
using namespace llvm;
=20
bool LLLexer::Error(LocTy ErrorLoc, const Twine &Msg) const {
- ErrorInfo =3D SM.GetMessage(ErrorLoc, Msg, "error");
+ ErrorInfo =3D SM.GetMessage(ErrorLoc, SourceMgr::DK_Error, Msg);
return true;
}
=20
@@ -55,18 +55,22 @@
return Result;
}
=20
+static char parseHexChar(char C) {
+ if (C >=3D '0' && C <=3D '9')
+ return C-'0';
+ if (C >=3D 'A' && C <=3D 'F')
+ return C-'A'+10;
+ if (C >=3D 'a' && C <=3D 'f')
+ return C-'a'+10;
+ return 0;
+}
+
uint64_t LLLexer::HexIntToVal(const char *Buffer, const char *End) {
uint64_t Result =3D 0;
for (; Buffer !=3D End; ++Buffer) {
uint64_t OldRes =3D Result;
Result *=3D 16;
- char C =3D *Buffer;
- if (C >=3D '0' && C <=3D '9')
- Result +=3D C-'0';
- else if (C >=3D 'A' && C <=3D 'F')
- Result +=3D C-'A'+10;
- else if (C >=3D 'a' && C <=3D 'f')
- Result +=3D C-'a'+10;
+ Result +=3D parseHexChar(*Buffer);
=20
if (Result < OldRes) { // Uh, oh, overflow detected!!!
Error("constant bigger than 64 bits detected!");
@@ -82,24 +86,12 @@
for (int i=3D0; i<16; i++, Buffer++) {
assert(Buffer !=3D End);
Pair[0] *=3D 16;
- char C =3D *Buffer;
- if (C >=3D '0' && C <=3D '9')
- Pair[0] +=3D C-'0';
- else if (C >=3D 'A' && C <=3D 'F')
- Pair[0] +=3D C-'A'+10;
- else if (C >=3D 'a' && C <=3D 'f')
- Pair[0] +=3D C-'a'+10;
+ Pair[0] +=3D parseHexChar(*Buffer);
}
Pair[1] =3D 0;
for (int i=3D0; i<16 && Buffer !=3D End; i++, Buffer++) {
Pair[1] *=3D 16;
- char C =3D *Buffer;
- if (C >=3D '0' && C <=3D '9')
- Pair[1] +=3D C-'0';
- else if (C >=3D 'A' && C <=3D 'F')
- Pair[1] +=3D C-'A'+10;
- else if (C >=3D 'a' && C <=3D 'f')
- Pair[1] +=3D C-'a'+10;
+ Pair[1] +=3D parseHexChar(*Buffer);
}
if (Buffer !=3D End)
Error("constant bigger than 128 bits detected!");
@@ -113,24 +105,12 @@
for (int i=3D0; i<4 && Buffer !=3D End; i++, Buffer++) {
assert(Buffer !=3D End);
Pair[1] *=3D 16;
- char C =3D *Buffer;
- if (C >=3D '0' && C <=3D '9')
- Pair[1] +=3D C-'0';
- else if (C >=3D 'A' && C <=3D 'F')
- Pair[1] +=3D C-'A'+10;
- else if (C >=3D 'a' && C <=3D 'f')
- Pair[1] +=3D C-'a'+10;
+ Pair[1] +=3D parseHexChar(*Buffer);
}
Pair[0] =3D 0;
for (int i=3D0; i<16; i++, Buffer++) {
Pair[0] *=3D 16;
- char C =3D *Buffer;
- if (C >=3D '0' && C <=3D '9')
- Pair[0] +=3D C-'0';
- else if (C >=3D 'A' && C <=3D 'F')
- Pair[0] +=3D C-'A'+10;
- else if (C >=3D 'a' && C <=3D 'f')
- Pair[0] +=3D C-'a'+10;
+ Pair[0] +=3D parseHexChar(*Buffer);
}
if (Buffer !=3D End)
Error("constant bigger than 128 bits detected!");
@@ -149,9 +129,7 @@
*BOut++ =3D '\\'; // Two \ becomes one
BIn +=3D 2;
} else if (BIn < EndBuffer-2 && isxdigit(BIn[1]) && isxdigit(BIn[2])=
) {
- char Tmp =3D BIn[3]; BIn[3] =3D 0; // Terminate string
- *BOut =3D (char)strtol(BIn+1, 0, 16); // Convert to number
- BIn[3] =3D Tmp; // Restore character
+ *BOut =3D parseHexChar(BIn[1]) * 16 + parseHexChar(BIn[2]);
BIn +=3D 3; // Skip over handled chars
++BOut;
} else {
@@ -503,6 +481,7 @@
KEYWORD(tail);
KEYWORD(target);
KEYWORD(triple);
+ KEYWORD(unwind);
KEYWORD(deplibs);
KEYWORD(datalayout);
KEYWORD(volatile);
@@ -570,6 +549,7 @@
KEYWORD(noimplicitfloat);
KEYWORD(naked);
KEYWORD(nonlazybind);
+ KEYWORD(address_safety);
=20
KEYWORD(type);
KEYWORD(opaque);
@@ -596,6 +576,7 @@
if (Len =3D=3D strlen(STR) && !memcmp(StartChar, STR, strlen(STR))) { \
TyVal =3D LLVMTY; return lltok::Type; }
TYPEKEYWORD("void", Type::getVoidTy(Context));
+ TYPEKEYWORD("half", Type::getHalfTy(Context));
TYPEKEYWORD("float", Type::getFloatTy(Context));
TYPEKEYWORD("double", Type::getDoubleTy(Context));
TYPEKEYWORD("x86_fp80", Type::getX86_FP80Ty(Context));
@@ -642,7 +623,6 @@
INSTKEYWORD(indirectbr, IndirectBr);
INSTKEYWORD(invoke, Invoke);
INSTKEYWORD(resume, Resume);
- INSTKEYWORD(unwind, Unwind);
INSTKEYWORD(unreachable, Unreachable);
=20
INSTKEYWORD(alloca, Alloca);
@@ -715,7 +695,7 @@
if (Kind =3D=3D 'J') {
// HexFPConstant - Floating point constant represented in IEEE format =
as a
// hexadecimal number for when exponential notation is not precise eno=
ugh.
- // Float and double only.
+ // Half, Float, and double only.
APFloatVal =3D APFloat(BitsToDouble(HexIntToVal(TokStart+2, CurPtr)));
return lltok::APFloat;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/AsmParser/LLLexe=
r.h
--- a/head/contrib/llvm/lib/AsmParser/LLLexer.h Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/llvm/lib/AsmParser/LLLexer.h Tue Apr 17 11:51:51 2012 +0=
300
@@ -42,7 +42,6 @@
APFloat APFloatVal;
APSInt APSIntVal;
=20
- std::string TheError;
public:
explicit LLLexer(MemoryBuffer *StartBuf, SourceMgr &SM, SMDiagnostic &,
LLVMContext &C);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/AsmParser/LLPars=
er.cpp
--- a/head/contrib/llvm/lib/AsmParser/LLParser.cpp Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/lib/AsmParser/LLParser.cpp Tue Apr 17 11:51:51 2012=
+0300
@@ -120,11 +120,6 @@
for (Module::iterator FI =3D M->begin(), FE =3D M->end(); FI !=3D FE; )
UpgradeCallsToIntrinsic(FI++); // must be post-increment, as we remove
=20
- // Upgrade to new EH scheme. N.B. This will go away in 3.1.
- UpgradeExceptionHandling(M);
-
- // Check debug info intrinsics.
- CheckDebugInfoIntrinsics(M);
return false;
}
=20
@@ -879,7 +874,7 @@
/// ParseOptionalAttrs - Parse a potentially empty attribute list. AttrKi=
nd
/// indicates what kind of attribute list this is: 0: function arg, 1: res=
ult,
/// 2: function attr.
-bool LLParser::ParseOptionalAttrs(unsigned &Attrs, unsigned AttrKind) {
+bool LLParser::ParseOptionalAttrs(Attributes &Attrs, unsigned AttrKind) {
Attrs =3D Attribute::None;
LocTy AttrLoc =3D Lex.getLoc();
=20
@@ -924,6 +919,7 @@
case lltok::kw_noimplicitfloat: Attrs |=3D Attribute::NoImplicitFloat;=
break;
case lltok::kw_naked: Attrs |=3D Attribute::Naked; break;
case lltok::kw_nonlazybind: Attrs |=3D Attribute::NonLazyBind; bre=
ak;
+ case lltok::kw_address_safety: Attrs |=3D Attribute::AddressSafety; b=
reak;
=20
case lltok::kw_alignstack: {
unsigned Alignment;
@@ -1047,13 +1043,11 @@
case lltok::kw_cc: {
unsigned ArbitraryCC;
Lex.Lex();
- if (ParseUInt32(ArbitraryCC)) {
+ if (ParseUInt32(ArbitraryCC))
return true;
- } else
- CC =3D static_cast<CallingConv::ID>(ArbitraryCC);
- return false;
+ CC =3D static_cast<CallingConv::ID>(ArbitraryCC);
+ return false;
}
- break;
}
=20
Lex.Lex();
@@ -1069,7 +1063,7 @@
return TokError("expected metadata after comma");
=20
std::string Name =3D Lex.getStrVal();
- unsigned MDK =3D M->getMDKindID(Name.c_str());
+ unsigned MDK =3D M->getMDKindID(Name);
Lex.Lex();
=20
MDNode *Node;
@@ -1358,8 +1352,8 @@
// Parse the argument.
LocTy ArgLoc;
Type *ArgTy =3D 0;
- unsigned ArgAttrs1 =3D Attribute::None;
- unsigned ArgAttrs2 =3D Attribute::None;
+ Attributes ArgAttrs1;
+ Attributes ArgAttrs2;
Value *V;
if (ParseType(ArgTy, ArgLoc))
return true;
@@ -1399,7 +1393,7 @@
} else {
LocTy TypeLoc =3D Lex.getLoc();
Type *ArgTy =3D 0;
- unsigned Attrs;
+ Attributes Attrs;
std::string Name;
=20
if (ParseType(ArgTy) ||
@@ -1466,7 +1460,7 @@
for (unsigned i =3D 0, e =3D ArgList.size(); i !=3D e; ++i) {
if (!ArgList[i].Name.empty())
return Error(ArgList[i].Loc, "argument name invalid in function type=
");
- if (ArgList[i].Attrs !=3D 0)
+ if (ArgList[i].Attrs)
return Error(ArgList[i].Loc,
"argument attributes invalid in function type");
}
@@ -1612,7 +1606,8 @@
if ((unsigned)Size !=3D Size)
return Error(SizeLoc, "size too large for vector");
if (!VectorType::isValidElementType(EltTy))
- return Error(TypeLoc, "vector element type must be fp or integer");
+ return Error(TypeLoc,
+ "vector element type must be fp, integer or a pointer to these type=
s");
Result =3D VectorType::get(EltTy, unsigned(Size));
} else {
if (!ArrayType::isValidElementType(EltTy))
@@ -1971,9 +1966,10 @@
return Error(ID.Loc, "constant vector must not be empty");
=20
if (!Elts[0]->getType()->isIntegerTy() &&
- !Elts[0]->getType()->isFloatingPointTy())
+ !Elts[0]->getType()->isFloatingPointTy() &&
+ !Elts[0]->getType()->isPointerTy())
return Error(FirstEltLoc,
- "vector elements must have integer or floating point ty=
pe");
+ "vector elements must have integer, pointer or floating point =
type");
=20
// Verify that all the vector elements have the same type.
for (unsigned i =3D 1, e =3D Elts.size(); i !=3D e; ++i)
@@ -2022,7 +2018,8 @@
}
case lltok::kw_c: // c "foo"
Lex.Lex();
- ID.ConstantVal =3D ConstantArray::get(Context, Lex.getStrVal(), false);
+ ID.ConstantVal =3D ConstantDataArray::getString(Context, Lex.getStrVal=
(),
+ false);
if (ParseToken(lltok::StringConstant, "expected string")) return true;
ID.Kind =3D ValID::t_Constant;
return false;
@@ -2165,7 +2162,7 @@
} else {
assert(Opc =3D=3D Instruction::ICmp && "Unexpected opcode for CmpIns=
t!");
if (!Val0->getType()->isIntOrIntVectorTy() &&
- !Val0->getType()->isPointerTy())
+ !Val0->getType()->getScalarType()->isPointerTy())
return Error(ID.Loc, "icmp requires pointer or integer operands");
ID.ConstantVal =3D ConstantExpr::getICmp(Pred, Val0, Val1);
}
@@ -2299,7 +2296,8 @@
return true;
=20
if (Opc =3D=3D Instruction::GetElementPtr) {
- if (Elts.size() =3D=3D 0 || !Elts[0]->getType()->isPointerTy())
+ if (Elts.size() =3D=3D 0 ||
+ !Elts[0]->getType()->getScalarType()->isPointerTy())
return Error(ID.Loc, "getelementptr requires pointer operand");
=20
ArrayRef<Constant *> Indices(Elts.begin() + 1, Elts.end());
@@ -2440,7 +2438,6 @@
return Error(ID.Loc, "functions are not values, refer to them as point=
ers");
=20
switch (ID.Kind) {
- default: llvm_unreachable("Unknown ValID!");
case ValID::t_LocalID:
if (!PFS) return Error(ID.Loc, "invalid use of function-local name");
V =3D PFS->GetVal(ID.UIntVal, Ty, ID.Loc);
@@ -2485,13 +2482,16 @@
!ConstantFP::isValueValidForType(Ty, ID.APFloatVal))
return Error(ID.Loc, "floating point constant invalid for type");
=20
- // The lexer has no type info, so builds all float and double FP const=
ants
- // as double. Fix this here. Long double does not need this.
- if (&ID.APFloatVal.getSemantics() =3D=3D &APFloat::IEEEdouble &&
- Ty->isFloatTy()) {
+ // The lexer has no type info, so builds all half, float, and double FP
+ // constants as double. Fix this here. Long double does not need thi=
s.
+ if (&ID.APFloatVal.getSemantics() =3D=3D &APFloat::IEEEdouble) {
bool Ignored;
- ID.APFloatVal.convert(APFloat::IEEEsingle, APFloat::rmNearestTiesToE=
ven,
- &Ignored);
+ if (Ty->isHalfTy())
+ ID.APFloatVal.convert(APFloat::IEEEhalf, APFloat::rmNearestTiesToE=
ven,
+ &Ignored);
+ else if (Ty->isFloatTy())
+ ID.APFloatVal.convert(APFloat::IEEEsingle, APFloat::rmNearestTiesT=
oEven,
+ &Ignored);
}
V =3D ConstantFP::get(Context, ID.APFloatVal);
=20
@@ -2549,6 +2549,7 @@
return Error(ID.Loc, "constant expression type mismatch");
return false;
}
+ llvm_unreachable("Invalid ValID");
}
=20
bool LLParser::ParseValue(Type *Ty, Value *&V, PerFunctionState *PFS) {
@@ -2585,7 +2586,8 @@
LocTy LinkageLoc =3D Lex.getLoc();
unsigned Linkage;
=20
- unsigned Visibility, RetAttrs;
+ unsigned Visibility;
+ Attributes RetAttrs;
CallingConv::ID CC;
Type *RetType =3D 0;
LocTy RetTypeLoc =3D Lex.getLoc();
@@ -2649,7 +2651,7 @@
=20
SmallVector<ArgInfo, 8> ArgList;
bool isVarArg;
- unsigned FuncAttrs;
+ Attributes FuncAttrs;
std::string Section;
unsigned Alignment;
std::string GC;
@@ -2835,7 +2837,7 @@
}
=20
switch (ParseInstruction(Inst, BB, PFS)) {
- default: assert(0 && "Unknown ParseInstruction result!");
+ default: llvm_unreachable("Unknown ParseInstruction result!");
case InstError: return true;
case InstNormal:
BB->getInstList().push_back(Inst);
@@ -2881,7 +2883,6 @@
switch (Token) {
default: return Error(Loc, "expected instruction opco=
de");
// Terminator Instructions.
- case lltok::kw_unwind: Inst =3D new UnwindInst(Context); return fal=
se;
case lltok::kw_unreachable: Inst =3D new UnreachableInst(Context); retur=
n false;
case lltok::kw_ret: return ParseRet(Inst, BB, PFS);
case lltok::kw_br: return ParseBr(Inst, PFS);
@@ -2953,19 +2954,11 @@
case lltok::kw_tail: return ParseCall(Inst, PFS, true);
// Memory.
case lltok::kw_alloca: return ParseAlloc(Inst, PFS);
- case lltok::kw_load: return ParseLoad(Inst, PFS, false);
- case lltok::kw_store: return ParseStore(Inst, PFS, false);
+ case lltok::kw_load: return ParseLoad(Inst, PFS);
+ case lltok::kw_store: return ParseStore(Inst, PFS);
case lltok::kw_cmpxchg: return ParseCmpXchg(Inst, PFS);
case lltok::kw_atomicrmw: return ParseAtomicRMW(Inst, PFS);
case lltok::kw_fence: return ParseFence(Inst, PFS);
- case lltok::kw_volatile:
- // For compatibility; canonical location is after load
- if (EatIfPresent(lltok::kw_load))
- return ParseLoad(Inst, PFS, true);
- else if (EatIfPresent(lltok::kw_store))
- return ParseStore(Inst, PFS, true);
- else
- return TokError("expected 'load' or 'store'");
case lltok::kw_getelementptr: return ParseGetElementPtr(Inst, PFS);
case lltok::kw_extractvalue: return ParseExtractValue(Inst, PFS);
case lltok::kw_insertvalue: return ParseInsertValue(Inst, PFS);
@@ -3169,7 +3162,7 @@
/// OptionalAttrs 'to' TypeAndValue 'unwind' TypeAndValue
bool LLParser::ParseInvoke(Instruction *&Inst, PerFunctionState &PFS) {
LocTy CallLoc =3D Lex.getLoc();
- unsigned RetAttrs, FnAttrs;
+ Attributes RetAttrs, FnAttrs;
CallingConv::ID CC;
Type *RetType =3D 0;
LocTy RetTypeLoc;
@@ -3342,7 +3335,7 @@
} else {
assert(Opc =3D=3D Instruction::ICmp && "Unknown opcode for CmpInst!");
if (!LHS->getType()->isIntOrIntVectorTy() &&
- !LHS->getType()->isPointerTy())
+ !LHS->getType()->getScalarType()->isPointerTy())
return Error(Loc, "icmp requires integer operands");
Inst =3D new ICmpInst(CmpInst::Predicate(Pred), LHS, RHS);
}
@@ -3462,7 +3455,7 @@
return true;
=20
if (!ShuffleVectorInst::isValidOperands(Op0, Op1, Op2))
- return Error(Loc, "invalid extractelement operands");
+ return Error(Loc, "invalid shufflevector operands");
=20
Inst =3D new ShuffleVectorInst(Op0, Op1, Op2);
return false;
@@ -3568,7 +3561,7 @@
/// ParameterList OptionalAttrs
bool LLParser::ParseCall(Instruction *&Inst, PerFunctionState &PFS,
bool isTail) {
- unsigned RetAttrs, FnAttrs;
+ Attributes RetAttrs, FnAttrs;
CallingConv::ID CC;
Type *RetType =3D 0;
LocTy RetTypeLoc;
@@ -3689,10 +3682,7 @@
/// ::=3D 'load' 'volatile'? TypeAndValue (',' 'align' i32)?
/// ::=3D 'load' 'atomic' 'volatile'? TypeAndValue=20
/// 'singlethread'? AtomicOrdering (',' 'align' i32)?
-/// Compatibility:
-/// ::=3D 'volatile' 'load' TypeAndValue (',' 'align' i32)?
-int LLParser::ParseLoad(Instruction *&Inst, PerFunctionState &PFS,
- bool isVolatile) {
+int LLParser::ParseLoad(Instruction *&Inst, PerFunctionState &PFS) {
Value *Val; LocTy Loc;
unsigned Alignment =3D 0;
bool AteExtraComma =3D false;
@@ -3701,15 +3691,12 @@
SynchronizationScope Scope =3D CrossThread;
=20
if (Lex.getKind() =3D=3D lltok::kw_atomic) {
- if (isVolatile)
- return TokError("mixing atomic with old volatile placement");
isAtomic =3D true;
Lex.Lex();
}
=20
+ bool isVolatile =3D false;
if (Lex.getKind() =3D=3D lltok::kw_volatile) {
- if (isVolatile)
- return TokError("duplicate volatile before and after store");
isVolatile =3D true;
Lex.Lex();
}
@@ -3736,10 +3723,7 @@
/// ::=3D 'store' 'volatile'? TypeAndValue ',' TypeAndValue (',' 'align'=
i32)?
/// ::=3D 'store' 'atomic' 'volatile'? TypeAndValue ',' TypeAndValue
/// 'singlethread'? AtomicOrdering (',' 'align' i32)?
-/// Compatibility:
-/// ::=3D 'volatile' 'store' TypeAndValue ',' TypeAndValue (',' 'align' =
i32)?
-int LLParser::ParseStore(Instruction *&Inst, PerFunctionState &PFS,
- bool isVolatile) {
+int LLParser::ParseStore(Instruction *&Inst, PerFunctionState &PFS) {
Value *Val, *Ptr; LocTy Loc, PtrLoc;
unsigned Alignment =3D 0;
bool AteExtraComma =3D false;
@@ -3748,15 +3732,12 @@
SynchronizationScope Scope =3D CrossThread;
=20
if (Lex.getKind() =3D=3D lltok::kw_atomic) {
- if (isVolatile)
- return TokError("mixing atomic with old volatile placement");
isAtomic =3D true;
Lex.Lex();
}
=20
+ bool isVolatile =3D false;
if (Lex.getKind() =3D=3D lltok::kw_volatile) {
- if (isVolatile)
- return TokError("duplicate volatile before and after store");
isVolatile =3D true;
Lex.Lex();
}
@@ -3902,13 +3883,15 @@
/// ParseGetElementPtr
/// ::=3D 'getelementptr' 'inbounds'? TypeAndValue (',' TypeAndValue)*
int LLParser::ParseGetElementPtr(Instruction *&Inst, PerFunctionState &PFS=
) {
- Value *Ptr, *Val; LocTy Loc, EltLoc;
+ Value *Ptr =3D 0;
+ Value *Val =3D 0;
+ LocTy Loc, EltLoc;
=20
bool InBounds =3D EatIfPresent(lltok::kw_inbounds);
=20
if (ParseTypeAndValue(Ptr, Loc, PFS)) return true;
=20
- if (!Ptr->getType()->isPointerTy())
+ if (!Ptr->getType()->getScalarType()->isPointerTy())
return Error(Loc, "base of getelementptr must be a pointer");
=20
SmallVector<Value*, 16> Indices;
@@ -3919,11 +3902,23 @@
break;
}
if (ParseTypeAndValue(Val, EltLoc, PFS)) return true;
- if (!Val->getType()->isIntegerTy())
+ if (!Val->getType()->getScalarType()->isIntegerTy())
return Error(EltLoc, "getelementptr index must be an integer");
+ if (Val->getType()->isVectorTy() !=3D Ptr->getType()->isVectorTy())
+ return Error(EltLoc, "getelementptr index type missmatch");
+ if (Val->getType()->isVectorTy()) {
+ unsigned ValNumEl =3D cast<VectorType>(Val->getType())->getNumElemen=
ts();
+ unsigned PtrNumEl =3D cast<VectorType>(Ptr->getType())->getNumElemen=
ts();
+ if (ValNumEl !=3D PtrNumEl)
+ return Error(EltLoc,
+ "getelementptr vector index has a wrong number of elements");
+ }
Indices.push_back(Val);
}
=20
+ if (Val && Val->getType()->isVectorTy() && Indices.size() !=3D 1)
+ return Error(EltLoc, "vector getelementptrs must have a single index");
+
if (!GetElementPtrInst::getIndexedType(Ptr->getType(), Indices))
return Error(Loc, "invalid getelementptr indices");
Inst =3D GetElementPtrInst::Create(Ptr, Indices);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/AsmParser/LLPars=
er.h
--- a/head/contrib/llvm/lib/AsmParser/LLParser.h Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/llvm/lib/AsmParser/LLParser.h Tue Apr 17 11:51:51 2012 +=
0300
@@ -15,6 +15,7 @@
#define LLVM_ASMPARSER_LLPARSER_H
=20
#include "LLLexer.h"
+#include "llvm/Attributes.h"
#include "llvm/Instructions.h"
#include "llvm/Module.h"
#include "llvm/Type.h"
@@ -171,7 +172,7 @@
return ParseUInt32(Val);
}
bool ParseOptionalAddrSpace(unsigned &AddrSpace);
- bool ParseOptionalAttrs(unsigned &Attrs, unsigned AttrKind);
+ bool ParseOptionalAttrs(Attributes &Attrs, unsigned AttrKind);
bool ParseOptionalLinkage(unsigned &Linkage, bool &HasLinkage);
bool ParseOptionalLinkage(unsigned &Linkage) {
bool HasLinkage; return ParseOptionalLinkage(Linkage, HasLinkage);
@@ -304,8 +305,8 @@
struct ParamInfo {
LocTy Loc;
Value *V;
- unsigned Attrs;
- ParamInfo(LocTy loc, Value *v, unsigned attrs)
+ Attributes Attrs;
+ ParamInfo(LocTy loc, Value *v, Attributes attrs)
: Loc(loc), V(v), Attrs(attrs) {}
};
bool ParseParameterList(SmallVectorImpl<ParamInfo> &ArgList,
@@ -325,9 +326,9 @@
struct ArgInfo {
LocTy Loc;
Type *Ty;
- unsigned Attrs;
+ Attributes Attrs;
std::string Name;
- ArgInfo(LocTy L, Type *ty, unsigned Attr, const std::string &N)
+ ArgInfo(LocTy L, Type *ty, Attributes Attr, const std::string &N)
: Loc(L), Ty(ty), Attrs(Attr), Name(N) {}
};
bool ParseArgumentList(SmallVectorImpl<ArgInfo> &ArgList, bool &isVarA=
rg);
@@ -363,8 +364,8 @@
bool ParseLandingPad(Instruction *&I, PerFunctionState &PFS);
bool ParseCall(Instruction *&I, PerFunctionState &PFS, bool isTail);
int ParseAlloc(Instruction *&I, PerFunctionState &PFS);
- int ParseLoad(Instruction *&I, PerFunctionState &PFS, bool isVolatile);
- int ParseStore(Instruction *&I, PerFunctionState &PFS, bool isVolatile=
);
+ int ParseLoad(Instruction *&I, PerFunctionState &PFS);
+ int ParseStore(Instruction *&I, PerFunctionState &PFS);
int ParseCmpXchg(Instruction *&I, PerFunctionState &PFS);
int ParseAtomicRMW(Instruction *&I, PerFunctionState &PFS);
int ParseFence(Instruction *&I, PerFunctionState &PFS);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/AsmParser/LLToke=
n.h
--- a/head/contrib/llvm/lib/AsmParser/LLToken.h Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/llvm/lib/AsmParser/LLToken.h Tue Apr 17 11:51:51 2012 +0=
300
@@ -50,6 +50,7 @@
kw_tail,
kw_target,
kw_triple,
+ kw_unwind,=20
kw_deplibs,
kw_datalayout,
kw_volatile,
@@ -102,6 +103,7 @@
kw_noimplicitfloat,
kw_naked,
kw_nonlazybind,
+ kw_address_safety,
=20
kw_type,
kw_opaque,
@@ -126,7 +128,7 @@
=20
kw_landingpad, kw_personality, kw_cleanup, kw_catch, kw_filter,
=20
- kw_ret, kw_br, kw_switch, kw_indirectbr, kw_invoke, kw_unwind, kw_resu=
me,
+ kw_ret, kw_br, kw_switch, kw_indirectbr, kw_invoke, kw_resume,
kw_unreachable,
=20
kw_alloca, kw_load, kw_store, kw_fence, kw_cmpxchg, kw_atomicrmw,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/AsmParser/Parser=
.cpp
--- a/head/contrib/llvm/lib/AsmParser/Parser.cpp Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/llvm/lib/AsmParser/Parser.cpp Tue Apr 17 11:51:51 2012 +=
0300
@@ -44,7 +44,7 @@
LLVMContext &Context) {
OwningPtr<MemoryBuffer> File;
if (error_code ec =3D MemoryBuffer::getFileOrSTDIN(Filename.c_str(), Fil=
e)) {
- Err =3D SMDiagnostic(Filename,
+ Err =3D SMDiagnostic(Filename, SourceMgr::DK_Error,
"Could not open input file: " + ec.message());
return 0;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Bitcode/Reader/B=
itcodeReader.cpp
--- a/head/contrib/llvm/lib/Bitcode/Reader/BitcodeReader.cpp Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Bitcode/Reader/BitcodeReader.cpp Tue Apr 17 11:=
51:51 2012 +0300
@@ -22,11 +22,19 @@
#include "llvm/AutoUpgrade.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/SmallVector.h"
+#include "llvm/Support/DataStream.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/OperandTraits.h"
using namespace llvm;
=20
+void BitcodeReader::materializeForwardReferencedFunctions() {
+ while (!BlockAddrFwdRefs.empty()) {
+ Function *F =3D BlockAddrFwdRefs.begin()->first;
+ F->Materialize();
+ }
+}
+
void BitcodeReader::FreeState() {
if (BufferOwned)
delete Buffer;
@@ -394,7 +402,7 @@
// The type table size is always specified correctly.
if (ID >=3D TypeList.size())
return 0;
- =20
+
if (Type *Ty =3D TypeList[ID])
return Ty;
=20
@@ -403,14 +411,6 @@
return TypeList[ID] =3D StructType::create(Context);
}
=20
-/// FIXME: Remove in LLVM 3.1, only used by ParseOldTypeTable.
-Type *BitcodeReader::getTypeByIDOrNull(unsigned ID) {
- if (ID >=3D TypeList.size())
- TypeList.resize(ID+1);
- =20
- return TypeList[ID];
-}
-
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// Functions for parsing blocks from the bitcode file
@@ -462,8 +462,8 @@
// If Function attributes are using index 0 then transfer them
// to index ~0. Index 0 is used for return value attributes but used=
to be
// used for function attributes.
- Attributes RetAttribute =3D Attribute::None;
- Attributes FnAttribute =3D Attribute::None;
+ Attributes RetAttribute;
+ Attributes FnAttribute;
for (unsigned i =3D 0, e =3D Record.size(); i !=3D e; i +=3D 2) {
// FIXME: remove in LLVM 3.0
// The alignment is stored as a 16-bit raw value from bits 31--16.
@@ -473,23 +473,24 @@
if (Alignment && !isPowerOf2_32(Alignment))
return Error("Alignment is not a power of two.");
=20
- Attributes ReconstitutedAttr =3D Record[i+1] & 0xffff;
+ Attributes ReconstitutedAttr(Record[i+1] & 0xffff);
if (Alignment)
ReconstitutedAttr |=3D Attribute::constructAlignmentFromInt(Alig=
nment);
- ReconstitutedAttr |=3D (Record[i+1] & (0xffffull << 32)) >> 11;
- Record[i+1] =3D ReconstitutedAttr;
+ ReconstitutedAttr |=3D
+ Attributes((Record[i+1] & (0xffffull << 32)) >> 11);
=20
+ Record[i+1] =3D ReconstitutedAttr.Raw();
if (Record[i] =3D=3D 0)
- RetAttribute =3D Record[i+1];
+ RetAttribute =3D ReconstitutedAttr;
else if (Record[i] =3D=3D ~0U)
- FnAttribute =3D Record[i+1];
+ FnAttribute =3D ReconstitutedAttr;
}
=20
- unsigned OldRetAttrs =3D (Attribute::NoUnwind|Attribute::NoReturn|
+ Attributes OldRetAttrs =3D (Attribute::NoUnwind|Attribute::NoReturn|
Attribute::ReadOnly|Attribute::ReadNone);
=20
if (FnAttribute =3D=3D Attribute::None && RetAttribute !=3D Attribut=
e::None &&
- (RetAttribute & OldRetAttrs) !=3D 0) {
+ (RetAttribute & OldRetAttrs)) {
if (FnAttribute =3D=3D Attribute::None) { // add a slot so they ge=
t added.
Record.push_back(~0U);
Record.push_back(0);
@@ -506,8 +507,9 @@
} else if (Record[i] =3D=3D ~0U) {
if (FnAttribute !=3D Attribute::None)
Attrs.push_back(AttributeWithIndex::get(~0U, FnAttribute));
- } else if (Record[i+1] !=3D Attribute::None)
- Attrs.push_back(AttributeWithIndex::get(Record[i], Record[i+1]));
+ } else if (Attributes(Record[i+1]) !=3D Attribute::None)
+ Attrs.push_back(AttributeWithIndex::get(Record[i],
+ Attributes(Record[i+1]))=
);
}
=20
MAttributes.push_back(AttrListPtr::get(Attrs.begin(), Attrs.end()));
@@ -521,7 +523,7 @@
bool BitcodeReader::ParseTypeTable() {
if (Stream.EnterSubBlock(bitc::TYPE_BLOCK_ID_NEW))
return Error("Malformed block record");
- =20
+
return ParseTypeTableBody();
}
=20
@@ -533,7 +535,7 @@
unsigned NumRecords =3D 0;
=20
SmallString<64> TypeName;
- =20
+
// Read all the records for this type table.
while (1) {
unsigned Code =3D Stream.ReadCode();
@@ -573,6 +575,9 @@
case bitc::TYPE_CODE_VOID: // VOID
ResultTy =3D Type::getVoidTy(Context);
break;
+ case bitc::TYPE_CODE_HALF: // HALF
+ ResultTy =3D Type::getHalfTy(Context);
+ break;
case bitc::TYPE_CODE_FLOAT: // FLOAT
ResultTy =3D Type::getFloatTy(Context);
break;
@@ -615,12 +620,12 @@
ResultTy =3D PointerType::get(ResultTy, AddressSpace);
break;
}
- case bitc::TYPE_CODE_FUNCTION: {
+ case bitc::TYPE_CODE_FUNCTION_OLD: {
// FIXME: attrid is dead, remove it in LLVM 3.0
// FUNCTION: [vararg, attrid, retty, paramty x N]
if (Record.size() < 3)
return Error("Invalid FUNCTION type record");
- std::vector<Type*> ArgTys;
+ SmallVector<Type*, 8> ArgTys;
for (unsigned i =3D 3, e =3D Record.size(); i !=3D e; ++i) {
if (Type *T =3D getTypeByID(Record[i]))
ArgTys.push_back(T);
@@ -635,10 +640,29 @@
ResultTy =3D FunctionType::get(ResultTy, ArgTys, Record[0]);
break;
}
+ case bitc::TYPE_CODE_FUNCTION: {
+ // FUNCTION: [vararg, retty, paramty x N]
+ if (Record.size() < 2)
+ return Error("Invalid FUNCTION type record");
+ SmallVector<Type*, 8> ArgTys;
+ for (unsigned i =3D 2, e =3D Record.size(); i !=3D e; ++i) {
+ if (Type *T =3D getTypeByID(Record[i]))
+ ArgTys.push_back(T);
+ else
+ break;
+ }
+ =20
+ ResultTy =3D getTypeByID(Record[1]);
+ if (ResultTy =3D=3D 0 || ArgTys.size() < Record.size()-2)
+ return Error("invalid type in function type");
+
+ ResultTy =3D FunctionType::get(ResultTy, ArgTys, Record[0]);
+ break;
+ }
case bitc::TYPE_CODE_STRUCT_ANON: { // STRUCT: [ispacked, eltty x N]
if (Record.size() < 1)
return Error("Invalid STRUCT type record");
- std::vector<Type*> EltTys;
+ SmallVector<Type*, 8> EltTys;
for (unsigned i =3D 1, e =3D Record.size(); i !=3D e; ++i) {
if (Type *T =3D getTypeByID(Record[i]))
EltTys.push_back(T);
@@ -728,247 +752,6 @@
}
}
=20
-// FIXME: Remove in LLVM 3.1
-bool BitcodeReader::ParseOldTypeTable() {
- if (Stream.EnterSubBlock(bitc::TYPE_BLOCK_ID_OLD))
- return Error("Malformed block record");
-
- if (!TypeList.empty())
- return Error("Multiple TYPE_BLOCKs found!");
- =20
- =20
- // While horrible, we have no good ordering of types in the bc file. Ju=
st
- // iteratively parse types out of the bc file in multiple passes until w=
e get
- // them all. Do this by saving a cursor for the start of the type block.
- BitstreamCursor StartOfTypeBlockCursor(Stream);
- =20
- unsigned NumTypesRead =3D 0;
- =20
- SmallVector<uint64_t, 64> Record;
-RestartScan:
- unsigned NextTypeID =3D 0;
- bool ReadAnyTypes =3D false;
- =20
- // Read all the records for this type table.
- while (1) {
- unsigned Code =3D Stream.ReadCode();
- if (Code =3D=3D bitc::END_BLOCK) {
- if (NextTypeID !=3D TypeList.size())
- return Error("Invalid type forward reference in TYPE_BLOCK_ID_OLD"=
);
- =20
- // If we haven't read all of the types yet, iterate again.
- if (NumTypesRead !=3D TypeList.size()) {
- // If we didn't successfully read any types in this pass, then we =
must
- // have an unhandled forward reference.
- if (!ReadAnyTypes)
- return Error("Obsolete bitcode contains unhandled recursive type=
");
- =20
- Stream =3D StartOfTypeBlockCursor;
- goto RestartScan;
- }
- =20
- if (Stream.ReadBlockEnd())
- return Error("Error at end of type table block");
- return false;
- }
- =20
- if (Code =3D=3D bitc::ENTER_SUBBLOCK) {
- // No known subblocks, always skip them.
- Stream.ReadSubBlockID();
- if (Stream.SkipBlock())
- return Error("Malformed block record");
- continue;
- }
- =20
- if (Code =3D=3D bitc::DEFINE_ABBREV) {
- Stream.ReadAbbrevRecord();
- continue;
- }
- =20
- // Read a record.
- Record.clear();
- Type *ResultTy =3D 0;
- switch (Stream.ReadRecord(Code, Record)) {
- default: return Error("unknown type in type table");
- case bitc::TYPE_CODE_NUMENTRY: // TYPE_CODE_NUMENTRY: [numentries]
- // TYPE_CODE_NUMENTRY contains a count of the number of types in the
- // type list. This allows us to reserve space.
- if (Record.size() < 1)
- return Error("Invalid TYPE_CODE_NUMENTRY record");
- TypeList.resize(Record[0]);
- continue;
- case bitc::TYPE_CODE_VOID: // VOID
- ResultTy =3D Type::getVoidTy(Context);
- break;
- case bitc::TYPE_CODE_FLOAT: // FLOAT
- ResultTy =3D Type::getFloatTy(Context);
- break;
- case bitc::TYPE_CODE_DOUBLE: // DOUBLE
- ResultTy =3D Type::getDoubleTy(Context);
- break;
- case bitc::TYPE_CODE_X86_FP80: // X86_FP80
- ResultTy =3D Type::getX86_FP80Ty(Context);
- break;
- case bitc::TYPE_CODE_FP128: // FP128
- ResultTy =3D Type::getFP128Ty(Context);
- break;
- case bitc::TYPE_CODE_PPC_FP128: // PPC_FP128
- ResultTy =3D Type::getPPC_FP128Ty(Context);
- break;
- case bitc::TYPE_CODE_LABEL: // LABEL
- ResultTy =3D Type::getLabelTy(Context);
- break;
- case bitc::TYPE_CODE_METADATA: // METADATA
- ResultTy =3D Type::getMetadataTy(Context);
- break;
- case bitc::TYPE_CODE_X86_MMX: // X86_MMX
- ResultTy =3D Type::getX86_MMXTy(Context);
- break;
- case bitc::TYPE_CODE_INTEGER: // INTEGER: [width]
- if (Record.size() < 1)
- return Error("Invalid Integer type record");
- ResultTy =3D IntegerType::get(Context, Record[0]);
- break;
- case bitc::TYPE_CODE_OPAQUE: // OPAQUE
- if (NextTypeID < TypeList.size() && TypeList[NextTypeID] =3D=3D 0)
- ResultTy =3D StructType::create(Context);
- break;
- case bitc::TYPE_CODE_STRUCT_OLD: {// STRUCT_OLD
- if (NextTypeID >=3D TypeList.size()) break;
- // If we already read it, don't reprocess.
- if (TypeList[NextTypeID] &&
- !cast<StructType>(TypeList[NextTypeID])->isOpaque())
- break;
-
- // Set a type.
- if (TypeList[NextTypeID] =3D=3D 0)
- TypeList[NextTypeID] =3D StructType::create(Context);
-
- std::vector<Type*> EltTys;
- for (unsigned i =3D 1, e =3D Record.size(); i !=3D e; ++i) {
- if (Type *Elt =3D getTypeByIDOrNull(Record[i]))
- EltTys.push_back(Elt);
- else
- break;
- }
-
- if (EltTys.size() !=3D Record.size()-1)
- break; // Not all elements are ready.
- =20
- cast<StructType>(TypeList[NextTypeID])->setBody(EltTys, Record[0]);
- ResultTy =3D TypeList[NextTypeID];
- TypeList[NextTypeID] =3D 0;
- break;
- }
- case bitc::TYPE_CODE_POINTER: { // POINTER: [pointee type] or
- // [pointee type, address space]
- if (Record.size() < 1)
- return Error("Invalid POINTER type record");
- unsigned AddressSpace =3D 0;
- if (Record.size() =3D=3D 2)
- AddressSpace =3D Record[1];
- if ((ResultTy =3D getTypeByIDOrNull(Record[0])))
- ResultTy =3D PointerType::get(ResultTy, AddressSpace);
- break;
- }
- case bitc::TYPE_CODE_FUNCTION: {
- // FIXME: attrid is dead, remove it in LLVM 3.0
- // FUNCTION: [vararg, attrid, retty, paramty x N]
- if (Record.size() < 3)
- return Error("Invalid FUNCTION type record");
- std::vector<Type*> ArgTys;
- for (unsigned i =3D 3, e =3D Record.size(); i !=3D e; ++i) {
- if (Type *Elt =3D getTypeByIDOrNull(Record[i]))
- ArgTys.push_back(Elt);
- else
- break;
- }
- if (ArgTys.size()+3 !=3D Record.size())
- break; // Something was null.
- if ((ResultTy =3D getTypeByIDOrNull(Record[2])))
- ResultTy =3D FunctionType::get(ResultTy, ArgTys, Record[0]);
- break;
- }
- case bitc::TYPE_CODE_ARRAY: // ARRAY: [numelts, eltty]
- if (Record.size() < 2)
- return Error("Invalid ARRAY type record");
- if ((ResultTy =3D getTypeByIDOrNull(Record[1])))
- ResultTy =3D ArrayType::get(ResultTy, Record[0]);
- break;
- case bitc::TYPE_CODE_VECTOR: // VECTOR: [numelts, eltty]
- if (Record.size() < 2)
- return Error("Invalid VECTOR type record");
- if ((ResultTy =3D getTypeByIDOrNull(Record[1])))
- ResultTy =3D VectorType::get(ResultTy, Record[0]);
- break;
- }
- =20
- if (NextTypeID >=3D TypeList.size())
- return Error("invalid TYPE table");
- =20
- if (ResultTy && TypeList[NextTypeID] =3D=3D 0) {
- ++NumTypesRead;
- ReadAnyTypes =3D true;
- =20
- TypeList[NextTypeID] =3D ResultTy;
- }
- =20
- ++NextTypeID;
- }
-}
-
-
-bool BitcodeReader::ParseOldTypeSymbolTable() {
- if (Stream.EnterSubBlock(bitc::TYPE_SYMTAB_BLOCK_ID_OLD))
- return Error("Malformed block record");
-
- SmallVector<uint64_t, 64> Record;
-
- // Read all the records for this type table.
- std::string TypeName;
- while (1) {
- unsigned Code =3D Stream.ReadCode();
- if (Code =3D=3D bitc::END_BLOCK) {
- if (Stream.ReadBlockEnd())
- return Error("Error at end of type symbol table block");
- return false;
- }
-
- if (Code =3D=3D bitc::ENTER_SUBBLOCK) {
- // No known subblocks, always skip them.
- Stream.ReadSubBlockID();
- if (Stream.SkipBlock())
- return Error("Malformed block record");
- continue;
- }
-
- if (Code =3D=3D bitc::DEFINE_ABBREV) {
- Stream.ReadAbbrevRecord();
- continue;
- }
-
- // Read a record.
- Record.clear();
- switch (Stream.ReadRecord(Code, Record)) {
- default: // Default behavior: unknown type.
- break;
- case bitc::TST_CODE_ENTRY: // TST_ENTRY: [typeid, namechar x N]
- if (ConvertToString(Record, 1, TypeName))
- return Error("Invalid TST_ENTRY record");
- unsigned TypeID =3D Record[0];
- if (TypeID >=3D TypeList.size())
- return Error("Invalid Type ID in TST_ENTRY record");
-
- // Only apply the type name to a struct type with no name.
- if (StructType *STy =3D dyn_cast<StructType>(TypeList[TypeID]))
- if (!STy->isLiteral() && !STy->hasName())
- STy->setName(TypeName);
- TypeName.clear();
- break;
- }
- }
-}
-
bool BitcodeReader::ParseValueSymbolTable() {
if (Stream.EnterSubBlock(bitc::VALUE_SYMTAB_BLOCK_ID))
return Error("Malformed block record");
@@ -1262,7 +1045,9 @@
case bitc::CST_CODE_FLOAT: { // FLOAT: [fpval]
if (Record.empty())
return Error("Invalid FLOAT record");
- if (CurTy->isFloatTy())
+ if (CurTy->isHalfTy())
+ V =3D ConstantFP::get(Context, APFloat(APInt(16, (uint16_t)Record[=
0])));
+ else if (CurTy->isFloatTy())
V =3D ConstantFP::get(Context, APFloat(APInt(32, (uint32_t)Record[=
0])));
else if (CurTy->isDoubleTy())
V =3D ConstantFP::get(Context, APFloat(APInt(64, Record[0])));
@@ -1286,7 +1071,7 @@
return Error("Invalid CST_AGGREGATE record");
=20
unsigned Size =3D Record.size();
- std::vector<Constant*> Elts;
+ SmallVector<Constant*, 16> Elts;
=20
if (StructType *STy =3D dyn_cast<StructType>(CurTy)) {
for (unsigned i =3D 0; i !=3D Size; ++i)
@@ -1308,35 +1093,78 @@
}
break;
}
- case bitc::CST_CODE_STRING: { // STRING: [values]
+ case bitc::CST_CODE_STRING: // STRING: [values]
+ case bitc::CST_CODE_CSTRING: { // CSTRING: [values]
if (Record.empty())
- return Error("Invalid CST_AGGREGATE record");
-
- ArrayType *ATy =3D cast<ArrayType>(CurTy);
- Type *EltTy =3D ATy->getElementType();
+ return Error("Invalid CST_STRING record");
=20
unsigned Size =3D Record.size();
- std::vector<Constant*> Elts;
+ SmallString<16> Elts;
for (unsigned i =3D 0; i !=3D Size; ++i)
- Elts.push_back(ConstantInt::get(EltTy, Record[i]));
- V =3D ConstantArray::get(ATy, Elts);
+ Elts.push_back(Record[i]);
+ V =3D ConstantDataArray::getString(Context, Elts,
+ BitCode =3D=3D bitc::CST_CODE_CSTRI=
NG);
break;
}
- case bitc::CST_CODE_CSTRING: { // CSTRING: [values]
+ case bitc::CST_CODE_DATA: {// DATA: [n x value]
if (Record.empty())
- return Error("Invalid CST_AGGREGATE record");
-
- ArrayType *ATy =3D cast<ArrayType>(CurTy);
- Type *EltTy =3D ATy->getElementType();
-
+ return Error("Invalid CST_DATA record");
+ =20
+ Type *EltTy =3D cast<SequentialType>(CurTy)->getElementType();
unsigned Size =3D Record.size();
- std::vector<Constant*> Elts;
- for (unsigned i =3D 0; i !=3D Size; ++i)
- Elts.push_back(ConstantInt::get(EltTy, Record[i]));
- Elts.push_back(Constant::getNullValue(EltTy));
- V =3D ConstantArray::get(ATy, Elts);
+ =20
+ if (EltTy->isIntegerTy(8)) {
+ SmallVector<uint8_t, 16> Elts(Record.begin(), Record.end());
+ if (isa<VectorType>(CurTy))
+ V =3D ConstantDataVector::get(Context, Elts);
+ else
+ V =3D ConstantDataArray::get(Context, Elts);
+ } else if (EltTy->isIntegerTy(16)) {
+ SmallVector<uint16_t, 16> Elts(Record.begin(), Record.end());
+ if (isa<VectorType>(CurTy))
+ V =3D ConstantDataVector::get(Context, Elts);
+ else
+ V =3D ConstantDataArray::get(Context, Elts);
+ } else if (EltTy->isIntegerTy(32)) {
+ SmallVector<uint32_t, 16> Elts(Record.begin(), Record.end());
+ if (isa<VectorType>(CurTy))
+ V =3D ConstantDataVector::get(Context, Elts);
+ else
+ V =3D ConstantDataArray::get(Context, Elts);
+ } else if (EltTy->isIntegerTy(64)) {
+ SmallVector<uint64_t, 16> Elts(Record.begin(), Record.end());
+ if (isa<VectorType>(CurTy))
+ V =3D ConstantDataVector::get(Context, Elts);
+ else
+ V =3D ConstantDataArray::get(Context, Elts);
+ } else if (EltTy->isFloatTy()) {
+ SmallVector<float, 16> Elts;
+ for (unsigned i =3D 0; i !=3D Size; ++i) {
+ union { uint32_t I; float F; };
+ I =3D Record[i];
+ Elts.push_back(F);
+ }
+ if (isa<VectorType>(CurTy))
+ V =3D ConstantDataVector::get(Context, Elts);
+ else
+ V =3D ConstantDataArray::get(Context, Elts);
+ } else if (EltTy->isDoubleTy()) {
+ SmallVector<double, 16> Elts;
+ for (unsigned i =3D 0; i !=3D Size; ++i) {
+ union { uint64_t I; double F; };
+ I =3D Record[i];
+ Elts.push_back(F);
+ }
+ if (isa<VectorType>(CurTy))
+ V =3D ConstantDataVector::get(Context, Elts);
+ else
+ V =3D ConstantDataArray::get(Context, Elts);
+ } else {
+ return Error("Unknown element type in CE_DATA");
+ }
break;
}
+
case bitc::CST_CODE_CE_BINOP: { // CE_BINOP: [opcode, opval, opval]
if (Record.size() < 3) return Error("Invalid CE_BINOP record");
int Opc =3D GetDecodedBinaryOpcode(Record[0], CurTy);
@@ -1517,6 +1345,50 @@
return false;
}
=20
+bool BitcodeReader::ParseUseLists() {
+ if (Stream.EnterSubBlock(bitc::USELIST_BLOCK_ID))
+ return Error("Malformed block record");
+
+ SmallVector<uint64_t, 64> Record;
+ =20
+ // Read all the records.
+ while (1) {
+ unsigned Code =3D Stream.ReadCode();
+ if (Code =3D=3D bitc::END_BLOCK) {
+ if (Stream.ReadBlockEnd())
+ return Error("Error at end of use-list table block");
+ return false;
+ }
+ =20
+ if (Code =3D=3D bitc::ENTER_SUBBLOCK) {
+ // No known subblocks, always skip them.
+ Stream.ReadSubBlockID();
+ if (Stream.SkipBlock())
+ return Error("Malformed block record");
+ continue;
+ }
+ =20
+ if (Code =3D=3D bitc::DEFINE_ABBREV) {
+ Stream.ReadAbbrevRecord();
+ continue;
+ }
+ =20
+ // Read a use list record.
+ Record.clear();
+ switch (Stream.ReadRecord(Code, Record)) {
+ default: // Default behavior: unknown type.
+ break;
+ case bitc::USELIST_CODE_ENTRY: { // USELIST_CODE_ENTRY: TBD.
+ unsigned RecordLength =3D Record.size();
+ if (RecordLength < 1)
+ return Error ("Invalid UseList reader!");
+ UseListRecords.push_back(Record);
+ break;
+ }
+ }
+ }
+}
+
/// RememberAndSkipFunctionBody - When we see the block for a function bod=
y,
/// remember where it is and then skip it. This lets us lazily deserializ=
e the
/// functions.
@@ -1538,8 +1410,36 @@
return false;
}
=20
-bool BitcodeReader::ParseModule() {
- if (Stream.EnterSubBlock(bitc::MODULE_BLOCK_ID))
+bool BitcodeReader::GlobalCleanup() {
+ // Patch the initializers for globals and aliases up.
+ ResolveGlobalAndAliasInits();
+ if (!GlobalInits.empty() || !AliasInits.empty())
+ return Error("Malformed global initializer set");
+
+ // Look for intrinsic functions which need to be upgraded at some point
+ for (Module::iterator FI =3D TheModule->begin(), FE =3D TheModule->end();
+ FI !=3D FE; ++FI) {
+ Function *NewFn;
+ if (UpgradeIntrinsicFunction(FI, NewFn))
+ UpgradedIntrinsics.push_back(std::make_pair(FI, NewFn));
+ }
+
+ // Look for global variables which need to be renamed.
+ for (Module::global_iterator
+ GI =3D TheModule->global_begin(), GE =3D TheModule->global_end();
+ GI !=3D GE; ++GI)
+ UpgradeGlobalVariable(GI);
+ // Force deallocation of memory for these vectors to favor the client th=
at
+ // want lazy deserialization.
+ std::vector<std::pair<GlobalVariable*, unsigned> >().swap(GlobalInits);
+ std::vector<std::pair<GlobalAlias*, unsigned> >().swap(AliasInits);
+ return false;
+}
+
+bool BitcodeReader::ParseModule(bool Resume) {
+ if (Resume)
+ Stream.JumpToBit(NextUnreadBit);
+ else if (Stream.EnterSubBlock(bitc::MODULE_BLOCK_ID))
return Error("Malformed block record");
=20
SmallVector<uint64_t, 64> Record;
@@ -1553,33 +1453,7 @@
if (Stream.ReadBlockEnd())
return Error("Error at end of module block");
=20
- // Patch the initializers for globals and aliases up.
- ResolveGlobalAndAliasInits();
- if (!GlobalInits.empty() || !AliasInits.empty())
- return Error("Malformed global initializer set");
- if (!FunctionsWithBodies.empty())
- return Error("Too few function bodies found");
-
- // Look for intrinsic functions which need to be upgraded at some po=
int
- for (Module::iterator FI =3D TheModule->begin(), FE =3D TheModule->e=
nd();
- FI !=3D FE; ++FI) {
- Function* NewFn;
- if (UpgradeIntrinsicFunction(FI, NewFn))
- UpgradedIntrinsics.push_back(std::make_pair(FI, NewFn));
- }
-
- // Look for global variables which need to be renamed.
- for (Module::global_iterator
- GI =3D TheModule->global_begin(), GE =3D TheModule->global_en=
d();
- GI !=3D GE; ++GI)
- UpgradeGlobalVariable(GI);
-
- // Force deallocation of memory for these vectors to favor the clien=
t that
- // want lazy deserialization.
- std::vector<std::pair<GlobalVariable*, unsigned> >().swap(GlobalInit=
s);
- std::vector<std::pair<GlobalAlias*, unsigned> >().swap(AliasInits);
- std::vector<Function*>().swap(FunctionsWithBodies);
- return false;
+ return GlobalCleanup();
}
=20
if (Code =3D=3D bitc::ENTER_SUBBLOCK) {
@@ -1600,17 +1474,10 @@
if (ParseTypeTable())
return true;
break;
- case bitc::TYPE_BLOCK_ID_OLD:
- if (ParseOldTypeTable())
- return true;
- break;
- case bitc::TYPE_SYMTAB_BLOCK_ID_OLD:
- if (ParseOldTypeSymbolTable())
- return true;
- break;
case bitc::VALUE_SYMTAB_BLOCK_ID:
if (ParseValueSymbolTable())
return true;
+ SeenValueSymbolTable =3D true;
break;
case bitc::CONSTANTS_BLOCK_ID:
if (ParseConstants() || ResolveGlobalAndAliasInits())
@@ -1623,13 +1490,29 @@
case bitc::FUNCTION_BLOCK_ID:
// If this is the first function body we've seen, reverse the
// FunctionsWithBodies list.
- if (!HasReversedFunctionsWithBodies) {
+ if (!SeenFirstFunctionBody) {
std::reverse(FunctionsWithBodies.begin(), FunctionsWithBodies.en=
d());
- HasReversedFunctionsWithBodies =3D true;
+ if (GlobalCleanup())
+ return true;
+ SeenFirstFunctionBody =3D true;
}
=20
if (RememberAndSkipFunctionBody())
return true;
+ // For streaming bitcode, suspend parsing when we reach the functi=
on
+ // bodies. Subsequent materialization calls will resume it when
+ // necessary. For streaming, the function bodies must be at the en=
d of
+ // the bitcode. If the bitcode file is old, the symbol table will =
be
+ // at the end instead and will not have been seen yet. In this cas=
e,
+ // just finish the parse now.
+ if (LazyStreamer && SeenValueSymbolTable) {
+ NextUnreadBit =3D Stream.GetCurrentBitNo();
+ return false;
+ }
+ break;
+ case bitc::USELIST_BLOCK_ID:
+ if (ParseUseLists())
+ return true;
break;
}
continue;
@@ -1784,8 +1667,10 @@
=20
// If this is a function with a body, remember the prototype we are
// creating now, so that we can match up the body with them later.
- if (!isProto)
+ if (!isProto) {
FunctionsWithBodies.push_back(Func);
+ if (LazyStreamer) DeferredFunctionInfo[Func] =3D 0;
+ }
break;
}
// ALIAS: [alias type, aliasee val#, linkage]
@@ -1824,24 +1709,7 @@
bool BitcodeReader::ParseBitcodeInto(Module *M) {
TheModule =3D 0;
=20
- unsigned char *BufPtr =3D (unsigned char *)Buffer->getBufferStart();
- unsigned char *BufEnd =3D BufPtr+Buffer->getBufferSize();
-
- if (Buffer->getBufferSize() & 3) {
- if (!isRawBitcode(BufPtr, BufEnd) && !isBitcodeWrapper(BufPtr, BufEnd))
- return Error("Invalid bitcode signature");
- else
- return Error("Bitcode stream should be a multiple of 4 bytes in leng=
th");
- }
-
- // If we have a wrapper header, parse it and ignore the non-bc file cont=
ents.
- // The magic number is 0x0B17C0DE stored in little endian.
- if (isBitcodeWrapper(BufPtr, BufEnd))
- if (SkipBitcodeWrapperHeader(BufPtr, BufEnd))
- return Error("Invalid bitcode wrapper header");
-
- StreamFile.init(BufPtr, BufEnd);
- Stream.init(StreamFile);
+ if (InitStream()) return true;
=20
// Sniff for the signature.
if (Stream.Read(8) !=3D 'B' ||
@@ -1883,8 +1751,9 @@
if (TheModule)
return Error("Multiple MODULE_BLOCKs in same stream");
TheModule =3D M;
- if (ParseModule())
+ if (ParseModule(false))
return true;
+ if (LazyStreamer) return false;
break;
default:
if (Stream.SkipBlock())
@@ -1952,20 +1821,7 @@
}
=20
bool BitcodeReader::ParseTriple(std::string &Triple) {
- if (Buffer->getBufferSize() & 3)
- return Error("Bitcode stream should be a multiple of 4 bytes in length=
");
-
- unsigned char *BufPtr =3D (unsigned char *)Buffer->getBufferStart();
- unsigned char *BufEnd =3D BufPtr+Buffer->getBufferSize();
-
- // If we have a wrapper header, parse it and ignore the non-bc file cont=
ents.
- // The magic number is 0x0B17C0DE stored in little endian.
- if (isBitcodeWrapper(BufPtr, BufEnd))
- if (SkipBitcodeWrapperHeader(BufPtr, BufEnd))
- return Error("Invalid bitcode wrapper header");
-
- StreamFile.init(BufPtr, BufEnd);
- Stream.init(StreamFile);
+ if (InitStream()) return true;
=20
// Sniff for the signature.
if (Stream.Read(8) !=3D 'B' ||
@@ -2517,10 +2373,6 @@
InstructionList.push_back(I);
break;
}
- case bitc::FUNC_CODE_INST_UNWIND: // UNWIND
- I =3D new UnwindInst(Context);
- InstructionList.push_back(I);
- break;
case bitc::FUNC_CODE_INST_UNREACHABLE: // UNREACHABLE
I =3D new UnreachableInst(Context);
InstructionList.push_back(I);
@@ -2845,6 +2697,19 @@
return false;
}
=20
+/// FindFunctionInStream - Find the function body in the bitcode stream
+bool BitcodeReader::FindFunctionInStream(Function *F,
+ DenseMap<Function*, uint64_t>::iterator DeferredFunctionInfoIterato=
r) {
+ while (DeferredFunctionInfoIterator->second =3D=3D 0) {
+ if (Stream.AtEndOfStream())
+ return Error("Could not find Function in stream");
+ // ParseModule will parse the next body in the stream and set its
+ // position in the DeferredFunctionInfo map.
+ if (ParseModule(true)) return true;
+ }
+ return false;
+}
+
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// GVMaterializer implementation
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -2865,6 +2730,10 @@
=20
DenseMap<Function*, uint64_t>::iterator DFII =3D DeferredFunctionInfo.fi=
nd(F);
assert(DFII !=3D DeferredFunctionInfo.end() && "Deferred function not fo=
und!");
+ // If its position is recorded as 0, its body is somewhere in the stream
+ // but we haven't seen it yet.
+ if (DFII->second =3D=3D 0)
+ if (LazyStreamer && FindFunctionInStream(F, DFII)) return true;
=20
// Move the bit stream to the saved position of the deferred function bo=
dy.
Stream.JumpToBit(DFII->second);
@@ -2920,6 +2789,12 @@
Materialize(F, ErrInfo))
return true;
=20
+ // At this point, if there are any function bodies, the current bit is
+ // pointing to the END_BLOCK record after them. Now make sure the rest
+ // of the bits in the module have been read.
+ if (NextUnreadBit)
+ ParseModule(true);
+
// Upgrade any intrinsic calls that slipped through (should not happen!)=
and
// delete the old functions to clean up. We can't do this unless the ent=
ire
// module is materialized because there could always be another function=
body
@@ -2939,15 +2814,60 @@
}
std::vector<std::pair<Function*, Function*> >().swap(UpgradedIntrinsics);
=20
- // Upgrade to new EH scheme. N.B. This will go away in 3.1.
- UpgradeExceptionHandling(M);
+ return false;
+}
=20
- // Check debug info intrinsics.
- CheckDebugInfoIntrinsics(TheModule);
+bool BitcodeReader::InitStream() {
+ if (LazyStreamer) return InitLazyStream();
+ return InitStreamFromBuffer();
+}
+
+bool BitcodeReader::InitStreamFromBuffer() {
+ const unsigned char *BufPtr =3D (unsigned char *)Buffer->getBufferStart(=
);
+ const unsigned char *BufEnd =3D BufPtr+Buffer->getBufferSize();
+
+ if (Buffer->getBufferSize() & 3) {
+ if (!isRawBitcode(BufPtr, BufEnd) && !isBitcodeWrapper(BufPtr, BufEnd))
+ return Error("Invalid bitcode signature");
+ else
+ return Error("Bitcode stream should be a multiple of 4 bytes in leng=
th");
+ }
+
+ // If we have a wrapper header, parse it and ignore the non-bc file cont=
ents.
+ // The magic number is 0x0B17C0DE stored in little endian.
+ if (isBitcodeWrapper(BufPtr, BufEnd))
+ if (SkipBitcodeWrapperHeader(BufPtr, BufEnd, true))
+ return Error("Invalid bitcode wrapper header");
+
+ StreamFile.reset(new BitstreamReader(BufPtr, BufEnd));
+ Stream.init(*StreamFile);
=20
return false;
}
=20
+bool BitcodeReader::InitLazyStream() {
+ // Check and strip off the bitcode wrapper; BitstreamReader expects neve=
r to
+ // see it.
+ StreamingMemoryObject *Bytes =3D new StreamingMemoryObject(LazyStreamer);
+ StreamFile.reset(new BitstreamReader(Bytes));
+ Stream.init(*StreamFile);
+
+ unsigned char buf[16];
+ if (Bytes->readBytes(0, 16, buf, NULL) =3D=3D -1)
+ return Error("Bitcode stream must be at least 16 bytes in length");
+
+ if (!isBitcode(buf, buf + 16))
+ return Error("Invalid bitcode signature");
+
+ if (isBitcodeWrapper(buf, buf + 4)) {
+ const unsigned char *bitcodeStart =3D buf;
+ const unsigned char *bitcodeEnd =3D buf + 16;
+ SkipBitcodeWrapperHeader(bitcodeStart, bitcodeEnd, false);
+ Bytes->dropLeadingBytes(bitcodeStart - buf);
+ Bytes->setKnownObjectSize(bitcodeEnd - bitcodeStart);
+ }
+ return false;
+}
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// External interface
@@ -2970,6 +2890,27 @@
}
// Have the BitcodeReader dtor delete 'Buffer'.
R->setBufferOwned(true);
+
+ R->materializeForwardReferencedFunctions();
+
+ return M;
+}
+
+
+Module *llvm::getStreamedBitcodeModule(const std::string &name,
+ DataStreamer *streamer,
+ LLVMContext &Context,
+ std::string *ErrMsg) {
+ Module *M =3D new Module(name, Context);
+ BitcodeReader *R =3D new BitcodeReader(streamer, Context);
+ M->setMaterializer(R);
+ if (R->ParseBitcodeInto(M)) {
+ if (ErrMsg)
+ *ErrMsg =3D R->getErrorString();
+ delete M; // Also deletes R.
+ return 0;
+ }
+ R->setBufferOwned(false); // no buffer to delete
return M;
}
=20
@@ -2990,6 +2931,9 @@
return 0;
}
=20
+ // TODO: Restore the use-lists to the in-memory state when the bitcode w=
as
+ // written. We must defer until the Module has been fully materialized.
+
return M;
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Bitcode/Reader/B=
itcodeReader.h
--- a/head/contrib/llvm/lib/Bitcode/Reader/BitcodeReader.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/lib/Bitcode/Reader/BitcodeReader.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -126,8 +126,11 @@
Module *TheModule;
MemoryBuffer *Buffer;
bool BufferOwned;
- BitstreamReader StreamFile;
+ OwningPtr<BitstreamReader> StreamFile;
BitstreamCursor Stream;
+ DataStreamer *LazyStreamer;
+ uint64_t NextUnreadBit;
+ bool SeenValueSymbolTable;
=20
const char *ErrorString;
=20
@@ -135,6 +138,7 @@
BitcodeReaderValueList ValueList;
BitcodeReaderMDValueList MDValueList;
SmallVector<Instruction *, 64> InstructionList;
+ SmallVector<SmallVector<uint64_t, 64>, 64> UseListRecords;
=20
std::vector<std::pair<GlobalVariable*, unsigned> > GlobalInits;
std::vector<std::pair<GlobalAlias*, unsigned> > AliasInits;
@@ -160,9 +164,10 @@
// Map the bitcode's custom MDKind ID to the Module's MDKind ID.
DenseMap<unsigned, unsigned> MDKindMap;
=20
- // After the module header has been read, the FunctionsWithBodies list i=
s=20
- // reversed. This keeps track of whether we've done this yet.
- bool HasReversedFunctionsWithBodies;
+ // Several operations happen after the module header has been read, but
+ // before function bodies are processed. This keeps track of whether
+ // we've done this yet.
+ bool SeenFirstFunctionBody;
=20
/// DeferredFunctionInfo - When function bodies are initially scanned, t=
his
/// map contains info about where to find deferred function body in the
@@ -177,13 +182,22 @@
public:
explicit BitcodeReader(MemoryBuffer *buffer, LLVMContext &C)
: Context(C), TheModule(0), Buffer(buffer), BufferOwned(false),
- ErrorString(0), ValueList(C), MDValueList(C) {
- HasReversedFunctionsWithBodies =3D false;
+ LazyStreamer(0), NextUnreadBit(0), SeenValueSymbolTable(false),
+ ErrorString(0), ValueList(C), MDValueList(C),
+ SeenFirstFunctionBody(false) {
+ }
+ explicit BitcodeReader(DataStreamer *streamer, LLVMContext &C)
+ : Context(C), TheModule(0), Buffer(0), BufferOwned(false),
+ LazyStreamer(streamer), NextUnreadBit(0), SeenValueSymbolTable(false=
),
+ ErrorString(0), ValueList(C), MDValueList(C),
+ SeenFirstFunctionBody(false) {
}
~BitcodeReader() {
FreeState();
}
- =20
+
+ void materializeForwardReferencedFunctions();
+
void FreeState();
=20
/// setBufferOwned - If this is true, the reader will destroy the Memory=
Buffer
@@ -211,7 +225,6 @@
bool ParseTriple(std::string &Triple);
private:
Type *getTypeByID(unsigned ID);
- Type *getTypeByIDOrNull(unsigned ID);
Value *getFnValueByID(unsigned ID, Type *Ty) {
if (Ty && Ty->isMetadataTy())
return MDValueList.getValueFwdRef(ID);
@@ -256,21 +269,26 @@
}
=20
=20
- bool ParseModule();
+ bool ParseModule(bool Resume);
bool ParseAttributeBlock();
bool ParseTypeTable();
- bool ParseOldTypeTable(); // FIXME: Remove in LLVM 3.1
bool ParseTypeTableBody();
=20
- bool ParseOldTypeSymbolTable(); // FIXME: Remove in LLVM 3.1
bool ParseValueSymbolTable();
bool ParseConstants();
bool RememberAndSkipFunctionBody();
bool ParseFunctionBody(Function *F);
+ bool GlobalCleanup();
bool ResolveGlobalAndAliasInits();
bool ParseMetadata();
bool ParseMetadataAttachment();
bool ParseModuleTriple(std::string &Triple);
+ bool ParseUseLists();
+ bool InitStream();
+ bool InitStreamFromBuffer();
+ bool InitLazyStream();
+ bool FindFunctionInStream(Function *F,
+ DenseMap<Function*, uint64_t>::iterator DeferredFunctionInfoItera=
tor);
};
=20
} // End llvm namespace
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Bitcode/Writer/B=
itcodeWriter.cpp
--- a/head/contrib/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp Tue Apr 17 11:=
51:51 2012 +0300
@@ -23,6 +23,7 @@
#include "llvm/Operator.h"
#include "llvm/ValueSymbolTable.h"
#include "llvm/ADT/Triple.h"
+#include "llvm/Support/CommandLine.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
@@ -31,6 +32,12 @@
#include <map>
using namespace llvm;
=20
+static cl::opt<bool>
+EnablePreserveUseListOrdering("enable-bc-uselist-preserve",
+ cl::desc("Turn on experimental support for "
+ "use-list order preservation."),
+ cl::init(false), cl::Hidden);
+
/// These are manifest constants used by the bitcode writer. They do not n=
eed to
/// be kept in sync with the reader, but need to be consistent within this=
file.
enum {
@@ -119,7 +126,6 @@
=20
static unsigned GetEncodedOrdering(AtomicOrdering Ordering) {
switch (Ordering) {
- default: llvm_unreachable("Unknown atomic ordering");
case NotAtomic: return bitc::ORDERING_NOTATOMIC;
case Unordered: return bitc::ORDERING_UNORDERED;
case Monotonic: return bitc::ORDERING_MONOTONIC;
@@ -128,14 +134,15 @@
case AcquireRelease: return bitc::ORDERING_ACQREL;
case SequentiallyConsistent: return bitc::ORDERING_SEQCST;
}
+ llvm_unreachable("Invalid ordering");
}
=20
static unsigned GetEncodedSynchScope(SynchronizationScope SynchScope) {
switch (SynchScope) {
- default: llvm_unreachable("Unknown synchronization scope");
case SingleThread: return bitc::SYNCHSCOPE_SINGLETHREAD;
case CrossThread: return bitc::SYNCHSCOPE_CROSSTHREAD;
}
+ llvm_unreachable("Invalid synch scope");
}
=20
static void WriteStringRecord(unsigned Code, StringRef Str,
@@ -172,10 +179,11 @@
// Store the alignment in the bitcode as a 16-bit raw value instead =
of a
// 5-bit log2 encoded value. Shift the bits above the alignment up by
// 11 bits.
- uint64_t FauxAttr =3D PAWI.Attrs & 0xffff;
+ uint64_t FauxAttr =3D PAWI.Attrs.Raw() & 0xffff;
if (PAWI.Attrs & Attribute::Alignment)
- FauxAttr |=3D (1ull<<16)<<(((PAWI.Attrs & Attribute::Alignment)-1)=
>> 16);
- FauxAttr |=3D (PAWI.Attrs & (0x3FFull << 21)) << 11;
+ FauxAttr |=3D (1ull<<16)<<
+ (((PAWI.Attrs & Attribute::Alignment).Raw()-1) >> 16);
+ FauxAttr |=3D (PAWI.Attrs.Raw() & (0x3FFull << 21)) << 11;
=20
Record.push_back(FauxAttr);
}
@@ -194,11 +202,12 @@
Stream.EnterSubblock(bitc::TYPE_BLOCK_ID_NEW, 4 /*count from # abbrevs *=
/);
SmallVector<uint64_t, 64> TypeVals;
=20
+ uint64_t NumBits =3D Log2_32_Ceil(VE.getTypes().size()+1);
+
// Abbrev for TYPE_CODE_POINTER.
BitCodeAbbrev *Abbv =3D new BitCodeAbbrev();
Abbv->Add(BitCodeAbbrevOp(bitc::TYPE_CODE_POINTER));
- Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed,
- Log2_32_Ceil(VE.getTypes().size()+1)));
+ Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, NumBits));
Abbv->Add(BitCodeAbbrevOp(0)); // Addrspace =3D 0
unsigned PtrAbbrev =3D Stream.EmitAbbrev(Abbv);
=20
@@ -206,10 +215,9 @@
Abbv =3D new BitCodeAbbrev();
Abbv->Add(BitCodeAbbrevOp(bitc::TYPE_CODE_FUNCTION));
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 1)); // isvararg
- Abbv->Add(BitCodeAbbrevOp(0)); // FIXME: DEAD value, remove in LLVM 3.0
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array));
- Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed,
- Log2_32_Ceil(VE.getTypes().size()+1)));
+ Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, NumBits));
+
unsigned FunctionAbbrev =3D Stream.EmitAbbrev(Abbv);
=20
// Abbrev for TYPE_CODE_STRUCT_ANON.
@@ -217,8 +225,8 @@
Abbv->Add(BitCodeAbbrevOp(bitc::TYPE_CODE_STRUCT_ANON));
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 1)); // ispacked
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array));
- Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed,
- Log2_32_Ceil(VE.getTypes().size()+1)));
+ Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, NumBits));
+
unsigned StructAnonAbbrev =3D Stream.EmitAbbrev(Abbv);
=20
// Abbrev for TYPE_CODE_STRUCT_NAME.
@@ -233,16 +241,16 @@
Abbv->Add(BitCodeAbbrevOp(bitc::TYPE_CODE_STRUCT_NAMED));
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 1)); // ispacked
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Array));
- Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed,
- Log2_32_Ceil(VE.getTypes().size()+1)));
+ Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, NumBits));
+
unsigned StructNamedAbbrev =3D Stream.EmitAbbrev(Abbv);
=20
// Abbrev for TYPE_CODE_ARRAY.
Abbv =3D new BitCodeAbbrev();
Abbv->Add(BitCodeAbbrevOp(bitc::TYPE_CODE_ARRAY));
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 8)); // size
- Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed,
- Log2_32_Ceil(VE.getTypes().size()+1)));
+ Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, NumBits));
+
unsigned ArrayAbbrev =3D Stream.EmitAbbrev(Abbv);
=20
// Emit an entry count so the reader can reserve space.
@@ -259,6 +267,7 @@
switch (T->getTypeID()) {
default: llvm_unreachable("Unknown type!");
case Type::VoidTyID: Code =3D bitc::TYPE_CODE_VOID; break;
+ case Type::HalfTyID: Code =3D bitc::TYPE_CODE_HALF; break;
case Type::FloatTyID: Code =3D bitc::TYPE_CODE_FLOAT; break;
case Type::DoubleTyID: Code =3D bitc::TYPE_CODE_DOUBLE; break;
case Type::X86_FP80TyID: Code =3D bitc::TYPE_CODE_X86_FP80; break;
@@ -284,10 +293,9 @@
}
case Type::FunctionTyID: {
FunctionType *FT =3D cast<FunctionType>(T);
- // FUNCTION: [isvararg, attrid, retty, paramty x N]
+ // FUNCTION: [isvararg, retty, paramty x N]
Code =3D bitc::TYPE_CODE_FUNCTION;
TypeVals.push_back(FT->isVarArg());
- TypeVals.push_back(0); // FIXME: DEAD: remove in llvm 3.0
TypeVals.push_back(VE.getTypeID(FT->getReturnType()));
for (unsigned i =3D 0, e =3D FT->getNumParams(); i !=3D e; ++i)
TypeVals.push_back(VE.getTypeID(FT->getParamType(i)));
@@ -350,7 +358,6 @@
=20
static unsigned getEncodedLinkage(const GlobalValue *GV) {
switch (GV->getLinkage()) {
- default: llvm_unreachable("Invalid linkage!");
case GlobalValue::ExternalLinkage: return 0;
case GlobalValue::WeakAnyLinkage: return 1;
case GlobalValue::AppendingLinkage: return 2;
@@ -368,15 +375,16 @@
case GlobalValue::LinkerPrivateWeakLinkage: return 14;
case GlobalValue::LinkerPrivateWeakDefAutoLinkage: return 15;
}
+ llvm_unreachable("Invalid linkage");
}
=20
static unsigned getEncodedVisibility(const GlobalValue *GV) {
switch (GV->getVisibility()) {
- default: llvm_unreachable("Invalid visibility!");
case GlobalValue::DefaultVisibility: return 0;
case GlobalValue::HiddenVisibility: return 1;
case GlobalValue::ProtectedVisibility: return 2;
}
+ llvm_unreachable("Invalid visibility");
}
=20
// Emit top-level description of module, including target triple, inline a=
sm,
@@ -499,8 +507,8 @@
=20
// Emit the function proto information.
for (Module::const_iterator F =3D M->begin(), E =3D M->end(); F !=3D E; =
++F) {
- // FUNCTION: [type, callingconv, isproto, paramattr,
- // linkage, alignment, section, visibility, gc, unnamed_ad=
dr]
+ // FUNCTION: [type, callingconv, isproto, linkage, paramattrs, alignm=
ent,
+ // section, visibility, gc, unnamed_addr]
Vals.push_back(VE.getTypeID(F->getType()));
Vals.push_back(F->getCallingConv());
Vals.push_back(F->isDeclaration());
@@ -520,6 +528,7 @@
// Emit the alias information.
for (Module::const_alias_iterator AI =3D M->alias_begin(), E =3D M->alia=
s_end();
AI !=3D E; ++AI) {
+ // ALIAS: [alias type, aliasee val#, linkage, visibility]
Vals.push_back(VE.getTypeID(AI->getType()));
Vals.push_back(VE.getValueID(AI->getAliasee()));
Vals.push_back(getEncodedLinkage(AI));
@@ -819,7 +828,7 @@
} else if (const ConstantFP *CFP =3D dyn_cast<ConstantFP>(C)) {
Code =3D bitc::CST_CODE_FLOAT;
Type *Ty =3D CFP->getType();
- if (Ty->isFloatTy() || Ty->isDoubleTy()) {
+ if (Ty->isHalfTy() || Ty->isFloatTy() || Ty->isDoubleTy()) {
Record.push_back(CFP->getValueAPF().bitcastToAPInt().getZExtValue(=
));
} else if (Ty->isX86_FP80Ty()) {
// api needed to prevent premature destruction
@@ -836,34 +845,56 @@
} else {
assert (0 && "Unknown FP type!");
}
- } else if (isa<ConstantArray>(C) && cast<ConstantArray>(C)->isString()=
) {
- const ConstantArray *CA =3D cast<ConstantArray>(C);
+ } else if (isa<ConstantDataSequential>(C) &&
+ cast<ConstantDataSequential>(C)->isString()) {
+ const ConstantDataSequential *Str =3D cast<ConstantDataSequential>(C=
);
// Emit constant strings specially.
- unsigned NumOps =3D CA->getNumOperands();
+ unsigned NumElts =3D Str->getNumElements();
// If this is a null-terminated string, use the denser CSTRING encod=
ing.
- if (CA->getOperand(NumOps-1)->isNullValue()) {
+ if (Str->isCString()) {
Code =3D bitc::CST_CODE_CSTRING;
- --NumOps; // Don't encode the null, which isn't allowed by char6.
+ --NumElts; // Don't encode the null, which isn't allowed by char6.
} else {
Code =3D bitc::CST_CODE_STRING;
AbbrevToUse =3D String8Abbrev;
}
bool isCStr7 =3D Code =3D=3D bitc::CST_CODE_CSTRING;
bool isCStrChar6 =3D Code =3D=3D bitc::CST_CODE_CSTRING;
- for (unsigned i =3D 0; i !=3D NumOps; ++i) {
- unsigned char V =3D cast<ConstantInt>(CA->getOperand(i))->getZExtV=
alue();
+ for (unsigned i =3D 0; i !=3D NumElts; ++i) {
+ unsigned char V =3D Str->getElementAsInteger(i);
Record.push_back(V);
isCStr7 &=3D (V & 128) =3D=3D 0;
if (isCStrChar6)
isCStrChar6 =3D BitCodeAbbrevOp::isChar6(V);
}
-
+ =20
if (isCStrChar6)
AbbrevToUse =3D CString6Abbrev;
else if (isCStr7)
AbbrevToUse =3D CString7Abbrev;
- } else if (isa<ConstantArray>(C) || isa<ConstantStruct>(V) ||
- isa<ConstantVector>(V)) {
+ } else if (const ConstantDataSequential *CDS =3D=20
+ dyn_cast<ConstantDataSequential>(C)) {
+ Code =3D bitc::CST_CODE_DATA;
+ Type *EltTy =3D CDS->getType()->getElementType();
+ if (isa<IntegerType>(EltTy)) {
+ for (unsigned i =3D 0, e =3D CDS->getNumElements(); i !=3D e; ++i)
+ Record.push_back(CDS->getElementAsInteger(i));
+ } else if (EltTy->isFloatTy()) {
+ for (unsigned i =3D 0, e =3D CDS->getNumElements(); i !=3D e; ++i)=
{
+ union { float F; uint32_t I; };
+ F =3D CDS->getElementAsFloat(i);
+ Record.push_back(I);
+ }
+ } else {
+ assert(EltTy->isDoubleTy() && "Unknown ConstantData element type");
+ for (unsigned i =3D 0, e =3D CDS->getNumElements(); i !=3D e; ++i)=
{
+ union { double F; uint64_t I; };
+ F =3D CDS->getElementAsDouble(i);
+ Record.push_back(I);
+ }
+ }
+ } else if (isa<ConstantArray>(C) || isa<ConstantStruct>(C) ||
+ isa<ConstantVector>(C)) {
Code =3D bitc::CST_CODE_AGGREGATE;
for (unsigned i =3D 0, e =3D C->getNumOperands(); i !=3D e; ++i)
Record.push_back(VE.getValueID(C->getOperand(i)));
@@ -1105,10 +1136,18 @@
}
break;
case Instruction::Switch:
- Code =3D bitc::FUNC_CODE_INST_SWITCH;
- Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
- for (unsigned i =3D 0, e =3D I.getNumOperands(); i !=3D e; ++i)
- Vals.push_back(VE.getValueID(I.getOperand(i)));
+ {
+ Code =3D bitc::FUNC_CODE_INST_SWITCH;
+ SwitchInst &SI =3D cast<SwitchInst>(I);
+ Vals.push_back(VE.getTypeID(SI.getCondition()->getType()));
+ Vals.push_back(VE.getValueID(SI.getCondition()));
+ Vals.push_back(VE.getValueID(SI.getDefaultDest()));
+ for (SwitchInst::CaseIt i =3D SI.case_begin(), e =3D SI.case_end();
+ i !=3D e; ++i) {
+ Vals.push_back(VE.getValueID(i.getCaseValue()));
+ Vals.push_back(VE.getValueID(i.getCaseSuccessor()));
+ }
+ }
break;
case Instruction::IndirectBr:
Code =3D bitc::FUNC_CODE_INST_INDIRECTBR;
@@ -1146,9 +1185,6 @@
Code =3D bitc::FUNC_CODE_INST_RESUME;
PushValueAndType(I.getOperand(0), InstID, Vals, VE);
break;
- case Instruction::Unwind:
- Code =3D bitc::FUNC_CODE_INST_UNWIND;
- break;
case Instruction::Unreachable:
Code =3D bitc::FUNC_CODE_INST_UNREACHABLE;
AbbrevToUse =3D FUNCTION_INST_UNREACHABLE_ABBREV;
@@ -1573,6 +1609,102 @@
Stream.ExitBlock();
}
=20
+// Sort the Users based on the order in which the reader parses the bitcod=
e=20
+// file.
+static bool bitcodereader_order(const User *lhs, const User *rhs) {
+ // TODO: Implement.
+ return true;
+}
+
+static void WriteUseList(const Value *V, const ValueEnumerator &VE,
+ BitstreamWriter &Stream) {
+
+ // One or zero uses can't get out of order.
+ if (V->use_empty() || V->hasNUses(1))
+ return;
+
+ // Make a copy of the in-memory use-list for sorting.
+ unsigned UseListSize =3D std::distance(V->use_begin(), V->use_end());
+ SmallVector<const User*, 8> UseList;
+ UseList.reserve(UseListSize);
+ for (Value::const_use_iterator I =3D V->use_begin(), E =3D V->use_end();
+ I !=3D E; ++I) {
+ const User *U =3D *I;
+ UseList.push_back(U);
+ }
+
+ // Sort the copy based on the order read by the BitcodeReader.
+ std::sort(UseList.begin(), UseList.end(), bitcodereader_order);
+
+ // TODO: Generate a diff between the BitcodeWriter in-memory use-list an=
d the
+ // sorted list (i.e., the expected BitcodeReader in-memory use-list).
+
+ // TODO: Emit the USELIST_CODE_ENTRYs.
+}
+
+static void WriteFunctionUseList(const Function *F, ValueEnumerator &VE,
+ BitstreamWriter &Stream) {
+ VE.incorporateFunction(*F);
+
+ for (Function::const_arg_iterator AI =3D F->arg_begin(), AE =3D F->arg_e=
nd();
+ AI !=3D AE; ++AI)
+ WriteUseList(AI, VE, Stream);
+ for (Function::const_iterator BB =3D F->begin(), FE =3D F->end(); BB !=
=3D FE;
+ ++BB) {
+ WriteUseList(BB, VE, Stream);
+ for (BasicBlock::const_iterator II =3D BB->begin(), IE =3D BB->end(); =
II !=3D IE;
+ ++II) {
+ WriteUseList(II, VE, Stream);
+ for (User::const_op_iterator OI =3D II->op_begin(), E =3D II->op_end=
();
+ OI !=3D E; ++OI) {
+ if ((isa<Constant>(*OI) && !isa<GlobalValue>(*OI)) ||
+ isa<InlineAsm>(*OI))
+ WriteUseList(*OI, VE, Stream);
+ }
+ }
+ }
+ VE.purgeFunction();
+}
+
+// Emit use-lists.
+static void WriteModuleUseLists(const Module *M, ValueEnumerator &VE,
+ BitstreamWriter &Stream) {
+ Stream.EnterSubblock(bitc::USELIST_BLOCK_ID, 3);
+
+ // XXX: this modifies the module, but in a way that should never change =
the
+ // behavior of any pass or codegen in LLVM. The problem is that GVs may
+ // contain entries in the use_list that do not exist in the Module and a=
re
+ // not stored in the .bc file.
+ for (Module::const_global_iterator I =3D M->global_begin(), E =3D M->glo=
bal_end();
+ I !=3D E; ++I)
+ I->removeDeadConstantUsers();
+ =20
+ // Write the global variables.
+ for (Module::const_global_iterator GI =3D M->global_begin(),=20
+ GE =3D M->global_end(); GI !=3D GE; ++GI) {
+ WriteUseList(GI, VE, Stream);
+
+ // Write the global variable initializers.
+ if (GI->hasInitializer())
+ WriteUseList(GI->getInitializer(), VE, Stream);
+ }
+
+ // Write the functions.
+ for (Module::const_iterator FI =3D M->begin(), FE =3D M->end(); FI !=3D =
FE; ++FI) {
+ WriteUseList(FI, VE, Stream);
+ if (!FI->isDeclaration())
+ WriteFunctionUseList(FI, VE, Stream);
+ }
+
+ // Write the aliases.
+ for (Module::const_alias_iterator AI =3D M->alias_begin(), AE =3D M->ali=
as_end();
+ AI !=3D AE; ++AI) {
+ WriteUseList(AI, VE, Stream);
+ WriteUseList(AI->getAliasee(), VE, Stream);
+ }
+
+ Stream.ExitBlock();
+}
=20
/// WriteModule - Emit the specified module to the bitstream.
static void WriteModule(const Module *M, BitstreamWriter &Stream) {
@@ -1607,17 +1739,21 @@
// Emit metadata.
WriteModuleMetadata(M, VE, Stream);
=20
- // Emit function bodies.
- for (Module::const_iterator F =3D M->begin(), E =3D M->end(); F !=3D E; =
++F)
- if (!F->isDeclaration())
- WriteFunction(*F, VE, Stream);
-
// Emit metadata.
WriteModuleMetadataStore(M, Stream);
=20
// Emit names for globals/functions etc.
WriteValueSymbolTable(M->getValueSymbolTable(), VE, Stream);
=20
+ // Emit use-lists.
+ if (EnablePreserveUseListOrdering)
+ WriteModuleUseLists(M, VE, Stream);
+
+ // Emit function bodies.
+ for (Module::const_iterator F =3D M->begin(), E =3D M->end(); F !=3D E; =
++F)
+ if (!F->isDeclaration())
+ WriteFunction(*F, VE, Stream);
+
Stream.ExitBlock();
}
=20
@@ -1639,7 +1775,17 @@
DarwinBCHeaderSize =3D 5*4
};
=20
-static void EmitDarwinBCHeader(BitstreamWriter &Stream, const Triple &TT) {
+static void WriteInt32ToBuffer(uint32_t Value, SmallVectorImpl<char> &Buff=
er,
+ uint32_t &Position) {
+ Buffer[Position + 0] =3D (unsigned char) (Value >> 0);
+ Buffer[Position + 1] =3D (unsigned char) (Value >> 8);
+ Buffer[Position + 2] =3D (unsigned char) (Value >> 16);
+ Buffer[Position + 3] =3D (unsigned char) (Value >> 24);
+ Position +=3D 4;
+}
+
+static void EmitDarwinBCHeaderAndTrailer(SmallVectorImpl<char> &Buffer,
+ const Triple &TT) {
unsigned CPUType =3D ~0U;
=20
// Match x86_64-*, i[3-9]86-*, powerpc-*, powerpc64-*, arm-*, thumb-*,
@@ -1666,63 +1812,55 @@
CPUType =3D DARWIN_CPU_TYPE_ARM;
=20
// Traditional Bitcode starts after header.
+ assert(Buffer.size() >=3D DarwinBCHeaderSize &&
+ "Expected header size to be reserved");
unsigned BCOffset =3D DarwinBCHeaderSize;
+ unsigned BCSize =3D Buffer.size()-DarwinBCHeaderSize;
=20
- Stream.Emit(0x0B17C0DE, 32);
- Stream.Emit(0 , 32); // Version.
- Stream.Emit(BCOffset , 32);
- Stream.Emit(0 , 32); // Filled in later.
- Stream.Emit(CPUType , 32);
-}
-
-/// EmitDarwinBCTrailer - Emit the darwin epilog after the bitcode file and
-/// finalize the header.
-static void EmitDarwinBCTrailer(BitstreamWriter &Stream, unsigned BufferSi=
ze) {
- // Update the size field in the header.
- Stream.BackpatchWord(DarwinBCSizeFieldOffset, BufferSize-DarwinBCHeaderS=
ize);
+ // Write the magic and version.
+ unsigned Position =3D 0;
+ WriteInt32ToBuffer(0x0B17C0DE , Buffer, Position);
+ WriteInt32ToBuffer(0 , Buffer, Position); // Version.
+ WriteInt32ToBuffer(BCOffset , Buffer, Position);
+ WriteInt32ToBuffer(BCSize , Buffer, Position);
+ WriteInt32ToBuffer(CPUType , Buffer, Position);
=20
// If the file is not a multiple of 16 bytes, insert dummy padding.
- while (BufferSize & 15) {
- Stream.Emit(0, 8);
- ++BufferSize;
- }
+ while (Buffer.size() & 15)
+ Buffer.push_back(0);
}
=20
-
/// WriteBitcodeToFile - Write the specified module to the specified output
/// stream.
void llvm::WriteBitcodeToFile(const Module *M, raw_ostream &Out) {
- std::vector<unsigned char> Buffer;
- BitstreamWriter Stream(Buffer);
-
+ SmallVector<char, 1024> Buffer;
Buffer.reserve(256*1024);
=20
- WriteBitcodeToStream( M, Stream );
+ // If this is darwin or another generic macho target, reserve space for =
the
+ // header.
+ Triple TT(M->getTargetTriple());
+ if (TT.isOSDarwin())
+ Buffer.insert(Buffer.begin(), DarwinBCHeaderSize, 0);
+
+ // Emit the module into the buffer.
+ {
+ BitstreamWriter Stream(Buffer);
+
+ // Emit the file header.
+ Stream.Emit((unsigned)'B', 8);
+ Stream.Emit((unsigned)'C', 8);
+ Stream.Emit(0x0, 4);
+ Stream.Emit(0xC, 4);
+ Stream.Emit(0xE, 4);
+ Stream.Emit(0xD, 4);
+
+ // Emit the module.
+ WriteModule(M, Stream);
+ }
+
+ if (TT.isOSDarwin())
+ EmitDarwinBCHeaderAndTrailer(Buffer, TT);
=20
// Write the generated bitstream to "Out".
Out.write((char*)&Buffer.front(), Buffer.size());
}
-
-/// WriteBitcodeToStream - Write the specified module to the specified out=
put
-/// stream.
-void llvm::WriteBitcodeToStream(const Module *M, BitstreamWriter &Stream) {
- // If this is darwin or another generic macho target, emit a file header=
and
- // trailer if needed.
- Triple TT(M->getTargetTriple());
- if (TT.isOSDarwin())
- EmitDarwinBCHeader(Stream, TT);
-
- // Emit the file header.
- Stream.Emit((unsigned)'B', 8);
- Stream.Emit((unsigned)'C', 8);
- Stream.Emit(0x0, 4);
- Stream.Emit(0xC, 4);
- Stream.Emit(0xE, 4);
- Stream.Emit(0xD, 4);
-
- // Emit the module.
- WriteModule(M, Stream);
-
- if (TT.isOSDarwin())
- EmitDarwinBCTrailer(Stream, Stream.getBuffer().size());
-}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Bitcode/Writer/V=
alueEnumerator.cpp
--- a/head/contrib/llvm/lib/Bitcode/Writer/ValueEnumerator.cpp Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Bitcode/Writer/ValueEnumerator.cpp Tue Apr 17 1=
1:51:51 2012 +0300
@@ -19,6 +19,8 @@
#include "llvm/Module.h"
#include "llvm/ValueSymbolTable.h"
#include "llvm/Instructions.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/raw_ostream.h"
#include <algorithm>
using namespace llvm;
=20
@@ -107,7 +109,6 @@
OptimizeConstants(FirstConstant, Values.size());
}
=20
-
unsigned ValueEnumerator::getInstructionID(const Instruction *Inst) const {
InstructionMapType::const_iterator I =3D InstructionMap.find(Inst);
assert(I !=3D InstructionMap.end() && "Instruction is not mapped!");
@@ -130,6 +131,43 @@
return I->second-1;
}
=20
+void ValueEnumerator::dump() const {
+ print(dbgs(), ValueMap, "Default");
+ dbgs() << '\n';
+ print(dbgs(), MDValueMap, "MetaData");
+ dbgs() << '\n';
+}
+
+void ValueEnumerator::print(raw_ostream &OS, const ValueMapType &Map,
+ const char *Name) const {
+
+ OS << "Map Name: " << Name << "\n";
+ OS << "Size: " << Map.size() << "\n";
+ for (ValueMapType::const_iterator I =3D Map.begin(),
+ E =3D Map.end(); I !=3D E; ++I) {
+
+ const Value *V =3D I->first;
+ if (V->hasName())
+ OS << "Value: " << V->getName();
+ else
+ OS << "Value: [null]\n";
+ V->dump();
+
+ OS << " Uses(" << std::distance(V->use_begin(),V->use_end()) << "):";
+ for (Value::const_use_iterator UI =3D V->use_begin(), UE =3D V->use_en=
d();
+ UI !=3D UE; ++UI) {
+ if (UI !=3D V->use_begin())
+ OS << ",";
+ if((*UI)->hasName())
+ OS << " " << (*UI)->getName();
+ else
+ OS << " [null]";
+
+ }
+ OS << "\n\n";
+ }
+}
+
// Optimize constant ordering.
namespace {
struct CstSortPredicate {
@@ -283,10 +321,6 @@
if (const Constant *C =3D dyn_cast<Constant>(V)) {
if (isa<GlobalValue>(C)) {
// Initializers for globals are handled explicitly elsewhere.
- } else if (isa<ConstantArray>(C) && cast<ConstantArray>(C)->isString()=
) {
- // Do not enumerate the initializers for an array of simple characte=
rs.
- // The initializers just pollute the value table, and we emit the st=
rings
- // specially.
} else if (C->getNumOperands()) {
// If a constant has operands, enumerate them. This makes sure that=
if a
// constant has uses (for example an array of const ints), that they=
are
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/Bitcode/Writer/V=
alueEnumerator.h
--- a/head/contrib/llvm/lib/Bitcode/Writer/ValueEnumerator.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/lib/Bitcode/Writer/ValueEnumerator.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -32,6 +32,7 @@
class AttrListPtr;
class ValueSymbolTable;
class MDSymbolTable;
+class raw_ostream;
=20
class ValueEnumerator {
public:
@@ -83,6 +84,9 @@
public:
ValueEnumerator(const Module *M);
=20
+ void dump() const;
+ void print(raw_ostream &OS, const ValueMapType &Map, const char *Name) c=
onst;
+
unsigned getValueID(const Value *V) const;
=20
unsigned getTypeID(Type *T) const {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Aggressi=
veAntiDepBreaker.cpp
--- a/head/contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp Tue Apr 17=
11:51:51 2012 +0300
@@ -148,7 +148,7 @@
assert(State =3D=3D NULL);
State =3D new AggressiveAntiDepState(TRI->getNumRegs(), BB);
=20
- bool IsReturnBlock =3D (!BB->empty() && BB->back().getDesc().isReturn());
+ bool IsReturnBlock =3D (!BB->empty() && BB->back().isReturn());
std::vector<unsigned> &KillIndices =3D State->GetKillIndices();
std::vector<unsigned> &DefIndices =3D State->GetDefIndices();
=20
@@ -157,7 +157,7 @@
// In a return block, examine the function live-out regs.
for (MachineRegisterInfo::liveout_iterator I =3D MRI.liveout_begin(),
E =3D MRI.liveout_end(); I !=3D E; ++I) {
- for (const unsigned *Alias =3D TRI->getOverlaps(*I);
+ for (const uint16_t *Alias =3D TRI->getOverlaps(*I);
unsigned Reg =3D *Alias; ++Alias) {
State->UnionGroups(Reg, 0);
KillIndices[Reg] =3D BB->size();
@@ -173,7 +173,7 @@
SE =3D BB->succ_end(); SI !=3D SE; ++SI)
for (MachineBasicBlock::livein_iterator I =3D (*SI)->livein_begin(),
E =3D (*SI)->livein_end(); I !=3D E; ++I) {
- for (const unsigned *Alias =3D TRI->getOverlaps(*I);
+ for (const uint16_t *Alias =3D TRI->getOverlaps(*I);
unsigned Reg =3D *Alias; ++Alias) {
State->UnionGroups(Reg, 0);
KillIndices[Reg] =3D BB->size();
@@ -186,10 +186,10 @@
// callee-saved register that is not saved in the prolog.
const MachineFrameInfo *MFI =3D MF.getFrameInfo();
BitVector Pristine =3D MFI->getPristineRegs(BB);
- for (const unsigned *I =3D TRI->getCalleeSavedRegs(); *I; ++I) {
+ for (const uint16_t *I =3D TRI->getCalleeSavedRegs(&MF); *I; ++I) {
unsigned Reg =3D *I;
if (!IsReturnBlock && !Pristine.test(Reg)) continue;
- for (const unsigned *Alias =3D TRI->getOverlaps(Reg);
+ for (const uint16_t *Alias =3D TRI->getOverlaps(Reg);
unsigned AliasReg =3D *Alias; ++Alias) {
State->UnionGroups(AliasReg, 0);
KillIndices[AliasReg] =3D BB->size();
@@ -265,7 +265,7 @@
IsImplicitDefUse(MI, MO)) {
const unsigned Reg =3D MO.getReg();
PassthruRegs.insert(Reg);
- for (const unsigned *Subreg =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *Subreg =3D TRI->getSubRegisters(Reg);
*Subreg; ++Subreg) {
PassthruRegs.insert(*Subreg);
}
@@ -333,7 +333,7 @@
DEBUG(dbgs() << "->g" << State->GetGroup(Reg) << tag);
}
// Repeat for subregisters.
- for (const unsigned *Subreg =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *Subreg =3D TRI->getSubRegisters(Reg);
*Subreg; ++Subreg) {
unsigned SubregReg =3D *Subreg;
if (!State->IsLive(SubregReg)) {
@@ -384,7 +384,7 @@
// If MI's defs have a special allocation requirement, don't allow
// any def registers to be changed. Also assume all registers
// defined in a call must not be changed (ABI).
- if (MI->getDesc().isCall() || MI->getDesc().hasExtraDefRegAllocReq() ||
+ if (MI->isCall() || MI->hasExtraDefRegAllocReq() ||
TII->isPredicated(MI)) {
DEBUG(if (State->GetGroup(Reg) !=3D 0) dbgs() << "->g0(alloc-req)");
State->UnionGroups(Reg, 0);
@@ -392,7 +392,7 @@
=20
// Any aliased that are live at this point are completely or
// partially defined here, so group those aliases with Reg.
- for (const unsigned *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alias)=
{
+ for (const uint16_t *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alias)=
{
unsigned AliasReg =3D *Alias;
if (State->IsLive(AliasReg)) {
State->UnionGroups(Reg, AliasReg);
@@ -423,7 +423,7 @@
continue;
=20
// Update def for Reg and aliases.
- for (const unsigned *Alias =3D TRI->getOverlaps(Reg);
+ for (const uint16_t *Alias =3D TRI->getOverlaps(Reg);
unsigned AliasReg =3D *Alias; ++Alias)
DefIndices[AliasReg] =3D Count;
}
@@ -451,8 +451,8 @@
// instruction which may not be executed. The second R6 def may or may n=
ot
// re-define R6 so it's not safe to change it since the last R6 use cann=
ot be
// changed.
- bool Special =3D MI->getDesc().isCall() ||
- MI->getDesc().hasExtraSrcRegAllocReq() ||
+ bool Special =3D MI->isCall() ||
+ MI->hasExtraSrcRegAllocReq() ||
TII->isPredicated(MI);
=20
// Scan the register uses for this instruction and update
@@ -678,7 +678,7 @@
goto next_super_reg;
} else {
bool found =3D false;
- for (const unsigned *Alias =3D TRI->getAliasSet(NewReg);
+ for (const uint16_t *Alias =3D TRI->getAliasSet(NewReg);
*Alias; ++Alias) {
unsigned AliasReg =3D *Alias;
if (State->IsLive(AliasReg) ||
@@ -780,6 +780,9 @@
I !=3D E; --Count) {
MachineInstr *MI =3D --I;
=20
+ if (MI->isDebugValue())
+ continue;
+
DEBUG(dbgs() << "Anti: ");
DEBUG(MI->dump());
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Allocati=
onOrder.cpp
--- a/head/contrib/llvm/lib/CodeGen/AllocationOrder.cpp Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/AllocationOrder.cpp Tue Apr 17 11:51:51=
2012 +0300
@@ -41,7 +41,7 @@
if (HintPair.first) {
const TargetRegisterInfo &TRI =3D VRM.getTargetRegInfo();
// The remaining allocation order may depend on the hint.
- ArrayRef<unsigned> Order =3D
+ ArrayRef<uint16_t> Order =3D
TRI.getRawAllocationOrder(RC, HintPair.first, Hint,
VRM.getMachineFunction());
if (Order.empty())
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Allocati=
onOrder.h
--- a/head/contrib/llvm/lib/CodeGen/AllocationOrder.h Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/AllocationOrder.h Tue Apr 17 11:51:51 2=
012 +0300
@@ -34,8 +34,7 @@
/// AllocationOrder - Create a new AllocationOrder for VirtReg.
/// @param VirtReg Virtual register to allocate for.
/// @param VRM Virtual register map for function.
- /// @param ReservedRegs Set of reserved registers as returned by
- /// TargetRegisterInfo::getReservedRegs().
+ /// @param RegClassInfo Information about reserved and allocatable regis=
ters.
AllocationOrder(unsigned VirtReg,
const VirtRegMap &VRM,
const RegisterClassInfo &RegClassInfo);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Analysis=
.cpp
--- a/head/contrib/llvm/lib/CodeGen/Analysis.cpp Tue Apr 17 11:36:47 2012 +=
0300
+++ b/head/contrib/llvm/lib/CodeGen/Analysis.cpp Tue Apr 17 11:51:51 2012 +=
0300
@@ -1,4 +1,4 @@
-//=3D=3D=3D-- Analysis.cpp - CodeGen LLVM IR Analysis Utilities --*- C++ -=
-----*-=3D=3D=3D//
+//=3D=3D=3D-- Analysis.cpp - CodeGen LLVM IR Analysis Utilities ----------=
-------=3D=3D=3D//
//
// The LLVM Compiler Infrastructure
//
@@ -12,6 +12,7 @@
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
#include "llvm/CodeGen/Analysis.h"
+#include "llvm/Analysis/ValueTracking.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Function.h"
#include "llvm/Instructions.h"
@@ -149,33 +150,37 @@
/// consideration of global floating-point math flags.
///
ISD::CondCode llvm::getFCmpCondCode(FCmpInst::Predicate Pred) {
- ISD::CondCode FPC, FOC;
switch (Pred) {
- case FCmpInst::FCMP_FALSE: FOC =3D FPC =3D ISD::SETFALSE; break;
- case FCmpInst::FCMP_OEQ: FOC =3D ISD::SETEQ; FPC =3D ISD::SETOEQ; brea=
k;
- case FCmpInst::FCMP_OGT: FOC =3D ISD::SETGT; FPC =3D ISD::SETOGT; brea=
k;
- case FCmpInst::FCMP_OGE: FOC =3D ISD::SETGE; FPC =3D ISD::SETOGE; brea=
k;
- case FCmpInst::FCMP_OLT: FOC =3D ISD::SETLT; FPC =3D ISD::SETOLT; brea=
k;
- case FCmpInst::FCMP_OLE: FOC =3D ISD::SETLE; FPC =3D ISD::SETOLE; brea=
k;
- case FCmpInst::FCMP_ONE: FOC =3D ISD::SETNE; FPC =3D ISD::SETONE; brea=
k;
- case FCmpInst::FCMP_ORD: FOC =3D FPC =3D ISD::SETO; break;
- case FCmpInst::FCMP_UNO: FOC =3D FPC =3D ISD::SETUO; break;
- case FCmpInst::FCMP_UEQ: FOC =3D ISD::SETEQ; FPC =3D ISD::SETUEQ; brea=
k;
- case FCmpInst::FCMP_UGT: FOC =3D ISD::SETGT; FPC =3D ISD::SETUGT; brea=
k;
- case FCmpInst::FCMP_UGE: FOC =3D ISD::SETGE; FPC =3D ISD::SETUGE; brea=
k;
- case FCmpInst::FCMP_ULT: FOC =3D ISD::SETLT; FPC =3D ISD::SETULT; brea=
k;
- case FCmpInst::FCMP_ULE: FOC =3D ISD::SETLE; FPC =3D ISD::SETULE; brea=
k;
- case FCmpInst::FCMP_UNE: FOC =3D ISD::SETNE; FPC =3D ISD::SETUNE; brea=
k;
- case FCmpInst::FCMP_TRUE: FOC =3D FPC =3D ISD::SETTRUE; break;
- default:
- llvm_unreachable("Invalid FCmp predicate opcode!");
- FOC =3D FPC =3D ISD::SETFALSE;
- break;
+ case FCmpInst::FCMP_FALSE: return ISD::SETFALSE;
+ case FCmpInst::FCMP_OEQ: return ISD::SETOEQ;
+ case FCmpInst::FCMP_OGT: return ISD::SETOGT;
+ case FCmpInst::FCMP_OGE: return ISD::SETOGE;
+ case FCmpInst::FCMP_OLT: return ISD::SETOLT;
+ case FCmpInst::FCMP_OLE: return ISD::SETOLE;
+ case FCmpInst::FCMP_ONE: return ISD::SETONE;
+ case FCmpInst::FCMP_ORD: return ISD::SETO;
+ case FCmpInst::FCMP_UNO: return ISD::SETUO;
+ case FCmpInst::FCMP_UEQ: return ISD::SETUEQ;
+ case FCmpInst::FCMP_UGT: return ISD::SETUGT;
+ case FCmpInst::FCMP_UGE: return ISD::SETUGE;
+ case FCmpInst::FCMP_ULT: return ISD::SETULT;
+ case FCmpInst::FCMP_ULE: return ISD::SETULE;
+ case FCmpInst::FCMP_UNE: return ISD::SETUNE;
+ case FCmpInst::FCMP_TRUE: return ISD::SETTRUE;
+ default: llvm_unreachable("Invalid FCmp predicate opcode!");
}
- if (NoNaNsFPMath)
- return FOC;
- else
- return FPC;
+}
+
+ISD::CondCode llvm::getFCmpCodeWithoutNaN(ISD::CondCode CC) {
+ switch (CC) {
+ case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ;
+ case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE;
+ case ISD::SETOLT: case ISD::SETULT: return ISD::SETLT;
+ case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE;
+ case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT;
+ case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE;
+ default: return CC;
+ }
}
=20
/// getICmpCondCode - Return the ISD condition code corresponding to
@@ -195,7 +200,6 @@
case ICmpInst::ICMP_UGT: return ISD::SETUGT;
default:
llvm_unreachable("Invalid ICmp predicate opcode!");
- return ISD::SETNE;
}
}
=20
@@ -221,12 +225,13 @@
// longjmp on x86), it can end up causing miscompilation that has not
// been fully understood.
if (!Ret &&
- (!GuaranteedTailCallOpt || !isa<UnreachableInst>(Term))) return fals=
e;
+ (!TLI.getTargetMachine().Options.GuaranteedTailCallOpt ||
+ !isa<UnreachableInst>(Term))) return false;
=20
// If I will have a chain, make sure no other instruction that will have=
a
// chain interposes between I and the return.
if (I->mayHaveSideEffects() || I->mayReadFromMemory() ||
- !I->isSafeToSpeculativelyExecute())
+ !isSafeToSpeculativelyExecute(I))
for (BasicBlock::const_iterator BBI =3D prior(prior(ExitBB->end())); ;
--BBI) {
if (&*BBI =3D=3D I)
@@ -235,7 +240,7 @@
if (isa<DbgInfoIntrinsic>(BBI))
continue;
if (BBI->mayHaveSideEffects() || BBI->mayReadFromMemory() ||
- !BBI->isSafeToSpeculativelyExecute())
+ !isSafeToSpeculativelyExecute(BBI))
return false;
}
=20
@@ -250,7 +255,7 @@
// Conservatively require the attributes of the call to match those of
// the return. Ignore noalias because it doesn't affect the call sequenc=
e.
const Function *F =3D ExitBB->getParent();
- unsigned CallerRetAttr =3D F->getAttributes().getRetAttributes();
+ Attributes CallerRetAttr =3D F->getAttributes().getRetAttributes();
if ((CalleeRetAttr ^ CallerRetAttr) & ~Attribute::NoAlias)
return false;
=20
@@ -285,12 +290,12 @@
}
=20
bool llvm::isInTailCallPosition(SelectionDAG &DAG, SDNode *Node,
- const TargetLowering &TLI) {
+ SDValue &Chain, const TargetLowering &TLI)=
{
const Function *F =3D DAG.getMachineFunction().getFunction();
=20
// Conservatively require the attributes of the call to match those of
// the return. Ignore noalias because it doesn't affect the call sequenc=
e.
- unsigned CallerRetAttr =3D F->getAttributes().getRetAttributes();
+ Attributes CallerRetAttr =3D F->getAttributes().getRetAttributes();
if (CallerRetAttr & ~Attribute::NoAlias)
return false;
=20
@@ -299,5 +304,5 @@
return false;
=20
// Check if the only use is a function return node.
- return TLI.isUsedByReturnOnly(Node);
+ return TLI.isUsedByReturnOnly(Node, Chain);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/AsmPrint=
er/ARMException.cpp
--- a/head/contrib/llvm/lib/CodeGen/AsmPrinter/ARMException.cpp Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/AsmPrinter/ARMException.cpp Tue Apr 17 =
11:51:51 2012 +0300
@@ -29,6 +29,7 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Dwarf.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/ADT/SmallString.h"
@@ -36,6 +37,12 @@
#include "llvm/ADT/Twine.h"
using namespace llvm;
=20
+cl::opt<bool>
+EnableARMEHABIDescriptors("arm-enable-ehabi-descriptors", cl::Hidden,
+ cl::desc("Generate ARM EHABI tables with unwinding descriptors"),
+ cl::init(false));
+
+
ARMException::ARMException(AsmPrinter *A)
: DwarfException(A),
shouldEmitTable(false), shouldEmitMoves(false), shouldEmitTableModule(=
false)
@@ -72,13 +79,15 @@
Asm->OutStreamer.EmitPersonality(PerSym);
}
=20
- // Map all labels and get rid of any dead landing pads.
- MMI->TidyLandingPads();
+ if (EnableARMEHABIDescriptors) {
+ // Map all labels and get rid of any dead landing pads.
+ MMI->TidyLandingPads();
=20
- Asm->OutStreamer.EmitHandlerData();
+ Asm->OutStreamer.EmitHandlerData();
=20
- // Emit actual exception table
- EmitExceptionTable();
+ // Emit actual exception table
+ EmitExceptionTable();
+ }
}
=20
Asm->OutStreamer.EmitFnEnd();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/AsmPrint=
er/AsmPrinter.cpp
--- a/head/contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Tue Apr 17 11=
:51:51 2012 +0300
@@ -100,6 +100,7 @@
OutStreamer(Streamer),
LastMI(0), LastFn(0), Counter(~0U), SetCounter(0) {
DD =3D 0; DE =3D 0; MMI =3D 0; LI =3D 0;
+ CurrentFnSym =3D CurrentFnSymForSize =3D 0;
GCMetadataPrinters =3D 0;
VerboseAsm =3D Streamer.isVerboseAsm();
}
@@ -613,6 +614,10 @@
MF->getFunction()->needsUnwindTableEntry();
}
=20
+bool AsmPrinter::needsRelocationsForDwarfStringPool() const {
+ return MAI->doesDwarfUseRelocationsForStringPool();
+}
+
void AsmPrinter::emitPrologLabel(const MachineInstr &MI) {
MCSymbol *Label =3D MI.getOperand(0).getMCSymbol();
=20
@@ -732,6 +737,18 @@
OutStreamer.EmitRawText(StringRef("\tnop\n"));
}
=20
+ const Function *F =3D MF->getFunction();
+ for (Function::const_iterator i =3D F->begin(), e =3D F->end(); i !=3D e=
; ++i) {
+ const BasicBlock *BB =3D i;
+ if (!BB->hasAddressTaken())
+ continue;
+ MCSymbol *Sym =3D GetBlockAddressSymbol(BB);
+ if (Sym->isDefined())
+ continue;
+ OutStreamer.AddComment("Address of block that was removed by CodeGen");
+ OutStreamer.EmitLabel(Sym);
+ }
+
// Emit target-specific gunk after the function body.
EmitFunctionBodyEnd();
=20
@@ -745,7 +762,8 @@
=20
const MCExpr *SizeExp =3D
MCBinaryExpr::CreateSub(MCSymbolRefExpr::Create(FnEndLabel, OutConte=
xt),
- MCSymbolRefExpr::Create(CurrentFnSym, OutCon=
text),
+ MCSymbolRefExpr::Create(CurrentFnSymForSize,
+ OutContext),
OutContext);
OutStreamer.EmitELFSize(CurrentFnSym, SizeExp);
}
@@ -780,7 +798,7 @@
const TargetRegisterInfo *TRI =3D TM.getRegisterInfo();
int Reg =3D TRI->getDwarfRegNum(MLoc.getReg(), false);
=20
- for (const unsigned *SR =3D TRI->getSuperRegisters(MLoc.getReg());
+ for (const uint16_t *SR =3D TRI->getSuperRegisters(MLoc.getReg());
*SR && Reg < 0; ++SR) {
Reg =3D TRI->getDwarfRegNum(*SR, false);
// FIXME: Get the bit range this register uses of the superregister
@@ -841,6 +859,12 @@
EmitVisibility(Name, V, false);
}
=20
+ // Emit module flags.
+ SmallVector<Module::ModuleFlagEntry, 8> ModuleFlags;
+ M.getModuleFlagsMetadata(ModuleFlags);
+ if (!ModuleFlags.empty())
+ getObjFileLowering().emitModuleFlags(OutStreamer, ModuleFlags, Mang, T=
M);
+
// Finalize debug and EH information.
if (DE) {
{
@@ -929,6 +953,7 @@
this->MF =3D &MF;
// Get the function symbol.
CurrentFnSym =3D Mang->getSymbol(MF.getFunction());
+ CurrentFnSymForSize =3D CurrentFnSym;
=20
if (isVerbose())
LI =3D &getAnalysis<MachineLoopInfo>();
@@ -1120,7 +1145,7 @@
const MCExpr *Value =3D 0;
switch (MJTI->getEntryKind()) {
case MachineJumpTableInfo::EK_Inline:
- llvm_unreachable("Cannot emit EK_Inline jump table entry"); break;
+ llvm_unreachable("Cannot emit EK_Inline jump table entry");
case MachineJumpTableInfo::EK_Custom32:
Value =3D TM.getTargetLowering()->LowerCustomJumpTableEntry(MJTI, MBB,=
UID,
OutContext);
@@ -1139,6 +1164,15 @@
return;
}
=20
+ case MachineJumpTableInfo::EK_GPRel64BlockAddress: {
+ // EK_GPRel64BlockAddress - Each entry is an address of block, encoded
+ // with a relocation as gp-relative, e.g.:
+ // .gpdword LBB123
+ MCSymbol *MBBSym =3D MBB->getSymbol();
+ OutStreamer.EmitGPRel64Value(MCSymbolRefExpr::Create(MBBSym, OutContex=
t));
+ return;
+ }
+
case MachineJumpTableInfo::EK_LabelDifference32: {
// EK_LabelDifference32 - Each entry is the address of the block minus
// the address of the jump table. This is used for PIC jump tables wh=
ere
@@ -1191,12 +1225,8 @@
=20
assert(GV->hasInitializer() && "Not a special LLVM global!");
=20
- const TargetData *TD =3D TM.getTargetData();
- unsigned Align =3D Log2_32(TD->getPointerPrefAlignment());
if (GV->getName() =3D=3D "llvm.global_ctors") {
- OutStreamer.SwitchSection(getObjFileLowering().getStaticCtorSection());
- EmitAlignment(Align);
- EmitXXStructorList(GV->getInitializer());
+ EmitXXStructorList(GV->getInitializer(), /* isCtor */ true);
=20
if (TM.getRelocationModel() =3D=3D Reloc::Static &&
MAI->hasStaticCtorDtorReferenceInStaticMode()) {
@@ -1208,9 +1238,7 @@
}
=20
if (GV->getName() =3D=3D "llvm.global_dtors") {
- OutStreamer.SwitchSection(getObjFileLowering().getStaticDtorSection());
- EmitAlignment(Align);
- EmitXXStructorList(GV->getInitializer());
+ EmitXXStructorList(GV->getInitializer(), /* isCtor */ false);
=20
if (TM.getRelocationModel() =3D=3D Reloc::Static &&
MAI->hasStaticCtorDtorReferenceInStaticMode()) {
@@ -1240,7 +1268,7 @@
}
}
=20
-typedef std::pair<int, Constant*> Structor;
+typedef std::pair<unsigned, Constant*> Structor;
=20
static bool priority_order(const Structor& lhs, const Structor& rhs) {
return lhs.first < rhs.first;
@@ -1248,7 +1276,7 @@
=20
/// EmitXXStructorList - Emit the ctor or dtor list taking into account th=
e init
/// priority.
-void AsmPrinter::EmitXXStructorList(const Constant *List) {
+void AsmPrinter::EmitXXStructorList(const Constant *List, bool isCtor) {
// Should be an array of '{ int, void ()* }' structs. The first value i=
s the
// init priority.
if (!isa<ConstantArray>(List)) return;
@@ -1274,19 +1302,20 @@
CS->getOperand(1)));
}
=20
- // Emit the function pointers in reverse priority order.
- switch (MAI->getStructorOutputOrder()) {
- case Structors::None:
- break;
- case Structors::PriorityOrder:
- std::sort(Structors.begin(), Structors.end(), priority_order);
- break;
- case Structors::ReversePriorityOrder:
- std::sort(Structors.rbegin(), Structors.rend(), priority_order);
- break;
+ // Emit the function pointers in the target-specific order
+ const TargetData *TD =3D TM.getTargetData();
+ unsigned Align =3D Log2_32(TD->getPointerPrefAlignment());
+ std::stable_sort(Structors.begin(), Structors.end(), priority_order);
+ for (unsigned i =3D 0, e =3D Structors.size(); i !=3D e; ++i) {
+ const MCSection *OutputSection =3D
+ (isCtor ?
+ getObjFileLowering().getStaticCtorSection(Structors[i].first) :
+ getObjFileLowering().getStaticDtorSection(Structors[i].first));
+ OutStreamer.SwitchSection(OutputSection);
+ if (OutStreamer.getCurrentSection() !=3D OutStreamer.getPreviousSectio=
n())
+ EmitAlignment(Align);
+ EmitXXStructor(Structors[i].second);
}
- for (unsigned i =3D 0, e =3D Structors.size(); i !=3D e; ++i)
- EmitGlobalConstant(Structors[i].second);
}
=20
//=3D=3D=3D---------------------------------------------------------------=
-----=3D=3D=3D//
@@ -1423,7 +1452,6 @@
const ConstantExpr *CE =3D dyn_cast<ConstantExpr>(CV);
if (CE =3D=3D 0) {
llvm_unreachable("Unknown constant value to lower!");
- return MCConstantExpr::Create(0, Ctx);
}
=20
switch (CE->getOpcode()) {
@@ -1445,7 +1473,6 @@
!AP.MF ? 0 : AP.MF->getFunction()->getParent());
report_fatal_error(OS.str());
}
- return MCConstantExpr::Create(0, Ctx);
case Instruction::GetElementPtr: {
const TargetData &TD =3D *AP.TM.getTargetData();
// Generate a symbolic expression for the byte address
@@ -1543,6 +1570,19 @@
/// isRepeatedByteSequence - Determine whether the given value is
/// composed of a repeated sequence of identical bytes and return the
/// byte value. If it is not a repeated sequence, return -1.
+static int isRepeatedByteSequence(const ConstantDataSequential *V) {
+ StringRef Data =3D V->getRawDataValues();
+ assert(!Data.empty() && "Empty aggregates should be CAZ node");
+ char C =3D Data[0];
+ for (unsigned i =3D 1, e =3D Data.size(); i !=3D e; ++i)
+ if (Data[i] !=3D C) return -1;
+ return static_cast<uint8_t>(C); // Ensure 255 is not returned as -1.
+}
+
+
+/// isRepeatedByteSequence - Determine whether the given value is
+/// composed of a repeated sequence of identical bytes and return the
+/// byte value. If it is not a repeated sequence, return -1.
static int isRepeatedByteSequence(const Value *V, TargetMachine &TM) {
=20
if (const ConstantInt *CI =3D dyn_cast<ConstantInt>(V)) {
@@ -1568,8 +1608,7 @@
if (const ConstantArray *CA =3D dyn_cast<ConstantArray>(V)) {
// Make sure all array elements are sequences of the same repeated
// byte.
- if (CA->getNumOperands() =3D=3D 0) return -1;
-
+ assert(CA->getNumOperands() !=3D 0 && "Should be a CAZ");
int Byte =3D isRepeatedByteSequence(CA->getOperand(0), TM);
if (Byte =3D=3D -1) return -1;
=20
@@ -1580,37 +1619,92 @@
}
return Byte;
}
+ =20
+ if (const ConstantDataSequential *CDS =3D dyn_cast<ConstantDataSequentia=
l>(V))
+ return isRepeatedByteSequence(CDS);
=20
return -1;
}
=20
+static void EmitGlobalConstantDataSequential(const ConstantDataSequential =
*CDS,
+ unsigned AddrSpace,AsmPrinter=
&AP){
+ =20
+ // See if we can aggregate this into a .fill, if so, emit it as such.
+ int Value =3D isRepeatedByteSequence(CDS, AP.TM);
+ if (Value !=3D -1) {
+ uint64_t Bytes =3D AP.TM.getTargetData()->getTypeAllocSize(CDS->getTyp=
e());
+ // Don't emit a 1-byte object as a .fill.
+ if (Bytes > 1)
+ return AP.OutStreamer.EmitFill(Bytes, Value, AddrSpace);
+ }
+ =20
+ // If this can be emitted with .ascii/.asciz, emit it as such.
+ if (CDS->isString())
+ return AP.OutStreamer.EmitBytes(CDS->getAsString(), AddrSpace);
+
+ // Otherwise, emit the values in successive locations.
+ unsigned ElementByteSize =3D CDS->getElementByteSize();
+ if (isa<IntegerType>(CDS->getElementType())) {
+ for (unsigned i =3D 0, e =3D CDS->getNumElements(); i !=3D e; ++i) {
+ if (AP.isVerbose())
+ AP.OutStreamer.GetCommentOS() << format("0x%" PRIx64 "\n",
+ CDS->getElementAsInteger(i=
));
+ AP.OutStreamer.EmitIntValue(CDS->getElementAsInteger(i),
+ ElementByteSize, AddrSpace);
+ }
+ } else if (ElementByteSize =3D=3D 4) {
+ // FP Constants are printed as integer constants to avoid losing
+ // precision.
+ assert(CDS->getElementType()->isFloatTy());
+ for (unsigned i =3D 0, e =3D CDS->getNumElements(); i !=3D e; ++i) {
+ union {
+ float F;
+ uint32_t I;
+ };
+ =20
+ F =3D CDS->getElementAsFloat(i);
+ if (AP.isVerbose())
+ AP.OutStreamer.GetCommentOS() << "float " << F << '\n';
+ AP.OutStreamer.EmitIntValue(I, 4, AddrSpace);
+ }
+ } else {
+ assert(CDS->getElementType()->isDoubleTy());
+ for (unsigned i =3D 0, e =3D CDS->getNumElements(); i !=3D e; ++i) {
+ union {
+ double F;
+ uint64_t I;
+ };
+ =20
+ F =3D CDS->getElementAsDouble(i);
+ if (AP.isVerbose())
+ AP.OutStreamer.GetCommentOS() << "double " << F << '\n';
+ AP.OutStreamer.EmitIntValue(I, 8, AddrSpace);
+ }
+ }
+
+ const TargetData &TD =3D *AP.TM.getTargetData();
+ unsigned Size =3D TD.getTypeAllocSize(CDS->getType());
+ unsigned EmittedSize =3D TD.getTypeAllocSize(CDS->getType()->getElementT=
ype()) *
+ CDS->getNumElements();
+ if (unsigned Padding =3D Size - EmittedSize)
+ AP.OutStreamer.EmitZeros(Padding, AddrSpace);
+
+}
+
static void EmitGlobalConstantArray(const ConstantArray *CA, unsigned Addr=
Space,
AsmPrinter &AP) {
- if (AddrSpace !=3D 0 || !CA->isString()) {
- // Not a string. Print the values in successive locations.
+ // See if we can aggregate some values. Make sure it can be
+ // represented as a series of bytes of the constant value.
+ int Value =3D isRepeatedByteSequence(CA, AP.TM);
=20
- // See if we can aggregate some values. Make sure it can be
- // represented as a series of bytes of the constant value.
- int Value =3D isRepeatedByteSequence(CA, AP.TM);
-
- if (Value !=3D -1) {
- uint64_t Bytes =3D AP.TM.getTargetData()->getTypeAllocSize(CA->getTy=
pe());
- AP.OutStreamer.EmitFill(Bytes, Value, AddrSpace);
- }
- else {
- for (unsigned i =3D 0, e =3D CA->getNumOperands(); i !=3D e; ++i)
- EmitGlobalConstantImpl(CA->getOperand(i), AddrSpace, AP);
- }
- return;
+ if (Value !=3D -1) {
+ uint64_t Bytes =3D AP.TM.getTargetData()->getTypeAllocSize(CA->getType=
());
+ AP.OutStreamer.EmitFill(Bytes, Value, AddrSpace);
}
-
- // Otherwise, it can be emitted as .ascii.
- SmallVector<char, 128> TmpVec;
- TmpVec.reserve(CA->getNumOperands());
- for (unsigned i =3D 0, e =3D CA->getNumOperands(); i !=3D e; ++i)
- TmpVec.push_back(cast<ConstantInt>(CA->getOperand(i))->getZExtValue());
-
- AP.OutStreamer.EmitBytes(StringRef(TmpVec.data(), TmpVec.size()), AddrSp=
ace);
+ else {
+ for (unsigned i =3D 0, e =3D CA->getNumOperands(); i !=3D e; ++i)
+ EmitGlobalConstantImpl(CA->getOperand(i), AddrSpace, AP);
+ }
}
=20
static void EmitGlobalConstantVector(const ConstantVector *CV,
@@ -1656,29 +1750,44 @@
=20
static void EmitGlobalConstantFP(const ConstantFP *CFP, unsigned AddrSpace,
AsmPrinter &AP) {
- // FP Constants are printed as integer constants to avoid losing
- // precision.
- if (CFP->getType()->isDoubleTy()) {
+ if (CFP->getType()->isHalfTy()) {
if (AP.isVerbose()) {
- double Val =3D CFP->getValueAPF().convertToDouble();
- AP.OutStreamer.GetCommentOS() << "double " << Val << '\n';
+ SmallString<10> Str;
+ CFP->getValueAPF().toString(Str);
+ AP.OutStreamer.GetCommentOS() << "half " << Str << '\n';
}
-
uint64_t Val =3D CFP->getValueAPF().bitcastToAPInt().getZExtValue();
- AP.OutStreamer.EmitIntValue(Val, 8, AddrSpace);
+ AP.OutStreamer.EmitIntValue(Val, 2, AddrSpace);
return;
}
=20
if (CFP->getType()->isFloatTy()) {
if (AP.isVerbose()) {
float Val =3D CFP->getValueAPF().convertToFloat();
- AP.OutStreamer.GetCommentOS() << "float " << Val << '\n';
+ uint64_t IntVal =3D CFP->getValueAPF().bitcastToAPInt().getZExtValue=
();
+ AP.OutStreamer.GetCommentOS() << "float " << Val << '\n'
+ << " (" << format("0x%x", IntVal) << "=
)\n";
}
uint64_t Val =3D CFP->getValueAPF().bitcastToAPInt().getZExtValue();
AP.OutStreamer.EmitIntValue(Val, 4, AddrSpace);
return;
}
=20
+ // FP Constants are printed as integer constants to avoid losing
+ // precision.
+ if (CFP->getType()->isDoubleTy()) {
+ if (AP.isVerbose()) {
+ double Val =3D CFP->getValueAPF().convertToDouble();
+ uint64_t IntVal =3D CFP->getValueAPF().bitcastToAPInt().getZExtValue=
();
+ AP.OutStreamer.GetCommentOS() << "double " << Val << '\n'
+ << " (" << format("0x%lx", IntVal) << =
")\n";
+ }
+
+ uint64_t Val =3D CFP->getValueAPF().bitcastToAPInt().getZExtValue();
+ AP.OutStreamer.EmitIntValue(Val, 8, AddrSpace);
+ return;
+ }
+
if (CFP->getType()->isX86_FP80Ty()) {
// all long double variants are printed as hex
// API needed to prevent premature destruction
@@ -1742,20 +1851,20 @@
=20
static void EmitGlobalConstantImpl(const Constant *CV, unsigned AddrSpace,
AsmPrinter &AP) {
- if (isa<ConstantAggregateZero>(CV) || isa<UndefValue>(CV)) {
- uint64_t Size =3D AP.TM.getTargetData()->getTypeAllocSize(CV->getType(=
));
+ const TargetData *TD =3D AP.TM.getTargetData();
+ uint64_t Size =3D TD->getTypeAllocSize(CV->getType());
+ if (isa<ConstantAggregateZero>(CV) || isa<UndefValue>(CV))
return AP.OutStreamer.EmitZeros(Size, AddrSpace);
- }
=20
if (const ConstantInt *CI =3D dyn_cast<ConstantInt>(CV)) {
- unsigned Size =3D AP.TM.getTargetData()->getTypeAllocSize(CV->getType(=
));
switch (Size) {
case 1:
case 2:
case 4:
case 8:
if (AP.isVerbose())
- AP.OutStreamer.GetCommentOS() << format("0x%llx\n", CI->getZExtVal=
ue());
+ AP.OutStreamer.GetCommentOS() << format("0x%" PRIx64 "\n",
+ CI->getZExtValue());
AP.OutStreamer.EmitIntValue(CI->getZExtValue(), Size, AddrSpace);
return;
default:
@@ -1764,29 +1873,45 @@
}
}
=20
+ if (const ConstantFP *CFP =3D dyn_cast<ConstantFP>(CV))
+ return EmitGlobalConstantFP(CFP, AddrSpace, AP);
+
+ if (isa<ConstantPointerNull>(CV)) {
+ AP.OutStreamer.EmitIntValue(0, Size, AddrSpace);
+ return;
+ }
+
+ if (const ConstantDataSequential *CDS =3D dyn_cast<ConstantDataSequentia=
l>(CV))
+ return EmitGlobalConstantDataSequential(CDS, AddrSpace, AP);
+ =20
if (const ConstantArray *CVA =3D dyn_cast<ConstantArray>(CV))
return EmitGlobalConstantArray(CVA, AddrSpace, AP);
=20
if (const ConstantStruct *CVS =3D dyn_cast<ConstantStruct>(CV))
return EmitGlobalConstantStruct(CVS, AddrSpace, AP);
=20
- if (const ConstantFP *CFP =3D dyn_cast<ConstantFP>(CV))
- return EmitGlobalConstantFP(CFP, AddrSpace, AP);
+ if (const ConstantExpr *CE =3D dyn_cast<ConstantExpr>(CV)) {
+ // Look through bitcasts, which might not be able to be MCExpr'ized (e=
.g. of
+ // vectors).
+ if (CE->getOpcode() =3D=3D Instruction::BitCast)
+ return EmitGlobalConstantImpl(CE->getOperand(0), AddrSpace, AP);
=20
- if (isa<ConstantPointerNull>(CV)) {
- unsigned Size =3D AP.TM.getTargetData()->getTypeAllocSize(CV->getType(=
));
- AP.OutStreamer.EmitIntValue(0, Size, AddrSpace);
- return;
+ if (Size > 8) {
+ // If the constant expression's size is greater than 64-bits, then w=
e have
+ // to emit the value in chunks. Try to constant fold the value and e=
mit it
+ // that way.
+ Constant *New =3D ConstantFoldConstantExpression(CE, TD);
+ if (New && New !=3D CE)
+ return EmitGlobalConstantImpl(New, AddrSpace, AP);
+ }
}
-
+ =20
if (const ConstantVector *V =3D dyn_cast<ConstantVector>(CV))
return EmitGlobalConstantVector(V, AddrSpace, AP);
-
+ =20
// Otherwise, it must be a ConstantExpr. Lower it to an MCExpr, then em=
it it
// thread the streamer with EmitValue.
- AP.OutStreamer.EmitValue(LowerConstant(CV, AP),
- AP.TM.getTargetData()->getTypeAllocSize(CV->getTy=
pe()),
- AddrSpace);
+ AP.OutStreamer.EmitValue(LowerConstant(CV, AP), Size, AddrSpace);
}
=20
/// EmitGlobalConstant - Print a general LLVM constant to the .s file.
@@ -1953,7 +2078,7 @@
void AsmPrinter::EmitBasicBlockStart(const MachineBasicBlock *MBB) const {
// Emit an alignment directive for this block, if needed.
if (unsigned Align =3D MBB->getAlignment())
- EmitAlignment(Log2_32(Align));
+ EmitAlignment(Align);
=20
// If the block has its address taken, emit any labels that were used to
// reference the block. It is possible that there is more than one label
@@ -1970,27 +2095,22 @@
OutStreamer.EmitLabel(Syms[i]);
}
=20
+ // Print some verbose block comments.
+ if (isVerbose()) {
+ if (const BasicBlock *BB =3D MBB->getBasicBlock())
+ if (BB->hasName())
+ OutStreamer.AddComment("%" + BB->getName());
+ EmitBasicBlockLoopComments(*MBB, LI, *this);
+ }
+
// Print the main label for the block.
if (MBB->pred_empty() || isBlockOnlyReachableByFallthrough(MBB)) {
if (isVerbose() && OutStreamer.hasRawTextSupport()) {
- if (const BasicBlock *BB =3D MBB->getBasicBlock())
- if (BB->hasName())
- OutStreamer.AddComment("%" + BB->getName());
-
- EmitBasicBlockLoopComments(*MBB, LI, *this);
-
// NOTE: Want this comment at start of line, don't emit with AddComm=
ent.
OutStreamer.EmitRawText(Twine(MAI->getCommentString()) + " BB#" +
Twine(MBB->getNumber()) + ":");
}
} else {
- if (isVerbose()) {
- if (const BasicBlock *BB =3D MBB->getBasicBlock())
- if (BB->hasName())
- OutStreamer.AddComment("%" + BB->getName());
- EmitBasicBlockLoopComments(*MBB, LI, *this);
- }
-
OutStreamer.EmitLabel(MBB->getSymbol());
}
}
@@ -2048,7 +2168,7 @@
MachineInstr &MI =3D *II;
=20
// If it is not a simple branch, we are in a table somewhere.
- if (!MI.getDesc().isBranch() || MI.getDesc().isIndirectBranch())
+ if (!MI.isBranch() || MI.isIndirectBranch())
return false;
=20
// If we are the operands of one of the branches, this is not
@@ -2090,6 +2210,4 @@
}
=20
report_fatal_error("no GCMetadataPrinter registered for GC: " + Twine(Na=
me));
- return 0;
}
-
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/AsmPrint=
er/AsmPrinterDwarf.cpp
--- a/head/contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp Tue Apr =
17 11:51:51 2012 +0300
@@ -25,6 +25,7 @@
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Support/Dwarf.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -35,23 +36,8 @@
void AsmPrinter::EmitSLEB128(int Value, const char *Desc) const {
if (isVerbose() && Desc)
OutStreamer.AddComment(Desc);
- =20
- if (MAI->hasLEB128()) {
- OutStreamer.EmitSLEB128IntValue(Value);
- return;
- }
=20
- // If we don't have .sleb128, emit as .bytes.
- int Sign =3D Value >> (8 * sizeof(Value) - 1);
- bool IsMore;
- =20
- do {
- unsigned char Byte =3D static_cast<unsigned char>(Value & 0x7f);
- Value >>=3D 7;
- IsMore =3D Value !=3D Sign || ((Byte ^ Sign) & 0x40) !=3D 0;
- if (IsMore) Byte |=3D 0x80;
- OutStreamer.EmitIntValue(Byte, 1, /*addrspace*/0);
- } while (IsMore);
+ OutStreamer.EmitSLEB128IntValue(Value);
}
=20
/// EmitULEB128 - emit the specified signed leb128 value.
@@ -60,25 +46,7 @@
if (isVerbose() && Desc)
OutStreamer.AddComment(Desc);
=20
- // FIXME: Should we add a PadTo option to the streamer?
- if (MAI->hasLEB128() && PadTo =3D=3D 0) {
- OutStreamer.EmitULEB128IntValue(Value);=20
- return;
- }
- =20
- // If we don't have .uleb128 or we want to emit padding, emit as .bytes.
- do {
- unsigned char Byte =3D static_cast<unsigned char>(Value & 0x7f);
- Value >>=3D 7;
- if (Value || PadTo !=3D 0) Byte |=3D 0x80;
- OutStreamer.EmitIntValue(Byte, 1, /*addrspace*/0);
- } while (Value);
-
- if (PadTo) {
- if (PadTo > 1)
- OutStreamer.EmitFill(PadTo - 1, 0x80/*fillval*/, 0/*addrspace*/);
- OutStreamer.EmitFill(1, 0/*fillval*/, 0/*addrspace*/);
- }
+ OutStreamer.EmitULEB128IntValue(Value, 0/*addrspace*/, PadTo);
}
=20
/// EmitCFAByte - Emit a .byte 42 directive for a DW_CFA_xxx value.
@@ -143,7 +111,7 @@
return 0;
=20
switch (Encoding & 0x07) {
- default: assert(0 && "Invalid encoded value.");
+ default: llvm_unreachable("Invalid encoded value.");
case dwarf::DW_EH_PE_absptr: return TM.getTargetData()->getPointerSize();
case dwarf::DW_EH_PE_udata2: return 2;
case dwarf::DW_EH_PE_udata4: return 4;
@@ -177,9 +145,8 @@
void AsmPrinter::EmitSectionOffset(const MCSymbol *Label,
const MCSymbol *SectionLabel) const {
// On COFF targets, we have to emit the special .secrel32 directive.
- if (const char *SecOffDir =3D MAI->getDwarfSectionOffsetDirective()) {
- // FIXME: MCize.
- OutStreamer.EmitRawText(SecOffDir + Twine(Label->getName()));
+ if (MAI->getDwarfSectionOffsetDirective()) {
+ OutStreamer.EmitCOFFSecRel32(Label);
return;
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/AsmPrint=
er/AsmPrinterInlineAsm.cpp
--- a/head/contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Tue =
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Tue =
Apr 17 11:51:51 2012 +0300
@@ -326,7 +326,11 @@
OpNo +=3D InlineAsm::getNumOperandRegisters(OpFlags) + 1;
}
=20
- if (OpNo >=3D MI->getNumOperands()) {
+ // We may have a location metadata attached to the end of the
+ // instruction, and at no point should see metadata at any
+ // other point while processing. It's an error if so.
+ if (OpNo >=3D MI->getNumOperands() ||
+ MI->getOperand(OpNo).isMetadata()) {
Error =3D true;
} else {
unsigned OpFlags =3D MI->getOperand(OpNo).getImm();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/AsmPrint=
er/DIE.cpp
--- a/head/contrib/llvm/lib/CodeGen/AsmPrinter/DIE.cpp Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/AsmPrinter/DIE.cpp Tue Apr 17 11:51:51 =
2012 +0300
@@ -112,15 +112,6 @@
delete Children[i];
}
=20
-/// addSiblingOffset - Add a sibling offset field to the front of the DIE.
-///
-DIEValue *DIE::addSiblingOffset(BumpPtrAllocator &A) {
- DIEInteger *DI =3D new (A) DIEInteger(0);
- Values.insert(Values.begin(), DI);
- Abbrev.AddFirstAttribute(dwarf::DW_AT_sibling, dwarf::DW_FORM_ref4);
- return DI;
-}
-
#ifndef NDEBUG
void DIE::print(raw_ostream &O, unsigned IncIndent) {
IndentCount +=3D IncIndent;
@@ -174,6 +165,7 @@
}
#endif
=20
+void DIEValue::anchor() { }
=20
#ifndef NDEBUG
void DIEValue::dump() {
@@ -223,33 +215,14 @@
case dwarf::DW_FORM_udata: return MCAsmInfo::getULEB128Size(Integer);
case dwarf::DW_FORM_sdata: return MCAsmInfo::getSLEB128Size(Integer);
case dwarf::DW_FORM_addr: return AP->getTargetData().getPointerSize();
- default: llvm_unreachable("DIE Value form not supported yet"); break;
+ default: llvm_unreachable("DIE Value form not supported yet");
}
- return 0;
}
=20
#ifndef NDEBUG
void DIEInteger::print(raw_ostream &O) {
- O << "Int: " << (int64_t)Integer
- << format(" 0x%llx", (unsigned long long)Integer);
-}
-#endif
-
-//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
-// DIEString Implementation
-//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
-
-/// EmitValue - Emit string value.
-///
-void DIEString::EmitValue(AsmPrinter *AP, unsigned Form) const {
- AP->OutStreamer.EmitBytes(Str, /*addrspace*/0);
- // Emit nul terminator.
- AP->OutStreamer.EmitIntValue(0, 1, /*addrspace*/0);
-}
-
-#ifndef NDEBUG
-void DIEString::print(raw_ostream &O) {
- O << "Str: \"" << Str << "\"";
+ O << "Int: " << (int64_t)Integer << " 0x";
+ O.write_hex(Integer);
}
#endif
=20
@@ -267,6 +240,7 @@
///
unsigned DIELabel::SizeOf(AsmPrinter *AP, unsigned Form) const {
if (Form =3D=3D dwarf::DW_FORM_data4) return 4;
+ if (Form =3D=3D dwarf::DW_FORM_strp) return 4;
return AP->getTargetData().getPointerSize();
}
=20
@@ -290,6 +264,7 @@
///
unsigned DIEDelta::SizeOf(AsmPrinter *AP, unsigned Form) const {
if (Form =3D=3D dwarf::DW_FORM_data4) return 4;
+ if (Form =3D=3D dwarf::DW_FORM_strp) return 4;
return AP->getTargetData().getPointerSize();
}
=20
@@ -335,7 +310,7 @@
///
void DIEBlock::EmitValue(AsmPrinter *Asm, unsigned Form) const {
switch (Form) {
- default: assert(0 && "Improper form for block"); break;
+ default: llvm_unreachable("Improper form for block");
case dwarf::DW_FORM_block1: Asm->EmitInt8(Size); break;
case dwarf::DW_FORM_block2: Asm->EmitInt16(Size); break;
case dwarf::DW_FORM_block4: Asm->EmitInt32(Size); break;
@@ -355,9 +330,8 @@
case dwarf::DW_FORM_block2: return Size + sizeof(int16_t);
case dwarf::DW_FORM_block4: return Size + sizeof(int32_t);
case dwarf::DW_FORM_block: return Size + MCAsmInfo::getULEB128Size(Size=
);
- default: llvm_unreachable("Improper form for block"); break;
+ default: llvm_unreachable("Improper form for block");
}
- return 0;
}
=20
#ifndef NDEBUG
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/AsmPrint=
er/DIE.h
--- a/head/contrib/llvm/lib/CodeGen/AsmPrinter/DIE.h Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/lib/CodeGen/AsmPrinter/DIE.h Tue Apr 17 11:51:51 20=
12 +0300
@@ -31,17 +31,17 @@
class DIEAbbrevData {
/// Attribute - Dwarf attribute code.
///
- unsigned Attribute;
+ uint16_t Attribute;
=20
/// Form - Dwarf form code.
///
- unsigned Form;
+ uint16_t Form;
public:
- DIEAbbrevData(unsigned A, unsigned F) : Attribute(A), Form(F) {}
+ DIEAbbrevData(uint16_t A, uint16_t F) : Attribute(A), Form(F) {}
=20
// Accessors.
- unsigned getAttribute() const { return Attribute; }
- unsigned getForm() const { return Form; }
+ uint16_t getAttribute() const { return Attribute; }
+ uint16_t getForm() const { return Form; }
=20
/// Profile - Used to gather unique data for the abbreviation folding =
set.
///
@@ -54,41 +54,41 @@
class DIEAbbrev : public FoldingSetNode {
/// Tag - Dwarf tag code.
///
- unsigned Tag;
+ uint16_t Tag;
+
+ /// ChildrenFlag - Dwarf children flag.
+ ///
+ uint16_t ChildrenFlag;
=20
/// Unique number for node.
///
unsigned Number;
=20
- /// ChildrenFlag - Dwarf children flag.
- ///
- unsigned ChildrenFlag;
-
/// Data - Raw data bytes for abbreviation.
///
SmallVector<DIEAbbrevData, 8> Data;
=20
public:
- DIEAbbrev(unsigned T, unsigned C) : Tag(T), ChildrenFlag(C), Data() {}
+ DIEAbbrev(uint16_t T, uint16_t C) : Tag(T), ChildrenFlag(C), Data() {}
=20
// Accessors.
- unsigned getTag() const { return Tag; }
+ uint16_t getTag() const { return Tag; }
unsigned getNumber() const { return Number; }
- unsigned getChildrenFlag() const { return ChildrenFlag; }
+ uint16_t getChildrenFlag() const { return ChildrenFlag; }
const SmallVector<DIEAbbrevData, 8> &getData() const { return Data; }
- void setTag(unsigned T) { Tag =3D T; }
- void setChildrenFlag(unsigned CF) { ChildrenFlag =3D CF; }
+ void setTag(uint16_t T) { Tag =3D T; }
+ void setChildrenFlag(uint16_t CF) { ChildrenFlag =3D CF; }
void setNumber(unsigned N) { Number =3D N; }
=20
/// AddAttribute - Adds another set of attribute information to the
/// abbreviation.
- void AddAttribute(unsigned Attribute, unsigned Form) {
+ void AddAttribute(uint16_t Attribute, uint16_t Form) {
Data.push_back(DIEAbbrevData(Attribute, Form));
}
=20
/// AddFirstAttribute - Adds a set of attribute information to the fro=
nt
/// of the abbreviation.
- void AddFirstAttribute(unsigned Attribute, unsigned Form) {
+ void AddFirstAttribute(uint16_t Attribute, uint16_t Form) {
Data.insert(Data.begin(), DIEAbbrevData(Attribute, Form));
}
=20
@@ -113,10 +113,6 @@
=20
class DIE {
protected:
- /// Abbrev - Buffer for constructing abbreviation.
- ///
- DIEAbbrev Abbrev;
-
/// Offset - Offset in debug info section.
///
unsigned Offset;
@@ -125,6 +121,10 @@
///
unsigned Size;
=20
+ /// Abbrev - Buffer for constructing abbreviation.
+ ///
+ DIEAbbrev Abbrev;
+
/// Children DIEs.
///
std::vector<DIE *> Children;
@@ -139,8 +139,8 @@
mutable unsigned IndentCount;
public:
explicit DIE(unsigned Tag)
- : Abbrev(Tag, dwarf::DW_CHILDREN_no), Offset(0),
- Size(0), Parent (0), IndentCount(0) {}
+ : Offset(0), Size(0), Abbrev(Tag, dwarf::DW_CHILDREN_no), Parent(0),
+ IndentCount(0) {}
virtual ~DIE();
=20
// Accessors.
@@ -163,16 +163,6 @@
Values.push_back(Value);
}
=20
- /// SiblingOffset - Return the offset of the debug information entry's
- /// sibling.
- unsigned getSiblingOffset() const { return Offset + Size; }
-
- /// addSiblingOffset - Add a sibling offset field to the front of the =
DIE.
- /// The caller is responsible for deleting the return value at or afte=
r the
- /// same time it destroys this DIE.
- ///
- DIEValue *addSiblingOffset(BumpPtrAllocator &A);
-
/// addChild - Add a child to the DIE.
///
void addChild(DIE *Child) {
@@ -195,12 +185,12 @@
/// DIEValue - A debug information entry value.
///
class DIEValue {
+ virtual void anchor();
public:
enum {
isInteger,
isString,
isLabel,
- isSectionOffset,
isDelta,
isEntry,
isBlock
@@ -276,33 +266,6 @@
};
=20
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
- /// DIEString - A string value DIE. This DIE keeps string reference only.
- ///
- class DIEString : public DIEValue {
- const StringRef Str;
- public:
- explicit DIEString(const StringRef S) : DIEValue(isString), Str(S) {}
-
- /// EmitValue - Emit string value.
- ///
- virtual void EmitValue(AsmPrinter *AP, unsigned Form) const;
-
- /// SizeOf - Determine size of string value in bytes.
- ///
- virtual unsigned SizeOf(AsmPrinter *AP, unsigned /*Form*/) const {
- return Str.size() + sizeof(char); // sizeof('\0');
- }
-
- // Implement isa/cast/dyncast.
- static bool classof(const DIEString *) { return true; }
- static bool classof(const DIEValue *S) { return S->getType() =3D=3D is=
String; }
-
-#ifndef NDEBUG
- virtual void print(raw_ostream &O);
-#endif
- };
-
- //=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
/// DIELabel - A label expression DIE.
//
class DIELabel : public DIEValue {
@@ -359,7 +322,7 @@
};
=20
//=3D=3D=3D-------------------------------------------------------------=
-------=3D=3D=3D//
- /// DIEntry - A pointer to another debug information entry. An instance=
of
+ /// DIEEntry - A pointer to another debug information entry. An instanc=
e of
/// this class can also be used as a proxy for a debug information entry=
not
/// yet defined (ie. types.)
class DIEEntry : public DIEValue {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/AsmPrint=
er/DwarfCFIException.cpp
--- a/head/contrib/llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp Tue Ap=
r 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp Tue Ap=
r 17 11:51:51 2012 +0300
@@ -142,12 +142,14 @@
=20
Asm->OutStreamer.EmitCFIEndProc();
=20
+ if (!shouldEmitPersonality)
+ return;
+
Asm->OutStreamer.EmitLabel(Asm->GetTempSymbol("eh_func_end",
Asm->getFunctionNumber()));
=20
// Map all labels and get rid of any dead landing pads.
MMI->TidyLandingPads();
=20
- if (shouldEmitPersonality)
- EmitExceptionTable();
+ EmitExceptionTable();
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/AsmPrint=
er/DwarfCompileUnit.cpp
--- a/head/contrib/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp Tue Apr=
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp Tue Apr=
17 11:51:51 2012 +0300
@@ -13,12 +13,14 @@
=20
#define DEBUG_TYPE "dwarfdebug"
=20
+#include "DwarfAccelTable.h"
#include "DwarfCompileUnit.h"
#include "DwarfDebug.h"
#include "llvm/Constants.h"
#include "llvm/GlobalVariable.h"
#include "llvm/Instructions.h"
#include "llvm/Analysis/DIBuilder.h"
+#include "llvm/Support/Debug.h"
#include "llvm/Target/Mangler.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetFrameLowering.h"
@@ -30,8 +32,9 @@
using namespace llvm;
=20
/// CompileUnit - Compile unit constructor.
-CompileUnit::CompileUnit(unsigned I, DIE *D, AsmPrinter *A, DwarfDebug *DW)
- : ID(I), CUDie(D), Asm(A), DD(DW), IndexTyDie(0) {
+CompileUnit::CompileUnit(unsigned I, unsigned L, DIE *D, AsmPrinter *A,
+ DwarfDebug *DW)
+ : ID(I), Language(L), CUDie(D), Asm(A), DD(DW), IndexTyDie(0) {
DIEIntegerOne =3D new (DIEValueAllocator) DIEInteger(1);
}
=20
@@ -67,12 +70,19 @@
Die->addValue(Attribute, Form, Value);
}
=20
-/// addString - Add a string attribute data and value. DIEString only
-/// keeps string reference.
-void CompileUnit::addString(DIE *Die, unsigned Attribute, unsigned Form,
- StringRef String) {
- DIEValue *Value =3D new (DIEValueAllocator) DIEString(String);
- Die->addValue(Attribute, Form, Value);
+/// addString - Add a string attribute data and value. We always emit a
+/// reference to the string pool instead of immediate strings so that DIEs=
have
+/// more predictable sizes.
+void CompileUnit::addString(DIE *Die, unsigned Attribute, StringRef String=
) {
+ MCSymbol *Symb =3D DD->getStringPoolEntry(String);
+ DIEValue *Value;
+ if (Asm->needsRelocationsForDwarfStringPool())
+ Value =3D new (DIEValueAllocator) DIELabel(Symb);
+ else {
+ MCSymbol *StringPool =3D DD->getStringPool();
+ Value =3D new (DIEValueAllocator) DIEDelta(Symb, StringPool);
+ }
+ Die->addValue(Attribute, dwarf::DW_FORM_strp, Value);
}
=20
/// addLabel - Add a Dwarf label attribute data and value.
@@ -98,7 +108,6 @@
Die->addValue(Attribute, Form, createDIEEntry(Entry));
}
=20
-
/// addBlock - Add block data.
///
void CompileUnit::addBlock(DIE *Die, unsigned Attribute, unsigned Form,
@@ -135,8 +144,7 @@
unsigned Line =3D G.getLineNumber();
if (Line =3D=3D 0)
return;
- unsigned FileID =3D DD->GetOrCreateSourceID(G.getFilename(),
- G.getDirectory());
+ unsigned FileID =3D DD->GetOrCreateSourceID(G.getFilename(), G.getDirect=
ory());
assert(FileID && "Invalid file id");
addUInt(Die, dwarf::DW_AT_decl_file, 0, FileID);
addUInt(Die, dwarf::DW_AT_decl_line, 0, Line);
@@ -148,14 +156,14 @@
// Verify subprogram.
if (!SP.Verify())
return;
+
// If the line number is 0, don't add it.
- if (SP.getLineNumber() =3D=3D 0)
+ unsigned Line =3D SP.getLineNumber();
+ if (Line =3D=3D 0)
return;
=20
- unsigned Line =3D SP.getLineNumber();
- if (!SP.getContext().Verify())
- return;
- unsigned FileID =3D DD->GetOrCreateSourceID(SP.getFilename(), SP.getDire=
ctory());
+ unsigned FileID =3D DD->GetOrCreateSourceID(SP.getFilename(),
+ SP.getDirectory());
assert(FileID && "Invalid file id");
addUInt(Die, dwarf::DW_AT_decl_file, 0, FileID);
addUInt(Die, dwarf::DW_AT_decl_line, 0, Line);
@@ -169,9 +177,28 @@
return;
=20
unsigned Line =3D Ty.getLineNumber();
- if (Line =3D=3D 0 || !Ty.getContext().Verify())
+ if (Line =3D=3D 0)
return;
- unsigned FileID =3D DD->GetOrCreateSourceID(Ty.getFilename(), Ty.getDire=
ctory());
+ unsigned FileID =3D DD->GetOrCreateSourceID(Ty.getFilename(),
+ Ty.getDirectory());
+ assert(FileID && "Invalid file id");
+ addUInt(Die, dwarf::DW_AT_decl_file, 0, FileID);
+ addUInt(Die, dwarf::DW_AT_decl_line, 0, Line);
+}
+
+/// addSourceLine - Add location information to specified debug information
+/// entry.
+void CompileUnit::addSourceLine(DIE *Die, DIObjCProperty Ty) {
+ // Verify type.
+ if (!Ty.Verify())
+ return;
+
+ unsigned Line =3D Ty.getLineNumber();
+ if (Line =3D=3D 0)
+ return;
+ DIFile File =3D Ty.getFile();
+ unsigned FileID =3D DD->GetOrCreateSourceID(File.getFilename(),
+ File.getDirectory());
assert(FileID && "Invalid file id");
addUInt(Die, dwarf::DW_AT_decl_file, 0, FileID);
addUInt(Die, dwarf::DW_AT_decl_line, 0, Line);
@@ -458,7 +485,7 @@
/// addConstantValue - Add constant value entry in variable DIE.
bool CompileUnit::addConstantValue(DIE *Die, const MachineOperand &MO,
DIType Ty) {
- assert (MO.isImm() && "Invalid machine operand!");
+ assert(MO.isImm() && "Invalid machine operand!");
DIEBlock *Block =3D new (DIEValueAllocator) DIEBlock();
int SizeInBits =3D -1;
bool SignedConstant =3D isTypeSigned(Ty, &SizeInBits);
@@ -558,8 +585,8 @@
Buffer.addChild(getOrCreateTemplateValueParameterDIE(
DITemplateValueParameter(Element)));
}
+}
=20
-}
/// addToContextOwner - Add Die into the list of its context owner's child=
ren.
void CompileUnit::addToContextOwner(DIE *Die, DIDescriptor Context) {
if (Context.isType()) {
@@ -598,13 +625,29 @@
assert(Ty.isDerivedType() && "Unknown kind of DIType");
constructTypeDIE(*TyDIE, DIDerivedType(Ty));
}
-
+ // If this is a named finished type then include it in the list of types
+ // for the accelerator tables.
+ if (!Ty.getName().empty() && !Ty.isForwardDecl()) {
+ bool IsImplementation =3D 0;
+ if (Ty.isCompositeType()) {
+ DICompositeType CT(Ty);
+ // A runtime language of 0 actually means C/C++ and that any
+ // non-negative value is some version of Objective-C/C++.
+ IsImplementation =3D (CT.getRunTimeLang() =3D=3D 0) ||
+ CT.isObjcClassComplete();
+ }
+ unsigned Flags =3D IsImplementation ?
+ DwarfAccelTable::eTypeFlagClassIsImplementation : 0;
+ addAccelType(Ty.getName(), std::make_pair(TyDIE, Flags));
+ }
+ =20
addToContextOwner(TyDIE, Ty.getContext());
return TyDIE;
}
=20
/// addType - Add a new type attribute to the specified entity.
-void CompileUnit::addType(DIE *Entity, DIType Ty) {
+void CompileUnit::addType(DIE *Entity, DIType Ty,
+ unsigned Attribute) {
if (!Ty.Verify())
return;
=20
@@ -612,7 +655,7 @@
DIEEntry *Entry =3D getDIEEntry(Ty);
// If it exists then use the existing value.
if (Entry) {
- Entity->addValue(dwarf::DW_AT_type, dwarf::DW_FORM_ref4, Entry);
+ Entity->addValue(Attribute, dwarf::DW_FORM_ref4, Entry);
return;
}
=20
@@ -622,7 +665,7 @@
// Set up proxy.
Entry =3D createDIEEntry(Buffer);
insertDIEEntry(Ty, Entry);
- Entity->addValue(dwarf::DW_AT_type, dwarf::DW_FORM_ref4, Entry);
+ Entity->addValue(Attribute, dwarf::DW_FORM_ref4, Entry);
=20
// If this is a complete composite type then include it in the
// list of global types.
@@ -662,7 +705,7 @@
StringRef Name =3D BTy.getName();
// Add name if not anonymous or intermediate type.
if (!Name.empty())
- addString(&Buffer, dwarf::DW_AT_name, dwarf::DW_FORM_string, Name);
+ addString(&Buffer, dwarf::DW_AT_name, Name);
=20
if (BTy.getTag() =3D=3D dwarf::DW_TAG_unspecified_type) {
Buffer.setTag(dwarf::DW_TAG_unspecified_type);
@@ -671,8 +714,8 @@
}
=20
Buffer.setTag(dwarf::DW_TAG_base_type);
- addUInt(&Buffer, dwarf::DW_AT_encoding, dwarf::DW_FORM_data1,
- BTy.getEncoding());
+ addUInt(&Buffer, dwarf::DW_AT_encoding, dwarf::DW_FORM_data1,
+ BTy.getEncoding());
=20
uint64_t Size =3D BTy.getSizeInBits() >> 3;
addUInt(&Buffer, dwarf::DW_AT_byte_size, 0, Size);
@@ -696,10 +739,10 @@
=20
// Add name if not anonymous or intermediate type.
if (!Name.empty())
- addString(&Buffer, dwarf::DW_AT_name, dwarf::DW_FORM_string, Name);
+ addString(&Buffer, dwarf::DW_AT_name, Name);
=20
// Add size if non-zero (derived types might be zero-sized.)
- if (Size)
+ if (Size && Tag !=3D dwarf::DW_TAG_pointer_type)
addUInt(&Buffer, dwarf::DW_AT_byte_size, 0, Size);
=20
// Add source line info if available and TyDesc is not a forward declara=
tion.
@@ -755,8 +798,12 @@
Buffer.addChild(Arg);
}
}
- // Add prototype flag.
- if (isPrototyped)
+ // Add prototype flag if we're dealing with a C language and the
+ // function has been prototyped.
+ if (isPrototyped &&
+ (Language =3D=3D dwarf::DW_LANG_C89 ||
+ Language =3D=3D dwarf::DW_LANG_C99 ||
+ Language =3D=3D dwarf::DW_LANG_ObjC))
addUInt(&Buffer, dwarf::DW_AT_prototyped, dwarf::DW_FORM_flag, 1);
}
break;
@@ -779,13 +826,13 @@
DISubprogram SP(Element);
ElemDie =3D getOrCreateSubprogramDIE(DISubprogram(Element));
if (SP.isProtected())
- addUInt(ElemDie, dwarf::DW_AT_accessibility, dwarf::DW_FORM_flag,
+ addUInt(ElemDie, dwarf::DW_AT_accessibility, dwarf::DW_FORM_data=
1,
dwarf::DW_ACCESS_protected);
else if (SP.isPrivate())
- addUInt(ElemDie, dwarf::DW_AT_accessibility, dwarf::DW_FORM_flag,
+ addUInt(ElemDie, dwarf::DW_AT_accessibility, dwarf::DW_FORM_data=
1,
dwarf::DW_ACCESS_private);
else=20
- addUInt(ElemDie, dwarf::DW_AT_accessibility, dwarf::DW_FORM_flag,
+ addUInt(ElemDie, dwarf::DW_AT_accessibility, dwarf::DW_FORM_data=
1,
dwarf::DW_ACCESS_public);
if (SP.isExplicit())
addUInt(ElemDie, dwarf::DW_AT_explicit, dwarf::DW_FORM_flag, 1);
@@ -793,15 +840,54 @@
else if (Element.isVariable()) {
DIVariable DV(Element);
ElemDie =3D new DIE(dwarf::DW_TAG_variable);
- addString(ElemDie, dwarf::DW_AT_name, dwarf::DW_FORM_string,
- DV.getName());
+ addString(ElemDie, dwarf::DW_AT_name, DV.getName());
addType(ElemDie, DV.getType());
addUInt(ElemDie, dwarf::DW_AT_declaration, dwarf::DW_FORM_flag, 1);
addUInt(ElemDie, dwarf::DW_AT_external, dwarf::DW_FORM_flag, 1);
addSourceLine(ElemDie, DV);
- } else if (Element.isDerivedType())
- ElemDie =3D createMemberDIE(DIDerivedType(Element));
- else
+ } else if (Element.isDerivedType()) {
+ DIDerivedType DDTy(Element);
+ if (DDTy.getTag() =3D=3D dwarf::DW_TAG_friend) {
+ ElemDie =3D new DIE(dwarf::DW_TAG_friend);
+ addType(ElemDie, DDTy.getTypeDerivedFrom(), dwarf::DW_AT_friend);
+ } else
+ ElemDie =3D createMemberDIE(DIDerivedType(Element));
+ } else if (Element.isObjCProperty()) {
+ DIObjCProperty Property(Element);
+ ElemDie =3D new DIE(Property.getTag());
+ StringRef PropertyName =3D Property.getObjCPropertyName();
+ addString(ElemDie, dwarf::DW_AT_APPLE_property_name, PropertyName);
+ addType(ElemDie, Property.getType());
+ addSourceLine(ElemDie, Property);
+ StringRef GetterName =3D Property.getObjCPropertyGetterName();
+ if (!GetterName.empty())
+ addString(ElemDie, dwarf::DW_AT_APPLE_property_getter, GetterNam=
e);
+ StringRef SetterName =3D Property.getObjCPropertySetterName();
+ if (!SetterName.empty())
+ addString(ElemDie, dwarf::DW_AT_APPLE_property_setter, SetterNam=
e);
+ unsigned PropertyAttributes =3D 0;
+ if (Property.isReadOnlyObjCProperty())
+ PropertyAttributes |=3D dwarf::DW_APPLE_PROPERTY_readonly;
+ if (Property.isReadWriteObjCProperty())
+ PropertyAttributes |=3D dwarf::DW_APPLE_PROPERTY_readwrite;
+ if (Property.isAssignObjCProperty())
+ PropertyAttributes |=3D dwarf::DW_APPLE_PROPERTY_assign;
+ if (Property.isRetainObjCProperty())
+ PropertyAttributes |=3D dwarf::DW_APPLE_PROPERTY_retain;
+ if (Property.isCopyObjCProperty())
+ PropertyAttributes |=3D dwarf::DW_APPLE_PROPERTY_copy;
+ if (Property.isNonAtomicObjCProperty())
+ PropertyAttributes |=3D dwarf::DW_APPLE_PROPERTY_nonatomic;
+ if (PropertyAttributes)
+ addUInt(ElemDie, dwarf::DW_AT_APPLE_property_attribute, 0,=20
+ PropertyAttributes);
+
+ DIEEntry *Entry =3D getDIEEntry(Element);
+ if (!Entry) {
+ Entry =3D createDIEEntry(ElemDie);
+ insertDIEEntry(Element, Entry);
+ }
+ } else
continue;
Buffer.addChild(ElemDie);
}
@@ -809,11 +895,6 @@
if (CTy.isAppleBlockExtension())
addUInt(&Buffer, dwarf::DW_AT_APPLE_block, dwarf::DW_FORM_flag, 1);
=20
- unsigned RLang =3D CTy.getRunTimeLang();
- if (RLang)
- addUInt(&Buffer, dwarf::DW_AT_APPLE_runtime_class,
- dwarf::DW_FORM_data1, RLang);
-
DICompositeType ContainingType =3D CTy.getContainingType();
if (DIDescriptor(ContainingType).isCompositeType())
addDIEEntry(&Buffer, dwarf::DW_AT_containing_type, dwarf::DW_FORM_re=
f4,
@@ -827,7 +908,11 @@
addUInt(&Buffer, dwarf::DW_AT_APPLE_objc_complete_type,
dwarf::DW_FORM_flag, 1);
=20
- if (Tag =3D=3D dwarf::DW_TAG_class_type)=20
+ // Add template parameters to a class, structure or union types.
+ // FIXME: The support isn't in the metadata for this yet.
+ if (Tag =3D=3D dwarf::DW_TAG_class_type ||
+ Tag =3D=3D dwarf::DW_TAG_structure_type ||
+ Tag =3D=3D dwarf::DW_TAG_union_type)
addTemplateParams(Buffer, CTy.getTemplateParams());
=20
break;
@@ -838,11 +923,11 @@
=20
// Add name if not anonymous or intermediate type.
if (!Name.empty())
- addString(&Buffer, dwarf::DW_AT_name, dwarf::DW_FORM_string, Name);
+ addString(&Buffer, dwarf::DW_AT_name, Name);
=20
if (Tag =3D=3D dwarf::DW_TAG_enumeration_type || Tag =3D=3D dwarf::DW_TA=
G_class_type
|| Tag =3D=3D dwarf::DW_TAG_structure_type || Tag =3D=3D dwarf::DW_T=
AG_union_type)
- {
+ {
// Add size if non-zero (derived types might be zero-sized.)
if (Size)
addUInt(&Buffer, dwarf::DW_AT_byte_size, 0, Size);
@@ -857,6 +942,12 @@
// Add source line info if available.
if (!CTy.isForwardDecl())
addSourceLine(&Buffer, CTy);
+
+ // No harm in adding the runtime language to the declaration.
+ unsigned RLang =3D CTy.getRunTimeLang();
+ if (RLang)
+ addUInt(&Buffer, dwarf::DW_AT_APPLE_runtime_class,
+ dwarf::DW_FORM_data1, RLang);
}
}
=20
@@ -870,7 +961,7 @@
=20
ParamDIE =3D new DIE(dwarf::DW_TAG_template_type_parameter);
addType(ParamDIE, TP.getType());
- addString(ParamDIE, dwarf::DW_AT_name, dwarf::DW_FORM_string, TP.getName=
());
+ addString(ParamDIE, dwarf::DW_AT_name, TP.getName());
return ParamDIE;
}
=20
@@ -885,7 +976,7 @@
ParamDIE =3D new DIE(dwarf::DW_TAG_template_value_parameter);
addType(ParamDIE, TPV.getType());
if (!TPV.getName().empty())
- addString(ParamDIE, dwarf::DW_AT_name, dwarf::DW_FORM_string, TPV.getN=
ame());
+ addString(ParamDIE, dwarf::DW_AT_name, TPV.getName());
addUInt(ParamDIE, dwarf::DW_AT_const_value, dwarf::DW_FORM_udata,=20
TPV.getValue());
return ParamDIE;
@@ -898,8 +989,11 @@
return NDie;
NDie =3D new DIE(dwarf::DW_TAG_namespace);
insertDIE(NS, NDie);
- if (!NS.getName().empty())
- addString(NDie, dwarf::DW_AT_name, dwarf::DW_FORM_string, NS.getName()=
);
+ if (!NS.getName().empty()) {
+ addString(NDie, dwarf::DW_AT_name, NS.getName());
+ addAccelNamespace(NS.getName(), NDie);
+ } else
+ addAccelNamespace("(anonymous namespace)", NDie);
addSourceLine(NDie, NS);
addToContextOwner(NDie, NS.getContext());
return NDie;
@@ -921,6 +1015,12 @@
if (SPDie)
return SPDie;
=20
+ DISubprogram SPDecl =3D SP.getFunctionDeclaration();
+ DIE *DeclDie =3D NULL;
+ if (SPDecl.isSubprogram()) {
+ DeclDie =3D getOrCreateSubprogramDIE(SPDecl);
+ }
+
SPDie =3D new DIE(dwarf::DW_TAG_subprogram);
=20
// DW_TAG_inlined_subroutine may refer to this DIE.
@@ -932,25 +1032,36 @@
// Add function template parameters.
addTemplateParams(*SPDie, SP.getTemplateParams());
=20
+ // Unfortunately this code needs to stay here to work around
+ // a bug in older gdbs that requires the linkage name to resolve
+ // multiple template functions.
StringRef LinkageName =3D SP.getLinkageName();
if (!LinkageName.empty())
- addString(SPDie, dwarf::DW_AT_MIPS_linkage_name,=20
- dwarf::DW_FORM_string,
- getRealLinkageName(LinkageName));
+ addString(SPDie, dwarf::DW_AT_MIPS_linkage_name,
+ getRealLinkageName(LinkageName));
=20
// If this DIE is going to refer declaration info using AT_specification
// then there is no need to add other attributes.
- if (SP.getFunctionDeclaration().isSubprogram())
+ if (DeclDie) {
+ // Refer function declaration directly.
+ addDIEEntry(SPDie, dwarf::DW_AT_specification, dwarf::DW_FORM_ref4,
+ DeclDie);
+
return SPDie;
+ }
=20
// Constructors and operators for anonymous aggregates do not have names.
if (!SP.getName().empty())
- addString(SPDie, dwarf::DW_AT_name, dwarf::DW_FORM_string,=20
- SP.getName());
+ addString(SPDie, dwarf::DW_AT_name, SP.getName());
=20
addSourceLine(SPDie, SP);
=20
- if (SP.isPrototyped())=20
+ // Add the prototype if we have a prototype and we have a C like
+ // language.
+ if (SP.isPrototyped() &&
+ (Language =3D=3D dwarf::DW_LANG_C89 ||
+ Language =3D=3D dwarf::DW_LANG_C99 ||
+ Language =3D=3D dwarf::DW_LANG_ObjC))
addUInt(SPDie, dwarf::DW_AT_prototyped, dwarf::DW_FORM_flag, 1);
=20
// Add Return Type.
@@ -965,7 +1076,7 @@
=20
unsigned VK =3D SP.getVirtuality();
if (VK) {
- addUInt(SPDie, dwarf::DW_AT_virtuality, dwarf::DW_FORM_flag, VK);
+ addUInt(SPDie, dwarf::DW_AT_virtuality, dwarf::DW_FORM_data1, VK);
DIEBlock *Block =3D getDIEBlock();
addUInt(Block, 0, dwarf::DW_FORM_data1, dwarf::DW_OP_constu);
addUInt(Block, 0, dwarf::DW_FORM_udata, SP.getVirtualIndex());
@@ -1052,31 +1163,30 @@
insertDIE(N, VariableDIE);
=20
// Add name.
- addString(VariableDIE, dwarf::DW_AT_name, dwarf::DW_FORM_string,
- GV.getDisplayName());
+ addString(VariableDIE, dwarf::DW_AT_name, GV.getDisplayName());
StringRef LinkageName =3D GV.getLinkageName();
bool isGlobalVariable =3D GV.getGlobal() !=3D NULL;
if (!LinkageName.empty() && isGlobalVariable)
- addString(VariableDIE, dwarf::DW_AT_MIPS_linkage_name,=20
- dwarf::DW_FORM_string,
- getRealLinkageName(LinkageName));
+ addString(VariableDIE, dwarf::DW_AT_MIPS_linkage_name,
+ getRealLinkageName(LinkageName));
// Add type.
DIType GTy =3D GV.getType();
addType(VariableDIE, GTy);
=20
// Add scoping info.
- if (!GV.isLocalToUnit()) {
+ if (!GV.isLocalToUnit())
addUInt(VariableDIE, dwarf::DW_AT_external, dwarf::DW_FORM_flag, 1);
- // Expose as global.=20
- addGlobal(GV.getName(), VariableDIE);
- }
+
// Add line number info.
addSourceLine(VariableDIE, GV);
// Add to context owner.
DIDescriptor GVContext =3D GV.getContext();
addToContextOwner(VariableDIE, GVContext);
// Add location.
+ bool addToAccelTable =3D false;
+ DIE *VariableSpecDIE =3D NULL;
if (isGlobalVariable) {
+ addToAccelTable =3D true;
DIEBlock *Block =3D new (DIEValueAllocator) DIEBlock();
addUInt(Block, 0, dwarf::DW_FORM_data1, dwarf::DW_OP_addr);
addLabel(Block, 0, dwarf::DW_FORM_udata,
@@ -1086,7 +1196,7 @@
if (GVContext && GV.isDefinition() && !GVContext.isCompileUnit() &&
!GVContext.isFile() && !isSubprogramContext(GVContext)) {
// Create specification DIE.
- DIE *VariableSpecDIE =3D new DIE(dwarf::DW_TAG_variable);
+ VariableSpecDIE =3D new DIE(dwarf::DW_TAG_variable);
addDIEEntry(VariableSpecDIE, dwarf::DW_AT_specification,
dwarf::DW_FORM_ref4, VariableDIE);
addBlock(VariableSpecDIE, dwarf::DW_AT_location, 0, Block);
@@ -1095,11 +1205,12 @@
addDie(VariableSpecDIE);
} else {
addBlock(VariableDIE, dwarf::DW_AT_location, 0, Block);
- }=20
+ }
} else if (const ConstantInt *CI =3D=20
dyn_cast_or_null<ConstantInt>(GV.getConstant()))
addConstantValue(VariableDIE, CI, GTy.isUnsignedDIType());
else if (const ConstantExpr *CE =3D getMergedGlobalExpr(N->getOperand(11=
))) {
+ addToAccelTable =3D true;
// GV is a merged global.
DIEBlock *Block =3D new (DIEValueAllocator) DIEBlock();
Value *Ptr =3D CE->getOperand(0);
@@ -1114,6 +1225,16 @@
addBlock(VariableDIE, dwarf::DW_AT_location, 0, Block);
}
=20
+ if (addToAccelTable) {
+ DIE *AddrDIE =3D VariableSpecDIE ? VariableSpecDIE : VariableDIE;
+ addAccelName(GV.getName(), AddrDIE);
+
+ // If the linkage name is different than the name, go ahead and output
+ // that as well into the name table.
+ if (GV.getLinkageName() !=3D "" && GV.getName() !=3D GV.getLinkageName=
())
+ addAccelName(GV.getLinkageName(), AddrDIE);
+ }
+
return;
}
=20
@@ -1121,8 +1242,8 @@
void CompileUnit::constructSubrangeDIE(DIE &Buffer, DISubrange SR, DIE *In=
dexTy){
DIE *DW_Subrange =3D new DIE(dwarf::DW_TAG_subrange_type);
addDIEEntry(DW_Subrange, dwarf::DW_AT_type, dwarf::DW_FORM_ref4, IndexTy=
);
- int64_t L =3D SR.getLo();
- int64_t H =3D SR.getHi();
+ uint64_t L =3D SR.getLo();
+ uint64_t H =3D SR.getHi();
=20
// The L value defines the lower bounds which is typically zero for C/C+=
+. The
// H value is the upper bounds. Values are 64 bit. H - L + 1 is the si=
ze
@@ -1135,8 +1256,8 @@
return;
}
if (L)
- addSInt(DW_Subrange, dwarf::DW_AT_lower_bound, 0, L);
- addSInt(DW_Subrange, dwarf::DW_AT_upper_bound, 0, H);
+ addUInt(DW_Subrange, dwarf::DW_AT_lower_bound, 0, L);
+ addUInt(DW_Subrange, dwarf::DW_AT_upper_bound, 0, H);
Buffer.addChild(DW_Subrange);
}
=20
@@ -1175,7 +1296,7 @@
DIE *CompileUnit::constructEnumTypeDIE(DIEnumerator ETy) {
DIE *Enumerator =3D new DIE(dwarf::DW_TAG_enumerator);
StringRef Name =3D ETy.getName();
- addString(Enumerator, dwarf::DW_AT_name, dwarf::DW_FORM_string, Name);
+ addString(Enumerator, dwarf::DW_AT_name, Name);
int64_t Value =3D ETy.getEnumValue();
addSInt(Enumerator, dwarf::DW_AT_const_value, dwarf::DW_FORM_sdata, Valu=
e);
return Enumerator;
@@ -1212,8 +1333,7 @@
addDIEEntry(VariableDie, dwarf::DW_AT_abstract_origin,
dwarf::DW_FORM_ref4, AbsDIE);
else {
- addString(VariableDie, dwarf::DW_AT_name,=20
- dwarf::DW_FORM_string, Name);
+ addString(VariableDie, dwarf::DW_AT_name, Name);
addSourceLine(VariableDie, DV->getVariable());
addType(VariableDie, DV->getType());
}
@@ -1308,7 +1428,7 @@
DIE *MemberDie =3D new DIE(DT.getTag());
StringRef Name =3D DT.getName();
if (!Name.empty())
- addString(MemberDie, dwarf::DW_AT_name, dwarf::DW_FORM_string, Name);
+ addString(MemberDie, dwarf::DW_AT_name, Name);
=20
addType(MemberDie, DT.getTypeDerivedFrom());
=20
@@ -1366,32 +1486,35 @@
addBlock(MemberDie, dwarf::DW_AT_data_member_location, 0, MemLocationD=
ie);
=20
if (DT.isProtected())
- addUInt(MemberDie, dwarf::DW_AT_accessibility, dwarf::DW_FORM_flag,
+ addUInt(MemberDie, dwarf::DW_AT_accessibility, dwarf::DW_FORM_data1,
dwarf::DW_ACCESS_protected);
else if (DT.isPrivate())
- addUInt(MemberDie, dwarf::DW_AT_accessibility, dwarf::DW_FORM_flag,
+ addUInt(MemberDie, dwarf::DW_AT_accessibility, dwarf::DW_FORM_data1,
dwarf::DW_ACCESS_private);
// Otherwise C++ member and base classes are considered public.
else=20
- addUInt(MemberDie, dwarf::DW_AT_accessibility, dwarf::DW_FORM_flag,
+ addUInt(MemberDie, dwarf::DW_AT_accessibility, dwarf::DW_FORM_data1,
dwarf::DW_ACCESS_public);
if (DT.isVirtual())
- addUInt(MemberDie, dwarf::DW_AT_virtuality, dwarf::DW_FORM_flag,
+ addUInt(MemberDie, dwarf::DW_AT_virtuality, dwarf::DW_FORM_data1,
dwarf::DW_VIRTUALITY_virtual);
=20
// Objective-C properties.
+ if (MDNode *PNode =3D DT.getObjCProperty())
+ if (DIEEntry *PropertyDie =3D getDIEEntry(PNode))
+ MemberDie->addValue(dwarf::DW_AT_APPLE_property, dwarf::DW_FORM_ref4=
,=20
+ PropertyDie);
+
+ // This is only for backward compatibility.
StringRef PropertyName =3D DT.getObjCPropertyName();
if (!PropertyName.empty()) {
- addString(MemberDie, dwarf::DW_AT_APPLE_property_name, dwarf::DW_FORM_=
string,
- PropertyName);
+ addString(MemberDie, dwarf::DW_AT_APPLE_property_name, PropertyName);
StringRef GetterName =3D DT.getObjCPropertyGetterName();
if (!GetterName.empty())
- addString(MemberDie, dwarf::DW_AT_APPLE_property_getter,
- dwarf::DW_FORM_string, GetterName);
+ addString(MemberDie, dwarf::DW_AT_APPLE_property_getter, GetterName);
StringRef SetterName =3D DT.getObjCPropertySetterName();
if (!SetterName.empty())
- addString(MemberDie, dwarf::DW_AT_APPLE_property_setter,
- dwarf::DW_FORM_string, SetterName);
+ addString(MemberDie, dwarf::DW_AT_APPLE_property_setter, SetterName);
unsigned PropertyAttributes =3D 0;
if (DT.isReadOnlyObjCProperty())
PropertyAttributes |=3D dwarf::DW_APPLE_PROPERTY_readonly;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/AsmPrint=
er/DwarfCompileUnit.h
--- a/head/contrib/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h Tue Apr 1=
7 11:51:51 2012 +0300
@@ -29,13 +29,17 @@
class DbgVariable;
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
-/// CompileUnit - This dwarf writer support class manages information asso=
ciate
+/// CompileUnit - This dwarf writer support class manages information asso=
ciated
/// with a source file.
class CompileUnit {
/// ID - File identifier for source.
///
unsigned ID;
=20
+ /// Language - The DW_AT_language of the compile unit
+ ///
+ unsigned Language;
+
/// Die - Compile unit debug information entry.
///
const OwningPtr<DIE> CUDie;
@@ -56,14 +60,17 @@
/// descriptors to debug information entries using a DIEEntry proxy.
DenseMap<const MDNode *, DIEEntry *> MDNodeToDIEEntryMap;
=20
- /// Globals - A map of globally visible named entities for this unit.
- ///
- StringMap<DIE*> Globals;
-
/// GlobalTypes - A map of globally visible types for this unit.
///
StringMap<DIE*> GlobalTypes;
=20
+ /// AccelNames - A map of names for the name accelerator table.
+ ///
+ StringMap<std::vector<DIE*> > AccelNames;
+ StringMap<std::vector<DIE*> > AccelObjC;
+ StringMap<std::vector<DIE*> > AccelNamespace;
+ StringMap<std::vector<std::pair<DIE*, unsigned> > > AccelTypes;
+
/// DIEBlocks - A list of all the DIEBlocks in use.
std::vector<DIEBlock *> DIEBlocks;
=20
@@ -73,27 +80,56 @@
DenseMap<DIE *, const MDNode *> ContainingTypeMap;
=20
public:
- CompileUnit(unsigned I, DIE *D, AsmPrinter *A, DwarfDebug *DW);
+ CompileUnit(unsigned I, unsigned L, DIE *D, AsmPrinter *A, DwarfDebug *D=
W);
~CompileUnit();
=20
// Accessors.
unsigned getID() const { return ID; }
+ unsigned getLanguage() const { return Language; }
DIE* getCUDie() const { return CUDie.get(); }
- const StringMap<DIE*> &getGlobals() const { return Globals; }
const StringMap<DIE*> &getGlobalTypes() const { return GlobalTypes; }
=20
+ const StringMap<std::vector<DIE*> > &getAccelNames() const {
+ return AccelNames;
+ }
+ const StringMap<std::vector<DIE*> > &getAccelObjC() const {
+ return AccelObjC;
+ }
+ const StringMap<std::vector<DIE*> > &getAccelNamespace() const {
+ return AccelNamespace;
+ }
+ const StringMap<std::vector<std::pair<DIE*, unsigned > > >
+ &getAccelTypes() const {
+ return AccelTypes;
+ }
+ =20
/// hasContent - Return true if this compile unit has something to write=
out.
///
bool hasContent() const { return !CUDie->getChildren().empty(); }
=20
- /// addGlobal - Add a new global entity to the compile unit.
- ///
- void addGlobal(StringRef Name, DIE *Die) { Globals[Name] =3D Die; }
-
/// addGlobalType - Add a new global type to the compile unit.
///
void addGlobalType(DIType Ty);
=20
+
+ /// addAccelName - Add a new name to the name accelerator table.
+ void addAccelName(StringRef Name, DIE *Die) {
+ std::vector<DIE*> &DIEs =3D AccelNames[Name];
+ DIEs.push_back(Die);
+ }
+ void addAccelObjC(StringRef Name, DIE *Die) {
+ std::vector<DIE*> &DIEs =3D AccelObjC[Name];
+ DIEs.push_back(Die);
+ }
+ void addAccelNamespace(StringRef Name, DIE *Die) {
+ std::vector<DIE*> &DIEs =3D AccelNamespace[Name];
+ DIEs.push_back(Die);
+ }
+ void addAccelType(StringRef Name, std::pair<DIE *, unsigned> Die) {
+ std::vector<std::pair<DIE*, unsigned > > &DIEs =3D AccelTypes[Name];
+ DIEs.push_back(Die);
+ }
+ =20
/// getDIE - Returns the debug information entry map slot for the
/// specified debug variable.
DIE *getDIE(const MDNode *N) { return MDNodeToDieMap.lookup(N); }
@@ -150,8 +186,7 @@
=20
/// addString - Add a string attribute data and value.
///
- void addString(DIE *Die, unsigned Attribute, unsigned Form,
- const StringRef Str);
+ void addString(DIE *Die, unsigned Attribute, const StringRef Str);
=20
/// addLabel - Add a Dwarf label attribute data and value.
///
@@ -178,6 +213,7 @@
void addSourceLine(DIE *Die, DISubprogram SP);
void addSourceLine(DIE *Die, DIType Ty);
void addSourceLine(DIE *Die, DINameSpace NS);
+ void addSourceLine(DIE *Die, DIObjCProperty Ty);
=20
/// addAddress - Add an address attribute to a die based on the location
/// provided.
@@ -225,8 +261,10 @@
/// addToContextOwner - Add Die into the list of its context owner's chi=
ldren.
void addToContextOwner(DIE *Die, DIDescriptor Context);
=20
- /// addType - Add a new type attribute to the specified entity.
- void addType(DIE *Entity, DIType Ty);
+ /// addType - Add a new type attribute to the specified entity. This tak=
es
+ /// and attribute parameter because DW_AT_friend attributes are also
+ /// type references.
+ void addType(DIE *Entity, DIType Ty, unsigned Attribute =3D dwarf::DW_AT=
_type);
=20
/// getOrCreateNameSpace - Create a DIE for DINameSpace.
DIE *getOrCreateNameSpace(DINameSpace NS);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/AsmPrint=
er/DwarfDebug.cpp
--- a/head/contrib/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Tue Apr 17 11=
:51:51 2012 +0300
@@ -14,10 +14,12 @@
#define DEBUG_TYPE "dwarfdebug"
#include "DwarfDebug.h"
#include "DIE.h"
+#include "DwarfAccelTable.h"
#include "DwarfCompileUnit.h"
#include "llvm/Constants.h"
#include "llvm/Module.h"
#include "llvm/Instructions.h"
+#include "llvm/ADT/Triple.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/MC/MCAsmInfo.h"
@@ -52,6 +54,10 @@
cl::desc("Make an absence of debug location information explicit."),
cl::init(false));
=20
+static cl::opt<bool> DwarfAccelTables("dwarf-accel-tables", cl::Hidden,
+ cl::desc("Output prototype dwarf accelerator tables."),
+ cl::init(false));
+
namespace {
const char *DWARFGroupName =3D "DWARF Emission";
const char *DbgTimerName =3D "DWARF Debug Writer";
@@ -128,6 +134,11 @@
DwarfStrSectionSym =3D TextSectionSym =3D 0;
DwarfDebugRangeSectionSym =3D DwarfDebugLocSectionSym =3D 0;
FunctionBeginSym =3D FunctionEndSym =3D 0;
+
+ // Turn on accelerator tables for Darwin.
+ if (Triple(M->getTargetTriple()).isOSDarwin())
+ DwarfAccelTables =3D true;
+ =20
{
NamedRegionTimer T(DbgTimerName, DWARFGroupName, TimePassesIsEnabled);
beginModule(M);
@@ -136,6 +147,22 @@
DwarfDebug::~DwarfDebug() {
}
=20
+/// EmitSectionSym - Switch to the specified MCSection and emit an assembl=
er
+/// temporary label to it if SymbolStem is specified.
+static MCSymbol *EmitSectionSym(AsmPrinter *Asm, const MCSection *Section,
+ const char *SymbolStem =3D 0) {
+ Asm->OutStreamer.SwitchSection(Section);
+ if (!SymbolStem) return 0;
+
+ MCSymbol *TmpSym =3D Asm->GetTempSymbol(SymbolStem);
+ Asm->OutStreamer.EmitLabel(TmpSym);
+ return TmpSym;
+}
+
+MCSymbol *DwarfDebug::getStringPool() {
+ return Asm->GetTempSymbol("section_str");
+}
+
MCSymbol *DwarfDebug::getStringPoolEntry(StringRef Str) {
std::pair<MCSymbol*, unsigned> &Entry =3D StringPool[Str];
if (Entry.first) return Entry.first;
@@ -144,7 +171,6 @@
return Entry.first =3D Asm->GetTempSymbol("string", Entry.second);
}
=20
-
/// assignAbbrevNumber - Define a unique number for the abbreviation.
///
void DwarfDebug::assignAbbrevNumber(DIEAbbrev &Abbrev) {
@@ -178,6 +204,63 @@
return LinkageName;
}
=20
+static bool isObjCClass(StringRef Name) {
+ return Name.startswith("+") || Name.startswith("-");
+}
+
+static bool hasObjCCategory(StringRef Name) {
+ if (!isObjCClass(Name)) return false;
+
+ size_t pos =3D Name.find(')');
+ if (pos !=3D std::string::npos) {
+ if (Name[pos+1] !=3D ' ') return false;
+ return true;
+ }
+ return false;
+}
+
+static void getObjCClassCategory(StringRef In, StringRef &Class,
+ StringRef &Category) {
+ if (!hasObjCCategory(In)) {
+ Class =3D In.slice(In.find('[') + 1, In.find(' '));
+ Category =3D "";
+ return;
+ }
+
+ Class =3D In.slice(In.find('[') + 1, In.find('('));
+ Category =3D In.slice(In.find('[') + 1, In.find(' '));
+ return;
+}
+
+static StringRef getObjCMethodName(StringRef In) {
+ return In.slice(In.find(' ') + 1, In.find(']'));
+}
+
+// Add the various names to the Dwarf accelerator table names.
+static void addSubprogramNames(CompileUnit *TheCU, DISubprogram SP,
+ DIE* Die) {
+ if (!SP.isDefinition()) return;
+ =20
+ TheCU->addAccelName(SP.getName(), Die);
+
+ // If the linkage name is different than the name, go ahead and output
+ // that as well into the name table.
+ if (SP.getLinkageName() !=3D "" && SP.getName() !=3D SP.getLinkageName())
+ TheCU->addAccelName(SP.getLinkageName(), Die);
+
+ // If this is an Objective-C selector name add it to the ObjC accelerator
+ // too.
+ if (isObjCClass(SP.getName())) {
+ StringRef Class, Category;
+ getObjCClassCategory(SP.getName(), Class, Category);
+ TheCU->addAccelObjC(Class, Die);
+ if (Category !=3D "")
+ TheCU->addAccelObjC(Category, Die);
+ // Also add the base method name to the name table.
+ TheCU->addAccelName(getObjCMethodName(SP.getName()), Die);
+ }
+}
+
/// updateSubprogramScopeDIE - Find DIE for the given subprogram and
/// attach appropriate DW_AT_low_pc and DW_AT_high_pc attributes.
/// If there are global variables in this scope then create and insert
@@ -190,11 +273,7 @@
DISubprogram SP(SPNode);
=20
DISubprogram SPDecl =3D SP.getFunctionDeclaration();
- if (SPDecl.isSubprogram())
- // Refer function declaration directly.
- SPCU->addDIEEntry(SPDie, dwarf::DW_AT_specification, dwarf::DW_FORM_re=
f4,
- SPCU->getOrCreateSubprogramDIE(SPDecl));
- else {
+ if (!SPDecl.isSubprogram()) {
// There is not any need to generate specification DIE for a function
// defined at compile unit level. If a function is defined inside anot=
her
// function then gdb prefers the definition at top level and but does =
not
@@ -203,7 +282,7 @@
if (SP.isDefinition() && !SP.getContext().isCompileUnit() &&
!SP.getContext().isFile() &&
!isSubprogramContext(SP.getContext())) {
- SPCU-> addUInt(SPDie, dwarf::DW_AT_declaration, dwarf::DW_FORM_flag,=
1);
+ SPCU->addUInt(SPDie, dwarf::DW_AT_declaration, dwarf::DW_FORM_flag, =
1);
=20
// Add arguments.
DICompositeType SPTy =3D SP.getType();
@@ -241,6 +320,10 @@
MachineLocation Location(RI->getFrameRegister(*Asm->MF));
SPCU->addAddress(SPDie, dwarf::DW_AT_frame_base, Location);
=20
+ // Add name to the name table, we do this here because we're guaranteed
+ // to have concrete versions of our DW_TAG_subprogram nodes.
+ addSubprogramNames(SPCU, SP, SPDie);
+ =20
return SPDie;
}
=20
@@ -248,7 +331,6 @@
/// for this scope and attach DW_AT_low_pc/DW_AT_high_pc labels.
DIE *DwarfDebug::constructLexicalScopeDIE(CompileUnit *TheCU,=20
LexicalScope *Scope) {
-
DIE *ScopeDIE =3D new DIE(dwarf::DW_TAG_lexical_block);
if (Scope->isAbstractScope())
return ScopeDIE;
@@ -294,10 +376,9 @@
/// of the function.
DIE *DwarfDebug::constructInlinedScopeDIE(CompileUnit *TheCU,
LexicalScope *Scope) {
-
const SmallVector<InsnRange, 4> &Ranges =3D Scope->getRanges();
- assert (Ranges.empty() =3D=3D false
- && "LexicalScope does not have instruction markers!");
+ assert(Ranges.empty() =3D=3D false &&
+ "LexicalScope does not have instruction markers!");
=20
if (!Scope->getScopeNode())
return NULL;
@@ -314,8 +395,7 @@
const MCSymbol *EndLabel =3D getLabelAfterInsn(RI->second);
=20
if (StartLabel =3D=3D 0 || EndLabel =3D=3D 0) {
- assert (0 && "Unexpected Start and End labels for a inlined scope!");
- return 0;
+ llvm_unreachable("Unexpected Start and End labels for a inlined scope!=
");
}
assert(StartLabel->isDefined() &&
"Invalid starting label for an inlined scope!");
@@ -358,16 +438,20 @@
I =3D InlineInfo.find(InlinedSP);
=20
if (I =3D=3D InlineInfo.end()) {
- InlineInfo[InlinedSP].push_back(std::make_pair(StartLabel,
- ScopeDIE));
+ InlineInfo[InlinedSP].push_back(std::make_pair(StartLabel, ScopeDIE));
InlinedSPNodes.push_back(InlinedSP);
} else
I->second.push_back(std::make_pair(StartLabel, ScopeDIE));
=20
DILocation DL(Scope->getInlinedAt());
- TheCU->addUInt(ScopeDIE, dwarf::DW_AT_call_file, 0, TheCU->getID());
+ TheCU->addUInt(ScopeDIE, dwarf::DW_AT_call_file, 0,
+ GetOrCreateSourceID(DL.getFilename(), DL.getDirectory()));
TheCU->addUInt(ScopeDIE, dwarf::DW_AT_call_line, 0, DL.getLineNumber());
=20
+ // Add name to the name table, we do this here because we're guaranteed
+ // to have concrete versions of our DW_TAG_inlined_subprogram nodes.
+ addSubprogramNames(TheCU, InlinedSP, ScopeDIE);
+ =20
return ScopeDIE;
}
=20
@@ -376,7 +460,7 @@
if (!Scope || !Scope->getScopeNode())
return NULL;
=20
- SmallVector <DIE *, 8> Children;
+ SmallVector<DIE *, 8> Children;
=20
// Collect arguments for current function.
if (LScopes.isCurrentFunctionScope(Scope))
@@ -426,39 +510,39 @@
ScopeDIE->addChild(*I);
=20
if (DS.isSubprogram())
- TheCU->addPubTypes(DISubprogram(DS));
+ TheCU->addPubTypes(DISubprogram(DS));
=20
- return ScopeDIE;
+ return ScopeDIE;
}
=20
/// GetOrCreateSourceID - Look up the source id with the given directory a=
nd
/// source file names. If none currently exists, create a new id and inser=
t it
/// in the SourceIds map. This can update DirectoryNames and SourceFileNam=
es
/// maps as well.
-
unsigned DwarfDebug::GetOrCreateSourceID(StringRef FileName,=20
StringRef DirName) {
// If FE did not provide a file name, then assume stdin.
if (FileName.empty())
return GetOrCreateSourceID("<stdin>", StringRef());
=20
- // MCStream expects full path name as filename.
- if (!DirName.empty() && !sys::path::is_absolute(FileName)) {
- SmallString<128> FullPathName =3D DirName;
- sys::path::append(FullPathName, FileName);
- // Here FullPathName will be copied into StringMap by GetOrCreateSourc=
eID.
- return GetOrCreateSourceID(StringRef(FullPathName), StringRef());
- }
+ // TODO: this might not belong here. See if we can factor this better.
+ if (DirName =3D=3D CompilationDir)
+ DirName =3D "";
=20
- StringMapEntry<unsigned> &Entry =3D SourceIdMap.GetOrCreateValue(FileNam=
e);
- if (Entry.getValue())
- return Entry.getValue();
+ unsigned SrcId =3D SourceIdMap.size()+1;
=20
- unsigned SrcId =3D SourceIdMap.size();
- Entry.setValue(SrcId);
+ // We look up the file/dir pair by concatenating them with a zero byte.
+ SmallString<128> NamePair;
+ NamePair +=3D DirName;
+ NamePair +=3D '\0'; // Zero bytes are not allowed in paths.
+ NamePair +=3D FileName;
+
+ StringMapEntry<unsigned> &Ent =3D SourceIdMap.GetOrCreateValue(NamePair,=
SrcId);
+ if (Ent.getValue() !=3D SrcId)
+ return Ent.getValue();
=20
// Print out a .file directive to specify files for .loc directives.
- Asm->OutStreamer.EmitDwarfFileDirective(SrcId, Entry.getKey());
+ Asm->OutStreamer.EmitDwarfFileDirective(SrcId, DirName, FileName);
=20
return SrcId;
}
@@ -468,39 +552,36 @@
CompileUnit *DwarfDebug::constructCompileUnit(const MDNode *N) {
DICompileUnit DIUnit(N);
StringRef FN =3D DIUnit.getFilename();
- StringRef Dir =3D DIUnit.getDirectory();
- unsigned ID =3D GetOrCreateSourceID(FN, Dir);
+ CompilationDir =3D DIUnit.getDirectory();
+ unsigned ID =3D GetOrCreateSourceID(FN, CompilationDir);
=20
DIE *Die =3D new DIE(dwarf::DW_TAG_compile_unit);
- CompileUnit *NewCU =3D new CompileUnit(ID, Die, Asm, this);
- NewCU->addString(Die, dwarf::DW_AT_producer, dwarf::DW_FORM_string,
- DIUnit.getProducer());
+ CompileUnit *NewCU =3D new CompileUnit(ID, DIUnit.getLanguage(), Die, As=
m, this);
+ NewCU->addString(Die, dwarf::DW_AT_producer, DIUnit.getProducer());
NewCU->addUInt(Die, dwarf::DW_AT_language, dwarf::DW_FORM_data2,
DIUnit.getLanguage());
- NewCU->addString(Die, dwarf::DW_AT_name, dwarf::DW_FORM_string, FN);
- // Use DW_AT_entry_pc instead of DW_AT_low_pc/DW_AT_high_pc pair. This
- // simplifies debug range entries.
- NewCU->addUInt(Die, dwarf::DW_AT_entry_pc, dwarf::DW_FORM_addr, 0);
+ NewCU->addString(Die, dwarf::DW_AT_name, FN);
+ // 2.17.1 requires that we use DW_AT_low_pc for a single entry point
+ // into an entity.
+ NewCU->addUInt(Die, dwarf::DW_AT_low_pc, dwarf::DW_FORM_addr, 0);
// DW_AT_stmt_list is a offset of line number information for this
// compile unit in debug_line section.
- if(Asm->MAI->doesDwarfRequireRelocationForSectionOffset())
+ if (Asm->MAI->doesDwarfRequireRelocationForSectionOffset())
NewCU->addLabel(Die, dwarf::DW_AT_stmt_list, dwarf::DW_FORM_data4,
Asm->GetTempSymbol("section_line"));
else
NewCU->addUInt(Die, dwarf::DW_AT_stmt_list, dwarf::DW_FORM_data4, 0);
=20
- if (!Dir.empty())
- NewCU->addString(Die, dwarf::DW_AT_comp_dir, dwarf::DW_FORM_string, Di=
r);
+ if (!CompilationDir.empty())
+ NewCU->addString(Die, dwarf::DW_AT_comp_dir, CompilationDir);
if (DIUnit.isOptimized())
NewCU->addUInt(Die, dwarf::DW_AT_APPLE_optimized, dwarf::DW_FORM_flag,=
1);
=20
StringRef Flags =3D DIUnit.getFlags();
if (!Flags.empty())
- NewCU->addString(Die, dwarf::DW_AT_APPLE_flags, dwarf::DW_FORM_string,=20
- Flags);
+ NewCU->addString(Die, dwarf::DW_AT_APPLE_flags, Flags);
=20
- unsigned RVer =3D DIUnit.getRunTimeVersion();
- if (RVer)
+ if (unsigned RVer =3D DIUnit.getRunTimeVersion())
NewCU->addUInt(Die, dwarf::DW_AT_APPLE_major_runtime_vers,
dwarf::DW_FORM_data1, RVer);
=20
@@ -513,6 +594,11 @@
/// construct SubprogramDIE - Construct subprogram DIE.
void DwarfDebug::constructSubprogramDIE(CompileUnit *TheCU,=20
const MDNode *N) {
+ CompileUnit *&CURef =3D SPMap[N];
+ if (CURef)
+ return;
+ CURef =3D TheCU;
+
DISubprogram SP(N);
if (!SP.isDefinition())
// This is a method declaration which will be handled while constructi=
ng
@@ -527,10 +613,6 @@
// Add to context owner.
TheCU->addToContextOwner(SubprogramDie, SP.getContext());
=20
- // Expose as global.
- TheCU->addGlobal(SP.getName(), SubprogramDie);
-
- SPMap[N] =3D TheCU;
return;
}
=20
@@ -676,7 +758,7 @@
=20
// Construct subprogram DIE and add variables DIEs.
CompileUnit *SPCU =3D CUMap.lookup(TheCU);
- assert (SPCU && "Unable to find Compile Unit!");
+ assert(SPCU && "Unable to find Compile Unit!");
constructSubprogramDIE(SPCU, SP);
DIE *ScopeDIE =3D SPCU->getDIE(SP);
for (unsigned vi =3D 0, ve =3D Variables.getNumElements(); vi !=3D=
ve; ++vi) {
@@ -697,6 +779,13 @@
DIE *ISP =3D *AI;
FirstCU->addUInt(ISP, dwarf::DW_AT_inline, 0, dwarf::DW_INL_inlined);
}
+ for (DenseMap<const MDNode *, DIE *>::iterator AI =3D AbstractSPDies.beg=
in(),
+ AE =3D AbstractSPDies.end(); AI !=3D AE; ++AI) {
+ DIE *ISP =3D AI->second;
+ if (InlinedSubprogramDIEs.count(ISP))
+ continue;
+ FirstCU->addUInt(ISP, dwarf::DW_AT_inline, 0, dwarf::DW_INL_inlined);
+ }
=20
// Emit DW_AT_containing_type attribute to connect types with their
// vtable holding type.
@@ -727,9 +816,14 @@
// Corresponding abbreviations into a abbrev section.
emitAbbreviations();
=20
- // Emit info into a debug pubnames section.
- emitDebugPubNames();
-
+ // Emit info into a dwarf accelerator table sections.
+ if (DwarfAccelTables) {
+ emitAccelNames();
+ emitAccelObjC();
+ emitAccelNamespaces();
+ emitAccelTypes();
+ }
+ =20
// Emit info into a debug pubtypes section.
emitDebugPubTypes();
=20
@@ -837,7 +931,7 @@
/// isDbgValueInDefinedReg - Return true if debug value, encoded by
/// DBG_VALUE instruction, is in a defined reg.
static bool isDbgValueInDefinedReg(const MachineInstr *MI) {
- assert (MI->isDebugValue() && "Invalid DBG_VALUE machine instruction!");
+ assert(MI->isDebugValue() && "Invalid DBG_VALUE machine instruction!");
return MI->getNumOperands() =3D=3D 3 &&
MI->getOperand(0).isReg() && MI->getOperand(0).getReg() &&
MI->getOperand(1).isImm() && MI->getOperand(1).getImm() =3D=3D 0;
@@ -867,8 +961,7 @@
if (MI->getOperand(0).isCImm())
return DotDebugLocEntry(FLabel, SLabel, MI->getOperand(0).getCImm());
=20
- assert (0 && "Unexpected 3 operand DBG_VALUE instruction!");
- return DotDebugLocEntry();
+ llvm_unreachable("Unexpected 3 operand DBG_VALUE instruction!");
}
=20
/// collectVariableInfo - Find variables for each lexical scope.
@@ -964,7 +1057,8 @@
}
=20
// The value is valid until the next DBG_VALUE or clobber.
- DotDebugLocEntries.push_back(getDebugLocEntry(Asm, FLabel, SLabel, B=
egin));
+ DotDebugLocEntries.push_back(getDebugLocEntry(Asm, FLabel, SLabel,
+ Begin));
}
DotDebugLocEntries.push_back(DotDebugLocEntry());
}
@@ -999,12 +1093,15 @@
if (!MI->isDebugValue()) {
DebugLoc DL =3D MI->getDebugLoc();
if (DL !=3D PrevInstLoc && (!DL.isUnknown() || UnknownLocations)) {
- unsigned Flags =3D DWARF2_FLAG_IS_STMT;
+ unsigned Flags =3D 0;
PrevInstLoc =3D DL;
if (DL =3D=3D PrologEndLoc) {
Flags |=3D DWARF2_FLAG_PROLOGUE_END;
PrologEndLoc =3D DebugLoc();
}
+ if (PrologEndLoc.isUnknown())
+ Flags |=3D DWARF2_FLAG_IS_STMT;
+
if (!DL.isUnknown()) {
const MDNode *Scope =3D DL.getScope(Asm->MF->getFunction()->getCon=
text());
recordSourceLine(DL.getLine(), DL.getCol(), Scope, Flags);
@@ -1099,12 +1196,19 @@
}
=20
/// getFnDebugLoc - Walk up the scope chain of given debug loc and find
-/// line number info for the function.
+/// line number info for the function.
static DebugLoc getFnDebugLoc(DebugLoc DL, const LLVMContext &Ctx) {
const MDNode *Scope =3D getScopeNode(DL, Ctx);
DISubprogram SP =3D getDISubprogram(Scope);
- if (SP.Verify())=20
- return DebugLoc::get(SP.getLineNumber(), 0, SP);
+ if (SP.Verify()) {
+ // Check for number of operands since the compatibility is
+ // cheap here.
+ if (SP->getNumOperands() > 19)
+ return DebugLoc::get(SP.getScopeLineNumber(), 0, SP);
+ else
+ return DebugLoc::get(SP.getLineNumber(), 0, SP);
+ }
+
return DebugLoc();
}
=20
@@ -1135,7 +1239,7 @@
const MachineInstr *MI =3D II;
=20
if (MI->isDebugValue()) {
- assert (MI->getNumOperands() > 1 && "Invalid machine instruction!"=
);
+ assert(MI->getNumOperands() > 1 && "Invalid machine instruction!");
=20
// Keep track of user variables.
const MDNode *Var =3D
@@ -1206,7 +1310,7 @@
MOE =3D MI->operands_end(); MOI !=3D MOE; ++MOI) {
if (!MOI->isReg() || !MOI->isDef() || !MOI->getReg())
continue;
- for (const unsigned *AI =3D TRI->getOverlaps(MOI->getReg());
+ for (const uint16_t *AI =3D TRI->getOverlaps(MOI->getReg());
unsigned Reg =3D *AI; ++AI) {
const MDNode *Var =3D LiveUserVar[Reg];
if (!Var)
@@ -1277,7 +1381,7 @@
MF->getFunction()->getContext());
recordSourceLine(FnStartDL.getLine(), FnStartDL.getCol(),
FnStartDL.getScope(MF->getFunction()->getContext()),
- DWARF2_FLAG_IS_STMT);
+ 0);
}
}
=20
@@ -1303,7 +1407,7 @@
=20
LexicalScope *FnScope =3D LScopes.getCurrentFunctionScope();
CompileUnit *TheCU =3D SPMap.lookup(FnScope->getScopeNode());
- assert (TheCU && "Unable to find compile unit!");
+ assert(TheCU && "Unable to find compile unit!");
=20
// Construct abstract scopes.
ArrayRef<LexicalScope *> AList =3D LScopes.getAbstractScopesList();
@@ -1327,7 +1431,7 @@
=20
DIE *CurFnDIE =3D constructScopeDIE(TheCU, FnScope);
=20
- if (!DisableFramePointerElim(*MF))
+ if (!MF->getTarget().Options.DisableFramePointerElim(*MF))
TheCU->addUInt(CurFnDIE, dwarf::DW_AT_APPLE_omit_frame_ptr,
dwarf::DW_FORM_flag, 1);
=20
@@ -1380,7 +1484,7 @@
Fn =3D DB.getFilename();
Dir =3D DB.getDirectory();
} else
- assert(0 && "Unexpected scope info");
+ llvm_unreachable("Unexpected scope info");
=20
Src =3D GetOrCreateSourceID(Fn, Dir);
}
@@ -1398,10 +1502,6 @@
// Get the children.
const std::vector<DIE *> &Children =3D Die->getChildren();
=20
- // If not last sibling and has children then add sibling offset attribut=
e.
- if (!Last && !Children.empty())
- Die->addSiblingOffset(DIEValueAllocator);
-
// Record the abbreviation.
assignAbbrevNumber(Die->getAbbrev());
=20
@@ -1454,18 +1554,6 @@
}
}
=20
-/// EmitSectionSym - Switch to the specified MCSection and emit an assembl=
er
-/// temporary label to it if SymbolStem is specified.
-static MCSymbol *EmitSectionSym(AsmPrinter *Asm, const MCSection *Section,
- const char *SymbolStem =3D 0) {
- Asm->OutStreamer.SwitchSection(Section);
- if (!SymbolStem) return 0;
-
- MCSymbol *TmpSym =3D Asm->GetTempSymbol(SymbolStem);
- Asm->OutStreamer.EmitLabel(TmpSym);
- return TmpSym;
-}
-
/// EmitSectionLabels - Emit initial Dwarf sections with a label at
/// the start of each one.
void DwarfDebug::EmitSectionLabels() {
@@ -1483,7 +1571,6 @@
=20
EmitSectionSym(Asm, TLOF.getDwarfLineSection(), "section_line");
EmitSectionSym(Asm, TLOF.getDwarfLocSection());
- EmitSectionSym(Asm, TLOF.getDwarfPubNamesSection());
EmitSectionSym(Asm, TLOF.getDwarfPubTypesSection());
DwarfStrSectionSym =3D
EmitSectionSym(Asm, TLOF.getDwarfStrSection(), "section_str");
@@ -1525,9 +1612,6 @@
Asm->OutStreamer.AddComment(dwarf::AttributeString(Attr));
=20
switch (Attr) {
- case dwarf::DW_AT_sibling:
- Asm->EmitInt32(Die->getSiblingOffset());
- break;
case dwarf::DW_AT_abstract_origin: {
DIEEntry *E =3D cast<DIEEntry>(Values[i]);
DIE *Origin =3D E->getEntry();
@@ -1539,7 +1623,7 @@
// DW_AT_range Value encodes offset in debug_range section.
DIEInteger *V =3D cast<DIEInteger>(Values[i]);
=20
- if (Asm->MAI->doesDwarfUsesLabelOffsetForRanges()) {
+ if (Asm->MAI->doesDwarfUseLabelOffsetForRanges()) {
Asm->EmitLabelPlusOffset(DwarfDebugRangeSectionSym,
V->getValue(),
4);
@@ -1678,62 +1762,133 @@
Asm->EmitInt8(1);
}
=20
-/// emitDebugPubNames - Emit visible names into a debug pubnames section.
-///
-void DwarfDebug::emitDebugPubNames() {
+/// emitAccelNames - Emit visible names into a hashed accelerator table
+/// section.
+void DwarfDebug::emitAccelNames() {
+ DwarfAccelTable AT(DwarfAccelTable::Atom(DwarfAccelTable::eAtomTypeDIEOf=
fset,
+ dwarf::DW_FORM_data4));
for (DenseMap<const MDNode *, CompileUnit *>::iterator I =3D CUMap.begin=
(),
E =3D CUMap.end(); I !=3D E; ++I) {
CompileUnit *TheCU =3D I->second;
- // Start the dwarf pubnames section.
- Asm->OutStreamer.SwitchSection(
- Asm->getObjFileLowering().getDwarfPubNamesSection());
+ const StringMap<std::vector<DIE*> > &Names =3D TheCU->getAccelNames();
+ for (StringMap<std::vector<DIE*> >::const_iterator
+ GI =3D Names.begin(), GE =3D Names.end(); GI !=3D GE; ++GI) {
+ const char *Name =3D GI->getKeyData();
+ const std::vector<DIE *> &Entities =3D GI->second;
+ for (std::vector<DIE *>::const_iterator DI =3D Entities.begin(),
+ DE =3D Entities.end(); DI !=3D DE; ++DI)
+ AT.AddName(Name, (*DI));
+ }
+ }
=20
- Asm->OutStreamer.AddComment("Length of Public Names Info");
- Asm->EmitLabelDifference(
- Asm->GetTempSymbol("pubnames_end", TheCU->getID()),
- Asm->GetTempSymbol("pubnames_begin", TheCU->getID()), 4);
+ AT.FinalizeTable(Asm, "Names");
+ Asm->OutStreamer.SwitchSection(
+ Asm->getObjFileLowering().getDwarfAccelNamesSection());
+ MCSymbol *SectionBegin =3D Asm->GetTempSymbol("names_begin");
+ Asm->OutStreamer.EmitLabel(SectionBegin);
=20
- Asm->OutStreamer.EmitLabel(Asm->GetTempSymbol("pubnames_begin",
- TheCU->getID()));
+ // Emit the full data.
+ AT.Emit(Asm, SectionBegin, this);
+}
=20
- Asm->OutStreamer.AddComment("DWARF Version");
- Asm->EmitInt16(dwarf::DWARF_VERSION);
+/// emitAccelObjC - Emit objective C classes and categories into a hashed
+/// accelerator table section.
+void DwarfDebug::emitAccelObjC() {
+ DwarfAccelTable AT(DwarfAccelTable::Atom(DwarfAccelTable::eAtomTypeDIEOf=
fset,
+ dwarf::DW_FORM_data4));
+ for (DenseMap<const MDNode *, CompileUnit *>::iterator I =3D CUMap.begin=
(),
+ E =3D CUMap.end(); I !=3D E; ++I) {
+ CompileUnit *TheCU =3D I->second;
+ const StringMap<std::vector<DIE*> > &Names =3D TheCU->getAccelObjC();
+ for (StringMap<std::vector<DIE*> >::const_iterator
+ GI =3D Names.begin(), GE =3D Names.end(); GI !=3D GE; ++GI) {
+ const char *Name =3D GI->getKeyData();
+ const std::vector<DIE *> &Entities =3D GI->second;
+ for (std::vector<DIE *>::const_iterator DI =3D Entities.begin(),
+ DE =3D Entities.end(); DI !=3D DE; ++DI)
+ AT.AddName(Name, (*DI));
+ }
+ }
=20
- Asm->OutStreamer.AddComment("Offset of Compilation Unit Info");
- Asm->EmitSectionOffset(Asm->GetTempSymbol("info_begin", TheCU->getID()=
),
- DwarfInfoSectionSym);
+ AT.FinalizeTable(Asm, "ObjC");
+ Asm->OutStreamer.SwitchSection(Asm->getObjFileLowering()
+ .getDwarfAccelObjCSection());
+ MCSymbol *SectionBegin =3D Asm->GetTempSymbol("objc_begin");
+ Asm->OutStreamer.EmitLabel(SectionBegin);
=20
- Asm->OutStreamer.AddComment("Compilation Unit Length");
- Asm->EmitLabelDifference(Asm->GetTempSymbol("info_end", TheCU->getID()=
),
- Asm->GetTempSymbol("info_begin", TheCU->getID=
()),
- 4);
+ // Emit the full data.
+ AT.Emit(Asm, SectionBegin, this);
+}
=20
- const StringMap<DIE*> &Globals =3D TheCU->getGlobals();
- for (StringMap<DIE*>::const_iterator
- GI =3D Globals.begin(), GE =3D Globals.end(); GI !=3D GE; ++GI)=
{
+/// emitAccelNamespace - Emit namespace dies into a hashed accelerator
+/// table.
+void DwarfDebug::emitAccelNamespaces() {
+ DwarfAccelTable AT(DwarfAccelTable::Atom(DwarfAccelTable::eAtomTypeDIEOf=
fset,
+ dwarf::DW_FORM_data4));
+ for (DenseMap<const MDNode *, CompileUnit *>::iterator I =3D CUMap.begin=
(),
+ E =3D CUMap.end(); I !=3D E; ++I) {
+ CompileUnit *TheCU =3D I->second;
+ const StringMap<std::vector<DIE*> > &Names =3D TheCU->getAccelNamespac=
e();
+ for (StringMap<std::vector<DIE*> >::const_iterator
+ GI =3D Names.begin(), GE =3D Names.end(); GI !=3D GE; ++GI) {
const char *Name =3D GI->getKeyData();
- DIE *Entity =3D GI->second;
+ const std::vector<DIE *> &Entities =3D GI->second;
+ for (std::vector<DIE *>::const_iterator DI =3D Entities.begin(),
+ DE =3D Entities.end(); DI !=3D DE; ++DI)
+ AT.AddName(Name, (*DI));
+ }
+ }
=20
- Asm->OutStreamer.AddComment("DIE offset");
- Asm->EmitInt32(Entity->getOffset());
+ AT.FinalizeTable(Asm, "namespac");
+ Asm->OutStreamer.SwitchSection(Asm->getObjFileLowering()
+ .getDwarfAccelNamespaceSection());
+ MCSymbol *SectionBegin =3D Asm->GetTempSymbol("namespac_begin");
+ Asm->OutStreamer.EmitLabel(SectionBegin);
=20
- if (Asm->isVerbose())
- Asm->OutStreamer.AddComment("External Name");
- Asm->OutStreamer.EmitBytes(StringRef(Name, strlen(Name)+1), 0);
+ // Emit the full data.
+ AT.Emit(Asm, SectionBegin, this);
+}
+
+/// emitAccelTypes() - Emit type dies into a hashed accelerator table.
+void DwarfDebug::emitAccelTypes() {
+ std::vector<DwarfAccelTable::Atom> Atoms;
+ Atoms.push_back(DwarfAccelTable::Atom(DwarfAccelTable::eAtomTypeDIEOffse=
t,
+ dwarf::DW_FORM_data4));
+ Atoms.push_back(DwarfAccelTable::Atom(DwarfAccelTable::eAtomTypeTag,
+ dwarf::DW_FORM_data2));
+ Atoms.push_back(DwarfAccelTable::Atom(DwarfAccelTable::eAtomTypeTypeFlag=
s,
+ dwarf::DW_FORM_data1));
+ DwarfAccelTable AT(Atoms);
+ for (DenseMap<const MDNode *, CompileUnit *>::iterator I =3D CUMap.begin=
(),
+ E =3D CUMap.end(); I !=3D E; ++I) {
+ CompileUnit *TheCU =3D I->second;
+ const StringMap<std::vector<std::pair<DIE*, unsigned > > > &Names
+ =3D TheCU->getAccelTypes();
+ for (StringMap<std::vector<std::pair<DIE*, unsigned> > >::const_iterat=
or
+ GI =3D Names.begin(), GE =3D Names.end(); GI !=3D GE; ++GI) {
+ const char *Name =3D GI->getKeyData();
+ const std::vector<std::pair<DIE *, unsigned> > &Entities =3D GI->sec=
ond;
+ for (std::vector<std::pair<DIE *, unsigned> >::const_iterator DI
+ =3D Entities.begin(), DE =3D Entities.end(); DI !=3DDE; ++DI)
+ AT.AddName(Name, (*DI).first, (*DI).second);
}
+ }
=20
- Asm->OutStreamer.AddComment("End Mark");
- Asm->EmitInt32(0);
- Asm->OutStreamer.EmitLabel(Asm->GetTempSymbol("pubnames_end",
- TheCU->getID()));
- }
+ AT.FinalizeTable(Asm, "types");
+ Asm->OutStreamer.SwitchSection(Asm->getObjFileLowering()
+ .getDwarfAccelTypesSection());
+ MCSymbol *SectionBegin =3D Asm->GetTempSymbol("types_begin");
+ Asm->OutStreamer.EmitLabel(SectionBegin);
+
+ // Emit the full data.
+ AT.Emit(Asm, SectionBegin, this);
}
=20
void DwarfDebug::emitDebugPubTypes() {
for (DenseMap<const MDNode *, CompileUnit *>::iterator I =3D CUMap.begin=
(),
E =3D CUMap.end(); I !=3D E; ++I) {
CompileUnit *TheCU =3D I->second;
- // Start the dwarf pubnames section.
+ // Start the dwarf pubtypes section.
Asm->OutStreamer.SwitchSection(
Asm->getObjFileLowering().getDwarfPubTypesSection());
Asm->OutStreamer.AddComment("Length of Public Types Info");
@@ -1766,6 +1921,7 @@
Asm->EmitInt32(Entity->getOffset());
=20
if (Asm->isVerbose()) Asm->OutStreamer.AddComment("External Name");
+ // Emit the name with a terminating null byte.
Asm->OutStreamer.EmitBytes(StringRef(Name, GI->getKeyLength()+1), 0);
}
=20
@@ -1801,8 +1957,10 @@
// Emit a label for reference from debug information entries.
Asm->OutStreamer.EmitLabel(Entries[i].second->getValue().first);
=20
- // Emit the string itself.
- Asm->OutStreamer.EmitBytes(Entries[i].second->getKey(), 0/*addrspace*/=
);
+ // Emit the string itself with a terminating null byte.
+ Asm->OutStreamer.EmitBytes(StringRef(Entries[i].second->getKeyData(),
+ Entries[i].second->getKeyLength()=
+1),
+ 0/*addrspace*/);
}
}
=20
@@ -1958,7 +2116,7 @@
/// __debug_info section, and the low_pc is the starting address for the
/// inlining instance.
void DwarfDebug::emitDebugInlineInfo() {
- if (!Asm->MAI->doesDwarfUsesInlineInfoSection())
+ if (!Asm->MAI->doesDwarfUseInlineInfoSection())
return;
=20
if (!FirstCU)
@@ -1990,10 +2148,9 @@
StringRef Name =3D SP.getName();
=20
Asm->OutStreamer.AddComment("MIPS linkage name");
- if (LName.empty()) {
- Asm->OutStreamer.EmitBytes(Name, 0);
- Asm->OutStreamer.EmitIntValue(0, 1, 0); // nul terminator.
- } else
+ if (LName.empty())
+ Asm->EmitSectionOffset(getStringPoolEntry(Name), DwarfStrSectionSym);
+ else
Asm->EmitSectionOffset(getStringPoolEntry(getRealLinkageName(LName)),
DwarfStrSectionSym);
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/AsmPrint=
er/DwarfDebug.h
--- a/head/contrib/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h Tue Apr 17 11:5=
1:51 2012 +0300
@@ -30,7 +30,8 @@
namespace llvm {
=20
class CompileUnit;
-class DbgConcreteScope;
+class ConstantInt;
+class ConstantFP;
class DbgVariable;
class MachineFrameInfo;
class MachineModuleInfo;
@@ -207,8 +208,8 @@
///
std::vector<DIEAbbrev *> Abbreviations;
=20
- /// SourceIdMap - Source id map, i.e. pair of directory id and source fi=
le
- /// id mapped to a unique id.
+ /// SourceIdMap - Source id map, i.e. pair of source filename and direct=
ory,
+ /// separated by a zero byte, mapped to a unique id.
StringMap<unsigned> SourceIdMap;
=20
/// StringPool - A String->Symbol mapping of strings used by indirect
@@ -216,8 +217,6 @@
StringMap<std::pair<MCSymbol*, unsigned> > StringPool;
unsigned NextStringPoolNumber;
=20
- MCSymbol *getStringPoolEntry(StringRef Str);
-
/// SectionMap - Provides a unique id per text section.
///
UniqueVector<const MCSection*> SectionMap;
@@ -239,12 +238,12 @@
/// DotDebugLocEntries - Collection of DotDebugLocEntry.
SmallVector<DotDebugLocEntry, 4> DotDebugLocEntries;
=20
- /// InliendSubprogramDIEs - Collection of subprgram DIEs that are marked
+ /// InlinedSubprogramDIEs - Collection of subprogram DIEs that are marked
/// (at the end of the module) as DW_AT_inline.
SmallPtrSet<DIE *, 4> InlinedSubprogramDIEs;
=20
/// InlineInfo - Keep track of inlined functions and their location. Th=
is
- /// information is used to populate debug_inlined section.
+ /// information is used to populate the debug_inlined section.
typedef std::pair<const MCSymbol *, DIE *> InlineInfoLabels;
DenseMap<const MDNode *, SmallVector<InlineInfoLabels, 4> > InlineInfo;
SmallVector<const MDNode *, 4> InlinedSPNodes;
@@ -304,6 +303,10 @@
MCSymbol *DwarfDebugLocSectionSym;
MCSymbol *FunctionBeginSym, *FunctionEndSym;
=20
+ // As an optimization, there is no need to emit an entry in the directory
+ // table for the same directory as DW_at_comp_dir.
+ StringRef CompilationDir;
+
private:
=20
/// assignAbbrevNumber - Define a unique number for the abbreviation.
@@ -340,7 +343,7 @@
/// the start of each one.
void EmitSectionLabels();
=20
- /// emitDIE - Recusively Emits a debug information entry.
+ /// emitDIE - Recursively Emits a debug information entry.
///
void emitDIE(DIE *Die);
=20
@@ -365,10 +368,22 @@
///
void emitEndOfLineMatrix(unsigned SectionEnd);
=20
- /// emitDebugPubNames - Emit visible names into a debug pubnames section.
+ /// emitAccelNames - Emit visible names into a hashed accelerator table
+ /// section.
+ void emitAccelNames();
+ =20
+ /// emitAccelObjC - Emit objective C classes and categories into a hashed
+ /// accelerator table section.
+ void emitAccelObjC();
+
+ /// emitAccelNamespace - Emit namespace dies into a hashed accelerator
+ /// table.
+ void emitAccelNamespaces();
+
+ /// emitAccelTypes() - Emit type dies into a hashed accelerator table.
///
- void emitDebugPubNames();
-
+ void emitAccelTypes();
+ =20
/// emitDebugPubTypes - Emit visible types into a debug pubtypes section.
///
void emitDebugPubTypes();
@@ -407,10 +422,10 @@
/// 3. an unsigned LEB128 number indicating the number of distinct inlin=
ing=20
/// instances for the function.
///=20
- /// The rest of the entry consists of a {die_offset, low_pc} pair for e=
ach=20
+ /// The rest of the entry consists of a {die_offset, low_pc} pair for ea=
ch=20
/// inlined instance; the die_offset points to the inlined_subroutine di=
e in
- /// the __debug_info section, and the low_pc is the starting address fo=
r the
- /// inlining instance.
+ /// the __debug_info section, and the low_pc is the starting address for=
the
+ /// inlining instance.
void emitDebugInlineInfo();
=20
/// constructCompileUnit - Create new CompileUnit for the given=20
@@ -426,8 +441,8 @@
void recordSourceLine(unsigned Line, unsigned Col, const MDNode *Scope,
unsigned Flags);
=20
- /// identifyScopeMarkers() - Indentify instructions that are marking
- /// beginning of or end of a scope.
+ /// identifyScopeMarkers() - Indentify instructions that are marking the
+ /// beginning of or ending of a scope.
void identifyScopeMarkers();
=20
/// addCurrentFnArgument - If Var is an current function argument that a=
dd
@@ -472,7 +487,7 @@
void collectInfoFromNamedMDNodes(Module *M);
=20
/// collectLegacyDebugInfo - Collect debug info using DebugInfoFinder.
- /// FIXME - Remove this when dragon-egg and llvm-gcc switch to DIBuilder.
+ /// FIXME - Remove this when DragonEgg switches to DIBuilder.
bool collectLegacyDebugInfo(Module *M);
=20
/// beginModule - Emit all Dwarf sections that should come prior to the
@@ -504,6 +519,13 @@
=20
/// createSubprogramDIE - Create new DIE using SP.
DIE *createSubprogramDIE(DISubprogram SP);
+
+ /// getStringPool - returns the entry into the start of the pool.
+ MCSymbol *getStringPool();
+
+ /// getStringPoolEntry - returns an entry into the string pool with the =
given
+ /// string text.
+ MCSymbol *getStringPoolEntry(StringRef Str);
};
} // End of namespace llvm
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/AsmPrint=
er/DwarfException.cpp
--- a/head/contrib/llvm/lib/CodeGen/AsmPrinter/DwarfException.cpp Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/AsmPrinter/DwarfException.cpp Tue Apr 1=
7 11:51:51 2012 +0300
@@ -31,6 +31,7 @@
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Support/Dwarf.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/StringExtras.h"
@@ -184,7 +185,7 @@
/// CallToNoUnwindFunction - Return `true' if this is a call to a function
/// marked `nounwind'. Return `false' otherwise.
bool DwarfException::CallToNoUnwindFunction(const MachineInstr *MI) {
- assert(MI->getDesc().isCall() && "This should be a call instruction!");
+ assert(MI->isCall() && "This should be a call instruction!");
=20
bool MarkedNoUnwind =3D false;
bool SawFunc =3D false;
@@ -243,7 +244,7 @@
for (MachineBasicBlock::const_iterator MI =3D I->begin(), E =3D I->end=
();
MI !=3D E; ++MI) {
if (!MI->isLabel()) {
- if (MI->getDesc().isCall())
+ if (MI->isCall())
SawPotentiallyThrowing |=3D !CallToNoUnwindFunction(MI);
continue;
}
@@ -529,10 +530,8 @@
// Offset of the landing pad, counted in 16-byte bundles relative to=
the
// @LPStart address.
if (VerboseAsm) {
- Asm->OutStreamer.AddComment(Twine(">> Call Site ") +
- llvm::utostr(idx) + " <<");
- Asm->OutStreamer.AddComment(Twine(" On exception at call site ") +
- llvm::utostr(idx));
+ Asm->OutStreamer.AddComment(">> Call Site " + Twine(idx) + " <<");
+ Asm->OutStreamer.AddComment(" On exception at call site "+Twine(i=
dx));
}
Asm->EmitULEB128(idx);
=20
@@ -543,8 +542,8 @@
if (S.Action =3D=3D 0)
Asm->OutStreamer.AddComment(" Action: cleanup");
else
- Asm->OutStreamer.AddComment(Twine(" Action: ") +
- llvm::utostr((S.Action - 1) / 2 + 1)=
);
+ Asm->OutStreamer.AddComment(" Action: " +
+ Twine((S.Action - 1) / 2 + 1));
}
Asm->EmitULEB128(S.Action);
}
@@ -596,8 +595,7 @@
// number of 16-byte bundles. The first call site is counted relativ=
e to
// the start of the procedure fragment.
if (VerboseAsm)
- Asm->OutStreamer.AddComment(Twine(">> Call Site ") +
- llvm::utostr(++Entry) + " <<");
+ Asm->OutStreamer.AddComment(">> Call Site " + Twine(++Entry) + " <=
<");
Asm->EmitLabelDifference(BeginLabel, EHFuncBeginSym, 4);
if (VerboseAsm)
Asm->OutStreamer.AddComment(Twine(" Call between ") +
@@ -625,8 +623,8 @@
if (S.Action =3D=3D 0)
Asm->OutStreamer.AddComment(" On action: cleanup");
else
- Asm->OutStreamer.AddComment(Twine(" On action: ") +
- llvm::utostr((S.Action - 1) / 2 + 1)=
);
+ Asm->OutStreamer.AddComment(" On action: " +
+ Twine((S.Action - 1) / 2 + 1));
}
Asm->EmitULEB128(S.Action);
}
@@ -640,8 +638,7 @@
=20
if (VerboseAsm) {
// Emit comments that decode the action table.
- Asm->OutStreamer.AddComment(Twine(">> Action Record ") +
- llvm::utostr(++Entry) + " <<");
+ Asm->OutStreamer.AddComment(">> Action Record " + Twine(++Entry) + "=
<<");
}
=20
// Type Filter
@@ -650,11 +647,11 @@
// type of the catch clauses or the types in the exception specifica=
tion.
if (VerboseAsm) {
if (Action.ValueForTypeID > 0)
- Asm->OutStreamer.AddComment(Twine(" Catch TypeInfo ") +
- llvm::itostr(Action.ValueForTypeID));
+ Asm->OutStreamer.AddComment(" Catch TypeInfo " +
+ Twine(Action.ValueForTypeID));
else if (Action.ValueForTypeID < 0)
- Asm->OutStreamer.AddComment(Twine(" Filter TypeInfo ") +
- llvm::itostr(Action.ValueForTypeID));
+ Asm->OutStreamer.AddComment(" Filter TypeInfo " +
+ Twine(Action.ValueForTypeID));
else
Asm->OutStreamer.AddComment(" Cleanup");
}
@@ -669,8 +666,7 @@
Asm->OutStreamer.AddComment(" No further actions");
} else {
unsigned NextAction =3D Entry + (Action.NextAction + 1) / 2;
- Asm->OutStreamer.AddComment(Twine(" Continue to action ") +
- llvm::utostr(NextAction));
+ Asm->OutStreamer.AddComment(" Continue to action "+Twine(NextActi=
on));
}
}
Asm->EmitSLEB128(Action.NextAction);
@@ -687,7 +683,7 @@
I =3D TypeInfos.rbegin(), E =3D TypeInfos.rend(); I !=3D E; ++I) {
const GlobalVariable *GV =3D *I;
if (VerboseAsm)
- Asm->OutStreamer.AddComment(Twine("TypeInfo ") + llvm::utostr(Entry-=
-));
+ Asm->OutStreamer.AddComment("TypeInfo " + Twine(Entry--));
if (GV)
Asm->EmitReference(GV, TTypeEncoding);
else
@@ -707,7 +703,7 @@
if (VerboseAsm) {
--Entry;
if (TypeID !=3D 0)
- Asm->OutStreamer.AddComment(Twine("FilterInfo ") + llvm::itostr(En=
try));
+ Asm->OutStreamer.AddComment("FilterInfo " + Twine(Entry));
}
=20
Asm->EmitULEB128(TypeID);
@@ -719,17 +715,17 @@
/// EndModule - Emit all exception information that should come after the
/// content.
void DwarfException::EndModule() {
- assert(0 && "Should be implemented");
+ llvm_unreachable("Should be implemented");
}
=20
/// BeginFunction - Gather pre-function exception information. Assumes it's
/// being emitted immediately after the function entry point.
void DwarfException::BeginFunction(const MachineFunction *MF) {
- assert(0 && "Should be implemented");
+ llvm_unreachable("Should be implemented");
}
=20
/// EndFunction - Gather and emit post-function exception information.
///
void DwarfException::EndFunction() {
- assert(0 && "Should be implemented");
+ llvm_unreachable("Should be implemented");
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/BranchFo=
lding.cpp
--- a/head/contrib/llvm/lib/CodeGen/BranchFolding.cpp Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/BranchFolding.cpp Tue Apr 17 11:51:51 2=
012 +0300
@@ -23,6 +23,7 @@
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
@@ -61,29 +62,33 @@
=20
namespace {
/// BranchFolderPass - Wrap branch folder in a machine function pass.
- class BranchFolderPass : public MachineFunctionPass,
- public BranchFolder {
+ class BranchFolderPass : public MachineFunctionPass {
public:
static char ID;
- explicit BranchFolderPass(bool defaultEnableTailMerge)
- : MachineFunctionPass(ID), BranchFolder(defaultEnableTailMerge, true=
) {}
+ explicit BranchFolderPass(): MachineFunctionPass(ID) {}
=20
virtual bool runOnMachineFunction(MachineFunction &MF);
- virtual const char *getPassName() const { return "Control Flow Optimiz=
er"; }
+
+ virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.addRequired<TargetPassConfig>();
+ MachineFunctionPass::getAnalysisUsage(AU);
+ }
};
}
=20
char BranchFolderPass::ID =3D 0;
+char &llvm::BranchFolderPassID =3D BranchFolderPass::ID;
=20
-FunctionPass *llvm::createBranchFoldingPass(bool DefaultEnableTailMerge) {
- return new BranchFolderPass(DefaultEnableTailMerge);
-}
+INITIALIZE_PASS(BranchFolderPass, "branch-folder",
+ "Control Flow Optimizer", false, false)
=20
bool BranchFolderPass::runOnMachineFunction(MachineFunction &MF) {
- return OptimizeFunction(MF,
- MF.getTarget().getInstrInfo(),
- MF.getTarget().getRegisterInfo(),
- getAnalysisIfAvailable<MachineModuleInfo>());
+ TargetPassConfig *PassConfig =3D &getAnalysis<TargetPassConfig>();
+ BranchFolder Folder(PassConfig->getEnableTailMerge(), /*CommonHoist=3D*/=
true);
+ return Folder.OptimizeFunction(MF,
+ MF.getTarget().getInstrInfo(),
+ MF.getTarget().getRegisterInfo(),
+ getAnalysisIfAvailable<MachineModuleInfo>=
());
}
=20
=20
@@ -132,7 +137,7 @@
break;
unsigned Reg =3D I->getOperand(0).getReg();
ImpDefRegs.insert(Reg);
- for (const unsigned *SubRegs =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *SubRegs =3D TRI->getSubRegisters(Reg);
unsigned SubReg =3D *SubRegs; ++SubRegs)
ImpDefRegs.insert(SubReg);
++I;
@@ -179,8 +184,14 @@
TII =3D tii;
TRI =3D tri;
MMI =3D mmi;
+ RS =3D NULL;
=20
- RS =3D TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : NULL;
+ // Use a RegScavenger to help update liveness when required.
+ MachineRegisterInfo &MRI =3D MF.getRegInfo();
+ if (MRI.tracksLiveness() && TRI->requiresRegisterScavenging(MF))
+ RS =3D new RegScavenger();
+ else
+ MRI.invalidateLiveness();
=20
// Fix CFG. The later algorithms expect it to be right.
bool MadeChange =3D false;
@@ -208,7 +219,7 @@
delete RS;
return MadeChange;
}
- =20
+
// Walk the function to find jump tables that are live.
BitVector JTIsLive(JTI->getJumpTables().size());
for (MachineFunction::iterator BB =3D MF.begin(), E =3D MF.end();
@@ -432,10 +443,9 @@
for (; I !=3D E; ++I) {
if (I->isDebugValue())
continue;
- const MCInstrDesc &MCID =3D I->getDesc();
- if (MCID.isCall())
+ if (I->isCall())
Time +=3D 10;
- else if (MCID.mayLoad() || MCID.mayStore())
+ else if (I->mayLoad() || I->mayStore())
Time +=3D 2;
else
++Time;
@@ -484,8 +494,9 @@
// an object with itself.
#ifndef _GLIBCXX_DEBUG
llvm_unreachable("Predecessor appears twice");
+#else
+ return false;
#endif
- return false;
}
}
=20
@@ -502,7 +513,7 @@
break;
}
--I;
- if (!I->getDesc().isTerminator()) break;
+ if (!I->isTerminator()) break;
++NumTerms;
}
return NumTerms;
@@ -550,8 +561,8 @@
// heuristics.
unsigned EffectiveTailLen =3D CommonTailLen;
if (SuccBB && MBB1 !=3D PredBB && MBB2 !=3D PredBB &&
- !MBB1->back().getDesc().isBarrier() &&
- !MBB2->back().getDesc().isBarrier())
+ !MBB1->back().isBarrier() &&
+ !MBB2->back().isBarrier())
++EffectiveTailLen;
=20
// Check if the common tail is long enough to be worthwhile.
@@ -870,6 +881,9 @@
// Visit each predecessor only once.
if (!UniquePreds.insert(PBB))
continue;
+ // Skip blocks which may jump to a landing pad. Can't tail merge t=
hese.
+ if (PBB->getLandingPadSuccessor())
+ continue;
MachineBasicBlock *TBB =3D 0, *FBB =3D 0;
SmallVector<MachineOperand, 4> Cond;
if (!TII->AnalyzeBranch(*PBB, TBB, FBB, Cond, true)) {
@@ -924,8 +938,9 @@
if (MergePotentials.size() >=3D 2)
MadeChange |=3D TryTailMergeBlocks(IBB, PredBB);
// Reinsert an unconditional branch if needed.
- // The 1 below can occur as a result of removing blocks in TryTailMe=
rgeBlocks.
- PredBB =3D prior(I); // this may have been changed in TryTailMe=
rgeBlocks
+ // The 1 below can occur as a result of removing blocks in
+ // TryTailMergeBlocks.
+ PredBB =3D prior(I); // this may have been changed in TryTailMer=
geBlocks
if (MergePotentials.size() =3D=3D 1 &&
MergePotentials.begin()->getBlock() !=3D PredBB)
FixTail(MergePotentials.begin()->getBlock(), IBB, TII);
@@ -980,7 +995,7 @@
if (!MBBI->isDebugValue())
break;
}
- return (MBBI->getDesc().isBranch());
+ return (MBBI->isBranch());
}
=20
/// IsBetterFallthrough - Return true if it would be clearly better to
@@ -1008,7 +1023,23 @@
MachineBasicBlock::iterator MBB2I =3D --MBB2->end();
while (MBB2I->isDebugValue())
--MBB2I;
- return MBB2I->getDesc().isCall() && !MBB1I->getDesc().isCall();
+ return MBB2I->isCall() && !MBB1I->isCall();
+}
+
+/// getBranchDebugLoc - Find and return, if any, the DebugLoc of the branch
+/// instructions on the block. Always use the DebugLoc of the first
+/// branching instruction found unless its absent, in which case use the
+/// DebugLoc of the second if present.
+static DebugLoc getBranchDebugLoc(MachineBasicBlock &MBB) {
+ MachineBasicBlock::iterator I =3D MBB.end();
+ if (I =3D=3D MBB.begin())
+ return DebugLoc();
+ --I;
+ while (I->isDebugValue() && I !=3D MBB.begin())
+ --I;
+ if (I->isBranch())
+ return I->getDebugLoc();
+ return DebugLoc();
}
=20
/// OptimizeBlock - Analyze and optimize control flow related to the speci=
fied
@@ -1016,7 +1047,6 @@
bool BranchFolder::OptimizeBlock(MachineBasicBlock *MBB) {
bool MadeChange =3D false;
MachineFunction &MF =3D *MBB->getParent();
- DebugLoc dl; // FIXME: this is nowhere
ReoptimizeBlock:
=20
MachineFunction::iterator FallThrough =3D MBB;
@@ -1065,6 +1095,7 @@
// destination, remove the branch, replacing it with an unconditional =
one or
// a fall-through.
if (PriorTBB && PriorTBB =3D=3D PriorFBB) {
+ DebugLoc dl =3D getBranchDebugLoc(PrevBB);
TII->RemoveBranch(PrevBB);
PriorCond.clear();
if (PriorTBB !=3D MBB)
@@ -1091,7 +1122,7 @@
MachineBasicBlock::iterator PrevBBIter =3D PrevBB.end();
--PrevBBIter;
MachineBasicBlock::iterator MBBIter =3D MBB->begin();
- // Check if DBG_VALUE at the end of PrevBB is identical to the=20
+ // Check if DBG_VALUE at the end of PrevBB is identical to the
// DBG_VALUE at the beginning of MBB.
while (PrevBBIter !=3D PrevBB.begin() && MBBIter !=3D MBB->end()
&& PrevBBIter->isDebugValue() && MBBIter->isDebugValue()) {
@@ -1103,7 +1134,7 @@
}
}
PrevBB.splice(PrevBB.end(), MBB, MBB->begin(), MBB->end());
- PrevBB.removeSuccessor(PrevBB.succ_begin());;
+ PrevBB.removeSuccessor(PrevBB.succ_begin());
assert(PrevBB.succ_empty());
PrevBB.transferSuccessors(MBB);
MadeChange =3D true;
@@ -1122,6 +1153,7 @@
// If the prior block branches somewhere else on the condition and her=
e if
// the condition is false, remove the uncond second branch.
if (PriorFBB =3D=3D MBB) {
+ DebugLoc dl =3D getBranchDebugLoc(PrevBB);
TII->RemoveBranch(PrevBB);
TII->InsertBranch(PrevBB, PriorTBB, 0, PriorCond, dl);
MadeChange =3D true;
@@ -1135,6 +1167,7 @@
if (PriorTBB =3D=3D MBB) {
SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
if (!TII->ReverseBranchCondition(NewPriorCond)) {
+ DebugLoc dl =3D getBranchDebugLoc(PrevBB);
TII->RemoveBranch(PrevBB);
TII->InsertBranch(PrevBB, PriorFBB, 0, NewPriorCond, dl);
MadeChange =3D true;
@@ -1172,6 +1205,7 @@
DEBUG(dbgs() << "\nMoving MBB: " << *MBB
<< "To make fallthrough to: " << *PriorTBB << "\n");
=20
+ DebugLoc dl =3D getBranchDebugLoc(PrevBB);
TII->RemoveBranch(PrevBB);
TII->InsertBranch(PrevBB, MBB, 0, NewPriorCond, dl);
=20
@@ -1201,6 +1235,7 @@
if (CurTBB && CurFBB && CurFBB =3D=3D MBB && CurTBB !=3D MBB) {
SmallVector<MachineOperand, 4> NewCond(CurCond);
if (!TII->ReverseBranchCondition(NewCond)) {
+ DebugLoc dl =3D getBranchDebugLoc(*MBB);
TII->RemoveBranch(*MBB);
TII->InsertBranch(*MBB, CurFBB, CurTBB, NewCond, dl);
MadeChange =3D true;
@@ -1214,6 +1249,7 @@
if (CurTBB && CurCond.empty() && CurFBB =3D=3D 0 &&
IsBranchOnlyBlock(MBB) && CurTBB !=3D MBB &&
!MBB->hasAddressTaken()) {
+ DebugLoc dl =3D getBranchDebugLoc(*MBB);
// This block may contain just an unconditional branch. Because the=
re can
// be 'non-branch terminators' in the block, try removing the branch=
and
// then seeing if the block is empty.
@@ -1256,8 +1292,9 @@
assert(PriorFBB =3D=3D 0 && "Machine CFG out of date!");
PriorFBB =3D MBB;
}
+ DebugLoc pdl =3D getBranchDebugLoc(PrevBB);
TII->RemoveBranch(PrevBB);
- TII->InsertBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, dl);
+ TII->InsertBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, pdl);
}
=20
// Iterate through all the predecessors, revectoring each in-tur=
n.
@@ -1281,9 +1318,10 @@
bool NewCurUnAnalyzable =3D TII->AnalyzeBranch(*PMBB, NewCur=
TBB,
NewCurFBB, NewCurCond, true);
if (!NewCurUnAnalyzable && NewCurTBB && NewCurTBB =3D=3D New=
CurFBB) {
+ DebugLoc pdl =3D getBranchDebugLoc(*PMBB);
TII->RemoveBranch(*PMBB);
NewCurCond.clear();
- TII->InsertBranch(*PMBB, NewCurTBB, 0, NewCurCond, dl);
+ TII->InsertBranch(*PMBB, NewCurTBB, 0, NewCurCond, pdl);
MadeChange =3D true;
++NumBranchOpts;
PMBB->CorrectExtraCFGEdges(NewCurTBB, 0, false);
@@ -1343,7 +1381,7 @@
if (CurFallsThru) {
MachineBasicBlock *NextBB =3D llvm::next(MachineFunction::iter=
ator(MBB));
CurCond.clear();
- TII->InsertBranch(*MBB, NextBB, 0, CurCond, dl);
+ TII->InsertBranch(*MBB, NextBB, 0, CurCond, DebugLoc());
}
MBB->moveAfter(PredBB);
MadeChange =3D true;
@@ -1446,7 +1484,7 @@
continue;
if (MO.isUse()) {
Uses.insert(Reg);
- for (const unsigned *AS =3D TRI->getAliasSet(Reg); *AS; ++AS)
+ for (const uint16_t *AS =3D TRI->getAliasSet(Reg); *AS; ++AS)
Uses.insert(*AS);
} else if (!MO.isDead())
// Don't try to hoist code in the rare case the terminator defines a
@@ -1469,6 +1507,9 @@
bool IsDef =3D false;
for (unsigned i =3D 0, e =3D PI->getNumOperands(); !IsDef && i !=3D e; +=
+i) {
const MachineOperand &MO =3D PI->getOperand(i);
+ // If PI has a regmask operand, it is probably a call. Separate away.
+ if (MO.isRegMask())
+ return Loc;
if (!MO.isReg() || MO.isUse())
continue;
unsigned Reg =3D MO.getReg();
@@ -1505,16 +1546,16 @@
continue;
if (MO.isUse()) {
Uses.insert(Reg);
- for (const unsigned *AS =3D TRI->getAliasSet(Reg); *AS; ++AS)
+ for (const uint16_t *AS =3D TRI->getAliasSet(Reg); *AS; ++AS)
Uses.insert(*AS);
} else {
if (Uses.count(Reg)) {
Uses.erase(Reg);
- for (const unsigned *SR =3D TRI->getSubRegisters(Reg); *SR; ++SR)
+ for (const uint16_t *SR =3D TRI->getSubRegisters(Reg); *SR; ++SR)
Uses.erase(*SR); // Use getSubRegisters to be conservative
}
Defs.insert(Reg);
- for (const unsigned *AS =3D TRI->getAliasSet(Reg); *AS; ++AS)
+ for (const uint16_t *AS =3D TRI->getAliasSet(Reg); *AS; ++AS)
Defs.insert(*AS);
}
}
@@ -1581,6 +1622,11 @@
bool IsSafe =3D true;
for (unsigned i =3D 0, e =3D TIB->getNumOperands(); i !=3D e; ++i) {
MachineOperand &MO =3D TIB->getOperand(i);
+ // Don't attempt to hoist instructions with register masks.
+ if (MO.isRegMask()) {
+ IsSafe =3D false;
+ break;
+ }
if (!MO.isReg())
continue;
unsigned Reg =3D MO.getReg();
@@ -1615,6 +1661,11 @@
IsSafe =3D false;
break;
}
+
+ if (MO.isKill() && Uses.count(Reg))
+ // Kills a register that's read by the instruction at the point =
of
+ // insertion. Remove the kill marker.
+ MO.setIsKill(false);
}
}
if (!IsSafe)
@@ -1632,7 +1683,7 @@
unsigned Reg =3D MO.getReg();
if (!Reg || !LocalDefsSet.count(Reg))
continue;
- for (const unsigned *OR =3D TRI->getOverlaps(Reg); *OR; ++OR)
+ for (const uint16_t *OR =3D TRI->getOverlaps(Reg); *OR; ++OR)
LocalDefsSet.erase(*OR);
}
=20
@@ -1645,11 +1696,11 @@
if (!Reg)
continue;
LocalDefs.push_back(Reg);
- for (const unsigned *OR =3D TRI->getOverlaps(Reg); *OR; ++OR)
+ for (const uint16_t *OR =3D TRI->getOverlaps(Reg); *OR; ++OR)
LocalDefsSet.insert(*OR);
}
=20
- HasDups =3D true;;
+ HasDups =3D true;
++TIB;
++FIB;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/CallingC=
onvLower.cpp
--- a/head/contrib/llvm/lib/CodeGen/CallingConvLower.cpp Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/CallingConvLower.cpp Tue Apr 17 11:51:5=
1 2012 +0300
@@ -58,7 +58,7 @@
=20
/// MarkAllocated - Mark a register and all of its aliases as allocated.
void CCState::MarkAllocated(unsigned Reg) {
- for (const unsigned *Alias =3D TRI.getOverlaps(Reg);
+ for (const uint16_t *Alias =3D TRI.getOverlaps(Reg);
unsigned Reg =3D *Alias; ++Alias)
UsedRegs[Reg/32] |=3D 1 << (Reg&31);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/CodeGen.=
cpp
--- a/head/contrib/llvm/lib/CodeGen/CodeGen.cpp Tue Apr 17 11:36:47 2012 +0=
300
+++ b/head/contrib/llvm/lib/CodeGen/CodeGen.cpp Tue Apr 17 11:51:51 2012 +0=
300
@@ -19,36 +19,49 @@
=20
/// initializeCodeGen - Initialize all passes linked into the CodeGen libr=
ary.
void llvm::initializeCodeGen(PassRegistry &Registry) {
+ initializeBranchFolderPassPass(Registry);
initializeCalculateSpillWeightsPass(Registry);
+ initializeCodePlacementOptPass(Registry);
initializeDeadMachineInstructionElimPass(Registry);
+ initializeExpandPostRAPass(Registry);
+ initializeExpandISelPseudosPass(Registry);
+ initializeFinalizeMachineBundlesPass(Registry);
+ initializeGCMachineCodeAnalysisPass(Registry);
initializeGCModuleInfoPass(Registry);
initializeIfConverterPass(Registry);
initializeLiveDebugVariablesPass(Registry);
initializeLiveIntervalsPass(Registry);
initializeLiveStacksPass(Registry);
initializeLiveVariablesPass(Registry);
+ initializeLocalStackSlotPassPass(Registry);
initializeMachineBlockFrequencyInfoPass(Registry);
+ initializeMachineBlockPlacementPass(Registry);
+ initializeMachineBlockPlacementStatsPass(Registry);
+ initializeMachineCopyPropagationPass(Registry);
initializeMachineCSEPass(Registry);
initializeMachineDominatorTreePass(Registry);
initializeMachineLICMPass(Registry);
initializeMachineLoopInfoPass(Registry);
initializeMachineModuleInfoPass(Registry);
+ initializeMachineSchedulerPass(Registry);
initializeMachineSinkingPass(Registry);
initializeMachineVerifierPassPass(Registry);
initializeOptimizePHIsPass(Registry);
initializePHIEliminationPass(Registry);
initializePeepholeOptimizerPass(Registry);
+ initializePostRASchedulerPass(Registry);
initializeProcessImplicitDefsPass(Registry);
initializePEIPass(Registry);
- initializeRALinScanPass(Registry);
initializeRegisterCoalescerPass(Registry);
initializeRenderMachineFunctionPass(Registry);
initializeSlotIndexesPass(Registry);
- initializeLoopSplitterPass(Registry);
initializeStackProtectorPass(Registry);
initializeStackSlotColoringPass(Registry);
initializeStrongPHIEliminationPass(Registry);
+ initializeTailDuplicatePassPass(Registry);
+ initializeTargetPassConfigPass(Registry);
initializeTwoAddressInstructionPassPass(Registry);
+ initializeUnpackMachineBundlesPass(Registry);
initializeUnreachableBlockElimPass(Registry);
initializeUnreachableMachineBlockElimPass(Registry);
initializeVirtRegMapPass(Registry);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/CodePlac=
ementOpt.cpp
--- a/head/contrib/llvm/lib/CodeGen/CodePlacementOpt.cpp Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/CodePlacementOpt.cpp Tue Apr 17 11:51:5=
1 2012 +0300
@@ -39,9 +39,6 @@
CodePlacementOpt() : MachineFunctionPass(ID) {}
=20
virtual bool runOnMachineFunction(MachineFunction &MF);
- virtual const char *getPassName() const {
- return "Code Placement Optimizer";
- }
=20
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<MachineLoopInfo>();
@@ -69,9 +66,9 @@
char CodePlacementOpt::ID =3D 0;
} // end anonymous namespace
=20
-FunctionPass *llvm::createCodePlacementOptPass() {
- return new CodePlacementOpt();
-}
+char &llvm::CodePlacementOptID =3D CodePlacementOpt::ID;
+INITIALIZE_PASS(CodePlacementOpt, "code-placement",
+ "Code Placement Optimizer", false, false)
=20
/// HasFallthrough - Test whether the given branch has a fallthrough, eith=
er as
/// a plain fallthrough or as a fallthrough case of a conditional branch.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Critical=
AntiDepBreaker.cpp
--- a/head/contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp Tue Apr 17 1=
1:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp Tue Apr 17 1=
1:51:51 2012 +0300
@@ -35,7 +35,8 @@
RegClassInfo(RCI),
Classes(TRI->getNumRegs(), static_cast<const TargetRegisterClass *>(0)),
KillIndices(TRI->getNumRegs(), 0),
- DefIndices(TRI->getNumRegs(), 0) {}
+ DefIndices(TRI->getNumRegs(), 0),
+ KeepRegs(TRI->getNumRegs(), false) {}
=20
CriticalAntiDepBreaker::~CriticalAntiDepBreaker() {
}
@@ -52,9 +53,9 @@
}
=20
// Clear "do not change" set.
- KeepRegs.clear();
+ KeepRegs.reset();
=20
- bool IsReturnBlock =3D (!BB->empty() && BB->back().getDesc().isReturn());
+ bool IsReturnBlock =3D (BBSize !=3D 0 && BB->back().isReturn());
=20
// Determine the live-out physregs for this block.
if (IsReturnBlock) {
@@ -63,14 +64,14 @@
E =3D MRI.liveout_end(); I !=3D E; ++I) {
unsigned Reg =3D *I;
Classes[Reg] =3D reinterpret_cast<TargetRegisterClass *>(-1);
- KillIndices[Reg] =3D BB->size();
+ KillIndices[Reg] =3D BBSize;
DefIndices[Reg] =3D ~0u;
=20
// Repeat, for all aliases.
- for (const unsigned *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alia=
s) {
+ for (const uint16_t *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alia=
s) {
unsigned AliasReg =3D *Alias;
Classes[AliasReg] =3D reinterpret_cast<TargetRegisterClass *>(-1);
- KillIndices[AliasReg] =3D BB->size();
+ KillIndices[AliasReg] =3D BBSize;
DefIndices[AliasReg] =3D ~0u;
}
}
@@ -85,14 +86,14 @@
E =3D (*SI)->livein_end(); I !=3D E; ++I) {
unsigned Reg =3D *I;
Classes[Reg] =3D reinterpret_cast<TargetRegisterClass *>(-1);
- KillIndices[Reg] =3D BB->size();
+ KillIndices[Reg] =3D BBSize;
DefIndices[Reg] =3D ~0u;
=20
// Repeat, for all aliases.
- for (const unsigned *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alia=
s) {
+ for (const uint16_t *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alia=
s) {
unsigned AliasReg =3D *Alias;
Classes[AliasReg] =3D reinterpret_cast<TargetRegisterClass *>(-1);
- KillIndices[AliasReg] =3D BB->size();
+ KillIndices[AliasReg] =3D BBSize;
DefIndices[AliasReg] =3D ~0u;
}
}
@@ -102,18 +103,18 @@
// callee-saved register that is not saved in the prolog.
const MachineFrameInfo *MFI =3D MF.getFrameInfo();
BitVector Pristine =3D MFI->getPristineRegs(BB);
- for (const unsigned *I =3D TRI->getCalleeSavedRegs(); *I; ++I) {
+ for (const uint16_t *I =3D TRI->getCalleeSavedRegs(&MF); *I; ++I) {
unsigned Reg =3D *I;
if (!IsReturnBlock && !Pristine.test(Reg)) continue;
Classes[Reg] =3D reinterpret_cast<TargetRegisterClass *>(-1);
- KillIndices[Reg] =3D BB->size();
+ KillIndices[Reg] =3D BBSize;
DefIndices[Reg] =3D ~0u;
=20
// Repeat, for all aliases.
- for (const unsigned *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alias)=
{
+ for (const uint16_t *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alias)=
{
unsigned AliasReg =3D *Alias;
Classes[AliasReg] =3D reinterpret_cast<TargetRegisterClass *>(-1);
- KillIndices[AliasReg] =3D BB->size();
+ KillIndices[AliasReg] =3D BBSize;
DefIndices[AliasReg] =3D ~0u;
}
}
@@ -121,7 +122,7 @@
=20
void CriticalAntiDepBreaker::FinishBlock() {
RegRefs.clear();
- KeepRegs.clear();
+ KeepRegs.reset();
}
=20
void CriticalAntiDepBreaker::Observe(MachineInstr *MI, unsigned Count,
@@ -193,8 +194,8 @@
// instruction which may not be executed. The second R6 def may or may n=
ot
// re-define R6 so it's not safe to change it since the last R6 use cann=
ot be
// changed.
- bool Special =3D MI->getDesc().isCall() ||
- MI->getDesc().hasExtraSrcRegAllocReq() ||
+ bool Special =3D MI->isCall() ||
+ MI->hasExtraSrcRegAllocReq() ||
TII->isPredicated(MI);
=20
// Scan the register operands for this instruction and update
@@ -217,7 +218,7 @@
Classes[Reg] =3D reinterpret_cast<TargetRegisterClass *>(-1);
=20
// Now check for aliases.
- for (const unsigned *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alias)=
{
+ for (const uint16_t *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alias)=
{
// If an alias of the reg is used during the live range, give up.
// Note that this allows us to skip checking if AntiDepReg
// overlaps with any of the aliases, among other things.
@@ -233,10 +234,11 @@
RegRefs.insert(std::make_pair(Reg, &MO));
=20
if (MO.isUse() && Special) {
- if (KeepRegs.insert(Reg)) {
- for (const unsigned *Subreg =3D TRI->getSubRegisters(Reg);
+ if (!KeepRegs.test(Reg)) {
+ KeepRegs.set(Reg);
+ for (const uint16_t *Subreg =3D TRI->getSubRegisters(Reg);
*Subreg; ++Subreg)
- KeepRegs.insert(*Subreg);
+ KeepRegs.set(*Subreg);
}
}
}
@@ -253,6 +255,17 @@
// address updates.
for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
MachineOperand &MO =3D MI->getOperand(i);
+
+ if (MO.isRegMask())
+ for (unsigned i =3D 0, e =3D TRI->getNumRegs(); i !=3D e; ++i)
+ if (MO.clobbersPhysReg(i)) {
+ DefIndices[i] =3D Count;
+ KillIndices[i] =3D ~0u;
+ KeepRegs.reset(i);
+ Classes[i] =3D 0;
+ RegRefs.erase(i);
+ }
+
if (!MO.isReg()) continue;
unsigned Reg =3D MO.getReg();
if (Reg =3D=3D 0) continue;
@@ -265,21 +278,21 @@
assert(((KillIndices[Reg] =3D=3D ~0u) !=3D
(DefIndices[Reg] =3D=3D ~0u)) &&
"Kill and Def maps aren't consistent for Reg!");
- KeepRegs.erase(Reg);
+ KeepRegs.reset(Reg);
Classes[Reg] =3D 0;
RegRefs.erase(Reg);
// Repeat, for all subregs.
- for (const unsigned *Subreg =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *Subreg =3D TRI->getSubRegisters(Reg);
*Subreg; ++Subreg) {
unsigned SubregReg =3D *Subreg;
DefIndices[SubregReg] =3D Count;
KillIndices[SubregReg] =3D ~0u;
- KeepRegs.erase(SubregReg);
+ KeepRegs.reset(SubregReg);
Classes[SubregReg] =3D 0;
RegRefs.erase(SubregReg);
}
// Conservatively mark super-registers as unusable.
- for (const unsigned *Super =3D TRI->getSuperRegisters(Reg);
+ for (const uint16_t *Super =3D TRI->getSuperRegisters(Reg);
*Super; ++Super) {
unsigned SuperReg =3D *Super;
Classes[SuperReg] =3D reinterpret_cast<TargetRegisterClass *>(-1);
@@ -315,7 +328,7 @@
"Kill and Def maps aren't consistent for Reg!");
}
// Repeat, for all aliases.
- for (const unsigned *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alias)=
{
+ for (const uint16_t *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alias)=
{
unsigned AliasReg =3D *Alias;
if (KillIndices[AliasReg] =3D=3D ~0u) {
KillIndices[AliasReg] =3D Count;
@@ -355,6 +368,9 @@
for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
const MachineOperand &CheckOper =3D MI->getOperand(i);
=20
+ if (CheckOper.isRegMask() && CheckOper.clobbersPhysReg(NewReg))
+ return true;
+
if (!CheckOper.isReg() || !CheckOper.isDef() ||
CheckOper.getReg() !=3D NewReg)
continue;
@@ -427,6 +443,8 @@
=20
// Keep a map of the MachineInstr*'s back to the SUnit representing them.
// This is used for updating debug information.
+ //
+ // FIXME: Replace this with the existing map in ScheduleDAGInstrs::MISUn=
itMap
DenseMap<MachineInstr*,const SUnit*> MISUnitMap;
=20
// Find the node at the bottom of the critical path.
@@ -535,7 +553,7 @@
if (!RegClassInfo.isAllocatable(AntiDepReg))
// Don't break anti-dependencies on non-allocatable registers.
AntiDepReg =3D 0;
- else if (KeepRegs.count(AntiDepReg))
+ else if (KeepRegs.test(AntiDepReg))
// Don't break anti-dependencies if an use down below requires
// this exact register.
AntiDepReg =3D 0;
@@ -572,7 +590,7 @@
// If MI's defs have a special allocation requirement, don't allow
// any def registers to be changed. Also assume all registers
// defined in a call must not be changed (ABI).
- if (MI->getDesc().isCall() || MI->getDesc().hasExtraDefRegAllocReq() ||
+ if (MI->isCall() || MI->hasExtraDefRegAllocReq() ||
TII->isPredicated(MI))
// If this instruction's defs have special allocation requirement, d=
on't
// break this anti-dependency.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Critical=
AntiDepBreaker.h
--- a/head/contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.h Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.h Tue Apr 17 11:=
51:51 2012 +0300
@@ -24,7 +24,6 @@
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/ADT/BitVector.h"
-#include "llvm/ADT/SmallSet.h"
#include <map>
=20
namespace llvm {
@@ -66,7 +65,7 @@
=20
/// KeepRegs - A set of registers which are live and cannot be changed=
to
/// break anti-dependencies.
- SmallSet<unsigned, 4> KeepRegs;
+ BitVector KeepRegs;
=20
public:
CriticalAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo&);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/DeadMach=
ineInstructionElim.cpp
--- a/head/contrib/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp Tue Apr =
17 11:51:51 2012 +0300
@@ -28,11 +28,12 @@
namespace {
class DeadMachineInstructionElim : public MachineFunctionPass {
virtual bool runOnMachineFunction(MachineFunction &MF);
- =20
+
const TargetRegisterInfo *TRI;
const MachineRegisterInfo *MRI;
const TargetInstrInfo *TII;
BitVector LivePhysRegs;
+ BitVector ReservedRegs;
=20
public:
static char ID; // Pass identification, replacement for typeid
@@ -45,14 +46,11 @@
};
}
char DeadMachineInstructionElim::ID =3D 0;
+char &llvm::DeadMachineInstructionElimID =3D DeadMachineInstructionElim::I=
D;
=20
INITIALIZE_PASS(DeadMachineInstructionElim, "dead-mi-elimination",
"Remove dead machine instructions", false, false)
=20
-FunctionPass *llvm::createDeadMachineInstructionElimPass() {
- return new DeadMachineInstructionElim();
-}
-
bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
// Technically speaking inline asm without side effects and no defs can =
still
// be deleted. But there is so much bad inline asm code out there, we sh=
ould
@@ -70,10 +68,14 @@
const MachineOperand &MO =3D MI->getOperand(i);
if (MO.isReg() && MO.isDef()) {
unsigned Reg =3D MO.getReg();
- if (TargetRegisterInfo::isPhysicalRegister(Reg) ?
- LivePhysRegs[Reg] : !MRI->use_nodbg_empty(Reg)) {
- // This def has a non-debug use. Don't delete the instruction!
- return false;
+ if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
+ // Don't delete live physreg defs, or any reserved register defs.
+ if (LivePhysRegs.test(Reg) || ReservedRegs.test(Reg))
+ return false;
+ } else {
+ if (!MRI->use_nodbg_empty(Reg))
+ // This def has a non-debug use. Don't delete the instruction!
+ return false;
}
}
}
@@ -89,7 +91,7 @@
TII =3D MF.getTarget().getInstrInfo();
=20
// Treat reserved registers as always live.
- BitVector ReservedRegs =3D TRI->getReservedRegs(MF);
+ ReservedRegs =3D TRI->getReservedRegs(MF);
=20
// Loop over all instructions in all blocks, from bottom to top, so that=
it's
// more likely that chains of dependent but ultimately dead instructions=
will
@@ -102,7 +104,7 @@
LivePhysRegs =3D ReservedRegs;
=20
// Also add any explicit live-out physregs for this block.
- if (!MBB->empty() && MBB->back().getDesc().isReturn())
+ if (!MBB->empty() && MBB->back().isReturn())
for (MachineRegisterInfo::liveout_iterator LOI =3D MRI->liveout_begi=
n(),
LOE =3D MRI->liveout_end(); LOI !=3D LOE; ++LOI) {
unsigned Reg =3D *LOI;
@@ -169,10 +171,13 @@
// Check the subreg set, not the alias set, because a def
// of a super-register may still be partially live after
// this def.
- for (const unsigned *SubRegs =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *SubRegs =3D TRI->getSubRegisters(Reg);
*SubRegs; ++SubRegs)
LivePhysRegs.reset(*SubRegs);
}
+ } else if (MO.isRegMask()) {
+ // Register mask of preserved registers. All clobbers are dead.
+ LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
}
}
// Record the physreg uses, after the defs, in case a physreg is
@@ -183,7 +188,7 @@
unsigned Reg =3D MO.getReg();
if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
LivePhysRegs.set(Reg);
- for (const unsigned *AliasSet =3D TRI->getAliasSet(Reg);
+ for (const uint16_t *AliasSet =3D TRI->getAliasSet(Reg);
*AliasSet; ++AliasSet)
LivePhysRegs.set(*AliasSet);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/DwarfEHP=
repare.cpp
--- a/head/contrib/llvm/lib/CodeGen/DwarfEHPrepare.cpp Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/DwarfEHPrepare.cpp Tue Apr 17 11:51:51 =
2012 +0300
@@ -28,98 +28,34 @@
#include "llvm/Transforms/Utils/SSAUpdater.h"
using namespace llvm;
=20
-STATISTIC(NumLandingPadsSplit, "Number of landing pads split");
-STATISTIC(NumUnwindsLowered, "Number of unwind instructions lowered"=
);
-STATISTIC(NumResumesLowered, "Number of eh.resume calls lowered");
-STATISTIC(NumExceptionValuesMoved, "Number of eh.exception calls moved");
+STATISTIC(NumResumesLowered, "Number of resume calls lowered");
=20
namespace {
class DwarfEHPrepare : public FunctionPass {
const TargetMachine *TM;
const TargetLowering *TLI;
=20
- // The eh.exception intrinsic.
- Function *ExceptionValueIntrinsic;
-
- // The eh.selector intrinsic.
- Function *SelectorIntrinsic;
-
- // _Unwind_Resume_or_Rethrow or _Unwind_SjLj_Resume call.
- Constant *URoR;
-
- // The EH language-specific catch-all type.
- GlobalVariable *EHCatchAllValue;
-
- // _Unwind_Resume or the target equivalent.
+ // RewindFunction - _Unwind_Resume or the target equivalent.
Constant *RewindFunction;
=20
- // We both use and preserve dominator info.
- DominatorTree *DT;
+ bool InsertUnwindResumeCalls(Function &Fn);
+ Instruction *GetExceptionObject(ResumeInst *RI);
=20
- // The function we are running on.
- Function *F;
-
- // The landing pads for this function.
- typedef SmallPtrSet<BasicBlock*, 8> BBSet;
- BBSet LandingPads;
-
- bool InsertUnwindResumeCalls();
-
- bool NormalizeLandingPads();
- bool LowerUnwindsAndResumes();
- bool MoveExceptionValueCalls();
-
- Instruction *CreateExceptionValueCall(BasicBlock *BB);
-
- /// CleanupSelectors - Any remaining eh.selector intrinsic calls which=
still
- /// use the "llvm.eh.catch.all.value" call need to convert to using its
- /// initializer instead.
- bool CleanupSelectors(SmallPtrSet<IntrinsicInst*, 32> &Sels);
-
- bool HasCatchAllInSelector(IntrinsicInst *);
-
- /// FindAllCleanupSelectors - Find all eh.selector calls that are clea=
n-ups.
- void FindAllCleanupSelectors(SmallPtrSet<IntrinsicInst*, 32> &Sels,
- SmallPtrSet<IntrinsicInst*, 32> &CatchAll=
Sels);
-
- /// FindAllURoRInvokes - Find all URoR invokes in the function.
- void FindAllURoRInvokes(SmallPtrSet<InvokeInst*, 32> &URoRInvokes);
-
- /// HandleURoRInvokes - Handle invokes of "_Unwind_Resume_or_Rethrow" =
or
- /// "_Unwind_SjLj_Resume" calls. The "unwind" part of these invokes ju=
mp to
- /// a landing pad within the current function. This is a candidate to =
merge
- /// the selector associated with the URoR invoke with the one from the
- /// URoR's landing pad.
- bool HandleURoRInvokes();
-
- /// FindSelectorAndURoR - Find the eh.selector call and URoR call asso=
ciated
- /// with the eh.exception call. This recursively looks past instructio=
ns
- /// which don't change the EH pointer value, like casts or PHI nodes.
- bool FindSelectorAndURoR(Instruction *Inst, bool &URoRInvoke,
- SmallPtrSet<IntrinsicInst*, 8> &SelCalls,
- SmallPtrSet<PHINode*, 32> &SeenPHIs);
- =20
public:
static char ID; // Pass identification, replacement for typeid.
DwarfEHPrepare(const TargetMachine *tm) :
FunctionPass(ID), TM(tm), TLI(TM->getTargetLowering()),
- ExceptionValueIntrinsic(0), SelectorIntrinsic(0),
- URoR(0), EHCatchAllValue(0), RewindFunction(0) {
+ RewindFunction(0) {
initializeDominatorTreePass(*PassRegistry::getPassRegistry());
}
=20
virtual bool runOnFunction(Function &Fn);
=20
- // getAnalysisUsage - We need the dominator tree for handling URoR.
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
- AU.addRequired<DominatorTree>();
- AU.addPreserved<DominatorTree>();
- }
+ virtual void getAnalysisUsage(AnalysisUsage &AU) const { }
=20
const char *getPassName() const {
return "Exception handling preparation";
}
-
};
} // end anonymous namespace
=20
@@ -129,543 +65,52 @@
return new DwarfEHPrepare(tm);
}
=20
-/// HasCatchAllInSelector - Return true if the intrinsic instruction has a
-/// catch-all.
-bool DwarfEHPrepare::HasCatchAllInSelector(IntrinsicInst *II) {
- if (!EHCatchAllValue) return false;
+/// GetExceptionObject - Return the exception object from the value passed=
into
+/// the 'resume' instruction (typically an aggregate). Clean up any dead
+/// instructions, including the 'resume' instruction.
+Instruction *DwarfEHPrepare::GetExceptionObject(ResumeInst *RI) {
+ Value *V =3D RI->getOperand(0);
+ Instruction *ExnObj =3D 0;
+ InsertValueInst *SelIVI =3D dyn_cast<InsertValueInst>(V);
+ LoadInst *SelLoad =3D 0;
+ InsertValueInst *ExcIVI =3D 0;
+ bool EraseIVIs =3D false;
=20
- unsigned ArgIdx =3D II->getNumArgOperands() - 1;
- GlobalVariable *GV =3D dyn_cast<GlobalVariable>(II->getArgOperand(ArgIdx=
));
- return GV =3D=3D EHCatchAllValue;
-}
-
-/// FindAllCleanupSelectors - Find all eh.selector calls that are clean-up=
s.
-void DwarfEHPrepare::
-FindAllCleanupSelectors(SmallPtrSet<IntrinsicInst*, 32> &Sels,
- SmallPtrSet<IntrinsicInst*, 32> &CatchAllSels) {
- for (Value::use_iterator
- I =3D SelectorIntrinsic->use_begin(),
- E =3D SelectorIntrinsic->use_end(); I !=3D E; ++I) {
- IntrinsicInst *II =3D cast<IntrinsicInst>(*I);
-
- if (II->getParent()->getParent() !=3D F)
- continue;
-
- if (!HasCatchAllInSelector(II))
- Sels.insert(II);
- else
- CatchAllSels.insert(II);
- }
-}
-
-/// FindAllURoRInvokes - Find all URoR invokes in the function.
-void DwarfEHPrepare::
-FindAllURoRInvokes(SmallPtrSet<InvokeInst*, 32> &URoRInvokes) {
- for (Value::use_iterator
- I =3D URoR->use_begin(),
- E =3D URoR->use_end(); I !=3D E; ++I) {
- if (InvokeInst *II =3D dyn_cast<InvokeInst>(*I))
- URoRInvokes.insert(II);
- }
-}
-
-/// CleanupSelectors - Any remaining eh.selector intrinsic calls which sti=
ll use
-/// the "llvm.eh.catch.all.value" call need to convert to using its
-/// initializer instead.
-bool DwarfEHPrepare::CleanupSelectors(SmallPtrSet<IntrinsicInst*, 32> &Sel=
s) {
- if (!EHCatchAllValue) return false;
-
- if (!SelectorIntrinsic) {
- SelectorIntrinsic =3D
- Intrinsic::getDeclaration(F->getParent(), Intrinsic::eh_selector);
- if (!SelectorIntrinsic) return false;
- }
-
- bool Changed =3D false;
- for (SmallPtrSet<IntrinsicInst*, 32>::iterator
- I =3D Sels.begin(), E =3D Sels.end(); I !=3D E; ++I) {
- IntrinsicInst *Sel =3D *I;
-
- // Index of the "llvm.eh.catch.all.value" variable.
- unsigned OpIdx =3D Sel->getNumArgOperands() - 1;
- GlobalVariable *GV =3D dyn_cast<GlobalVariable>(Sel->getArgOperand(OpI=
dx));
- if (GV !=3D EHCatchAllValue) continue;
- Sel->setArgOperand(OpIdx, EHCatchAllValue->getInitializer());
- Changed =3D true;
- }
-
- return Changed;
-}
-
-/// FindSelectorAndURoR - Find the eh.selector call associated with the
-/// eh.exception call. And indicate if there is a URoR "invoke" associated=
with
-/// the eh.exception call. This recursively looks past instructions which =
don't
-/// change the EH pointer value, like casts or PHI nodes.
-bool
-DwarfEHPrepare::FindSelectorAndURoR(Instruction *Inst, bool &URoRInvoke,
- SmallPtrSet<IntrinsicInst*, 8> &SelCal=
ls,
- SmallPtrSet<PHINode*, 32> &SeenPHIs) {
- bool Changed =3D false;
-
- for (Value::use_iterator
- I =3D Inst->use_begin(), E =3D Inst->use_end(); I !=3D E; ++I) {
- Instruction *II =3D dyn_cast<Instruction>(*I);
- if (!II || II->getParent()->getParent() !=3D F) continue;
- =20
- if (IntrinsicInst *Sel =3D dyn_cast<IntrinsicInst>(II)) {
- if (Sel->getIntrinsicID() =3D=3D Intrinsic::eh_selector)
- SelCalls.insert(Sel);
- } else if (InvokeInst *Invoke =3D dyn_cast<InvokeInst>(II)) {
- if (Invoke->getCalledFunction() =3D=3D URoR)
- URoRInvoke =3D true;
- } else if (CastInst *CI =3D dyn_cast<CastInst>(II)) {
- Changed |=3D FindSelectorAndURoR(CI, URoRInvoke, SelCalls, SeenPHIs);
- } else if (PHINode *PN =3D dyn_cast<PHINode>(II)) {
- if (SeenPHIs.insert(PN))
- // Don't process a PHI node more than once.
- Changed |=3D FindSelectorAndURoR(PN, URoRInvoke, SelCalls, SeenPHI=
s);
- }
- }
-
- return Changed;
-}
-
-/// HandleURoRInvokes - Handle invokes of "_Unwind_Resume_or_Rethrow" or
-/// "_Unwind_SjLj_Resume" calls. The "unwind" part of these invokes jump t=
o a
-/// landing pad within the current function. This is a candidate to merge =
the
-/// selector associated with the URoR invoke with the one from the URoR's
-/// landing pad.
-bool DwarfEHPrepare::HandleURoRInvokes() {
- if (!EHCatchAllValue) {
- EHCatchAllValue =3D
- F->getParent()->getNamedGlobal("llvm.eh.catch.all.value");
- if (!EHCatchAllValue) return false;
- }
-
- if (!SelectorIntrinsic) {
- SelectorIntrinsic =3D
- Intrinsic::getDeclaration(F->getParent(), Intrinsic::eh_selector);
- if (!SelectorIntrinsic) return false;
- }
-
- SmallPtrSet<IntrinsicInst*, 32> Sels;
- SmallPtrSet<IntrinsicInst*, 32> CatchAllSels;
- FindAllCleanupSelectors(Sels, CatchAllSels);
-
- if (!URoR) {
- URoR =3D F->getParent()->getFunction("_Unwind_Resume_or_Rethrow");
- if (!URoR) return CleanupSelectors(CatchAllSels);
- }
-
- SmallPtrSet<InvokeInst*, 32> URoRInvokes;
- FindAllURoRInvokes(URoRInvokes);
-
- SmallPtrSet<IntrinsicInst*, 32> SelsToConvert;
-
- for (SmallPtrSet<IntrinsicInst*, 32>::iterator
- SI =3D Sels.begin(), SE =3D Sels.end(); SI !=3D SE; ++SI) {
- const BasicBlock *SelBB =3D (*SI)->getParent();
- for (SmallPtrSet<InvokeInst*, 32>::iterator
- UI =3D URoRInvokes.begin(), UE =3D URoRInvokes.end(); UI !=3D U=
E; ++UI) {
- const BasicBlock *URoRBB =3D (*UI)->getParent();
- if (DT->dominates(SelBB, URoRBB)) {
- SelsToConvert.insert(*SI);
- break;
+ if (SelIVI) {
+ if (SelIVI->getNumIndices() =3D=3D 1 && *SelIVI->idx_begin() =3D=3D 1)=
{
+ ExcIVI =3D dyn_cast<InsertValueInst>(SelIVI->getOperand(0));
+ if (ExcIVI && isa<UndefValue>(ExcIVI->getOperand(0)) &&
+ ExcIVI->getNumIndices() =3D=3D 1 && *ExcIVI->idx_begin() =3D=3D =
0) {
+ ExnObj =3D cast<Instruction>(ExcIVI->getOperand(1));
+ SelLoad =3D dyn_cast<LoadInst>(SelIVI->getOperand(1));
+ EraseIVIs =3D true;
}
}
}
=20
- bool Changed =3D false;
+ if (!ExnObj)
+ ExnObj =3D ExtractValueInst::Create(RI->getOperand(0), 0, "exn.obj", R=
I);
=20
- if (Sels.size() !=3D SelsToConvert.size()) {
- // If we haven't been able to convert all of the clean-up selectors, t=
hen
- // loop through the slow way to see if they still need to be converted.
- if (!ExceptionValueIntrinsic) {
- ExceptionValueIntrinsic =3D
- Intrinsic::getDeclaration(F->getParent(), Intrinsic::eh_exception);
- if (!ExceptionValueIntrinsic)
- return CleanupSelectors(CatchAllSels);
- }
+ RI->eraseFromParent();
=20
- for (Value::use_iterator
- I =3D ExceptionValueIntrinsic->use_begin(),
- E =3D ExceptionValueIntrinsic->use_end(); I !=3D E; ++I) {
- IntrinsicInst *EHPtr =3D dyn_cast<IntrinsicInst>(*I);
- if (!EHPtr || EHPtr->getParent()->getParent() !=3D F) continue;
-
- bool URoRInvoke =3D false;
- SmallPtrSet<IntrinsicInst*, 8> SelCalls;
- SmallPtrSet<PHINode*, 32> SeenPHIs;
- Changed |=3D FindSelectorAndURoR(EHPtr, URoRInvoke, SelCalls, SeenPH=
Is);
-
- if (URoRInvoke) {
- // This EH pointer is being used by an invoke of an URoR instructi=
on and
- // an eh.selector intrinsic call. If the eh.selector is a 'clean-u=
p', we
- // need to convert it to a 'catch-all'.
- for (SmallPtrSet<IntrinsicInst*, 8>::iterator
- SI =3D SelCalls.begin(), SE =3D SelCalls.end(); SI !=3D SE;=
++SI)
- if (!HasCatchAllInSelector(*SI))
- SelsToConvert.insert(*SI);
- }
- }
+ if (EraseIVIs) {
+ if (SelIVI->getNumUses() =3D=3D 0)
+ SelIVI->eraseFromParent();
+ if (ExcIVI->getNumUses() =3D=3D 0)
+ ExcIVI->eraseFromParent();
+ if (SelLoad && SelLoad->getNumUses() =3D=3D 0)
+ SelLoad->eraseFromParent();
}
=20
- if (!SelsToConvert.empty()) {
- // Convert all clean-up eh.selectors, which are associated with "invok=
es" of
- // URoR calls, into catch-all eh.selectors.
- Changed =3D true;
-
- for (SmallPtrSet<IntrinsicInst*, 8>::iterator
- SI =3D SelsToConvert.begin(), SE =3D SelsToConvert.end();
- SI !=3D SE; ++SI) {
- IntrinsicInst *II =3D *SI;
-
- // Use the exception object pointer and the personality function
- // from the original selector.
- CallSite CS(II);
- IntrinsicInst::op_iterator I =3D CS.arg_begin();
- IntrinsicInst::op_iterator E =3D CS.arg_end();
- IntrinsicInst::op_iterator B =3D prior(E);
-
- // Exclude last argument if it is an integer.
- if (isa<ConstantInt>(B)) E =3D B;
-
- // Add exception object pointer (front).
- // Add personality function (next).
- // Add in any filter IDs (rest).
- SmallVector<Value*, 8> Args(I, E);
-
- Args.push_back(EHCatchAllValue->getInitializer()); // Catch-all indi=
cator.
-
- CallInst *NewSelector =3D
- CallInst::Create(SelectorIntrinsic, Args, "eh.sel.catch.all", II);
-
- NewSelector->setTailCall(II->isTailCall());
- NewSelector->setAttributes(II->getAttributes());
- NewSelector->setCallingConv(II->getCallingConv());
-
- II->replaceAllUsesWith(NewSelector);
- II->eraseFromParent();
- }
- }
-
- Changed |=3D CleanupSelectors(CatchAllSels);
- return Changed;
-}
-
-/// NormalizeLandingPads - Normalize and discover landing pads, noting them
-/// in the LandingPads set. A landing pad is normal if the only CFG edges
-/// that end at it are unwind edges from invoke instructions. If we inlined
-/// through an invoke we could have a normal branch from the previous
-/// unwind block through to the landing pad for the original invoke.
-/// Abnormal landing pads are fixed up by redirecting all unwind edges to
-/// a new basic block which falls through to the original.
-bool DwarfEHPrepare::NormalizeLandingPads() {
- bool Changed =3D false;
-
- const MCAsmInfo *MAI =3D TM->getMCAsmInfo();
- bool usingSjLjEH =3D MAI->getExceptionHandlingType() =3D=3D ExceptionHan=
dling::SjLj;
-
- for (Function::iterator I =3D F->begin(), E =3D F->end(); I !=3D E; ++I)=
{
- TerminatorInst *TI =3D I->getTerminator();
- if (!isa<InvokeInst>(TI))
- continue;
- BasicBlock *LPad =3D TI->getSuccessor(1);
- // Skip landing pads that have already been normalized.
- if (LandingPads.count(LPad))
- continue;
-
- // Check that only invoke unwind edges end at the landing pad.
- bool OnlyUnwoundTo =3D true;
- bool SwitchOK =3D usingSjLjEH;
- for (pred_iterator PI =3D pred_begin(LPad), PE =3D pred_end(LPad);
- PI !=3D PE; ++PI) {
- TerminatorInst *PT =3D (*PI)->getTerminator();
- // The SjLj dispatch block uses a switch instruction. This is effect=
ively
- // an unwind edge, so we can disregard it here. There will only ever
- // be one dispatch, however, so if there are multiple switches, one
- // of them truly is a normal edge, not an unwind edge.
- if (SwitchOK && isa<SwitchInst>(PT)) {
- SwitchOK =3D false;
- continue;
- }
- if (!isa<InvokeInst>(PT) || LPad =3D=3D PT->getSuccessor(0)) {
- OnlyUnwoundTo =3D false;
- break;
- }
- }
-
- if (OnlyUnwoundTo) {
- // Only unwind edges lead to the landing pad. Remember the landing =
pad.
- LandingPads.insert(LPad);
- continue;
- }
-
- // At least one normal edge ends at the landing pad. Redirect the unw=
ind
- // edges to a new basic block which falls through into this one.
-
- // Create the new basic block.
- BasicBlock *NewBB =3D BasicBlock::Create(F->getContext(),
- LPad->getName() + "_unwind_edge=
");
-
- // Insert it into the function right before the original landing pad.
- LPad->getParent()->getBasicBlockList().insert(LPad, NewBB);
-
- // Redirect unwind edges from the original landing pad to NewBB.
- for (pred_iterator PI =3D pred_begin(LPad), PE =3D pred_end(LPad); PI =
!=3D PE; ) {
- TerminatorInst *PT =3D (*PI++)->getTerminator();
- if (isa<InvokeInst>(PT) && PT->getSuccessor(1) =3D=3D LPad)
- // Unwind to the new block.
- PT->setSuccessor(1, NewBB);
- }
-
- // If there are any PHI nodes in LPad, we need to update them so that =
they
- // merge incoming values from NewBB instead.
- for (BasicBlock::iterator II =3D LPad->begin(); isa<PHINode>(II); ++II=
) {
- PHINode *PN =3D cast<PHINode>(II);
- pred_iterator PB =3D pred_begin(NewBB), PE =3D pred_end(NewBB);
-
- // Check to see if all of the values coming in via unwind edges are =
the
- // same. If so, we don't need to create a new PHI node.
- Value *InVal =3D PN->getIncomingValueForBlock(*PB);
- for (pred_iterator PI =3D PB; PI !=3D PE; ++PI) {
- if (PI !=3D PB && InVal !=3D PN->getIncomingValueForBlock(*PI)) {
- InVal =3D 0;
- break;
- }
- }
-
- if (InVal =3D=3D 0) {
- // Different unwind edges have different values. Create a new PHI=
node
- // in NewBB.
- PHINode *NewPN =3D PHINode::Create(PN->getType(),
- PN->getNumIncomingValues(),
- PN->getName()+".unwind", NewBB);
- // Add an entry for each unwind edge, using the value from the old=
PHI.
- for (pred_iterator PI =3D PB; PI !=3D PE; ++PI)
- NewPN->addIncoming(PN->getIncomingValueForBlock(*PI), *PI);
-
- // Now use this new PHI as the common incoming value for NewBB in =
PN.
- InVal =3D NewPN;
- }
-
- // Revector exactly one entry in the PHI node to come from NewBB
- // and delete all other entries that come from unwind edges. If
- // there are both normal and unwind edges from the same predecessor,
- // this leaves an entry for the normal edge.
- for (pred_iterator PI =3D PB; PI !=3D PE; ++PI)
- PN->removeIncomingValue(*PI);
- PN->addIncoming(InVal, NewBB);
- }
-
- // Add a fallthrough from NewBB to the original landing pad.
- BranchInst::Create(LPad, NewBB);
-
- // Now update DominatorTree analysis information.
- DT->splitBlock(NewBB);
-
- // Remember the newly constructed landing pad. The original landing p=
ad
- // LPad is no longer a landing pad now that all unwind edges have been
- // revectored to NewBB.
- LandingPads.insert(NewBB);
- ++NumLandingPadsSplit;
- Changed =3D true;
- }
-
- return Changed;
-}
-
-/// LowerUnwinds - Turn unwind instructions into calls to _Unwind_Resume,
-/// rethrowing any previously caught exception. This will crash horribly
-/// at runtime if there is no such exception: using unwind to throw a new
-/// exception is currently not supported.
-bool DwarfEHPrepare::LowerUnwindsAndResumes() {
- SmallVector<Instruction*, 16> ResumeInsts;
-
- for (Function::iterator fi =3D F->begin(), fe =3D F->end(); fi !=3D fe; =
++fi) {
- for (BasicBlock::iterator bi =3D fi->begin(), be =3D fi->end(); bi !=
=3D be; ++bi){
- if (isa<UnwindInst>(bi))
- ResumeInsts.push_back(bi);
- else if (CallInst *call =3D dyn_cast<CallInst>(bi))
- if (Function *fn =3D dyn_cast<Function>(call->getCalledValue()))
- if (fn->getName() =3D=3D "llvm.eh.resume")
- ResumeInsts.push_back(bi);
- }
- }
-
- if (ResumeInsts.empty()) return false;
-
- // Find the rewind function if we didn't already.
- if (!RewindFunction) {
- LLVMContext &Ctx =3D ResumeInsts[0]->getContext();
- FunctionType *FTy =3D FunctionType::get(Type::getVoidTy(Ctx),
- Type::getInt8PtrTy(Ctx), false);
- const char *RewindName =3D TLI->getLibcallName(RTLIB::UNWIND_RESUME);
- RewindFunction =3D F->getParent()->getOrInsertFunction(RewindName, FTy=
);
- }
-
- bool Changed =3D false;
-
- for (SmallVectorImpl<Instruction*>::iterator
- I =3D ResumeInsts.begin(), E =3D ResumeInsts.end(); I !=3D E; ++I=
) {
- Instruction *RI =3D *I;
-
- // Replace the resuming instruction with a call to _Unwind_Resume (or =
the
- // appropriate target equivalent).
-
- llvm::Value *ExnValue;
- if (isa<UnwindInst>(RI))
- ExnValue =3D CreateExceptionValueCall(RI->getParent());
- else
- ExnValue =3D cast<CallInst>(RI)->getArgOperand(0);
-
- // Create the call...
- CallInst *CI =3D CallInst::Create(RewindFunction, ExnValue, "", RI);
- CI->setCallingConv(TLI->getLibcallCallingConv(RTLIB::UNWIND_RESUME));
-
- // ...followed by an UnreachableInst, if it was an unwind.
- // Calls to llvm.eh.resume are typically already followed by this.
- if (isa<UnwindInst>(RI))
- new UnreachableInst(RI->getContext(), RI);
-
- if (isa<UnwindInst>(RI))
- ++NumUnwindsLowered;
- else
- ++NumResumesLowered;
-
- // Nuke the resume instruction.
- RI->eraseFromParent();
-
- Changed =3D true;
- }
-
- return Changed;
-}
-
-/// MoveExceptionValueCalls - Ensure that eh.exception is only ever called=
from
-/// landing pads by replacing calls outside of landing pads with direct us=
e of
-/// a register holding the appropriate value; this requires adding calls i=
nside
-/// all landing pads to initialize the register. Also, move eh.exception =
calls
-/// inside landing pads to the start of the landing pad (optional, but may=
make
-/// things simpler for later passes).
-bool DwarfEHPrepare::MoveExceptionValueCalls() {
- // If the eh.exception intrinsic is not declared in the module then ther=
e is
- // nothing to do. Speed up compilation by checking for this common case.
- if (!ExceptionValueIntrinsic &&
- !F->getParent()->getFunction(Intrinsic::getName(Intrinsic::eh_except=
ion)))
- return false;
-
- bool Changed =3D false;
-
- // Move calls to eh.exception that are inside a landing pad to the start=
of
- // the landing pad.
- for (BBSet::const_iterator LI =3D LandingPads.begin(), LE =3D LandingPad=
s.end();
- LI !=3D LE; ++LI) {
- BasicBlock *LP =3D *LI;
- for (BasicBlock::iterator II =3D LP->getFirstNonPHIOrDbg(), IE =3D LP-=
>end();
- II !=3D IE;)
- if (EHExceptionInst *EI =3D dyn_cast<EHExceptionInst>(II++)) {
- // Found a call to eh.exception.
- if (!EI->use_empty()) {
- // If there is already a call to eh.exception at the start of the
- // landing pad, then get hold of it; otherwise create such a cal=
l.
- Value *CallAtStart =3D CreateExceptionValueCall(LP);
-
- // If the call was at the start of a landing pad then leave it a=
lone.
- if (EI =3D=3D CallAtStart)
- continue;
- EI->replaceAllUsesWith(CallAtStart);
- }
- EI->eraseFromParent();
- ++NumExceptionValuesMoved;
- Changed =3D true;
- }
- }
-
- // Look for calls to eh.exception that are not in a landing pad. If one=
is
- // found, then a register that holds the exception value will be created=
in
- // each landing pad, and the SSAUpdater will be used to compute the valu=
es
- // returned by eh.exception calls outside of landing pads.
- SSAUpdater SSA;
-
- // Remember where we found the eh.exception call, to avoid rescanning ea=
rlier
- // basic blocks which we already know contain no eh.exception calls.
- bool FoundCallOutsideLandingPad =3D false;
- Function::iterator BB =3D F->begin();
- for (Function::iterator BE =3D F->end(); BB !=3D BE; ++BB) {
- // Skip over landing pads.
- if (LandingPads.count(BB))
- continue;
-
- for (BasicBlock::iterator II =3D BB->getFirstNonPHIOrDbg(), IE =3D BB-=
>end();
- II !=3D IE; ++II)
- if (isa<EHExceptionInst>(II)) {
- SSA.Initialize(II->getType(), II->getName());
- FoundCallOutsideLandingPad =3D true;
- break;
- }
-
- if (FoundCallOutsideLandingPad)
- break;
- }
-
- // If all calls to eh.exception are in landing pads then we are done.
- if (!FoundCallOutsideLandingPad)
- return Changed;
-
- // Add a call to eh.exception at the start of each landing pad, and tell=
the
- // SSAUpdater that this is the value produced by the landing pad.
- for (BBSet::iterator LI =3D LandingPads.begin(), LE =3D LandingPads.end(=
);
- LI !=3D LE; ++LI)
- SSA.AddAvailableValue(*LI, CreateExceptionValueCall(*LI));
-
- // Now turn all calls to eh.exception that are not in a landing pad into=
a use
- // of the appropriate register.
- for (Function::iterator BE =3D F->end(); BB !=3D BE; ++BB) {
- // Skip over landing pads.
- if (LandingPads.count(BB))
- continue;
-
- for (BasicBlock::iterator II =3D BB->getFirstNonPHIOrDbg(), IE =3D BB-=
>end();
- II !=3D IE;)
- if (EHExceptionInst *EI =3D dyn_cast<EHExceptionInst>(II++)) {
- // Found a call to eh.exception, replace it with the value from any
- // upstream landing pad(s).
- EI->replaceAllUsesWith(SSA.GetValueAtEndOfBlock(BB));
- EI->eraseFromParent();
- ++NumExceptionValuesMoved;
- }
- }
-
- return true;
-}
-
-/// CreateExceptionValueCall - Insert a call to the eh.exception intrinsic=
at
-/// the start of the basic block (unless there already is one, in which ca=
se
-/// the existing call is returned).
-Instruction *DwarfEHPrepare::CreateExceptionValueCall(BasicBlock *BB) {
- Instruction *Start =3D BB->getFirstNonPHIOrDbg();
- // Is this a call to eh.exception?
- if (IntrinsicInst *CI =3D dyn_cast<IntrinsicInst>(Start))
- if (CI->getIntrinsicID() =3D=3D Intrinsic::eh_exception)
- // Reuse the existing call.
- return Start;
-
- // Find the eh.exception intrinsic if we didn't already.
- if (!ExceptionValueIntrinsic)
- ExceptionValueIntrinsic =3D Intrinsic::getDeclaration(F->getParent(),
- Intrinsic::eh_excep=
tion);
-
- // Create the call.
- return CallInst::Create(ExceptionValueIntrinsic, "eh.value.call", Start);
+ return ExnObj;
}
=20
/// InsertUnwindResumeCalls - Convert the ResumeInsts that are still prese=
nt
/// into calls to the appropriate _Unwind_Resume function.
-bool DwarfEHPrepare::InsertUnwindResumeCalls() {
+bool DwarfEHPrepare::InsertUnwindResumeCalls(Function &Fn) {
bool UsesNewEH =3D false;
SmallVector<ResumeInst*, 16> Resumes;
- for (Function::iterator I =3D F->begin(), E =3D F->end(); I !=3D E; ++I)=
{
+ for (Function::iterator I =3D Fn.begin(), E =3D Fn.end(); I !=3D E; ++I)=
{
TerminatorInst *TI =3D I->getTerminator();
if (ResumeInst *RI =3D dyn_cast<ResumeInst>(TI))
Resumes.push_back(RI);
@@ -682,27 +127,45 @@
FunctionType *FTy =3D FunctionType::get(Type::getVoidTy(Ctx),
Type::getInt8PtrTy(Ctx), false);
const char *RewindName =3D TLI->getLibcallName(RTLIB::UNWIND_RESUME);
- RewindFunction =3D F->getParent()->getOrInsertFunction(RewindName, FTy=
);
+ RewindFunction =3D Fn.getParent()->getOrInsertFunction(RewindName, FTy=
);
}
=20
// Create the basic block where the _Unwind_Resume call will live.
- LLVMContext &Ctx =3D F->getContext();
- BasicBlock *UnwindBB =3D BasicBlock::Create(Ctx, "unwind_resume", F);
- PHINode *PN =3D PHINode::Create(Type::getInt8PtrTy(Ctx), Resumes.size(),
+ LLVMContext &Ctx =3D Fn.getContext();
+ unsigned ResumesSize =3D Resumes.size();
+
+ if (ResumesSize =3D=3D 1) {
+ // Instead of creating a new BB and PHI node, just append the call to
+ // _Unwind_Resume to the end of the single resume block.
+ ResumeInst *RI =3D Resumes.front();
+ BasicBlock *UnwindBB =3D RI->getParent();
+ Instruction *ExnObj =3D GetExceptionObject(RI);
+
+ // Call the _Unwind_Resume function.
+ CallInst *CI =3D CallInst::Create(RewindFunction, ExnObj, "", UnwindBB=
);
+ CI->setCallingConv(TLI->getLibcallCallingConv(RTLIB::UNWIND_RESUME));
+
+ // We never expect _Unwind_Resume to return.
+ new UnreachableInst(Ctx, UnwindBB);
+ return true;
+ }
+
+ BasicBlock *UnwindBB =3D BasicBlock::Create(Ctx, "unwind_resume", &Fn);
+ PHINode *PN =3D PHINode::Create(Type::getInt8PtrTy(Ctx), ResumesSize,
"exn.obj", UnwindBB);
=20
// Extract the exception object from the ResumeInst and add it to the PH=
I node
// that feeds the _Unwind_Resume call.
- BasicBlock *UnwindBBDom =3D Resumes[0]->getParent();
for (SmallVectorImpl<ResumeInst*>::iterator
I =3D Resumes.begin(), E =3D Resumes.end(); I !=3D E; ++I) {
ResumeInst *RI =3D *I;
- BranchInst::Create(UnwindBB, RI->getParent());
- ExtractValueInst *ExnObj =3D ExtractValueInst::Create(RI->getOperand(0=
),
- 0, "exn.obj", RI);
- PN->addIncoming(ExnObj, RI->getParent());
- UnwindBBDom =3D DT->findNearestCommonDominator(RI->getParent(), Unwind=
BBDom);
- RI->eraseFromParent();
+ BasicBlock *Parent =3D RI->getParent();
+ BranchInst::Create(UnwindBB, Parent);
+
+ Instruction *ExnObj =3D GetExceptionObject(RI);
+ PN->addIncoming(ExnObj, Parent);
+
+ ++NumResumesLowered;
}
=20
// Call the function.
@@ -711,40 +174,10 @@
=20
// We never expect _Unwind_Resume to return.
new UnreachableInst(Ctx, UnwindBB);
-
- // Now update DominatorTree analysis information.
- DT->addNewBlock(UnwindBB, UnwindBBDom);
return true;
}
=20
bool DwarfEHPrepare::runOnFunction(Function &Fn) {
- bool Changed =3D false;
-
- // Initialize internal state.
- DT =3D &getAnalysis<DominatorTree>(); // FIXME: We won't need this with =
the new EH.
- F =3D &Fn;
-
- if (InsertUnwindResumeCalls()) {
- // FIXME: The reset of this function can go once the new EH is done.
- LandingPads.clear();
- return true;
- }
-
- // Ensure that only unwind edges end at landing pads (a landing pad is a
- // basic block where an invoke unwind edge ends).
- Changed |=3D NormalizeLandingPads();
-
- // Turn unwind instructions and eh.resume calls into libcalls.
- Changed |=3D LowerUnwindsAndResumes();
-
- // TODO: Move eh.selector calls to landing pads and combine them.
-
- // Move eh.exception calls to landing pads.
- Changed |=3D MoveExceptionValueCalls();
-
- Changed |=3D HandleURoRInvokes();
-
- LandingPads.clear();
-
+ bool Changed =3D InsertUnwindResumeCalls(Fn);
return Changed;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/EdgeBund=
les.cpp
--- a/head/contrib/llvm/lib/CodeGen/EdgeBundles.cpp Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/lib/CodeGen/EdgeBundles.cpp Tue Apr 17 11:51:51 201=
2 +0300
@@ -77,7 +77,7 @@
/// Specialize WriteGraph, the standard implementation won't work.
raw_ostream &llvm::WriteGraph(raw_ostream &O, const EdgeBundles &G,
bool ShortNames,
- const std::string &Title) {
+ const Twine &Title) {
const MachineFunction *MF =3D G.getMachineFunction();
=20
O << "digraph {\n";
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Executio=
nDepsFix.cpp
--- a/head/contrib/llvm/lib/CodeGen/ExecutionDepsFix.cpp Tue Apr 17 11:36:4=
7 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/ExecutionDepsFix.cpp Tue Apr 17 11:51:5=
1 2012 +0300
@@ -26,7 +26,7 @@
#include "llvm/CodeGen/Passes.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
-#include "llvm/ADT/DepthFirstIterator.h"
+#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
@@ -45,7 +45,7 @@
/// DomainValue for each register, but it may contain multiple execution
/// domains. A register value is initially created in a single execution
/// domain, but if we were forced to pay the penalty of a domain crossing,=
we
-/// keep track of the fact the the register is now available in multiple
+/// keep track of the fact that the register is now available in multiple
/// domains.
namespace {
struct DomainValue {
@@ -57,8 +57,10 @@
// domains where the register is available for free.
unsigned AvailableDomains;
=20
- // Position of the last defining instruction.
- unsigned Dist;
+ // Pointer to the next DomainValue in a chain. When two DomainValues are
+ // merged, Victim.Next is set to point to Victor, so old DomainValue
+ // references can be updated by folowing the chain.
+ DomainValue *Next;
=20
// Twiddleable instructions using or defining these registers.
SmallVector<MachineInstr*, 8> Instrs;
@@ -92,16 +94,33 @@
return CountTrailingZeros_32(AvailableDomains);
}
=20
- DomainValue() { clear(); }
+ DomainValue() : Refs(0) { clear(); }
=20
+ // Clear this DomainValue and point to next which has all its data.
void clear() {
- Refs =3D AvailableDomains =3D Dist =3D 0;
+ AvailableDomains =3D 0;
+ Next =3D 0;
Instrs.clear();
}
};
}
=20
namespace {
+/// LiveReg - Information about a live register.
+struct LiveReg {
+ /// Value currently in this register, or NULL when no value is being tra=
cked.
+ /// This counts as a DomainValue reference.
+ DomainValue *Value;
+
+ /// Instruction that defined this register, relative to the beginning of=
the
+ /// current basic block. When a LiveReg is used to represent a live-out
+ /// register, this value is relative to the end of the basic block, so it
+ /// will be a negative number.
+ int Def;
+};
+} // anonynous namespace
+
+namespace {
class ExeDepsFix : public MachineFunctionPass {
static char ID;
SpecificBumpPtrAllocator<DomainValue> Allocator;
@@ -111,13 +130,19 @@
MachineFunction *MF;
const TargetInstrInfo *TII;
const TargetRegisterInfo *TRI;
- MachineBasicBlock *MBB;
std::vector<int> AliasMap;
const unsigned NumRegs;
- DomainValue **LiveRegs;
- typedef DenseMap<MachineBasicBlock*,DomainValue**> LiveOutMap;
+ LiveReg *LiveRegs;
+ typedef DenseMap<MachineBasicBlock*, LiveReg*> LiveOutMap;
LiveOutMap LiveOuts;
- unsigned Distance;
+
+ /// Current instruction number.
+ /// The first instruction in each basic block is 0.
+ int CurInstr;
+
+ /// True when the current block has a predecessor that hasn't been visit=
ed
+ /// yet.
+ bool SeenUnknownBackEdge;
=20
public:
ExeDepsFix(const TargetRegisterClass *rc)
@@ -131,26 +156,33 @@
virtual bool runOnMachineFunction(MachineFunction &MF);
=20
virtual const char *getPassName() const {
- return "SSE execution domain fixup";
+ return "Execution dependency fix";
}
=20
private:
// Register mapping.
- int RegIndex(unsigned Reg);
+ int regIndex(unsigned Reg);
=20
// DomainValue allocation.
- DomainValue *Alloc(int domain =3D -1);
- void Recycle(DomainValue*);
+ DomainValue *alloc(int domain =3D -1);
+ DomainValue *retain(DomainValue *DV) {
+ if (DV) ++DV->Refs;
+ return DV;
+ }
+ void release(DomainValue*);
+ DomainValue *resolve(DomainValue*&);
=20
// LiveRegs manipulations.
- void SetLiveReg(int rx, DomainValue *DV);
- void Kill(int rx);
- void Force(int rx, unsigned domain);
- void Collapse(DomainValue *dv, unsigned domain);
- bool Merge(DomainValue *A, DomainValue *B);
+ void setLiveReg(int rx, DomainValue *DV);
+ void kill(int rx);
+ void force(int rx, unsigned domain);
+ void collapse(DomainValue *dv, unsigned domain);
+ bool merge(DomainValue *A, DomainValue *B);
=20
- void enterBasicBlock();
- void visitGenericInstr(MachineInstr*);
+ void enterBasicBlock(MachineBasicBlock*);
+ void leaveBasicBlock(MachineBasicBlock*);
+ void visitInstr(MachineInstr*);
+ void processDefs(MachineInstr*, bool Kill);
void visitSoftInstr(MachineInstr*, unsigned mask);
void visitHardInstr(MachineInstr*, unsigned domain);
};
@@ -160,83 +192,108 @@
=20
/// Translate TRI register number to an index into our smaller tables of
/// interesting registers. Return -1 for boring registers.
-int ExeDepsFix::RegIndex(unsigned Reg) {
+int ExeDepsFix::regIndex(unsigned Reg) {
assert(Reg < AliasMap.size() && "Invalid register");
return AliasMap[Reg];
}
=20
-DomainValue *ExeDepsFix::Alloc(int domain) {
+DomainValue *ExeDepsFix::alloc(int domain) {
DomainValue *dv =3D Avail.empty() ?
new(Allocator.Allocate()) DomainValue :
Avail.pop_back_val();
- dv->Dist =3D Distance;
if (domain >=3D 0)
dv->addDomain(domain);
+ assert(dv->Refs =3D=3D 0 && "Reference count wasn't cleared");
+ assert(!dv->Next && "Chained DomainValue shouldn't have been recycled");
return dv;
}
=20
-void ExeDepsFix::Recycle(DomainValue *dv) {
- assert(dv && "Cannot recycle NULL");
- dv->clear();
- Avail.push_back(dv);
+/// release - Release a reference to DV. When the last reference is relea=
sed,
+/// collapse if needed.
+void ExeDepsFix::release(DomainValue *DV) {
+ while (DV) {
+ assert(DV->Refs && "Bad DomainValue");
+ if (--DV->Refs)
+ return;
+
+ // There are no more DV references. Collapse any contained instruction=
s.
+ if (DV->AvailableDomains && !DV->isCollapsed())
+ collapse(DV, DV->getFirstDomain());
+
+ DomainValue *Next =3D DV->Next;
+ DV->clear();
+ Avail.push_back(DV);
+ // Also release the next DomainValue in the chain.
+ DV =3D Next;
+ }
+}
+
+/// resolve - Follow the chain of dead DomainValues until a live DomainVal=
ue is
+/// reached. Update the referenced pointer when necessary.
+DomainValue *ExeDepsFix::resolve(DomainValue *&DVRef) {
+ DomainValue *DV =3D DVRef;
+ if (!DV || !DV->Next)
+ return DV;
+
+ // DV has a chain. Find the end.
+ do DV =3D DV->Next;
+ while (DV->Next);
+
+ // Update DVRef to point to DV.
+ retain(DV);
+ release(DVRef);
+ DVRef =3D DV;
+ return DV;
}
=20
/// Set LiveRegs[rx] =3D dv, updating reference counts.
-void ExeDepsFix::SetLiveReg(int rx, DomainValue *dv) {
+void ExeDepsFix::setLiveReg(int rx, DomainValue *dv) {
assert(unsigned(rx) < NumRegs && "Invalid index");
- if (!LiveRegs) {
- LiveRegs =3D new DomainValue*[NumRegs];
- std::fill(LiveRegs, LiveRegs+NumRegs, (DomainValue*)0);
- }
+ assert(LiveRegs && "Must enter basic block first.");
=20
- if (LiveRegs[rx] =3D=3D dv)
+ if (LiveRegs[rx].Value =3D=3D dv)
return;
- if (LiveRegs[rx]) {
- assert(LiveRegs[rx]->Refs && "Bad refcount");
- if (--LiveRegs[rx]->Refs =3D=3D 0) Recycle(LiveRegs[rx]);
- }
- LiveRegs[rx] =3D dv;
- if (dv) ++dv->Refs;
+ if (LiveRegs[rx].Value)
+ release(LiveRegs[rx].Value);
+ LiveRegs[rx].Value =3D retain(dv);
}
=20
// Kill register rx, recycle or collapse any DomainValue.
-void ExeDepsFix::Kill(int rx) {
+void ExeDepsFix::kill(int rx) {
assert(unsigned(rx) < NumRegs && "Invalid index");
- if (!LiveRegs || !LiveRegs[rx]) return;
+ assert(LiveRegs && "Must enter basic block first.");
+ if (!LiveRegs[rx].Value)
+ return;
=20
- // Before killing the last reference to an open DomainValue, collapse it=
to
- // the first available domain.
- if (LiveRegs[rx]->Refs =3D=3D 1 && !LiveRegs[rx]->isCollapsed())
- Collapse(LiveRegs[rx], LiveRegs[rx]->getFirstDomain());
- else
- SetLiveReg(rx, 0);
+ release(LiveRegs[rx].Value);
+ LiveRegs[rx].Value =3D 0;
}
=20
/// Force register rx into domain.
-void ExeDepsFix::Force(int rx, unsigned domain) {
+void ExeDepsFix::force(int rx, unsigned domain) {
assert(unsigned(rx) < NumRegs && "Invalid index");
- DomainValue *dv;
- if (LiveRegs && (dv =3D LiveRegs[rx])) {
+ assert(LiveRegs && "Must enter basic block first.");
+ if (DomainValue *dv =3D LiveRegs[rx].Value) {
if (dv->isCollapsed())
dv->addDomain(domain);
else if (dv->hasDomain(domain))
- Collapse(dv, domain);
+ collapse(dv, domain);
else {
// This is an incompatible open DomainValue. Collapse it to whatever=
and
// force the new value into domain. This costs a domain crossing.
- Collapse(dv, dv->getFirstDomain());
- assert(LiveRegs[rx] && "Not live after collapse?");
- LiveRegs[rx]->addDomain(domain);
+ collapse(dv, dv->getFirstDomain());
+ assert(LiveRegs[rx].Value && "Not live after collapse?");
+ LiveRegs[rx].Value->addDomain(domain);
}
} else {
// Set up basic collapsed DomainValue.
- SetLiveReg(rx, Alloc(domain));
+ setLiveReg(rx, alloc(domain));
}
}
=20
/// Collapse open DomainValue into given domain. If there are multiple
/// registers using dv, they each get a unique collapsed DomainValue.
-void ExeDepsFix::Collapse(DomainValue *dv, unsigned domain) {
+void ExeDepsFix::collapse(DomainValue *dv, unsigned domain) {
assert(dv->hasDomain(domain) && "Cannot collapse");
=20
// Collapse all the instructions.
@@ -247,13 +304,13 @@
// If there are multiple users, give them new, unique DomainValues.
if (LiveRegs && dv->Refs > 1)
for (unsigned rx =3D 0; rx !=3D NumRegs; ++rx)
- if (LiveRegs[rx] =3D=3D dv)
- SetLiveReg(rx, Alloc(domain));
+ if (LiveRegs[rx].Value =3D=3D dv)
+ setLiveReg(rx, alloc(domain));
}
=20
/// Merge - All instructions and registers in B are moved to A, and B is
/// released.
-bool ExeDepsFix::Merge(DomainValue *A, DomainValue *B) {
+bool ExeDepsFix::merge(DomainValue *A, DomainValue *B) {
assert(!A->isCollapsed() && "Cannot merge into collapsed");
assert(!B->isCollapsed() && "Cannot merge from collapsed");
if (A =3D=3D B)
@@ -263,47 +320,188 @@
if (!common)
return false;
A->AvailableDomains =3D common;
- A->Dist =3D std::max(A->Dist, B->Dist);
A->Instrs.append(B->Instrs.begin(), B->Instrs.end());
+
+ // Clear the old DomainValue so we won't try to swizzle instructions twi=
ce.
+ B->clear();
+ // All uses of B are referred to A.
+ B->Next =3D retain(A);
+
for (unsigned rx =3D 0; rx !=3D NumRegs; ++rx)
- if (LiveRegs[rx] =3D=3D B)
- SetLiveReg(rx, A);
+ if (LiveRegs[rx].Value =3D=3D B)
+ setLiveReg(rx, A);
return true;
}
=20
-void ExeDepsFix::enterBasicBlock() {
+// enterBasicBlock - Set up LiveRegs by merging predecessor live-out value=
s.
+void ExeDepsFix::enterBasicBlock(MachineBasicBlock *MBB) {
+ // Detect back-edges from predecessors we haven't processed yet.
+ SeenUnknownBackEdge =3D false;
+
+ // Reset instruction counter in each basic block.
+ CurInstr =3D 0;
+
+ // Set up LiveRegs to represent registers entering MBB.
+ if (!LiveRegs)
+ LiveRegs =3D new LiveReg[NumRegs];
+
+ // Default values are 'nothing happened a long time ago'.
+ for (unsigned rx =3D 0; rx !=3D NumRegs; ++rx) {
+ LiveRegs[rx].Value =3D 0;
+ LiveRegs[rx].Def =3D -(1 << 20);
+ }
+
+ // This is the entry block.
+ if (MBB->pred_empty()) {
+ for (MachineBasicBlock::livein_iterator i =3D MBB->livein_begin(),
+ e =3D MBB->livein_end(); i !=3D e; ++i) {
+ int rx =3D regIndex(*i);
+ if (rx < 0)
+ continue;
+ // Treat function live-ins as if they were defined just before the f=
irst
+ // instruction. Usually, function arguments are set up immediately
+ // before the call.
+ LiveRegs[rx].Def =3D -1;
+ }
+ DEBUG(dbgs() << "BB#" << MBB->getNumber() << ": entry\n");
+ return;
+ }
+
// Try to coalesce live-out registers from predecessors.
- for (MachineBasicBlock::livein_iterator i =3D MBB->livein_begin(),
- e =3D MBB->livein_end(); i !=3D e; ++i) {
- int rx =3D RegIndex(*i);
- if (rx < 0) continue;
- for (MachineBasicBlock::const_pred_iterator pi =3D MBB->pred_begin(),
- pe =3D MBB->pred_end(); pi !=3D pe; ++pi) {
- LiveOutMap::const_iterator fi =3D LiveOuts.find(*pi);
- if (fi =3D=3D LiveOuts.end()) continue;
- DomainValue *pdv =3D fi->second[rx];
- if (!pdv) continue;
- if (!LiveRegs || !LiveRegs[rx]) {
- SetLiveReg(rx, pdv);
+ for (MachineBasicBlock::const_pred_iterator pi =3D MBB->pred_begin(),
+ pe =3D MBB->pred_end(); pi !=3D pe; ++pi) {
+ LiveOutMap::const_iterator fi =3D LiveOuts.find(*pi);
+ if (fi =3D=3D LiveOuts.end()) {
+ SeenUnknownBackEdge =3D true;
+ continue;
+ }
+ assert(fi->second && "Can't have NULL entries");
+
+ for (unsigned rx =3D 0; rx !=3D NumRegs; ++rx) {
+ // Use the most recent predecessor def for each register.
+ LiveRegs[rx].Def =3D std::max(LiveRegs[rx].Def, fi->second[rx].Def);
+
+ DomainValue *pdv =3D resolve(fi->second[rx].Value);
+ if (!pdv)
+ continue;
+ if (!LiveRegs[rx].Value) {
+ setLiveReg(rx, pdv);
continue;
}
=20
// We have a live DomainValue from more than one predecessor.
- if (LiveRegs[rx]->isCollapsed()) {
+ if (LiveRegs[rx].Value->isCollapsed()) {
// We are already collapsed, but predecessor is not. Force him.
- unsigned domain =3D LiveRegs[rx]->getFirstDomain();
- if (!pdv->isCollapsed() && pdv->hasDomain(domain))
- Collapse(pdv, domain);
+ unsigned Domain =3D LiveRegs[rx].Value->getFirstDomain();
+ if (!pdv->isCollapsed() && pdv->hasDomain(Domain))
+ collapse(pdv, Domain);
continue;
}
=20
// Currently open, merge in predecessor.
if (!pdv->isCollapsed())
- Merge(LiveRegs[rx], pdv);
+ merge(LiveRegs[rx].Value, pdv);
else
- Force(rx, pdv->getFirstDomain());
+ force(rx, pdv->getFirstDomain());
}
}
+ DEBUG(dbgs() << "BB#" << MBB->getNumber()
+ << (SeenUnknownBackEdge ? ": incomplete\n" : ": all preds known\n"=
));
+}
+
+void ExeDepsFix::leaveBasicBlock(MachineBasicBlock *MBB) {
+ assert(LiveRegs && "Must enter basic block first.");
+ // Save live registers at end of MBB - used by enterBasicBlock().
+ // Also use LiveOuts as a visited set to detect back-edges.
+ bool First =3D LiveOuts.insert(std::make_pair(MBB, LiveRegs)).second;
+
+ if (First) {
+ // LiveRegs was inserted in LiveOuts. Adjust all defs to be relative =
to
+ // the end of this block instead of the beginning.
+ for (unsigned i =3D 0, e =3D NumRegs; i !=3D e; ++i)
+ LiveRegs[i].Def -=3D CurInstr;
+ } else {
+ // Insertion failed, this must be the second pass.
+ // Release all the DomainValues instead of keeping them.
+ for (unsigned i =3D 0, e =3D NumRegs; i !=3D e; ++i)
+ release(LiveRegs[i].Value);
+ delete[] LiveRegs;
+ }
+ LiveRegs =3D 0;
+}
+
+void ExeDepsFix::visitInstr(MachineInstr *MI) {
+ if (MI->isDebugValue())
+ return;
+
+ // Update instructions with explicit execution domains.
+ std::pair<uint16_t, uint16_t> DomP =3D TII->getExecutionDomain(MI);
+ if (DomP.first) {
+ if (DomP.second)
+ visitSoftInstr(MI, DomP.second);
+ else
+ visitHardInstr(MI, DomP.first);
+ }
+
+ // Process defs to track register ages, and kill values clobbered by gen=
eric
+ // instructions.
+ processDefs(MI, !DomP.first);
+}
+
+// Update def-ages for registers defined by MI.
+// If Kill is set, also kill off DomainValues clobbered by the defs.
+void ExeDepsFix::processDefs(MachineInstr *MI, bool Kill) {
+ assert(!MI->isDebugValue() && "Won't process debug values");
+ const MCInstrDesc &MCID =3D MI->getDesc();
+ for (unsigned i =3D 0,
+ e =3D MI->isVariadic() ? MI->getNumOperands() : MCID.getNumDefs();
+ i !=3D e; ++i) {
+ MachineOperand &MO =3D MI->getOperand(i);
+ if (!MO.isReg())
+ continue;
+ if (MO.isImplicit())
+ break;
+ if (MO.isUse())
+ continue;
+ int rx =3D regIndex(MO.getReg());
+ if (rx < 0)
+ continue;
+
+ // This instruction explicitly defines rx.
+ DEBUG(dbgs() << TRI->getName(RC->getRegister(rx)) << ":\t" << CurInstr
+ << '\t' << *MI);
+
+ // How many instructions since rx was last written?
+ unsigned Clearance =3D CurInstr - LiveRegs[rx].Def;
+ LiveRegs[rx].Def =3D CurInstr;
+
+ // Kill off domains redefined by generic instructions.
+ if (Kill)
+ kill(rx);
+
+ // Verify clearance before partial register updates.
+ unsigned Pref =3D TII->getPartialRegUpdateClearance(MI, i, TRI);
+ if (!Pref)
+ continue;
+ DEBUG(dbgs() << "Clearance: " << Clearance << ", want " << Pref);
+ if (Pref > Clearance) {
+ DEBUG(dbgs() << ": Break dependency.\n");
+ TII->breakPartialRegDependency(MI, i, TRI);
+ continue;
+ }
+
+ // The current clearance seems OK, but we may be ignoring a def from a
+ // back-edge.
+ if (!SeenUnknownBackEdge || Pref <=3D unsigned(CurInstr)) {
+ DEBUG(dbgs() << ": OK.\n");
+ continue;
+ }
+
+ // A def from an unprocessed back-edge may make us break this dependen=
cy.
+ DEBUG(dbgs() << ": Wait for back-edge to resolve.\n");
+ }
+
+ ++CurInstr;
}
=20
// A hard instruction only works in one domain. All input registers will be
@@ -314,19 +512,19 @@
e =3D mi->getDesc().getNumOperands(); i !=3D e; ++i) {
MachineOperand &mo =3D mi->getOperand(i);
if (!mo.isReg()) continue;
- int rx =3D RegIndex(mo.getReg());
+ int rx =3D regIndex(mo.getReg());
if (rx < 0) continue;
- Force(rx, domain);
+ force(rx, domain);
}
=20
// Kill all defs and force them.
for (unsigned i =3D 0, e =3D mi->getDesc().getNumDefs(); i !=3D e; ++i) {
MachineOperand &mo =3D mi->getOperand(i);
if (!mo.isReg()) continue;
- int rx =3D RegIndex(mo.getReg());
+ int rx =3D regIndex(mo.getReg());
if (rx < 0) continue;
- Kill(rx);
- Force(rx, domain);
+ kill(rx);
+ force(rx, domain);
}
}
=20
@@ -343,9 +541,9 @@
e =3D mi->getDesc().getNumOperands(); i !=3D e; ++i) {
MachineOperand &mo =3D mi->getOperand(i);
if (!mo.isReg()) continue;
- int rx =3D RegIndex(mo.getReg());
+ int rx =3D regIndex(mo.getReg());
if (rx < 0) continue;
- if (DomainValue *dv =3D LiveRegs[rx]) {
+ if (DomainValue *dv =3D LiveRegs[rx].Value) {
// Bitmask of domains that dv and available have in common.
unsigned common =3D dv->getCommonDomains(available);
// Is it possible to use this collapsed register for free?
@@ -360,7 +558,7 @@
else
// Open DomainValue is not compatible with instruction. It is us=
eless
// now.
- Kill(rx);
+ kill(rx);
}
}
=20
@@ -374,94 +572,89 @@
=20
// Kill off any remaining uses that don't match available, and build a l=
ist of
// incoming DomainValues that we want to merge.
- SmallVector<DomainValue*,4> doms;
+ SmallVector<LiveReg, 4> Regs;
for (SmallVector<int, 4>::iterator i=3Dused.begin(), e=3Dused.end(); i!=
=3De; ++i) {
int rx =3D *i;
- DomainValue *dv =3D LiveRegs[rx];
+ const LiveReg &LR =3D LiveRegs[rx];
// This useless DomainValue could have been missed above.
- if (!dv->getCommonDomains(available)) {
- Kill(*i);
+ if (!LR.Value->getCommonDomains(available)) {
+ kill(rx);
continue;
}
- // sorted, uniqued insert.
- bool inserted =3D false;
- for (SmallVector<DomainValue*,4>::iterator i =3D doms.begin(), e =3D d=
oms.end();
- i !=3D e && !inserted; ++i) {
- if (dv =3D=3D *i)
- inserted =3D true;
- else if (dv->Dist < (*i)->Dist) {
- inserted =3D true;
- doms.insert(i, dv);
+ // Sorted insertion.
+ bool Inserted =3D false;
+ for (SmallVector<LiveReg, 4>::iterator i =3D Regs.begin(), e =3D Regs.=
end();
+ i !=3D e && !Inserted; ++i) {
+ if (LR.Def < i->Def) {
+ Inserted =3D true;
+ Regs.insert(i, LR);
}
}
- if (!inserted)
- doms.push_back(dv);
+ if (!Inserted)
+ Regs.push_back(LR);
}
=20
// doms are now sorted in order of appearance. Try to merge them all, gi=
ving
// priority to the latest ones.
DomainValue *dv =3D 0;
- while (!doms.empty()) {
+ while (!Regs.empty()) {
if (!dv) {
- dv =3D doms.pop_back_val();
+ dv =3D Regs.pop_back_val().Value;
+ // Force the first dv to match the current instruction.
+ dv->AvailableDomains =3D dv->getCommonDomains(available);
+ assert(dv->AvailableDomains && "Domain should have been filtered");
continue;
}
=20
- DomainValue *latest =3D doms.pop_back_val();
- if (Merge(dv, latest)) continue;
+ DomainValue *Latest =3D Regs.pop_back_val().Value;
+ // Skip already merged values.
+ if (Latest =3D=3D dv || Latest->Next)
+ continue;
+ if (merge(dv, Latest))
+ continue;
=20
// If latest didn't merge, it is useless now. Kill all registers using=
it.
for (SmallVector<int,4>::iterator i=3Dused.begin(), e=3Dused.end(); i =
!=3D e; ++i)
- if (LiveRegs[*i] =3D=3D latest)
- Kill(*i);
+ if (LiveRegs[*i].Value =3D=3D Latest)
+ kill(*i);
}
=20
// dv is the DomainValue we are going to use for this instruction.
- if (!dv)
- dv =3D Alloc();
- dv->Dist =3D Distance;
- dv->AvailableDomains =3D available;
+ if (!dv) {
+ dv =3D alloc();
+ dv->AvailableDomains =3D available;
+ }
dv->Instrs.push_back(mi);
=20
// Finally set all defs and non-collapsed uses to dv.
for (unsigned i =3D 0, e =3D mi->getDesc().getNumOperands(); i !=3D e; +=
+i) {
MachineOperand &mo =3D mi->getOperand(i);
if (!mo.isReg()) continue;
- int rx =3D RegIndex(mo.getReg());
+ int rx =3D regIndex(mo.getReg());
if (rx < 0) continue;
- if (!LiveRegs || !LiveRegs[rx] || (mo.isDef() && LiveRegs[rx]!=3Ddv)) {
- Kill(rx);
- SetLiveReg(rx, dv);
+ if (!LiveRegs[rx].Value || (mo.isDef() && LiveRegs[rx].Value !=3D dv))=
{
+ kill(rx);
+ setLiveReg(rx, dv);
}
}
}
=20
-void ExeDepsFix::visitGenericInstr(MachineInstr *mi) {
- // Process explicit defs, kill any relevant registers redefined.
- for (unsigned i =3D 0, e =3D mi->getDesc().getNumDefs(); i !=3D e; ++i) {
- MachineOperand &mo =3D mi->getOperand(i);
- if (!mo.isReg()) continue;
- int rx =3D RegIndex(mo.getReg());
- if (rx < 0) continue;
- Kill(rx);
- }
-}
-
bool ExeDepsFix::runOnMachineFunction(MachineFunction &mf) {
MF =3D &mf;
TII =3D MF->getTarget().getInstrInfo();
TRI =3D MF->getTarget().getRegisterInfo();
- MBB =3D 0;
LiveRegs =3D 0;
- Distance =3D 0;
assert(NumRegs =3D=3D RC->getNumRegs() && "Bad regclass");
=20
+ DEBUG(dbgs() << "********** FIX EXECUTION DEPENDENCIES: "
+ << RC->getName() << " **********\n");
+
// If no relevant registers are used in the function, we can skip it
// completely.
bool anyregs =3D false;
for (TargetRegisterClass::const_iterator I =3D RC->begin(), E =3D RC->en=
d();
I !=3D E; ++I)
- if (MF->getRegInfo().isPhysRegUsed(*I)) {
+ if (MF->getRegInfo().isPhysRegOrOverlapUsed(*I)) {
anyregs =3D true;
break;
}
@@ -473,43 +666,48 @@
// or -1.
AliasMap.resize(TRI->getNumRegs(), -1);
for (unsigned i =3D 0, e =3D RC->getNumRegs(); i !=3D e; ++i)
- for (const unsigned *AI =3D TRI->getOverlaps(RC->getRegister(i)); *A=
I; ++AI)
+ for (const uint16_t *AI =3D TRI->getOverlaps(RC->getRegister(i)); *A=
I; ++AI)
AliasMap[*AI] =3D i;
}
=20
MachineBasicBlock *Entry =3D MF->begin();
- SmallPtrSet<MachineBasicBlock*, 16> Visited;
- for (df_ext_iterator<MachineBasicBlock*, SmallPtrSet<MachineBasicBlock*,=
16> >
- DFI =3D df_ext_begin(Entry, Visited), DFE =3D df_ext_end(Entry, V=
isited);
- DFI !=3D DFE; ++DFI) {
- MBB =3D *DFI;
- enterBasicBlock();
+ ReversePostOrderTraversal<MachineBasicBlock*> RPOT(Entry);
+ SmallVector<MachineBasicBlock*, 16> Loops;
+ for (ReversePostOrderTraversal<MachineBasicBlock*>::rpo_iterator
+ MBBI =3D RPOT.begin(), MBBE =3D RPOT.end(); MBBI !=3D MBBE; ++MBB=
I) {
+ MachineBasicBlock *MBB =3D *MBBI;
+ enterBasicBlock(MBB);
+ if (SeenUnknownBackEdge)
+ Loops.push_back(MBB);
for (MachineBasicBlock::iterator I =3D MBB->begin(), E =3D MBB->end();=
I !=3D E;
- ++I) {
- MachineInstr *mi =3D I;
- if (mi->isDebugValue()) continue;
- ++Distance;
- std::pair<uint16_t, uint16_t> domp =3D TII->getExecutionDomain(mi);
- if (domp.first)
- if (domp.second)
- visitSoftInstr(mi, domp.second);
- else
- visitHardInstr(mi, domp.first);
- else if (LiveRegs)
- visitGenericInstr(mi);
- }
-
- // Save live registers at end of MBB - used by enterBasicBlock().
- if (LiveRegs)
- LiveOuts.insert(std::make_pair(MBB, LiveRegs));
- LiveRegs =3D 0;
+ ++I)
+ visitInstr(I);
+ leaveBasicBlock(MBB);
}
=20
- // Clear the LiveOuts vectors. Should we also collapse any remaining
- // DomainValues?
- for (LiveOutMap::const_iterator i =3D LiveOuts.begin(), e =3D LiveOuts.e=
nd();
- i !=3D e; ++i)
- delete[] i->second;
+ // Visit all the loop blocks again in order to merge DomainValues from
+ // back-edges.
+ for (unsigned i =3D 0, e =3D Loops.size(); i !=3D e; ++i) {
+ MachineBasicBlock *MBB =3D Loops[i];
+ enterBasicBlock(MBB);
+ for (MachineBasicBlock::iterator I =3D MBB->begin(), E =3D MBB->end();=
I !=3D E;
+ ++I)
+ if (!I->isDebugValue())
+ processDefs(I, false);
+ leaveBasicBlock(MBB);
+ }
+
+ // Clear the LiveOuts vectors and collapse any remaining DomainValues.
+ for (ReversePostOrderTraversal<MachineBasicBlock*>::rpo_iterator
+ MBBI =3D RPOT.begin(), MBBE =3D RPOT.end(); MBBI !=3D MBBE; ++MBB=
I) {
+ LiveOutMap::const_iterator FI =3D LiveOuts.find(*MBBI);
+ if (FI =3D=3D LiveOuts.end() || !FI->second)
+ continue;
+ for (unsigned i =3D 0, e =3D NumRegs; i !=3D e; ++i)
+ if (FI->second[i].Value)
+ release(FI->second[i].Value);
+ delete[] FI->second;
+ }
LiveOuts.clear();
Avail.clear();
Allocator.DestroyAll();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/ExpandIS=
elPseudos.cpp
--- a/head/contrib/llvm/lib/CodeGen/ExpandISelPseudos.cpp Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/ExpandISelPseudos.cpp Tue Apr 17 11:51:=
51 2012 +0300
@@ -32,10 +32,6 @@
private:
virtual bool runOnMachineFunction(MachineFunction &MF);
=20
- const char *getPassName() const {
- return "Expand ISel Pseudo-instructions";
- }
-
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -43,12 +39,9 @@
} // end anonymous namespace
=20
char ExpandISelPseudos::ID =3D 0;
+char &llvm::ExpandISelPseudosID =3D ExpandISelPseudos::ID;
INITIALIZE_PASS(ExpandISelPseudos, "expand-isel-pseudos",
- "Expand CodeGen Pseudo-instructions", false, false)
-
-FunctionPass *llvm::createExpandISelPseudosPass() {
- return new ExpandISelPseudos();
-}
+ "Expand ISel Pseudo-instructions", false, false)
=20
bool ExpandISelPseudos::runOnMachineFunction(MachineFunction &MF) {
bool Changed =3D false;
@@ -62,8 +55,7 @@
MachineInstr *MI =3D MBBI++;
=20
// If MI is a pseudo, expand it.
- const MCInstrDesc &MCID =3D MI->getDesc();
- if (MCID.usesCustomInsertionHook()) {
+ if (MI->usesCustomInsertionHook()) {
Changed =3D true;
MachineBasicBlock *NewMBB =3D
TLI->EmitInstrWithCustomInserter(MI, MBB);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/ExpandPo=
stRAPseudos.cpp
--- a/head/contrib/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp Tue Apr 17 11:5=
1:51 2012 +0300
@@ -36,10 +36,6 @@
static char ID; // Pass identification, replacement for typeid
ExpandPostRA() : MachineFunctionPass(ID) {}
=20
- const char *getPassName() const {
- return "Post-RA pseudo instruction expansion pass";
- }
-
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
AU.addPreservedID(MachineLoopInfoID);
@@ -61,10 +57,10 @@
} // end anonymous namespace
=20
char ExpandPostRA::ID =3D 0;
+char &llvm::ExpandPostRAPseudosID =3D ExpandPostRA::ID;
=20
-FunctionPass *llvm::createExpandPostRAPseudosPass() {
- return new ExpandPostRA();
-}
+INITIALIZE_PASS(ExpandPostRA, "postrapseudos",
+ "Post-RA pseudo instruction expansion pass", false, false)
=20
/// TransferDeadFlag - MI is a pseudo-instruction with DstReg dead,
/// and the lowered replacement instructions immediately precede it.
@@ -207,7 +203,7 @@
++mi;
=20
// Only expand pseudos.
- if (!MI->getDesc().isPseudo())
+ if (!MI->isPseudo())
continue;
=20
// Give targets a chance to expand even standard pseudos.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/GCMetada=
ta.cpp
--- a/head/contrib/llvm/lib/CodeGen/GCMetadata.cpp Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/lib/CodeGen/GCMetadata.cpp Tue Apr 17 11:51:51 2012=
+0300
@@ -143,12 +143,12 @@
=20
static const char *DescKind(GC::PointKind Kind) {
switch (Kind) {
- default: llvm_unreachable("Unknown GC point kind");
case GC::Loop: return "loop";
case GC::Return: return "return";
case GC::PreCall: return "pre-call";
case GC::PostCall: return "post-call";
}
+ llvm_unreachable("Invalid point kind");
}
=20
bool Printer::runOnFunction(Function &F) {
@@ -156,12 +156,12 @@
=20
GCFunctionInfo *FD =3D &getAnalysis<GCModuleInfo>().getFunctionInfo(F);
=20
- OS << "GC roots for " << FD->getFunction().getNameStr() << ":\n";
+ OS << "GC roots for " << FD->getFunction().getName() << ":\n";
for (GCFunctionInfo::roots_iterator RI =3D FD->roots_begin(),
RE =3D FD->roots_end(); RI !=3D RE; =
++RI)
OS << "\t" << RI->Num << "\t" << RI->StackOffset << "[sp]\n";
=20
- OS << "GC safe points for " << FD->getFunction().getNameStr() << ":\n";
+ OS << "GC safe points for " << FD->getFunction().getName() << ":\n";
for (GCFunctionInfo::iterator PI =3D FD->begin(),
PE =3D FD->end(); PI !=3D PE; ++PI) {
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/GCStrate=
gy.cpp
--- a/head/contrib/llvm/lib/CodeGen/GCStrategy.cpp Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/lib/CodeGen/GCStrategy.cpp Tue Apr 17 11:51:51 2012=
+0300
@@ -10,8 +10,8 @@
// This file implements target- and collector-independent garbage collecti=
on
// infrastructure.
//
-// MachineCodeAnalysis identifies the GC safe points in the machine code. =
Roots
-// are identified in SelectionDAGISel.
+// GCMachineCodeAnalysis identifies the GC safe points in the machine code.
+// Roots are identified in SelectionDAGISel.
//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
@@ -35,9 +35,9 @@
using namespace llvm;
=20
namespace {
- =20
+
/// LowerIntrinsics - This pass rewrites calls to the llvm.gcread or
- /// llvm.gcwrite intrinsics, replacing them with simple loads and stores=
as=20
+ /// llvm.gcwrite intrinsics, replacing them with simple loads and stores=
as
/// directed by the GCStrategy. It also performs automatic root initiali=
zation
/// and custom intrinsic lowering.
class LowerIntrinsics : public FunctionPass {
@@ -47,47 +47,46 @@
bool PerformDefaultLowering(Function &F, GCStrategy &Coll);
static bool InsertRootInitializers(Function &F,
AllocaInst **Roots, unsigned Count);
- =20
+
public:
static char ID;
- =20
+
LowerIntrinsics();
const char *getPassName() const;
void getAnalysisUsage(AnalysisUsage &AU) const;
- =20
+
bool doInitialization(Module &M);
bool runOnFunction(Function &F);
};
- =20
- =20
- /// MachineCodeAnalysis - This is a target-independent pass over the mac=
hine=20
+
+
+ /// GCMachineCodeAnalysis - This is a target-independent pass over the m=
achine
/// function representation to identify safe points for the garbage coll=
ector
/// in the machine code. It inserts labels at safe points and populates a
/// GCMetadata record for each function.
- class MachineCodeAnalysis : public MachineFunctionPass {
+ class GCMachineCodeAnalysis : public MachineFunctionPass {
const TargetMachine *TM;
GCFunctionInfo *FI;
MachineModuleInfo *MMI;
const TargetInstrInfo *TII;
- =20
+
void FindSafePoints(MachineFunction &MF);
void VisitCallPoint(MachineBasicBlock::iterator MI);
- MCSymbol *InsertLabel(MachineBasicBlock &MBB,=20
+ MCSymbol *InsertLabel(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
DebugLoc DL) const;
- =20
+
void FindStackOffsets(MachineFunction &MF);
- =20
+
public:
static char ID;
- =20
- MachineCodeAnalysis();
- const char *getPassName() const;
+
+ GCMachineCodeAnalysis();
void getAnalysisUsage(AnalysisUsage &AU) const;
- =20
+
bool runOnMachineFunction(MachineFunction &MF);
};
- =20
+
}
=20
// -----------------------------------------------------------------------=
------
@@ -97,6 +96,7 @@
CustomReadBarriers(false),
CustomWriteBarriers(false),
CustomRoots(false),
+ CustomSafePoints(false),
InitRoots(true),
UsesMetadata(false)
{}
@@ -104,18 +104,24 @@
GCStrategy::~GCStrategy() {
for (iterator I =3D begin(), E =3D end(); I !=3D E; ++I)
delete *I;
- =20
+
Functions.clear();
}
-=20
+
bool GCStrategy::initializeCustomLowering(Module &M) { return false; }
-=20
+
bool GCStrategy::performCustomLowering(Function &F) {
dbgs() << "gc " << getName() << " must override performCustomLowering.\n=
";
+ llvm_unreachable("must override performCustomLowering");
+}
+
+
+bool GCStrategy::findCustomSafePoints(GCFunctionInfo& FI, MachineFunction =
&F) {
+ dbgs() << "gc " << getName() << " must override findCustomSafePoints.\n";
llvm_unreachable(0);
- return 0;
}
=20
+
GCFunctionInfo *GCStrategy::insertFunctionInfo(const Function &F) {
GCFunctionInfo *FI =3D new GCFunctionInfo(F, *this);
Functions.push_back(FI);
@@ -132,7 +138,7 @@
FunctionPass *llvm::createGCLoweringPass() {
return new LowerIntrinsics();
}
-=20
+
char LowerIntrinsics::ID =3D 0;
=20
LowerIntrinsics::LowerIntrinsics()
@@ -143,7 +149,7 @@
const char *LowerIntrinsics::getPassName() const {
return "Lower Garbage Collection Instructions";
}
- =20
+
void LowerIntrinsics::getAnalysisUsage(AnalysisUsage &AU) const {
FunctionPass::getAnalysisUsage(AU);
AU.addRequired<GCModuleInfo>();
@@ -161,22 +167,22 @@
for (Module::iterator I =3D M.begin(), E =3D M.end(); I !=3D E; ++I)
if (!I->isDeclaration() && I->hasGC())
MI->getFunctionInfo(*I); // Instantiate the GC strategy.
- =20
+
bool MadeChange =3D false;
for (GCModuleInfo::iterator I =3D MI->begin(), E =3D MI->end(); I !=3D E=
; ++I)
if (NeedsCustomLoweringPass(**I))
if ((*I)->initializeCustomLowering(M))
MadeChange =3D true;
- =20
+
return MadeChange;
}
=20
-bool LowerIntrinsics::InsertRootInitializers(Function &F, AllocaInst **Roo=
ts,=20
+bool LowerIntrinsics::InsertRootInitializers(Function &F, AllocaInst **Roo=
ts,
unsigned Count) {
// Scroll past alloca instructions.
BasicBlock::iterator IP =3D F.getEntryBlock().begin();
while (isa<AllocaInst>(IP)) ++IP;
- =20
+
// Search for initializers in the initial BB.
SmallPtrSet<AllocaInst*,16> InitedRoots;
for (; !CouldBecomeSafePoint(IP); ++IP)
@@ -184,10 +190,10 @@
if (AllocaInst *AI =3D
dyn_cast<AllocaInst>(SI->getOperand(1)->stripPointerCasts()))
InitedRoots.insert(AI);
- =20
+
// Add root initializers.
bool MadeChange =3D false;
- =20
+
for (AllocaInst **I =3D Roots, **E =3D Roots + Count; I !=3D E; ++I)
if (!InitedRoots.count(*I)) {
StoreInst* SI =3D new StoreInst(ConstantPointerNull::get(cast<Pointe=
rType>(
@@ -196,7 +202,7 @@
SI->insertAfter(*I);
MadeChange =3D true;
}
- =20
+
return MadeChange;
}
=20
@@ -220,26 +226,26 @@
bool LowerIntrinsics::CouldBecomeSafePoint(Instruction *I) {
// The natural definition of instructions which could introduce safe poi=
nts
// are:
- //=20
+ //
// - call, invoke (AfterCall, BeforeCall)
// - phis (Loops)
// - invoke, ret, unwind (Exit)
- //=20
+ //
// However, instructions as seemingly inoccuous as arithmetic can become
// libcalls upon lowering (e.g., div i64 on a 32-bit platform), so inste=
ad
// it is necessary to take a conservative approach.
- =20
+
if (isa<AllocaInst>(I) || isa<GetElementPtrInst>(I) ||
isa<StoreInst>(I) || isa<LoadInst>(I))
return false;
- =20
+
// llvm.gcroot is safe because it doesn't do anything at runtime.
if (CallInst *CI =3D dyn_cast<CallInst>(I))
if (Function *F =3D CI->getCalledFunction())
if (unsigned IID =3D F->getIntrinsicID())
if (IID =3D=3D Intrinsic::gcroot)
return false;
- =20
+
return true;
}
=20
@@ -249,15 +255,15 @@
// Quick exit for functions that do not use GC.
if (!F.hasGC())
return false;
- =20
+
GCFunctionInfo &FI =3D getAnalysis<GCModuleInfo>().getFunctionInfo(F);
GCStrategy &S =3D FI.getStrategy();
- =20
+
bool MadeChange =3D false;
- =20
+
if (NeedsDefaultLoweringPass(S))
MadeChange |=3D PerformDefaultLowering(F, S);
- =20
+
bool UseCustomLoweringPass =3D NeedsCustomLoweringPass(S);
if (UseCustomLoweringPass)
MadeChange |=3D S.performCustomLowering(F);
@@ -275,9 +281,9 @@
bool LowerWr =3D !S.customWriteBarrier();
bool LowerRd =3D !S.customReadBarrier();
bool InitRoots =3D S.initializeRoots();
- =20
+
SmallVector<AllocaInst*, 32> Roots;
- =20
+
bool MadeChange =3D false;
for (Function::iterator BB =3D F.begin(), E =3D F.end(); BB !=3D E; ++BB=
) {
for (BasicBlock::iterator II =3D BB->begin(), E =3D BB->end(); II !=3D=
E;) {
@@ -313,104 +319,104 @@
default:
continue;
}
- =20
+
MadeChange =3D true;
}
}
}
- =20
+
if (Roots.size())
MadeChange |=3D InsertRootInitializers(F, Roots.begin(), Roots.size());
- =20
+
return MadeChange;
}
=20
// -----------------------------------------------------------------------=
------
=20
-FunctionPass *llvm::createGCMachineCodeAnalysisPass() {
- return new MachineCodeAnalysis();
-}
+char GCMachineCodeAnalysis::ID =3D 0;
+char &llvm::GCMachineCodeAnalysisID =3D GCMachineCodeAnalysis::ID;
=20
-char MachineCodeAnalysis::ID =3D 0;
+INITIALIZE_PASS(GCMachineCodeAnalysis, "gc-analysis",
+ "Analyze Machine Code For Garbage Collection", false, fals=
e)
=20
-MachineCodeAnalysis::MachineCodeAnalysis()
+GCMachineCodeAnalysis::GCMachineCodeAnalysis()
: MachineFunctionPass(ID) {}
=20
-const char *MachineCodeAnalysis::getPassName() const {
- return "Analyze Machine Code For Garbage Collection";
-}
-
-void MachineCodeAnalysis::getAnalysisUsage(AnalysisUsage &AU) const {
+void GCMachineCodeAnalysis::getAnalysisUsage(AnalysisUsage &AU) const {
MachineFunctionPass::getAnalysisUsage(AU);
AU.setPreservesAll();
AU.addRequired<MachineModuleInfo>();
AU.addRequired<GCModuleInfo>();
}
=20
-MCSymbol *MachineCodeAnalysis::InsertLabel(MachineBasicBlock &MBB,=20
- MachineBasicBlock::iterator MI,
- DebugLoc DL) const {
+MCSymbol *GCMachineCodeAnalysis::InsertLabel(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator M=
I,
+ DebugLoc DL) const {
MCSymbol *Label =3D MBB.getParent()->getContext().CreateTempSymbol();
BuildMI(MBB, MI, DL, TII->get(TargetOpcode::GC_LABEL)).addSym(Label);
return Label;
}
=20
-void MachineCodeAnalysis::VisitCallPoint(MachineBasicBlock::iterator CI) {
+void GCMachineCodeAnalysis::VisitCallPoint(MachineBasicBlock::iterator CI)=
{
// Find the return address (next instruction), too, so as to bracket the=
call
// instruction.
- MachineBasicBlock::iterator RAI =3D CI;=20
- ++RAI; =20
- =20
+ MachineBasicBlock::iterator RAI =3D CI;
+ ++RAI;
+
if (FI->getStrategy().needsSafePoint(GC::PreCall)) {
MCSymbol* Label =3D InsertLabel(*CI->getParent(), CI, CI->getDebugLoc(=
));
FI->addSafePoint(GC::PreCall, Label, CI->getDebugLoc());
}
- =20
+
if (FI->getStrategy().needsSafePoint(GC::PostCall)) {
MCSymbol* Label =3D InsertLabel(*CI->getParent(), RAI, CI->getDebugLoc=
());
FI->addSafePoint(GC::PostCall, Label, CI->getDebugLoc());
}
}
=20
-void MachineCodeAnalysis::FindSafePoints(MachineFunction &MF) {
+void GCMachineCodeAnalysis::FindSafePoints(MachineFunction &MF) {
for (MachineFunction::iterator BBI =3D MF.begin(),
BBE =3D MF.end(); BBI !=3D BBE; ++BBI)
for (MachineBasicBlock::iterator MI =3D BBI->begin(),
ME =3D BBI->end(); MI !=3D ME; ++MI)
- if (MI->getDesc().isCall())
+ if (MI->isCall())
VisitCallPoint(MI);
}
=20
-void MachineCodeAnalysis::FindStackOffsets(MachineFunction &MF) {
+void GCMachineCodeAnalysis::FindStackOffsets(MachineFunction &MF) {
const TargetFrameLowering *TFI =3D TM->getFrameLowering();
assert(TFI && "TargetRegisterInfo not available!");
- =20
+
for (GCFunctionInfo::roots_iterator RI =3D FI->roots_begin(),
RE =3D FI->roots_end(); RI !=3D RE; =
++RI)
RI->StackOffset =3D TFI->getFrameIndexOffset(MF, RI->Num);
}
=20
-bool MachineCodeAnalysis::runOnMachineFunction(MachineFunction &MF) {
+bool GCMachineCodeAnalysis::runOnMachineFunction(MachineFunction &MF) {
// Quick exit for functions that do not use GC.
if (!MF.getFunction()->hasGC())
return false;
- =20
+
FI =3D &getAnalysis<GCModuleInfo>().getFunctionInfo(*MF.getFunction());
if (!FI->getStrategy().needsSafePoints())
return false;
- =20
+
TM =3D &MF.getTarget();
MMI =3D &getAnalysis<MachineModuleInfo>();
TII =3D TM->getInstrInfo();
- =20
+
// Find the size of the stack frame.
FI->setFrameSize(MF.getFrameInfo()->getStackSize());
- =20
+
// Find all safe points.
- FindSafePoints(MF);
- =20
+ if (FI->getStrategy().customSafePoints()) {
+ FI->getStrategy().findCustomSafePoints(*FI, MF);
+ } else {
+ FindSafePoints(MF);
+ }
+
// Find the stack offsets for all roots.
FindStackOffsets(MF);
- =20
+
return false;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/IfConver=
sion.cpp
--- a/head/contrib/llvm/lib/CodeGen/IfConversion.cpp Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/lib/CodeGen/IfConversion.cpp Tue Apr 17 11:51:51 20=
12 +0300
@@ -62,6 +62,7 @@
STATISTIC(NumDiamonds, "Number of diamond if-conversions performed");
STATISTIC(NumIfConvBBs, "Number of if-converted blocks");
STATISTIC(NumDupBBs, "Number of duplicated blocks");
+STATISTIC(NumUnpred, "Number of true blocks of diamonds unpredicated=
");
=20
namespace {
class IfConverter : public MachineFunctionPass {
@@ -169,7 +170,6 @@
}
=20
virtual bool runOnMachineFunction(MachineFunction &MF);
- virtual const char *getPassName() const { return "If Converter"; }
=20
private:
bool ReverseBranchCondition(BBInfo &BBI);
@@ -195,7 +195,8 @@
void PredicateBlock(BBInfo &BBI,
MachineBasicBlock::iterator E,
SmallVectorImpl<MachineOperand> &Cond,
- SmallSet<unsigned, 4> &Redefs);
+ SmallSet<unsigned, 4> &Redefs,
+ SmallSet<unsigned, 4> *LaterRedefs =3D 0);
void CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
SmallVectorImpl<MachineOperand> &Cond,
SmallSet<unsigned, 4> &Redefs,
@@ -251,12 +252,12 @@
char IfConverter::ID =3D 0;
}
=20
+char &llvm::IfConverterID =3D IfConverter::ID;
+
INITIALIZE_PASS_BEGIN(IfConverter, "if-converter", "If Converter", false, =
false)
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
INITIALIZE_PASS_END(IfConverter, "if-converter", "If Converter", false, fa=
lse)
=20
-FunctionPass *llvm::createIfConverterPass() { return new IfConverter(); }
-
bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
TLI =3D MF.getTarget().getTargetLowering();
TII =3D MF.getTarget().getInstrInfo();
@@ -313,8 +314,7 @@
=20
bool RetVal =3D false;
switch (Kind) {
- default: assert(false && "Unexpected!");
- break;
+ default: llvm_unreachable("Unexpected!");
case ICSimple:
case ICSimpleFalse: {
bool isFalse =3D Kind =3D=3D ICSimpleFalse;
@@ -573,12 +573,12 @@
// blocks, move the end iterators up past any branch instructions.
while (TIE !=3D TIB) {
--TIE;
- if (!TIE->getDesc().isBranch())
+ if (!TIE->isBranch())
break;
}
while (FIE !=3D FIB) {
--FIE;
- if (!FIE->getDesc().isBranch())
+ if (!FIE->isBranch())
break;
}
=20
@@ -651,12 +651,11 @@
if (I->isDebugValue())
continue;
=20
- const MCInstrDesc &MCID =3D I->getDesc();
- if (MCID.isNotDuplicable())
+ if (I->isNotDuplicable())
BBI.CannotBeCopied =3D true;
=20
bool isPredicated =3D TII->isPredicated(I);
- bool isCondBr =3D BBI.IsBrAnalyzable && MCID.isConditionalBranch();
+ bool isCondBr =3D BBI.IsBrAnalyzable && I->isConditionalBranch();
=20
if (!isCondBr) {
if (!isPredicated) {
@@ -963,7 +962,7 @@
E =3D BB->livein_end(); I !=3D E; ++I) {
unsigned Reg =3D *I;
Redefs.insert(Reg);
- for (const unsigned *Subreg =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *Subreg =3D TRI->getSubRegisters(Reg);
*Subreg; ++Subreg)
Redefs.insert(*Subreg);
}
@@ -984,7 +983,7 @@
Defs.push_back(Reg);
else if (MO.isKill()) {
Redefs.erase(Reg);
- for (const unsigned *SR =3D TRI->getSubRegisters(Reg); *SR; ++SR)
+ for (const uint16_t *SR =3D TRI->getSubRegisters(Reg); *SR; ++SR)
Redefs.erase(*SR);
}
}
@@ -997,7 +996,7 @@
true/*IsImp*/,false/*IsKil=
l*/));
} else {
Redefs.insert(Reg);
- for (const unsigned *SR =3D TRI->getSubRegisters(Reg); *SR; ++SR)
+ for (const uint16_t *SR =3D TRI->getSubRegisters(Reg); *SR; ++SR)
Redefs.insert(*SR);
}
}
@@ -1035,7 +1034,7 @@
=20
if (Kind =3D=3D ICSimpleFalse)
if (TII->ReverseBranchCondition(Cond))
- assert(false && "Unable to reverse branch condition!");
+ llvm_unreachable("Unable to reverse branch condition!");
=20
// Initialize liveins to the first BB. These are potentiall redefined by
// predicated instructions.
@@ -1108,7 +1107,7 @@
=20
if (Kind =3D=3D ICTriangleFalse || Kind =3D=3D ICTriangleFRev)
if (TII->ReverseBranchCondition(Cond))
- assert(false && "Unable to reverse branch condition!");
+ llvm_unreachable("Unable to reverse branch condition!");
=20
if (Kind =3D=3D ICTriangleRev || Kind =3D=3D ICTriangleFRev) {
if (ReverseBranchCondition(*CvtBBI)) {
@@ -1155,7 +1154,7 @@
SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(),
CvtBBI->BrCond.end());
if (TII->ReverseBranchCondition(RevCond))
- assert(false && "Unable to reverse branch condition!");
+ llvm_unreachable("Unable to reverse branch condition!");
TII->InsertBranch(*BBI.BB, CvtBBI->FalseBB, NULL, RevCond, dl);
BBI.BB->addSuccessor(CvtBBI->FalseBB);
}
@@ -1227,7 +1226,7 @@
BBInfo *BBI2 =3D &FalseBBI;
SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.en=
d());
if (TII->ReverseBranchCondition(RevCond))
- assert(false && "Unable to reverse branch condition!");
+ llvm_unreachable("Unable to reverse branch condition!");
SmallVector<MachineOperand, 4> *Cond1 =3D &BBI.BrCond;
SmallVector<MachineOperand, 4> *Cond2 =3D &RevCond;
=20
@@ -1281,7 +1280,7 @@
BBI.BB->splice(BBI.BB->end(), BBI1->BB, BBI1->BB->begin(), DI1);
BBI2->BB->erase(BBI2->BB->begin(), DI2);
=20
- // Predicate the 'true' block after removing its branch.
+ // Remove branch from 'true' block and remove duplicated instructions.
BBI1->NonPredSize -=3D TII->RemoveBranch(*BBI1->BB);
DI1 =3D BBI1->BB->end();
for (unsigned i =3D 0; i !=3D NumDups2; ) {
@@ -1294,9 +1293,8 @@
++i;
}
BBI1->BB->erase(DI1, BBI1->BB->end());
- PredicateBlock(*BBI1, BBI1->BB->end(), *Cond1, Redefs);
=20
- // Predicate the 'false' block.
+ // Remove 'false' block branch and find the last instruction to predicat=
e.
BBI2->NonPredSize -=3D TII->RemoveBranch(*BBI2->BB);
DI2 =3D BBI2->BB->end();
while (NumDups2 !=3D 0) {
@@ -1308,6 +1306,55 @@
if (!DI2->isDebugValue())
--NumDups2;
}
+
+ // Remember which registers would later be defined by the false block.
+ // This allows us not to predicate instructions in the true block that w=
ould
+ // later be re-defined. That is, rather than
+ // subeq r0, r1, #1
+ // addne r0, r1, #1
+ // generate:
+ // sub r0, r1, #1
+ // addne r0, r1, #1
+ SmallSet<unsigned, 4> RedefsByFalse;
+ SmallSet<unsigned, 4> ExtUses;
+ if (TII->isProfitableToUnpredicate(*BBI1->BB, *BBI2->BB)) {
+ for (MachineBasicBlock::iterator FI =3D BBI2->BB->begin(); FI !=3D DI2=
; ++FI) {
+ if (FI->isDebugValue())
+ continue;
+ SmallVector<unsigned, 4> Defs;
+ for (unsigned i =3D 0, e =3D FI->getNumOperands(); i !=3D e; ++i) {
+ const MachineOperand &MO =3D FI->getOperand(i);
+ if (!MO.isReg())
+ continue;
+ unsigned Reg =3D MO.getReg();
+ if (!Reg)
+ continue;
+ if (MO.isDef()) {
+ Defs.push_back(Reg);
+ } else if (!RedefsByFalse.count(Reg)) {
+ // These are defined before ctrl flow reach the 'false' instruct=
ions.
+ // They cannot be modified by the 'true' instructions.
+ ExtUses.insert(Reg);
+ for (const uint16_t *SR =3D TRI->getSubRegisters(Reg); *SR; ++SR)
+ ExtUses.insert(*SR);
+ }
+ }
+
+ for (unsigned i =3D 0, e =3D Defs.size(); i !=3D e; ++i) {
+ unsigned Reg =3D Defs[i];
+ if (!ExtUses.count(Reg)) {
+ RedefsByFalse.insert(Reg);
+ for (const uint16_t *SR =3D TRI->getSubRegisters(Reg); *SR; ++SR)
+ RedefsByFalse.insert(*SR);
+ }
+ }
+ }
+ }
+
+ // Predicate the 'true' block.
+ PredicateBlock(*BBI1, BBI1->BB->end(), *Cond1, Redefs, &RedefsByFalse);
+
+ // Predicate the 'false' block.
PredicateBlock(*BBI2, DI2, *Cond2, Redefs);
=20
// Merge the true block into the entry of the diamond.
@@ -1319,7 +1366,7 @@
// fold the tail block in as well. Otherwise, unless it falls through to=
the
// tail, add a unconditional branch to it.
if (TailBB) {
- BBInfo TailBBI =3D BBAnalysis[TailBB->getNumber()];
+ BBInfo &TailBBI =3D BBAnalysis[TailBB->getNumber()];
bool CanMergeTail =3D !TailBBI.HasFallThrough;
// There may still be a fall-through edge from BBI1 or BBI2 to TailBB;
// check if there are any other predecessors besides those.
@@ -1356,15 +1403,49 @@
return true;
}
=20
+static bool MaySpeculate(const MachineInstr *MI,
+ SmallSet<unsigned, 4> &LaterRedefs,
+ const TargetInstrInfo *TII) {
+ bool SawStore =3D true;
+ if (!MI->isSafeToMove(TII, 0, SawStore))
+ return false;
+
+ for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
+ const MachineOperand &MO =3D MI->getOperand(i);
+ if (!MO.isReg())
+ continue;
+ unsigned Reg =3D MO.getReg();
+ if (!Reg)
+ continue;
+ if (MO.isDef() && !LaterRedefs.count(Reg))
+ return false;
+ }
+
+ return true;
+}
+
/// PredicateBlock - Predicate instructions from the start of the block to=
the
/// specified end with the specified condition.
void IfConverter::PredicateBlock(BBInfo &BBI,
MachineBasicBlock::iterator E,
SmallVectorImpl<MachineOperand> &Cond,
- SmallSet<unsigned, 4> &Redefs) {
+ SmallSet<unsigned, 4> &Redefs,
+ SmallSet<unsigned, 4> *LaterRedefs) {
+ bool AnyUnpred =3D false;
+ bool MaySpec =3D LaterRedefs !=3D 0;
for (MachineBasicBlock::iterator I =3D BBI.BB->begin(); I !=3D E; ++I) {
if (I->isDebugValue() || TII->isPredicated(I))
continue;
+ // It may be possible not to predicate an instruction if it's the 'tru=
e'
+ // side of a diamond and the 'false' side may re-define the instructio=
n's
+ // defs.
+ if (MaySpec && MaySpeculate(I, *LaterRedefs, TII)) {
+ AnyUnpred =3D true;
+ continue;
+ }
+ // If any instruction is predicated, then every instruction after it m=
ust
+ // be predicated.
+ MaySpec =3D false;
if (!TII->PredicateInstruction(I, Cond)) {
#ifndef NDEBUG
dbgs() << "Unable to predicate " << *I << "!\n";
@@ -1383,6 +1464,8 @@
BBI.NonPredSize =3D 0;
=20
++NumIfConvBBs;
+ if (AnyUnpred)
+ ++NumUnpred;
}
=20
/// CopyAndPredicateBlock - Copy and predicate instructions from source BB=
to
@@ -1395,9 +1478,8 @@
=20
for (MachineBasicBlock::iterator I =3D FromBBI.BB->begin(),
E =3D FromBBI.BB->end(); I !=3D E; ++I) {
- const MCInstrDesc &MCID =3D I->getDesc();
// Do not copy the end of the block branches.
- if (IgnoreBr && MCID.isBranch())
+ if (IgnoreBr && I->isBranch())
break;
=20
MachineInstr *MI =3D MF.CloneMachineInstr(I);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/InlineSp=
iller.cpp
--- a/head/contrib/llvm/lib/CodeGen/InlineSpiller.cpp Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/InlineSpiller.cpp Tue Apr 17 11:51:51 2=
012 +0300
@@ -14,14 +14,15 @@
=20
#define DEBUG_TYPE "regalloc"
#include "Spiller.h"
-#include "LiveRangeEdit.h"
#include "VirtRegMap.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/TinyPtrVector.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
+#include "llvm/CodeGen/LiveRangeEdit.h"
#include "llvm/CodeGen/LiveStackAnalysis.h"
#include "llvm/CodeGen/MachineDominators.h"
+#include "llvm/CodeGen/MachineInstrBundle.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
@@ -173,8 +174,7 @@
void reMaterializeAll();
=20
bool coalesceStackAccess(MachineInstr *MI, unsigned Reg);
- bool foldMemoryOperand(MachineBasicBlock::iterator MI,
- const SmallVectorImpl<unsigned> &Ops,
+ bool foldMemoryOperand(ArrayRef<std::pair<MachineInstr*, unsigned> >,
MachineInstr *LoadMI =3D 0);
void insertReload(LiveInterval &NewLI, SlotIndex,
MachineBasicBlock::iterator MI);
@@ -578,7 +578,7 @@
if (unsigned SrcReg =3D isFullCopyOf(MI, Reg)) {
if (isSibling(SrcReg)) {
LiveInterval &SrcLI =3D LIS.getInterval(SrcReg);
- LiveRange *SrcLR =3D SrcLI.getLiveRangeContaining(VNI->def.getUseI=
ndex());
+ LiveRange *SrcLR =3D SrcLI.getLiveRangeContaining(VNI->def.getRegS=
lot(true));
assert(SrcLR && "Copy from non-existing value");
// Check if this COPY kills its source.
SVI->second.KillsSource =3D (SrcLR->end =3D=3D VNI->def);
@@ -644,16 +644,18 @@
if (VNI->isUnused())
continue;
MachineInstr *DefMI =3D 0;
+ if (!VNI->isPHIDef()) {
+ DefMI =3D LIS.getInstructionFromIndex(VNI->def);
+ assert(DefMI && "No defining instruction");
+ }
// Check possible sibling copies.
- if (VNI->isPHIDef() || VNI->getCopy()) {
+ if (VNI->isPHIDef() || DefMI->isCopy()) {
VNInfo *OrigVNI =3D OrigLI.getVNInfoAt(VNI->def);
assert(OrigVNI && "Def outside original live range");
if (OrigVNI->def !=3D VNI->def)
DefMI =3D traceSiblingValue(Reg, VNI, OrigVNI);
}
- if (!DefMI && !VNI->isPHIDef())
- DefMI =3D LIS.getInstructionFromIndex(VNI->def);
- if (DefMI && Edit->checkRematerializable(VNI, DefMI, TII, AA)) {
+ if (DefMI && Edit->checkRematerializable(VNI, DefMI, AA)) {
DEBUG(dbgs() << "Value " << PrintReg(Reg) << ':' << VNI->id << '@'
<< VNI->def << " may remat from " << *DefMI);
}
@@ -665,8 +667,8 @@
/// a spill at a better location.
bool InlineSpiller::hoistSpill(LiveInterval &SpillLI, MachineInstr *CopyMI=
) {
SlotIndex Idx =3D LIS.getInstructionIndex(CopyMI);
- VNInfo *VNI =3D SpillLI.getVNInfoAt(Idx.getDefIndex());
- assert(VNI && VNI->def =3D=3D Idx.getDefIndex() && "Not defined by copy"=
);
+ VNInfo *VNI =3D SpillLI.getVNInfoAt(Idx.getRegSlot());
+ assert(VNI && VNI->def =3D=3D Idx.getRegSlot() && "Not defined by copy");
SibValueMap::iterator I =3D SibValues.find(VNI);
if (I =3D=3D SibValues.end())
return false;
@@ -726,7 +728,6 @@
MRI.getRegClass(SVI.SpillReg), &TRI);
--MII; // Point to store instruction.
LIS.InsertMachineInstrInMaps(MII);
- VRM.addSpillSlotUse(StackSlot, MII);
DEBUG(dbgs() << "\thoisted: " << SVI.SpillVNI->def << '\t' << *MII);
=20
++NumSpills;
@@ -760,7 +761,7 @@
// Find all spills and copies of VNI.
for (MachineRegisterInfo::use_nodbg_iterator UI =3D MRI.use_nodbg_begi=
n(Reg);
MachineInstr *MI =3D UI.skipInstruction();) {
- if (!MI->isCopy() && !MI->getDesc().mayStore())
+ if (!MI->isCopy() && !MI->mayStore())
continue;
SlotIndex Idx =3D LIS.getInstructionIndex(MI);
if (LI->getVNInfoAt(Idx) !=3D VNI)
@@ -770,9 +771,9 @@
if (unsigned DstReg =3D isFullCopyOf(MI, Reg)) {
if (isSibling(DstReg)) {
LiveInterval &DstLI =3D LIS.getInterval(DstReg);
- VNInfo *DstVNI =3D DstLI.getVNInfoAt(Idx.getDefIndex());
+ VNInfo *DstVNI =3D DstLI.getVNInfoAt(Idx.getRegSlot());
assert(DstVNI && "Missing defined value");
- assert(DstVNI->def =3D=3D Idx.getDefIndex() && "Wrong copy def =
slot");
+ assert(DstVNI->def =3D=3D Idx.getRegSlot() && "Wrong copy def s=
lot");
WorkList.push_back(std::make_pair(&DstLI, DstVNI));
}
continue;
@@ -811,7 +812,7 @@
MachineBasicBlock *MBB =3D LIS.getMBBFromIndex(VNI->def);
for (MachineBasicBlock::pred_iterator PI =3D MBB->pred_begin(),
PE =3D MBB->pred_end(); PI !=3D PE; ++PI) {
- VNInfo *PVNI =3D LI->getVNInfoAt(LIS.getMBBEndIdx(*PI).getPrevSlot=
());
+ VNInfo *PVNI =3D LI->getVNInfoBefore(LIS.getMBBEndIdx(*PI));
if (PVNI)
WorkList.push_back(std::make_pair(LI, PVNI));
}
@@ -824,7 +825,7 @@
continue;
LiveInterval &SnipLI =3D LIS.getInterval(MI->getOperand(1).getReg());
assert(isRegToSpill(SnipLI.reg) && "Unexpected register in copy");
- VNInfo *SnipVNI =3D SnipLI.getVNInfoAt(VNI->def.getUseIndex());
+ VNInfo *SnipVNI =3D SnipLI.getVNInfoAt(VNI->def.getRegSlot(true));
assert(SnipVNI && "Snippet undefined before copy");
WorkList.push_back(std::make_pair(&SnipLI, SnipVNI));
} while (!WorkList.empty());
@@ -833,7 +834,7 @@
/// reMaterializeFor - Attempt to rematerialize before MI instead of reloa=
ding.
bool InlineSpiller::reMaterializeFor(LiveInterval &VirtReg,
MachineBasicBlock::iterator MI) {
- SlotIndex UseIdx =3D LIS.getInstructionIndex(MI).getUseIndex();
+ SlotIndex UseIdx =3D LIS.getInstructionIndex(MI).getRegSlot(true);
VNInfo *ParentVNI =3D VirtReg.getVNInfoAt(UseIdx.getBaseIndex());
=20
if (!ParentVNI) {
@@ -855,7 +856,7 @@
SibValueMap::const_iterator SibI =3D SibValues.find(ParentVNI);
if (SibI !=3D SibValues.end())
RM.OrigMI =3D SibI->second.DefMI;
- if (!Edit->canRematerializeAt(RM, UseIdx, false, LIS)) {
+ if (!Edit->canRematerializeAt(RM, UseIdx, false)) {
markValueUsed(&VirtReg, ParentVNI);
DEBUG(dbgs() << "\tcannot remat for " << UseIdx << '\t' << *MI);
return false;
@@ -863,42 +864,37 @@
=20
// If the instruction also writes VirtReg.reg, it had better not require=
the
// same register for uses and defs.
- bool Reads, Writes;
- SmallVector<unsigned, 8> Ops;
- tie(Reads, Writes) =3D MI->readsWritesVirtualRegister(VirtReg.reg, &Ops);
- if (Writes) {
- for (unsigned i =3D 0, e =3D Ops.size(); i !=3D e; ++i) {
- MachineOperand &MO =3D MI->getOperand(Ops[i]);
- if (MO.isUse() ? MI->isRegTiedToDefOperand(Ops[i]) : MO.getSubReg())=
{
- markValueUsed(&VirtReg, ParentVNI);
- DEBUG(dbgs() << "\tcannot remat tied reg: " << UseIdx << '\t' << *=
MI);
- return false;
- }
- }
+ SmallVector<std::pair<MachineInstr*, unsigned>, 8> Ops;
+ MIBundleOperands::RegInfo RI =3D
+ MIBundleOperands(MI).analyzeVirtReg(VirtReg.reg, &Ops);
+ if (RI.Tied) {
+ markValueUsed(&VirtReg, ParentVNI);
+ DEBUG(dbgs() << "\tcannot remat tied reg: " << UseIdx << '\t' << *MI);
+ return false;
}
=20
// Before rematerializing into a register for a single instruction, try =
to
// fold a load into the instruction. That avoids allocating a new regist=
er.
- if (RM.OrigMI->getDesc().canFoldAsLoad() &&
- foldMemoryOperand(MI, Ops, RM.OrigMI)) {
+ if (RM.OrigMI->canFoldAsLoad() &&
+ foldMemoryOperand(Ops, RM.OrigMI)) {
Edit->markRematerialized(RM.ParentVNI);
++NumFoldedLoads;
return true;
}
=20
// Alocate a new register for the remat.
- LiveInterval &NewLI =3D Edit->createFrom(Original, LIS, VRM);
+ LiveInterval &NewLI =3D Edit->createFrom(Original);
NewLI.markNotSpillable();
=20
// Finally we can rematerialize OrigMI before MI.
SlotIndex DefIdx =3D Edit->rematerializeAt(*MI->getParent(), MI, NewLI.r=
eg, RM,
- LIS, TII, TRI);
+ TRI);
DEBUG(dbgs() << "\tremat: " << DefIdx << '\t'
<< *LIS.getInstructionFromIndex(DefIdx));
=20
// Replace operands
for (unsigned i =3D 0, e =3D Ops.size(); i !=3D e; ++i) {
- MachineOperand &MO =3D MI->getOperand(Ops[i]);
+ MachineOperand &MO =3D MI->getOperand(Ops[i].second);
if (MO.isReg() && MO.isUse() && MO.getReg() =3D=3D VirtReg.reg) {
MO.setReg(NewLI.reg);
MO.setIsKill();
@@ -906,8 +902,8 @@
}
DEBUG(dbgs() << "\t " << UseIdx << '\t' << *MI);
=20
- VNInfo *DefVNI =3D NewLI.getNextValue(DefIdx, 0, LIS.getVNInfoAllocator(=
));
- NewLI.addRange(LiveRange(DefIdx, UseIdx.getDefIndex(), DefVNI));
+ VNInfo *DefVNI =3D NewLI.getNextValue(DefIdx, LIS.getVNInfoAllocator());
+ NewLI.addRange(LiveRange(DefIdx, UseIdx.getRegSlot(), DefVNI));
DEBUG(dbgs() << "\tinterval: " << NewLI << '\n');
++NumRemats;
return true;
@@ -917,7 +913,7 @@
/// and trim the live ranges after.
void InlineSpiller::reMaterializeAll() {
// analyzeSiblingValues has already tested all relevant defining instruc=
tions.
- if (!Edit->anyRematerializable(LIS, TII, AA))
+ if (!Edit->anyRematerializable(AA))
return;
=20
UsedValues.clear();
@@ -929,7 +925,7 @@
LiveInterval &LI =3D LIS.getInterval(Reg);
for (MachineRegisterInfo::use_nodbg_iterator
RI =3D MRI.use_nodbg_begin(Reg);
- MachineInstr *MI =3D RI.skipInstruction();)
+ MachineInstr *MI =3D RI.skipBundle();)
anyRemat |=3D reMaterializeFor(LI, MI);
}
if (!anyRemat)
@@ -958,7 +954,7 @@
if (DeadDefs.empty())
return;
DEBUG(dbgs() << "Remat created " << DeadDefs.size() << " dead defs.\n");
- Edit->eliminateDeadDefs(DeadDefs, LIS, VRM, TII);
+ Edit->eliminateDeadDefs(DeadDefs, RegsToSpill);
=20
// Get rid of deleted and empty intervals.
for (unsigned i =3D RegsToSpill.size(); i !=3D 0; --i) {
@@ -970,7 +966,7 @@
LiveInterval &LI =3D LIS.getInterval(Reg);
if (!LI.empty())
continue;
- Edit->eraseVirtReg(Reg, LIS);
+ Edit->eraseVirtReg(Reg);
RegsToSpill.erase(RegsToSpill.begin() + (i - 1));
}
DEBUG(dbgs() << RegsToSpill.size() << " registers to spill after remat.\=
n");
@@ -1008,23 +1004,35 @@
return true;
}
=20
-/// foldMemoryOperand - Try folding stack slot references in Ops into MI.
-/// @param MI Instruction using or defining the current register.
-/// @param Ops Operand indices from readsWritesVirtualRegister().
+/// foldMemoryOperand - Try folding stack slot references in Ops into their
+/// instructions.
+///
+/// @param Ops Operand indices from analyzeVirtReg().
/// @param LoadMI Load instruction to use instead of stack slot when non-n=
ull.
-/// @return True on success, and MI will be erased.
-bool InlineSpiller::foldMemoryOperand(MachineBasicBlock::iterator MI,
- const SmallVectorImpl<unsigned> &Ops,
- MachineInstr *LoadMI) {
+/// @return True on success.
+bool InlineSpiller::
+foldMemoryOperand(ArrayRef<std::pair<MachineInstr*, unsigned> > Ops,
+ MachineInstr *LoadMI) {
+ if (Ops.empty())
+ return false;
+ // Don't attempt folding in bundles.
+ MachineInstr *MI =3D Ops.front().first;
+ if (Ops.back().first !=3D MI || MI->isBundled())
+ return false;
+
bool WasCopy =3D MI->isCopy();
+ unsigned ImpReg =3D 0;
+
// TargetInstrInfo::foldMemoryOperand only expects explicit, non-tied
// operands.
SmallVector<unsigned, 8> FoldOps;
for (unsigned i =3D 0, e =3D Ops.size(); i !=3D e; ++i) {
- unsigned Idx =3D Ops[i];
+ unsigned Idx =3D Ops[i].second;
MachineOperand &MO =3D MI->getOperand(Idx);
- if (MO.isImplicit())
+ if (MO.isImplicit()) {
+ ImpReg =3D MO.getReg();
continue;
+ }
// FIXME: Teach targets to deal with subregs.
if (MO.getSubReg())
return false;
@@ -1042,13 +1050,24 @@
if (!FoldMI)
return false;
LIS.ReplaceMachineInstrInMaps(MI, FoldMI);
- if (!LoadMI)
- VRM.addSpillSlotUse(StackSlot, FoldMI);
MI->eraseFromParent();
- DEBUG(dbgs() << "\tfolded: " << *FoldMI);
+
+ // TII.foldMemoryOperand may have left some implicit operands on the
+ // instruction. Strip them.
+ if (ImpReg)
+ for (unsigned i =3D FoldMI->getNumOperands(); i; --i) {
+ MachineOperand &MO =3D FoldMI->getOperand(i - 1);
+ if (!MO.isReg() || !MO.isImplicit())
+ break;
+ if (MO.getReg() =3D=3D ImpReg)
+ FoldMI->RemoveOperand(i - 1);
+ }
+
+ DEBUG(dbgs() << "\tfolded: " << LIS.getInstructionIndex(FoldMI) << '\t'
+ << *FoldMI);
if (!WasCopy)
++NumFolded;
- else if (Ops.front() =3D=3D 0)
+ else if (Ops.front().second =3D=3D 0)
++NumSpills;
else
++NumReloads;
@@ -1063,11 +1082,9 @@
TII.loadRegFromStackSlot(MBB, MI, NewLI.reg, StackSlot,
MRI.getRegClass(NewLI.reg), &TRI);
--MI; // Point to load instruction.
- SlotIndex LoadIdx =3D LIS.InsertMachineInstrInMaps(MI).getDefIndex();
- VRM.addSpillSlotUse(StackSlot, MI);
+ SlotIndex LoadIdx =3D LIS.InsertMachineInstrInMaps(MI).getRegSlot();
DEBUG(dbgs() << "\treload: " << LoadIdx << '\t' << *MI);
- VNInfo *LoadVNI =3D NewLI.getNextValue(LoadIdx, 0,
- LIS.getVNInfoAllocator());
+ VNInfo *LoadVNI =3D NewLI.getNextValue(LoadIdx, LIS.getVNInfoAllocator()=
);
NewLI.addRange(LiveRange(LoadIdx, Idx, LoadVNI));
++NumReloads;
}
@@ -1079,10 +1096,9 @@
TII.storeRegToStackSlot(MBB, ++MI, NewLI.reg, true, StackSlot,
MRI.getRegClass(NewLI.reg), &TRI);
--MI; // Point to store instruction.
- SlotIndex StoreIdx =3D LIS.InsertMachineInstrInMaps(MI).getDefIndex();
- VRM.addSpillSlotUse(StackSlot, MI);
+ SlotIndex StoreIdx =3D LIS.InsertMachineInstrInMaps(MI).getRegSlot();
DEBUG(dbgs() << "\tspilled: " << StoreIdx << '\t' << *MI);
- VNInfo *StoreVNI =3D NewLI.getNextValue(Idx, 0, LIS.getVNInfoAllocator()=
);
+ VNInfo *StoreVNI =3D NewLI.getNextValue(Idx, LIS.getVNInfoAllocator());
NewLI.addRange(LiveRange(Idx, StoreIdx, StoreVNI));
++NumSpills;
}
@@ -1093,8 +1109,8 @@
LiveInterval &OldLI =3D LIS.getInterval(Reg);
=20
// Iterate over instructions using Reg.
- for (MachineRegisterInfo::reg_iterator RI =3D MRI.reg_begin(Reg);
- MachineInstr *MI =3D RI.skipInstruction();) {
+ for (MachineRegisterInfo::reg_iterator RegI =3D MRI.reg_begin(Reg);
+ MachineInstr *MI =3D RegI.skipBundle();) {
=20
// Debug values are not allowed to affect codegen.
if (MI->isDebugValue()) {
@@ -1123,14 +1139,14 @@
continue;
=20
// Analyze instruction.
- bool Reads, Writes;
- SmallVector<unsigned, 8> Ops;
- tie(Reads, Writes) =3D MI->readsWritesVirtualRegister(Reg, &Ops);
+ SmallVector<std::pair<MachineInstr*, unsigned>, 8> Ops;
+ MIBundleOperands::RegInfo RI =3D
+ MIBundleOperands(MI).analyzeVirtReg(Reg, &Ops);
=20
// Find the slot index where this instruction reads and writes OldLI.
// This is usually the def slot, except for tied early clobbers.
- SlotIndex Idx =3D LIS.getInstructionIndex(MI).getDefIndex();
- if (VNInfo *VNI =3D OldLI.getVNInfoAt(Idx.getUseIndex()))
+ SlotIndex Idx =3D LIS.getInstructionIndex(MI).getRegSlot();
+ if (VNInfo *VNI =3D OldLI.getVNInfoAt(Idx.getRegSlot(true)))
if (SlotIndex::isSameInstr(Idx, VNI->def))
Idx =3D VNI->def;
=20
@@ -1143,7 +1159,7 @@
SnippetCopies.insert(MI);
continue;
}
- if (Writes) {
+ if (RI.Writes) {
// Hoist the spill of a sib-reg copy.
if (hoistSpill(OldLI, MI)) {
// This COPY is now dead, the value is already in the stack slot.
@@ -1160,24 +1176,24 @@
}
=20
// Attempt to fold memory ops.
- if (foldMemoryOperand(MI, Ops))
+ if (foldMemoryOperand(Ops))
continue;
=20
// Allocate interval around instruction.
// FIXME: Infer regclass from instruction alone.
- LiveInterval &NewLI =3D Edit->createFrom(Reg, LIS, VRM);
+ LiveInterval &NewLI =3D Edit->createFrom(Reg);
NewLI.markNotSpillable();
=20
- if (Reads)
+ if (RI.Reads)
insertReload(NewLI, Idx, MI);
=20
// Rewrite instruction operands.
bool hasLiveDef =3D false;
for (unsigned i =3D 0, e =3D Ops.size(); i !=3D e; ++i) {
- MachineOperand &MO =3D MI->getOperand(Ops[i]);
+ MachineOperand &MO =3D Ops[i].first->getOperand(Ops[i].second);
MO.setReg(NewLI.reg);
if (MO.isUse()) {
- if (!MI->isRegTiedToDefOperand(Ops[i]))
+ if (!Ops[i].first->isRegTiedToDefOperand(Ops[i].second))
MO.setIsKill();
} else {
if (!MO.isDead())
@@ -1187,15 +1203,15 @@
DEBUG(dbgs() << "\trewrite: " << Idx << '\t' << *MI);
=20
// FIXME: Use a second vreg if instruction has no tied ops.
- if (Writes) {
- if (hasLiveDef)
- insertSpill(NewLI, OldLI, Idx, MI);
- else {
- // This instruction defines a dead value. We don't need to spill i=
t,
- // but do create a live range for the dead value.
- VNInfo *VNI =3D NewLI.getNextValue(Idx, 0, LIS.getVNInfoAllocator()=
);
- NewLI.addRange(LiveRange(Idx, Idx.getNextSlot(), VNI));
- }
+ if (RI.Writes) {
+ if (hasLiveDef)
+ insertSpill(NewLI, OldLI, Idx, MI);
+ else {
+ // This instruction defines a dead value. We don't need to spill =
it,
+ // but do create a live range for the dead value.
+ VNInfo *VNI =3D NewLI.getNextValue(Idx, LIS.getVNInfoAllocator());
+ NewLI.addRange(LiveRange(Idx, Idx.getDeadSlot(), VNI));
+ }
}
=20
DEBUG(dbgs() << "\tinterval: " << NewLI << '\n');
@@ -1208,7 +1224,7 @@
if (StackSlot =3D=3D VirtRegMap::NO_STACK_SLOT) {
StackSlot =3D VRM.assignVirt2StackSlot(Original);
StackInt =3D &LSS.getOrCreateInterval(StackSlot, MRI.getRegClass(Origi=
nal));
- StackInt->getNextValue(SlotIndex(), 0, LSS.getVNInfoAllocator());
+ StackInt->getNextValue(SlotIndex(), LSS.getVNInfoAllocator());
} else
StackInt =3D &LSS.getInterval(StackSlot);
=20
@@ -1228,7 +1244,7 @@
// Hoisted spills may cause dead code.
if (!DeadDefs.empty()) {
DEBUG(dbgs() << "Eliminating " << DeadDefs.size() << " dead defs\n");
- Edit->eliminateDeadDefs(DeadDefs, LIS, VRM, TII);
+ Edit->eliminateDeadDefs(DeadDefs, RegsToSpill);
}
=20
// Finally delete the SnippetCopies.
@@ -1237,7 +1253,6 @@
MachineInstr *MI =3D RI.skipInstruction();) {
assert(SnippetCopies.count(MI) && "Remaining use wasn't a snippet co=
py");
// FIXME: Do this with a LiveRangeEdit callback.
- VRM.RemoveMachineInstrFromMaps(MI);
LIS.RemoveMachineInstrFromMaps(MI);
MI->eraseFromParent();
}
@@ -1245,7 +1260,7 @@
=20
// Delete all spilled registers.
for (unsigned i =3D 0, e =3D RegsToSpill.size(); i !=3D e; ++i)
- Edit->eraseVirtReg(RegsToSpill[i], LIS);
+ Edit->eraseVirtReg(RegsToSpill[i]);
}
=20
void InlineSpiller::spill(LiveRangeEdit &edit) {
@@ -1274,5 +1289,5 @@
if (!RegsToSpill.empty())
spillAll();
=20
- Edit->calculateRegClassAndHint(MF, LIS, Loops);
+ Edit->calculateRegClassAndHint(MF, Loops);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Interfer=
enceCache.cpp
--- a/head/contrib/llvm/lib/CodeGen/InterferenceCache.cpp Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/InterferenceCache.cpp Tue Apr 17 11:51:=
51 2012 +0300
@@ -1,4 +1,4 @@
-//=3D=3D=3D-- InterferenceCache.h - Caching per-block interference ---*- C=
++ -*--=3D=3D=3D//
+//=3D=3D=3D-- InterferenceCache.cpp - Caching per-block interference -----=
----*--=3D=3D=3D//
//
// The LLVM Compiler Infrastructure
//
@@ -15,6 +15,7 @@
#include "InterferenceCache.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Support/ErrorHandling.h"
+#include "llvm/CodeGen/LiveIntervalAnalysis.h"
=20
using namespace llvm;
=20
@@ -24,13 +25,14 @@
void InterferenceCache::init(MachineFunction *mf,
LiveIntervalUnion *liuarray,
SlotIndexes *indexes,
+ LiveIntervals *lis,
const TargetRegisterInfo *tri) {
MF =3D mf;
LIUArray =3D liuarray;
TRI =3D tri;
PhysRegEntries.assign(TRI->getNumRegs(), 0);
for (unsigned i =3D 0; i !=3D CacheEntries; ++i)
- Entries[i].clear(mf, indexes);
+ Entries[i].clear(mf, indexes, lis);
}
=20
InterferenceCache::Entry *InterferenceCache::get(unsigned PhysReg) {
@@ -78,7 +80,7 @@
PhysReg =3D physReg;
Blocks.resize(MF->getNumBlockIDs());
Aliases.clear();
- for (const unsigned *AS =3D TRI->getOverlaps(PhysReg); *AS; ++AS) {
+ for (const uint16_t *AS =3D TRI->getOverlaps(PhysReg); *AS; ++AS) {
LiveIntervalUnion *LIU =3D LIUArray + *AS;
Aliases.push_back(std::make_pair(LIU, LIU->getTag()));
}
@@ -94,7 +96,7 @@
bool InterferenceCache::Entry::valid(LiveIntervalUnion *LIUArray,
const TargetRegisterInfo *TRI) {
unsigned i =3D 0, e =3D Aliases.size();
- for (const unsigned *AS =3D TRI->getOverlaps(PhysReg); *AS; ++AS, ++i) {
+ for (const uint16_t *AS =3D TRI->getOverlaps(PhysReg); *AS; ++AS, ++i) {
LiveIntervalUnion *LIU =3D LIUArray + *AS;
if (i =3D=3D e || Aliases[i].first !=3D LIU)
return false;
@@ -121,6 +123,8 @@
=20
MachineFunction::const_iterator MFI =3D MF->getBlockNumbered(MBBNum);
BlockInterference *BI =3D &Blocks[MBBNum];
+ ArrayRef<SlotIndex> RegMaskSlots;
+ ArrayRef<const uint32_t*> RegMaskBits;
for (;;) {
BI->Tag =3D Tag;
BI->First =3D BI->Last =3D SlotIndex();
@@ -137,6 +141,18 @@
BI->First =3D StartI;
}
=20
+ // Also check for register mask interference.
+ RegMaskSlots =3D LIS->getRegMaskSlotsInBlock(MBBNum);
+ RegMaskBits =3D LIS->getRegMaskBitsInBlock(MBBNum);
+ SlotIndex Limit =3D BI->First.isValid() ? BI->First : Stop;
+ for (unsigned i =3D 0, e =3D RegMaskSlots.size();
+ i !=3D e && RegMaskSlots[i] < Limit; ++i)
+ if (MachineOperand::clobbersPhysReg(RegMaskBits[i], PhysReg)) {
+ // Register mask i clobbers PhysReg before the LIU interference.
+ BI->First =3D RegMaskSlots[i];
+ break;
+ }
+
PrevPos =3D Stop;
if (BI->First.isValid())
break;
@@ -166,4 +182,15 @@
if (Backup)
++I;
}
+
+ // Also check for register mask interference.
+ SlotIndex Limit =3D BI->Last.isValid() ? BI->Last : Start;
+ for (unsigned i =3D RegMaskSlots.size();
+ i && RegMaskSlots[i-1].getDeadSlot() > Limit; --i)
+ if (MachineOperand::clobbersPhysReg(RegMaskBits[i-1], PhysReg)) {
+ // Register mask i-1 clobbers PhysReg after the LIU interference.
+ // Model the regmask clobber as a dead def.
+ BI->Last =3D RegMaskSlots[i-1].getDeadSlot();
+ break;
+ }
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Interfer=
enceCache.h
--- a/head/contrib/llvm/lib/CodeGen/InterferenceCache.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/InterferenceCache.h Tue Apr 17 11:51:51=
2012 +0300
@@ -18,10 +18,11 @@
=20
namespace llvm {
=20
+class LiveIntervals;
+
class InterferenceCache {
const TargetRegisterInfo *TRI;
LiveIntervalUnion *LIUArray;
- SlotIndexes *Indexes;
MachineFunction *MF;
=20
/// BlockInterference - information about the interference in a single b=
asic
@@ -52,6 +53,9 @@
/// Indexes - Mapping block numbers to SlotIndex ranges.
SlotIndexes *Indexes;
=20
+ /// LIS - Used for accessing register mask interference maps.
+ LiveIntervals *LIS;
+
/// PrevPos - The previous position the iterators were moved to.
SlotIndex PrevPos;
=20
@@ -71,13 +75,14 @@
void update(unsigned MBBNum);
=20
public:
- Entry() : PhysReg(0), Tag(0), RefCount(0), Indexes(0) {}
+ Entry() : PhysReg(0), Tag(0), RefCount(0), Indexes(0), LIS(0) {}
=20
- void clear(MachineFunction *mf, SlotIndexes *indexes) {
+ void clear(MachineFunction *mf, SlotIndexes *indexes, LiveIntervals *l=
is) {
assert(!hasRefs() && "Cannot clear cache entry with references");
PhysReg =3D 0;
MF =3D mf;
Indexes =3D indexes;
+ LIS =3D lis;
}
=20
unsigned getPhysReg() const { return PhysReg; }
@@ -124,10 +129,10 @@
Entry *get(unsigned PhysReg);
=20
public:
- InterferenceCache() : TRI(0), LIUArray(0), Indexes(0), MF(0), RoundRobin=
(0) {}
+ InterferenceCache() : TRI(0), LIUArray(0), MF(0), RoundRobin(0) {}
=20
/// init - Prepare cache for a new function.
- void init(MachineFunction*, LiveIntervalUnion*, SlotIndexes*,
+ void init(MachineFunction*, LiveIntervalUnion*, SlotIndexes*, LiveInterv=
als*,
const TargetRegisterInfo *);
=20
/// getMaxCursors - Return the maximum number of concurrent cursors that=
can
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Intrinsi=
cLowering.cpp
--- a/head/contrib/llvm/lib/CodeGen/IntrinsicLowering.cpp Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/IntrinsicLowering.cpp Tue Apr 17 11:51:=
51 2012 +0300
@@ -448,11 +448,6 @@
case Intrinsic::dbg_declare:
break; // Simply strip out debugging intrinsics
=20
- case Intrinsic::eh_exception:
- case Intrinsic::eh_selector:
- CI->replaceAllUsesWith(Constant::getNullValue(CI->getType()));
- break;
-
case Intrinsic::eh_typeid_for:
// Return something different to eh_selector.
CI->replaceAllUsesWith(ConstantInt::get(CI->getType(), 1));
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/LLVMTarg=
etMachine.cpp
--- a/head/contrib/llvm/lib/CodeGen/LLVMTargetMachine.cpp Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/LLVMTargetMachine.cpp Tue Apr 17 11:51:=
51 2012 +0300
@@ -11,96 +11,31 @@
//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
-#include "llvm/Target/TargetMachine.h"
+#include "llvm/Transforms/Scalar.h"
#include "llvm/PassManager.h"
-#include "llvm/Analysis/Passes.h"
-#include "llvm/Analysis/Verifier.h"
-#include "llvm/Assembly/PrintModulePass.h"
#include "llvm/CodeGen/AsmPrinter.h"
+#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/MachineFunctionAnalysis.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
-#include "llvm/CodeGen/GCStrategy.h"
-#include "llvm/CodeGen/Passes.h"
+#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetLowering.h"
+#include "llvm/Target/TargetLoweringObjectFile.h"
+#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
+#include "llvm/Target/TargetSubtargetInfo.h"
+#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSubtargetInfo.h"
-#include "llvm/Target/TargetData.h"
-#include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Target/TargetLowering.h"
-#include "llvm/Target/TargetLoweringObjectFile.h"
-#include "llvm/Target/TargetRegisterInfo.h"
-#include "llvm/Target/TargetSubtargetInfo.h"
-#include "llvm/Transforms/Scalar.h"
#include "llvm/ADT/OwningPtr.h"
#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/Debug.h"
#include "llvm/Support/FormattedStream.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
=20
-namespace llvm {
- bool EnableFastISel;
-}
-
-static cl::opt<bool> DisablePostRA("disable-post-ra", cl::Hidden,
- cl::desc("Disable Post Regalloc"));
-static cl::opt<bool> DisableBranchFold("disable-branch-fold", cl::Hidden,
- cl::desc("Disable branch folding"));
-static cl::opt<bool> DisableTailDuplicate("disable-tail-duplicate", cl::Hi=
dden,
- cl::desc("Disable tail duplication"));
-static cl::opt<bool> DisableEarlyTailDup("disable-early-taildup", cl::Hidd=
en,
- cl::desc("Disable pre-register allocation tail duplication"));
-static cl::opt<bool> DisableCodePlace("disable-code-place", cl::Hidden,
- cl::desc("Disable code placement"));
-static cl::opt<bool> DisableSSC("disable-ssc", cl::Hidden,
- cl::desc("Disable Stack Slot Coloring"));
-static cl::opt<bool> DisableMachineDCE("disable-machine-dce", cl::Hidden,
- cl::desc("Disable Machine Dead Code Elimination"));
-static cl::opt<bool> DisableMachineLICM("disable-machine-licm", cl::Hidden,
- cl::desc("Disable Machine LICM"));
-static cl::opt<bool> DisableMachineCSE("disable-machine-cse", cl::Hidden,
- cl::desc("Disable Machine Common Subexpression Elimination"));
-static cl::opt<bool> DisablePostRAMachineLICM("disable-postra-machine-licm=
",
- cl::Hidden,
- cl::desc("Disable Machine LICM"));
-static cl::opt<bool> DisableMachineSink("disable-machine-sink", cl::Hidden,
- cl::desc("Disable Machine Sinking"));
-static cl::opt<bool> DisableLSR("disable-lsr", cl::Hidden,
- cl::desc("Disable Loop Strength Reduction Pass"));
-static cl::opt<bool> DisableCGP("disable-cgp", cl::Hidden,
- cl::desc("Disable Codegen Prepare"));
-static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
- cl::desc("Print LLVM IR produced by the loop-reduce pass"));
-static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
- cl::desc("Print LLVM IR input to isel pass"));
-static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
- cl::desc("Dump garbage collector data"));
-static cl::opt<bool> ShowMCEncoding("show-mc-encoding", cl::Hidden,
- cl::desc("Show encoding in .s output"));
-static cl::opt<bool> ShowMCInst("show-mc-inst", cl::Hidden,
- cl::desc("Show instruction structure in .s output"));
-static cl::opt<bool> EnableMCLogging("enable-mc-api-logging", cl::Hidden,
- cl::desc("Enable MC API logging"));
-static cl::opt<bool> VerifyMachineCode("verify-machineinstrs", cl::Hidden,
- cl::desc("Verify generated machine code"),
- cl::init(getenv("LLVM_VERIFY_MACHINEINSTRS")!=3DNULL));
-
-static cl::opt<cl::boolOrDefault>
-AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
- cl::init(cl::BOU_UNSET));
-
-static bool getVerboseAsm() {
- switch (AsmVerbose) {
- default:
- case cl::BOU_UNSET: return TargetMachine::getAsmVerbosityDefault();
- case cl::BOU_TRUE: return true;
- case cl::BOU_FALSE: return false;
- }
-}
-
// Enable or disable FastISel. Both options are needed, because
// FastISel is enabled by default with -fast, and we wish to be
// able to enable or disable fast-isel independently from -O0.
@@ -108,11 +43,31 @@
EnableFastISelOption("fast-isel", cl::Hidden,
cl::desc("Enable the \"fast\" instruction selector"));
=20
+static cl::opt<bool> ShowMCEncoding("show-mc-encoding", cl::Hidden,
+ cl::desc("Show encoding in .s output"));
+static cl::opt<bool> ShowMCInst("show-mc-inst", cl::Hidden,
+ cl::desc("Show instruction structure in .s output"));
+
+static cl::opt<cl::boolOrDefault>
+AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
+ cl::init(cl::BOU_UNSET));
+
+static bool getVerboseAsm() {
+ switch (AsmVerbose) {
+ case cl::BOU_UNSET: return TargetMachine::getAsmVerbosityDefault();
+ case cl::BOU_TRUE: return true;
+ case cl::BOU_FALSE: return false;
+ }
+ llvm_unreachable("Invalid verbose asm state");
+}
+
LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple,
StringRef CPU, StringRef FS,
- Reloc::Model RM, CodeModel::Model CM)
- : TargetMachine(T, Triple, CPU, FS) {
- CodeGenInfo =3D T.createMCCodeGenInfo(Triple, RM, CM);
+ TargetOptions Options,
+ Reloc::Model RM, CodeModel::Model CM,
+ CodeGenOpt::Level OL)
+ : TargetMachine(T, Triple, CPU, FS, Options) {
+ CodeGenInfo =3D T.createMCCodeGenInfo(Triple, RM, CM, OL);
AsmInfo =3D T.createMCAsmInfo(Triple);
// TargetSelect.h moved to a different directory between LLVM 2.9 and 3.=
0,
// and if the old one gets included then MCAsmInfo will be NULL and
@@ -123,16 +78,88 @@
"and that InitializeAllTargetMCs() is being invoked!");
}
=20
+/// Turn exception handling constructs into something the code generators =
can
+/// handle.
+static void addPassesToHandleExceptions(TargetMachine *TM,
+ PassManagerBase &PM) {
+ switch (TM->getMCAsmInfo()->getExceptionHandlingType()) {
+ case ExceptionHandling::SjLj:
+ // SjLj piggy-backs on dwarf for this bit. The cleanups done apply to =
both
+ // Dwarf EH prepare needs to be run after SjLj prepare. Otherwise,
+ // catch info can get misplaced when a selector ends up more than one =
block
+ // removed from the parent invoke(s). This could happen when a landing
+ // pad is shared by multiple invokes and is also a target of a normal
+ // edge from elsewhere.
+ PM.add(createSjLjEHPreparePass(TM->getTargetLowering()));
+ // FALLTHROUGH
+ case ExceptionHandling::DwarfCFI:
+ case ExceptionHandling::ARM:
+ case ExceptionHandling::Win64:
+ PM.add(createDwarfEHPass(TM));
+ break;
+ case ExceptionHandling::None:
+ PM.add(createLowerInvokePass(TM->getTargetLowering()));
+
+ // The lower invoke pass may create unreachable code. Remove it.
+ PM.add(createUnreachableBlockEliminationPass());
+ break;
+ }
+}
+
+/// addPassesToX helper drives creation and initialization of TargetPassCo=
nfig.
+static MCContext *addPassesToGenerateCode(LLVMTargetMachine *TM,
+ PassManagerBase &PM,
+ bool DisableVerify) {
+ // Targets may override createPassConfig to provide a target-specific su=
blass.
+ TargetPassConfig *PassConfig =3D TM->createPassConfig(PM);
+
+ // Set PassConfig options provided by TargetMachine.
+ PassConfig->setDisableVerify(DisableVerify);
+
+ PM.add(PassConfig);
+
+ PassConfig->addIRPasses();
+
+ addPassesToHandleExceptions(TM, PM);
+
+ PassConfig->addISelPrepare();
+
+ // Install a MachineModuleInfo class, which is an immutable pass that ho=
lds
+ // all the per-module stuff we're generating, including MCContext.
+ MachineModuleInfo *MMI =3D
+ new MachineModuleInfo(*TM->getMCAsmInfo(), *TM->getRegisterInfo(),
+ &TM->getTargetLowering()->getObjFileLowering());
+ PM.add(MMI);
+ MCContext *Context =3D &MMI->getContext(); // Return the MCContext by-re=
f.
+
+ // Set up a MachineFunction for the rest of CodeGen to work on.
+ PM.add(new MachineFunctionAnalysis(*TM));
+
+ // Enable FastISel with -fast, but allow that to be overridden.
+ if (EnableFastISelOption =3D=3D cl::BOU_TRUE ||
+ (TM->getOptLevel() =3D=3D CodeGenOpt::None &&
+ EnableFastISelOption !=3D cl::BOU_FALSE))
+ TM->setFastISel(true);
+
+ // Ask the target for an isel.
+ if (PassConfig->addInstSelector())
+ return NULL;
+
+ PassConfig->addMachinePasses();
+
+ PassConfig->setInitialized();
+
+ return Context;
+}
+
bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
formatted_raw_ostream &Out,
CodeGenFileType FileType,
- CodeGenOpt::Level OptLevel,
bool DisableVerify) {
// Add common CodeGen passes.
- MCContext *Context =3D 0;
- if (addCommonCodeGenPasses(PM, OptLevel, DisableVerify, Context))
+ MCContext *Context =3D addPassesToGenerateCode(this, PM, DisableVerify);
+ if (!Context)
return true;
- assert(Context !=3D 0 && "Failed to get MCContext");
=20
if (hasMCSaveTempLabels())
Context->setAllowTemporaryLabels(false);
@@ -142,10 +169,11 @@
OwningPtr<MCStreamer> AsmStreamer;
=20
switch (FileType) {
- default: return true;
case CGFT_AssemblyFile: {
MCInstPrinter *InstPrinter =3D
- getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI, STI);
+ getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI,
+ *getInstrInfo(),
+ Context->getRegisterInfo(), STI);
=20
// Create a code emitter if asked to show the encoding.
MCCodeEmitter *MCE =3D 0;
@@ -160,6 +188,7 @@
getVerboseAsm(),
hasMCUseLoc(),
hasMCUseCFI(),
+ hasMCUseDwarfDirectory(),
InstPrinter,
MCE, MAB,
ShowMCInst);
@@ -189,9 +218,6 @@
break;
}
=20
- if (EnableMCLogging)
- AsmStreamer.reset(createLoggingStreamer(AsmStreamer.take(), errs()));
-
// Create the AsmPrinter, which takes ownership of AsmStreamer if succes=
sful.
FunctionPass *Printer =3D getTarget().createAsmPrinter(*this, *AsmStream=
er);
if (Printer =3D=3D 0)
@@ -214,14 +240,13 @@
///
bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
JITCodeEmitter &JCE,
- CodeGenOpt::Level OptLe=
vel,
bool DisableVerify) {
// Add common CodeGen passes.
- MCContext *Ctx =3D 0;
- if (addCommonCodeGenPasses(PM, OptLevel, DisableVerify, Ctx))
+ MCContext *Context =3D addPassesToGenerateCode(this, PM, DisableVerify);
+ if (!Context)
return true;
=20
- addCodeEmitter(PM, OptLevel, JCE);
+ addCodeEmitter(PM, JCE);
PM.add(createGCInfoDeleter());
=20
return false; // success!
@@ -235,10 +260,10 @@
bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM,
MCContext *&Ctx,
raw_ostream &Out,
- CodeGenOpt::Level OptLevel,
bool DisableVerify) {
// Add common CodeGen passes.
- if (addCommonCodeGenPasses(PM, OptLevel, DisableVerify, Ctx))
+ Ctx =3D addPassesToGenerateCode(this, PM, DisableVerify);
+ if (!Ctx)
return true;
=20
if (hasMCSaveTempLabels())
@@ -247,7 +272,8 @@
// Create the code emitter for the target if it exists. If not, .o file
// emission fails.
const MCSubtargetInfo &STI =3D getSubtarget<MCSubtargetInfo>();
- MCCodeEmitter *MCE =3D getTarget().createMCCodeEmitter(*getInstrInfo(),S=
TI, *Ctx);
+ MCCodeEmitter *MCE =3D getTarget().createMCCodeEmitter(*getInstrInfo(),S=
TI,
+ *Ctx);
MCAsmBackend *MAB =3D getTarget().createMCAsmBackend(getTargetTriple());
if (MCE =3D=3D 0 || MAB =3D=3D 0)
return true;
@@ -271,227 +297,3 @@
=20
return false; // success!
}
-
-static void printNoVerify(PassManagerBase &PM, const char *Banner) {
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(dbgs(), Banner));
-}
-
-static void printAndVerify(PassManagerBase &PM,
- const char *Banner) {
- if (PrintMachineCode)
- PM.add(createMachineFunctionPrinterPass(dbgs(), Banner));
-
- if (VerifyMachineCode)
- PM.add(createMachineVerifierPass(Banner));
-}
-
-/// addCommonCodeGenPasses - Add standard LLVM codegen passes used for both
-/// emitting to assembly files or machine code output.
-///
-bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM,
- CodeGenOpt::Level OptLevel,
- bool DisableVerify,
- MCContext *&OutContext) {
- // Standard LLVM-Level Passes.
-
- // Basic AliasAnalysis support.
- // Add TypeBasedAliasAnalysis before BasicAliasAnalysis so that
- // BasicAliasAnalysis wins if they disagree. This is intended to help
- // support "obvious" type-punning idioms.
- PM.add(createTypeBasedAliasAnalysisPass());
- PM.add(createBasicAliasAnalysisPass());
-
- // Before running any passes, run the verifier to determine if the input
- // coming from the front-end and/or optimizer is valid.
- if (!DisableVerify)
- PM.add(createVerifierPass());
-
- // Run loop strength reduction before anything else.
- if (OptLevel !=3D CodeGenOpt::None && !DisableLSR) {
- PM.add(createLoopStrengthReducePass(getTargetLowering()));
- if (PrintLSR)
- PM.add(createPrintFunctionPass("\n\n*** Code after LSR ***\n", &dbgs=
()));
- }
-
- PM.add(createGCLoweringPass());
-
- // Make sure that no unreachable blocks are instruction selected.
- PM.add(createUnreachableBlockEliminationPass());
-
- // Turn exception handling constructs into something the code generators=
can
- // handle.
- switch (getMCAsmInfo()->getExceptionHandlingType()) {
- case ExceptionHandling::SjLj:
- // SjLj piggy-backs on dwarf for this bit. The cleanups done apply to =
both
- // Dwarf EH prepare needs to be run after SjLj prepare. Otherwise,
- // catch info can get misplaced when a selector ends up more than one =
block
- // removed from the parent invoke(s). This could happen when a landing
- // pad is shared by multiple invokes and is also a target of a normal
- // edge from elsewhere.
- PM.add(createSjLjEHPass(getTargetLowering()));
- // FALLTHROUGH
- case ExceptionHandling::DwarfCFI:
- case ExceptionHandling::ARM:
- case ExceptionHandling::Win64:
- PM.add(createDwarfEHPass(this));
- break;
- case ExceptionHandling::None:
- PM.add(createLowerInvokePass(getTargetLowering()));
-
- // The lower invoke pass may create unreachable code. Remove it.
- PM.add(createUnreachableBlockEliminationPass());
- break;
- }
-
- if (OptLevel !=3D CodeGenOpt::None && !DisableCGP)
- PM.add(createCodeGenPreparePass(getTargetLowering()));
-
- PM.add(createStackProtectorPass(getTargetLowering()));
-
- addPreISel(PM, OptLevel);
-
- if (PrintISelInput)
- PM.add(createPrintFunctionPass("\n\n"
- "*** Final LLVM Code input to ISel ***\=
n",
- &dbgs()));
-
- // All passes which modify the LLVM IR are now complete; run the verifier
- // to ensure that the IR is valid.
- if (!DisableVerify)
- PM.add(createVerifierPass());
-
- // Standard Lower-Level Passes.
-
- // Install a MachineModuleInfo class, which is an immutable pass that ho=
lds
- // all the per-module stuff we're generating, including MCContext.
- MachineModuleInfo *MMI =3D new MachineModuleInfo(*getMCAsmInfo(),
- *getRegisterInfo(),
- &getTargetLowering()->getObjFileLower=
ing());
- PM.add(MMI);
- OutContext =3D &MMI->getContext(); // Return the MCContext specifically =
by-ref.
-
- // Set up a MachineFunction for the rest of CodeGen to work on.
- PM.add(new MachineFunctionAnalysis(*this, OptLevel));
-
- // Enable FastISel with -fast, but allow that to be overridden.
- if (EnableFastISelOption =3D=3D cl::BOU_TRUE ||
- (OptLevel =3D=3D CodeGenOpt::None && EnableFastISelOption !=3D cl::B=
OU_FALSE))
- EnableFastISel =3D true;
-
- // Ask the target for an isel.
- if (addInstSelector(PM, OptLevel))
- return true;
-
- // Print the instruction selected machine code...
- printAndVerify(PM, "After Instruction Selection");
-
- // Expand pseudo-instructions emitted by ISel.
- PM.add(createExpandISelPseudosPass());
-
- // Pre-ra tail duplication.
- if (OptLevel !=3D CodeGenOpt::None && !DisableEarlyTailDup) {
- PM.add(createTailDuplicatePass(true));
- printAndVerify(PM, "After Pre-RegAlloc TailDuplicate");
- }
-
- // Optimize PHIs before DCE: removing dead PHI cycles may make more
- // instructions dead.
- if (OptLevel !=3D CodeGenOpt::None)
- PM.add(createOptimizePHIsPass());
-
- // If the target requests it, assign local variables to stack slots rela=
tive
- // to one another and simplify frame index references where possible.
- PM.add(createLocalStackSlotAllocationPass());
-
- if (OptLevel !=3D CodeGenOpt::None) {
- // With optimization, dead code should already be eliminated. However
- // there is one known exception: lowered code for arguments that are o=
nly
- // used by tail calls, where the tail calls reuse the incoming stack
- // arguments directly (see t11 in test/CodeGen/X86/sibcall.ll).
- if (!DisableMachineDCE)
- PM.add(createDeadMachineInstructionElimPass());
- printAndVerify(PM, "After codegen DCE pass");
-
- if (!DisableMachineLICM)
- PM.add(createMachineLICMPass());
- if (!DisableMachineCSE)
- PM.add(createMachineCSEPass());
- if (!DisableMachineSink)
- PM.add(createMachineSinkingPass());
- printAndVerify(PM, "After Machine LICM, CSE and Sinking passes");
-
- PM.add(createPeepholeOptimizerPass());
- printAndVerify(PM, "After codegen peephole optimization pass");
- }
-
- // Run pre-ra passes.
- if (addPreRegAlloc(PM, OptLevel))
- printAndVerify(PM, "After PreRegAlloc passes");
-
- // Perform register allocation.
- PM.add(createRegisterAllocator(OptLevel));
- printAndVerify(PM, "After Register Allocation");
-
- // Perform stack slot coloring and post-ra machine LICM.
- if (OptLevel !=3D CodeGenOpt::None) {
- // FIXME: Re-enable coloring with register when it's capable of adding
- // kill markers.
- if (!DisableSSC)
- PM.add(createStackSlotColoringPass(false));
-
- // Run post-ra machine LICM to hoist reloads / remats.
- if (!DisablePostRAMachineLICM)
- PM.add(createMachineLICMPass(false));
-
- printAndVerify(PM, "After StackSlotColoring and postra Machine LICM");
- }
-
- // Run post-ra passes.
- if (addPostRegAlloc(PM, OptLevel))
- printAndVerify(PM, "After PostRegAlloc passes");
-
- PM.add(createExpandPostRAPseudosPass());
- printAndVerify(PM, "After ExpandPostRAPseudos");
-
- // Insert prolog/epilog code. Eliminate abstract frame index references=
...
- PM.add(createPrologEpilogCodeInserter());
- printAndVerify(PM, "After PrologEpilogCodeInserter");
-
- // Run pre-sched2 passes.
- if (addPreSched2(PM, OptLevel))
- printAndVerify(PM, "After PreSched2 passes");
-
- // Second pass scheduler.
- if (OptLevel !=3D CodeGenOpt::None && !DisablePostRA) {
- PM.add(createPostRAScheduler(OptLevel));
- printAndVerify(PM, "After PostRAScheduler");
- }
-
- // Branch folding must be run after regalloc and prolog/epilog insertion.
- if (OptLevel !=3D CodeGenOpt::None && !DisableBranchFold) {
- PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
- printNoVerify(PM, "After BranchFolding");
- }
-
- // Tail duplication.
- if (OptLevel !=3D CodeGenOpt::None && !DisableTailDuplicate) {
- PM.add(createTailDuplicatePass(false));
- printNoVerify(PM, "After TailDuplicate");
- }
-
- PM.add(createGCMachineCodeAnalysisPass());
-
- if (PrintGCInfo)
- PM.add(createGCInfoPrinter(dbgs()));
-
- if (OptLevel !=3D CodeGenOpt::None && !DisableCodePlace) {
- PM.add(createCodePlacementOptPass());
- printNoVerify(PM, "After CodePlacementOpt");
- }
-
- if (addPreEmitPass(PM, OptLevel))
- printNoVerify(PM, "After PreEmit passes");
-
- return false;
-}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/LatencyP=
riorityQueue.cpp
--- a/head/contrib/llvm/lib/CodeGen/LatencyPriorityQueue.cpp Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/LatencyPriorityQueue.cpp Tue Apr 17 11:=
51:51 2012 +0300
@@ -46,7 +46,7 @@
=20
// Finally, just to provide a stable ordering, use the node number as a
// deciding factor.
- return LHSNum < RHSNum;
+ return RHSNum < LHSNum;
}
=20
=20
@@ -84,11 +84,11 @@
}
=20
=20
-// ScheduledNode - As nodes are scheduled, we look to see if there are any
+// scheduledNode - As nodes are scheduled, we look to see if there are any
// successor nodes that have a single unscheduled predecessor. If so, that
// single predecessor has a higher priority, since scheduling it will make
// the node available.
-void LatencyPriorityQueue::ScheduledNode(SUnit *SU) {
+void LatencyPriorityQueue::scheduledNode(SUnit *SU) {
for (SUnit::const_succ_iterator I =3D SU->Succs.begin(), E =3D SU->Succs=
.end();
I !=3D E; ++I) {
AdjustPriorityOfUnscheduledPreds(I->getSUnit());
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/LexicalS=
copes.cpp
--- a/head/contrib/llvm/lib/CodeGen/LexicalScopes.cpp Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/LexicalScopes.cpp Tue Apr 17 11:51:51 2=
012 +0300
@@ -311,6 +311,8 @@
return Result;
}
=20
+void LexicalScope::anchor() { }
+
/// dump - Print data structures.
void LexicalScope::dump() const {
#ifndef NDEBUG
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/LiveDebu=
gVariables.cpp
--- a/head/contrib/llvm/lib/CodeGen/LiveDebugVariables.cpp Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/LiveDebugVariables.cpp Tue Apr 17 11:51=
:51 2012 +0300
@@ -226,7 +226,7 @@
LiveInterval *LI, const VNInfo *VNI,
SmallVectorImpl<SlotIndex> *Kills,
LiveIntervals &LIS, MachineDominatorTree &MDT,
- UserValueScopes &UVS);
+ UserValueScopes &UVS);
=20
/// addDefsFromCopies - The value in LI/LocNo may be copies to other
/// registers. Determine if any of the copies are available at the kill
@@ -468,7 +468,7 @@
// DBG_VALUE has no slot index, use the previous instruction instead.
SlotIndex Idx =3D MBBI =3D=3D MBB->begin() ?
LIS->getMBBStartIdx(MBB) :
- LIS->getInstructionIndex(llvm::prior(MBBI)).getDefIndex();
+ LIS->getInstructionIndex(llvm::prior(MBBI)).getRegSlot();
// Handle consecutive DBG_VALUE instructions with the same slot inde=
x.
do {
if (handleDebugValue(MBBI, Idx)) {
@@ -486,7 +486,7 @@
LiveInterval *LI, const VNInfo *VNI,
SmallVectorImpl<SlotIndex> *Kills,
LiveIntervals &LIS, MachineDominatorTree &MDT,
- UserValueScopes &UVS) {
+ UserValueScopes &UVS) {
SmallVector<SlotIndex, 16> Todo;
Todo.push_back(Idx);
do {
@@ -575,15 +575,15 @@
// Is LocNo extended to reach this copy? If not, another def may be bl=
ocking
// it, or we are looking at a wrong value of LI.
SlotIndex Idx =3D LIS.getInstructionIndex(MI);
- LocMap::iterator I =3D locInts.find(Idx.getUseIndex());
+ LocMap::iterator I =3D locInts.find(Idx.getRegSlot(true));
if (!I.valid() || I.value() !=3D LocNo)
continue;
=20
if (!LIS.hasInterval(DstReg))
continue;
LiveInterval *DstLI =3D &LIS.getInterval(DstReg);
- const VNInfo *DstVNI =3D DstLI->getVNInfoAt(Idx.getDefIndex());
- assert(DstVNI && DstVNI->def =3D=3D Idx.getDefIndex() && "Bad copy val=
ue");
+ const VNInfo *DstVNI =3D DstLI->getVNInfoAt(Idx.getRegSlot());
+ assert(DstVNI && DstVNI->def =3D=3D Idx.getRegSlot() && "Bad copy valu=
e");
CopyValues.push_back(std::make_pair(DstLI, DstVNI));
}
=20
@@ -620,7 +620,7 @@
UserValue::computeIntervals(MachineRegisterInfo &MRI,
LiveIntervals &LIS,
MachineDominatorTree &MDT,
- UserValueScopes &UVS) {
+ UserValueScopes &UVS) {
SmallVector<std::pair<SlotIndex, unsigned>, 16> Defs;
=20
// Collect all defs to be extended (Skipping undefs).
@@ -841,7 +841,7 @@
UserValue::splitRegister(unsigned OldReg, ArrayRef<LiveInterval*> NewRegs)=
{
bool DidChange =3D false;
// Split locations referring to OldReg. Iterate backwards so splitLocati=
on can
- // safely erase unuused locations.
+ // safely erase unused locations.
for (unsigned i =3D locations.size(); i ; --i) {
unsigned LocNo =3D i-1;
const MachineOperand *Loc =3D &locations[LocNo];
@@ -889,8 +889,7 @@
// index is no longer available. That means the user value is in a
// non-existent sub-register, and %noreg is exactly what we want.
Loc.substPhysReg(VRM.getPhys(VirtReg), TRI);
- } else if (VRM.getStackSlot(VirtReg) !=3D VirtRegMap::NO_STACK_SLOT &&
- VRM.isSpillSlotUsed(VRM.getStackSlot(VirtReg))) {
+ } else if (VRM.getStackSlot(VirtReg) !=3D VirtRegMap::NO_STACK_SLOT) {
// FIXME: Translate SubIdx to a stackslot offset.
Loc =3D MachineOperand::CreateFI(VRM.getStackSlot(VirtReg));
} else {
@@ -921,8 +920,8 @@
}
=20
// Don't insert anything after the first terminator, though.
- return MI->getDesc().isTerminator() ? MBB->getFirstTerminator() :
- llvm::next(MachineBasicBlock::iterator=
(MI));
+ return MI->isTerminator() ? MBB->getFirstTerminator() :
+ llvm::next(MachineBasicBlock::iterator(MI));
}
=20
DebugLoc UserValue::findDebugLoc() {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/LiveInte=
rval.cpp
--- a/head/contrib/llvm/lib/CodeGen/LiveInterval.cpp Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/lib/CodeGen/LiveInterval.cpp Tue Apr 17 11:51:51 20=
12 +0300
@@ -381,37 +381,40 @@
for (unsigned i =3D 0; i !=3D NumVals; ++i) {
unsigned LHSValID =3D LHSValNoAssignments[i];
if (i !=3D LHSValID ||
- (NewVNInfo[LHSValID] && NewVNInfo[LHSValID] !=3D getValNumInfo(i)))
+ (NewVNInfo[LHSValID] && NewVNInfo[LHSValID] !=3D getValNumInfo(i))=
) {
MustMapCurValNos =3D true;
+ break;
+ }
}
=20
// If we have to apply a mapping to our base interval assignment, rewrit=
e it
// now.
if (MustMapCurValNos) {
// Map the first live range.
+
iterator OutIt =3D begin();
OutIt->valno =3D NewVNInfo[LHSValNoAssignments[OutIt->valno->id]];
- ++OutIt;
- for (iterator I =3D OutIt, E =3D end(); I !=3D E; ++I) {
- OutIt->valno =3D NewVNInfo[LHSValNoAssignments[I->valno->id]];
+ for (iterator I =3D next(OutIt), E =3D end(); I !=3D E; ++I) {
+ VNInfo* nextValNo =3D NewVNInfo[LHSValNoAssignments[I->valno->id]];
+ assert(nextValNo !=3D 0 && "Huh?");
=20
// If this live range has the same value # as its immediate predeces=
sor,
// and if they are neighbors, remove one LiveRange. This happens wh=
en we
- // have [0,3:0)[4,7:1) and map 0/1 onto the same value #.
- if (OutIt->valno =3D=3D (OutIt-1)->valno && (OutIt-1)->end =3D=3D Ou=
tIt->start) {
- (OutIt-1)->end =3D OutIt->end;
+ // have [0,4:0)[4,7:1) and map 0/1 onto the same value #.
+ if (OutIt->valno =3D=3D nextValNo && OutIt->end =3D=3D I->start) {
+ OutIt->end =3D I->end;
} else {
- if (I !=3D OutIt) {
+ // Didn't merge. Move OutIt to the next interval,
+ ++OutIt;
+ OutIt->valno =3D nextValNo;
+ if (OutIt !=3D I) {
OutIt->start =3D I->start;
OutIt->end =3D I->end;
}
-
- // Didn't merge, on to the next one.
- ++OutIt;
}
}
-
// If we merge some live ranges, chop off the end.
+ ++OutIt;
ranges.erase(OutIt, end());
}
=20
@@ -639,8 +642,6 @@
OS << "-phidef";
if (vni->hasPHIKill())
OS << "-phikill";
- if (vni->hasRedefByEC())
- OS << "-ec";
}
}
}
@@ -680,15 +681,14 @@
// Connect to values live out of predecessors.
for (MachineBasicBlock::const_pred_iterator PI =3D MBB->pred_begin(),
PE =3D MBB->pred_end(); PI !=3D PE; ++PI)
- if (const VNInfo *PVNI =3D
- LI->getVNInfoAt(LIS.getMBBEndIdx(*PI).getPrevSlot()))
+ if (const VNInfo *PVNI =3D LI->getVNInfoBefore(LIS.getMBBEndIdx(*P=
I)))
EqClass.join(VNI->id, PVNI->id);
} else {
// Normal value defined by an instruction. Check for two-addr redef.
// FIXME: This could be coincidental. Should we really check for a t=
ied
// operand constraint?
// Note that VNI->def may be a use slot for an early clobber def.
- if (const VNInfo *UVNI =3D LI->getVNInfoAt(VNI->def.getPrevSlot()))
+ if (const VNInfo *UVNI =3D LI->getVNInfoBefore(VNI->def))
EqClass.join(VNI->id, UVNI->id);
}
}
@@ -716,7 +716,7 @@
continue;
// DBG_VALUE instructions should have been eliminated earlier.
SlotIndex Idx =3D LIS.getInstructionIndex(MI);
- Idx =3D MO.isUse() ? Idx.getUseIndex() : Idx.getDefIndex();
+ Idx =3D Idx.getRegSlot(MO.isUse());
const VNInfo *VNI =3D LI.getVNInfoAt(Idx);
assert(VNI && "Interval not live at use.");
MO.setReg(LIV[getEqClass(VNI)]->reg);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/LiveInte=
rvalAnalysis.cpp
--- a/head/contrib/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Apr 17 11:=
51:51 2012 +0300
@@ -15,31 +15,22 @@
//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
-#define DEBUG_TYPE "liveintervals"
+#define DEBUG_TYPE "regalloc"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
-#include "VirtRegMap.h"
#include "llvm/Value.h"
#include "llvm/Analysis/AliasAnalysis.h"
-#include "llvm/CodeGen/CalcSpillWeights.h"
#include "llvm/CodeGen/LiveVariables.h"
-#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/CodeGen/MachineLoopInfo.h"
-#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
-#include "llvm/CodeGen/ProcessImplicitDefs.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/TargetOptions.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
-#include "llvm/ADT/DepthFirstIterator.h"
-#include "llvm/ADT/SmallSet.h"
+#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h"
#include <algorithm>
@@ -52,19 +43,14 @@
cl::init(false), cl::Hidden);
=20
STATISTIC(numIntervals , "Number of original intervals");
-STATISTIC(numFolds , "Number of loads/stores folded into instructions"=
);
-STATISTIC(numSplits , "Number of intervals split");
=20
char LiveIntervals::ID =3D 0;
INITIALIZE_PASS_BEGIN(LiveIntervals, "liveintervals",
"Live Interval Analysis", false, false)
+INITIALIZE_AG_DEPENDENCY(AliasAnalysis)
INITIALIZE_PASS_DEPENDENCY(LiveVariables)
-INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
-INITIALIZE_PASS_DEPENDENCY(PHIElimination)
-INITIALIZE_PASS_DEPENDENCY(TwoAddressInstructionPass)
-INITIALIZE_PASS_DEPENDENCY(ProcessImplicitDefs)
+INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
-INITIALIZE_AG_DEPENDENCY(AliasAnalysis)
INITIALIZE_PASS_END(LiveIntervals, "liveintervals",
"Live Interval Analysis", false, false)
=20
@@ -74,18 +60,8 @@
AU.addPreserved<AliasAnalysis>();
AU.addRequired<LiveVariables>();
AU.addPreserved<LiveVariables>();
- AU.addRequired<MachineLoopInfo>();
- AU.addPreserved<MachineLoopInfo>();
+ AU.addPreservedID(MachineLoopInfoID);
AU.addPreservedID(MachineDominatorsID);
-
- if (!StrongPHIElim) {
- AU.addPreservedID(PHIEliminationID);
- AU.addRequiredID(PHIEliminationID);
- }
-
- AU.addRequiredID(TwoAddressInstructionPassID);
- AU.addPreserved<ProcessImplicitDefs>();
- AU.addRequired<ProcessImplicitDefs>();
AU.addPreserved<SlotIndexes>();
AU.addRequiredTransitive<SlotIndexes>();
MachineFunctionPass::getAnalysisUsage(AU);
@@ -98,14 +74,12 @@
delete I->second;
=20
r2iMap_.clear();
+ RegMaskSlots.clear();
+ RegMaskBits.clear();
+ RegMaskBlocks.clear();
=20
// Release VNInfo memory regions, VNInfo objects don't need to be dtor'd.
VNInfoAllocator.Reset();
- while (!CloneMIs.empty()) {
- MachineInstr *MI =3D CloneMIs.back();
- CloneMIs.pop_back();
- mf_->DeleteMachineInstr(MI);
- }
}
=20
/// runOnMachineFunction - Register allocate the whole function
@@ -120,6 +94,7 @@
lv_ =3D &getAnalysis<LiveVariables>();
indexes_ =3D &getAnalysis<SlotIndexes>();
allocatableRegs_ =3D tri_->getAllocatableSet(fn);
+ reservedRegs_ =3D tri_->getReservedRegs(fn);
=20
computeIntervals();
=20
@@ -132,10 +107,21 @@
/// print - Implement the dump method.
void LiveIntervals::print(raw_ostream &OS, const Module* ) const {
OS << "********** INTERVALS **********\n";
- for (const_iterator I =3D begin(), E =3D end(); I !=3D E; ++I) {
- I->second->print(OS, tri_);
- OS << "\n";
- }
+
+ // Dump the physregs.
+ for (unsigned Reg =3D 1, RegE =3D tri_->getNumRegs(); Reg !=3D RegE; ++R=
eg)
+ if (const LiveInterval *LI =3D r2iMap_.lookup(Reg)) {
+ LI->print(OS, tri_);
+ OS << '\n';
+ }
+
+ // Dump the virtregs.
+ for (unsigned Reg =3D 0, RegE =3D mri_->getNumVirtRegs(); Reg !=3D RegE;=
++Reg)
+ if (const LiveInterval *LI =3D
+ r2iMap_.lookup(TargetRegisterInfo::index2VirtReg(Reg))) {
+ LI->print(OS, tri_);
+ OS << '\n';
+ }
=20
printInstrs(OS);
}
@@ -149,103 +135,6 @@
printInstrs(dbgs());
}
=20
-bool LiveIntervals::conflictsWithPhysReg(const LiveInterval &li,
- VirtRegMap &vrm, unsigned reg) {
- // We don't handle fancy stuff crossing basic block boundaries
- if (li.ranges.size() !=3D 1)
- return true;
- const LiveRange &range =3D li.ranges.front();
- SlotIndex idx =3D range.start.getBaseIndex();
- SlotIndex end =3D range.end.getPrevSlot().getBaseIndex().getNextIndex();
-
- // Skip deleted instructions
- MachineInstr *firstMI =3D getInstructionFromIndex(idx);
- while (!firstMI && idx !=3D end) {
- idx =3D idx.getNextIndex();
- firstMI =3D getInstructionFromIndex(idx);
- }
- if (!firstMI)
- return false;
-
- // Find last instruction in range
- SlotIndex lastIdx =3D end.getPrevIndex();
- MachineInstr *lastMI =3D getInstructionFromIndex(lastIdx);
- while (!lastMI && lastIdx !=3D idx) {
- lastIdx =3D lastIdx.getPrevIndex();
- lastMI =3D getInstructionFromIndex(lastIdx);
- }
- if (!lastMI)
- return false;
-
- // Range cannot cross basic block boundaries or terminators
- MachineBasicBlock *MBB =3D firstMI->getParent();
- if (MBB !=3D lastMI->getParent() || lastMI->getDesc().isTerminator())
- return true;
-
- MachineBasicBlock::const_iterator E =3D lastMI;
- ++E;
- for (MachineBasicBlock::const_iterator I =3D firstMI; I !=3D E; ++I) {
- const MachineInstr &MI =3D *I;
-
- // Allow copies to and from li.reg
- if (MI.isCopy())
- if (MI.getOperand(0).getReg() =3D=3D li.reg ||
- MI.getOperand(1).getReg() =3D=3D li.reg)
- continue;
-
- // Check for operands using reg
- for (unsigned i =3D 0, e =3D MI.getNumOperands(); i !=3D e; ++i) {
- const MachineOperand& mop =3D MI.getOperand(i);
- if (!mop.isReg())
- continue;
- unsigned PhysReg =3D mop.getReg();
- if (PhysReg =3D=3D 0 || PhysReg =3D=3D li.reg)
- continue;
- if (TargetRegisterInfo::isVirtualRegister(PhysReg)) {
- if (!vrm.hasPhys(PhysReg))
- continue;
- PhysReg =3D vrm.getPhys(PhysReg);
- }
- if (PhysReg && tri_->regsOverlap(PhysReg, reg))
- return true;
- }
- }
-
- // No conflicts found.
- return false;
-}
-
-bool LiveIntervals::conflictsWithAliasRef(LiveInterval &li, unsigned Reg,
- SmallPtrSet<MachineInstr*,32> &JoinedCop=
ies) {
- for (LiveInterval::Ranges::const_iterator
- I =3D li.ranges.begin(), E =3D li.ranges.end(); I !=3D E; ++I) {
- for (SlotIndex index =3D I->start.getBaseIndex(),
- end =3D I->end.getPrevSlot().getBaseIndex().getNextIndex();
- index !=3D end;
- index =3D index.getNextIndex()) {
- MachineInstr *MI =3D getInstructionFromIndex(index);
- if (!MI)
- continue; // skip deleted instructions
-
- if (JoinedCopies.count(MI))
- continue;
- for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
- MachineOperand& MO =3D MI->getOperand(i);
- if (!MO.isReg())
- continue;
- unsigned PhysReg =3D MO.getReg();
- if (PhysReg =3D=3D 0 || PhysReg =3D=3D Reg ||
- TargetRegisterInfo::isVirtualRegister(PhysReg))
- continue;
- if (tri_->regsOverlap(Reg, PhysReg))
- return true;
- }
- }
- }
-
- return false;
-}
-
static
bool MultipleDefsBySameMI(const MachineInstr &MI, unsigned MOIdx) {
unsigned Reg =3D MI.getOperand(MOIdx).getReg();
@@ -271,9 +160,9 @@
if (!MO.getSubReg() || MO.isEarlyClobber())
return false;
=20
- SlotIndex RedefIndex =3D MIIdx.getDefIndex();
+ SlotIndex RedefIndex =3D MIIdx.getRegSlot();
const LiveRange *OldLR =3D
- interval.getLiveRangeContaining(RedefIndex.getUseIndex());
+ interval.getLiveRangeContaining(RedefIndex.getRegSlot(true));
MachineInstr *DefMI =3D getInstructionFromIndex(OldLR->valno->def);
if (DefMI !=3D 0) {
return DefMI->findRegisterDefOperandIdx(interval.reg) !=3D -1;
@@ -296,34 +185,13 @@
LiveVariables::VarInfo& vi =3D lv_->getVarInfo(interval.reg);
if (interval.empty()) {
// Get the Idx of the defining instructions.
- SlotIndex defIndex =3D MIIdx.getDefIndex();
- // Earlyclobbers move back one, so that they overlap the live range
- // of inputs.
- if (MO.isEarlyClobber())
- defIndex =3D MIIdx.getUseIndex();
+ SlotIndex defIndex =3D MIIdx.getRegSlot(MO.isEarlyClobber());
=20
- // Make sure the first definition is not a partial redefinition. Add an
- // <imp-def> of the full register.
- // FIXME: LiveIntervals shouldn't modify the code like this. Whoever
- // created the machine instruction should annotate it with <undef> fla=
gs
- // as needed. Then we can simply assert here. The REG_SEQUENCE lower=
ing
- // is the main suspect.
- if (MO.getSubReg()) {
- mi->addRegisterDefined(interval.reg);
- // Mark all defs of interval.reg on this instruction as reading <und=
ef>.
- for (unsigned i =3D MOIdx, e =3D mi->getNumOperands(); i !=3D e; ++i=
) {
- MachineOperand &MO2 =3D mi->getOperand(i);
- if (MO2.isReg() && MO2.getReg() =3D=3D interval.reg && MO2.getSubR=
eg())
- MO2.setIsUndef();
- }
- }
+ // Make sure the first definition is not a partial redefinition.
+ assert(!MO.readsReg() && "First def cannot also read virtual register "
+ "missing <undef> flag?");
=20
- MachineInstr *CopyMI =3D NULL;
- if (mi->isCopyLike()) {
- CopyMI =3D mi;
- }
-
- VNInfo *ValNo =3D interval.getNextValue(defIndex, CopyMI, VNInfoAlloca=
tor);
+ VNInfo *ValNo =3D interval.getNextValue(defIndex, VNInfoAllocator);
assert(ValNo->id =3D=3D 0 && "First value in interval is not 0?");
=20
// Loop over all of the blocks that the vreg is defined in. There are
@@ -334,9 +202,9 @@
// FIXME: what about dead vars?
SlotIndex killIdx;
if (vi.Kills[0] !=3D mi)
- killIdx =3D getInstructionIndex(vi.Kills[0]).getDefIndex();
+ killIdx =3D getInstructionIndex(vi.Kills[0]).getRegSlot();
else
- killIdx =3D defIndex.getStoreIndex();
+ killIdx =3D defIndex.getDeadSlot();
=20
// If the kill happens after the definition, we have an intra-block
// live range.
@@ -384,14 +252,14 @@
for (unsigned i =3D 0, e =3D vi.Kills.size(); i !=3D e; ++i) {
MachineInstr *Kill =3D vi.Kills[i];
SlotIndex Start =3D getMBBStartIdx(Kill->getParent());
- SlotIndex killIdx =3D getInstructionIndex(Kill).getDefIndex();
+ SlotIndex killIdx =3D getInstructionIndex(Kill).getRegSlot();
=20
// Create interval with one of a NEW value number. Note that this v=
alue
// number isn't actually defined by an instruction, weird huh? :)
if (PHIJoin) {
assert(getInstructionFromIndex(Start) =3D=3D 0 &&
"PHI def index points at actual instruction.");
- ValNo =3D interval.getNextValue(Start, 0, VNInfoAllocator);
+ ValNo =3D interval.getNextValue(Start, VNInfoAllocator);
ValNo->setIsPHIDef(true);
}
LiveRange LR(Start, killIdx, ValNo);
@@ -422,14 +290,12 @@
// are actually two values in the live interval. Because of this we
// need to take the LiveRegion that defines this register and split =
it
// into two values.
- SlotIndex RedefIndex =3D MIIdx.getDefIndex();
- if (MO.isEarlyClobber())
- RedefIndex =3D MIIdx.getUseIndex();
+ SlotIndex RedefIndex =3D MIIdx.getRegSlot(MO.isEarlyClobber());
=20
const LiveRange *OldLR =3D
- interval.getLiveRangeContaining(RedefIndex.getUseIndex());
+ interval.getLiveRangeContaining(RedefIndex.getRegSlot(true));
VNInfo *OldValNo =3D OldLR->valno;
- SlotIndex DefIndex =3D OldValNo->def.getDefIndex();
+ SlotIndex DefIndex =3D OldValNo->def.getRegSlot();
=20
// Delete the previous value, which should be short and continuous,
// because the 2-addr copy must be in the same MBB as the redef.
@@ -440,12 +306,7 @@
VNInfo *ValNo =3D interval.createValueCopy(OldValNo, VNInfoAllocator=
);
=20
// Value#0 is now defined by the 2-addr instruction.
- OldValNo->def =3D RedefIndex;
- OldValNo->setCopy(0);
-
- // A re-def may be a copy. e.g. %reg1030:6<def> =3D VMOVD %reg1026, =
...
- if (PartReDef && mi->isCopyLike())
- OldValNo->setCopy(&*mi);
+ OldValNo->def =3D RedefIndex;
=20
// Add the new live interval which replaces the range for the input =
copy.
LiveRange LR(DefIndex, RedefIndex, ValNo);
@@ -455,7 +316,7 @@
// If this redefinition is dead, we need to add a dummy unit live
// range covering the def slot.
if (MO.isDead())
- interval.addRange(LiveRange(RedefIndex, RedefIndex.getStoreIndex(),
+ interval.addRange(LiveRange(RedefIndex, RedefIndex.getDeadSlot(),
OldValNo));
=20
DEBUG({
@@ -467,15 +328,11 @@
// live until the end of the block. We've already taken care of the
// rest of the live range.
=20
- SlotIndex defIndex =3D MIIdx.getDefIndex();
+ SlotIndex defIndex =3D MIIdx.getRegSlot();
if (MO.isEarlyClobber())
- defIndex =3D MIIdx.getUseIndex();
+ defIndex =3D MIIdx.getRegSlot(true);
=20
- VNInfo *ValNo;
- MachineInstr *CopyMI =3D NULL;
- if (mi->isCopyLike())
- CopyMI =3D mi;
- ValNo =3D interval.getNextValue(defIndex, CopyMI, VNInfoAllocator);
+ VNInfo *ValNo =3D interval.getNextValue(defIndex, VNInfoAllocator);
=20
SlotIndex killIndex =3D getMBBEndIdx(mbb);
LiveRange LR(defIndex, killIndex, ValNo);
@@ -490,21 +347,26 @@
DEBUG(dbgs() << '\n');
}
=20
+static bool isRegLiveIntoSuccessor(const MachineBasicBlock *MBB, unsigned =
Reg) {
+ for (MachineBasicBlock::const_succ_iterator SI =3D MBB->succ_begin(),
+ SE =3D MBB->succ_end();
+ SI !=3D SE; ++SI) {
+ const MachineBasicBlock* succ =3D *SI;
+ if (succ->isLiveIn(Reg))
+ return true;
+ }
+ return false;
+}
+
void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
MachineBasicBlock::iterator =
mi,
SlotIndex MIIdx,
MachineOperand& MO,
- LiveInterval &interval,
- MachineInstr *CopyMI) {
- // A physical register cannot be live across basic block, so its
- // lifetime must end somewhere in its defining basic block.
+ LiveInterval &interval) {
DEBUG(dbgs() << "\t\tregister: " << PrintReg(interval.reg, tri_));
=20
SlotIndex baseIndex =3D MIIdx;
- SlotIndex start =3D baseIndex.getDefIndex();
- // Earlyclobbers move back one.
- if (MO.isEarlyClobber())
- start =3D MIIdx.getUseIndex();
+ SlotIndex start =3D baseIndex.getRegSlot(MO.isEarlyClobber());
SlotIndex end =3D start;
=20
// If it is not used after definition, it is considered dead at
@@ -514,7 +376,7 @@
// advance below compensates.
if (MO.isDead()) {
DEBUG(dbgs() << " dead");
- end =3D start.getStoreIndex();
+ end =3D start.getDeadSlot();
goto exit;
}
=20
@@ -531,21 +393,21 @@
=20
if (mi->killsRegister(interval.reg, tri_)) {
DEBUG(dbgs() << " killed");
- end =3D baseIndex.getDefIndex();
+ end =3D baseIndex.getRegSlot();
goto exit;
} else {
int DefIdx =3D mi->findRegisterDefOperandIdx(interval.reg,false,fals=
e,tri_);
if (DefIdx !=3D -1) {
if (mi->isRegTiedToUseOperand(DefIdx)) {
// Two-address instruction.
- end =3D baseIndex.getDefIndex();
+ end =3D baseIndex.getRegSlot(mi->getOperand(DefIdx).isEarlyClobb=
er());
} else {
// Another instruction redefines the register before it is ever =
read.
// Then the register is essentially dead at the instruction that
// defines it. Hence its interval is:
// [defSlot(def), defSlot(def)+1)
DEBUG(dbgs() << " dead");
- end =3D start.getStoreIndex();
+ end =3D start.getDeadSlot();
}
goto exit;
}
@@ -554,12 +416,19 @@
baseIndex =3D baseIndex.getNextIndex();
}
=20
- // The only case we should have a dead physreg here without a killing or
- // instruction where we know it's dead is if it is live-in to the functi=
on
- // and never used. Another possible case is the implicit use of the
- // physical register has been deleted by two-address pass.
- end =3D start.getStoreIndex();
+ // If we get here the register *should* be live out.
+ assert(!isAllocatable(interval.reg) && "Physregs shouldn't be live out!"=
);
=20
+ // FIXME: We need saner rules for reserved regs.
+ if (isReserved(interval.reg)) {
+ end =3D start.getDeadSlot();
+ } else {
+ // Unreserved, unallocable registers like EFLAGS can be live across ba=
sic
+ // block boundaries.
+ assert(isRegLiveIntoSuccessor(MBB, interval.reg) &&
+ "Unreserved reg not live-out?");
+ end =3D getMBBEndIdx(MBB);
+ }
exit:
assert(start < end && "did not find end of interval?");
=20
@@ -567,9 +436,7 @@
VNInfo *ValNo =3D interval.getVNInfoAt(start);
bool Extend =3D ValNo !=3D 0;
if (!Extend)
- ValNo =3D interval.getNextValue(start, CopyMI, VNInfoAllocator);
- if (Extend && MO.isEarlyClobber())
- ValNo->setHasRedefByEC(true);
+ ValNo =3D interval.getNextValue(start, VNInfoAllocator);
LiveRange LR(start, end, ValNo);
interval.addRange(LR);
DEBUG(dbgs() << " +" << LR << '\n');
@@ -583,18 +450,20 @@
if (TargetRegisterInfo::isVirtualRegister(MO.getReg()))
handleVirtualRegisterDef(MBB, MI, MIIdx, MO, MOIdx,
getOrCreateInterval(MO.getReg()));
- else {
- MachineInstr *CopyMI =3D NULL;
- if (MI->isCopyLike())
- CopyMI =3D MI;
+ else
handlePhysicalRegisterDef(MBB, MI, MIIdx, MO,
- getOrCreateInterval(MO.getReg()), CopyMI);
- }
+ getOrCreateInterval(MO.getReg()));
}
=20
void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
SlotIndex MIIdx,
- LiveInterval &interval, bool isAl=
ias) {
+ LiveInterval &interval) {
+ assert(TargetRegisterInfo::isPhysicalRegister(interval.reg) &&
+ "Only physical registers can be live in.");
+ assert((!isAllocatable(interval.reg) || MBB->getParent()->begin() ||
+ MBB->isLandingPad()) &&
+ "Allocatable live-ins only valid for entry blocks and landing pa=
ds.");
+
DEBUG(dbgs() << "\t\tlivein register: " << PrintReg(interval.reg, tri_));
=20
// Look for kills, if it reaches a def before it's killed, then it shoul=
dn't
@@ -621,16 +490,16 @@
while (mi !=3D E) {
if (mi->killsRegister(interval.reg, tri_)) {
DEBUG(dbgs() << " killed");
- end =3D baseIndex.getDefIndex();
+ end =3D baseIndex.getRegSlot();
SeenDefUse =3D true;
break;
- } else if (mi->definesRegister(interval.reg, tri_)) {
+ } else if (mi->modifiesRegister(interval.reg, tri_)) {
// Another instruction redefines the register before it is ever read.
// Then the register is essentially dead at the instruction that def=
ines
// it. Hence its interval is:
// [defSlot(def), defSlot(def)+1)
DEBUG(dbgs() << " dead");
- end =3D start.getStoreIndex();
+ end =3D start.getDeadSlot();
SeenDefUse =3D true;
break;
}
@@ -644,10 +513,16 @@
=20
// Live-in register might not be used at all.
if (!SeenDefUse) {
- if (isAlias) {
+ if (isAllocatable(interval.reg) ||
+ !isRegLiveIntoSuccessor(MBB, interval.reg)) {
+ // Allocatable registers are never live through.
+ // Non-allocatable registers that aren't live into any successors al=
so
+ // aren't live through.
DEBUG(dbgs() << " dead");
- end =3D MIIdx.getStoreIndex();
+ return;
} else {
+ // If we get here the register is non-allocatable and live into some
+ // successor. We'll conservatively assume it's live-through.
DEBUG(dbgs() << " live through");
end =3D getMBBEndIdx(MBB);
}
@@ -656,8 +531,7 @@
SlotIndex defIdx =3D getMBBStartIdx(MBB);
assert(getInstructionFromIndex(defIdx) =3D=3D 0 &&
"PHI def index points at actual instruction.");
- VNInfo *vni =3D
- interval.getNextValue(defIdx, 0, VNInfoAllocator);
+ VNInfo *vni =3D interval.getNextValue(defIdx, VNInfoAllocator);
vni->setIsPHIDef(true);
LiveRange LR(start, end, vni);
=20
@@ -674,10 +548,14 @@
<< "********** Function: "
<< ((Value*)mf_->getFunction())->getName() << '\n');
=20
+ RegMaskBlocks.resize(mf_->getNumBlockIDs());
+
SmallVector<unsigned, 8> UndefUses;
for (MachineFunction::iterator MBBI =3D mf_->begin(), E =3D mf_->end();
MBBI !=3D E; ++MBBI) {
MachineBasicBlock *MBB =3D MBBI;
+ RegMaskBlocks[MBB->getNumber()].first =3D RegMaskSlots.size();
+
if (MBB->empty())
continue;
=20
@@ -690,11 +568,6 @@
for (MachineBasicBlock::livein_iterator LI =3D MBB->livein_begin(),
LE =3D MBB->livein_end(); LI !=3D LE; ++LI) {
handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*LI));
- // Multiple live-ins can alias the same register.
- for (const unsigned* AS =3D tri_->getSubRegisters(*LI); *AS; ++AS)
- if (!hasInterval(*AS))
- handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*AS),
- true);
}
=20
// Skip over empty initial indices.
@@ -706,10 +579,20 @@
DEBUG(dbgs() << MIIndex << "\t" << *MI);
if (MI->isDebugValue())
continue;
+ assert(indexes_->getInstructionFromIndex(MIIndex) =3D=3D MI &&
+ "Lost SlotIndex synchronization");
=20
// Handle defs.
for (int i =3D MI->getNumOperands() - 1; i >=3D 0; --i) {
MachineOperand &MO =3D MI->getOperand(i);
+
+ // Collect register masks.
+ if (MO.isRegMask()) {
+ RegMaskSlots.push_back(MIIndex.getRegSlot());
+ RegMaskBits.push_back(MO.getRegMask());
+ continue;
+ }
+
if (!MO.isReg() || !MO.getReg())
continue;
=20
@@ -723,6 +606,10 @@
// Move to the next instr slot.
MIIndex =3D indexes_->getNextNonNullIndex(MIIndex);
}
+
+ // Compute the number of register mask instructions in this block.
+ std::pair<unsigned, unsigned> &RMB =3D RegMaskBlocks[MBB->getNumber()];
+ RMB.second =3D RegMaskSlots.size() - RMB.first;;
}
=20
// Create empty intervals for registers defined by implicit_def's (except
@@ -754,7 +641,7 @@
SmallVectorImpl<MachineInstr*> *dead) {
DEBUG(dbgs() << "Shrink: " << *li << '\n');
assert(TargetRegisterInfo::isVirtualRegister(li->reg)
- && "Can't only shrink physical registers");
+ && "Can only shrink virtual registers");
// Find all the values used, including PHI kills.
SmallVector<std::pair<SlotIndex, VNInfo*>, 16> WorkList;
=20
@@ -766,8 +653,10 @@
MachineInstr *UseMI =3D I.skipInstruction();) {
if (UseMI->isDebugValue() || !UseMI->readsVirtualRegister(li->reg))
continue;
- SlotIndex Idx =3D getInstructionIndex(UseMI).getUseIndex();
- VNInfo *VNI =3D li->getVNInfoAt(Idx);
+ SlotIndex Idx =3D getInstructionIndex(UseMI).getRegSlot();
+ // Note: This intentionally picks up the wrong VNI in case of an EC re=
def.
+ // See below.
+ VNInfo *VNI =3D li->getVNInfoBefore(Idx);
if (!VNI) {
// This shouldn't happen: readsVirtualRegister returns true, but the=
re is
// no live value. It is likely caused by a target getting <undef> fl=
ags
@@ -777,11 +666,12 @@
<< *li << '\n');
continue;
}
- if (VNI->def =3D=3D Idx) {
- // Special case: An early-clobber tied operand reads and writes the
- // register one slot early.
- Idx =3D Idx.getPrevSlot();
- VNI =3D li->getVNInfoAt(Idx);
+ // Special case: An early-clobber tied operand reads and writes the
+ // register one slot early. The getVNInfoBefore call above would have
+ // picked up the value defined by UseMI. Adjust the kill slot and val=
ue.
+ if (SlotIndex::isSameInstr(VNI->def, Idx)) {
+ Idx =3D VNI->def;
+ VNI =3D li->getVNInfoBefore(Idx);
assert(VNI && "Early-clobber tied value not available");
}
WorkList.push_back(std::make_pair(Idx, VNI));
@@ -794,14 +684,7 @@
VNInfo *VNI =3D *I;
if (VNI->isUnused())
continue;
- NewLI.addRange(LiveRange(VNI->def, VNI->def.getNextSlot(), VNI));
-
- // A use tied to an early-clobber def ends at the load slot and isn't =
caught
- // above. Catch it here instead. This probably only ever happens for i=
nline
- // assembly.
- if (VNI->def.isUse())
- if (VNInfo *UVNI =3D li->getVNInfoAt(VNI->def.getLoadIndex()))
- WorkList.push_back(std::make_pair(VNI->def.getLoadIndex(), UVNI));
+ NewLI.addRange(LiveRange(VNI->def, VNI->def.getDeadSlot(), VNI));
}
=20
// Keep track of the PHIs that are in use.
@@ -812,11 +695,11 @@
SlotIndex Idx =3D WorkList.back().first;
VNInfo *VNI =3D WorkList.back().second;
WorkList.pop_back();
- const MachineBasicBlock *MBB =3D getMBBFromIndex(Idx);
+ const MachineBasicBlock *MBB =3D getMBBFromIndex(Idx.getPrevSlot());
SlotIndex BlockStart =3D getMBBStartIdx(MBB);
=20
// Extend the live range for VNI to be live at Idx.
- if (VNInfo *ExtVNI =3D NewLI.extendInBlock(BlockStart, Idx.getNextSlot=
())) {
+ if (VNInfo *ExtVNI =3D NewLI.extendInBlock(BlockStart, Idx)) {
(void)ExtVNI;
assert(ExtVNI =3D=3D VNI && "Unexpected existing value number");
// Is this a PHIDef we haven't seen before?
@@ -827,9 +710,9 @@
PE =3D MBB->pred_end(); PI !=3D PE; ++PI) {
if (!LiveOut.insert(*PI))
continue;
- SlotIndex Stop =3D getMBBEndIdx(*PI).getPrevSlot();
+ SlotIndex Stop =3D getMBBEndIdx(*PI);
// A predecessor is not required to have a live-out value for a PH=
I.
- if (VNInfo *PVNI =3D li->getVNInfoAt(Stop))
+ if (VNInfo *PVNI =3D li->getVNInfoBefore(Stop))
WorkList.push_back(std::make_pair(Stop, PVNI));
}
continue;
@@ -837,15 +720,16 @@
=20
// VNI is live-in to MBB.
DEBUG(dbgs() << " live-in at " << BlockStart << '\n');
- NewLI.addRange(LiveRange(BlockStart, Idx.getNextSlot(), VNI));
+ NewLI.addRange(LiveRange(BlockStart, Idx, VNI));
=20
// Make sure VNI is live-out from the predecessors.
for (MachineBasicBlock::const_pred_iterator PI =3D MBB->pred_begin(),
PE =3D MBB->pred_end(); PI !=3D PE; ++PI) {
if (!LiveOut.insert(*PI))
continue;
- SlotIndex Stop =3D getMBBEndIdx(*PI).getPrevSlot();
- assert(li->getVNInfoAt(Stop) =3D=3D VNI && "Wrong value out of prede=
cessor");
+ SlotIndex Stop =3D getMBBEndIdx(*PI);
+ assert(li->getVNInfoBefore(Stop) =3D=3D VNI &&
+ "Wrong value out of predecessor");
WorkList.push_back(std::make_pair(Stop, VNI));
}
}
@@ -859,7 +743,7 @@
continue;
LiveInterval::iterator LII =3D NewLI.FindLiveRangeContaining(VNI->def);
assert(LII !=3D NewLI.end() && "Missing live range for PHI");
- if (LII->end !=3D VNI->def.getNextSlot())
+ if (LII->end !=3D VNI->def.getDeadSlot())
continue;
if (VNI->isPHIDef()) {
// This is a dead PHI. Remove it.
@@ -890,28 +774,6 @@
// Register allocator hooks.
//
=20
-MachineBasicBlock::iterator
-LiveIntervals::getLastSplitPoint(const LiveInterval &li,
- MachineBasicBlock *mbb) const {
- const MachineBasicBlock *lpad =3D mbb->getLandingPadSuccessor();
-
- // If li is not live into a landing pad, we can insert spill code before=
the
- // first terminator.
- if (!lpad || !isLiveInToMBB(li, lpad))
- return mbb->getFirstTerminator();
-
- // When there is a landing pad, spill code must go before the call instr=
uction
- // that can throw.
- MachineBasicBlock::iterator I =3D mbb->end(), B =3D mbb->begin();
- while (I !=3D B) {
- --I;
- if (I->getDesc().isCall())
- return I;
- }
- // The block contains no calls that can throw, so use the first terminat=
or.
- return mbb->getFirstTerminator();
-}
-
void LiveIntervals::addKillFlags() {
for (iterator I =3D begin(), E =3D end(); I !=3D E; ++I) {
unsigned Reg =3D I->first;
@@ -924,8 +786,8 @@
// Every instruction that kills Reg corresponds to a live range end po=
int.
for (LiveInterval::iterator RI =3D LI->begin(), RE =3D LI->end(); RI !=
=3D RE;
++RI) {
- // A LOAD index indicates an MBB edge.
- if (RI->end.isLoad())
+ // A block index indicates an MBB edge.
+ if (RI->end.isBlock())
continue;
MachineInstr *MI =3D getInstructionFromIndex(RI->end);
if (!MI)
@@ -949,16 +811,10 @@
if (Reg =3D=3D 0 || Reg =3D=3D li.reg)
continue;
=20
- if (TargetRegisterInfo::isPhysicalRegister(Reg) &&
- !allocatableRegs_[Reg])
+ if (TargetRegisterInfo::isPhysicalRegister(Reg) && !isAllocatable(Reg))
continue;
- // FIXME: For now, only remat MI with at most one register operand.
- assert(!RegOp &&
- "Can't rematerialize instruction with multiple register operand=
!");
RegOp =3D MO.getReg();
-#ifndef NDEBUG
- break;
-#endif
+ break; // Found vreg operand - leave the loop.
}
return RegOp;
}
@@ -1011,14 +867,6 @@
return true;
}
=20
-/// isReMaterializable - Returns true if the definition MI of the specified
-/// val# of the specified interval is re-materializable.
-bool LiveIntervals::isReMaterializable(const LiveInterval &li,
- const VNInfo *ValNo, MachineInstr *=
MI) {
- bool Dummy2;
- return isReMaterializable(li, ValNo, MI, 0, Dummy2);
-}
-
/// isReMaterializable - Returns true if every definition of MI of every
/// val# of the specified interval is re-materializable.
bool
@@ -1044,672 +892,28 @@
return true;
}
=20
-/// FilterFoldedOps - Filter out two-address use operands. Return
-/// true if it finds any issue with the operands that ought to prevent
-/// folding.
-static bool FilterFoldedOps(MachineInstr *MI,
- SmallVector<unsigned, 2> &Ops,
- unsigned &MRInfo,
- SmallVector<unsigned, 2> &FoldOps) {
- MRInfo =3D 0;
- for (unsigned i =3D 0, e =3D Ops.size(); i !=3D e; ++i) {
- unsigned OpIdx =3D Ops[i];
- MachineOperand &MO =3D MI->getOperand(OpIdx);
- // FIXME: fold subreg use.
- if (MO.getSubReg())
- return true;
- if (MO.isDef())
- MRInfo |=3D (unsigned)VirtRegMap::isMod;
- else {
- // Filter out two-address use operand(s).
- if (MI->isRegTiedToDefOperand(OpIdx)) {
- MRInfo =3D VirtRegMap::isModRef;
- continue;
- }
- MRInfo |=3D (unsigned)VirtRegMap::isRef;
- }
- FoldOps.push_back(OpIdx);
- }
- return false;
-}
+MachineBasicBlock*
+LiveIntervals::intervalIsInOneMBB(const LiveInterval &LI) const {
+ // A local live range must be fully contained inside the block, meaning =
it is
+ // defined and killed at instructions, not at block boundaries. It is not
+ // live in or or out of any block.
+ //
+ // It is technically possible to have a PHI-defined live range identical=
to a
+ // single block, but we are going to return false in that case.
=20
+ SlotIndex Start =3D LI.beginIndex();
+ if (Start.isBlock())
+ return NULL;
=20
-/// tryFoldMemoryOperand - Attempts to fold either a spill / restore from
-/// slot / to reg or any rematerialized load into ith operand of specified
-/// MI. If it is successul, MI is updated with the newly created MI and
-/// returns true.
-bool LiveIntervals::tryFoldMemoryOperand(MachineInstr* &MI,
- VirtRegMap &vrm, MachineInstr *De=
fMI,
- SlotIndex InstrIdx,
- SmallVector<unsigned, 2> &Ops,
- bool isSS, int Slot, unsigned Reg=
) {
- // If it is an implicit def instruction, just delete it.
- if (MI->isImplicitDef()) {
- RemoveMachineInstrFromMaps(MI);
- vrm.RemoveMachineInstrFromMaps(MI);
- MI->eraseFromParent();
- ++numFolds;
- return true;
- }
+ SlotIndex Stop =3D LI.endIndex();
+ if (Stop.isBlock())
+ return NULL;
=20
- // Filter the list of operand indexes that are to be folded. Abort if
- // any operand will prevent folding.
- unsigned MRInfo =3D 0;
- SmallVector<unsigned, 2> FoldOps;
- if (FilterFoldedOps(MI, Ops, MRInfo, FoldOps))
- return false;
-
- // The only time it's safe to fold into a two address instruction is when
- // it's folding reload and spill from / into a spill stack slot.
- if (DefMI && (MRInfo & VirtRegMap::isMod))
- return false;
-
- MachineInstr *fmi =3D isSS ? tii_->foldMemoryOperand(MI, FoldOps, Slot)
- : tii_->foldMemoryOperand(MI, FoldOps, DefMI);
- if (fmi) {
- // Remember this instruction uses the spill slot.
- if (isSS) vrm.addSpillSlotUse(Slot, fmi);
-
- // Attempt to fold the memory reference into the instruction. If
- // we can do this, we don't need to insert spill code.
- if (isSS && !mf_->getFrameInfo()->isImmutableObjectIndex(Slot))
- vrm.virtFolded(Reg, MI, fmi, (VirtRegMap::ModRef)MRInfo);
- vrm.transferSpillPts(MI, fmi);
- vrm.transferRestorePts(MI, fmi);
- vrm.transferEmergencySpills(MI, fmi);
- ReplaceMachineInstrInMaps(MI, fmi);
- MI->eraseFromParent();
- MI =3D fmi;
- ++numFolds;
- return true;
- }
- return false;
-}
-
-/// canFoldMemoryOperand - Returns true if the specified load / store
-/// folding is possible.
-bool LiveIntervals::canFoldMemoryOperand(MachineInstr *MI,
- SmallVector<unsigned, 2> &Ops,
- bool ReMat) const {
- // Filter the list of operand indexes that are to be folded. Abort if
- // any operand will prevent folding.
- unsigned MRInfo =3D 0;
- SmallVector<unsigned, 2> FoldOps;
- if (FilterFoldedOps(MI, Ops, MRInfo, FoldOps))
- return false;
-
- // It's only legal to remat for a use, not a def.
- if (ReMat && (MRInfo & VirtRegMap::isMod))
- return false;
-
- return tii_->canFoldMemoryOperand(MI, FoldOps);
-}
-
-bool LiveIntervals::intervalIsInOneMBB(const LiveInterval &li) const {
- LiveInterval::Ranges::const_iterator itr =3D li.ranges.begin();
-
- MachineBasicBlock *mbb =3D indexes_->getMBBCoveringRange(itr->start, it=
r->end);
-
- if (mbb =3D=3D 0)
- return false;
-
- for (++itr; itr !=3D li.ranges.end(); ++itr) {
- MachineBasicBlock *mbb2 =3D
- indexes_->getMBBCoveringRange(itr->start, itr->end);
-
- if (mbb2 !=3D mbb)
- return false;
- }
-
- return true;
-}
-
-/// rewriteImplicitOps - Rewrite implicit use operands of MI (i.e. uses of
-/// interval on to-be re-materialized operands of MI) with new register.
-void LiveIntervals::rewriteImplicitOps(const LiveInterval &li,
- MachineInstr *MI, unsigned NewVReg,
- VirtRegMap &vrm) {
- // There is an implicit use. That means one of the other operand is
- // being remat'ed and the remat'ed instruction has li.reg as an
- // use operand. Make sure we rewrite that as well.
- for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
- MachineOperand &MO =3D MI->getOperand(i);
- if (!MO.isReg())
- continue;
- unsigned Reg =3D MO.getReg();
- if (!TargetRegisterInfo::isVirtualRegister(Reg))
- continue;
- if (!vrm.isReMaterialized(Reg))
- continue;
- MachineInstr *ReMatMI =3D vrm.getReMaterializedMI(Reg);
- MachineOperand *UseMO =3D ReMatMI->findRegisterUseOperand(li.reg);
- if (UseMO)
- UseMO->setReg(NewVReg);
- }
-}
-
-/// rewriteInstructionForSpills, rewriteInstructionsForSpills - Helper fun=
ctions
-/// for addIntervalsForSpills to rewrite uses / defs for the given live ra=
nge.
-bool LiveIntervals::
-rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI,
- bool TrySplit, SlotIndex index, SlotIndex end,
- MachineInstr *MI,
- MachineInstr *ReMatOrigDefMI, MachineInstr *ReMatDefMI,
- unsigned Slot, int LdSlot,
- bool isLoad, bool isLoadSS, bool DefIsReMat, bool CanDele=
te,
- VirtRegMap &vrm,
- const TargetRegisterClass* rc,
- SmallVector<int, 4> &ReMatIds,
- const MachineLoopInfo *loopInfo,
- unsigned &NewVReg, unsigned ImpUse, bool &HasDef, bool &H=
asUse,
- DenseMap<unsigned,unsigned> &MBBVRegsMap,
- std::vector<LiveInterval*> &NewLIs) {
- bool CanFold =3D false;
- RestartInstruction:
- for (unsigned i =3D 0; i !=3D MI->getNumOperands(); ++i) {
- MachineOperand& mop =3D MI->getOperand(i);
- if (!mop.isReg())
- continue;
- unsigned Reg =3D mop.getReg();
- if (!TargetRegisterInfo::isVirtualRegister(Reg))
- continue;
- if (Reg !=3D li.reg)
- continue;
-
- bool TryFold =3D !DefIsReMat;
- bool FoldSS =3D true; // Default behavior unless it's a remat.
- int FoldSlot =3D Slot;
- if (DefIsReMat) {
- // If this is the rematerializable definition MI itself and
- // all of its uses are rematerialized, simply delete it.
- if (MI =3D=3D ReMatOrigDefMI && CanDelete) {
- DEBUG(dbgs() << "\t\t\t\tErasing re-materializable def: "
- << *MI << '\n');
- RemoveMachineInstrFromMaps(MI);
- vrm.RemoveMachineInstrFromMaps(MI);
- MI->eraseFromParent();
- break;
- }
-
- // If def for this use can't be rematerialized, then try folding.
- // If def is rematerializable and it's a load, also try folding.
- TryFold =3D !ReMatDefMI || (ReMatDefMI && (MI =3D=3D ReMatOrigDefMI =
|| isLoad));
- if (isLoad) {
- // Try fold loads (from stack slot, constant pool, etc.) into uses.
- FoldSS =3D isLoadSS;
- FoldSlot =3D LdSlot;
- }
- }
-
- // Scan all of the operands of this instruction rewriting operands
- // to use NewVReg instead of li.reg as appropriate. We do this for
- // two reasons:
- //
- // 1. If the instr reads the same spilled vreg multiple times, we
- // want to reuse the NewVReg.
- // 2. If the instr is a two-addr instruction, we are required to
- // keep the src/dst regs pinned.
- //
- // Keep track of whether we replace a use and/or def so that we can
- // create the spill interval with the appropriate range.
- SmallVector<unsigned, 2> Ops;
- tie(HasUse, HasDef) =3D MI->readsWritesVirtualRegister(Reg, &Ops);
-
- // Create a new virtual register for the spill interval.
- // Create the new register now so we can map the fold instruction
- // to the new register so when it is unfolded we get the correct
- // answer.
- bool CreatedNewVReg =3D false;
- if (NewVReg =3D=3D 0) {
- NewVReg =3D mri_->createVirtualRegister(rc);
- vrm.grow();
- CreatedNewVReg =3D true;
-
- // The new virtual register should get the same allocation hints as =
the
- // old one.
- std::pair<unsigned, unsigned> Hint =3D mri_->getRegAllocationHint(Re=
g);
- if (Hint.first || Hint.second)
- mri_->setRegAllocationHint(NewVReg, Hint.first, Hint.second);
- }
-
- if (!TryFold)
- CanFold =3D false;
- else {
- // Do not fold load / store here if we are splitting. We'll find an
- // optimal point to insert a load / store later.
- if (!TrySplit) {
- if (tryFoldMemoryOperand(MI, vrm, ReMatDefMI, index,
- Ops, FoldSS, FoldSlot, NewVReg)) {
- // Folding the load/store can completely change the instruction =
in
- // unpredictable ways, rescan it from the beginning.
-
- if (FoldSS) {
- // We need to give the new vreg the same stack slot as the
- // spilled interval.
- vrm.assignVirt2StackSlot(NewVReg, FoldSlot);
- }
-
- HasUse =3D false;
- HasDef =3D false;
- CanFold =3D false;
- if (isNotInMIMap(MI))
- break;
- goto RestartInstruction;
- }
- } else {
- // We'll try to fold it later if it's profitable.
- CanFold =3D canFoldMemoryOperand(MI, Ops, DefIsReMat);
- }
- }
-
- mop.setReg(NewVReg);
- if (mop.isImplicit())
- rewriteImplicitOps(li, MI, NewVReg, vrm);
-
- // Reuse NewVReg for other reads.
- bool HasEarlyClobber =3D false;
- for (unsigned j =3D 0, e =3D Ops.size(); j !=3D e; ++j) {
- MachineOperand &mopj =3D MI->getOperand(Ops[j]);
- mopj.setReg(NewVReg);
- if (mopj.isImplicit())
- rewriteImplicitOps(li, MI, NewVReg, vrm);
- if (mopj.isEarlyClobber())
- HasEarlyClobber =3D true;
- }
-
- if (CreatedNewVReg) {
- if (DefIsReMat) {
- vrm.setVirtIsReMaterialized(NewVReg, ReMatDefMI);
- if (ReMatIds[VNI->id] =3D=3D VirtRegMap::MAX_STACK_SLOT) {
- // Each valnum may have its own remat id.
- ReMatIds[VNI->id] =3D vrm.assignVirtReMatId(NewVReg);
- } else {
- vrm.assignVirtReMatId(NewVReg, ReMatIds[VNI->id]);
- }
- if (!CanDelete || (HasUse && HasDef)) {
- // If this is a two-addr instruction then its use operands are
- // rematerializable but its def is not. It should be assigned a
- // stack slot.
- vrm.assignVirt2StackSlot(NewVReg, Slot);
- }
- } else {
- vrm.assignVirt2StackSlot(NewVReg, Slot);
- }
- } else if (HasUse && HasDef &&
- vrm.getStackSlot(NewVReg) =3D=3D VirtRegMap::NO_STACK_SLOT)=
{
- // If this interval hasn't been assigned a stack slot (because earli=
er
- // def is a deleted remat def), do it now.
- assert(Slot !=3D VirtRegMap::NO_STACK_SLOT);
- vrm.assignVirt2StackSlot(NewVReg, Slot);
- }
-
- // Re-matting an instruction with virtual register use. Add the
- // register as an implicit use on the use MI.
- if (DefIsReMat && ImpUse)
- MI->addOperand(MachineOperand::CreateReg(ImpUse, false, true));
-
- // Create a new register interval for this spill / remat.
- LiveInterval &nI =3D getOrCreateInterval(NewVReg);
- if (CreatedNewVReg) {
- NewLIs.push_back(&nI);
- MBBVRegsMap.insert(std::make_pair(MI->getParent()->getNumber(), NewV=
Reg));
- if (TrySplit)
- vrm.setIsSplitFromReg(NewVReg, li.reg);
- }
-
- if (HasUse) {
- if (CreatedNewVReg) {
- LiveRange LR(index.getLoadIndex(), index.getDefIndex(),
- nI.getNextValue(SlotIndex(), 0, VNInfoAllocator));
- DEBUG(dbgs() << " +" << LR);
- nI.addRange(LR);
- } else {
- // Extend the split live interval to this def / use.
- SlotIndex End =3D index.getDefIndex();
- LiveRange LR(nI.ranges[nI.ranges.size()-1].end, End,
- nI.getValNumInfo(nI.getNumValNums()-1));
- DEBUG(dbgs() << " +" << LR);
- nI.addRange(LR);
- }
- }
- if (HasDef) {
- // An early clobber starts at the use slot, except for an early clob=
ber
- // tied to a use operand (yes, that is a thing).
- LiveRange LR(HasEarlyClobber && !HasUse ?
- index.getUseIndex() : index.getDefIndex(),
- index.getStoreIndex(),
- nI.getNextValue(SlotIndex(), 0, VNInfoAllocator));
- DEBUG(dbgs() << " +" << LR);
- nI.addRange(LR);
- }
-
- DEBUG({
- dbgs() << "\t\t\t\tAdded new interval: ";
- nI.print(dbgs(), tri_);
- dbgs() << '\n';
- });
- }
- return CanFold;
-}
-bool LiveIntervals::anyKillInMBBAfterIdx(const LiveInterval &li,
- const VNInfo *VNI,
- MachineBasicBlock *MBB,
- SlotIndex Idx) const {
- return li.killedInRange(Idx.getNextSlot(), getMBBEndIdx(MBB));
-}
-
-/// RewriteInfo - Keep track of machine instrs that will be rewritten
-/// during spilling.
-namespace {
- struct RewriteInfo {
- SlotIndex Index;
- MachineInstr *MI;
- RewriteInfo(SlotIndex i, MachineInstr *mi) : Index(i), MI(mi) {}
- };
-
- struct RewriteInfoCompare {
- bool operator()(const RewriteInfo &LHS, const RewriteInfo &RHS) const {
- return LHS.Index < RHS.Index;
- }
- };
-}
-
-void LiveIntervals::
-rewriteInstructionsForSpills(const LiveInterval &li, bool TrySplit,
- LiveInterval::Ranges::const_iterator &I,
- MachineInstr *ReMatOrigDefMI, MachineInstr *ReMatDefMI,
- unsigned Slot, int LdSlot,
- bool isLoad, bool isLoadSS, bool DefIsReMat, bool CanD=
elete,
- VirtRegMap &vrm,
- const TargetRegisterClass* rc,
- SmallVector<int, 4> &ReMatIds,
- const MachineLoopInfo *loopInfo,
- BitVector &SpillMBBs,
- DenseMap<unsigned, std::vector<SRInfo> > &SpillIdxes,
- BitVector &RestoreMBBs,
- DenseMap<unsigned, std::vector<SRInfo> > &RestoreIdxes,
- DenseMap<unsigned,unsigned> &MBBVRegsMap,
- std::vector<LiveInterval*> &NewLIs) {
- bool AllCanFold =3D true;
- unsigned NewVReg =3D 0;
- SlotIndex start =3D I->start.getBaseIndex();
- SlotIndex end =3D I->end.getPrevSlot().getBaseIndex().getNextIndex();
-
- // First collect all the def / use in this live range that will be rewri=
tten.
- // Make sure they are sorted according to instruction index.
- std::vector<RewriteInfo> RewriteMIs;
- for (MachineRegisterInfo::reg_iterator ri =3D mri_->reg_begin(li.reg),
- re =3D mri_->reg_end(); ri !=3D re; ) {
- MachineInstr *MI =3D &*ri;
- MachineOperand &O =3D ri.getOperand();
- ++ri;
- if (MI->isDebugValue()) {
- // Modify DBG_VALUE now that the value is in a spill slot.
- if (Slot !=3D VirtRegMap::MAX_STACK_SLOT || isLoadSS) {
- uint64_t Offset =3D MI->getOperand(1).getImm();
- const MDNode *MDPtr =3D MI->getOperand(2).getMetadata();
- DebugLoc DL =3D MI->getDebugLoc();
- int FI =3D isLoadSS ? LdSlot : (int)Slot;
- if (MachineInstr *NewDV =3D tii_->emitFrameIndexDebugValue(*mf_, F=
I,
- Offset, MDPtr, =
DL)) {
- DEBUG(dbgs() << "Modifying debug info due to spill:" << "\t" << =
*MI);
- ReplaceMachineInstrInMaps(MI, NewDV);
- MachineBasicBlock *MBB =3D MI->getParent();
- MBB->insert(MBB->erase(MI), NewDV);
- continue;
- }
- }
-
- DEBUG(dbgs() << "Removing debug info due to spill:" << "\t" << *MI);
- RemoveMachineInstrFromMaps(MI);
- vrm.RemoveMachineInstrFromMaps(MI);
- MI->eraseFromParent();
- continue;
- }
- assert(!(O.isImplicit() && O.isUse()) &&
- "Spilling register that's used as implicit use?");
- SlotIndex index =3D getInstructionIndex(MI);
- if (index < start || index >=3D end)
- continue;
-
- if (O.isUndef())
- // Must be defined by an implicit def. It should not be spilled. Not=
e,
- // this is for correctness reason. e.g.
- // 8 %reg1024<def> =3D IMPLICIT_DEF
- // 12 %reg1024<def> =3D INSERT_SUBREG %reg1024<kill>, %reg1025, 2
- // The live range [12, 14) are not part of the r1024 live interval s=
ince
- // it's defined by an implicit def. It will not conflicts with live
- // interval of r1025. Now suppose both registers are spilled, you can
- // easily see a situation where both registers are reloaded before
- // the INSERT_SUBREG and both target registers that would overlap.
- continue;
- RewriteMIs.push_back(RewriteInfo(index, MI));
- }
- std::sort(RewriteMIs.begin(), RewriteMIs.end(), RewriteInfoCompare());
-
- unsigned ImpUse =3D DefIsReMat ? getReMatImplicitUse(li, ReMatDefMI) : 0;
- // Now rewrite the defs and uses.
- for (unsigned i =3D 0, e =3D RewriteMIs.size(); i !=3D e; ) {
- RewriteInfo &rwi =3D RewriteMIs[i];
- ++i;
- SlotIndex index =3D rwi.Index;
- MachineInstr *MI =3D rwi.MI;
- // If MI def and/or use the same register multiple times, then there
- // are multiple entries.
- while (i !=3D e && RewriteMIs[i].MI =3D=3D MI) {
- assert(RewriteMIs[i].Index =3D=3D index);
- ++i;
- }
- MachineBasicBlock *MBB =3D MI->getParent();
-
- if (ImpUse && MI !=3D ReMatDefMI) {
- // Re-matting an instruction with virtual register use. Prevent inte=
rval
- // from being spilled.
- getInterval(ImpUse).markNotSpillable();
- }
-
- unsigned MBBId =3D MBB->getNumber();
- unsigned ThisVReg =3D 0;
- if (TrySplit) {
- DenseMap<unsigned,unsigned>::iterator NVI =3D MBBVRegsMap.find(MBBId=
);
- if (NVI !=3D MBBVRegsMap.end()) {
- ThisVReg =3D NVI->second;
- // One common case:
- // x =3D use
- // ...
- // ...
- // def =3D ...
- // =3D use
- // It's better to start a new interval to avoid artificially
- // extend the new interval.
- if (MI->readsWritesVirtualRegister(li.reg) =3D=3D
- std::make_pair(false,true)) {
- MBBVRegsMap.erase(MBB->getNumber());
- ThisVReg =3D 0;
- }
- }
- }
-
- bool IsNew =3D ThisVReg =3D=3D 0;
- if (IsNew) {
- // This ends the previous live interval. If all of its def / use
- // can be folded, give it a low spill weight.
- if (NewVReg && TrySplit && AllCanFold) {
- LiveInterval &nI =3D getOrCreateInterval(NewVReg);
- nI.weight /=3D 10.0F;
- }
- AllCanFold =3D true;
- }
- NewVReg =3D ThisVReg;
-
- bool HasDef =3D false;
- bool HasUse =3D false;
- bool CanFold =3D rewriteInstructionForSpills(li, I->valno, TrySplit,
- index, end, MI, ReMatOrigDefMI, ReMatDefMI,
- Slot, LdSlot, isLoad, isLoadSS, DefIsReMat,
- CanDelete, vrm, rc, ReMatIds, loopInfo, NewVReg,
- ImpUse, HasDef, HasUse, MBBVRegsMap, NewLIs);
- if (!HasDef && !HasUse)
- continue;
-
- AllCanFold &=3D CanFold;
-
- // Update weight of spill interval.
- LiveInterval &nI =3D getOrCreateInterval(NewVReg);
- if (!TrySplit) {
- // The spill weight is now infinity as it cannot be spilled again.
- nI.markNotSpillable();
- continue;
- }
-
- // Keep track of the last def and first use in each MBB.
- if (HasDef) {
- if (MI !=3D ReMatOrigDefMI || !CanDelete) {
- bool HasKill =3D false;
- if (!HasUse)
- HasKill =3D anyKillInMBBAfterIdx(li, I->valno, MBB, index.getDef=
Index());
- else {
- // If this is a two-address code, then this index starts a new V=
NInfo.
- const VNInfo *VNI =3D li.findDefinedVNInfoForRegInt(index.getDef=
Index());
- if (VNI)
- HasKill =3D anyKillInMBBAfterIdx(li, VNI, MBB, index.getDefInd=
ex());
- }
- DenseMap<unsigned, std::vector<SRInfo> >::iterator SII =3D
- SpillIdxes.find(MBBId);
- if (!HasKill) {
- if (SII =3D=3D SpillIdxes.end()) {
- std::vector<SRInfo> S;
- S.push_back(SRInfo(index, NewVReg, true));
- SpillIdxes.insert(std::make_pair(MBBId, S));
- } else if (SII->second.back().vreg !=3D NewVReg) {
- SII->second.push_back(SRInfo(index, NewVReg, true));
- } else if (index > SII->second.back().index) {
- // If there is an earlier def and this is a two-address
- // instruction, then it's not possible to fold the store (which
- // would also fold the load).
- SRInfo &Info =3D SII->second.back();
- Info.index =3D index;
- Info.canFold =3D !HasUse;
- }
- SpillMBBs.set(MBBId);
- } else if (SII !=3D SpillIdxes.end() &&
- SII->second.back().vreg =3D=3D NewVReg &&
- index > SII->second.back().index) {
- // There is an earlier def that's not killed (must be two-addres=
s).
- // The spill is no longer needed.
- SII->second.pop_back();
- if (SII->second.empty()) {
- SpillIdxes.erase(MBBId);
- SpillMBBs.reset(MBBId);
- }
- }
- }
- }
-
- if (HasUse) {
- DenseMap<unsigned, std::vector<SRInfo> >::iterator SII =3D
- SpillIdxes.find(MBBId);
- if (SII !=3D SpillIdxes.end() &&
- SII->second.back().vreg =3D=3D NewVReg &&
- index > SII->second.back().index)
- // Use(s) following the last def, it's not safe to fold the spill.
- SII->second.back().canFold =3D false;
- DenseMap<unsigned, std::vector<SRInfo> >::iterator RII =3D
- RestoreIdxes.find(MBBId);
- if (RII !=3D RestoreIdxes.end() && RII->second.back().vreg =3D=3D Ne=
wVReg)
- // If we are splitting live intervals, only fold if it's the first
- // use and there isn't another use later in the MBB.
- RII->second.back().canFold =3D false;
- else if (IsNew) {
- // Only need a reload if there isn't an earlier def / use.
- if (RII =3D=3D RestoreIdxes.end()) {
- std::vector<SRInfo> Infos;
- Infos.push_back(SRInfo(index, NewVReg, true));
- RestoreIdxes.insert(std::make_pair(MBBId, Infos));
- } else {
- RII->second.push_back(SRInfo(index, NewVReg, true));
- }
- RestoreMBBs.set(MBBId);
- }
- }
-
- // Update spill weight.
- unsigned loopDepth =3D loopInfo->getLoopDepth(MBB);
- nI.weight +=3D getSpillWeight(HasDef, HasUse, loopDepth);
- }
-
- if (NewVReg && TrySplit && AllCanFold) {
- // If all of its def / use can be folded, give it a low spill weight.
- LiveInterval &nI =3D getOrCreateInterval(NewVReg);
- nI.weight /=3D 10.0F;
- }
-}
-
-bool LiveIntervals::alsoFoldARestore(int Id, SlotIndex index,
- unsigned vr, BitVector &RestoreMBBs,
- DenseMap<unsigned,std::vector<SRInfo> > &RestoreId=
xes) {
- if (!RestoreMBBs[Id])
- return false;
- std::vector<SRInfo> &Restores =3D RestoreIdxes[Id];
- for (unsigned i =3D 0, e =3D Restores.size(); i !=3D e; ++i)
- if (Restores[i].index =3D=3D index &&
- Restores[i].vreg =3D=3D vr &&
- Restores[i].canFold)
- return true;
- return false;
-}
-
-void LiveIntervals::eraseRestoreInfo(int Id, SlotIndex index,
- unsigned vr, BitVector &RestoreMBBs,
- DenseMap<unsigned,std::vector<SRInfo> > &RestoreId=
xes) {
- if (!RestoreMBBs[Id])
- return;
- std::vector<SRInfo> &Restores =3D RestoreIdxes[Id];
- for (unsigned i =3D 0, e =3D Restores.size(); i !=3D e; ++i)
- if (Restores[i].index =3D=3D index && Restores[i].vreg)
- Restores[i].index =3D SlotIndex();
-}
-
-/// handleSpilledImpDefs - Remove IMPLICIT_DEF instructions which are being
-/// spilled and create empty intervals for their uses.
-void
-LiveIntervals::handleSpilledImpDefs(const LiveInterval &li, VirtRegMap &vr=
m,
- const TargetRegisterClass* rc,
- std::vector<LiveInterval*> &NewLIs) {
- for (MachineRegisterInfo::reg_iterator ri =3D mri_->reg_begin(li.reg),
- re =3D mri_->reg_end(); ri !=3D re; ) {
- MachineOperand &O =3D ri.getOperand();
- MachineInstr *MI =3D &*ri;
- ++ri;
- if (MI->isDebugValue()) {
- // Remove debug info for now.
- O.setReg(0U);
- DEBUG(dbgs() << "Removing debug info due to spill:" << "\t" << *MI);
- continue;
- }
- if (O.isDef()) {
- assert(MI->isImplicitDef() &&
- "Register def was not rewritten?");
- RemoveMachineInstrFromMaps(MI);
- vrm.RemoveMachineInstrFromMaps(MI);
- MI->eraseFromParent();
- } else {
- // This must be an use of an implicit_def so it's not part of the li=
ve
- // interval. Create a new empty live interval for it.
- // FIXME: Can we simply erase some of the instructions? e.g. Stores?
- unsigned NewVReg =3D mri_->createVirtualRegister(rc);
- vrm.grow();
- vrm.setIsImplicitlyDefined(NewVReg);
- NewLIs.push_back(&getOrCreateInterval(NewVReg));
- for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
- MachineOperand &MO =3D MI->getOperand(i);
- if (MO.isReg() && MO.getReg() =3D=3D li.reg) {
- MO.setReg(NewVReg);
- MO.setIsUndef();
- }
- }
- }
- }
+ // getMBBFromIndex doesn't need to search the MBB table when both indexes
+ // belong to proper instructions.
+ MachineBasicBlock *MBB1 =3D indexes_->getMBBFromIndex(Start);
+ MachineBasicBlock *MBB2 =3D indexes_->getMBBFromIndex(Stop);
+ return MBB1 =3D=3D MBB2 ? MBB1 : NULL;
}
=20
float
@@ -1730,455 +934,611 @@
return (isDef + isUse) * lc;
}
=20
-static void normalizeSpillWeights(std::vector<LiveInterval*> &NewLIs) {
- for (unsigned i =3D 0, e =3D NewLIs.size(); i !=3D e; ++i)
- NewLIs[i]->weight =3D
- normalizeSpillWeight(NewLIs[i]->weight, NewLIs[i]->getSize());
-}
-
-std::vector<LiveInterval*> LiveIntervals::
-addIntervalsForSpills(const LiveInterval &li,
- const SmallVectorImpl<LiveInterval*> *SpillIs,
- const MachineLoopInfo *loopInfo, VirtRegMap &vrm) {
- assert(li.isSpillable() && "attempt to spill already spilled interval!");
-
- DEBUG({
- dbgs() << "\t\t\t\tadding intervals for spills for interval: ";
- li.print(dbgs(), tri_);
- dbgs() << '\n';
- });
-
- // Each bit specify whether a spill is required in the MBB.
- BitVector SpillMBBs(mf_->getNumBlockIDs());
- DenseMap<unsigned, std::vector<SRInfo> > SpillIdxes;
- BitVector RestoreMBBs(mf_->getNumBlockIDs());
- DenseMap<unsigned, std::vector<SRInfo> > RestoreIdxes;
- DenseMap<unsigned,unsigned> MBBVRegsMap;
- std::vector<LiveInterval*> NewLIs;
- const TargetRegisterClass* rc =3D mri_->getRegClass(li.reg);
-
- unsigned NumValNums =3D li.getNumValNums();
- SmallVector<MachineInstr*, 4> ReMatDefs;
- ReMatDefs.resize(NumValNums, NULL);
- SmallVector<MachineInstr*, 4> ReMatOrigDefs;
- ReMatOrigDefs.resize(NumValNums, NULL);
- SmallVector<int, 4> ReMatIds;
- ReMatIds.resize(NumValNums, VirtRegMap::MAX_STACK_SLOT);
- BitVector ReMatDelete(NumValNums);
- unsigned Slot =3D VirtRegMap::MAX_STACK_SLOT;
-
- // Spilling a split live interval. It cannot be split any further. Also,
- // it's also guaranteed to be a single val# / range interval.
- if (vrm.getPreSplitReg(li.reg)) {
- vrm.setIsSplitFromReg(li.reg, 0);
- // Unset the split kill marker on the last use.
- SlotIndex KillIdx =3D vrm.getKillPoint(li.reg);
- if (KillIdx !=3D SlotIndex()) {
- MachineInstr *KillMI =3D getInstructionFromIndex(KillIdx);
- assert(KillMI && "Last use disappeared?");
- int KillOp =3D KillMI->findRegisterUseOperandIdx(li.reg, true);
- assert(KillOp !=3D -1 && "Last use disappeared?");
- KillMI->getOperand(KillOp).setIsKill(false);
- }
- vrm.removeKillPoint(li.reg);
- bool DefIsReMat =3D vrm.isReMaterialized(li.reg);
- Slot =3D vrm.getStackSlot(li.reg);
- assert(Slot !=3D VirtRegMap::MAX_STACK_SLOT);
- MachineInstr *ReMatDefMI =3D DefIsReMat ?
- vrm.getReMaterializedMI(li.reg) : NULL;
- int LdSlot =3D 0;
- bool isLoadSS =3D DefIsReMat && tii_->isLoadFromStackSlot(ReMatDefMI, =
LdSlot);
- bool isLoad =3D isLoadSS ||
- (DefIsReMat && (ReMatDefMI->getDesc().canFoldAsLoad()));
- bool IsFirstRange =3D true;
- for (LiveInterval::Ranges::const_iterator
- I =3D li.ranges.begin(), E =3D li.ranges.end(); I !=3D E; ++I) {
- // If this is a split live interval with multiple ranges, it means t=
here
- // are two-address instructions that re-defined the value. Only the
- // first def can be rematerialized!
- if (IsFirstRange) {
- // Note ReMatOrigDefMI has already been deleted.
- rewriteInstructionsForSpills(li, false, I, NULL, ReMatDefMI,
- Slot, LdSlot, isLoad, isLoadSS, DefIsReMat,
- false, vrm, rc, ReMatIds, loopInfo,
- SpillMBBs, SpillIdxes, RestoreMBBs, RestoreId=
xes,
- MBBVRegsMap, NewLIs);
- } else {
- rewriteInstructionsForSpills(li, false, I, NULL, 0,
- Slot, 0, false, false, false,
- false, vrm, rc, ReMatIds, loopInfo,
- SpillMBBs, SpillIdxes, RestoreMBBs, RestoreId=
xes,
- MBBVRegsMap, NewLIs);
- }
- IsFirstRange =3D false;
- }
-
- handleSpilledImpDefs(li, vrm, rc, NewLIs);
- normalizeSpillWeights(NewLIs);
- return NewLIs;
- }
-
- bool TrySplit =3D !intervalIsInOneMBB(li);
- if (TrySplit)
- ++numSplits;
- bool NeedStackSlot =3D false;
- for (LiveInterval::const_vni_iterator i =3D li.vni_begin(), e =3D li.vni=
_end();
- i !=3D e; ++i) {
- const VNInfo *VNI =3D *i;
- unsigned VN =3D VNI->id;
- if (VNI->isUnused())
- continue; // Dead val#.
- // Is the def for the val# rematerializable?
- MachineInstr *ReMatDefMI =3D getInstructionFromIndex(VNI->def);
- bool dummy;
- if (ReMatDefMI && isReMaterializable(li, VNI, ReMatDefMI, SpillIs, dum=
my)) {
- // Remember how to remat the def of this val#.
- ReMatOrigDefs[VN] =3D ReMatDefMI;
- // Original def may be modified so we have to make a copy here.
- MachineInstr *Clone =3D mf_->CloneMachineInstr(ReMatDefMI);
- CloneMIs.push_back(Clone);
- ReMatDefs[VN] =3D Clone;
-
- bool CanDelete =3D true;
- if (VNI->hasPHIKill()) {
- // A kill is a phi node, not all of its uses can be rematerialized.
- // It must not be deleted.
- CanDelete =3D false;
- // Need a stack slot if there is any live range where uses cannot =
be
- // rematerialized.
- NeedStackSlot =3D true;
- }
- if (CanDelete)
- ReMatDelete.set(VN);
- } else {
- // Need a stack slot if there is any live range where uses cannot be
- // rematerialized.
- NeedStackSlot =3D true;
- }
- }
-
- // One stack slot per live interval.
- if (NeedStackSlot && vrm.getPreSplitReg(li.reg) =3D=3D 0) {
- if (vrm.getStackSlot(li.reg) =3D=3D VirtRegMap::NO_STACK_SLOT)
- Slot =3D vrm.assignVirt2StackSlot(li.reg);
-
- // This case only occurs when the prealloc splitter has already assign=
ed
- // a stack slot to this vreg.
- else
- Slot =3D vrm.getStackSlot(li.reg);
- }
-
- // Create new intervals and rewrite defs and uses.
- for (LiveInterval::Ranges::const_iterator
- I =3D li.ranges.begin(), E =3D li.ranges.end(); I !=3D E; ++I) {
- MachineInstr *ReMatDefMI =3D ReMatDefs[I->valno->id];
- MachineInstr *ReMatOrigDefMI =3D ReMatOrigDefs[I->valno->id];
- bool DefIsReMat =3D ReMatDefMI !=3D NULL;
- bool CanDelete =3D ReMatDelete[I->valno->id];
- int LdSlot =3D 0;
- bool isLoadSS =3D DefIsReMat && tii_->isLoadFromStackSlot(ReMatDefMI, =
LdSlot);
- bool isLoad =3D isLoadSS ||
- (DefIsReMat && ReMatDefMI->getDesc().canFoldAsLoad());
- rewriteInstructionsForSpills(li, TrySplit, I, ReMatOrigDefMI, ReMatDef=
MI,
- Slot, LdSlot, isLoad, isLoadSS, DefIsReMat,
- CanDelete, vrm, rc, ReMatIds, loopInfo,
- SpillMBBs, SpillIdxes, RestoreMBBs, Restore=
Idxes,
- MBBVRegsMap, NewLIs);
- }
-
- // Insert spills / restores if we are splitting.
- if (!TrySplit) {
- handleSpilledImpDefs(li, vrm, rc, NewLIs);
- normalizeSpillWeights(NewLIs);
- return NewLIs;
- }
-
- SmallPtrSet<LiveInterval*, 4> AddedKill;
- SmallVector<unsigned, 2> Ops;
- if (NeedStackSlot) {
- int Id =3D SpillMBBs.find_first();
- while (Id !=3D -1) {
- std::vector<SRInfo> &spills =3D SpillIdxes[Id];
- for (unsigned i =3D 0, e =3D spills.size(); i !=3D e; ++i) {
- SlotIndex index =3D spills[i].index;
- unsigned VReg =3D spills[i].vreg;
- LiveInterval &nI =3D getOrCreateInterval(VReg);
- bool isReMat =3D vrm.isReMaterialized(VReg);
- MachineInstr *MI =3D getInstructionFromIndex(index);
- bool CanFold =3D false;
- bool FoundUse =3D false;
- Ops.clear();
- if (spills[i].canFold) {
- CanFold =3D true;
- for (unsigned j =3D 0, ee =3D MI->getNumOperands(); j !=3D ee; +=
+j) {
- MachineOperand &MO =3D MI->getOperand(j);
- if (!MO.isReg() || MO.getReg() !=3D VReg)
- continue;
-
- Ops.push_back(j);
- if (MO.isDef())
- continue;
- if (isReMat ||
- (!FoundUse && !alsoFoldARestore(Id, index, VReg,
- RestoreMBBs, RestoreIdxes)=
)) {
- // MI has two-address uses of the same register. If the use
- // isn't the first and only use in the BB, then we can't fold
- // it. FIXME: Move this to rewriteInstructionsForSpills.
- CanFold =3D false;
- break;
- }
- FoundUse =3D true;
- }
- }
- // Fold the store into the def if possible.
- bool Folded =3D false;
- if (CanFold && !Ops.empty()) {
- if (tryFoldMemoryOperand(MI, vrm, NULL, index, Ops, true, Slot,V=
Reg)){
- Folded =3D true;
- if (FoundUse) {
- // Also folded uses, do not issue a load.
- eraseRestoreInfo(Id, index, VReg, RestoreMBBs, RestoreIdxes);
- nI.removeRange(index.getLoadIndex(), index.getDefIndex());
- }
- nI.removeRange(index.getDefIndex(), index.getStoreIndex());
- }
- }
-
- // Otherwise tell the spiller to issue a spill.
- if (!Folded) {
- LiveRange *LR =3D &nI.ranges[nI.ranges.size()-1];
- bool isKill =3D LR->end =3D=3D index.getStoreIndex();
- if (!MI->registerDefIsDead(nI.reg))
- // No need to spill a dead def.
- vrm.addSpillPoint(VReg, isKill, MI);
- if (isKill)
- AddedKill.insert(&nI);
- }
- }
- Id =3D SpillMBBs.find_next(Id);
- }
- }
-
- int Id =3D RestoreMBBs.find_first();
- while (Id !=3D -1) {
- std::vector<SRInfo> &restores =3D RestoreIdxes[Id];
- for (unsigned i =3D 0, e =3D restores.size(); i !=3D e; ++i) {
- SlotIndex index =3D restores[i].index;
- if (index =3D=3D SlotIndex())
- continue;
- unsigned VReg =3D restores[i].vreg;
- LiveInterval &nI =3D getOrCreateInterval(VReg);
- bool isReMat =3D vrm.isReMaterialized(VReg);
- MachineInstr *MI =3D getInstructionFromIndex(index);
- bool CanFold =3D false;
- Ops.clear();
- if (restores[i].canFold) {
- CanFold =3D true;
- for (unsigned j =3D 0, ee =3D MI->getNumOperands(); j !=3D ee; ++j=
) {
- MachineOperand &MO =3D MI->getOperand(j);
- if (!MO.isReg() || MO.getReg() !=3D VReg)
- continue;
-
- if (MO.isDef()) {
- // If this restore were to be folded, it would have been folded
- // already.
- CanFold =3D false;
- break;
- }
- Ops.push_back(j);
- }
- }
-
- // Fold the load into the use if possible.
- bool Folded =3D false;
- if (CanFold && !Ops.empty()) {
- if (!isReMat)
- Folded =3D tryFoldMemoryOperand(MI, vrm, NULL,index,Ops,true,Slo=
t,VReg);
- else {
- MachineInstr *ReMatDefMI =3D vrm.getReMaterializedMI(VReg);
- int LdSlot =3D 0;
- bool isLoadSS =3D tii_->isLoadFromStackSlot(ReMatDefMI, LdSlot);
- // If the rematerializable def is a load, also try to fold it.
- if (isLoadSS || ReMatDefMI->getDesc().canFoldAsLoad())
- Folded =3D tryFoldMemoryOperand(MI, vrm, ReMatDefMI, index,
- Ops, isLoadSS, LdSlot, VReg);
- if (!Folded) {
- unsigned ImpUse =3D getReMatImplicitUse(li, ReMatDefMI);
- if (ImpUse) {
- // Re-matting an instruction with virtual register use. Add =
the
- // register as an implicit use on the use MI and mark the re=
gister
- // interval as unspillable.
- LiveInterval &ImpLi =3D getInterval(ImpUse);
- ImpLi.markNotSpillable();
- MI->addOperand(MachineOperand::CreateReg(ImpUse, false, true=
));
- }
- }
- }
- }
- // If folding is not possible / failed, then tell the spiller to iss=
ue a
- // load / rematerialization for us.
- if (Folded)
- nI.removeRange(index.getLoadIndex(), index.getDefIndex());
- else
- vrm.addRestorePoint(VReg, MI);
- }
- Id =3D RestoreMBBs.find_next(Id);
- }
-
- // Finalize intervals: add kills, finalize spill weights, and filter out
- // dead intervals.
- std::vector<LiveInterval*> RetNewLIs;
- for (unsigned i =3D 0, e =3D NewLIs.size(); i !=3D e; ++i) {
- LiveInterval *LI =3D NewLIs[i];
- if (!LI->empty()) {
- if (!AddedKill.count(LI)) {
- LiveRange *LR =3D &LI->ranges[LI->ranges.size()-1];
- SlotIndex LastUseIdx =3D LR->end.getBaseIndex();
- MachineInstr *LastUse =3D getInstructionFromIndex(LastUseIdx);
- int UseIdx =3D LastUse->findRegisterUseOperandIdx(LI->reg, false);
- assert(UseIdx !=3D -1);
- if (!LastUse->isRegTiedToDefOperand(UseIdx)) {
- LastUse->getOperand(UseIdx).setIsKill();
- vrm.addKillPoint(LI->reg, LastUseIdx);
- }
- }
- RetNewLIs.push_back(LI);
- }
- }
-
- handleSpilledImpDefs(li, vrm, rc, RetNewLIs);
- normalizeSpillWeights(RetNewLIs);
- return RetNewLIs;
-}
-
-/// hasAllocatableSuperReg - Return true if the specified physical registe=
r has
-/// any super register that's allocatable.
-bool LiveIntervals::hasAllocatableSuperReg(unsigned Reg) const {
- for (const unsigned* AS =3D tri_->getSuperRegisters(Reg); *AS; ++AS)
- if (allocatableRegs_[*AS] && hasInterval(*AS))
- return true;
- return false;
-}
-
-/// getRepresentativeReg - Find the largest super register of the specified
-/// physical register.
-unsigned LiveIntervals::getRepresentativeReg(unsigned Reg) const {
- // Find the largest super-register that is allocatable.
- unsigned BestReg =3D Reg;
- for (const unsigned* AS =3D tri_->getSuperRegisters(Reg); *AS; ++AS) {
- unsigned SuperReg =3D *AS;
- if (!hasAllocatableSuperReg(SuperReg) && hasInterval(SuperReg)) {
- BestReg =3D SuperReg;
- break;
- }
- }
- return BestReg;
-}
-
-/// getNumConflictsWithPhysReg - Return the number of uses and defs of the
-/// specified interval that conflicts with the specified physical register.
-unsigned LiveIntervals::getNumConflictsWithPhysReg(const LiveInterval &li,
- unsigned PhysReg) const=
{
- unsigned NumConflicts =3D 0;
- const LiveInterval &pli =3D getInterval(getRepresentativeReg(PhysReg));
- for (MachineRegisterInfo::reg_iterator I =3D mri_->reg_begin(li.reg),
- E =3D mri_->reg_end(); I !=3D E; ++I) {
- MachineOperand &O =3D I.getOperand();
- MachineInstr *MI =3D O.getParent();
- if (MI->isDebugValue())
- continue;
- SlotIndex Index =3D getInstructionIndex(MI);
- if (pli.liveAt(Index))
- ++NumConflicts;
- }
- return NumConflicts;
-}
-
-/// spillPhysRegAroundRegDefsUses - Spill the specified physical register
-/// around all defs and uses of the specified interval. Return true if it
-/// was able to cut its interval.
-bool LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li,
- unsigned PhysReg, VirtRegMap &=
vrm) {
- unsigned SpillReg =3D getRepresentativeReg(PhysReg);
-
- DEBUG(dbgs() << "spillPhysRegAroundRegDefsUses " << tri_->getName(PhysRe=
g)
- << " represented by " << tri_->getName(SpillReg) << '\n');
-
- for (const unsigned *AS =3D tri_->getAliasSet(PhysReg); *AS; ++AS)
- // If there are registers which alias PhysReg, but which are not a
- // sub-register of the chosen representative super register. Assert
- // since we can't handle it yet.
- assert(*AS =3D=3D SpillReg || !allocatableRegs_[*AS] || !hasInterval(*=
AS) ||
- tri_->isSuperRegister(*AS, SpillReg));
-
- bool Cut =3D false;
- SmallVector<unsigned, 4> PRegs;
- if (hasInterval(SpillReg))
- PRegs.push_back(SpillReg);
- for (const unsigned *SR =3D tri_->getSubRegisters(SpillReg); *SR; ++SR)
- if (hasInterval(*SR))
- PRegs.push_back(*SR);
-
- DEBUG({
- dbgs() << "Trying to spill:";
- for (unsigned i =3D 0, e =3D PRegs.size(); i !=3D e; ++i)
- dbgs() << ' ' << tri_->getName(PRegs[i]);
- dbgs() << '\n';
- });
-
- SmallPtrSet<MachineInstr*, 8> SeenMIs;
- for (MachineRegisterInfo::reg_iterator I =3D mri_->reg_begin(li.reg),
- E =3D mri_->reg_end(); I !=3D E; ++I) {
- MachineOperand &O =3D I.getOperand();
- MachineInstr *MI =3D O.getParent();
- if (MI->isDebugValue() || SeenMIs.count(MI))
- continue;
- SeenMIs.insert(MI);
- SlotIndex Index =3D getInstructionIndex(MI);
- bool LiveReg =3D false;
- for (unsigned i =3D 0, e =3D PRegs.size(); i !=3D e; ++i) {
- unsigned PReg =3D PRegs[i];
- LiveInterval &pli =3D getInterval(PReg);
- if (!pli.liveAt(Index))
- continue;
- LiveReg =3D true;
- SlotIndex StartIdx =3D Index.getLoadIndex();
- SlotIndex EndIdx =3D Index.getNextIndex().getBaseIndex();
- if (!pli.isInOneLiveRange(StartIdx, EndIdx)) {
- std::string msg;
- raw_string_ostream Msg(msg);
- Msg << "Ran out of registers during register allocation!";
- if (MI->isInlineAsm()) {
- Msg << "\nPlease check your inline asm statement for invalid "
- << "constraints:\n";
- MI->print(Msg, tm_);
- }
- report_fatal_error(Msg.str());
- }
- pli.removeRange(StartIdx, EndIdx);
- LiveReg =3D true;
- }
- if (!LiveReg)
- continue;
- DEBUG(dbgs() << "Emergency spill around " << Index << '\t' << *MI);
- vrm.addEmergencySpill(SpillReg, MI);
- Cut =3D true;
- }
- return Cut;
-}
-
LiveRange LiveIntervals::addLiveRangeToEndOfBlock(unsigned reg,
MachineInstr* startInst)=
{
LiveInterval& Interval =3D getOrCreateInterval(reg);
VNInfo* VN =3D Interval.getNextValue(
- SlotIndex(getInstructionIndex(startInst).getDefIndex()),
- startInst, getVNInfoAllocator());
+ SlotIndex(getInstructionIndex(startInst).getRegSlot()),
+ getVNInfoAllocator());
VN->setHasPHIKill(true);
LiveRange LR(
- SlotIndex(getInstructionIndex(startInst).getDefIndex()),
+ SlotIndex(getInstructionIndex(startInst).getRegSlot()),
getMBBEndIdx(startInst->getParent()), VN);
Interval.addRange(LR);
=20
return LR;
}
=20
+
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+// Register mask functions
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+
+bool LiveIntervals::checkRegMaskInterference(LiveInterval &LI,
+ BitVector &UsableRegs) {
+ if (LI.empty())
+ return false;
+ LiveInterval::iterator LiveI =3D LI.begin(), LiveE =3D LI.end();
+
+ // Use a smaller arrays for local live ranges.
+ ArrayRef<SlotIndex> Slots;
+ ArrayRef<const uint32_t*> Bits;
+ if (MachineBasicBlock *MBB =3D intervalIsInOneMBB(LI)) {
+ Slots =3D getRegMaskSlotsInBlock(MBB->getNumber());
+ Bits =3D getRegMaskBitsInBlock(MBB->getNumber());
+ } else {
+ Slots =3D getRegMaskSlots();
+ Bits =3D getRegMaskBits();
+ }
+
+ // We are going to enumerate all the register mask slots contained in LI.
+ // Start with a binary search of RegMaskSlots to find a starting point.
+ ArrayRef<SlotIndex>::iterator SlotI =3D
+ std::lower_bound(Slots.begin(), Slots.end(), LiveI->start);
+ ArrayRef<SlotIndex>::iterator SlotE =3D Slots.end();
+
+ // No slots in range, LI begins after the last call.
+ if (SlotI =3D=3D SlotE)
+ return false;
+
+ bool Found =3D false;
+ for (;;) {
+ assert(*SlotI >=3D LiveI->start);
+ // Loop over all slots overlapping this segment.
+ while (*SlotI < LiveI->end) {
+ // *SlotI overlaps LI. Collect mask bits.
+ if (!Found) {
+ // This is the first overlap. Initialize UsableRegs to all ones.
+ UsableRegs.clear();
+ UsableRegs.resize(tri_->getNumRegs(), true);
+ Found =3D true;
+ }
+ // Remove usable registers clobbered by this mask.
+ UsableRegs.clearBitsNotInMask(Bits[SlotI-Slots.begin()]);
+ if (++SlotI =3D=3D SlotE)
+ return Found;
+ }
+ // *SlotI is beyond the current LI segment.
+ LiveI =3D LI.advanceTo(LiveI, *SlotI);
+ if (LiveI =3D=3D LiveE)
+ return Found;
+ // Advance SlotI until it overlaps.
+ while (*SlotI < LiveI->start)
+ if (++SlotI =3D=3D SlotE)
+ return Found;
+ }
+}
+
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+// IntervalUpdate class.
+//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+
+// HMEditor is a toolkit used by handleMove to trim or extend live interva=
ls.
+class LiveIntervals::HMEditor {
+private:
+ LiveIntervals& LIS;
+ const MachineRegisterInfo& MRI;
+ const TargetRegisterInfo& TRI;
+ SlotIndex NewIdx;
+
+ typedef std::pair<LiveInterval*, LiveRange*> IntRangePair;
+ typedef DenseSet<IntRangePair> RangeSet;
+
+ struct RegRanges {
+ LiveRange* Use;
+ LiveRange* EC;
+ LiveRange* Dead;
+ LiveRange* Def;
+ RegRanges() : Use(0), EC(0), Dead(0), Def(0) {}
+ };
+ typedef DenseMap<unsigned, RegRanges> BundleRanges;
+
+public:
+ HMEditor(LiveIntervals& LIS, const MachineRegisterInfo& MRI,
+ const TargetRegisterInfo& TRI, SlotIndex NewIdx)
+ : LIS(LIS), MRI(MRI), TRI(TRI), NewIdx(NewIdx) {}
+
+ // Update intervals for all operands of MI from OldIdx to NewIdx.
+ // This assumes that MI used to be at OldIdx, and now resides at
+ // NewIdx.
+ void moveAllRangesFrom(MachineInstr* MI, SlotIndex OldIdx) {
+ assert(NewIdx !=3D OldIdx && "No-op move? That's a bit strange.");
+
+ // Collect the operands.
+ RangeSet Entering, Internal, Exiting;
+ bool hasRegMaskOp =3D false;
+ collectRanges(MI, Entering, Internal, Exiting, hasRegMaskOp, OldIdx);
+
+ // To keep the LiveRanges valid within an interval, move the ranges cl=
osest
+ // to the destination first. This prevents ranges from overlapping, to=
that
+ // APIs like removeRange still work.
+ if (NewIdx < OldIdx) {
+ moveAllEnteringFrom(OldIdx, Entering);
+ moveAllInternalFrom(OldIdx, Internal);
+ moveAllExitingFrom(OldIdx, Exiting);
+ }
+ else {
+ moveAllExitingFrom(OldIdx, Exiting);
+ moveAllInternalFrom(OldIdx, Internal);
+ moveAllEnteringFrom(OldIdx, Entering);
+ }
+
+ if (hasRegMaskOp)
+ updateRegMaskSlots(OldIdx);
+
+#ifndef NDEBUG
+ LIValidator validator;
+ std::for_each(Entering.begin(), Entering.end(), validator);
+ std::for_each(Internal.begin(), Internal.end(), validator);
+ std::for_each(Exiting.begin(), Exiting.end(), validator);
+ assert(validator.rangesOk() && "moveAllOperandsFrom broke liveness.");
+#endif
+
+ }
+
+ // Update intervals for all operands of MI to refer to BundleStart's
+ // SlotIndex.
+ void moveAllRangesInto(MachineInstr* MI, MachineInstr* BundleStart) {
+ if (MI =3D=3D BundleStart)
+ return; // Bundling instr with itself - nothing to do.
+
+ SlotIndex OldIdx =3D LIS.getSlotIndexes()->getInstructionIndex(MI);
+ assert(LIS.getSlotIndexes()->getInstructionFromIndex(OldIdx) =3D=3D MI=
&&
+ "SlotIndex <-> Instruction mapping broken for MI");
+
+ // Collect all ranges already in the bundle.
+ MachineBasicBlock::instr_iterator BII(BundleStart);
+ RangeSet Entering, Internal, Exiting;
+ bool hasRegMaskOp =3D false;
+ collectRanges(BII, Entering, Internal, Exiting, hasRegMaskOp, NewIdx);
+ assert(!hasRegMaskOp && "Can't have RegMask operand in bundle.");
+ for (++BII; &*BII =3D=3D MI || BII->isInsideBundle(); ++BII) {
+ if (&*BII =3D=3D MI)
+ continue;
+ collectRanges(BII, Entering, Internal, Exiting, hasRegMaskOp, NewIdx=
);
+ assert(!hasRegMaskOp && "Can't have RegMask operand in bundle.");
+ }
+
+ BundleRanges BR =3D createBundleRanges(Entering, Internal, Exiting);
+
+ collectRanges(MI, Entering, Internal, Exiting, hasRegMaskOp, OldIdx);
+ assert(!hasRegMaskOp && "Can't have RegMask operand in bundle.");
+
+ DEBUG(dbgs() << "Entering: " << Entering.size() << "\n");
+ DEBUG(dbgs() << "Internal: " << Internal.size() << "\n");
+ DEBUG(dbgs() << "Exiting: " << Exiting.size() << "\n");
+
+ moveAllEnteringFromInto(OldIdx, Entering, BR);
+ moveAllInternalFromInto(OldIdx, Internal, BR);
+ moveAllExitingFromInto(OldIdx, Exiting, BR);
+
+
+#ifndef NDEBUG
+ LIValidator validator;
+ std::for_each(Entering.begin(), Entering.end(), validator);
+ std::for_each(Internal.begin(), Internal.end(), validator);
+ std::for_each(Exiting.begin(), Exiting.end(), validator);
+ assert(validator.rangesOk() && "moveAllOperandsInto broke liveness.");
+#endif
+ }
+
+private:
+
+#ifndef NDEBUG
+ class LIValidator {
+ private:
+ DenseSet<const LiveInterval*> Checked, Bogus;
+ public:
+ void operator()(const IntRangePair& P) {
+ const LiveInterval* LI =3D P.first;
+ if (Checked.count(LI))
+ return;
+ Checked.insert(LI);
+ if (LI->empty())
+ return;
+ SlotIndex LastEnd =3D LI->begin()->start;
+ for (LiveInterval::const_iterator LRI =3D LI->begin(), LRE =3D LI->e=
nd();
+ LRI !=3D LRE; ++LRI) {
+ const LiveRange& LR =3D *LRI;
+ if (LastEnd > LR.start || LR.start >=3D LR.end)
+ Bogus.insert(LI);
+ LastEnd =3D LR.end;
+ }
+ }
+
+ bool rangesOk() const {
+ return Bogus.empty();
+ }
+ };
+#endif
+
+ // Collect IntRangePairs for all operands of MI that may need fixing.
+ // Treat's MI's index as OldIdx (regardless of what it is in SlotIndexes'
+ // maps).
+ void collectRanges(MachineInstr* MI, RangeSet& Entering, RangeSet& Inter=
nal,
+ RangeSet& Exiting, bool& hasRegMaskOp, SlotIndex OldI=
dx) {
+ hasRegMaskOp =3D false;
+ for (MachineInstr::mop_iterator MOI =3D MI->operands_begin(),
+ MOE =3D MI->operands_end();
+ MOI !=3D MOE; ++MOI) {
+ const MachineOperand& MO =3D *MOI;
+
+ if (MO.isRegMask()) {
+ hasRegMaskOp =3D true;
+ continue;
+ }
+
+ if (!MO.isReg() || MO.getReg() =3D=3D 0)
+ continue;
+
+ unsigned Reg =3D MO.getReg();
+
+ // TODO: Currently we're skipping uses that are reserved or have no
+ // interval, but we're not updating their kills. This should be
+ // fixed.
+ if (!LIS.hasInterval(Reg) ||
+ (TargetRegisterInfo::isPhysicalRegister(Reg) && LIS.isReserved(R=
eg)))
+ continue;
+
+ LiveInterval* LI =3D &LIS.getInterval(Reg);
+
+ if (MO.readsReg()) {
+ LiveRange* LR =3D LI->getLiveRangeContaining(OldIdx);
+ if (LR !=3D 0)
+ Entering.insert(std::make_pair(LI, LR));
+ }
+ if (MO.isDef()) {
+ if (MO.isEarlyClobber()) {
+ LiveRange* LR =3D LI->getLiveRangeContaining(OldIdx.getRegSlot(t=
rue));
+ assert(LR !=3D 0 && "No EC range?");
+ if (LR->end > OldIdx.getDeadSlot())
+ Exiting.insert(std::make_pair(LI, LR));
+ else
+ Internal.insert(std::make_pair(LI, LR));
+ } else if (MO.isDead()) {
+ LiveRange* LR =3D LI->getLiveRangeContaining(OldIdx.getRegSlot()=
);
+ assert(LR !=3D 0 && "No dead-def range?");
+ Internal.insert(std::make_pair(LI, LR));
+ } else {
+ LiveRange* LR =3D LI->getLiveRangeContaining(OldIdx.getDeadSlot(=
));
+ assert(LR && LR->end > OldIdx.getDeadSlot() &&
+ "Non-dead-def should have live range exiting.");
+ Exiting.insert(std::make_pair(LI, LR));
+ }
+ }
+ }
+ }
+
+ // Collect IntRangePairs for all operands of MI that may need fixing.
+ void collectRangesInBundle(MachineInstr* MI, RangeSet& Entering,
+ RangeSet& Exiting, SlotIndex MIStartIdx,
+ SlotIndex MIEndIdx) {
+ for (MachineInstr::mop_iterator MOI =3D MI->operands_begin(),
+ MOE =3D MI->operands_end();
+ MOI !=3D MOE; ++MOI) {
+ const MachineOperand& MO =3D *MOI;
+ assert(!MO.isRegMask() && "Can't have RegMasks in bundles.");
+ if (!MO.isReg() || MO.getReg() =3D=3D 0)
+ continue;
+
+ unsigned Reg =3D MO.getReg();
+
+ // TODO: Currently we're skipping uses that are reserved or have no
+ // interval, but we're not updating their kills. This should be
+ // fixed.
+ if (!LIS.hasInterval(Reg) ||
+ (TargetRegisterInfo::isPhysicalRegister(Reg) && LIS.isReserved(R=
eg)))
+ continue;
+
+ LiveInterval* LI =3D &LIS.getInterval(Reg);
+
+ if (MO.readsReg()) {
+ LiveRange* LR =3D LI->getLiveRangeContaining(MIStartIdx);
+ if (LR !=3D 0)
+ Entering.insert(std::make_pair(LI, LR));
+ }
+ if (MO.isDef()) {
+ assert(!MO.isEarlyClobber() && "Early clobbers not allowed in bund=
les.");
+ assert(!MO.isDead() && "Dead-defs not allowed in bundles.");
+ LiveRange* LR =3D LI->getLiveRangeContaining(MIEndIdx.getDeadSlot(=
));
+ assert(LR !=3D 0 && "Internal ranges not allowed in bundles.");
+ Exiting.insert(std::make_pair(LI, LR));
+ }
+ }
+ }
+
+ BundleRanges createBundleRanges(RangeSet& Entering, RangeSet& Internal, =
RangeSet& Exiting) {
+ BundleRanges BR;
+
+ for (RangeSet::iterator EI =3D Entering.begin(), EE =3D Entering.end();
+ EI !=3D EE; ++EI) {
+ LiveInterval* LI =3D EI->first;
+ LiveRange* LR =3D EI->second;
+ BR[LI->reg].Use =3D LR;
+ }
+
+ for (RangeSet::iterator II =3D Internal.begin(), IE =3D Internal.end();
+ II !=3D IE; ++II) {
+ LiveInterval* LI =3D II->first;
+ LiveRange* LR =3D II->second;
+ if (LR->end.isDead()) {
+ BR[LI->reg].Dead =3D LR;
+ } else {
+ BR[LI->reg].EC =3D LR;
+ }
+ }
+
+ for (RangeSet::iterator EI =3D Exiting.begin(), EE =3D Exiting.end();
+ EI !=3D EE; ++EI) {
+ LiveInterval* LI =3D EI->first;
+ LiveRange* LR =3D EI->second;
+ BR[LI->reg].Def =3D LR;
+ }
+
+ return BR;
+ }
+
+ void moveKillFlags(unsigned reg, SlotIndex OldIdx, SlotIndex newKillIdx)=
{
+ MachineInstr* OldKillMI =3D LIS.getInstructionFromIndex(OldIdx);
+ if (!OldKillMI->killsRegister(reg))
+ return; // Bail out if we don't have kill flags on the old register.
+ MachineInstr* NewKillMI =3D LIS.getInstructionFromIndex(newKillIdx);
+ assert(OldKillMI->killsRegister(reg) && "Old 'kill' instr isn't a kill=
.");
+ assert(!NewKillMI->killsRegister(reg) && "New kill instr is already a =
kill.");
+ OldKillMI->clearRegisterKills(reg, &TRI);
+ NewKillMI->addRegisterKilled(reg, &TRI);
+ }
+
+ void updateRegMaskSlots(SlotIndex OldIdx) {
+ SmallVectorImpl<SlotIndex>::iterator RI =3D
+ std::lower_bound(LIS.RegMaskSlots.begin(), LIS.RegMaskSlots.end(),
+ OldIdx);
+ assert(*RI =3D=3D OldIdx && "No RegMask at OldIdx.");
+ *RI =3D NewIdx;
+ assert(*prior(RI) < *RI && *RI < *next(RI) &&
+ "RegSlots out of order. Did you move one call across another?");
+ }
+
+ // Return the last use of reg between NewIdx and OldIdx.
+ SlotIndex findLastUseBefore(unsigned Reg, SlotIndex OldIdx) {
+ SlotIndex LastUse =3D NewIdx;
+ for (MachineRegisterInfo::use_nodbg_iterator
+ UI =3D MRI.use_nodbg_begin(Reg),
+ UE =3D MRI.use_nodbg_end();
+ UI !=3D UE; UI.skipInstruction()) {
+ const MachineInstr* MI =3D &*UI;
+ SlotIndex InstSlot =3D LIS.getSlotIndexes()->getInstructionIndex(MI);
+ if (InstSlot > LastUse && InstSlot < OldIdx)
+ LastUse =3D InstSlot;
+ }
+ return LastUse;
+ }
+
+ void moveEnteringUpFrom(SlotIndex OldIdx, IntRangePair& P) {
+ LiveInterval* LI =3D P.first;
+ LiveRange* LR =3D P.second;
+ bool LiveThrough =3D LR->end > OldIdx.getRegSlot();
+ if (LiveThrough)
+ return;
+ SlotIndex LastUse =3D findLastUseBefore(LI->reg, OldIdx);
+ if (LastUse !=3D NewIdx)
+ moveKillFlags(LI->reg, NewIdx, LastUse);
+ LR->end =3D LastUse.getRegSlot();
+ }
+
+ void moveEnteringDownFrom(SlotIndex OldIdx, IntRangePair& P) {
+ LiveInterval* LI =3D P.first;
+ LiveRange* LR =3D P.second;
+ // Extend the LiveRange if NewIdx is past the end.
+ if (NewIdx > LR->end) {
+ // Move kill flags if OldIdx was not originally the end
+ // (otherwise LR->end points to an invalid slot).
+ if (LR->end.getRegSlot() !=3D OldIdx.getRegSlot()) {
+ assert(LR->end > OldIdx && "LiveRange does not cover original slot=
");
+ moveKillFlags(LI->reg, LR->end, NewIdx);
+ }
+ LR->end =3D NewIdx.getRegSlot();
+ }
+ }
+
+ void moveAllEnteringFrom(SlotIndex OldIdx, RangeSet& Entering) {
+ bool GoingUp =3D NewIdx < OldIdx;
+
+ if (GoingUp) {
+ for (RangeSet::iterator EI =3D Entering.begin(), EE =3D Entering.end=
();
+ EI !=3D EE; ++EI)
+ moveEnteringUpFrom(OldIdx, *EI);
+ } else {
+ for (RangeSet::iterator EI =3D Entering.begin(), EE =3D Entering.end=
();
+ EI !=3D EE; ++EI)
+ moveEnteringDownFrom(OldIdx, *EI);
+ }
+ }
+
+ void moveInternalFrom(SlotIndex OldIdx, IntRangePair& P) {
+ LiveInterval* LI =3D P.first;
+ LiveRange* LR =3D P.second;
+ assert(OldIdx < LR->start && LR->start < OldIdx.getDeadSlot() &&
+ LR->end <=3D OldIdx.getDeadSlot() &&
+ "Range should be internal to OldIdx.");
+ LiveRange Tmp(*LR);
+ Tmp.start =3D NewIdx.getRegSlot(LR->start.isEarlyClobber());
+ Tmp.valno->def =3D Tmp.start;
+ Tmp.end =3D LR->end.isDead() ? NewIdx.getDeadSlot() : NewIdx.getRegSlo=
t();
+ LI->removeRange(*LR);
+ LI->addRange(Tmp);
+ }
+
+ void moveAllInternalFrom(SlotIndex OldIdx, RangeSet& Internal) {
+ for (RangeSet::iterator II =3D Internal.begin(), IE =3D Internal.end();
+ II !=3D IE; ++II)
+ moveInternalFrom(OldIdx, *II);
+ }
+
+ void moveExitingFrom(SlotIndex OldIdx, IntRangePair& P) {
+ LiveRange* LR =3D P.second;
+ assert(OldIdx < LR->start && LR->start < OldIdx.getDeadSlot() &&
+ "Range should start in OldIdx.");
+ assert(LR->end > OldIdx.getDeadSlot() && "Range should exit OldIdx.");
+ SlotIndex NewStart =3D NewIdx.getRegSlot(LR->start.isEarlyClobber());
+ LR->start =3D NewStart;
+ LR->valno->def =3D NewStart;
+ }
+
+ void moveAllExitingFrom(SlotIndex OldIdx, RangeSet& Exiting) {
+ for (RangeSet::iterator EI =3D Exiting.begin(), EE =3D Exiting.end();
+ EI !=3D EE; ++EI)
+ moveExitingFrom(OldIdx, *EI);
+ }
+
+ void moveEnteringUpFromInto(SlotIndex OldIdx, IntRangePair& P,
+ BundleRanges& BR) {
+ LiveInterval* LI =3D P.first;
+ LiveRange* LR =3D P.second;
+ bool LiveThrough =3D LR->end > OldIdx.getRegSlot();
+ if (LiveThrough) {
+ assert((LR->start < NewIdx || BR[LI->reg].Def =3D=3D LR) &&
+ "Def in bundle should be def range.");
+ assert((BR[LI->reg].Use =3D=3D 0 || BR[LI->reg].Use =3D=3D LR) &&
+ "If bundle has use for this reg it should be LR.");
+ BR[LI->reg].Use =3D LR;
+ return;
+ }
+
+ SlotIndex LastUse =3D findLastUseBefore(LI->reg, OldIdx);
+ moveKillFlags(LI->reg, OldIdx, LastUse);
+
+ if (LR->start < NewIdx) {
+ // Becoming a new entering range.
+ assert(BR[LI->reg].Dead =3D=3D 0 && BR[LI->reg].Def =3D=3D 0 &&
+ "Bundle shouldn't be re-defining reg mid-range.");
+ assert((BR[LI->reg].Use =3D=3D 0 || BR[LI->reg].Use =3D=3D LR) &&
+ "Bundle shouldn't have different use range for same reg.");
+ LR->end =3D LastUse.getRegSlot();
+ BR[LI->reg].Use =3D LR;
+ } else {
+ // Becoming a new Dead-def.
+ assert(LR->start =3D=3D NewIdx.getRegSlot(LR->start.isEarlyClobber()=
) &&
+ "Live range starting at unexpected slot.");
+ assert(BR[LI->reg].Def =3D=3D LR && "Reg should have def range.");
+ assert(BR[LI->reg].Dead =3D=3D 0 &&
+ "Can't have def and dead def of same reg in a bundle.");
+ LR->end =3D LastUse.getDeadSlot();
+ BR[LI->reg].Dead =3D BR[LI->reg].Def;
+ BR[LI->reg].Def =3D 0;
+ }
+ }
+
+ void moveEnteringDownFromInto(SlotIndex OldIdx, IntRangePair& P,
+ BundleRanges& BR) {
+ LiveInterval* LI =3D P.first;
+ LiveRange* LR =3D P.second;
+ if (NewIdx > LR->end) {
+ // Range extended to bundle. Add to bundle uses.
+ // Note: Currently adds kill flags to bundle start.
+ assert(BR[LI->reg].Use =3D=3D 0 &&
+ "Bundle already has use range for reg.");
+ moveKillFlags(LI->reg, LR->end, NewIdx);
+ LR->end =3D NewIdx.getRegSlot();
+ BR[LI->reg].Use =3D LR;
+ } else {
+ assert(BR[LI->reg].Use !=3D 0 &&
+ "Bundle should already have a use range for reg.");
+ }
+ }
+
+ void moveAllEnteringFromInto(SlotIndex OldIdx, RangeSet& Entering,
+ BundleRanges& BR) {
+ bool GoingUp =3D NewIdx < OldIdx;
+
+ if (GoingUp) {
+ for (RangeSet::iterator EI =3D Entering.begin(), EE =3D Entering.end=
();
+ EI !=3D EE; ++EI)
+ moveEnteringUpFromInto(OldIdx, *EI, BR);
+ } else {
+ for (RangeSet::iterator EI =3D Entering.begin(), EE =3D Entering.end=
();
+ EI !=3D EE; ++EI)
+ moveEnteringDownFromInto(OldIdx, *EI, BR);
+ }
+ }
+
+ void moveInternalFromInto(SlotIndex OldIdx, IntRangePair& P,
+ BundleRanges& BR) {
+ // TODO: Sane rules for moving ranges into bundles.
+ }
+
+ void moveAllInternalFromInto(SlotIndex OldIdx, RangeSet& Internal,
+ BundleRanges& BR) {
+ for (RangeSet::iterator II =3D Internal.begin(), IE =3D Internal.end();
+ II !=3D IE; ++II)
+ moveInternalFromInto(OldIdx, *II, BR);
+ }
+
+ void moveExitingFromInto(SlotIndex OldIdx, IntRangePair& P,
+ BundleRanges& BR) {
+ LiveInterval* LI =3D P.first;
+ LiveRange* LR =3D P.second;
+
+ assert(LR->start.isRegister() &&
+ "Don't know how to merge exiting ECs into bundles yet.");
+
+ if (LR->end > NewIdx.getDeadSlot()) {
+ // This range is becoming an exiting range on the bundle.
+ // If there was an old dead-def of this reg, delete it.
+ if (BR[LI->reg].Dead !=3D 0) {
+ LI->removeRange(*BR[LI->reg].Dead);
+ BR[LI->reg].Dead =3D 0;
+ }
+ assert(BR[LI->reg].Def =3D=3D 0 &&
+ "Can't have two defs for the same variable exiting a bundle."=
);
+ LR->start =3D NewIdx.getRegSlot();
+ LR->valno->def =3D LR->start;
+ BR[LI->reg].Def =3D LR;
+ } else {
+ // This range is becoming internal to the bundle.
+ assert(LR->end =3D=3D NewIdx.getRegSlot() &&
+ "Can't bundle def whose kill is before the bundle");
+ if (BR[LI->reg].Dead || BR[LI->reg].Def) {
+ // Already have a def for this. Just delete range.
+ LI->removeRange(*LR);
+ } else {
+ // Make range dead, record.
+ LR->end =3D NewIdx.getDeadSlot();
+ BR[LI->reg].Dead =3D LR;
+ assert(BR[LI->reg].Use =3D=3D LR &&
+ "Range becoming dead should currently be use.");
+ }
+ // In both cases the range is no longer a use on the bundle.
+ BR[LI->reg].Use =3D 0;
+ }
+ }
+
+ void moveAllExitingFromInto(SlotIndex OldIdx, RangeSet& Exiting,
+ BundleRanges& BR) {
+ for (RangeSet::iterator EI =3D Exiting.begin(), EE =3D Exiting.end();
+ EI !=3D EE; ++EI)
+ moveExitingFromInto(OldIdx, *EI, BR);
+ }
+
+};
+
+void LiveIntervals::handleMove(MachineInstr* MI) {
+ SlotIndex OldIndex =3D indexes_->getInstructionIndex(MI);
+ indexes_->removeMachineInstrFromMaps(MI);
+ SlotIndex NewIndex =3D MI->isInsideBundle() ?
+ indexes_->getInstructionIndex(MI) :
+ indexes_->insertMachineInstrInMaps(MI);
+ assert(getMBBStartIdx(MI->getParent()) <=3D OldIndex &&
+ OldIndex < getMBBEndIdx(MI->getParent()) &&
+ "Cannot handle moves across basic block boundaries.");
+ assert(!MI->isBundled() && "Can't handle bundled instructions yet.");
+
+ HMEditor HME(*this, *mri_, *tri_, NewIndex);
+ HME.moveAllRangesFrom(MI, OldIndex);
+}
+
+void LiveIntervals::handleMoveIntoBundle(MachineInstr* MI, MachineInstr* B=
undleStart) {
+ SlotIndex NewIndex =3D indexes_->getInstructionIndex(BundleStart);
+ HMEditor HME(*this, *mri_, *tri_, NewIndex);
+ HME.moveAllRangesInto(MI, BundleStart);
+}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/LiveInte=
rvalUnion.cpp
--- a/head/contrib/llvm/lib/CodeGen/LiveIntervalUnion.cpp Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/LiveIntervalUnion.cpp Tue Apr 17 11:51:=
51 2012 +0300
@@ -21,6 +21,8 @@
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetRegisterInfo.h"
=20
+#include <algorithm>
+
using namespace llvm;
=20
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/LiveInte=
rvalUnion.h
--- a/head/contrib/llvm/lib/CodeGen/LiveIntervalUnion.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/LiveIntervalUnion.h Tue Apr 17 11:51:51=
2012 +0300
@@ -20,8 +20,6 @@
#include "llvm/ADT/IntervalMap.h"
#include "llvm/CodeGen/LiveInterval.h"
=20
-#include <algorithm>
-
namespace llvm {
=20
class MachineLoopRange;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/LiveRang=
eCalc.cpp
--- a/head/contrib/llvm/lib/CodeGen/LiveRangeCalc.cpp Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/LiveRangeCalc.cpp Tue Apr 17 11:51:51 2=
012 +0300
@@ -65,7 +65,7 @@
assert(DomTree && "Missing dominator tree");
=20
MachineBasicBlock *KillMBB =3D Indexes->getMBBFromIndex(Kill.getPrevSlot=
());
- assert(Kill && "No MBB at Kill");
+ assert(KillMBB && "No MBB at Kill");
=20
// Is there a def in the same MBB we can extend?
if (LI->extendInBlock(Indexes->getMBBStartIdx(KillMBB), Kill))
@@ -237,7 +237,7 @@
assert(Alloc && "Need VNInfo allocator to create PHI-defs");
SlotIndex Start, End;
tie(Start, End) =3D Indexes->getMBBRange(MBB);
- VNInfo *VNI =3D I->LI->getNextValue(Start, 0, *Alloc);
+ VNInfo *VNI =3D I->LI->getNextValue(Start, *Alloc);
VNI->setIsPHIDef(true);
I->Value =3D VNI;
// This block is done, we know the final value.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/LiveRang=
eEdit.cpp
--- a/head/contrib/llvm/lib/CodeGen/LiveRangeEdit.cpp Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/LiveRangeEdit.cpp Tue Apr 17 11:51:51 2=
012 +0300
@@ -1,4 +1,4 @@
-//=3D=3D=3D--- LiveRangeEdit.cpp - Basic tools for editing a register live=
range --=3D=3D=3D//
+//=3D=3D=3D-- LiveRangeEdit.cpp - Basic tools for editing a register live =
range -=3D=3D=3D//
//
// The LLVM Compiler Infrastructure
//
@@ -12,12 +12,12 @@
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
#define DEBUG_TYPE "regalloc"
-#include "LiveRangeEdit.h"
#include "VirtRegMap.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/CalcSpillWeights.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
+#include "llvm/CodeGen/LiveRangeEdit.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/Debug.h"
@@ -29,13 +29,14 @@
STATISTIC(NumDCEFoldedLoads, "Number of single use loads folded after DCE"=
);
STATISTIC(NumFracRanges, "Number of live ranges fractured by DCE");
=20
-LiveInterval &LiveRangeEdit::createFrom(unsigned OldReg,
- LiveIntervals &LIS,
- VirtRegMap &VRM) {
- MachineRegisterInfo &MRI =3D VRM.getRegInfo();
+void LiveRangeEdit::Delegate::anchor() { }
+
+LiveInterval &LiveRangeEdit::createFrom(unsigned OldReg) {
unsigned VReg =3D MRI.createVirtualRegister(MRI.getRegClass(OldReg));
- VRM.grow();
- VRM.setIsSplitFromReg(VReg, VRM.getOriginal(OldReg));
+ if (VRM) {
+ VRM->grow();
+ VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg));
+ }
LiveInterval &LI =3D LIS.getOrCreateInterval(VReg);
newRegs_.push_back(&LI);
return LI;
@@ -43,37 +44,32 @@
=20
bool LiveRangeEdit::checkRematerializable(VNInfo *VNI,
const MachineInstr *DefMI,
- const TargetInstrInfo &tii,
AliasAnalysis *aa) {
assert(DefMI && "Missing instruction");
scannedRemattable_ =3D true;
- if (!tii.isTriviallyReMaterializable(DefMI, aa))
+ if (!TII.isTriviallyReMaterializable(DefMI, aa))
return false;
remattable_.insert(VNI);
return true;
}
=20
-void LiveRangeEdit::scanRemattable(LiveIntervals &lis,
- const TargetInstrInfo &tii,
- AliasAnalysis *aa) {
+void LiveRangeEdit::scanRemattable(AliasAnalysis *aa) {
for (LiveInterval::vni_iterator I =3D parent_.vni_begin(),
E =3D parent_.vni_end(); I !=3D E; ++I) {
VNInfo *VNI =3D *I;
if (VNI->isUnused())
continue;
- MachineInstr *DefMI =3D lis.getInstructionFromIndex(VNI->def);
+ MachineInstr *DefMI =3D LIS.getInstructionFromIndex(VNI->def);
if (!DefMI)
continue;
- checkRematerializable(VNI, DefMI, tii, aa);
+ checkRematerializable(VNI, DefMI, aa);
}
scannedRemattable_ =3D true;
}
=20
-bool LiveRangeEdit::anyRematerializable(LiveIntervals &lis,
- const TargetInstrInfo &tii,
- AliasAnalysis *aa) {
+bool LiveRangeEdit::anyRematerializable(AliasAnalysis *aa) {
if (!scannedRemattable_)
- scanRemattable(lis, tii, aa);
+ scanRemattable(aa);
return !remattable_.empty();
}
=20
@@ -81,24 +77,18 @@
/// OrigIdx are also available with the same value at UseIdx.
bool LiveRangeEdit::allUsesAvailableAt(const MachineInstr *OrigMI,
SlotIndex OrigIdx,
- SlotIndex UseIdx,
- LiveIntervals &lis) {
- OrigIdx =3D OrigIdx.getUseIndex();
- UseIdx =3D UseIdx.getUseIndex();
+ SlotIndex UseIdx) {
+ OrigIdx =3D OrigIdx.getRegSlot(true);
+ UseIdx =3D UseIdx.getRegSlot(true);
for (unsigned i =3D 0, e =3D OrigMI->getNumOperands(); i !=3D e; ++i) {
const MachineOperand &MO =3D OrigMI->getOperand(i);
if (!MO.isReg() || !MO.getReg() || MO.isDef())
continue;
// Reserved registers are OK.
- if (MO.isUndef() || !lis.hasInterval(MO.getReg()))
+ if (MO.isUndef() || !LIS.hasInterval(MO.getReg()))
continue;
- // We cannot depend on virtual registers in uselessRegs_.
- if (uselessRegs_)
- for (unsigned ui =3D 0, ue =3D uselessRegs_->size(); ui !=3D ue; ++u=
i)
- if ((*uselessRegs_)[ui]->reg =3D=3D MO.getReg())
- return false;
=20
- LiveInterval &li =3D lis.getInterval(MO.getReg());
+ LiveInterval &li =3D LIS.getInterval(MO.getReg());
const VNInfo *OVNI =3D li.getVNInfoAt(OrigIdx);
if (!OVNI)
continue;
@@ -110,8 +100,7 @@
=20
bool LiveRangeEdit::canRematerializeAt(Remat &RM,
SlotIndex UseIdx,
- bool cheapAsAMove,
- LiveIntervals &lis) {
+ bool cheapAsAMove) {
assert(scannedRemattable_ && "Call anyRematerializable first");
=20
// Use scanRemattable info.
@@ -121,19 +110,19 @@
// No defining instruction provided.
SlotIndex DefIdx;
if (RM.OrigMI)
- DefIdx =3D lis.getInstructionIndex(RM.OrigMI);
+ DefIdx =3D LIS.getInstructionIndex(RM.OrigMI);
else {
DefIdx =3D RM.ParentVNI->def;
- RM.OrigMI =3D lis.getInstructionFromIndex(DefIdx);
+ RM.OrigMI =3D LIS.getInstructionFromIndex(DefIdx);
assert(RM.OrigMI && "No defining instruction for remattable value");
}
=20
// If only cheap remats were requested, bail out early.
- if (cheapAsAMove && !RM.OrigMI->getDesc().isAsCheapAsAMove())
+ if (cheapAsAMove && !RM.OrigMI->isAsCheapAsAMove())
return false;
=20
// Verify that all used registers are available with the same values.
- if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx, lis))
+ if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx))
return false;
=20
return true;
@@ -143,27 +132,22 @@
MachineBasicBlock::iterator MI,
unsigned DestReg,
const Remat &RM,
- LiveIntervals &lis,
- const TargetInstrInfo &tii,
const TargetRegisterInfo &tri,
bool Late) {
assert(RM.OrigMI && "Invalid remat");
- tii.reMaterialize(MBB, MI, DestReg, 0, RM.OrigMI, tri);
+ TII.reMaterialize(MBB, MI, DestReg, 0, RM.OrigMI, tri);
rematted_.insert(RM.ParentVNI);
- return lis.getSlotIndexes()->insertMachineInstrInMaps(--MI, Late)
- .getDefIndex();
+ return LIS.getSlotIndexes()->insertMachineInstrInMaps(--MI, Late)
+ .getRegSlot();
}
=20
-void LiveRangeEdit::eraseVirtReg(unsigned Reg, LiveIntervals &LIS) {
+void LiveRangeEdit::eraseVirtReg(unsigned Reg) {
if (delegate_ && delegate_->LRE_CanEraseVirtReg(Reg))
LIS.removeInterval(Reg);
}
=20
bool LiveRangeEdit::foldAsLoad(LiveInterval *LI,
- SmallVectorImpl<MachineInstr*> &Dead,
- MachineRegisterInfo &MRI,
- LiveIntervals &LIS,
- const TargetInstrInfo &TII) {
+ SmallVectorImpl<MachineInstr*> &Dead) {
MachineInstr *DefMI =3D 0, *UseMI =3D 0;
=20
// Check that there is a single def and a single use.
@@ -174,7 +158,7 @@
if (MO.isDef()) {
if (DefMI && DefMI !=3D MI)
return false;
- if (!MI->getDesc().canFoldAsLoad())
+ if (!MI->canFoldAsLoad())
return false;
DefMI =3D MI;
} else if (!MO.isUndef()) {
@@ -209,19 +193,17 @@
}
=20
void LiveRangeEdit::eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead,
- LiveIntervals &LIS, VirtRegMap &VRM,
- const TargetInstrInfo &TII) {
+ ArrayRef<unsigned> RegsBeingSpilled)=
{
SetVector<LiveInterval*,
SmallVector<LiveInterval*, 8>,
SmallPtrSet<LiveInterval*, 8> > ToShrink;
- MachineRegisterInfo &MRI =3D VRM.getRegInfo();
=20
for (;;) {
// Erase all dead defs.
while (!Dead.empty()) {
MachineInstr *MI =3D Dead.pop_back_val();
assert(MI->allDefsAreDead() && "Def isn't really dead");
- SlotIndex Idx =3D LIS.getInstructionIndex(MI).getDefIndex();
+ SlotIndex Idx =3D LIS.getInstructionIndex(MI).getRegSlot();
=20
// Never delete inline asm.
if (MI->isInlineAsm()) {
@@ -265,7 +247,7 @@
LI.removeValNo(VNI);
if (LI.empty()) {
ToShrink.remove(&LI);
- eraseVirtReg(Reg, LIS);
+ eraseVirtReg(Reg);
}
}
}
@@ -284,12 +266,26 @@
// Shrink just one live interval. Then delete new dead defs.
LiveInterval *LI =3D ToShrink.back();
ToShrink.pop_back();
- if (foldAsLoad(LI, Dead, MRI, LIS, TII))
+ if (foldAsLoad(LI, Dead))
continue;
if (delegate_)
delegate_->LRE_WillShrinkVirtReg(LI->reg);
if (!LIS.shrinkToUses(LI, &Dead))
continue;
+ =20
+ // Don't create new intervals for a register being spilled.
+ // The new intervals would have to be spilled anyway so its not worth =
it.
+ // Also they currently aren't spilled so creating them and not spilling
+ // them results in incorrect code.
+ bool BeingSpilled =3D false;
+ for (unsigned i =3D 0, e =3D RegsBeingSpilled.size(); i !=3D e; ++i) {
+ if (LI->reg =3D=3D RegsBeingSpilled[i]) {
+ BeingSpilled =3D true;
+ break;
+ }
+ }
+ =20
+ if (BeingSpilled) continue;
=20
// LI may have been separated, create new intervals.
LI->RenumberValues(LIS);
@@ -298,16 +294,16 @@
if (NumComp <=3D 1)
continue;
++NumFracRanges;
- bool IsOriginal =3D VRM.getOriginal(LI->reg) =3D=3D LI->reg;
+ bool IsOriginal =3D VRM && VRM->getOriginal(LI->reg) =3D=3D LI->reg;
DEBUG(dbgs() << NumComp << " components: " << *LI << '\n');
SmallVector<LiveInterval*, 8> Dups(1, LI);
for (unsigned i =3D 1; i !=3D NumComp; ++i) {
- Dups.push_back(&createFrom(LI->reg, LIS, VRM));
+ Dups.push_back(&createFrom(LI->reg));
// If LI is an original interval that hasn't been split yet, make th=
e new
// intervals their own originals instead of referring to LI. The ori=
ginal
// interval must contain all the split products, and LI doesn't.
if (IsOriginal)
- VRM.setIsSplitFromReg(Dups.back()->reg, 0);
+ VRM->setIsSplitFromReg(Dups.back()->reg, 0);
if (delegate_)
delegate_->LRE_DidCloneVirtReg(Dups.back()->reg, LI->reg);
}
@@ -316,10 +312,8 @@
}
=20
void LiveRangeEdit::calculateRegClassAndHint(MachineFunction &MF,
- LiveIntervals &LIS,
const MachineLoopInfo &Loops)=
{
VirtRegAuxInfo VRAI(MF, LIS, Loops);
- MachineRegisterInfo &MRI =3D MF.getRegInfo();
for (iterator I =3D begin(), E =3D end(); I !=3D E; ++I) {
LiveInterval &LI =3D **I;
if (MRI.recomputeRegClass(LI.reg, MF.getTarget()))
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/LiveVari=
ables.cpp
--- a/head/contrib/llvm/lib/CodeGen/LiveVariables.cpp Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/LiveVariables.cpp Tue Apr 17 11:51:51 2=
012 +0300
@@ -14,7 +14,7 @@
// the instruction, but are never used after the instruction (i.e., they a=
re
// killed).
//
-// This class computes live variables using are sparse implementation base=
d on
+// This class computes live variables using a sparse implementation based =
on
// the machine code SSA form. This class computes live variable informati=
on for
// each virtual and _register allocatable_ physical register in a function=
. It
// uses the dominance properties of SSA form to efficiently compute live
@@ -33,6 +33,7 @@
#include "llvm/Support/Debug.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallSet.h"
@@ -41,6 +42,7 @@
using namespace llvm;
=20
char LiveVariables::ID =3D 0;
+char &llvm::LiveVariablesID =3D LiveVariables::ID;
INITIALIZE_PASS_BEGIN(LiveVariables, "livevars",
"Live Variable Analysis", false, false)
INITIALIZE_PASS_DEPENDENCY(UnreachableMachineBlockElim)
@@ -90,7 +92,7 @@
MachineBasicBlock *MBB,
std::vector<MachineBasicBlock*> &WorkL=
ist) {
unsigned BBNum =3D MBB->getNumber();
- =20
+
// Check to see if this basic block is one of the killing blocks. If so,
// remove it.
for (unsigned i =3D 0, e =3D VRInfo.Kills.size(); i !=3D e; ++i)
@@ -98,7 +100,7 @@
VRInfo.Kills.erase(VRInfo.Kills.begin()+i); // Erase entry
break;
}
- =20
+
if (MBB =3D=3D DefBlock) return; // Terminate recursion
=20
if (VRInfo.AliveBlocks.test(BBNum))
@@ -107,6 +109,7 @@
// Mark the variable known alive in this bb
VRInfo.AliveBlocks.set(BBNum);
=20
+ assert(MBB !=3D &MF->front() && "Can't find reaching def for virtreg");
WorkList.insert(WorkList.end(), MBB->pred_rbegin(), MBB->pred_rend());
}
=20
@@ -130,7 +133,6 @@
unsigned BBNum =3D MBB->getNumber();
=20
VarInfo& VRInfo =3D getVarInfo(reg);
- VRInfo.NumUses++;
=20
// Check to see if this basic block is already a kill block.
if (!VRInfo.Kills.empty() && VRInfo.Kills.back()->getParent() =3D=3D MBB=
) {
@@ -190,7 +192,7 @@
unsigned LastDefReg =3D 0;
unsigned LastDefDist =3D 0;
MachineInstr *LastDef =3D NULL;
- for (const unsigned *SubRegs =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *SubRegs =3D TRI->getSubRegisters(Reg);
unsigned SubReg =3D *SubRegs; ++SubRegs) {
MachineInstr *Def =3D PhysRegDef[SubReg];
if (!Def)
@@ -214,7 +216,7 @@
unsigned DefReg =3D MO.getReg();
if (TRI->isSubRegister(Reg, DefReg)) {
PartDefRegs.insert(DefReg);
- for (const unsigned *SubRegs =3D TRI->getSubRegisters(DefReg);
+ for (const uint16_t *SubRegs =3D TRI->getSubRegisters(DefReg);
unsigned SubReg =3D *SubRegs; ++SubRegs)
PartDefRegs.insert(SubReg);
}
@@ -245,7 +247,7 @@
true/*IsImp*/));
PhysRegDef[Reg] =3D LastPartialDef;
SmallSet<unsigned, 8> Processed;
- for (const unsigned *SubRegs =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *SubRegs =3D TRI->getSubRegisters(Reg);
unsigned SubReg =3D *SubRegs; ++SubRegs) {
if (Processed.count(SubReg))
continue;
@@ -257,20 +259,19 @@
false/*IsDef*=
/,
true/*IsImp*/=
));
PhysRegDef[SubReg] =3D LastPartialDef;
- for (const unsigned *SS =3D TRI->getSubRegisters(SubReg); *SS; ++S=
S)
+ for (const uint16_t *SS =3D TRI->getSubRegisters(SubReg); *SS; ++S=
S)
Processed.insert(*SS);
}
}
- }
- else if (LastDef && !PhysRegUse[Reg] &&
- !LastDef->findRegisterDefOperand(Reg))
+ } else if (LastDef && !PhysRegUse[Reg] &&
+ !LastDef->findRegisterDefOperand(Reg))
// Last def defines the super register, add an implicit def of reg.
- LastDef->addOperand(MachineOperand::CreateReg(Reg,
- true/*IsDef*/, true/*IsIm=
p*/));
+ LastDef->addOperand(MachineOperand::CreateReg(Reg, true/*IsDef*/,
+ true/*IsImp*/));
=20
// Remember this use.
PhysRegUse[Reg] =3D MI;
- for (const unsigned *SubRegs =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *SubRegs =3D TRI->getSubRegisters(Reg);
unsigned SubReg =3D *SubRegs; ++SubRegs)
PhysRegUse[SubReg] =3D MI;
}
@@ -286,7 +287,7 @@
MachineInstr *LastRefOrPartRef =3D LastUse ? LastUse : LastDef;
unsigned LastRefOrPartRefDist =3D DistanceMap[LastRefOrPartRef];
unsigned LastPartDefDist =3D 0;
- for (const unsigned *SubRegs =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *SubRegs =3D TRI->getSubRegisters(Reg);
unsigned SubReg =3D *SubRegs; ++SubRegs) {
MachineInstr *Def =3D PhysRegDef[SubReg];
if (Def && Def !=3D LastDef) {
@@ -331,11 +332,11 @@
// Or whole register is defined, but only partly used.
// AX<dead> =3D AL<imp-def>
// =3D AL<kill>
- // AX =3D=20
+ // AX =3D
MachineInstr *LastPartDef =3D 0;
unsigned LastPartDefDist =3D 0;
SmallSet<unsigned, 8> PartUses;
- for (const unsigned *SubRegs =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *SubRegs =3D TRI->getSubRegisters(Reg);
unsigned SubReg =3D *SubRegs; ++SubRegs) {
MachineInstr *Def =3D PhysRegDef[SubReg];
if (Def && Def !=3D LastDef) {
@@ -350,7 +351,7 @@
}
if (MachineInstr *Use =3D PhysRegUse[SubReg]) {
PartUses.insert(SubReg);
- for (const unsigned *SS =3D TRI->getSubRegisters(SubReg); *SS; ++SS)
+ for (const uint16_t *SS =3D TRI->getSubRegisters(SubReg); *SS; ++SS)
PartUses.insert(*SS);
unsigned Dist =3D DistanceMap[Use];
if (Dist > LastRefOrPartRefDist) {
@@ -366,7 +367,7 @@
// EAX<dead> =3D op AL<imp-def>
// That is, EAX def is dead but AL def extends pass it.
PhysRegDef[Reg]->addRegisterDead(Reg, TRI, true);
- for (const unsigned *SubRegs =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *SubRegs =3D TRI->getSubRegisters(Reg);
unsigned SubReg =3D *SubRegs; ++SubRegs) {
if (!PartUses.count(SubReg))
continue;
@@ -387,11 +388,11 @@
else {
LastRefOrPartRef->addRegisterKilled(SubReg, TRI, true);
PhysRegUse[SubReg] =3D LastRefOrPartRef;
- for (const unsigned *SSRegs =3D TRI->getSubRegisters(SubReg);
+ for (const uint16_t *SSRegs =3D TRI->getSubRegisters(SubReg);
unsigned SSReg =3D *SSRegs; ++SSRegs)
PhysRegUse[SSReg] =3D LastRefOrPartRef;
}
- for (const unsigned *SS =3D TRI->getSubRegisters(SubReg); *SS; ++SS)
+ for (const uint16_t *SS =3D TRI->getSubRegisters(SubReg); *SS; ++SS)
PartUses.erase(*SS);
}
} else if (LastRefOrPartRef =3D=3D PhysRegDef[Reg] && LastRefOrPartRef !=
=3D MI) {
@@ -419,16 +420,37 @@
return true;
}
=20
+void LiveVariables::HandleRegMask(const MachineOperand &MO) {
+ // Call HandlePhysRegKill() for all live registers clobbered by Mask.
+ // Clobbered registers are always dead, sp there is no need to use
+ // HandlePhysRegDef().
+ for (unsigned Reg =3D 1, NumRegs =3D TRI->getNumRegs(); Reg !=3D NumRegs=
; ++Reg) {
+ // Skip dead regs.
+ if (!PhysRegDef[Reg] && !PhysRegUse[Reg])
+ continue;
+ // Skip mask-preserved regs.
+ if (!MO.clobbersPhysReg(Reg))
+ continue;
+ // Kill the largest clobbered super-register.
+ // This avoids needless implicit operands.
+ unsigned Super =3D Reg;
+ for (const uint16_t *SR =3D TRI->getSuperRegisters(Reg); *SR; ++SR)
+ if ((PhysRegDef[*SR] || PhysRegUse[*SR]) && MO.clobbersPhysReg(*SR))
+ Super =3D *SR;
+ HandlePhysRegKill(Super, 0);
+ }
+}
+
void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI,
SmallVector<unsigned, 4> &Defs) {
// What parts of the register are previously defined?
SmallSet<unsigned, 32> Live;
if (PhysRegDef[Reg] || PhysRegUse[Reg]) {
Live.insert(Reg);
- for (const unsigned *SS =3D TRI->getSubRegisters(Reg); *SS; ++SS)
+ for (const uint16_t *SS =3D TRI->getSubRegisters(Reg); *SS; ++SS)
Live.insert(*SS);
} else {
- for (const unsigned *SubRegs =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *SubRegs =3D TRI->getSubRegisters(Reg);
unsigned SubReg =3D *SubRegs; ++SubRegs) {
// If a register isn't itself defined, but all parts that make up of=
it
// are defined, then consider it also defined.
@@ -440,7 +462,7 @@
continue;
if (PhysRegDef[SubReg] || PhysRegUse[SubReg]) {
Live.insert(SubReg);
- for (const unsigned *SS =3D TRI->getSubRegisters(SubReg); *SS; ++S=
S)
+ for (const uint16_t *SS =3D TRI->getSubRegisters(SubReg); *SS; ++S=
S)
Live.insert(*SS);
}
}
@@ -450,7 +472,7 @@
// is referenced.
HandlePhysRegKill(Reg, MI);
// Only some of the sub-registers are used.
- for (const unsigned *SubRegs =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *SubRegs =3D TRI->getSubRegisters(Reg);
unsigned SubReg =3D *SubRegs; ++SubRegs) {
if (!Live.count(SubReg))
// Skip if this sub-register isn't defined.
@@ -469,7 +491,7 @@
Defs.pop_back();
PhysRegDef[Reg] =3D MI;
PhysRegUse[Reg] =3D NULL;
- for (const unsigned *SubRegs =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *SubRegs =3D TRI->getSubRegisters(Reg);
unsigned SubReg =3D *SubRegs; ++SubRegs) {
PhysRegDef[SubReg] =3D MI;
PhysRegUse[SubReg] =3D NULL;
@@ -492,6 +514,12 @@
std::fill(PhysRegUse, PhysRegUse + NumRegs, (MachineInstr*)0);
PHIJoins.clear();
=20
+ // FIXME: LiveIntervals will be updated to remove its dependence on
+ // LiveVariables to improve compilation time and eliminate bizarre pass
+ // dependencies. Until then, we can't change much in -O0.
+ if (!MRI->isSSA())
+ report_fatal_error("regalloc=3D... not currently supported with -O0");
+
analyzePHINodes(mf);
=20
// Calculate live variable information in depth first order on the CFG o=
f the
@@ -536,8 +564,13 @@
// Clear kill and dead markers. LV will recompute them.
SmallVector<unsigned, 4> UseRegs;
SmallVector<unsigned, 4> DefRegs;
+ SmallVector<unsigned, 1> RegMasks;
for (unsigned i =3D 0; i !=3D NumOperandsToProcess; ++i) {
MachineOperand &MO =3D MI->getOperand(i);
+ if (MO.isRegMask()) {
+ RegMasks.push_back(i);
+ continue;
+ }
if (!MO.isReg() || MO.getReg() =3D=3D 0)
continue;
unsigned MOReg =3D MO.getReg();
@@ -559,6 +592,10 @@
HandlePhysRegUse(MOReg, MI);
}
=20
+ // Process all masked registers. (Call clobbers).
+ for (unsigned i =3D 0, e =3D RegMasks.size(); i !=3D e; ++i)
+ HandleRegMask(MI->getOperand(RegMasks[i]));
+
// Process all defs.
for (unsigned i =3D 0, e =3D DefRegs.size(); i !=3D e; ++i) {
unsigned MOReg =3D DefRegs[i];
@@ -590,8 +627,8 @@
// them. The tail callee need not take the same registers as input
// that it produces as output, and there are dependencies for its input
// registers elsewhere.
- if (!MBB->empty() && MBB->back().getDesc().isReturn()
- && !MBB->back().getDesc().isCall()) {
+ if (!MBB->empty() && MBB->back().isReturn()
+ && !MBB->back().isCall()) {
MachineInstr *Ret =3D &MBB->back();
=20
for (MachineRegisterInfo::liveout_iterator
@@ -607,10 +644,27 @@
}
}
=20
+ // MachineCSE may CSE instructions which write to non-allocatable phys=
ical
+ // registers across MBBs. Remember if any reserved register is liveout.
+ SmallSet<unsigned, 4> LiveOuts;
+ for (MachineBasicBlock::const_succ_iterator SI =3D MBB->succ_begin(),
+ SE =3D MBB->succ_end(); SI !=3D SE; ++SI) {
+ MachineBasicBlock *SuccMBB =3D *SI;
+ if (SuccMBB->isLandingPad())
+ continue;
+ for (MachineBasicBlock::livein_iterator LI =3D SuccMBB->livein_begin=
(),
+ LE =3D SuccMBB->livein_end(); LI !=3D LE; ++LI) {
+ unsigned LReg =3D *LI;
+ if (!TRI->isInAllocatableClass(LReg))
+ // Ignore other live-ins, e.g. those that are live into landing =
pads.
+ LiveOuts.insert(LReg);
+ }
+ }
+
// Loop over PhysRegDef / PhysRegUse, killing any registers that are
// available at the end of the basic block.
for (unsigned i =3D 0; i !=3D NumRegs; ++i)
- if (PhysRegDef[i] || PhysRegUse[i])
+ if ((PhysRegDef[i] || PhysRegUse[i]) && !LiveOuts.count(i))
HandlePhysRegDef(i, 0, Defs);
=20
std::fill(PhysRegDef, PhysRegDef + NumRegs, (MachineInstr*)0);
@@ -754,7 +808,7 @@
const unsigned NumNew =3D BB->getNumber();
=20
// All registers used by PHI nodes in SuccBB must be live through BB.
- for (MachineBasicBlock::const_iterator BBI =3D SuccBB->begin(),
+ for (MachineBasicBlock::iterator BBI =3D SuccBB->begin(),
BBE =3D SuccBB->end(); BBI !=3D BBE && BBI->isPHI(); ++BBI)
for (unsigned i =3D 1, e =3D BBI->getNumOperands(); i !=3D e; i +=3D 2)
if (BBI->getOperand(i+1).getMBB() =3D=3D BB)
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/LocalSta=
ckSlotAllocation.cpp
--- a/head/contrib/llvm/lib/CodeGen/LocalStackSlotAllocation.cpp Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/LocalStackSlotAllocation.cpp Tue Apr 17=
11:51:51 2012 +0300
@@ -71,19 +71,15 @@
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
}
- const char *getPassName() const {
- return "Local Stack Slot Allocation";
- }
=20
private:
};
} // end anonymous namespace
=20
char LocalStackSlotPass::ID =3D 0;
-
-FunctionPass *llvm::createLocalStackSlotAllocationPass() {
- return new LocalStackSlotPass();
-}
+char &llvm::LocalStackSlotAllocationID =3D LocalStackSlotPass::ID;
+INITIALIZE_PASS(LocalStackSlotPass, "localstackalloc",
+ "Local Stack Slot Allocation", false, false)
=20
bool LocalStackSlotPass::runOnMachineFunction(MachineFunction &MF) {
MachineFrameInfo *MFI =3D MF.getFrameInfo();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/MachineB=
asicBlock.cpp
--- a/head/contrib/llvm/lib/CodeGen/MachineBasicBlock.cpp Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/MachineBasicBlock.cpp Tue Apr 17 11:51:=
51 2012 +0300
@@ -73,7 +73,8 @@
=20
// Make sure the instructions have their operands in the reginfo lists.
MachineRegisterInfo &RegInfo =3D MF.getRegInfo();
- for (MachineBasicBlock::iterator I =3D N->begin(), E =3D N->end(); I !=
=3D E; ++I)
+ for (MachineBasicBlock::instr_iterator
+ I =3D N->instr_begin(), E =3D N->instr_end(); I !=3D E; ++I)
I->AddRegOperandsToUseLists(RegInfo);
=20
LeakDetector::removeGarbageObject(N);
@@ -120,8 +121,8 @@
/// lists.
void ilist_traits<MachineInstr>::
transferNodesFromList(ilist_traits<MachineInstr> &fromList,
- MachineBasicBlock::iterator first,
- MachineBasicBlock::iterator last) {
+ ilist_iterator<MachineInstr> first,
+ ilist_iterator<MachineInstr> last) {
assert(Parent->getParent() =3D=3D fromList.Parent->getParent() &&
"MachineInstr parent mismatch!");
=20
@@ -140,33 +141,75 @@
}
=20
MachineBasicBlock::iterator MachineBasicBlock::getFirstNonPHI() {
- iterator I =3D begin();
- while (I !=3D end() && I->isPHI())
+ instr_iterator I =3D instr_begin(), E =3D instr_end();
+ while (I !=3D E && I->isPHI())
++I;
+ assert(!I->isInsideBundle() && "First non-phi MI cannot be inside a bund=
le!");
return I;
}
=20
MachineBasicBlock::iterator
MachineBasicBlock::SkipPHIsAndLabels(MachineBasicBlock::iterator I) {
- while (I !=3D end() && (I->isPHI() || I->isLabel() || I->isDebugValue()))
+ iterator E =3D end();
+ while (I !=3D E && (I->isPHI() || I->isLabel() || I->isDebugValue()))
+ ++I;
+ // FIXME: This needs to change if we wish to bundle labels / dbg_values
+ // inside the bundle.
+ assert(!I->isInsideBundle() &&
+ "First non-phi / non-label instruction is inside a bundle!");
+ return I;
+}
+
+MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() {
+ iterator B =3D begin(), E =3D end(), I =3D E;
+ while (I !=3D B && ((--I)->isTerminator() || I->isDebugValue()))
+ ; /*noop */
+ while (I !=3D E && !I->isTerminator())
++I;
return I;
}
=20
-MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() {
- iterator I =3D end();
- while (I !=3D begin() && ((--I)->getDesc().isTerminator() || I->isDebugV=
alue()))
+MachineBasicBlock::const_iterator
+MachineBasicBlock::getFirstTerminator() const {
+ const_iterator B =3D begin(), E =3D end(), I =3D E;
+ while (I !=3D B && ((--I)->isTerminator() || I->isDebugValue()))
; /*noop */
- while (I !=3D end() && !I->getDesc().isTerminator())
+ while (I !=3D E && !I->isTerminator())
+ ++I;
+ return I;
+}
+
+MachineBasicBlock::instr_iterator MachineBasicBlock::getFirstInstrTerminat=
or() {
+ instr_iterator B =3D instr_begin(), E =3D instr_end(), I =3D E;
+ while (I !=3D B && ((--I)->isTerminator() || I->isDebugValue()))
+ ; /*noop */
+ while (I !=3D E && !I->isTerminator())
++I;
return I;
}
=20
MachineBasicBlock::iterator MachineBasicBlock::getLastNonDebugInstr() {
- iterator B =3D begin(), I =3D end();
+ // Skip over end-of-block dbg_value instructions.
+ instr_iterator B =3D instr_begin(), I =3D instr_end();
while (I !=3D B) {
--I;
- if (I->isDebugValue())
+ // Return instruction that starts a bundle.
+ if (I->isDebugValue() || I->isInsideBundle())
+ continue;
+ return I;
+ }
+ // The block is all debug values.
+ return end();
+}
+
+MachineBasicBlock::const_iterator
+MachineBasicBlock::getLastNonDebugInstr() const {
+ // Skip over end-of-block dbg_value instructions.
+ const_instr_iterator B =3D instr_begin(), I =3D instr_end();
+ while (I !=3D B) {
+ --I;
+ // Return instruction that starts a bundle.
+ if (I->isDebugValue() || I->isInsideBundle())
continue;
return I;
}
@@ -195,6 +238,18 @@
return "(null)";
}
=20
+/// Return a hopefully unique identifier for this block.
+std::string MachineBasicBlock::getFullName() const {
+ std::string Name;
+ if (getParent())
+ Name =3D (getParent()->getFunction()->getName() + ":").str();
+ if (getBasicBlock())
+ Name +=3D getBasicBlock()->getName();
+ else
+ Name +=3D (Twine("BB") + Twine(getNumber())).str();
+ return Name;
+}
+
void MachineBasicBlock::print(raw_ostream &OS, SlotIndexes *Indexes) const=
{
const MachineFunction *MF =3D getParent();
if (!MF) {
@@ -203,8 +258,6 @@
return;
}
=20
- if (Alignment) { OS << "Alignment " << Alignment << "\n"; }
-
if (Indexes)
OS << Indexes->getMBBStartIdx(this) << '\t';
=20
@@ -218,6 +271,12 @@
}
if (isLandingPad()) { OS << Comma << "EH LANDING PAD"; Comma =3D ", "; }
if (hasAddressTaken()) { OS << Comma << "ADDRESS TAKEN"; Comma =3D ", ";=
}
+ if (Alignment) {
+ OS << Comma << "Align " << Alignment << " (" << (1u << Alignment)
+ << " bytes)";
+ Comma =3D ", ";
+ }
+
OS << '\n';
=20
const TargetRegisterInfo *TRI =3D MF->getTarget().getRegisterInfo();
@@ -237,13 +296,15 @@
OS << '\n';
}
=20
- for (const_iterator I =3D begin(); I !=3D end(); ++I) {
+ for (const_instr_iterator I =3D instr_begin(); I !=3D instr_end(); ++I) {
if (Indexes) {
if (Indexes->hasIndex(I))
OS << Indexes->getInstructionIndex(I);
OS << '\t';
}
OS << '\t';
+ if (I->isInsideBundle())
+ OS << " * ";
I->print(OS, &getParent()->getTarget());
}
=20
@@ -260,8 +321,8 @@
void MachineBasicBlock::removeLiveIn(unsigned Reg) {
std::vector<unsigned>::iterator I =3D
std::find(LiveIns.begin(), LiveIns.end(), Reg);
- assert(I !=3D LiveIns.end() && "Not a live in!");
- LiveIns.erase(I);
+ if (I !=3D LiveIns.end())
+ LiveIns.erase(I);
}
=20
bool MachineBasicBlock::isLiveIn(unsigned Reg) const {
@@ -297,8 +358,22 @@
TII->RemoveBranch(*this);
} else {
// The block has an unconditional fallthrough. If its successor is n=
ot
- // its layout successor, insert a branch.
- TBB =3D *succ_begin();
+ // its layout successor, insert a branch. First we have to locate the
+ // only non-landing-pad successor, as that is the fallthrough block.
+ for (succ_iterator SI =3D succ_begin(), SE =3D succ_end(); SI !=3D S=
E; ++SI) {
+ if ((*SI)->isLandingPad())
+ continue;
+ assert(!TBB && "Found more than one non-landing-pad successor!");
+ TBB =3D *SI;
+ }
+
+ // If there is no non-landing-pad successor, the block has no
+ // fall-through edges to be concerned with.
+ if (!TBB)
+ return;
+
+ // Finally update the unconditional successor to be reached via a br=
anch
+ // if it would not be reached by fallthrough.
if (!isLayoutSuccessor(TBB))
TII->InsertBranch(*this, TBB, 0, Cond, dl);
}
@@ -435,8 +510,8 @@
fromMBB->removeSuccessor(Succ);
=20
// Fix up any PHI nodes in the successor.
- for (MachineBasicBlock::iterator MI =3D Succ->begin(), ME =3D Succ->en=
d();
- MI !=3D ME && MI->isPHI(); ++MI)
+ for (MachineBasicBlock::instr_iterator MI =3D Succ->instr_begin(),
+ ME =3D Succ->instr_end(); MI !=3D ME && MI->isPHI(); ++MI)
for (unsigned i =3D 2, e =3D MI->getNumOperands()+1; i !=3D e; i +=
=3D 2) {
MachineOperand &MO =3D MI->getOperand(i);
if (MO.getMBB() =3D=3D fromMBB)
@@ -473,13 +548,10 @@
if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) {
// If we couldn't analyze the branch, examine the last instruction.
// If the block doesn't end in a known control barrier, assume fallthr=
ough
- // is possible. The isPredicable check is needed because this code can=
be
+ // is possible. The isPredicated check is needed because this code can=
be
// called during IfConversion, where an instruction which is normally a
- // Barrier is predicated and thus no longer an actual control barrier.=
This
- // is over-conservative though, because if an instruction isn't actual=
ly
- // predicated we could still treat it like a barrier.
- return empty() || !back().getDesc().isBarrier() ||
- back().getDesc().isPredicable();
+ // Barrier is predicated and thus no longer an actual control barrier.
+ return empty() || !back().isBarrier() || TII->isPredicated(&back());
}
=20
// If there is no branch, control always falls through.
@@ -538,14 +610,16 @@
// Collect a list of virtual registers killed by the terminators.
SmallVector<unsigned, 4> KilledRegs;
if (LV)
- for (iterator I =3D getFirstTerminator(), E =3D end(); I !=3D E; ++I) {
+ for (instr_iterator I =3D getFirstInstrTerminator(), E =3D instr_end();
+ I !=3D E; ++I) {
MachineInstr *MI =3D I;
for (MachineInstr::mop_iterator OI =3D MI->operands_begin(),
OE =3D MI->operands_end(); OI !=3D OE; ++OI) {
- if (!OI->isReg() || !OI->isUse() || !OI->isKill() || OI->isUndef())
+ if (!OI->isReg() || OI->getReg() =3D=3D 0 ||
+ !OI->isUse() || !OI->isKill() || OI->isUndef())
continue;
unsigned Reg =3D OI->getReg();
- if (TargetRegisterInfo::isVirtualRegister(Reg) &&
+ if (TargetRegisterInfo::isPhysicalRegister(Reg) ||
LV->getVarInfo(Reg).removeKill(MI)) {
KilledRegs.push_back(Reg);
DEBUG(dbgs() << "Removing terminator kill: " << *MI);
@@ -565,7 +639,8 @@
}
=20
// Fix PHI nodes in Succ so they refer to NMBB instead of this
- for (MachineBasicBlock::iterator i =3D Succ->begin(), e =3D Succ->end();
+ for (MachineBasicBlock::instr_iterator
+ i =3D Succ->instr_begin(),e =3D Succ->instr_end();
i !=3D e && i->isPHI(); ++i)
for (unsigned ni =3D 1, ne =3D i->getNumOperands(); ni !=3D ne; ni +=
=3D 2)
if (i->getOperand(ni+1).getMBB() =3D=3D this)
@@ -577,14 +652,16 @@
NMBB->addLiveIn(*I);
=20
// Update LiveVariables.
+ const TargetRegisterInfo *TRI =3D MF->getTarget().getRegisterInfo();
if (LV) {
// Restore kills of virtual registers that were killed by the terminat=
ors.
while (!KilledRegs.empty()) {
unsigned Reg =3D KilledRegs.pop_back_val();
- for (iterator I =3D end(), E =3D begin(); I !=3D E;) {
- if (!(--I)->addRegisterKilled(Reg, NULL, /* addIfNotFound=3D */ fa=
lse))
+ for (instr_iterator I =3D instr_end(), E =3D instr_begin(); I !=3D E=
;) {
+ if (!(--I)->addRegisterKilled(Reg, TRI, /* addIfNotFound=3D */ fal=
se))
continue;
- LV->getVarInfo(Reg).Kills.push_back(I);
+ if (TargetRegisterInfo::isVirtualRegister(Reg))
+ LV->getVarInfo(Reg).Kills.push_back(I);
DEBUG(dbgs() << "Restored terminator kill: " << *I);
break;
}
@@ -650,6 +727,42 @@
return NMBB;
}
=20
+MachineBasicBlock::iterator
+MachineBasicBlock::erase(MachineBasicBlock::iterator I) {
+ if (I->isBundle()) {
+ MachineBasicBlock::iterator E =3D llvm::next(I);
+ return Insts.erase(I.getInstrIterator(), E.getInstrIterator());
+ }
+
+ return Insts.erase(I.getInstrIterator());
+}
+
+MachineInstr *MachineBasicBlock::remove(MachineInstr *I) {
+ if (I->isBundle()) {
+ instr_iterator MII =3D llvm::next(I);
+ iterator E =3D end();
+ while (MII !=3D E && MII->isInsideBundle()) {
+ MachineInstr *MI =3D &*MII++;
+ Insts.remove(MI);
+ }
+ }
+
+ return Insts.remove(I);
+}
+
+void MachineBasicBlock::splice(MachineBasicBlock::iterator where,
+ MachineBasicBlock *Other,
+ MachineBasicBlock::iterator From) {
+ if (From->isBundle()) {
+ MachineBasicBlock::iterator To =3D llvm::next(From);
+ Insts.splice(where.getInstrIterator(), Other->Insts,
+ From.getInstrIterator(), To.getInstrIterator());
+ return;
+ }
+
+ Insts.splice(where.getInstrIterator(), Other->Insts, From.getInstrIterat=
or());
+}
+
/// removeFromParent - This method unlinks 'this' from the containing func=
tion,
/// and returns it, but does not delete it.
MachineBasicBlock *MachineBasicBlock::removeFromParent() {
@@ -673,10 +786,10 @@
MachineBasicBlock *New) {
assert(Old !=3D New && "Cannot replace self with self!");
=20
- MachineBasicBlock::iterator I =3D end();
- while (I !=3D begin()) {
+ MachineBasicBlock::instr_iterator I =3D instr_end();
+ while (I !=3D instr_begin()) {
--I;
- if (!I->getDesc().isTerminator()) break;
+ if (!I->isTerminator()) break;
=20
// Scan the operands of this machine instruction, replacing any uses o=
f Old
// with New.
@@ -755,27 +868,27 @@
/// findDebugLoc - find the next valid DebugLoc starting at MBBI, skipping
/// any DBG_VALUE instructions. Return UnknownLoc if there is none.
DebugLoc
-MachineBasicBlock::findDebugLoc(MachineBasicBlock::iterator &MBBI) {
+MachineBasicBlock::findDebugLoc(instr_iterator MBBI) {
DebugLoc DL;
- MachineBasicBlock::iterator E =3D end();
- if (MBBI !=3D E) {
- // Skip debug declarations, we don't want a DebugLoc from them.
- MachineBasicBlock::iterator MBBI2 =3D MBBI;
- while (MBBI2 !=3D E && MBBI2->isDebugValue())
- MBBI2++;
- if (MBBI2 !=3D E)
- DL =3D MBBI2->getDebugLoc();
- }
+ instr_iterator E =3D instr_end();
+ if (MBBI =3D=3D E)
+ return DL;
+
+ // Skip debug declarations, we don't want a DebugLoc from them.
+ while (MBBI !=3D E && MBBI->isDebugValue())
+ MBBI++;
+ if (MBBI !=3D E)
+ DL =3D MBBI->getDebugLoc();
return DL;
}
=20
/// getSuccWeight - Return weight of the edge from this block to MBB.
///
-uint32_t MachineBasicBlock::getSuccWeight(MachineBasicBlock *succ) {
+uint32_t MachineBasicBlock::getSuccWeight(const MachineBasicBlock *succ) c=
onst {
if (Weights.empty())
return 0;
=20
- succ_iterator I =3D std::find(Successors.begin(), Successors.end(), succ=
);
+ const_succ_iterator I =3D std::find(Successors.begin(), Successors.end()=
, succ);
return *getWeightIterator(I);
}
=20
@@ -789,6 +902,16 @@
return Weights.begin() + index;
}
=20
+/// getWeightIterator - Return wight iterator corresonding to the I succes=
sor
+/// iterator
+MachineBasicBlock::const_weight_iterator MachineBasicBlock::
+getWeightIterator(MachineBasicBlock::const_succ_iterator I) const {
+ assert(Weights.size() =3D=3D Successors.size() && "Async weight list!");
+ const size_t index =3D std::distance(Successors.begin(), I);
+ assert(index < Weights.size() && "Not a current successor!");
+ return Weights.begin() + index;
+}
+
void llvm::WriteAsOperand(raw_ostream &OS, const MachineBasicBlock *MBB,
bool t) {
OS << "BB#" << MBB->getNumber();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/MachineB=
lockFrequencyInfo.cpp
--- a/head/contrib/llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp Tue Apr 1=
7 11:51:51 2012 +0300
@@ -56,6 +56,6 @@
/// the other block frequencies. We do this to avoid using of floating poi=
nts.
///
BlockFrequency MachineBlockFrequencyInfo::
-getBlockFreq(MachineBasicBlock *MBB) const {
+getBlockFreq(const MachineBasicBlock *MBB) const {
return MBFI->getBlockFreq(MBB);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/MachineB=
ranchProbabilityInfo.cpp
--- a/head/contrib/llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp Tue Ap=
r 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp Tue Ap=
r 17 11:51:51 2012 +0300
@@ -26,26 +26,43 @@
=20
char MachineBranchProbabilityInfo::ID =3D 0;
=20
+void MachineBranchProbabilityInfo::anchor() { }
+
uint32_t MachineBranchProbabilityInfo::
-getSumForBlock(MachineBasicBlock *MBB) const {
- uint32_t Sum =3D 0;
-
+getSumForBlock(const MachineBasicBlock *MBB, uint32_t &Scale) const {
+ // First we compute the sum with 64-bits of precision, ensuring that can=
not
+ // overflow by bounding the number of weights considered. Hopefully no o=
ne
+ // actually needs 2^32 successors.
+ assert(MBB->succ_size() < UINT32_MAX);
+ uint64_t Sum =3D 0;
+ Scale =3D 1;
for (MachineBasicBlock::const_succ_iterator I =3D MBB->succ_begin(),
E =3D MBB->succ_end(); I !=3D E; ++I) {
- MachineBasicBlock *Succ =3D *I;
- uint32_t Weight =3D getEdgeWeight(MBB, Succ);
- uint32_t PrevSum =3D Sum;
-
+ uint32_t Weight =3D getEdgeWeight(MBB, *I);
Sum +=3D Weight;
- assert(Sum > PrevSum); (void) PrevSum;
}
=20
+ // If the computed sum fits in 32-bits, we're done.
+ if (Sum <=3D UINT32_MAX)
+ return Sum;
+
+ // Otherwise, compute the scale necessary to cause the weights to fit, a=
nd
+ // re-sum with that scale applied.
+ assert((Sum / UINT32_MAX) < UINT32_MAX);
+ Scale =3D (Sum / UINT32_MAX) + 1;
+ Sum =3D 0;
+ for (MachineBasicBlock::const_succ_iterator I =3D MBB->succ_begin(),
+ E =3D MBB->succ_end(); I !=3D E; ++I) {
+ uint32_t Weight =3D getEdgeWeight(MBB, *I);
+ Sum +=3D Weight / Scale;
+ }
+ assert(Sum <=3D UINT32_MAX);
return Sum;
}
=20
uint32_t
-MachineBranchProbabilityInfo::getEdgeWeight(MachineBasicBlock *Src,
- MachineBasicBlock *Dst) const {
+MachineBranchProbabilityInfo::getEdgeWeight(const MachineBasicBlock *Src,
+ const MachineBasicBlock *Dst) =
const {
uint32_t Weight =3D Src->getSuccWeight(Dst);
if (!Weight)
return DEFAULT_WEIGHT;
@@ -55,37 +72,24 @@
bool MachineBranchProbabilityInfo::isEdgeHot(MachineBasicBlock *Src,
MachineBasicBlock *Dst) const=
{
// Hot probability is at least 4/5 =3D 80%
- uint32_t Weight =3D getEdgeWeight(Src, Dst);
- uint32_t Sum =3D getSumForBlock(Src);
-
- // FIXME: Implement BranchProbability::compare then change this code to
- // compare this BranchProbability against a static "hot" BranchProbabili=
ty.
- return (uint64_t)Weight * 5 > (uint64_t)Sum * 4;
+ // FIXME: Compare against a static "hot" BranchProbability.
+ return getEdgeProbability(Src, Dst) > BranchProbability(4, 5);
}
=20
MachineBasicBlock *
MachineBranchProbabilityInfo::getHotSucc(MachineBasicBlock *MBB) const {
- uint32_t Sum =3D 0;
uint32_t MaxWeight =3D 0;
MachineBasicBlock *MaxSucc =3D 0;
-
for (MachineBasicBlock::const_succ_iterator I =3D MBB->succ_begin(),
E =3D MBB->succ_end(); I !=3D E; ++I) {
- MachineBasicBlock *Succ =3D *I;
- uint32_t Weight =3D getEdgeWeight(MBB, Succ);
- uint32_t PrevSum =3D Sum;
-
- Sum +=3D Weight;
- assert(Sum > PrevSum); (void) PrevSum;
-
+ uint32_t Weight =3D getEdgeWeight(MBB, *I);
if (Weight > MaxWeight) {
MaxWeight =3D Weight;
- MaxSucc =3D Succ;
+ MaxSucc =3D *I;
}
}
=20
- // FIXME: Use BranchProbability::compare.
- if ((uint64_t)MaxWeight * 5 >=3D (uint64_t)Sum * 4)
+ if (getEdgeProbability(MBB, MaxSucc) >=3D BranchProbability(4, 5))
return MaxSucc;
=20
return 0;
@@ -94,8 +98,9 @@
BranchProbability
MachineBranchProbabilityInfo::getEdgeProbability(MachineBasicBlock *Src,
MachineBasicBlock *Dst) c=
onst {
- uint32_t N =3D getEdgeWeight(Src, Dst);
- uint32_t D =3D getSumForBlock(Src);
+ uint32_t Scale =3D 1;
+ uint32_t D =3D getSumForBlock(Src, Scale);
+ uint32_t N =3D getEdgeWeight(Src, Dst) / Scale;
=20
return BranchProbability(N, D);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/MachineC=
SE.cpp
--- a/head/contrib/llvm/lib/CodeGen/MachineCSE.cpp Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/lib/CodeGen/MachineCSE.cpp Tue Apr 17 11:51:51 2012=
+0300
@@ -26,13 +26,14 @@
#include "llvm/ADT/Statistic.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/RecyclingAllocator.h"
-
using namespace llvm;
=20
STATISTIC(NumCoalesces, "Number of copies coalesced");
STATISTIC(NumCSEs, "Number of common subexpression eliminated");
STATISTIC(NumPhysCSEs,
"Number of physreg referencing common subexpr eliminated");
+STATISTIC(NumCrossBBCSEs,
+ "Number of cross-MBB physreg referencing CS eliminated");
STATISTIC(NumCommutes, "Number of copies coalesced after commuting");
=20
namespace {
@@ -49,7 +50,7 @@
}
=20
virtual bool runOnMachineFunction(MachineFunction &MF);
- =20
+
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
@@ -62,6 +63,8 @@
virtual void releaseMemory() {
ScopeMap.clear();
Exps.clear();
+ AllocatableRegs.clear();
+ ReservedRegs.clear();
}
=20
private:
@@ -75,6 +78,8 @@
ScopedHTType VNT;
SmallVector<MachineInstr*, 64> Exps;
unsigned CurrVN;
+ BitVector AllocatableRegs;
+ BitVector ReservedRegs;
=20
bool PerformTrivialCoalescing(MachineInstr *MI, MachineBasicBlock *MBB=
);
bool isPhysDefTriviallyDead(unsigned Reg,
@@ -82,9 +87,12 @@
MachineBasicBlock::const_iterator E) const=
;
bool hasLivePhysRegDefUses(const MachineInstr *MI,
const MachineBasicBlock *MBB,
- SmallSet<unsigned,8> &PhysRefs) const;
+ SmallSet<unsigned,8> &PhysRefs,
+ SmallVector<unsigned,2> &PhysDefs) const;
bool PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI,
- SmallSet<unsigned,8> &PhysRefs) const;
+ SmallSet<unsigned,8> &PhysRefs,
+ SmallVector<unsigned,2> &PhysDefs,
+ bool &NonLocal) const;
bool isCSECandidate(MachineInstr *MI);
bool isProfitableToCSE(unsigned CSReg, unsigned Reg,
MachineInstr *CSMI, MachineInstr *MI);
@@ -99,6 +107,7 @@
} // end anonymous namespace
=20
char MachineCSE::ID =3D 0;
+char &llvm::MachineCSEID =3D MachineCSE::ID;
INITIALIZE_PASS_BEGIN(MachineCSE, "machine-cse",
"Machine Common Subexpression Elimination", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
@@ -106,8 +115,6 @@
INITIALIZE_PASS_END(MachineCSE, "machine-cse",
"Machine Common Subexpression Elimination", false, false)
=20
-FunctionPass *llvm::createMachineCSEPass() { return new MachineCSE(); }
-
bool MachineCSE::PerformTrivialCoalescing(MachineInstr *MI,
MachineBasicBlock *MBB) {
bool Changed =3D false;
@@ -163,6 +170,8 @@
bool SeenDef =3D false;
for (unsigned i =3D 0, e =3D I->getNumOperands(); i !=3D e; ++i) {
const MachineOperand &MO =3D I->getOperand(i);
+ if (MO.isRegMask() && MO.clobbersPhysReg(Reg))
+ SeenDef =3D true;
if (!MO.isReg() || !MO.getReg())
continue;
if (!TRI->regsOverlap(MO.getReg(), Reg))
@@ -173,7 +182,7 @@
SeenDef =3D true;
}
if (SeenDef)
- // See a def of Reg (or an alias) before encountering any use, it's=20
+ // See a def of Reg (or an alias) before encountering any use, it's
// trivially dead.
return true;
=20
@@ -189,7 +198,8 @@
/// instruction does not uses a physical register.
bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI,
const MachineBasicBlock *MBB,
- SmallSet<unsigned,8> &PhysRefs) con=
st {
+ SmallSet<unsigned,8> &PhysRefs,
+ SmallVector<unsigned,2> &PhysDefs) =
const{
MachineBasicBlock::const_iterator I =3D MI; I =3D llvm::next(I);
for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
const MachineOperand &MO =3D MI->getOperand(i);
@@ -207,7 +217,9 @@
(MO.isDead() || isPhysDefTriviallyDead(Reg, I, MBB->end())))
continue;
PhysRefs.insert(Reg);
- for (const unsigned *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alias)
+ if (MO.isDef())
+ PhysDefs.push_back(Reg);
+ for (const uint16_t *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alias)
PhysRefs.insert(*Alias);
}
=20
@@ -215,25 +227,56 @@
}
=20
bool MachineCSE::PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI,
- SmallSet<unsigned,8> &PhysRefs) const {
+ SmallSet<unsigned,8> &PhysRefs,
+ SmallVector<unsigned,2> &PhysDefs,
+ bool &NonLocal) const {
// For now conservatively returns false if the common subexpression is
- // not in the same basic block as the given instruction.
- MachineBasicBlock *MBB =3D MI->getParent();
- if (CSMI->getParent() !=3D MBB)
- return false;
+ // not in the same basic block as the given instruction. The only except=
ion
+ // is if the common subexpression is in the sole predecessor block.
+ const MachineBasicBlock *MBB =3D MI->getParent();
+ const MachineBasicBlock *CSMBB =3D CSMI->getParent();
+
+ bool CrossMBB =3D false;
+ if (CSMBB !=3D MBB) {
+ if (MBB->pred_size() !=3D 1 || *MBB->pred_begin() !=3D CSMBB)
+ return false;
+
+ for (unsigned i =3D 0, e =3D PhysDefs.size(); i !=3D e; ++i) {
+ if (AllocatableRegs.test(PhysDefs[i]) || ReservedRegs.test(PhysDefs[=
i]))
+ // Avoid extending live range of physical registers if they are
+ //allocatable or reserved.
+ return false;
+ }
+ CrossMBB =3D true;
+ }
MachineBasicBlock::const_iterator I =3D CSMI; I =3D llvm::next(I);
MachineBasicBlock::const_iterator E =3D MI;
+ MachineBasicBlock::const_iterator EE =3D CSMBB->end();
unsigned LookAheadLeft =3D LookAheadLimit;
while (LookAheadLeft) {
// Skip over dbg_value's.
- while (I !=3D E && I->isDebugValue())
+ while (I !=3D E && I !=3D EE && I->isDebugValue())
++I;
=20
+ if (I =3D=3D EE) {
+ assert(CrossMBB && "Reaching end-of-MBB without finding MI?");
+ (void)CrossMBB;
+ CrossMBB =3D false;
+ NonLocal =3D true;
+ I =3D MBB->begin();
+ EE =3D MBB->end();
+ continue;
+ }
+
if (I =3D=3D E)
return true;
=20
for (unsigned i =3D 0, e =3D I->getNumOperands(); i !=3D e; ++i) {
const MachineOperand &MO =3D I->getOperand(i);
+ // RegMasks go on instructions like calls that clobber lots of physr=
egs.
+ // Don't attempt to CSE across such an instruction.
+ if (MO.isRegMask())
+ return false;
if (!MO.isReg() || !MO.isDef())
continue;
unsigned MOReg =3D MO.getReg();
@@ -260,12 +303,11 @@
return false;
=20
// Ignore stuff that we obviously can't move.
- const MCInstrDesc &MCID =3D MI->getDesc(); =20
- if (MCID.mayStore() || MCID.isCall() || MCID.isTerminator() ||
+ if (MI->mayStore() || MI->isCall() || MI->isTerminator() ||
MI->hasUnmodeledSideEffects())
return false;
=20
- if (MCID.mayLoad()) {
+ if (MI->mayLoad()) {
// Okay, this instruction does a load. As a refinement, we allow the t=
arget
// to decide whether the loaded value is actually a constant. If so, w=
e can
// actually use it as a load.
@@ -287,7 +329,7 @@
// Heuristics #1: Don't CSE "cheap" computation if the def is not local =
or in
// an immediate predecessor. We don't want to increase register pressure=
and
// end up causing other computation to be spilled.
- if (MI->getDesc().isAsCheapAsAMove()) {
+ if (MI->isAsCheapAsAMove()) {
MachineBasicBlock *CSBB =3D CSMI->getParent();
MachineBasicBlock *BB =3D MI->getParent();
if (CSBB !=3D BB && !CSBB->isSuccessor(BB))
@@ -376,7 +418,7 @@
=20
// Commute commutable instructions.
bool Commuted =3D false;
- if (!FoundCSE && MI->getDesc().isCommutable()) {
+ if (!FoundCSE && MI->isCommutable()) {
MachineInstr *NewMI =3D TII->commuteInstruction(MI);
if (NewMI) {
Commuted =3D true;
@@ -394,16 +436,18 @@
// If the instruction defines physical registers and the values *may* =
be
// used, then it's not safe to replace it with a common subexpression.
// It's also not safe if the instruction uses physical registers.
+ bool CrossMBBPhysDef =3D false;
SmallSet<unsigned,8> PhysRefs;
- if (FoundCSE && hasLivePhysRegDefUses(MI, MBB, PhysRefs)) {
+ SmallVector<unsigned, 2> PhysDefs;
+ if (FoundCSE && hasLivePhysRegDefUses(MI, MBB, PhysRefs, PhysDefs)) {
FoundCSE =3D false;
=20
- // ... Unless the CS is local and it also defines the physical regis=
ter
- // which is not clobbered in between and the physical register uses=20
- // were not clobbered.
+ // ... Unless the CS is local or is in the sole predecessor block
+ // and it also defines the physical register which is not clobbered
+ // in between and the physical register uses were not clobbered.
unsigned CSVN =3D VNT.lookup(MI);
MachineInstr *CSMI =3D Exps[CSVN];
- if (PhysRegDefsReach(CSMI, MI, PhysRefs))
+ if (PhysRegDefsReach(CSMI, MI, PhysRefs, PhysDefs, CrossMBBPhysDef))
FoundCSE =3D true;
}
=20
@@ -458,6 +502,18 @@
MRI->replaceRegWith(CSEPairs[i].first, CSEPairs[i].second);
MRI->clearKillFlags(CSEPairs[i].second);
}
+
+ if (CrossMBBPhysDef) {
+ // Add physical register defs now coming in from a predecessor to =
MBB
+ // livein list.
+ while (!PhysDefs.empty()) {
+ unsigned LiveIn =3D PhysDefs.pop_back_val();
+ if (!MBB->isLiveIn(LiveIn))
+ MBB->addLiveIn(LiveIn);
+ }
+ ++NumCrossBBCSEs;
+ }
+
MI->eraseFromParent();
++NumCSEs;
if (!PhysRefs.empty())
@@ -542,5 +598,7 @@
MRI =3D &MF.getRegInfo();
AA =3D &getAnalysis<AliasAnalysis>();
DT =3D &getAnalysis<MachineDominatorTree>();
+ AllocatableRegs =3D TRI->getAllocatableSet(MF);
+ ReservedRegs =3D TRI->getReservedRegs(MF);
return PerformCSE(DT->getRootNode());
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/MachineF=
unction.cpp
--- a/head/contrib/llvm/lib/CodeGen/MachineFunction.cpp Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/MachineFunction.cpp Tue Apr 17 11:51:51=
2012 +0300
@@ -13,12 +13,9 @@
//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
-#include "llvm/DerivedTypes.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Function.h"
-#include "llvm/Instructions.h"
-#include "llvm/Config/config.h"
#include "llvm/CodeGen/MachineConstantPool.h"
-#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstr.h"
@@ -28,6 +25,7 @@
#include "llvm/CodeGen/Passes.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
+#include "llvm/Analysis/ConstantFolding.h"
#include "llvm/Analysis/DebugInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Target/TargetData.h"
@@ -197,9 +195,10 @@
MachineMemOperand *
MachineFunction::getMachineMemOperand(MachinePointerInfo PtrInfo, unsigned=
f,
uint64_t s, unsigned base_alignment,
- const MDNode *TBAAInfo) {
+ const MDNode *TBAAInfo,
+ const MDNode *Ranges) {
return new (Allocator) MachineMemOperand(PtrInfo, f, s, base_alignment,
- TBAAInfo);
+ TBAAInfo, Ranges);
}
=20
MachineMemOperand *
@@ -286,7 +285,13 @@
}
=20
void MachineFunction::print(raw_ostream &OS, SlotIndexes *Indexes) const {
- OS << "# Machine code for function " << Fn->getName() << ":\n";
+ OS << "# Machine code for function " << Fn->getName() << ": ";
+ if (RegInfo) {
+ OS << (RegInfo->isSSA() ? "SSA" : "Post SSA");
+ if (!RegInfo->tracksLiveness())
+ OS << ", not tracking liveness";
+ }
+ OS << '\n';
=20
// Print Frame Information
FrameInfo->print(*this, OS);
@@ -335,7 +340,7 @@
DOTGraphTraits (bool isSimple=3Dfalse) : DefaultDOTGraphTraits(isSimple)=
{}
=20
static std::string getGraphName(const MachineFunction *F) {
- return "CFG for '" + F->getFunction()->getNameStr() + "' function";
+ return "CFG for '" + F->getFunction()->getName().str() + "' function=
";
}
=20
std::string getNodeLabel(const MachineBasicBlock *Node,
@@ -368,7 +373,7 @@
void MachineFunction::viewCFG() const
{
#ifndef NDEBUG
- ViewGraph(this, "mf" + getFunction()->getNameStr());
+ ViewGraph(this, "mf" + getFunction()->getName());
#else
errs() << "MachineFunction::viewCFG is only available in debug builds on=
"
<< "systems with Graphviz or gv!\n";
@@ -378,7 +383,7 @@
void MachineFunction::viewCFGOnly() const
{
#ifndef NDEBUG
- ViewGraph(this, "mf" + getFunction()->getNameStr(), true);
+ ViewGraph(this, "mf" + getFunction()->getName(), true);
#else
errs() << "MachineFunction::viewCFGOnly is only available in debug build=
s on "
<< "systems with Graphviz or gv!\n";
@@ -464,7 +469,7 @@
if (!isCalleeSavedInfoValid())
return BV;
=20
- for (const unsigned *CSR =3D TRI->getCalleeSavedRegs(MF); CSR && *CSR; +=
+CSR)
+ for (const uint16_t *CSR =3D TRI->getCalleeSavedRegs(MF); CSR && *CSR; +=
+CSR)
BV.set(*CSR);
=20
// The entry MBB always has all CSRs pristine.
@@ -532,6 +537,8 @@
switch (getEntryKind()) {
case MachineJumpTableInfo::EK_BlockAddress:
return TD.getPointerSize();
+ case MachineJumpTableInfo::EK_GPRel64BlockAddress:
+ return 8;
case MachineJumpTableInfo::EK_GPRel32BlockAddress:
case MachineJumpTableInfo::EK_LabelDifference32:
case MachineJumpTableInfo::EK_Custom32:
@@ -539,8 +546,7 @@
case MachineJumpTableInfo::EK_Inline:
return 0;
}
- assert(0 && "Unknown jump table encoding!");
- return ~0;
+ llvm_unreachable("Unknown jump table encoding!");
}
=20
/// getEntryAlignment - Return the alignment of each entry in the jump tab=
le.
@@ -551,6 +557,8 @@
switch (getEntryKind()) {
case MachineJumpTableInfo::EK_BlockAddress:
return TD.getPointerABIAlignment();
+ case MachineJumpTableInfo::EK_GPRel64BlockAddress:
+ return TD.getABIIntegerTypeAlignment(64);
case MachineJumpTableInfo::EK_GPRel32BlockAddress:
case MachineJumpTableInfo::EK_LabelDifference32:
case MachineJumpTableInfo::EK_Custom32:
@@ -558,8 +566,7 @@
case MachineJumpTableInfo::EK_Inline:
return 1;
}
- assert(0 && "Unknown jump table encoding!");
- return ~0;
+ llvm_unreachable("Unknown jump table encoding!");
}
=20
/// createJumpTableIndex - Create a new jump table entry in the jump table=
info.
@@ -619,6 +626,8 @@
// MachineConstantPool implementation
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
+void MachineConstantPoolValue::anchor() { }
+
Type *MachineConstantPoolEntry::getType() const {
if (isMachineConstantPoolEntry())
return Val.MachineCPVal->getType();
@@ -653,35 +662,37 @@
// reject them.
if (A->getType() =3D=3D B->getType()) return false;
=20
+ // We can't handle structs or arrays.
+ if (isa<StructType>(A->getType()) || isa<ArrayType>(A->getType()) ||
+ isa<StructType>(B->getType()) || isa<ArrayType>(B->getType()))
+ return false;
+ =20
// For now, only support constants with the same size.
- if (TD->getTypeStoreSize(A->getType()) !=3D TD->getTypeStoreSize(B->getT=
ype()))
+ uint64_t StoreSize =3D TD->getTypeStoreSize(A->getType());
+ if (StoreSize !=3D TD->getTypeStoreSize(B->getType()) ||=20
+ StoreSize > 128)
return false;
=20
- // If a floating-point value and an integer value have the same encoding,
- // they can share a constant-pool entry.
- if (const ConstantFP *AFP =3D dyn_cast<ConstantFP>(A))
- if (const ConstantInt *BI =3D dyn_cast<ConstantInt>(B))
- return AFP->getValueAPF().bitcastToAPInt() =3D=3D BI->getValue();
- if (const ConstantFP *BFP =3D dyn_cast<ConstantFP>(B))
- if (const ConstantInt *AI =3D dyn_cast<ConstantInt>(A))
- return BFP->getValueAPF().bitcastToAPInt() =3D=3D AI->getValue();
+ Type *IntTy =3D IntegerType::get(A->getContext(), StoreSize*8);
=20
- // Two vectors can share an entry if each pair of corresponding
- // elements could.
- if (const ConstantVector *AV =3D dyn_cast<ConstantVector>(A))
- if (const ConstantVector *BV =3D dyn_cast<ConstantVector>(B)) {
- if (AV->getType()->getNumElements() !=3D BV->getType()->getNumElemen=
ts())
- return false;
- for (unsigned i =3D 0, e =3D AV->getType()->getNumElements(); i !=3D=
e; ++i)
- if (!CanShareConstantPoolEntry(AV->getOperand(i),
- BV->getOperand(i), TD))
- return false;
- return true;
- }
-
- // TODO: Handle other cases.
-
- return false;
+ // Try constant folding a bitcast of both instructions to an integer. I=
f we
+ // get two identical ConstantInt's, then we are good to share them. We =
use
+ // the constant folding APIs to do this so that we get the benefit of
+ // TargetData.
+ if (isa<PointerType>(A->getType()))
+ A =3D ConstantFoldInstOperands(Instruction::PtrToInt, IntTy,
+ const_cast<Constant*>(A), TD);
+ else if (A->getType() !=3D IntTy)
+ A =3D ConstantFoldInstOperands(Instruction::BitCast, IntTy,
+ const_cast<Constant*>(A), TD);
+ if (isa<PointerType>(B->getType()))
+ B =3D ConstantFoldInstOperands(Instruction::PtrToInt, IntTy,
+ const_cast<Constant*>(B), TD);
+ else if (B->getType() !=3D IntTy)
+ B =3D ConstantFoldInstOperands(Instruction::BitCast, IntTy,
+ const_cast<Constant*>(B), TD);
+ =20
+ return A =3D=3D B;
}
=20
/// getConstantPoolIndex - Create a new entry in the constant pool or retu=
rn
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/MachineF=
unctionAnalysis.cpp
--- a/head/contrib/llvm/lib/CodeGen/MachineFunctionAnalysis.cpp Tue Apr 17 =
11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/MachineFunctionAnalysis.cpp Tue Apr 17 =
11:51:51 2012 +0300
@@ -19,9 +19,8 @@
=20
char MachineFunctionAnalysis::ID =3D 0;
=20
-MachineFunctionAnalysis::MachineFunctionAnalysis(const TargetMachine &tm,
- CodeGenOpt::Level OL) :
- FunctionPass(ID), TM(tm), OptLevel(OL), MF(0) {
+MachineFunctionAnalysis::MachineFunctionAnalysis(const TargetMachine &tm) :
+ FunctionPass(ID), TM(tm), MF(0) {
initializeMachineModuleInfoPass(*PassRegistry::getPassRegistry());
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/MachineI=
nstr.cpp
--- a/head/contrib/llvm/lib/CodeGen/MachineInstr.cpp Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/lib/CodeGen/MachineInstr.cpp Tue Apr 17 11:51:51 20=
12 +0300
@@ -40,6 +40,7 @@
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/FoldingSet.h"
+#include "llvm/ADT/Hashing.h"
using namespace llvm;
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -178,6 +179,7 @@
IsKill =3D isKill;
IsDead =3D isDead;
IsUndef =3D isUndef;
+ IsInternalRead =3D false;
IsEarlyClobber =3D false;
IsDebug =3D isDebug;
SubReg =3D 0;
@@ -191,7 +193,6 @@
return false;
=20
switch (getType()) {
- default: llvm_unreachable("Unrecognized operand type");
case MachineOperand::MO_Register:
return getReg() =3D=3D Other.getReg() && isDef() =3D=3D Other.isDef() =
&&
getSubReg() =3D=3D Other.getSubReg();
@@ -216,11 +217,14 @@
getOffset() =3D=3D Other.getOffset();
case MachineOperand::MO_BlockAddress:
return getBlockAddress() =3D=3D Other.getBlockAddress();
+ case MO_RegisterMask:
+ return getRegMask() =3D=3D Other.getRegMask();
case MachineOperand::MO_MCSymbol:
return getMCSymbol() =3D=3D Other.getMCSymbol();
case MachineOperand::MO_Metadata:
return getMetadata() =3D=3D Other.getMetadata();
}
+ llvm_unreachable("Invalid machine operand type");
}
=20
/// print - Print the specified machine operand.
@@ -240,7 +244,7 @@
OS << PrintReg(getReg(), TRI, getSubReg());
=20
if (isDef() || isKill() || isDead() || isImplicit() || isUndef() ||
- isEarlyClobber()) {
+ isInternalRead() || isEarlyClobber()) {
OS << '<';
bool NeedComma =3D false;
if (isDef()) {
@@ -256,14 +260,26 @@
NeedComma =3D true;
}
=20
- if (isKill() || isDead() || isUndef()) {
+ if (isKill() || isDead() || isUndef() || isInternalRead()) {
if (NeedComma) OS << ',';
- if (isKill()) OS << "kill";
- if (isDead()) OS << "dead";
+ NeedComma =3D false;
+ if (isKill()) {
+ OS << "kill";
+ NeedComma =3D true;
+ }
+ if (isDead()) {
+ OS << "dead";
+ NeedComma =3D true;
+ }
if (isUndef()) {
- if (isKill() || isDead())
- OS << ',';
+ if (NeedComma) OS << ',';
OS << "undef";
+ NeedComma =3D true;
+ }
+ if (isInternalRead()) {
+ if (NeedComma) OS << ',';
+ OS << "internal";
+ NeedComma =3D true;
}
}
OS << '>';
@@ -311,6 +327,9 @@
WriteAsOperand(OS, getBlockAddress(), /*PrintType=3D*/false);
OS << '>';
break;
+ case MachineOperand::MO_RegisterMask:
+ OS << "<regmask>";
+ break;
case MachineOperand::MO_Metadata:
OS << '<';
WriteAsOperand(OS, getMetadata(), /*PrintType=3D*/false);
@@ -319,8 +338,6 @@
case MachineOperand::MO_MCSymbol:
OS << "<MCSym=3D" << *getMCSymbol() << '>';
break;
- default:
- llvm_unreachable("Unrecognized operand type");
}
=20
if (unsigned TF =3D getTargetFlags())
@@ -364,10 +381,11 @@
=20
MachineMemOperand::MachineMemOperand(MachinePointerInfo ptrinfo, unsigned =
f,
uint64_t s, unsigned int a,
- const MDNode *TBAAInfo)
+ const MDNode *TBAAInfo,
+ const MDNode *Ranges)
: PtrInfo(ptrinfo), Size(s),
Flags((f & ((1 << MOMaxBits) - 1)) | ((Log2_32(a) + 1) << MOMaxBits)),
- TBAAInfo(TBAAInfo) {
+ TBAAInfo(TBAAInfo), Ranges(Ranges) {
assert((PtrInfo.V =3D=3D 0 || isa<PointerType>(PtrInfo.V->getType())) &&
"invalid pointer value");
assert(getBaseAlignment() =3D=3D a && "Alignment is not a power of 2!");
@@ -465,7 +483,7 @@
/// MCID NULL and no operands.
MachineInstr::MachineInstr()
: MCID(0), Flags(0), AsmPrinterFlags(0),
- MemRefs(0), MemRefsEnd(0),
+ NumMemRefs(0), MemRefs(0),
Parent(0) {
// Make sure that we get added to a machine basicblock
LeakDetector::addGarbageObject(this);
@@ -473,10 +491,10 @@
=20
void MachineInstr::addImplicitDefUseOperands() {
if (MCID->ImplicitDefs)
- for (const unsigned *ImpDefs =3D MCID->ImplicitDefs; *ImpDefs; ++ImpDe=
fs)
+ for (const uint16_t *ImpDefs =3D MCID->getImplicitDefs(); *ImpDefs; ++=
ImpDefs)
addOperand(MachineOperand::CreateReg(*ImpDefs, true, true));
if (MCID->ImplicitUses)
- for (const unsigned *ImpUses =3D MCID->ImplicitUses; *ImpUses; ++ImpUs=
es)
+ for (const uint16_t *ImpUses =3D MCID->getImplicitUses(); *ImpUses; ++=
ImpUses)
addOperand(MachineOperand::CreateReg(*ImpUses, false, true));
}
=20
@@ -485,7 +503,7 @@
/// the MCInstrDesc.
MachineInstr::MachineInstr(const MCInstrDesc &tid, bool NoImp)
: MCID(&tid), Flags(0), AsmPrinterFlags(0),
- MemRefs(0), MemRefsEnd(0), Parent(0) {
+ NumMemRefs(0), MemRefs(0), Parent(0) {
unsigned NumImplicitOps =3D 0;
if (!NoImp)
NumImplicitOps =3D MCID->getNumImplicitDefs() + MCID->getNumImplicitUs=
es();
@@ -500,7 +518,7 @@
MachineInstr::MachineInstr(const MCInstrDesc &tid, const DebugLoc dl,
bool NoImp)
: MCID(&tid), Flags(0), AsmPrinterFlags(0),
- MemRefs(0), MemRefsEnd(0), Parent(0), debugLoc(dl) {
+ NumMemRefs(0), MemRefs(0), Parent(0), debugLoc(dl) {
unsigned NumImplicitOps =3D 0;
if (!NoImp)
NumImplicitOps =3D MCID->getNumImplicitDefs() + MCID->getNumImplicitUs=
es();
@@ -516,7 +534,7 @@
/// basic block.
MachineInstr::MachineInstr(MachineBasicBlock *MBB, const MCInstrDesc &tid)
: MCID(&tid), Flags(0), AsmPrinterFlags(0),
- MemRefs(0), MemRefsEnd(0), Parent(0) {
+ NumMemRefs(0), MemRefs(0), Parent(0) {
assert(MBB && "Cannot use inserting ctor with null basic block!");
unsigned NumImplicitOps =3D
MCID->getNumImplicitDefs() + MCID->getNumImplicitUses();
@@ -532,7 +550,7 @@
MachineInstr::MachineInstr(MachineBasicBlock *MBB, const DebugLoc dl,
const MCInstrDesc &tid)
: MCID(&tid), Flags(0), AsmPrinterFlags(0),
- MemRefs(0), MemRefsEnd(0), Parent(0), debugLoc(dl) {
+ NumMemRefs(0), MemRefs(0), Parent(0), debugLoc(dl) {
assert(MBB && "Cannot use inserting ctor with null basic block!");
unsigned NumImplicitOps =3D
MCID->getNumImplicitDefs() + MCID->getNumImplicitUses();
@@ -547,7 +565,7 @@
///
MachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI)
: MCID(&MI.getDesc()), Flags(0), AsmPrinterFlags(0),
- MemRefs(MI.MemRefs), MemRefsEnd(MI.MemRefsEnd),
+ NumMemRefs(MI.NumMemRefs), MemRefs(MI.MemRefs),
Parent(0), debugLoc(MI.getDebugLoc()) {
Operands.reserve(MI.getNumOperands());
=20
@@ -722,17 +740,33 @@
void MachineInstr::addMemOperand(MachineFunction &MF,
MachineMemOperand *MO) {
mmo_iterator OldMemRefs =3D MemRefs;
- mmo_iterator OldMemRefsEnd =3D MemRefsEnd;
+ uint16_t OldNumMemRefs =3D NumMemRefs;
=20
- size_t NewNum =3D (MemRefsEnd - MemRefs) + 1;
+ uint16_t NewNum =3D NumMemRefs + 1;
mmo_iterator NewMemRefs =3D MF.allocateMemRefsArray(NewNum);
- mmo_iterator NewMemRefsEnd =3D NewMemRefs + NewNum;
=20
- std::copy(OldMemRefs, OldMemRefsEnd, NewMemRefs);
+ std::copy(OldMemRefs, OldMemRefs + OldNumMemRefs, NewMemRefs);
NewMemRefs[NewNum - 1] =3D MO;
=20
MemRefs =3D NewMemRefs;
- MemRefsEnd =3D NewMemRefsEnd;
+ NumMemRefs =3D NewNum;
+}
+
+bool MachineInstr::hasPropertyInBundle(unsigned Mask, QueryType Type) cons=
t {
+ const MachineBasicBlock *MBB =3D getParent();
+ MachineBasicBlock::const_instr_iterator MII =3D *this; ++MII;
+ while (MII !=3D MBB->end() && MII->isInsideBundle()) {
+ if (MII->getDesc().getFlags() & Mask) {
+ if (Type =3D=3D AnyInBundle)
+ return true;
+ } else {
+ if (Type =3D=3D AllInBundle)
+ return false;
+ }
+ ++MII;
+ }
+
+ return Type =3D=3D AllInBundle;
}
=20
bool MachineInstr::isIdenticalTo(const MachineInstr *Other,
@@ -743,6 +777,19 @@
Other->getNumOperands() !=3D getNumOperands())
return false;
=20
+ if (isBundle()) {
+ // Both instructions are bundles, compare MIs inside the bundle.
+ MachineBasicBlock::const_instr_iterator I1 =3D *this;
+ MachineBasicBlock::const_instr_iterator E1 =3D getParent()->instr_end(=
);
+ MachineBasicBlock::const_instr_iterator I2 =3D *Other;
+ MachineBasicBlock::const_instr_iterator E2=3D Other->getParent()->inst=
r_end();
+ while (++I1 !=3D E1 && I1->isInsideBundle()) {
+ ++I2;
+ if (I2 =3D=3D E2 || !I2->isInsideBundle() || !I1->isIdenticalTo(I2, =
Check))
+ return false;
+ }
+ }
+
// Check operands to make sure they match.
for (unsigned i =3D 0, e =3D getNumOperands(); i !=3D e; ++i) {
const MachineOperand &MO =3D getOperand(i);
@@ -789,6 +836,18 @@
/// block, and returns it, but does not delete it.
MachineInstr *MachineInstr::removeFromParent() {
assert(getParent() && "Not embedded in a basic block!");
+
+ // If it's a bundle then remove the MIs inside the bundle as well.
+ if (isBundle()) {
+ MachineBasicBlock *MBB =3D getParent();
+ MachineBasicBlock::instr_iterator MII =3D *this; ++MII;
+ MachineBasicBlock::instr_iterator E =3D MBB->instr_end();
+ while (MII !=3D E && MII->isInsideBundle()) {
+ MachineInstr *MI =3D &*MII;
+ ++MII;
+ MBB->remove(MI);
+ }
+ }
getParent()->remove(this);
return this;
}
@@ -798,6 +857,17 @@
/// block, and deletes it.
void MachineInstr::eraseFromParent() {
assert(getParent() && "Not embedded in a basic block!");
+ // If it's a bundle then remove the MIs inside the bundle as well.
+ if (isBundle()) {
+ MachineBasicBlock *MBB =3D getParent();
+ MachineBasicBlock::instr_iterator MII =3D *this; ++MII;
+ MachineBasicBlock::instr_iterator E =3D MBB->instr_end();
+ while (MII !=3D E && MII->isInsideBundle()) {
+ MachineInstr *MI =3D &*MII;
+ ++MII;
+ MBB->erase(MI);
+ }
+ }
getParent()->erase(this);
}
=20
@@ -817,6 +887,16 @@
return NumOperands;
}
=20
+/// isBundled - Return true if this instruction part of a bundle. This is =
true
+/// if either itself or its following instruction is marked "InsideBundle".
+bool MachineInstr::isBundled() const {
+ if (isInsideBundle())
+ return true;
+ MachineBasicBlock::const_instr_iterator nextMI =3D this;
+ ++nextMI;
+ return nextMI !=3D Parent->instr_end() && nextMI->isInsideBundle();
+}
+
bool MachineInstr::isStackAligningInlineAsm() const {
if (isInlineAsm()) {
unsigned ExtraInfo =3D getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
@@ -887,6 +967,20 @@
return NULL;
}
=20
+/// getBundleSize - Return the number of instructions inside the MI bundle.
+unsigned MachineInstr::getBundleSize() const {
+ assert(isBundle() && "Expecting a bundle");
+
+ MachineBasicBlock::const_instr_iterator I =3D *this;
+ unsigned Size =3D 0;
+ while ((++I)->isInsideBundle()) {
+ ++Size;
+ }
+ assert(Size > 1 && "Malformed bundle");
+
+ return Size;
+}
+
/// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use=
of
/// the specific register or -1 if it is not found. It further tightens
/// the search criteria to a use that kills the register if isKill is true.
@@ -948,6 +1042,10 @@
bool isPhys =3D TargetRegisterInfo::isPhysicalRegister(Reg);
for (unsigned i =3D 0, e =3D getNumOperands(); i !=3D e; ++i) {
const MachineOperand &MO =3D getOperand(i);
+ // Accept regmask operands when Overlap is set.
+ // Ignore them when looking for a specific def operand (Overlap =3D=3D=
false).
+ if (isPhys && Overlap && MO.isRegMask() && MO.clobbersPhysReg(Reg))
+ return i;
if (!MO.isReg() || !MO.isDef())
continue;
unsigned MOReg =3D MO.getReg();
@@ -1118,6 +1216,8 @@
=20
/// copyPredicates - Copies predicate operand(s) from MI.
void MachineInstr::copyPredicates(const MachineInstr *MI) {
+ assert(!isBundle() && "MachineInstr::copyPredicates() can't handle bundl=
es");
+
const MCInstrDesc &MCID =3D MI->getDesc();
if (!MCID.isPredicable())
return;
@@ -1159,13 +1259,13 @@
AliasAnalysis *AA,
bool &SawStore) const {
// Ignore stuff that we obviously can't move.
- if (MCID->mayStore() || MCID->isCall()) {
+ if (mayStore() || isCall()) {
SawStore =3D true;
return false;
}
=20
if (isLabel() || isDebugValue() ||
- MCID->isTerminator() || hasUnmodeledSideEffects())
+ isTerminator() || hasUnmodeledSideEffects())
return false;
=20
// See if this instruction does a load. If so, we have to guarantee tha=
t the
@@ -1173,7 +1273,7 @@
// destination. The check for isInvariantLoad gives the targe the chance=
to
// classify the load as always returning a constant, e.g. a constant pool
// load.
- if (MCID->mayLoad() && !isInvariantLoad(AA))
+ if (mayLoad() && !isInvariantLoad(AA))
// Otherwise, this is a real load. If there is a store between the lo=
ad and
// end of block, or if the load is volatile, we can't move it.
return !SawStore && !hasVolatileMemoryRef();
@@ -1213,9 +1313,9 @@
/// have no volatile memory references.
bool MachineInstr::hasVolatileMemoryRef() const {
// An instruction known never to access memory won't have a volatile acc=
ess.
- if (!MCID->mayStore() &&
- !MCID->mayLoad() &&
- !MCID->isCall() &&
+ if (!mayStore() &&
+ !mayLoad() &&
+ !isCall() &&
!hasUnmodeledSideEffects())
return false;
=20
@@ -1239,7 +1339,7 @@
/// *all* loads the instruction does are invariant (if it does multiple lo=
ads).
bool MachineInstr::isInvariantLoad(AliasAnalysis *AA) const {
// If the instruction doesn't load at all, it isn't an invariant load.
- if (!MCID->mayLoad())
+ if (!mayLoad())
return false;
=20
// If the instruction has lost its memoperands, conservatively assume th=
at
@@ -1253,6 +1353,7 @@
E =3D memoperands_end(); I !=3D E; ++I) {
if ((*I)->isVolatile()) return false;
if ((*I)->isStore()) return false;
+ if ((*I)->isInvariant()) return true;
=20
if (const Value *V =3D (*I)->getValue()) {
// A load from a constant PseudoSourceValue is invariant.
@@ -1291,7 +1392,7 @@
}
=20
bool MachineInstr::hasUnmodeledSideEffects() const {
- if (getDesc().hasUnmodeledSideEffects())
+ if (hasProperty(MCID::UnmodeledSideEffects))
return true;
if (isInlineAsm()) {
unsigned ExtraInfo =3D getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
@@ -1384,7 +1485,10 @@
OS << " =3D ";
=20
// Print the opcode name.
- OS << getDesc().getName();
+ if (TM && TM->getInstrInfo())
+ OS << TM->getInstrInfo()->getName(getOpcode());
+ else
+ OS << "UNKNOWN";
=20
// Print the rest of the operands.
bool OmittedAnyCallClobbers =3D false;
@@ -1419,14 +1523,14 @@
// call instructions much less noisy on targets where calls clobber lo=
ts
// of registers. Don't rely on MO.isDead() because we may be called be=
fore
// LiveVariables is run, or we may be looking at a non-allocatable reg.
- if (MF && getDesc().isCall() &&
+ if (MF && isCall() &&
MO.isReg() && MO.isImplicit() && MO.isDef()) {
unsigned Reg =3D MO.getReg();
if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
const MachineRegisterInfo &MRI =3D MF->getRegInfo();
if (MRI.use_empty(Reg) && !MRI.isLiveOut(Reg)) {
bool HasAliasLive =3D false;
- for (const unsigned *Alias =3D TM->getRegisterInfo()->getAliasSe=
t(Reg);
+ for (const uint16_t *Alias =3D TM->getRegisterInfo()->getAliasSe=
t(Reg);
unsigned AliasReg =3D *Alias; ++Alias)
if (!MRI.use_empty(AliasReg) || MRI.isLiveOut(AliasReg)) {
HasAliasLive =3D true;
@@ -1617,6 +1721,20 @@
return Found;
}
=20
+void MachineInstr::clearRegisterKills(unsigned Reg,
+ const TargetRegisterInfo *RegInfo) {
+ if (!TargetRegisterInfo::isPhysicalRegister(Reg))
+ RegInfo =3D 0;
+ for (unsigned i =3D 0, e =3D getNumOperands(); i !=3D e; ++i) {
+ MachineOperand &MO =3D getOperand(i);
+ if (!MO.isReg() || !MO.isUse() || !MO.isKill())
+ continue;
+ unsigned OpReg =3D MO.getReg();
+ if (OpReg =3D=3D Reg || (RegInfo && RegInfo->isSuperRegister(Reg, OpRe=
g)))
+ MO.setIsKill(false);
+ }
+}
+
bool MachineInstr::addRegisterDead(unsigned IncomingReg,
const TargetRegisterInfo *RegInfo,
bool AddIfNotFound) {
@@ -1689,16 +1807,21 @@
true /*IsImp*/));
}
=20
-void MachineInstr::setPhysRegsDeadExcept(const SmallVectorImpl<unsigned> &=
UsedRegs,
+void MachineInstr::setPhysRegsDeadExcept(ArrayRef<unsigned> UsedRegs,
const TargetRegisterInfo &TRI) {
+ bool HasRegMask =3D false;
for (unsigned i =3D 0, e =3D getNumOperands(); i !=3D e; ++i) {
MachineOperand &MO =3D getOperand(i);
+ if (MO.isRegMask()) {
+ HasRegMask =3D true;
+ continue;
+ }
if (!MO.isReg() || !MO.isDef()) continue;
unsigned Reg =3D MO.getReg();
- if (Reg =3D=3D 0) continue;
+ if (!TargetRegisterInfo::isPhysicalRegister(Reg)) continue;
bool Dead =3D true;
- for (SmallVectorImpl<unsigned>::const_iterator I =3D UsedRegs.begin(),
- E =3D UsedRegs.end(); I !=3D E; ++I)
+ for (ArrayRef<unsigned>::iterator I =3D UsedRegs.begin(), E =3D UsedRe=
gs.end();
+ I !=3D E; ++I)
if (TRI.regsOverlap(*I, Reg)) {
Dead =3D false;
break;
@@ -1706,53 +1829,66 @@
// If there are no uses, including partial uses, the def is dead.
if (Dead) MO.setIsDead();
}
+
+ // This is a call with a register mask operand.
+ // Mask clobbers are always dead, so add defs for the non-dead defines.
+ if (HasRegMask)
+ for (ArrayRef<unsigned>::iterator I =3D UsedRegs.begin(), E =3D UsedRe=
gs.end();
+ I !=3D E; ++I)
+ addRegisterDefined(*I, &TRI);
}
=20
unsigned
MachineInstrExpressionTrait::getHashValue(const MachineInstr* const &MI) {
- unsigned Hash =3D MI->getOpcode() * 37;
+ // Build up a buffer of hash code components.
+ //
+ // FIXME: This is a total hack. We should have a hash_value overload for
+ // MachineOperand, but currently that doesn't work because there are many
+ // different ideas of "equality" and thus different sets of information =
that
+ // contribute to the hash code. This one happens to want to take a speci=
fic
+ // subset. And it's still not clear that this routine uses the *correct*
+ // subset of information when computing the hash code. The goal is to us=
e the
+ // same inputs for the hash code here that MachineInstr::isIdenticalTo u=
ses to
+ // test for equality when passed the 'IgnoreVRegDefs' filter flag. It wo=
uld
+ // be very useful to factor the selection of relevant inputs out of the =
two
+ // functions and into a common routine, but it's not clear how that can =
be
+ // done.
+ SmallVector<size_t, 8> HashComponents;
+ HashComponents.reserve(MI->getNumOperands() + 1);
+ HashComponents.push_back(MI->getOpcode());
for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
const MachineOperand &MO =3D MI->getOperand(i);
- uint64_t Key =3D (uint64_t)MO.getType() << 32;
switch (MO.getType()) {
default: break;
case MachineOperand::MO_Register:
if (MO.isDef() && TargetRegisterInfo::isVirtualRegister(MO.getReg()))
continue; // Skip virtual register defs.
- Key |=3D MO.getReg();
+ HashComponents.push_back(hash_combine(MO.getType(), MO.getReg()));
break;
case MachineOperand::MO_Immediate:
- Key |=3D MO.getImm();
+ HashComponents.push_back(hash_combine(MO.getType(), MO.getImm()));
break;
case MachineOperand::MO_FrameIndex:
case MachineOperand::MO_ConstantPoolIndex:
case MachineOperand::MO_JumpTableIndex:
- Key |=3D MO.getIndex();
+ HashComponents.push_back(hash_combine(MO.getType(), MO.getIndex()));
break;
case MachineOperand::MO_MachineBasicBlock:
- Key |=3D DenseMapInfo<void*>::getHashValue(MO.getMBB());
+ HashComponents.push_back(hash_combine(MO.getType(), MO.getMBB()));
break;
case MachineOperand::MO_GlobalAddress:
- Key |=3D DenseMapInfo<void*>::getHashValue(MO.getGlobal());
+ HashComponents.push_back(hash_combine(MO.getType(), MO.getGlobal()));
break;
case MachineOperand::MO_BlockAddress:
- Key |=3D DenseMapInfo<void*>::getHashValue(MO.getBlockAddress());
+ HashComponents.push_back(hash_combine(MO.getType(),
+ MO.getBlockAddress()));
break;
case MachineOperand::MO_MCSymbol:
- Key |=3D DenseMapInfo<void*>::getHashValue(MO.getMCSymbol());
+ HashComponents.push_back(hash_combine(MO.getType(), MO.getMCSymbol()=
));
break;
}
- Key +=3D ~(Key << 32);
- Key ^=3D (Key >> 22);
- Key +=3D ~(Key << 13);
- Key ^=3D (Key >> 8);
- Key +=3D (Key << 3);
- Key ^=3D (Key >> 15);
- Key +=3D ~(Key << 27);
- Key ^=3D (Key >> 31);
- Hash =3D (unsigned)Key + Hash * 37;
}
- return Hash;
+ return hash_combine_range(HashComponents.begin(), HashComponents.end());
}
=20
void MachineInstr::emitError(StringRef Msg) const {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/MachineL=
ICM.cpp
--- a/head/contrib/llvm/lib/CodeGen/MachineLICM.cpp Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/lib/CodeGen/MachineLICM.cpp Tue Apr 17 11:51:51 201=
2 +0300
@@ -45,7 +45,7 @@
static cl::opt<bool>
AvoidSpeculation("avoid-speculation",
cl::desc("MachineLICM should avoid speculation"),
- cl::init(false), cl::Hidden);
+ cl::init(true), cl::Hidden);
=20
STATISTIC(NumHoisted,
"Number of machine instructions hoisted out of loops");
@@ -60,8 +60,6 @@
=20
namespace {
class MachineLICM : public MachineFunctionPass {
- bool PreRegAlloc;
-
const TargetMachine *TM;
const TargetInstrInfo *TII;
const TargetLowering *TLI;
@@ -69,6 +67,7 @@
const MachineFrameInfo *MFI;
MachineRegisterInfo *MRI;
const InstrItineraryData *InstrItins;
+ bool PreRegAlloc;
=20
// Various analyses that we use...
AliasAnalysis *AA; // Alias analysis info.
@@ -81,7 +80,13 @@
MachineLoop *CurLoop; // The current loop we are working on.
MachineBasicBlock *CurPreheader; // The preheader for CurLoop.
=20
- BitVector AllocatableSet;
+ // Exit blocks for CurLoop.
+ SmallVector<MachineBasicBlock*, 8> ExitBlocks;
+
+ bool isExitBlock(const MachineBasicBlock *MBB) const {
+ return std::find(ExitBlocks.begin(), ExitBlocks.end(), MBB) !=3D
+ ExitBlocks.end();
+ }
=20
// Track 'estimated' register pressure.
SmallSet<unsigned, 32> RegSeen;
@@ -122,8 +127,6 @@
=20
virtual bool runOnMachineFunction(MachineFunction &MF);
=20
- const char *getPassName() const { return "Machine Instruction LICM"; }
-
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<MachineLoopInfo>();
AU.addRequired<MachineDominatorTree>();
@@ -165,7 +168,9 @@
=20
/// ProcessMI - Examine the instruction for potentai LICM candidate. A=
lso
/// gather register def and frame object update information.
- void ProcessMI(MachineInstr *MI, unsigned *PhysRegDefs,
+ void ProcessMI(MachineInstr *MI,
+ BitVector &PhysRegDefs,
+ BitVector &PhysRegClobbers,
SmallSet<int, 32> &StoredFIs,
SmallVector<CandidateInfo, 32> &Candidates);
=20
@@ -182,12 +187,12 @@
/// invariant. I.e., all virtual register operands are defined outside=
of
/// the loop, physical registers aren't accessed (explicitly or implic=
itly),
/// and the instruction is hoistable.
- ///=20
+ ///
bool IsLoopInvariantInst(MachineInstr &I);
=20
- /// HasAnyPHIUse - Return true if the specified register is used by any
- /// phi node.
- bool HasAnyPHIUse(unsigned Reg) const;
+ /// HasLoopPHIUse - Return true if the specified instruction is used b=
y any
+ /// phi node in the current loop.
+ bool HasLoopPHIUse(const MachineInstr *MI) const;
=20
/// HasHighOperandLatency - Compute operand latency between a def of '=
Reg'
/// and an use in the current loop, return true if the target consider=
ed
@@ -200,7 +205,7 @@
/// CanCauseHighRegPressure - Visit BBs from header to current BB,
/// check if hoisting an instruction of the given cost matrix can caus=
e high
/// register pressure.
- bool CanCauseHighRegPressure(DenseMap<unsigned, int> &Cost);
+ bool CanCauseHighRegPressure(DenseMap<unsigned, int> &Cost, bool Cheap=
);
=20
/// UpdateBackTraceRegPressure - Traverse the back trace from header to
/// the current block and update their register pressures to reflect t=
he
@@ -215,13 +220,25 @@
/// If not then a load from this mbb may not be safe to hoist.
bool IsGuaranteedToExecute(MachineBasicBlock *BB);
=20
- /// HoistRegion - Walk the specified region of the CFG (defined by all
- /// blocks dominated by the specified block, and that are in the curre=
nt
- /// loop) in depth first order w.r.t the DominatorTree. This allows us=
to
- /// visit definitions before uses, allowing us to hoist a loop body in=
one
- /// pass without iteration.
+ void EnterScope(MachineBasicBlock *MBB);
+
+ void ExitScope(MachineBasicBlock *MBB);
+
+ /// ExitScopeIfDone - Destroy scope for the MBB that corresponds to gi=
ven
+ /// dominator tree node if its a leaf or all of its children are done.=
Walk
+ /// up the dominator tree to destroy ancestors which are now done.
+ void ExitScopeIfDone(MachineDomTreeNode *Node,
+ DenseMap<MachineDomTreeNode*, unsigned> &OpenChildren,
+ DenseMap<MachineDomTreeNode*, MachineDomTreeNode*> &Parent=
Map);
+
+ /// HoistOutOfLoop - Walk the specified loop in the CFG (defined by all
+ /// blocks dominated by the specified header block, and that are in the
+ /// current loop) in depth first order w.r.t the DominatorTree. This a=
llows
+ /// us to visit definitions before uses, allowing us to hoist a loop b=
ody in
+ /// one pass without iteration.
///
- void HoistRegion(MachineDomTreeNode *N, bool IsHeader =3D false);
+ void HoistOutOfLoop(MachineDomTreeNode *LoopHeaderNode);
+ void HoistRegion(MachineDomTreeNode *N, bool IsHeader);
=20
/// getRegisterClassIDAndCost - For a given MI, register, and the oper=
and
/// index, return the ID and cost of its representative register class=
by
@@ -278,6 +295,7 @@
} // end anonymous namespace
=20
char MachineLICM::ID =3D 0;
+char &llvm::MachineLICMID =3D MachineLICM::ID;
INITIALIZE_PASS_BEGIN(MachineLICM, "machinelicm",
"Machine Loop Invariant Code Motion", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
@@ -286,10 +304,6 @@
INITIALIZE_PASS_END(MachineLICM, "machinelicm",
"Machine Loop Invariant Code Motion", false, false)
=20
-FunctionPass *llvm::createMachineLICMPass(bool PreRegAlloc) {
- return new MachineLICM(PreRegAlloc);
-}
-
/// LoopIsOuterMostWithPredecessor - Test if the given loop is the outer-m=
ost
/// loop that has a unique predecessor.
static bool LoopIsOuterMostWithPredecessor(MachineLoop *CurLoop) {
@@ -305,12 +319,6 @@
}
=20
bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
- if (PreRegAlloc)
- DEBUG(dbgs() << "******** Pre-regalloc Machine LICM: ");
- else
- DEBUG(dbgs() << "******** Post-regalloc Machine LICM: ");
- DEBUG(dbgs() << MF.getFunction()->getName() << " ********\n");
-
Changed =3D FirstInLoop =3D false;
TM =3D &MF.getTarget();
TII =3D TM->getInstrInfo();
@@ -319,7 +327,14 @@
MFI =3D MF.getFrameInfo();
MRI =3D &MF.getRegInfo();
InstrItins =3D TM->getInstrItineraryData();
- AllocatableSet =3D TRI->getAllocatableSet(MF);
+
+ PreRegAlloc =3D MRI->isSSA();
+
+ if (PreRegAlloc)
+ DEBUG(dbgs() << "******** Pre-regalloc Machine LICM: ");
+ else
+ DEBUG(dbgs() << "******** Post-regalloc Machine LICM: ");
+ DEBUG(dbgs() << MF.getFunction()->getName() << " ********\n");
=20
if (PreRegAlloc) {
// Estimate register pressure during pre-regalloc pass.
@@ -341,6 +356,7 @@
while (!Worklist.empty()) {
CurLoop =3D Worklist.pop_back_val();
CurPreheader =3D 0;
+ ExitBlocks.clear();
=20
// If this is done before regalloc, only visit outer-most preheader-sp=
orting
// loops.
@@ -349,6 +365,8 @@
continue;
}
=20
+ CurLoop->getExitBlocks(ExitBlocks);
+
if (!PreRegAlloc)
HoistRegionPostRA();
else {
@@ -356,7 +374,7 @@
// being hoisted.
MachineDomTreeNode *N =3D DT->getNode(CurLoop->getHeader());
FirstInLoop =3D true;
- HoistRegion(N, true);
+ HoistOutOfLoop(N);
CSEMap.clear();
}
}
@@ -383,7 +401,8 @@
/// ProcessMI - Examine the instruction for potentai LICM candidate. Also
/// gather register def and frame object update information.
void MachineLICM::ProcessMI(MachineInstr *MI,
- unsigned *PhysRegDefs,
+ BitVector &PhysRegDefs,
+ BitVector &PhysRegClobbers,
SmallSet<int, 32> &StoredFIs,
SmallVector<CandidateInfo, 32> &Candidates) {
bool RuledOut =3D false;
@@ -402,6 +421,13 @@
continue;
}
=20
+ // We can't hoist an instruction defining a physreg that is clobbered =
in
+ // the loop.
+ if (MO.isRegMask()) {
+ PhysRegClobbers.setBitsNotInMask(MO.getRegMask());
+ continue;
+ }
+
if (!MO.isReg())
continue;
unsigned Reg =3D MO.getReg();
@@ -411,7 +437,7 @@
"Not expecting virtual register!");
=20
if (!MO.isDef()) {
- if (Reg && PhysRegDefs[Reg])
+ if (Reg && (PhysRegDefs.test(Reg) || PhysRegClobbers.test(Reg)))
// If it's using a non-loop-invariant register, then it's obviousl=
y not
// safe to hoist.
HasNonInvariantUse =3D true;
@@ -419,9 +445,8 @@
}
=20
if (MO.isImplicit()) {
- ++PhysRegDefs[Reg];
- for (const unsigned *AS =3D TRI->getAliasSet(Reg); *AS; ++AS)
- ++PhysRegDefs[*AS];
+ for (const uint16_t *AS =3D TRI->getOverlaps(Reg); *AS; ++AS)
+ PhysRegClobbers.set(*AS);
if (!MO.isDead())
// Non-dead implicit def? This cannot be hoisted.
RuledOut =3D true;
@@ -438,14 +463,17 @@
Def =3D Reg;
=20
// If we have already seen another instruction that defines the same
- // register, then this is not safe.
- if (++PhysRegDefs[Reg] > 1)
- // MI defined register is seen defined by another instruction in
- // the loop, it cannot be a LICM candidate.
- RuledOut =3D true;
- for (const unsigned *AS =3D TRI->getAliasSet(Reg); *AS; ++AS)
- if (++PhysRegDefs[*AS] > 1)
+ // register, then this is not safe. Two defs is indicated by setting a
+ // PhysRegClobbers bit.
+ for (const uint16_t *AS =3D TRI->getOverlaps(Reg); *AS; ++AS) {
+ if (PhysRegDefs.test(*AS))
+ PhysRegClobbers.set(*AS);
+ if (PhysRegClobbers.test(*AS))
+ // MI defined register is seen defined by another instruction in
+ // the loop, it cannot be a LICM candidate.
RuledOut =3D true;
+ PhysRegDefs.set(*AS);
+ }
}
=20
// Only consider reloads for now and remats which do not have register
@@ -461,9 +489,13 @@
/// HoistRegionPostRA - Walk the specified region of the CFG and hoist loop
/// invariants out to the preheader.
void MachineLICM::HoistRegionPostRA() {
+ MachineBasicBlock *Preheader =3D getCurPreheader();
+ if (!Preheader)
+ return;
+
unsigned NumRegs =3D TRI->getNumRegs();
- unsigned *PhysRegDefs =3D new unsigned[NumRegs];
- std::fill(PhysRegDefs, PhysRegDefs + NumRegs, 0);
+ BitVector PhysRegDefs(NumRegs); // Regs defined once in the loop.
+ BitVector PhysRegClobbers(NumRegs); // Regs defined more than once.
=20
SmallVector<CandidateInfo, 32> Candidates;
SmallSet<int, 32> StoredFIs;
@@ -485,16 +517,31 @@
for (MachineBasicBlock::livein_iterator I =3D BB->livein_begin(),
E =3D BB->livein_end(); I !=3D E; ++I) {
unsigned Reg =3D *I;
- ++PhysRegDefs[Reg];
- for (const unsigned *AS =3D TRI->getAliasSet(Reg); *AS; ++AS)
- ++PhysRegDefs[*AS];
+ for (const uint16_t *AS =3D TRI->getOverlaps(Reg); *AS; ++AS)
+ PhysRegDefs.set(*AS);
}
=20
SpeculationState =3D SpeculateUnknown;
for (MachineBasicBlock::iterator
MII =3D BB->begin(), E =3D BB->end(); MII !=3D E; ++MII) {
MachineInstr *MI =3D &*MII;
- ProcessMI(MI, PhysRegDefs, StoredFIs, Candidates);
+ ProcessMI(MI, PhysRegDefs, PhysRegClobbers, StoredFIs, Candidates);
+ }
+ }
+
+ // Gather the registers read / clobbered by the terminator.
+ BitVector TermRegs(NumRegs);
+ MachineBasicBlock::iterator TI =3D Preheader->getFirstTerminator();
+ if (TI !=3D Preheader->end()) {
+ for (unsigned i =3D 0, e =3D TI->getNumOperands(); i !=3D e; ++i) {
+ const MachineOperand &MO =3D TI->getOperand(i);
+ if (!MO.isReg())
+ continue;
+ unsigned Reg =3D MO.getReg();
+ if (!Reg)
+ continue;
+ for (const uint16_t *AS =3D TRI->getOverlaps(Reg); *AS; ++AS)
+ TermRegs.set(*AS);
}
}
=20
@@ -503,19 +550,25 @@
// instruction in the loop.
// 2. If the candidate is a load from stack slot (always true for now),
// check if the slot is stored anywhere in the loop.
+ // 3. Make sure candidate def should not clobber
+ // registers read by the terminator. Similarly its def should not be
+ // clobbered by the terminator.
for (unsigned i =3D 0, e =3D Candidates.size(); i !=3D e; ++i) {
if (Candidates[i].FI !=3D INT_MIN &&
StoredFIs.count(Candidates[i].FI))
continue;
=20
- if (PhysRegDefs[Candidates[i].Def] =3D=3D 1) {
+ unsigned Def =3D Candidates[i].Def;
+ if (!PhysRegClobbers.test(Def) && !TermRegs.test(Def)) {
bool Safe =3D true;
MachineInstr *MI =3D Candidates[i].MI;
for (unsigned j =3D 0, ee =3D MI->getNumOperands(); j !=3D ee; ++j) {
const MachineOperand &MO =3D MI->getOperand(j);
if (!MO.isReg() || MO.isDef() || !MO.getReg())
continue;
- if (PhysRegDefs[MO.getReg()]) {
+ unsigned Reg =3D MO.getReg();
+ if (PhysRegDefs.test(Reg) ||
+ PhysRegClobbers.test(Reg)) {
// If it's using a non-loop-invariant register, then it's obviou=
sly
// not safe to hoist.
Safe =3D false;
@@ -526,8 +579,6 @@
HoistPostRA(MI, Candidates[i].Def);
}
}
-
- delete[] PhysRegDefs;
}
=20
/// AddToLiveIns - Add register 'Reg' to the livein sets of BBs in the cur=
rent
@@ -556,26 +607,17 @@
/// dirty work.
void MachineLICM::HoistPostRA(MachineInstr *MI, unsigned Def) {
MachineBasicBlock *Preheader =3D getCurPreheader();
- if (!Preheader) return;
=20
// Now move the instructions to the predecessor, inserting it before any
// terminator instructions.
- DEBUG({
- dbgs() << "Hoisting " << *MI;
- if (Preheader->getBasicBlock())
- dbgs() << " to MachineBasicBlock "
- << Preheader->getName();
- if (MI->getParent()->getBasicBlock())
- dbgs() << " from MachineBasicBlock "
- << MI->getParent()->getName();
- dbgs() << "\n";
- });
+ DEBUG(dbgs() << "Hoisting to BB#" << Preheader->getNumber() << " from BB=
#"
+ << MI->getParent()->getNumber() << ": " << *MI);
=20
// Splice the instruction to the preheader.
MachineBasicBlock *MBB =3D MI->getParent();
Preheader->splice(Preheader->getFirstTerminator(), MBB, MI);
=20
- // Add register to livein list to all the BBs in the current loop since =
a=20
+ // Add register to livein list to all the BBs in the current loop since a
// loop invariant must be kept live throughout the whole loop. This is
// important to ensure later passes do not scavenge the def register.
AddToLiveIns(Def);
@@ -589,7 +631,7 @@
bool MachineLICM::IsGuaranteedToExecute(MachineBasicBlock *BB) {
if (SpeculationState !=3D SpeculateUnknown)
return SpeculationState =3D=3D SpeculateFalse;
- =20
+
if (BB !=3D CurLoop->getHeader()) {
// Check loop exiting blocks.
SmallVector<MachineBasicBlock*, 8> CurrentLoopExitingBlocks;
@@ -605,57 +647,126 @@
return true;
}
=20
-/// HoistRegion - Walk the specified region of the CFG (defined by all blo=
cks
-/// dominated by the specified block, and that are in the current loop) in=
depth
-/// first order w.r.t the DominatorTree. This allows us to visit definitio=
ns
-/// before uses, allowing us to hoist a loop body in one pass without iter=
ation.
-///
-void MachineLICM::HoistRegion(MachineDomTreeNode *N, bool IsHeader) {
- assert(N !=3D 0 && "Null dominator tree node?");
- MachineBasicBlock *BB =3D N->getBlock();
+void MachineLICM::EnterScope(MachineBasicBlock *MBB) {
+ DEBUG(dbgs() << "Entering: " << MBB->getName() << '\n');
=20
- // If the header of the loop containing this basic block is a landing pa=
d,
- // then don't try to hoist instructions out of this loop.
- const MachineLoop *ML =3D MLI->getLoopFor(BB);
- if (ML && ML->getHeader()->isLandingPad()) return;
+ // Remember livein register pressure.
+ BackTrace.push_back(RegPressure);
+}
=20
- // If this subregion is not in the top level loop at all, exit.
- if (!CurLoop->contains(BB)) return;
+void MachineLICM::ExitScope(MachineBasicBlock *MBB) {
+ DEBUG(dbgs() << "Exiting: " << MBB->getName() << '\n');
+ BackTrace.pop_back();
+}
=20
- MachineBasicBlock *Preheader =3D getCurPreheader();
- if (!Preheader)
+/// ExitScopeIfDone - Destroy scope for the MBB that corresponds to the gi=
ven
+/// dominator tree node if its a leaf or all of its children are done. Walk
+/// up the dominator tree to destroy ancestors which are now done.
+void MachineLICM::ExitScopeIfDone(MachineDomTreeNode *Node,
+ DenseMap<MachineDomTreeNode*, unsigned> &OpenChildren,
+ DenseMap<MachineDomTreeNode*, MachineDomTreeNode*> &Parent=
Map) {
+ if (OpenChildren[Node])
return;
=20
- if (IsHeader) {
+ // Pop scope.
+ ExitScope(Node->getBlock());
+
+ // Now traverse upwards to pop ancestors whose offsprings are all done.
+ while (MachineDomTreeNode *Parent =3D ParentMap[Node]) {
+ unsigned Left =3D --OpenChildren[Parent];
+ if (Left !=3D 0)
+ break;
+ ExitScope(Parent->getBlock());
+ Node =3D Parent;
+ }
+}
+
+/// HoistOutOfLoop - Walk the specified loop in the CFG (defined by all
+/// blocks dominated by the specified header block, and that are in the
+/// current loop) in depth first order w.r.t the DominatorTree. This allows
+/// us to visit definitions before uses, allowing us to hoist a loop body =
in
+/// one pass without iteration.
+///
+void MachineLICM::HoistOutOfLoop(MachineDomTreeNode *HeaderN) {
+ SmallVector<MachineDomTreeNode*, 32> Scopes;
+ SmallVector<MachineDomTreeNode*, 8> WorkList;
+ DenseMap<MachineDomTreeNode*, MachineDomTreeNode*> ParentMap;
+ DenseMap<MachineDomTreeNode*, unsigned> OpenChildren;
+
+ // Perform a DFS walk to determine the order of visit.
+ WorkList.push_back(HeaderN);
+ do {
+ MachineDomTreeNode *Node =3D WorkList.pop_back_val();
+ assert(Node !=3D 0 && "Null dominator tree node?");
+ MachineBasicBlock *BB =3D Node->getBlock();
+
+ // If the header of the loop containing this basic block is a landing =
pad,
+ // then don't try to hoist instructions out of this loop.
+ const MachineLoop *ML =3D MLI->getLoopFor(BB);
+ if (ML && ML->getHeader()->isLandingPad())
+ continue;
+
+ // If this subregion is not in the top level loop at all, exit.
+ if (!CurLoop->contains(BB))
+ continue;
+
+ Scopes.push_back(Node);
+ const std::vector<MachineDomTreeNode*> &Children =3D Node->getChildren=
();
+ unsigned NumChildren =3D Children.size();
+
+ // Don't hoist things out of a large switch statement. This often cau=
ses
+ // code to be hoisted that wasn't going to be executed, and increases
+ // register pressure in a situation where it's likely to matter.
+ if (BB->succ_size() >=3D 25)
+ NumChildren =3D 0;
+
+ OpenChildren[Node] =3D NumChildren;
+ // Add children in reverse order as then the next popped worklist node=
is
+ // the first child of this node. This means we ultimately traverse the
+ // DOM tree in exactly the same order as if we'd recursed.
+ for (int i =3D (int)NumChildren-1; i >=3D 0; --i) {
+ MachineDomTreeNode *Child =3D Children[i];
+ ParentMap[Child] =3D Node;
+ WorkList.push_back(Child);
+ }
+ } while (!WorkList.empty());
+
+ if (Scopes.size() !=3D 0) {
+ MachineBasicBlock *Preheader =3D getCurPreheader();
+ if (!Preheader)
+ return;
+
// Compute registers which are livein into the loop headers.
RegSeen.clear();
BackTrace.clear();
InitRegPressure(Preheader);
}
=20
- // Remember livein register pressure.
- BackTrace.push_back(RegPressure);
+ // Now perform LICM.
+ for (unsigned i =3D 0, e =3D Scopes.size(); i !=3D e; ++i) {
+ MachineDomTreeNode *Node =3D Scopes[i];
+ MachineBasicBlock *MBB =3D Node->getBlock();
=20
- SpeculationState =3D SpeculateUnknown;
- for (MachineBasicBlock::iterator
- MII =3D BB->begin(), E =3D BB->end(); MII !=3D E; ) {
- MachineBasicBlock::iterator NextMII =3D MII; ++NextMII;
- MachineInstr *MI =3D &*MII;
- if (!Hoist(MI, Preheader))
- UpdateRegPressure(MI);
- MII =3D NextMII;
+ MachineBasicBlock *Preheader =3D getCurPreheader();
+ if (!Preheader)
+ continue;
+
+ EnterScope(MBB);
+
+ // Process the block
+ SpeculationState =3D SpeculateUnknown;
+ for (MachineBasicBlock::iterator
+ MII =3D MBB->begin(), E =3D MBB->end(); MII !=3D E; ) {
+ MachineBasicBlock::iterator NextMII =3D MII; ++NextMII;
+ MachineInstr *MI =3D &*MII;
+ if (!Hoist(MI, Preheader))
+ UpdateRegPressure(MI);
+ MII =3D NextMII;
+ }
+
+ // If it's a leaf node, it's done. Traverse upwards to pop ancestors.
+ ExitScopeIfDone(Node, OpenChildren, ParentMap);
}
-
- // Don't hoist things out of a large switch statement. This often causes
- // code to be hoisted that wasn't going to be executed, and increases
- // register pressure in a situation where it's likely to matter.
- if (BB->succ_size() < 25) {
- const std::vector<MachineDomTreeNode*> &Children =3D N->getChildren();
- for (unsigned I =3D 0, E =3D Children.size(); I !=3D E; ++I)
- HoistRegion(Children[I]);
- }
-
- BackTrace.pop_back();
}
=20
static bool isOperandKill(const MachineOperand &MO, MachineRegisterInfo *M=
RI) {
@@ -670,7 +781,7 @@
unsigned &RCId, unsigned &RCCost) c=
onst {
const TargetRegisterClass *RC =3D MRI->getRegClass(Reg);
EVT VT =3D *RC->vt_begin();
- if (VT =3D=3D MVT::untyped) {
+ if (VT =3D=3D MVT::Untyped) {
RCId =3D RC->getID();
RCCost =3D 1;
} else {
@@ -678,7 +789,7 @@
RCCost =3D TLI->getRepRegClassCostFor(VT);
}
}
- =20
+
/// InitRegPressure - Find all virtual register references that are liveou=
t of
/// the preheader to initialize the starting "register pressure". Note this
/// does not count live through (livein but not used) registers.
@@ -762,6 +873,21 @@
}
}
=20
+/// isLoadFromGOTOrConstantPool - Return true if this machine instruction
+/// loads from global offset table or constant pool.
+static bool isLoadFromGOTOrConstantPool(MachineInstr &MI) {
+ assert (MI.mayLoad() && "Expected MI that loads!");
+ for (MachineInstr::mmo_iterator I =3D MI.memoperands_begin(),
+ E =3D MI.memoperands_end(); I !=3D E; ++I) {
+ if (const Value *V =3D (*I)->getValue()) {
+ if (const PseudoSourceValue *PSV =3D dyn_cast<PseudoSourceValue>(V))
+ if (PSV =3D=3D PSV->getGOT() || PSV =3D=3D PSV->getConstantPool())
+ return true;
+ }
+ }
+ return false;
+}
+
/// IsLICMCandidate - Returns true if the instruction may be a suitable
/// candidate for LICM. e.g. If the instruction is a call, then it's obvio=
usly
/// not safe to hoist it.
@@ -773,9 +899,12 @@
=20
// If it is load then check if it is guaranteed to execute by making sur=
e that
// it dominates all exiting blocks. If it doesn't, then there is a path =
out of
- // the loop which does not execute this load, so we can't hoist it.
+ // the loop which does not execute this load, so we can't hoist it. Loads
+ // from constant memory are not safe to speculate all the time, for exam=
ple
+ // indexed load from a jump table.
// Stores and side effects are already checked by isSafeToMove.
- if (I.getDesc().mayLoad() && !IsGuaranteedToExecute(I.getParent()))
+ if (I.mayLoad() && !isLoadFromGOTOrConstantPool(I) &&
+ !IsGuaranteedToExecute(I.getParent()))
return false;
=20
return true;
@@ -785,7 +914,7 @@
/// invariant. I.e., all virtual register operands are defined outside of =
the
/// loop, physical registers aren't accessed explicitly, and there are no =
side
/// effects that aren't captured by the operands or other flags.
-///=20
+///
bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) {
if (!IsLICMCandidate(I))
return false;
@@ -806,18 +935,8 @@
// If the physreg has no defs anywhere, it's just an ambient regis=
ter
// and we can freely move its uses. Alternatively, if it's allocat=
able,
// it could get allocated to something with a def during allocatio=
n.
- if (!MRI->def_empty(Reg))
+ if (!MRI->isConstantPhysReg(Reg, *I.getParent()->getParent()))
return false;
- if (AllocatableSet.test(Reg))
- return false;
- // Check for a def among the register's aliases too.
- for (const unsigned *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Al=
ias) {
- unsigned AliasReg =3D *Alias;
- if (!MRI->def_empty(AliasReg))
- return false;
- if (AllocatableSet.test(AliasReg))
- return false;
- }
// Otherwise it's safe to move.
continue;
} else if (!MO.isDead()) {
@@ -847,22 +966,40 @@
}
=20
=20
-/// HasAnyPHIUse - Return true if the specified register is used by any
-/// phi node.
-bool MachineLICM::HasAnyPHIUse(unsigned Reg) const {
- for (MachineRegisterInfo::use_iterator UI =3D MRI->use_begin(Reg),
- UE =3D MRI->use_end(); UI !=3D UE; ++UI) {
- MachineInstr *UseMI =3D &*UI;
- if (UseMI->isPHI())
- return true;
- // Look pass copies as well.
- if (UseMI->isCopy()) {
- unsigned Def =3D UseMI->getOperand(0).getReg();
- if (TargetRegisterInfo::isVirtualRegister(Def) &&
- HasAnyPHIUse(Def))
- return true;
+/// HasLoopPHIUse - Return true if the specified instruction is used by a
+/// phi node and hoisting it could cause a copy to be inserted.
+bool MachineLICM::HasLoopPHIUse(const MachineInstr *MI) const {
+ SmallVector<const MachineInstr*, 8> Work(1, MI);
+ do {
+ MI =3D Work.pop_back_val();
+ for (ConstMIOperands MO(MI); MO.isValid(); ++MO) {
+ if (!MO->isReg() || !MO->isDef())
+ continue;
+ unsigned Reg =3D MO->getReg();
+ if (!TargetRegisterInfo::isVirtualRegister(Reg))
+ continue;
+ for (MachineRegisterInfo::use_iterator UI =3D MRI->use_begin(Reg),
+ UE =3D MRI->use_end(); UI !=3D UE; ++UI) {
+ MachineInstr *UseMI =3D &*UI;
+ // A PHI may cause a copy to be inserted.
+ if (UseMI->isPHI()) {
+ // A PHI inside the loop causes a copy because the live range of=
Reg is
+ // extended across the PHI.
+ if (CurLoop->contains(UseMI))
+ return true;
+ // A PHI in an exit block can cause a copy to be inserted if the=
PHI
+ // has multiple predecessors in the loop with different values.
+ // For now, approximate by rejecting all exit blocks.
+ if (isExitBlock(UseMI->getParent()))
+ return true;
+ continue;
+ }
+ // Look past copies as well.
+ if (UseMI->isCopy() && CurLoop->contains(UseMI))
+ Work.push_back(UseMI);
+ }
}
- }
+ } while (!Work.empty());
return false;
}
=20
@@ -903,7 +1040,7 @@
/// IsCheapInstruction - Return true if the instruction is marked "cheap" =
or
/// the operand latency between its def and a use is one or less.
bool MachineLICM::IsCheapInstruction(MachineInstr &MI) const {
- if (MI.getDesc().isAsCheapAsAMove() || MI.isCopyLike())
+ if (MI.isAsCheapAsAMove() || MI.isCopyLike())
return true;
if (!InstrItins || InstrItins->isEmpty())
return false;
@@ -930,16 +1067,25 @@
/// CanCauseHighRegPressure - Visit BBs from header to current BB, check
/// if hoisting an instruction of the given cost matrix can cause high
/// register pressure.
-bool MachineLICM::CanCauseHighRegPressure(DenseMap<unsigned, int> &Cost) {
+bool MachineLICM::CanCauseHighRegPressure(DenseMap<unsigned, int> &Cost,
+ bool CheapInstr) {
for (DenseMap<unsigned, int>::iterator CI =3D Cost.begin(), CE =3D Cost.=
end();
CI !=3D CE; ++CI) {
- if (CI->second <=3D 0)=20
+ if (CI->second <=3D 0)
continue;
=20
unsigned RCId =3D CI->first;
+ unsigned Limit =3D RegLimit[RCId];
+ int Cost =3D CI->second;
+
+ // Don't hoist cheap instructions if they would increase register pres=
sure,
+ // even if we're under the limit.
+ if (CheapInstr)
+ return true;
+
for (unsigned i =3D BackTrace.size(); i !=3D 0; --i) {
SmallVector<unsigned, 8> &RP =3D BackTrace[i-1];
- if (RP[RCId] + CI->second >=3D RegLimit[RCId])
+ if (RP[RCId] + Cost >=3D Limit)
return true;
}
}
@@ -999,87 +1145,95 @@
if (MI.isImplicitDef())
return true;
=20
- // If the instruction is cheap, only hoist if it is re-materilizable. LI=
CM
- // will increase register pressure. It's probably not worth it if the
- // instruction is cheap.
- // Also hoist loads from constant memory, e.g. load from stubs, GOT. Hoi=
sting
- // these tend to help performance in low register pressure situation. The
- // trade off is it may cause spill in high pressure situation. It will e=
nd up
- // adding a store in the loop preheader. But the reload is no more expen=
sive.
- // The side benefit is these loads are frequently CSE'ed.
- if (IsCheapInstruction(MI)) {
- if (!TII->isTriviallyReMaterializable(&MI, AA))
- return false;
- } else {
- // Estimate register pressure to determine whether to LICM the instruc=
tion.
- // In low register pressure situation, we can be more aggressive about=20
- // hoisting. Also, favors hoisting long latency instructions even in
- // moderately high pressure situation.
- // FIXME: If there are long latency loop-invariant instructions inside=
the
- // loop at this point, why didn't the optimizer's LICM hoist them?
- DenseMap<unsigned, int> Cost;
- for (unsigned i =3D 0, e =3D MI.getDesc().getNumOperands(); i !=3D e; =
++i) {
- const MachineOperand &MO =3D MI.getOperand(i);
- if (!MO.isReg() || MO.isImplicit())
- continue;
- unsigned Reg =3D MO.getReg();
- if (!TargetRegisterInfo::isVirtualRegister(Reg))
- continue;
+ // Besides removing computation from the loop, hoisting an instruction h=
as
+ // these effects:
+ //
+ // - The value defined by the instruction becomes live across the entire
+ // loop. This increases register pressure in the loop.
+ //
+ // - If the value is used by a PHI in the loop, a copy will be required =
for
+ // lowering the PHI after extending the live range.
+ //
+ // - When hoisting the last use of a value in the loop, that value no lo=
nger
+ // needs to be live in the loop. This lowers register pressure in the =
loop.
=20
- unsigned RCId, RCCost;
- getRegisterClassIDAndCost(&MI, Reg, i, RCId, RCCost);
- if (MO.isDef()) {
- if (HasHighOperandLatency(MI, i, Reg)) {
- ++NumHighLatency;
- return true;
- }
+ bool CheapInstr =3D IsCheapInstruction(MI);
+ bool CreatesCopy =3D HasLoopPHIUse(&MI);
=20
- DenseMap<unsigned, int>::iterator CI =3D Cost.find(RCId);
- if (CI !=3D Cost.end())
- CI->second +=3D RCCost;
- else
- Cost.insert(std::make_pair(RCId, RCCost));
- } else if (isOperandKill(MO, MRI)) {
- // Is a virtual register use is a kill, hoisting it out of the loop
- // may actually reduce register pressure or be register pressure
- // neutral.
- DenseMap<unsigned, int>::iterator CI =3D Cost.find(RCId);
- if (CI !=3D Cost.end())
- CI->second -=3D RCCost;
- else
- Cost.insert(std::make_pair(RCId, -RCCost));
- }
- }
-
- // Visit BBs from header to current BB, if hoisting this doesn't cause
- // high register pressure, then it's safe to proceed.
- if (!CanCauseHighRegPressure(Cost)) {
- ++NumLowRP;
- return true;
- }
-
- // Do not "speculate" in high register pressure situation. If an
- // instruction is not guaranteed to be executed in the loop, it's best=
to be
- // conservative.
- if (AvoidSpeculation &&
- (!IsGuaranteedToExecute(MI.getParent()) && !MayCSE(&MI)))
- return false;
-
- // High register pressure situation, only hoist if the instruction is =
going to
- // be remat'ed.
- if (!TII->isTriviallyReMaterializable(&MI, AA) &&
- !MI.isInvariantLoad(AA))
- return false;
+ // Don't hoist a cheap instruction if it would create a copy in the loop.
+ if (CheapInstr && CreatesCopy) {
+ DEBUG(dbgs() << "Won't hoist cheap instr with loop PHI use: " << MI);
+ return false;
}
=20
- // If result(s) of this instruction is used by PHIs outside of the loop,=
then
- // don't hoist it if the instruction because it will introduce an extra =
copy.
- for (unsigned i =3D 0, e =3D MI.getNumOperands(); i !=3D e; ++i) {
+ // Rematerializable instructions should always be hoisted since the regi=
ster
+ // allocator can just pull them down again when needed.
+ if (TII->isTriviallyReMaterializable(&MI, AA))
+ return true;
+
+ // Estimate register pressure to determine whether to LICM the instructi=
on.
+ // In low register pressure situation, we can be more aggressive about
+ // hoisting. Also, favors hoisting long latency instructions even in
+ // moderately high pressure situation.
+ // Cheap instructions will only be hoisted if they don't increase regist=
er
+ // pressure at all.
+ // FIXME: If there are long latency loop-invariant instructions inside t=
he
+ // loop at this point, why didn't the optimizer's LICM hoist them?
+ DenseMap<unsigned, int> Cost;
+ for (unsigned i =3D 0, e =3D MI.getDesc().getNumOperands(); i !=3D e; ++=
i) {
const MachineOperand &MO =3D MI.getOperand(i);
- if (!MO.isReg() || !MO.isDef())
+ if (!MO.isReg() || MO.isImplicit())
continue;
- if (HasAnyPHIUse(MO.getReg()))
- return false;
+ unsigned Reg =3D MO.getReg();
+ if (!TargetRegisterInfo::isVirtualRegister(Reg))
+ continue;
+
+ unsigned RCId, RCCost;
+ getRegisterClassIDAndCost(&MI, Reg, i, RCId, RCCost);
+ if (MO.isDef()) {
+ if (HasHighOperandLatency(MI, i, Reg)) {
+ DEBUG(dbgs() << "Hoist High Latency: " << MI);
+ ++NumHighLatency;
+ return true;
+ }
+ Cost[RCId] +=3D RCCost;
+ } else if (isOperandKill(MO, MRI)) {
+ // Is a virtual register use is a kill, hoisting it out of the loop
+ // may actually reduce register pressure or be register pressure
+ // neutral.
+ Cost[RCId] -=3D RCCost;
+ }
+ }
+
+ // Visit BBs from header to current BB, if hoisting this doesn't cause
+ // high register pressure, then it's safe to proceed.
+ if (!CanCauseHighRegPressure(Cost, CheapInstr)) {
+ DEBUG(dbgs() << "Hoist non-reg-pressure: " << MI);
+ ++NumLowRP;
+ return true;
+ }
+
+ // Don't risk increasing register pressure if it would create copies.
+ if (CreatesCopy) {
+ DEBUG(dbgs() << "Won't hoist instr with loop PHI use: " << MI);
+ return false;
+ }
+
+ // Do not "speculate" in high register pressure situation. If an
+ // instruction is not guaranteed to be executed in the loop, it's best t=
o be
+ // conservative.
+ if (AvoidSpeculation &&
+ (!IsGuaranteedToExecute(MI.getParent()) && !MayCSE(&MI))) {
+ DEBUG(dbgs() << "Won't speculate: " << MI);
+ return false;
+ }
+
+ // High register pressure situation, only hoist if the instruction is go=
ing
+ // to be remat'ed.
+ if (!TII->isTriviallyReMaterializable(&MI, AA) &&
+ !MI.isInvariantLoad(AA)) {
+ DEBUG(dbgs() << "Can't remat / high reg-pressure: " << MI);
+ return false;
}
=20
return true;
@@ -1087,7 +1241,7 @@
=20
MachineInstr *MachineLICM::ExtractHoistableLoad(MachineInstr *MI) {
// Don't unfold simple loads.
- if (MI->getDesc().canFoldAsLoad())
+ if (MI->canFoldAsLoad())
return 0;
=20
// If not, we may be able to unfold a load and hoist that.
@@ -1123,8 +1277,9 @@
assert(NewMIs.size() =3D=3D 2 &&
"Unfolded a load into multiple instructions!");
MachineBasicBlock *MBB =3D MI->getParent();
- MBB->insert(MI, NewMIs[0]);
- MBB->insert(MI, NewMIs[1]);
+ MachineBasicBlock::iterator Pos =3D MI;
+ MBB->insert(Pos, NewMIs[0]);
+ MBB->insert(Pos, NewMIs[1]);
// If unfolding produced a load that wasn't loop-invariant or profitable=
to
// hoist, discard the new instructions and bail.
if (!IsLoopInvariantInst(*NewMIs[0]) || !IsProfitableToHoist(*NewMIs[0])=
) {
@@ -1180,6 +1335,7 @@
=20
// Replace virtual registers defined by MI by their counterparts defin=
ed
// by Dup.
+ SmallVector<unsigned, 2> Defs;
for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
const MachineOperand &MO =3D MI->getOperand(i);
=20
@@ -1190,11 +1346,33 @@
"Instructions with different phys regs are not identical!");
=20
if (MO.isReg() && MO.isDef() &&
- !TargetRegisterInfo::isPhysicalRegister(MO.getReg())) {
- MRI->replaceRegWith(MO.getReg(), Dup->getOperand(i).getReg());
- MRI->clearKillFlags(Dup->getOperand(i).getReg());
+ !TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
+ Defs.push_back(i);
+ }
+
+ SmallVector<const TargetRegisterClass*, 2> OrigRCs;
+ for (unsigned i =3D 0, e =3D Defs.size(); i !=3D e; ++i) {
+ unsigned Idx =3D Defs[i];
+ unsigned Reg =3D MI->getOperand(Idx).getReg();
+ unsigned DupReg =3D Dup->getOperand(Idx).getReg();
+ OrigRCs.push_back(MRI->getRegClass(DupReg));
+
+ if (!MRI->constrainRegClass(DupReg, MRI->getRegClass(Reg))) {
+ // Restore old RCs if more than one defs.
+ for (unsigned j =3D 0; j !=3D i; ++j)
+ MRI->setRegClass(Dup->getOperand(Defs[j]).getReg(), OrigRCs[j]);
+ return false;
}
}
+
+ for (unsigned i =3D 0, e =3D Defs.size(); i !=3D e; ++i) {
+ unsigned Idx =3D Defs[i];
+ unsigned Reg =3D MI->getOperand(Idx).getReg();
+ unsigned DupReg =3D Dup->getOperand(Idx).getReg();
+ MRI->replaceRegWith(Reg, DupReg);
+ MRI->clearKillFlags(DupReg);
+ }
+
MI->eraseFromParent();
++NumCSEed;
return true;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/MachineM=
oduleInfo.cpp
--- a/head/contrib/llvm/lib/CodeGen/MachineModuleInfo.cpp Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/MachineModuleInfo.cpp Tue Apr 17 11:51:=
51 2012 +0300
@@ -257,7 +257,7 @@
: ImmutablePass(ID), Context(MAI, MRI, MOFI),
ObjFileMMI(0), CompactUnwindEncoding(0), CurCallSite(0), CallsEHReturn=
(0),
CallsUnwindInit(0), DbgInfoAvailable(false),
- CallsExternalVAFunctionWithFloatingPointArguments(false) {
+ UsesVAFloatArgument(false) {
initializeMachineModuleInfoPass(*PassRegistry::getPassRegistry());
// Always emit some info, by default "no personality" info.
Personalities.push_back(NULL);
@@ -268,9 +268,9 @@
MachineModuleInfo::MachineModuleInfo()
: ImmutablePass(ID),
Context(*(MCAsmInfo*)0, *(MCRegisterInfo*)0, (MCObjectFileInfo*)0) {
- assert(0 && "This MachineModuleInfo constructor should never be called, =
MMI "
- "should always be explicitly constructed by LLVMTargetMachine");
- abort();
+ llvm_unreachable("This MachineModuleInfo constructor should never be cal=
led, "
+ "MMI should always be explicitly constructed by "
+ "LLVMTargetMachine");
}
=20
MachineModuleInfo::~MachineModuleInfo() {
@@ -503,8 +503,7 @@
/// indexes.
void MachineModuleInfo::setCallSiteLandingPad(MCSymbol *Sym,
ArrayRef<unsigned> Sites) {
- for (unsigned I =3D 0, E =3D Sites.size(); I !=3D E; ++I)
- LPadToCallSiteMap[Sym].push_back(Sites[I]);
+ LPadToCallSiteMap[Sym].append(Sites.begin(), Sites.end());
}
=20
/// getTypeIDFor - Return the type id for the specified typeinfo. This is
@@ -541,8 +540,7 @@
// Add the new filter.
int FilterID =3D -(1 + FilterIds.size());
FilterIds.reserve(FilterIds.size() + TyIds.size() + 1);
- for (unsigned I =3D 0, N =3D TyIds.size(); I !=3D N; ++I)
- FilterIds.push_back(TyIds[I]);
+ FilterIds.insert(FilterIds.end(), TyIds.begin(), TyIds.end());
FilterEnds.push_back(FilterIds.size());
FilterIds.push_back(0); // terminator
return FilterID;
@@ -561,13 +559,13 @@
const Function* Personality =3D NULL;
=20
// Scan landing pads. If there is at least one non-NULL personality - us=
e it.
- for (unsigned i =3D 0; i !=3D LandingPads.size(); ++i)
+ for (unsigned i =3D 0, e =3D LandingPads.size(); i !=3D e; ++i)
if (LandingPads[i].Personality) {
Personality =3D LandingPads[i].Personality;
break;
}
=20
- for (unsigned i =3D 0; i < Personalities.size(); ++i) {
+ for (unsigned i =3D 0, e =3D Personalities.size(); i < e; ++i) {
if (Personalities[i] =3D=3D Personality)
return i;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/MachineP=
assRegistry.cpp
--- a/head/contrib/llvm/lib/CodeGen/MachinePassRegistry.cpp Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/MachinePassRegistry.cpp Tue Apr 17 11:5=
1:51 2012 +0300
@@ -16,6 +16,7 @@
=20
using namespace llvm;
=20
+void MachinePassRegistryListener::anchor() { }
=20
/// Add - Adds a function pass to the registration list.
///
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/MachineR=
egisterInfo.cpp
--- a/head/contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp Tue Apr 17 11:5=
1:51 2012 +0300
@@ -18,11 +18,12 @@
using namespace llvm;
=20
MachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI)
- : TRI(&TRI), IsSSA(true) {
+ : TRI(&TRI), IsSSA(true), TracksLiveness(true) {
VRegInfo.reserve(256);
RegAllocHints.reserve(256);
UsedPhysRegs.resize(TRI.getNumRegs());
- =20
+ UsedPhysRegMask.resize(TRI.getNumRegs());
+
// Create the physreg use/def lists.
PhysRegUseDefLists =3D new MachineOperand*[TRI.getNumRegs()];
memset(PhysRegUseDefLists, 0, sizeof(MachineOperand*)*TRI.getNumRegs());
@@ -30,9 +31,7 @@
=20
MachineRegisterInfo::~MachineRegisterInfo() {
#ifndef NDEBUG
- for (unsigned i =3D 0, e =3D getNumVirtRegs(); i !=3D e; ++i)
- assert(VRegInfo[TargetRegisterInfo::index2VirtReg(i)].second =3D=3D 0 =
&&
- "Vreg use list non-empty still?");
+ clearVirtRegs();
for (unsigned i =3D 0, e =3D UsedPhysRegs.size(); i !=3D e; ++i)
assert(!PhysRegUseDefLists[i] &&
"PhysRegUseDefLists has entries after all instructions are dele=
ted");
@@ -76,12 +75,14 @@
// Accumulate constraints from all uses.
for (reg_nodbg_iterator I =3D reg_nodbg_begin(Reg), E =3D reg_nodbg_end(=
); I !=3D E;
++I) {
- // TRI doesn't have accurate enough information to model this yet.
- if (I.getOperand().getSubReg())
- return false;
const TargetRegisterClass *OpRC =3D
I->getRegClassConstraint(I.getOperandNo(), TII, TRI);
- if (OpRC)
+ if (unsigned SubIdx =3D I.getOperand().getSubReg()) {
+ if (OpRC)
+ NewRC =3D TRI->getMatchingSuperRegClass(NewRC, OpRC, SubIdx);
+ else
+ NewRC =3D TRI->getSubClassWithSubReg(NewRC, SubIdx);
+ } else if (OpRC)
NewRC =3D TRI->getCommonSubClass(NewRC, OpRC);
if (!NewRC || NewRC =3D=3D OldRC)
return false;
@@ -115,6 +116,16 @@
return Reg;
}
=20
+/// clearVirtRegs - Remove all virtual registers (after physreg assignment=
).
+void MachineRegisterInfo::clearVirtRegs() {
+#ifndef NDEBUG
+ for (unsigned i =3D 0, e =3D getNumVirtRegs(); i !=3D e; ++i)
+ assert(VRegInfo[TargetRegisterInfo::index2VirtReg(i)].second =3D=3D 0 =
&&
+ "Vreg use list non-empty still?");
+#endif
+ VRegInfo.clear();
+}
+
/// HandleVRegListReallocation - We just added a virtual register to the
/// VRegInfo info list and it reallocated. Update the use/def lists info
/// pointers.
@@ -150,9 +161,8 @@
/// form, so there should only be one definition.
MachineInstr *MachineRegisterInfo::getVRegDef(unsigned Reg) const {
// Since we are in SSA form, we can use the first definition.
- if (!def_empty(Reg))
- return &*def_begin(Reg);
- return 0;
+ def_iterator I =3D def_begin(Reg);
+ return !I.atEnd() ? &*I : 0;
}
=20
bool MachineRegisterInfo::hasOneUse(unsigned RegNo) const {
@@ -242,18 +252,31 @@
}
}
=20
-void MachineRegisterInfo::closePhysRegsUsed(const TargetRegisterInfo &TRI)=
{
- for (int i =3D UsedPhysRegs.find_first(); i >=3D 0;
- i =3D UsedPhysRegs.find_next(i))
- for (const unsigned *SS =3D TRI.getSubRegisters(i);
- unsigned SubReg =3D *SS; ++SS)
- if (SubReg > unsigned(i))
- UsedPhysRegs.set(SubReg);
-}
-
#ifndef NDEBUG
void MachineRegisterInfo::dumpUses(unsigned Reg) const {
for (use_iterator I =3D use_begin(Reg), E =3D use_end(); I !=3D E; ++I)
I.getOperand().getParent()->dump();
}
#endif
+
+void MachineRegisterInfo::freezeReservedRegs(const MachineFunction &MF) {
+ ReservedRegs =3D TRI->getReservedRegs(MF);
+}
+
+bool MachineRegisterInfo::isConstantPhysReg(unsigned PhysReg,
+ const MachineFunction &MF) con=
st {
+ assert(TargetRegisterInfo::isPhysicalRegister(PhysReg));
+
+ // Check if any overlapping register is modified.
+ for (const uint16_t *R =3D TRI->getOverlaps(PhysReg); *R; ++R)
+ if (!def_empty(*R))
+ return false;
+
+ // Check if any overlapping register is allocatable so it may be used la=
ter.
+ if (AllocatableRegs.empty())
+ AllocatableRegs =3D TRI->getAllocatableSet(MF);
+ for (const uint16_t *R =3D TRI->getOverlaps(PhysReg); *R; ++R)
+ if (AllocatableRegs.test(*R))
+ return false;
+ return true;
+}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/MachineS=
SAUpdater.cpp
--- a/head/contrib/llvm/lib/CodeGen/MachineSSAUpdater.cpp Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/MachineSSAUpdater.cpp Tue Apr 17 11:51:=
51 2012 +0300
@@ -81,7 +81,7 @@
if (BB->empty())
return 0;
=20
- MachineBasicBlock::iterator I =3D BB->front();
+ MachineBasicBlock::iterator I =3D BB->begin();
if (!I->isPHI())
return 0;
=20
@@ -182,7 +182,7 @@
return DupPHI;
=20
// Otherwise, we do need a PHI: insert one now.
- MachineBasicBlock::iterator Loc =3D BB->empty() ? BB->end() : BB->front(=
);
+ MachineBasicBlock::iterator Loc =3D BB->empty() ? BB->end() : BB->begin(=
);
MachineInstr *InsertedPHI =3D InsertNewDef(TargetOpcode::PHI, BB,
Loc, VRC, MRI, TII);
=20
@@ -214,7 +214,6 @@
}
=20
llvm_unreachable("MachineOperand::getParent() failure?");
- return 0;
}
=20
/// RewriteUse - Rewrite a use of the symbolic value. This handles PHI no=
des,
@@ -311,7 +310,7 @@
/// Add it into the specified block and return the register.
static unsigned CreateEmptyPHI(MachineBasicBlock *BB, unsigned NumPreds,
MachineSSAUpdater *Updater) {
- MachineBasicBlock::iterator Loc =3D BB->empty() ? BB->end() : BB->fron=
t();
+ MachineBasicBlock::iterator Loc =3D BB->empty() ? BB->end() : BB->begi=
n();
MachineInstr *PHI =3D InsertNewDef(TargetOpcode::PHI, BB, Loc,
Updater->VRC, Updater->MRI,
Updater->TII);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/MachineS=
ink.cpp
--- a/head/contrib/llvm/lib/CodeGen/MachineSink.cpp Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/lib/CodeGen/MachineSink.cpp Tue Apr 17 11:51:51 201=
2 +0300
@@ -32,7 +32,7 @@
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
=20
-static cl::opt<bool>=20
+static cl::opt<bool>
SplitEdges("machine-sink-split",
cl::desc("Split critical edges during machine sinking"),
cl::init(true), cl::Hidden);
@@ -90,12 +90,19 @@
bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB,
MachineBasicBlock *DefMBB,
bool &BreakPHIEdge, bool &LocalUse) const;
+ MachineBasicBlock *FindSuccToSinkTo(MachineInstr *MI, MachineBasicBloc=
k *MBB,
+ bool &BreakPHIEdge);
+ bool isProfitableToSinkTo(unsigned Reg, MachineInstr *MI,
+ MachineBasicBlock *MBB,
+ MachineBasicBlock *SuccToSinkTo);
+
bool PerformTrivialForwardCoalescing(MachineInstr *MI,
MachineBasicBlock *MBB);
};
} // end anonymous namespace
=20
char MachineSinking::ID =3D 0;
+char &llvm::MachineSinkingID =3D MachineSinking::ID;
INITIALIZE_PASS_BEGIN(MachineSinking, "machine-sink",
"Machine code sinking", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
@@ -104,8 +111,6 @@
INITIALIZE_PASS_END(MachineSinking, "machine-sink",
"Machine code sinking", false, false)
=20
-FunctionPass *llvm::createMachineSinkingPass() { return new MachineSinking=
(); }
-
bool MachineSinking::PerformTrivialForwardCoalescing(MachineInstr *MI,
MachineBasicBlock *MB=
B) {
if (!MI->isCopy())
@@ -147,14 +152,10 @@
assert(TargetRegisterInfo::isVirtualRegister(Reg) &&
"Only makes sense for vregs");
=20
+ // Ignore debug uses because debug info doesn't affect the code.
if (MRI->use_nodbg_empty(Reg))
return true;
=20
- // Ignoring debug uses is necessary so debug info doesn't affect the cod=
e.
- // This may leave a referencing dbg_value in the original block, before
- // the definition of the vreg. Dwarf generator handles this although the
- // user might not get the right info at runtime.
-
// BreakPHIEdge is true if all the uses are in the successor MBB being s=
unken
// into and they are all PHI nodes. In this case, machine-sink must break
// the critical edge first. e.g.
@@ -291,7 +292,7 @@
if (!CEBCandidates.insert(std::make_pair(From, To)))
return true;
=20
- if (!MI->isCopy() && !MI->getDesc().isAsCheapAsAMove())
+ if (!MI->isCopy() && !MI->isAsCheapAsAMove())
return true;
=20
// MI is cheap, we probably don't want to break the critical edge for it.
@@ -382,9 +383,9 @@
return MI->isInsertSubreg() || MI->isSubregToReg() || MI->isRegSequence(=
);
}
=20
-/// collectDebgValues - Scan instructions following MI and collect any=20
+/// collectDebgValues - Scan instructions following MI and collect any
/// matching DBG_VALUEs.
-static void collectDebugValues(MachineInstr *MI,=20
+static void collectDebugValues(MachineInstr *MI,
SmallVector<MachineInstr *, 2> & DbgValues)=
{
DbgValues.clear();
if (!MI->getOperand(0).isReg())
@@ -401,6 +402,165 @@
}
}
=20
+/// isPostDominatedBy - Return true if A is post dominated by B.
+static bool isPostDominatedBy(MachineBasicBlock *A, MachineBasicBlock *B) {
+
+ // FIXME - Use real post dominator.
+ if (A->succ_size() !=3D 2)
+ return false;
+ MachineBasicBlock::succ_iterator I =3D A->succ_begin();
+ if (B =3D=3D *I)
+ ++I;
+ MachineBasicBlock *OtherSuccBlock =3D *I;
+ if (OtherSuccBlock->succ_size() !=3D 1 ||
+ *(OtherSuccBlock->succ_begin()) !=3D B)
+ return false;
+
+ return true;
+}
+
+/// isProfitableToSinkTo - Return true if it is profitable to sink MI.
+bool MachineSinking::isProfitableToSinkTo(unsigned Reg, MachineInstr *MI,
+ MachineBasicBlock *MBB,
+ MachineBasicBlock *SuccToSinkTo)=
{
+ assert (MI && "Invalid MachineInstr!");
+ assert (SuccToSinkTo && "Invalid SinkTo Candidate BB");
+
+ if (MBB =3D=3D SuccToSinkTo)
+ return false;
+
+ // It is profitable if SuccToSinkTo does not post dominate current block.
+ if (!isPostDominatedBy(MBB, SuccToSinkTo))
+ return true;
+
+ // Check if only use in post dominated block is PHI instruction.
+ bool NonPHIUse =3D false;
+ for (MachineRegisterInfo::use_nodbg_iterator
+ I =3D MRI->use_nodbg_begin(Reg), E =3D MRI->use_nodbg_end();
+ I !=3D E; ++I) {
+ MachineInstr *UseInst =3D &*I;
+ MachineBasicBlock *UseBlock =3D UseInst->getParent();
+ if (UseBlock =3D=3D SuccToSinkTo && !UseInst->isPHI())
+ NonPHIUse =3D true;
+ }
+ if (!NonPHIUse)
+ return true;
+
+ // If SuccToSinkTo post dominates then also it may be profitable if MI
+ // can further profitably sinked into another block in next round.
+ bool BreakPHIEdge =3D false;
+ // FIXME - If finding successor is compile time expensive then catch res=
ults.
+ if (MachineBasicBlock *MBB2 =3D FindSuccToSinkTo(MI, SuccToSinkTo, Break=
PHIEdge))
+ return isProfitableToSinkTo(Reg, MI, SuccToSinkTo, MBB2);
+
+ // If SuccToSinkTo is final destination and it is a post dominator of cu=
rrent
+ // block then it is not profitable to sink MI into SuccToSinkTo block.
+ return false;
+}
+
+/// FindSuccToSinkTo - Find a successor to sink this instruction to.
+MachineBasicBlock *MachineSinking::FindSuccToSinkTo(MachineInstr *MI,
+ MachineBasicBlock *MBB,
+ bool &BreakPHIEdge) {
+
+ assert (MI && "Invalid MachineInstr!");
+ assert (MBB && "Invalid MachineBasicBlock!");
+
+ // Loop over all the operands of the specified instruction. If there is
+ // anything we can't handle, bail out.
+
+ // SuccToSinkTo - This is the successor to sink this instruction to, onc=
e we
+ // decide.
+ MachineBasicBlock *SuccToSinkTo =3D 0;
+ for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
+ const MachineOperand &MO =3D MI->getOperand(i);
+ if (!MO.isReg()) continue; // Ignore non-register operands.
+
+ unsigned Reg =3D MO.getReg();
+ if (Reg =3D=3D 0) continue;
+
+ if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
+ if (MO.isUse()) {
+ // If the physreg has no defs anywhere, it's just an ambient regis=
ter
+ // and we can freely move its uses. Alternatively, if it's allocat=
able,
+ // it could get allocated to something with a def during allocatio=
n.
+ if (!MRI->isConstantPhysReg(Reg, *MBB->getParent()))
+ return NULL;
+ } else if (!MO.isDead()) {
+ // A def that isn't dead. We can't move it.
+ return NULL;
+ }
+ } else {
+ // Virtual register uses are always safe to sink.
+ if (MO.isUse()) continue;
+
+ // If it's not safe to move defs of the register class, then abort.
+ if (!TII->isSafeToMoveRegClassDefs(MRI->getRegClass(Reg)))
+ return NULL;
+
+ // FIXME: This picks a successor to sink into based on having one
+ // successor that dominates all the uses. However, there are cases =
where
+ // sinking can happen but where the sink point isn't a successor. F=
or
+ // example:
+ //
+ // x =3D computation
+ // if () {} else {}
+ // use x
+ //
+ // the instruction could be sunk over the whole diamond for the
+ // if/then/else (or loop, etc), allowing it to be sunk into other bl=
ocks
+ // after that.
+
+ // Virtual register defs can only be sunk if all their uses are in b=
locks
+ // dominated by one of the successors.
+ if (SuccToSinkTo) {
+ // If a previous operand picked a block to sink to, then this oper=
and
+ // must be sinkable to the same block.
+ bool LocalUse =3D false;
+ if (!AllUsesDominatedByBlock(Reg, SuccToSinkTo, MBB,
+ BreakPHIEdge, LocalUse))
+ return NULL;
+
+ continue;
+ }
+
+ // Otherwise, we should look at all the successors and decide which =
one
+ // we should sink to.
+ for (MachineBasicBlock::succ_iterator SI =3D MBB->succ_begin(),
+ E =3D MBB->succ_end(); SI !=3D E; ++SI) {
+ MachineBasicBlock *SuccBlock =3D *SI;
+ bool LocalUse =3D false;
+ if (AllUsesDominatedByBlock(Reg, SuccBlock, MBB,
+ BreakPHIEdge, LocalUse)) {
+ SuccToSinkTo =3D SuccBlock;
+ break;
+ }
+ if (LocalUse)
+ // Def is used locally, it's never safe to move this def.
+ return NULL;
+ }
+
+ // If we couldn't find a block to sink to, ignore this instruction.
+ if (SuccToSinkTo =3D=3D 0)
+ return NULL;
+ else if (!isProfitableToSinkTo(Reg, MI, MBB, SuccToSinkTo))
+ return NULL;
+ }
+ }
+
+ // It is not possible to sink an instruction into its own block. This c=
an
+ // happen with loops.
+ if (MBB =3D=3D SuccToSinkTo)
+ return NULL;
+
+ // It's not safe to sink instructions to EH landing pad. Control flow in=
to
+ // landing pad is implicitly defined.
+ if (SuccToSinkTo && SuccToSinkTo->isLandingPad())
+ return NULL;
+
+ return SuccToSinkTo;
+}
+
/// SinkInstruction - Determine whether it is safe to sink the specified m=
achine
/// instruction out of its current block into a successor.
bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) {
@@ -421,114 +581,14 @@
// "x =3D y + z" down if it kills y and z would increase the live ranges=
of y
// and z and only shrink the live range of x.
=20
- // Loop over all the operands of the specified instruction. If there is
- // anything we can't handle, bail out.
+ bool BreakPHIEdge =3D false;
MachineBasicBlock *ParentBlock =3D MI->getParent();
-
- // SuccToSinkTo - This is the successor to sink this instruction to, onc=
e we
- // decide.
- MachineBasicBlock *SuccToSinkTo =3D 0;
-
- bool BreakPHIEdge =3D false;
- for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
- const MachineOperand &MO =3D MI->getOperand(i);
- if (!MO.isReg()) continue; // Ignore non-register operands.
-
- unsigned Reg =3D MO.getReg();
- if (Reg =3D=3D 0) continue;
-
- if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
- if (MO.isUse()) {
- // If the physreg has no defs anywhere, it's just an ambient regis=
ter
- // and we can freely move its uses. Alternatively, if it's allocat=
able,
- // it could get allocated to something with a def during allocatio=
n.
- if (!MRI->def_empty(Reg))
- return false;
-
- if (AllocatableSet.test(Reg))
- return false;
-
- // Check for a def among the register's aliases too.
- for (const unsigned *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Al=
ias) {
- unsigned AliasReg =3D *Alias;
- if (!MRI->def_empty(AliasReg))
- return false;
-
- if (AllocatableSet.test(AliasReg))
- return false;
- }
- } else if (!MO.isDead()) {
- // A def that isn't dead. We can't move it.
- return false;
- }
- } else {
- // Virtual register uses are always safe to sink.
- if (MO.isUse()) continue;
-
- // If it's not safe to move defs of the register class, then abort.
- if (!TII->isSafeToMoveRegClassDefs(MRI->getRegClass(Reg)))
- return false;
-
- // FIXME: This picks a successor to sink into based on having one
- // successor that dominates all the uses. However, there are cases =
where
- // sinking can happen but where the sink point isn't a successor. F=
or
- // example:
- //
- // x =3D computation
- // if () {} else {}
- // use x
- //
- // the instruction could be sunk over the whole diamond for the
- // if/then/else (or loop, etc), allowing it to be sunk into other bl=
ocks
- // after that.
-
- // Virtual register defs can only be sunk if all their uses are in b=
locks
- // dominated by one of the successors.
- if (SuccToSinkTo) {
- // If a previous operand picked a block to sink to, then this oper=
and
- // must be sinkable to the same block.
- bool LocalUse =3D false;
- if (!AllUsesDominatedByBlock(Reg, SuccToSinkTo, ParentBlock,
- BreakPHIEdge, LocalUse))
- return false;
-
- continue;
- }
-
- // Otherwise, we should look at all the successors and decide which =
one
- // we should sink to.
- for (MachineBasicBlock::succ_iterator SI =3D ParentBlock->succ_begin=
(),
- E =3D ParentBlock->succ_end(); SI !=3D E; ++SI) {
- bool LocalUse =3D false;
- if (AllUsesDominatedByBlock(Reg, *SI, ParentBlock,
- BreakPHIEdge, LocalUse)) {
- SuccToSinkTo =3D *SI;
- break;
- }
- if (LocalUse)
- // Def is used locally, it's never safe to move this def.
- return false;
- }
-
- // If we couldn't find a block to sink to, ignore this instruction.
- if (SuccToSinkTo =3D=3D 0)
- return false;
- }
- }
+ MachineBasicBlock *SuccToSinkTo =3D FindSuccToSinkTo(MI, ParentBlock, Br=
eakPHIEdge);
=20
// If there are no outputs, it must have side-effects.
if (SuccToSinkTo =3D=3D 0)
return false;
=20
- // It's not safe to sink instructions to EH landing pad. Control flow in=
to
- // landing pad is implicitly defined.
- if (SuccToSinkTo->isLandingPad())
- return false;
-
- // It is not possible to sink an instruction into its own block. This c=
an
- // happen with loops.
- if (MI->getParent() =3D=3D SuccToSinkTo)
- return false;
=20
// If the instruction to move defines a dead physical register which is =
live
// when leaving the basic block, don't move it because it could turn int=
o a
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/MachineV=
erifier.cpp
--- a/head/contrib/llvm/lib/CodeGen/MachineVerifier.cpp Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/MachineVerifier.cpp Tue Apr 17 11:51:51=
2012 +0300
@@ -28,6 +28,7 @@
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/LiveStackAnalysis.h"
+#include "llvm/CodeGen/MachineInstrBundle.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineMemOperand.h"
@@ -69,14 +70,17 @@
unsigned foundErrors;
=20
typedef SmallVector<unsigned, 16> RegVector;
+ typedef SmallVector<const uint32_t*, 4> RegMaskVector;
typedef DenseSet<unsigned> RegSet;
typedef DenseMap<unsigned, const MachineInstr*> RegMap;
=20
const MachineInstr *FirstTerminator;
=20
BitVector regsReserved;
+ BitVector regsAllocatable;
RegSet regsLive;
RegVector regsDefined, regsDead, regsKilled;
+ RegMaskVector regMasks;
RegSet regsLiveInButUnused;
=20
SlotIndex lastIndex;
@@ -85,7 +89,7 @@
void addRegWithSubRegs(RegVector &RV, unsigned Reg) {
RV.push_back(Reg);
if (TargetRegisterInfo::isPhysicalRegister(Reg))
- for (const unsigned *R =3D TRI->getSubRegisters(Reg); *R; R++)
+ for (const uint16_t *R =3D TRI->getSubRegisters(Reg); *R; R++)
RV.push_back(*R);
}
=20
@@ -175,6 +179,10 @@
return Reg < regsReserved.size() && regsReserved.test(Reg);
}
=20
+ bool isAllocatable(unsigned Reg) {
+ return Reg < regsAllocatable.size() && regsAllocatable.test(Reg);
+ }
+
// Analysis information if available
LiveVariables *LiveVars;
LiveIntervals *LiveInts;
@@ -194,6 +202,7 @@
void report(const char *msg, const MachineInstr *MI);
void report(const char *msg, const MachineOperand *MO, unsigned MONum);
=20
+ void checkLiveness(const MachineOperand *MO, unsigned MONum);
void markReachable(const MachineBasicBlock *MBB);
void calcRegsPassed();
void checkPHIOps(const MachineBasicBlock *MBB);
@@ -279,13 +288,17 @@
for (MachineFunction::const_iterator MFI =3D MF.begin(), MFE =3D MF.end(=
);
MFI!=3DMFE; ++MFI) {
visitMachineBasicBlockBefore(MFI);
- for (MachineBasicBlock::const_iterator MBBI =3D MFI->begin(),
- MBBE =3D MFI->end(); MBBI !=3D MBBE; ++MBBI) {
+ for (MachineBasicBlock::const_instr_iterator MBBI =3D MFI->instr_begin=
(),
+ MBBE =3D MFI->instr_end(); MBBI !=3D MBBE; ++MBBI) {
if (MBBI->getParent() !=3D MFI) {
report("Bad instruction parent pointer", MFI);
*OS << "Instruction: " << *MBBI;
continue;
}
+ // Skip BUNDLE instruction for now. FIXME: We should add code to ver=
ify
+ // the BUNDLE's specifically.
+ if (MBBI->isBundle())
+ continue;
visitMachineInstrBefore(MBBI);
for (unsigned I =3D 0, E =3D MBBI->getNumOperands(); I !=3D E; ++I)
visitMachineOperand(&MBBI->getOperand(I), I);
@@ -305,6 +318,7 @@
regsDefined.clear();
regsDead.clear();
regsKilled.clear();
+ regMasks.clear();
regsLiveInButUnused.clear();
MBBInfoMap.clear();
=20
@@ -320,7 +334,7 @@
MF->print(*OS, Indexes);
}
*OS << "*** Bad machine code: " << msg << " ***\n"
- << "- function: " << MF->getFunction()->getNameStr() << "\n";
+ << "- function: " << MF->getFunction()->getName() << "\n";
}
=20
void MachineVerifier::report(const char *msg, const MachineBasicBlock *MBB=
) {
@@ -370,12 +384,15 @@
// A sub-register of a reserved register is also reserved
for (int Reg =3D regsReserved.find_first(); Reg>=3D0;
Reg =3D regsReserved.find_next(Reg)) {
- for (const unsigned *Sub =3D TRI->getSubRegisters(Reg); *Sub; ++Sub) {
+ for (const uint16_t *Sub =3D TRI->getSubRegisters(Reg); *Sub; ++Sub) {
// FIXME: This should probably be:
// assert(regsReserved.test(*Sub) && "Non-reserved sub-register");
regsReserved.set(*Sub);
}
}
+
+ regsAllocatable =3D TRI->getAllocatableSet(*MF);
+
markReachable(&MF->front());
}
=20
@@ -393,6 +410,20 @@
MachineVerifier::visitMachineBasicBlockBefore(const MachineBasicBlock *MBB=
) {
FirstTerminator =3D 0;
=20
+ if (MRI->isSSA()) {
+ // If this block has allocatable physical registers live-in, check that
+ // it is an entry block or landing pad.
+ for (MachineBasicBlock::livein_iterator LI =3D MBB->livein_begin(),
+ LE =3D MBB->livein_end();
+ LI !=3D LE; ++LI) {
+ unsigned reg =3D *LI;
+ if (isAllocatable(reg) && !MBB->isLandingPad() &&
+ MBB !=3D MBB->getParent()->begin()) {
+ report("MBB has allocable live-in, but isn't entry or landing-pad.=
", MBB);
+ }
+ }
+ }
+
// Count the number of landing pad successors.
SmallPtrSet<MachineBasicBlock*, 4> LandingPadSuccs;
for (MachineBasicBlock::const_succ_iterator I =3D MBB->succ_begin(),
@@ -435,7 +466,7 @@
report("MBB exits via unconditional fall-through but its successor=
"
"differs from its CFG successor!", MBB);
}
- if (!MBB->empty() && MBB->back().getDesc().isBarrier() &&
+ if (!MBB->empty() && MBB->back().isBarrier() &&
!TII->isPredicated(&MBB->back())) {
report("MBB exits via unconditional fall-through but ends with a "
"barrier instruction!", MBB);
@@ -456,10 +487,10 @@
if (MBB->empty()) {
report("MBB exits via unconditional branch but doesn't contain "
"any instructions!", MBB);
- } else if (!MBB->back().getDesc().isBarrier()) {
+ } else if (!MBB->back().isBarrier()) {
report("MBB exits via unconditional branch but doesn't end with a "
"barrier instruction!", MBB);
- } else if (!MBB->back().getDesc().isTerminator()) {
+ } else if (!MBB->back().isTerminator()) {
report("MBB exits via unconditional branch but the branch isn't a "
"terminator instruction!", MBB);
}
@@ -479,10 +510,10 @@
if (MBB->empty()) {
report("MBB exits via conditional branch/fall-through but doesn't "
"contain any instructions!", MBB);
- } else if (MBB->back().getDesc().isBarrier()) {
+ } else if (MBB->back().isBarrier()) {
report("MBB exits via conditional branch/fall-through but ends wit=
h a "
"barrier instruction!", MBB);
- } else if (!MBB->back().getDesc().isTerminator()) {
+ } else if (!MBB->back().isTerminator()) {
report("MBB exits via conditional branch/fall-through but the bran=
ch "
"isn't a terminator instruction!", MBB);
}
@@ -499,10 +530,10 @@
if (MBB->empty()) {
report("MBB exits via conditional branch/branch but doesn't "
"contain any instructions!", MBB);
- } else if (!MBB->back().getDesc().isBarrier()) {
+ } else if (!MBB->back().isBarrier()) {
report("MBB exits via conditional branch/branch but doesn't end wi=
th a "
"barrier instruction!", MBB);
- } else if (!MBB->back().getDesc().isTerminator()) {
+ } else if (!MBB->back().isTerminator()) {
report("MBB exits via conditional branch/branch but the branch "
"isn't a terminator instruction!", MBB);
}
@@ -523,7 +554,7 @@
continue;
}
regsLive.insert(*I);
- for (const unsigned *R =3D TRI->getSubRegisters(*I); *R; R++)
+ for (const uint16_t *R =3D TRI->getSubRegisters(*I); *R; R++)
regsLive.insert(*R);
}
regsLiveInButUnused =3D regsLive;
@@ -533,7 +564,7 @@
BitVector PR =3D MFI->getPristineRegs(MBB);
for (int I =3D PR.find_first(); I>0; I =3D PR.find_next(I)) {
regsLive.insert(I);
- for (const unsigned *R =3D TRI->getSubRegisters(I); *R; R++)
+ for (const uint16_t *R =3D TRI->getSubRegisters(I); *R; R++)
regsLive.insert(*R);
}
=20
@@ -555,19 +586,22 @@
// Check the MachineMemOperands for basic consistency.
for (MachineInstr::mmo_iterator I =3D MI->memoperands_begin(),
E =3D MI->memoperands_end(); I !=3D E; ++I) {
- if ((*I)->isLoad() && !MCID.mayLoad())
+ if ((*I)->isLoad() && !MI->mayLoad())
report("Missing mayLoad flag", MI);
- if ((*I)->isStore() && !MCID.mayStore())
+ if ((*I)->isStore() && !MI->mayStore())
report("Missing mayStore flag", MI);
}
=20
// Debug values must not have a slot index.
- // Other instructions must have one.
+ // Other instructions must have one, unless they are inside a bundle.
if (LiveInts) {
bool mapped =3D !LiveInts->isNotInMIMap(MI);
if (MI->isDebugValue()) {
if (mapped)
report("Debug instruction has a slot index", MI);
+ } else if (MI->isInsideBundle()) {
+ if (mapped)
+ report("Instruction inside bundle has a slot index", MI);
} else {
if (!mapped)
report("Missing slot index", MI);
@@ -575,7 +609,9 @@
}
=20
// Ensure non-terminators don't follow terminators.
- if (MCID.isTerminator()) {
+ // Ignore predicated terminators formed by if conversion.
+ // FIXME: If conversion shouldn't need to violate this rule.
+ if (MI->isTerminator() && !TII->isPredicated(MI)) {
if (!FirstTerminator)
FirstTerminator =3D MI;
} else if (FirstTerminator) {
@@ -606,7 +642,7 @@
// Don't check if it's the last operand in a variadic instruction. See,
// e.g., LDM_RET in the arm back end.
if (MO->isReg() &&
- !(MCID.isVariadic() && MONum =3D=3D MCID.getNumOperands()-1)) {
+ !(MI->isVariadic() && MONum =3D=3D MCID.getNumOperands()-1)) {
if (MO->isDef() && !MCOI.isOptionalDef())
report("Explicit operand marked as def", MO, MONum);
if (MO->isImplicit())
@@ -614,7 +650,7 @@
}
} else {
// ARM adds %reg0 operands to indicate predicates. We'll allow that.
- if (MO->isReg() && !MO->isImplicit() && !MCID.isVariadic() && MO->getR=
eg())
+ if (MO->isReg() && !MO->isImplicit() && !MI->isVariadic() && MO->getRe=
g())
report("Extra explicit operand on non-variadic instruction", MO, MON=
um);
}
=20
@@ -623,112 +659,9 @@
const unsigned Reg =3D MO->getReg();
if (!Reg)
return;
+ if (MRI->tracksLiveness() && !MI->isDebugValue())
+ checkLiveness(MO, MONum);
=20
- // Check Live Variables.
- if (MI->isDebugValue()) {
- // Liveness checks are not valid for debug values.
- } else if (MO->isUse() && !MO->isUndef()) {
- regsLiveInButUnused.erase(Reg);
-
- bool isKill =3D false;
- unsigned defIdx;
- if (MI->isRegTiedToDefOperand(MONum, &defIdx)) {
- // A two-addr use counts as a kill if use and def are the same.
- unsigned DefReg =3D MI->getOperand(defIdx).getReg();
- if (Reg =3D=3D DefReg)
- isKill =3D true;
- else if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
- report("Two-address instruction operands must be identical",
- MO, MONum);
- }
- } else
- isKill =3D MO->isKill();
-
- if (isKill)
- addRegWithSubRegs(regsKilled, Reg);
-
- // Check that LiveVars knows this kill.
- if (LiveVars && TargetRegisterInfo::isVirtualRegister(Reg) &&
- MO->isKill()) {
- LiveVariables::VarInfo &VI =3D LiveVars->getVarInfo(Reg);
- if (std::find(VI.Kills.begin(),
- VI.Kills.end(), MI) =3D=3D VI.Kills.end())
- report("Kill missing from LiveVariables", MO, MONum);
- }
-
- // Check LiveInts liveness and kill.
- if (TargetRegisterInfo::isVirtualRegister(Reg) &&
- LiveInts && !LiveInts->isNotInMIMap(MI)) {
- SlotIndex UseIdx =3D LiveInts->getInstructionIndex(MI).getUseIndex=
();
- if (LiveInts->hasInterval(Reg)) {
- const LiveInterval &LI =3D LiveInts->getInterval(Reg);
- if (!LI.liveAt(UseIdx)) {
- report("No live range at use", MO, MONum);
- *OS << UseIdx << " is not live in " << LI << '\n';
- }
- // Check for extra kill flags.
- // Note that we allow missing kill flags for now.
- if (MO->isKill() && !LI.killedAt(UseIdx.getDefIndex())) {
- report("Live range continues after kill flag", MO, MONum);
- *OS << "Live range: " << LI << '\n';
- }
- } else {
- report("Virtual register has no Live interval", MO, MONum);
- }
- }
-
- // Use of a dead register.
- if (!regsLive.count(Reg)) {
- if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
- // Reserved registers may be used even when 'dead'.
- if (!isReserved(Reg))
- report("Using an undefined physical register", MO, MONum);
- } else {
- BBInfo &MInfo =3D MBBInfoMap[MI->getParent()];
- // We don't know which virtual registers are live in, so only co=
mplain
- // if vreg was killed in this MBB. Otherwise keep track of vregs=
that
- // must be live in. PHI instructions are handled separately.
- if (MInfo.regsKilled.count(Reg))
- report("Using a killed virtual register", MO, MONum);
- else if (!MI->isPHI())
- MInfo.vregsLiveIn.insert(std::make_pair(Reg, MI));
- }
- }
- } else if (MO->isDef()) {
- // Register defined.
- // TODO: verify that earlyclobber ops are not used.
- if (MO->isDead())
- addRegWithSubRegs(regsDead, Reg);
- else
- addRegWithSubRegs(regsDefined, Reg);
-
- // Verify SSA form.
- if (MRI->isSSA() && TargetRegisterInfo::isVirtualRegister(Reg) &&
- llvm::next(MRI->def_begin(Reg)) !=3D MRI->def_end())
- report("Multiple virtual register defs in SSA form", MO, MONum);
-
- // Check LiveInts for a live range, but only for virtual registers.
- if (LiveInts && TargetRegisterInfo::isVirtualRegister(Reg) &&
- !LiveInts->isNotInMIMap(MI)) {
- SlotIndex DefIdx =3D LiveInts->getInstructionIndex(MI).getDefIndex=
();
- if (LiveInts->hasInterval(Reg)) {
- const LiveInterval &LI =3D LiveInts->getInterval(Reg);
- if (const VNInfo *VNI =3D LI.getVNInfoAt(DefIdx)) {
- assert(VNI && "NULL valno is not allowed");
- if (VNI->def !=3D DefIdx && !MO->isEarlyClobber()) {
- report("Inconsistent valno->def", MO, MONum);
- *OS << "Valno " << VNI->id << " is not defined at "
- << DefIdx << " in " << LI << '\n';
- }
- } else {
- report("No live range at def", MO, MONum);
- *OS << DefIdx << " is not live in " << LI << '\n';
- }
- } else {
- report("Virtual register has no Live interval", MO, MONum);
- }
- }
- }
=20
// Check register classes.
if (MONum < MCID.getNumOperands() && !MO->isImplicit()) {
@@ -790,6 +723,10 @@
break;
}
=20
+ case MachineOperand::MO_RegisterMask:
+ regMasks.push_back(MO->getRegMask());
+ break;
+
case MachineOperand::MO_MachineBasicBlock:
if (MI->isPHI() && !MO->getMBB()->isSuccessor(MI->getParent()))
report("PHI operand is not in the CFG", MO, MONum);
@@ -800,11 +737,11 @@
LiveInts && !LiveInts->isNotInMIMap(MI)) {
LiveInterval &LI =3D LiveStks->getInterval(MO->getIndex());
SlotIndex Idx =3D LiveInts->getInstructionIndex(MI);
- if (MCID.mayLoad() && !LI.liveAt(Idx.getUseIndex())) {
+ if (MI->mayLoad() && !LI.liveAt(Idx.getRegSlot(true))) {
report("Instruction loads from dead spill slot", MO, MONum);
*OS << "Live stack: " << LI << '\n';
}
- if (MCID.mayStore() && !LI.liveAt(Idx.getDefIndex())) {
+ if (MI->mayStore() && !LI.liveAt(Idx.getRegSlot())) {
report("Instruction stores to dead spill slot", MO, MONum);
*OS << "Live stack: " << LI << '\n';
}
@@ -816,10 +753,127 @@
}
}
=20
+void MachineVerifier::checkLiveness(const MachineOperand *MO, unsigned MON=
um) {
+ const MachineInstr *MI =3D MO->getParent();
+ const unsigned Reg =3D MO->getReg();
+
+ // Both use and def operands can read a register.
+ if (MO->readsReg()) {
+ regsLiveInButUnused.erase(Reg);
+
+ bool isKill =3D false;
+ unsigned defIdx;
+ if (MI->isRegTiedToDefOperand(MONum, &defIdx)) {
+ // A two-addr use counts as a kill if use and def are the same.
+ unsigned DefReg =3D MI->getOperand(defIdx).getReg();
+ if (Reg =3D=3D DefReg)
+ isKill =3D true;
+ else if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
+ report("Two-address instruction operands must be identical", MO, M=
ONum);
+ }
+ } else
+ isKill =3D MO->isKill();
+
+ if (isKill)
+ addRegWithSubRegs(regsKilled, Reg);
+
+ // Check that LiveVars knows this kill.
+ if (LiveVars && TargetRegisterInfo::isVirtualRegister(Reg) &&
+ MO->isKill()) {
+ LiveVariables::VarInfo &VI =3D LiveVars->getVarInfo(Reg);
+ if (std::find(VI.Kills.begin(), VI.Kills.end(), MI) =3D=3D VI.Kills.=
end())
+ report("Kill missing from LiveVariables", MO, MONum);
+ }
+
+ // Check LiveInts liveness and kill.
+ if (TargetRegisterInfo::isVirtualRegister(Reg) &&
+ LiveInts && !LiveInts->isNotInMIMap(MI)) {
+ SlotIndex UseIdx =3D LiveInts->getInstructionIndex(MI).getRegSlot(tr=
ue);
+ if (LiveInts->hasInterval(Reg)) {
+ const LiveInterval &LI =3D LiveInts->getInterval(Reg);
+ if (!LI.liveAt(UseIdx)) {
+ report("No live range at use", MO, MONum);
+ *OS << UseIdx << " is not live in " << LI << '\n';
+ }
+ // Check for extra kill flags.
+ // Note that we allow missing kill flags for now.
+ if (MO->isKill() && !LI.killedAt(UseIdx.getRegSlot())) {
+ report("Live range continues after kill flag", MO, MONum);
+ *OS << "Live range: " << LI << '\n';
+ }
+ } else {
+ report("Virtual register has no Live interval", MO, MONum);
+ }
+ }
+
+ // Use of a dead register.
+ if (!regsLive.count(Reg)) {
+ if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
+ // Reserved registers may be used even when 'dead'.
+ if (!isReserved(Reg))
+ report("Using an undefined physical register", MO, MONum);
+ } else {
+ BBInfo &MInfo =3D MBBInfoMap[MI->getParent()];
+ // We don't know which virtual registers are live in, so only comp=
lain
+ // if vreg was killed in this MBB. Otherwise keep track of vregs t=
hat
+ // must be live in. PHI instructions are handled separately.
+ if (MInfo.regsKilled.count(Reg))
+ report("Using a killed virtual register", MO, MONum);
+ else if (!MI->isPHI())
+ MInfo.vregsLiveIn.insert(std::make_pair(Reg, MI));
+ }
+ }
+ }
+
+ if (MO->isDef()) {
+ // Register defined.
+ // TODO: verify that earlyclobber ops are not used.
+ if (MO->isDead())
+ addRegWithSubRegs(regsDead, Reg);
+ else
+ addRegWithSubRegs(regsDefined, Reg);
+
+ // Verify SSA form.
+ if (MRI->isSSA() && TargetRegisterInfo::isVirtualRegister(Reg) &&
+ llvm::next(MRI->def_begin(Reg)) !=3D MRI->def_end())
+ report("Multiple virtual register defs in SSA form", MO, MONum);
+
+ // Check LiveInts for a live range, but only for virtual registers.
+ if (LiveInts && TargetRegisterInfo::isVirtualRegister(Reg) &&
+ !LiveInts->isNotInMIMap(MI)) {
+ SlotIndex DefIdx =3D LiveInts->getInstructionIndex(MI).getRegSlot();
+ if (LiveInts->hasInterval(Reg)) {
+ const LiveInterval &LI =3D LiveInts->getInterval(Reg);
+ if (const VNInfo *VNI =3D LI.getVNInfoAt(DefIdx)) {
+ assert(VNI && "NULL valno is not allowed");
+ if (VNI->def !=3D DefIdx && !MO->isEarlyClobber()) {
+ report("Inconsistent valno->def", MO, MONum);
+ *OS << "Valno " << VNI->id << " is not defined at "
+ << DefIdx << " in " << LI << '\n';
+ }
+ } else {
+ report("No live range at def", MO, MONum);
+ *OS << DefIdx << " is not live in " << LI << '\n';
+ }
+ } else {
+ report("Virtual register has no Live interval", MO, MONum);
+ }
+ }
+ }
+}
+
void MachineVerifier::visitMachineInstrAfter(const MachineInstr *MI) {
BBInfo &MInfo =3D MBBInfoMap[MI->getParent()];
set_union(MInfo.regsKilled, regsKilled);
set_subtract(regsLive, regsKilled); regsKilled.clear();
+ // Kill any masked registers.
+ while (!regMasks.empty()) {
+ const uint32_t *Mask =3D regMasks.pop_back_val();
+ for (RegSet::iterator I =3D regsLive.begin(), E =3D regsLive.end(); I =
!=3D E; ++I)
+ if (TargetRegisterInfo::isPhysicalRegister(*I) &&
+ MachineOperand::clobbersPhysReg(Mask, *I))
+ regsDead.push_back(*I);
+ }
set_subtract(regsLive, regsDead); regsDead.clear();
set_union(regsLive, regsDefined); regsDefined.clear();
=20
@@ -855,7 +909,7 @@
void MachineVerifier::calcRegsPassed() {
// First push live-out regs to successors' vregsPassed. Remember the MBB=
s that
// have any vregsPassed.
- DenseSet<const MachineBasicBlock*> todo;
+ SmallPtrSet<const MachineBasicBlock*, 8> todo;
for (MachineFunction::const_iterator MFI =3D MF->begin(), MFE =3D MF->en=
d();
MFI !=3D MFE; ++MFI) {
const MachineBasicBlock &MBB(*MFI);
@@ -892,7 +946,7 @@
// similar to calcRegsPassed, only backwards.
void MachineVerifier::calcRegsRequired() {
// First push live-in regs to predecessors' vregsRequired.
- DenseSet<const MachineBasicBlock*> todo;
+ SmallPtrSet<const MachineBasicBlock*, 8> todo;
for (MachineFunction::const_iterator MFI =3D MF->begin(), MFE =3D MF->en=
d();
MFI !=3D MFE; ++MFI) {
const MachineBasicBlock &MBB(*MFI);
@@ -925,9 +979,10 @@
// Check PHI instructions at the beginning of MBB. It is assumed that
// calcRegsPassed has been run so BBInfo::isLiveOut is valid.
void MachineVerifier::checkPHIOps(const MachineBasicBlock *MBB) {
+ SmallPtrSet<const MachineBasicBlock*, 8> seen;
for (MachineBasicBlock::const_iterator BBI =3D MBB->begin(), BBE =3D MBB=
->end();
BBI !=3D BBE && BBI->isPHI(); ++BBI) {
- DenseSet<const MachineBasicBlock*> seen;
+ seen.clear();
=20
for (unsigned i =3D 1, e =3D BBI->getNumOperands(); i !=3D e; i +=3D 2=
) {
unsigned Reg =3D BBI->getOperand(i).getReg();
@@ -968,8 +1023,17 @@
}
=20
// Now check liveness info if available
- if (LiveVars || LiveInts)
- calcRegsRequired();
+ calcRegsRequired();
+
+ if (MRI->isSSA() && !MF->empty()) {
+ BBInfo &MInfo =3D MBBInfoMap[&MF->front()];
+ for (RegSet::iterator
+ I =3D MInfo.vregsRequired.begin(), E =3D MInfo.vregsRequired.end(=
); I !=3D E;
+ ++I)
+ report("Virtual register def doesn't dominate all uses.",
+ MRI->getVRegDef(*I));
+ }
+
if (LiveVars)
verifyLiveVariables();
if (LiveInts)
@@ -1065,33 +1129,43 @@
report("No instruction at def index", MF);
*OS << "Valno #" << VNI->id << " is defined at " << VNI->def
<< " in " << LI << '\n';
- } else if (!MI->modifiesRegister(LI.reg, TRI)) {
+ continue;
+ }
+
+ bool hasDef =3D false;
+ bool isEarlyClobber =3D false;
+ for (ConstMIBundleOperands MOI(MI); MOI.isValid(); ++MOI) {
+ if (!MOI->isReg() || !MOI->isDef())
+ continue;
+ if (TargetRegisterInfo::isVirtualRegister(LI.reg)) {
+ if (MOI->getReg() !=3D LI.reg)
+ continue;
+ } else {
+ if (!TargetRegisterInfo::isPhysicalRegister(MOI->getReg()) ||
+ !TRI->regsOverlap(LI.reg, MOI->getReg()))
+ continue;
+ }
+ hasDef =3D true;
+ if (MOI->isEarlyClobber())
+ isEarlyClobber =3D true;
+ }
+
+ if (!hasDef) {
report("Defining instruction does not modify register", MI);
*OS << "Valno #" << VNI->id << " in " << LI << '\n';
}
=20
- bool isEarlyClobber =3D false;
- if (MI) {
- for (MachineInstr::const_mop_iterator MOI =3D MI->operands_begin=
(),
- MOE =3D MI->operands_end(); MOI !=3D MOE; ++MOI) {
- if (MOI->isReg() && MOI->getReg() =3D=3D LI.reg && MOI->isDef(=
) &&
- MOI->isEarlyClobber()) {
- isEarlyClobber =3D true;
- break;
- }
- }
- }
-
// Early clobber defs begin at USE slots, but other defs must begi=
n at
// DEF slots.
if (isEarlyClobber) {
- if (!VNI->def.isUse()) {
- report("Early clobber def must be at a USE slot", MF);
+ if (!VNI->def.isEarlyClobber()) {
+ report("Early clobber def must be at an early-clobber slot", M=
F);
*OS << "Valno #" << VNI->id << " is defined at " << VNI->def
<< " in " << LI << '\n';
}
- } else if (!VNI->def.isDef()) {
- report("Non-PHI, non-early clobber def must be at a DEF slot", M=
F);
+ } else if (!VNI->def.isRegister()) {
+ report("Non-PHI, non-early clobber def must be at a register slo=
t",
+ MF);
*OS << "Valno #" << VNI->id << " is defined at " << VNI->def
<< " in " << LI << '\n';
}
@@ -1137,32 +1211,76 @@
*OS << " in " << LI << '\n';
continue;
}
- if (I->end !=3D LiveInts->getMBBEndIdx(EndMBB)) {
- // The live segment is ending inside EndMBB
- const MachineInstr *MI =3D
- LiveInts->getInstructionFromIndex(I->end.getPrevSl=
ot());
- if (!MI) {
- report("Live segment doesn't end at a valid instruction", EndMBB=
);
+
+ // No more checks for live-out segments.
+ if (I->end =3D=3D LiveInts->getMBBEndIdx(EndMBB))
+ continue;
+
+ // The live segment is ending inside EndMBB
+ const MachineInstr *MI =3D
+ LiveInts->getInstructionFromIndex(I->end.getPrevSlot());
+ if (!MI) {
+ report("Live segment doesn't end at a valid instruction", EndMBB);
I->print(*OS);
*OS << " in " << LI << '\n' << "Basic block starts at "
- << MBBStartIdx << '\n';
- } else if (TargetRegisterInfo::isVirtualRegister(LI.reg) &&
- !MI->readsVirtualRegister(LI.reg)) {
- // A live range can end with either a redefinition, a kill flag =
on a
- // use, or a dead flag on a def.
- // FIXME: Should we check for each of these?
- bool hasDeadDef =3D false;
- for (MachineInstr::const_mop_iterator MOI =3D MI->operands_begin=
(),
- MOE =3D MI->operands_end(); MOI !=3D MOE; ++MOI) {
- if (MOI->isReg() && MOI->getReg() =3D=3D LI.reg && MOI->isDef(=
) && MOI->isDead()) {
- hasDeadDef =3D true;
- break;
- }
+ << MBBStartIdx << '\n';
+ continue;
+ }
+
+ // The block slot must refer to a basic block boundary.
+ if (I->end.isBlock()) {
+ report("Live segment ends at B slot of an instruction", MI);
+ I->print(*OS);
+ *OS << " in " << LI << '\n';
+ }
+
+ if (I->end.isDead()) {
+ // Segment ends on the dead slot.
+ // That means there must be a dead def.
+ if (!SlotIndex::isSameInstr(I->start, I->end)) {
+ report("Live segment ending at dead slot spans instructions", MI=
);
+ I->print(*OS);
+ *OS << " in " << LI << '\n';
+ }
+ }
+
+ // A live segment can only end at an early-clobber slot if it is bei=
ng
+ // redefined by an early-clobber def.
+ if (I->end.isEarlyClobber()) {
+ if (I+1 =3D=3D E || (I+1)->start !=3D I->end) {
+ report("Live segment ending at early clobber slot must be "
+ "redefined by an EC def in the same instruction", MI);
+ I->print(*OS);
+ *OS << " in " << LI << '\n';
+ }
+ }
+
+ // The following checks only apply to virtual registers. Physreg liv=
eness
+ // is too weird to check.
+ if (TargetRegisterInfo::isVirtualRegister(LI.reg)) {
+ // A live range can end with either a redefinition, a kill flag on=
a
+ // use, or a dead flag on a def.
+ bool hasRead =3D false;
+ bool hasDeadDef =3D false;
+ for (ConstMIBundleOperands MOI(MI); MOI.isValid(); ++MOI) {
+ if (!MOI->isReg() || MOI->getReg() !=3D LI.reg)
+ continue;
+ if (MOI->readsReg())
+ hasRead =3D true;
+ if (MOI->isDef() && MOI->isDead())
+ hasDeadDef =3D true;
+ }
+
+ if (I->end.isDead()) {
+ if (!hasDeadDef) {
+ report("Instruction doesn't have a dead def operand", MI);
+ I->print(*OS);
+ *OS << " in " << LI << '\n';
}
-
- if (!hasDeadDef) {
- report("Instruction killing live segment neither defines nor r=
eads "
- "register", MI);
+ } else {
+ if (!hasRead) {
+ report("Instruction ending live range doesn't read the registe=
r",
+ MI);
I->print(*OS);
*OS << " in " << LI << '\n';
}
@@ -1192,8 +1310,8 @@
// Check that VNI is live-out of all predecessors.
for (MachineBasicBlock::const_pred_iterator PI =3D MFI->pred_begin=
(),
PE =3D MFI->pred_end(); PI !=3D PE; ++PI) {
- SlotIndex PEnd =3D LiveInts->getMBBEndIdx(*PI).getPrevSlot();
- const VNInfo *PVNI =3D LI.getVNInfoAt(PEnd);
+ SlotIndex PEnd =3D LiveInts->getMBBEndIdx(*PI);
+ const VNInfo *PVNI =3D LI.getVNInfoBefore(PEnd);
=20
if (VNI->isPHIDef() && VNI->def =3D=3D LiveInts->getMBBStartIdx(=
MFI))
continue;
@@ -1201,7 +1319,7 @@
if (!PVNI) {
report("Register not marked live out of predecessor", *PI);
*OS << "Valno #" << VNI->id << " live into BB#" << MFI->getNum=
ber()
- << '@' << LiveInts->getMBBStartIdx(MFI) << ", not live at "
+ << '@' << LiveInts->getMBBStartIdx(MFI) << ", not live bef=
ore "
<< PEnd << " in " << LI << '\n';
continue;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Optimize=
PHIs.cpp
--- a/head/contrib/llvm/lib/CodeGen/OptimizePHIs.cpp Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/lib/CodeGen/OptimizePHIs.cpp Tue Apr 17 11:51:51 20=
12 +0300
@@ -56,11 +56,10 @@
}
=20
char OptimizePHIs::ID =3D 0;
+char &llvm::OptimizePHIsID =3D OptimizePHIs::ID;
INITIALIZE_PASS(OptimizePHIs, "opt-phis",
"Optimize machine instruction PHIs", false, false)
=20
-FunctionPass *llvm::createOptimizePHIsPass() { return new OptimizePHIs(); }
-
bool OptimizePHIs::runOnMachineFunction(MachineFunction &Fn) {
MRI =3D &Fn.getRegInfo();
TII =3D Fn.getTarget().getInstrInfo();
@@ -165,7 +164,11 @@
InstrSet PHIsInCycle;
if (IsSingleValuePHICycle(MI, SingleValReg, PHIsInCycle) &&
SingleValReg !=3D 0) {
- MRI->replaceRegWith(MI->getOperand(0).getReg(), SingleValReg);
+ unsigned OldReg =3D MI->getOperand(0).getReg();
+ if (!MRI->constrainRegClass(SingleValReg, MRI->getRegClass(OldReg)))
+ continue;
+
+ MRI->replaceRegWith(OldReg, SingleValReg);
MI->eraseFromParent();
++NumPHICycles;
Changed =3D true;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/PHIElimi=
nation.cpp
--- a/head/contrib/llvm/lib/CodeGen/PHIElimination.cpp Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/PHIElimination.cpp Tue Apr 17 11:51:51 =
2012 +0300
@@ -92,10 +92,14 @@
STATISTIC(NumReused, "Number of reused lowered phis");
=20
char PHIElimination::ID =3D 0;
-INITIALIZE_PASS(PHIElimination, "phi-node-elimination",
- "Eliminate PHI nodes for register allocation", false, fals=
e)
+char& llvm::PHIEliminationID =3D PHIElimination::ID;
=20
-char& llvm::PHIEliminationID =3D PHIElimination::ID;
+INITIALIZE_PASS_BEGIN(PHIElimination, "phi-node-elimination",
+ "Eliminate PHI nodes for register allocation",
+ false, false)
+INITIALIZE_PASS_DEPENDENCY(LiveVariables)
+INITIALIZE_PASS_END(PHIElimination, "phi-node-elimination",
+ "Eliminate PHI nodes for register allocation", false, =
false)
=20
void PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<LiveVariables>();
@@ -241,7 +245,6 @@
LiveVariables::VarInfo &VI =3D LV->getVarInfo(IncomingReg);
=20
// Increment use count of the newly created virtual register.
- VI.NumUses++;
LV->setPHIJoin(IncomingReg);
=20
// When we are reusing the incoming register, it may already have be=
en
@@ -410,7 +413,7 @@
return false; // Quick exit for basic blocks without PHIs.
=20
bool Changed =3D false;
- for (MachineBasicBlock::const_iterator BBI =3D MBB.begin(), BBE =3D MBB.=
end();
+ for (MachineBasicBlock::iterator BBI =3D MBB.begin(), BBE =3D MBB.end();
BBI !=3D BBE && BBI->isPHI(); ++BBI) {
for (unsigned i =3D 1, e =3D BBI->getNumOperands(); i !=3D e; i +=3D 2=
) {
unsigned Reg =3D BBI->getOperand(i).getReg();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Passes.c=
pp
--- a/head/contrib/llvm/lib/CodeGen/Passes.cpp Tue Apr 17 11:36:47 2012 +03=
00
+++ b/head/contrib/llvm/lib/CodeGen/Passes.cpp Tue Apr 17 11:51:51 2012 +03=
00
@@ -12,62 +12,617 @@
//
//=3D=3D=3D---------------------------------------------------------------=
------=3D=3D=3D//
=20
+#include "llvm/Analysis/Passes.h"
+#include "llvm/Analysis/Verifier.h"
+#include "llvm/Transforms/Scalar.h"
+#include "llvm/PassManager.h"
+#include "llvm/CodeGen/GCStrategy.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
-#include "llvm/CodeGen/Passes.h"
+#include "llvm/Target/TargetLowering.h"
+#include "llvm/Target/TargetOptions.h"
+#include "llvm/Assembly/PrintModulePass.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
=20
using namespace llvm;
=20
+static cl::opt<bool> DisablePostRA("disable-post-ra", cl::Hidden,
+ cl::desc("Disable Post Regalloc"));
+static cl::opt<bool> DisableBranchFold("disable-branch-fold", cl::Hidden,
+ cl::desc("Disable branch folding"));
+static cl::opt<bool> DisableTailDuplicate("disable-tail-duplicate", cl::Hi=
dden,
+ cl::desc("Disable tail duplication"));
+static cl::opt<bool> DisableEarlyTailDup("disable-early-taildup", cl::Hidd=
en,
+ cl::desc("Disable pre-register allocation tail duplication"));
+static cl::opt<bool> EnableBlockPlacement("enable-block-placement",
+ cl::Hidden, cl::desc("Enable probability-driven block placement"));
+static cl::opt<bool> EnableBlockPlacementStats("enable-block-placement-sta=
ts",
+ cl::Hidden, cl::desc("Collect probability-driven block placement stats=
"));
+static cl::opt<bool> DisableCodePlace("disable-code-place", cl::Hidden,
+ cl::desc("Disable code placement"));
+static cl::opt<bool> DisableSSC("disable-ssc", cl::Hidden,
+ cl::desc("Disable Stack Slot Coloring"));
+static cl::opt<bool> DisableMachineDCE("disable-machine-dce", cl::Hidden,
+ cl::desc("Disable Machine Dead Code Elimination"));
+static cl::opt<bool> DisableMachineLICM("disable-machine-licm", cl::Hidden,
+ cl::desc("Disable Machine LICM"));
+static cl::opt<bool> DisableMachineCSE("disable-machine-cse", cl::Hidden,
+ cl::desc("Disable Machine Common Subexpression Elimination"));
+static cl::opt<cl::boolOrDefault>
+OptimizeRegAlloc("optimize-regalloc", cl::Hidden,
+ cl::desc("Enable optimized register allocation compilation path."));
+static cl::opt<cl::boolOrDefault>
+EnableMachineSched("enable-misched", cl::Hidden,
+ cl::desc("Enable the machine instruction scheduling pass."));
+static cl::opt<bool> EnableStrongPHIElim("strong-phi-elim", cl::Hidden,
+ cl::desc("Use strong PHI elimination."));
+static cl::opt<bool> DisablePostRAMachineLICM("disable-postra-machine-licm=
",
+ cl::Hidden,
+ cl::desc("Disable Machine LICM"));
+static cl::opt<bool> DisableMachineSink("disable-machine-sink", cl::Hidden,
+ cl::desc("Disable Machine Sinking"));
+static cl::opt<bool> DisableLSR("disable-lsr", cl::Hidden,
+ cl::desc("Disable Loop Strength Reduction Pass"));
+static cl::opt<bool> DisableCGP("disable-cgp", cl::Hidden,
+ cl::desc("Disable Codegen Prepare"));
+static cl::opt<bool> DisableCopyProp("disable-copyprop", cl::Hidden,
+ cl::desc("Disable Copy Propagation pass"));
+static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
+ cl::desc("Print LLVM IR produced by the loop-reduce pass"));
+static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
+ cl::desc("Print LLVM IR input to isel pass"));
+static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
+ cl::desc("Dump garbage collector data"));
+static cl::opt<bool> VerifyMachineCode("verify-machineinstrs", cl::Hidden,
+ cl::desc("Verify generated machine code"),
+ cl::init(getenv("LLVM_VERIFY_MACHINEINSTRS")!=3DNULL));
+
+/// Allow standard passes to be disabled by command line options. This sup=
ports
+/// simple binary flags that either suppress the pass or do nothing.
+/// i.e. -disable-mypass=3Dfalse has no effect.
+/// These should be converted to boolOrDefault in order to use applyOverri=
de.
+static AnalysisID applyDisable(AnalysisID ID, bool Override) {
+ if (Override)
+ return &NoPassID;
+ return ID;
+}
+
+/// Allow Pass selection to be overriden by command line options. This sup=
ports
+/// flags with ternary conditions. TargetID is passed through by default. =
The
+/// pass is suppressed when the option is false. When the option is true, =
the
+/// StandardID is selected if the target provides no default.
+static AnalysisID applyOverride(AnalysisID TargetID, cl::boolOrDefault Ove=
rride,
+ AnalysisID StandardID) {
+ switch (Override) {
+ case cl::BOU_UNSET:
+ return TargetID;
+ case cl::BOU_TRUE:
+ if (TargetID !=3D &NoPassID)
+ return TargetID;
+ if (StandardID =3D=3D &NoPassID)
+ report_fatal_error("Target cannot enable pass");
+ return StandardID;
+ case cl::BOU_FALSE:
+ return &NoPassID;
+ }
+ llvm_unreachable("Invalid command line option state");
+}
+
+/// Allow standard passes to be disabled by the command line, regardless o=
f who
+/// is adding the pass.
+///
+/// StandardID is the pass identified in the standard pass pipeline and pr=
ovided
+/// to addPass(). It may be a target-specific ID in the case that the targ=
et
+/// directly adds its own pass, but in that case we harmlessly fall throug=
h.
+///
+/// TargetID is the pass that the target has configured to override Standa=
rdID.
+///
+/// StandardID may be a pseudo ID. In that case TargetID is the name of th=
e real
+/// pass to run. This allows multiple options to control a single pass dep=
ending
+/// on where in the pipeline that pass is added.
+static AnalysisID overridePass(AnalysisID StandardID, AnalysisID TargetID)=
{
+ if (StandardID =3D=3D &PostRASchedulerID)
+ return applyDisable(TargetID, DisablePostRA);
+
+ if (StandardID =3D=3D &BranchFolderPassID)
+ return applyDisable(TargetID, DisableBranchFold);
+
+ if (StandardID =3D=3D &TailDuplicateID)
+ return applyDisable(TargetID, DisableTailDuplicate);
+
+ if (StandardID =3D=3D &TargetPassConfig::EarlyTailDuplicateID)
+ return applyDisable(TargetID, DisableEarlyTailDup);
+
+ if (StandardID =3D=3D &MachineBlockPlacementID)
+ return applyDisable(TargetID, DisableCodePlace);
+
+ if (StandardID =3D=3D &CodePlacementOptID)
+ return applyDisable(TargetID, DisableCodePlace);
+
+ if (StandardID =3D=3D &StackSlotColoringID)
+ return applyDisable(TargetID, DisableSSC);
+
+ if (StandardID =3D=3D &DeadMachineInstructionElimID)
+ return applyDisable(TargetID, DisableMachineDCE);
+
+ if (StandardID =3D=3D &MachineLICMID)
+ return applyDisable(TargetID, DisableMachineLICM);
+
+ if (StandardID =3D=3D &MachineCSEID)
+ return applyDisable(TargetID, DisableMachineCSE);
+
+ if (StandardID =3D=3D &MachineSchedulerID)
+ return applyOverride(TargetID, EnableMachineSched, StandardID);
+
+ if (StandardID =3D=3D &TargetPassConfig::PostRAMachineLICMID)
+ return applyDisable(TargetID, DisablePostRAMachineLICM);
+
+ if (StandardID =3D=3D &MachineSinkingID)
+ return applyDisable(TargetID, DisableMachineSink);
+
+ if (StandardID =3D=3D &MachineCopyPropagationID)
+ return applyDisable(TargetID, DisableCopyProp);
+
+ return TargetID;
+}
+
//=3D=3D=3D---------------------------------------------------------------=
------=3D=3D=3D//
+/// TargetPassConfig
+//=3D=3D=3D---------------------------------------------------------------=
------=3D=3D=3D//
+
+INITIALIZE_PASS(TargetPassConfig, "targetpassconfig",
+ "Target Pass Configuration", false, false)
+char TargetPassConfig::ID =3D 0;
+
+static char NoPassIDAnchor =3D 0;
+char &llvm::NoPassID =3D NoPassIDAnchor;
+
+// Pseudo Pass IDs.
+char TargetPassConfig::EarlyTailDuplicateID =3D 0;
+char TargetPassConfig::PostRAMachineLICMID =3D 0;
+
+namespace llvm {
+class PassConfigImpl {
+public:
+ // List of passes explicitly substituted by this target. Normally this is
+ // empty, but it is a convenient way to suppress or replace specific pas=
ses
+ // that are part of a standard pass pipeline without overridding the ent=
ire
+ // pipeline. This mechanism allows target options to inherit a standard =
pass's
+ // user interface. For example, a target may disable a standard pass by
+ // default by substituting NoPass, and the user may still enable that st=
andard
+ // pass with an explicit command line option.
+ DenseMap<AnalysisID,AnalysisID> TargetPasses;
+};
+} // namespace llvm
+
+// Out of line virtual method.
+TargetPassConfig::~TargetPassConfig() {
+ delete Impl;
+}
+
+// Out of line constructor provides default values for pass options and
+// registers all common codegen passes.
+TargetPassConfig::TargetPassConfig(TargetMachine *tm, PassManagerBase &pm)
+ : ImmutablePass(ID), TM(tm), PM(pm), Impl(0), Initialized(false),
+ DisableVerify(false),
+ EnableTailMerge(true) {
+
+ Impl =3D new PassConfigImpl();
+
+ // Register all target independent codegen passes to activate their Pass=
IDs,
+ // including this pass itself.
+ initializeCodeGen(*PassRegistry::getPassRegistry());
+
+ // Substitute Pseudo Pass IDs for real ones.
+ substitutePass(EarlyTailDuplicateID, TailDuplicateID);
+ substitutePass(PostRAMachineLICMID, MachineLICMID);
+
+ // Temporarily disable experimental passes.
+ substitutePass(MachineSchedulerID, NoPassID);
+}
+
+/// createPassConfig - Create a pass configuration object to be used by
+/// addPassToEmitX methods for generating a pipeline of CodeGen passes.
///
-/// RegisterRegAlloc class - Track the registration of register allocators.
+/// Targets may override this to extend TargetPassConfig.
+TargetPassConfig *LLVMTargetMachine::createPassConfig(PassManagerBase &PM)=
{
+ return new TargetPassConfig(this, PM);
+}
+
+TargetPassConfig::TargetPassConfig()
+ : ImmutablePass(ID), PM(*(PassManagerBase*)0) {
+ llvm_unreachable("TargetPassConfig should not be constructed on-the-fly"=
);
+}
+
+// Helper to verify the analysis is really immutable.
+void TargetPassConfig::setOpt(bool &Opt, bool Val) {
+ assert(!Initialized && "PassConfig is immutable");
+ Opt =3D Val;
+}
+
+void TargetPassConfig::substitutePass(char &StandardID, char &TargetID) {
+ Impl->TargetPasses[&StandardID] =3D &TargetID;
+}
+
+AnalysisID TargetPassConfig::getPassSubstitution(AnalysisID ID) const {
+ DenseMap<AnalysisID, AnalysisID>::const_iterator
+ I =3D Impl->TargetPasses.find(ID);
+ if (I =3D=3D Impl->TargetPasses.end())
+ return ID;
+ return I->second;
+}
+
+/// Add a CodeGen pass at this point in the pipeline after checking for ta=
rget
+/// and command line overrides.
+AnalysisID TargetPassConfig::addPass(char &ID) {
+ assert(!Initialized && "PassConfig is immutable");
+
+ AnalysisID TargetID =3D getPassSubstitution(&ID);
+ AnalysisID FinalID =3D overridePass(&ID, TargetID);
+ if (FinalID =3D=3D &NoPassID)
+ return FinalID;
+
+ Pass *P =3D Pass::createPass(FinalID);
+ if (!P)
+ llvm_unreachable("Pass ID not registered");
+ PM.add(P);
+ return FinalID;
+}
+
+void TargetPassConfig::printAndVerify(const char *Banner) const {
+ if (TM->shouldPrintMachineCode())
+ PM.add(createMachineFunctionPrinterPass(dbgs(), Banner));
+
+ if (VerifyMachineCode)
+ PM.add(createMachineVerifierPass(Banner));
+}
+
+/// Add common target configurable passes that perform LLVM IR to IR trans=
forms
+/// following machine independent optimization.
+void TargetPassConfig::addIRPasses() {
+ // Basic AliasAnalysis support.
+ // Add TypeBasedAliasAnalysis before BasicAliasAnalysis so that
+ // BasicAliasAnalysis wins if they disagree. This is intended to help
+ // support "obvious" type-punning idioms.
+ PM.add(createTypeBasedAliasAnalysisPass());
+ PM.add(createBasicAliasAnalysisPass());
+
+ // Before running any passes, run the verifier to determine if the input
+ // coming from the front-end and/or optimizer is valid.
+ if (!DisableVerify)
+ PM.add(createVerifierPass());
+
+ // Run loop strength reduction before anything else.
+ if (getOptLevel() !=3D CodeGenOpt::None && !DisableLSR) {
+ PM.add(createLoopStrengthReducePass(getTargetLowering()));
+ if (PrintLSR)
+ PM.add(createPrintFunctionPass("\n\n*** Code after LSR ***\n", &dbgs=
()));
+ }
+
+ PM.add(createGCLoweringPass());
+
+ // Make sure that no unreachable blocks are instruction selected.
+ PM.add(createUnreachableBlockEliminationPass());
+}
+
+/// Add common passes that perform LLVM IR to IR transforms in preparation=
for
+/// instruction selection.
+void TargetPassConfig::addISelPrepare() {
+ if (getOptLevel() !=3D CodeGenOpt::None && !DisableCGP)
+ PM.add(createCodeGenPreparePass(getTargetLowering()));
+
+ PM.add(createStackProtectorPass(getTargetLowering()));
+
+ addPreISel();
+
+ if (PrintISelInput)
+ PM.add(createPrintFunctionPass("\n\n"
+ "*** Final LLVM Code input to ISel ***\=
n",
+ &dbgs()));
+
+ // All passes which modify the LLVM IR are now complete; run the verifier
+ // to ensure that the IR is valid.
+ if (!DisableVerify)
+ PM.add(createVerifierPass());
+}
+
+/// Add the complete set of target-independent postISel code generator pas=
ses.
///
+/// This can be read as the standard order of major LLVM CodeGen stages. S=
tages
+/// with nontrivial configuration or multiple passes are broken out below =
in
+/// add%Stage routines.
+///
+/// Any TargetPassConfig::addXX routine may be overriden by the Target. The
+/// addPre/Post methods with empty header implementations allow injecting
+/// target-specific fixups just before or after major stages. Additionally,
+/// targets have the flexibility to change pass order within a stage by
+/// overriding default implementation of add%Stage routines below. Each
+/// technique has maintainability tradeoffs because alternate pass orders =
are
+/// not well supported. addPre/Post works better if the target pass is eas=
ily
+/// tied to a common pass. But if it has subtle dependencies on multiple p=
asses,
+/// the target should override the stage instead.
+///
+/// TODO: We could use a single addPre/Post(ID) hook to allow pass injecti=
on
+/// before/after any target-independent pass. But it's currently overkill.
+void TargetPassConfig::addMachinePasses() {
+ // Print the instruction selected machine code...
+ printAndVerify("After Instruction Selection");
+
+ // Expand pseudo-instructions emitted by ISel.
+ addPass(ExpandISelPseudosID);
+
+ // Add passes that optimize machine instructions in SSA form.
+ if (getOptLevel() !=3D CodeGenOpt::None) {
+ addMachineSSAOptimization();
+ }
+ else {
+ // If the target requests it, assign local variables to stack slots re=
lative
+ // to one another and simplify frame index references where possible.
+ addPass(LocalStackSlotAllocationID);
+ }
+
+ // Run pre-ra passes.
+ if (addPreRegAlloc())
+ printAndVerify("After PreRegAlloc passes");
+
+ // Run register allocation and passes that are tightly coupled with it,
+ // including phi elimination and scheduling.
+ if (getOptimizeRegAlloc())
+ addOptimizedRegAlloc(createRegAllocPass(true));
+ else
+ addFastRegAlloc(createRegAllocPass(false));
+
+ // Run post-ra passes.
+ if (addPostRegAlloc())
+ printAndVerify("After PostRegAlloc passes");
+
+ // Insert prolog/epilog code. Eliminate abstract frame index references=
...
+ addPass(PrologEpilogCodeInserterID);
+ printAndVerify("After PrologEpilogCodeInserter");
+
+ /// Add passes that optimize machine instructions after register allocat=
ion.
+ if (getOptLevel() !=3D CodeGenOpt::None)
+ addMachineLateOptimization();
+
+ // Expand pseudo instructions before second scheduling pass.
+ addPass(ExpandPostRAPseudosID);
+ printAndVerify("After ExpandPostRAPseudos");
+
+ // Run pre-sched2 passes.
+ if (addPreSched2())
+ printAndVerify("After PreSched2 passes");
+
+ // Second pass scheduler.
+ if (getOptLevel() !=3D CodeGenOpt::None) {
+ addPass(PostRASchedulerID);
+ printAndVerify("After PostRAScheduler");
+ }
+
+ // GC
+ addPass(GCMachineCodeAnalysisID);
+ if (PrintGCInfo)
+ PM.add(createGCInfoPrinter(dbgs()));
+
+ // Basic block placement.
+ if (getOptLevel() !=3D CodeGenOpt::None)
+ addBlockPlacement();
+
+ if (addPreEmitPass())
+ printAndVerify("After PreEmit passes");
+}
+
+/// Add passes that optimize machine instructions in SSA form.
+void TargetPassConfig::addMachineSSAOptimization() {
+ // Pre-ra tail duplication.
+ if (addPass(EarlyTailDuplicateID) !=3D &NoPassID)
+ printAndVerify("After Pre-RegAlloc TailDuplicate");
+
+ // Optimize PHIs before DCE: removing dead PHI cycles may make more
+ // instructions dead.
+ addPass(OptimizePHIsID);
+
+ // If the target requests it, assign local variables to stack slots rela=
tive
+ // to one another and simplify frame index references where possible.
+ addPass(LocalStackSlotAllocationID);
+
+ // With optimization, dead code should already be eliminated. However
+ // there is one known exception: lowered code for arguments that are only
+ // used by tail calls, where the tail calls reuse the incoming stack
+ // arguments directly (see t11 in test/CodeGen/X86/sibcall.ll).
+ addPass(DeadMachineInstructionElimID);
+ printAndVerify("After codegen DCE pass");
+
+ addPass(MachineLICMID);
+ addPass(MachineCSEID);
+ addPass(MachineSinkingID);
+ printAndVerify("After Machine LICM, CSE and Sinking passes");
+
+ addPass(PeepholeOptimizerID);
+ printAndVerify("After codegen peephole optimization pass");
+}
+
//=3D=3D=3D---------------------------------------------------------------=
------=3D=3D=3D//
+/// Register Allocation Pass Configuration
+//=3D=3D=3D---------------------------------------------------------------=
------=3D=3D=3D//
+
+bool TargetPassConfig::getOptimizeRegAlloc() const {
+ switch (OptimizeRegAlloc) {
+ case cl::BOU_UNSET: return getOptLevel() !=3D CodeGenOpt::None;
+ case cl::BOU_TRUE: return true;
+ case cl::BOU_FALSE: return false;
+ }
+ llvm_unreachable("Invalid optimize-regalloc state");
+}
+
+/// RegisterRegAlloc's global Registry tracks allocator registration.
MachinePassRegistry RegisterRegAlloc::Registry;
=20
-static FunctionPass *createDefaultRegisterAllocator() { return 0; }
+/// A dummy default pass factory indicates whether the register allocator =
is
+/// overridden on the command line.
+static FunctionPass *useDefaultRegisterAllocator() { return 0; }
static RegisterRegAlloc
defaultRegAlloc("default",
"pick register allocator based on -O option",
- createDefaultRegisterAllocator);
+ useDefaultRegisterAllocator);
=20
-//=3D=3D=3D---------------------------------------------------------------=
------=3D=3D=3D//
-///
-/// RegAlloc command line options.
-///
-//=3D=3D=3D---------------------------------------------------------------=
------=3D=3D=3D//
+/// -regalloc=3D... command line option.
static cl::opt<RegisterRegAlloc::FunctionPassCtor, false,
RegisterPassParser<RegisterRegAlloc> >
RegAlloc("regalloc",
- cl::init(&createDefaultRegisterAllocator),
+ cl::init(&useDefaultRegisterAllocator),
cl::desc("Register allocator to use"));
=20
=20
-//=3D=3D=3D---------------------------------------------------------------=
------=3D=3D=3D//
+/// Instantiate the default register allocator pass for this target for ei=
ther
+/// the optimized or unoptimized allocation path. This will be added to th=
e pass
+/// manager by addFastRegAlloc in the unoptimized case or addOptimizedRegA=
lloc
+/// in the optimized case.
///
-/// createRegisterAllocator - choose the appropriate register allocator.
+/// A target that uses the standard regalloc pass order for fast or optimi=
zed
+/// allocation may still override this for per-target regalloc
+/// selection. But -regalloc=3D... always takes precedence.
+FunctionPass *TargetPassConfig::createTargetRegisterAllocator(bool Optimiz=
ed) {
+ if (Optimized)
+ return createGreedyRegisterAllocator();
+ else
+ return createFastRegisterAllocator();
+}
+
+/// Find and instantiate the register allocation pass requested by this ta=
rget
+/// at the current optimization level. Different register allocators are
+/// defined as separate passes because they may require different analysis.
///
-//=3D=3D=3D---------------------------------------------------------------=
------=3D=3D=3D//
-FunctionPass *llvm::createRegisterAllocator(CodeGenOpt::Level OptLevel) {
+/// This helper ensures that the regalloc=3D option is always available,
+/// even for targets that override the default allocator.
+///
+/// FIXME: When MachinePassRegistry register pass IDs instead of function =
ptrs,
+/// this can be folded into addPass.
+FunctionPass *TargetPassConfig::createRegAllocPass(bool Optimized) {
RegisterRegAlloc::FunctionPassCtor Ctor =3D RegisterRegAlloc::getDefault=
();
=20
+ // Initialize the global default.
if (!Ctor) {
Ctor =3D RegAlloc;
RegisterRegAlloc::setDefault(RegAlloc);
}
-
- // This forces linking of the linear scan register allocator,
- // so -regalloc=3Dlinearscan still works in clang.
- if (Ctor =3D=3D createLinearScanRegisterAllocator)
- return createLinearScanRegisterAllocator();
-
- if (Ctor !=3D createDefaultRegisterAllocator)
+ if (Ctor !=3D useDefaultRegisterAllocator)
return Ctor();
=20
- // When the 'default' allocator is requested, pick one based on OptLevel.
- switch (OptLevel) {
- case CodeGenOpt::None:
- return createFastRegisterAllocator();
- default:
- return createGreedyRegisterAllocator();
+ // With no -regalloc=3D override, ask the target for a regalloc pass.
+ return createTargetRegisterAllocator(Optimized);
+}
+
+/// Add the minimum set of target-independent passes that are required for
+/// register allocation. No coalescing or scheduling.
+void TargetPassConfig::addFastRegAlloc(FunctionPass *RegAllocPass) {
+ addPass(PHIEliminationID);
+ addPass(TwoAddressInstructionPassID);
+
+ PM.add(RegAllocPass);
+ printAndVerify("After Register Allocation");
+}
+
+/// Add standard target-independent passes that are tightly coupled with
+/// optimized register allocation, including coalescing, machine instructi=
on
+/// scheduling, and register allocation itself.
+void TargetPassConfig::addOptimizedRegAlloc(FunctionPass *RegAllocPass) {
+ // LiveVariables currently requires pure SSA form.
+ //
+ // FIXME: Once TwoAddressInstruction pass no longer uses kill flags,
+ // LiveVariables can be removed completely, and LiveIntervals can be dir=
ectly
+ // computed. (We still either need to regenerate kill flags after regall=
oc, or
+ // preferably fix the scavenger to not depend on them).
+ addPass(LiveVariablesID);
+
+ // Add passes that move from transformed SSA into conventional SSA. This=
is a
+ // "copy coalescing" problem.
+ //
+ if (!EnableStrongPHIElim) {
+ // Edge splitting is smarter with machine loop info.
+ addPass(MachineLoopInfoID);
+ addPass(PHIEliminationID);
+ }
+ addPass(TwoAddressInstructionPassID);
+
+ // FIXME: Either remove this pass completely, or fix it so that it works=
on
+ // SSA form. We could modify LiveIntervals to be independent of this pas=
s, But
+ // it would be even better to simply eliminate *all* IMPLICIT_DEFs before
+ // leaving SSA.
+ addPass(ProcessImplicitDefsID);
+
+ if (EnableStrongPHIElim)
+ addPass(StrongPHIEliminationID);
+
+ addPass(RegisterCoalescerID);
+
+ // PreRA instruction scheduling.
+ if (addPass(MachineSchedulerID) !=3D &NoPassID)
+ printAndVerify("After Machine Scheduling");
+
+ // Add the selected register allocation pass.
+ PM.add(RegAllocPass);
+ printAndVerify("After Register Allocation");
+
+ // FinalizeRegAlloc is convenient until MachineInstrBundles is more matu=
re,
+ // but eventually, all users of it should probably be moved to addPostRA=
and
+ // it can go away. Currently, it's the intended place for targets to run
+ // FinalizeMachineBundles, because passes other than MachineScheduling an
+ // RegAlloc itself may not be aware of bundles.
+ if (addFinalizeRegAlloc())
+ printAndVerify("After RegAlloc finalization");
+
+ // Perform stack slot coloring and post-ra machine LICM.
+ //
+ // FIXME: Re-enable coloring with register when it's capable of adding
+ // kill markers.
+ addPass(StackSlotColoringID);
+
+ // Run post-ra machine LICM to hoist reloads / remats.
+ //
+ // FIXME: can this move into MachineLateOptimization?
+ addPass(PostRAMachineLICMID);
+
+ printAndVerify("After StackSlotColoring and postra Machine LICM");
+}
+
+//=3D=3D=3D---------------------------------------------------------------=
------=3D=3D=3D//
+/// Post RegAlloc Pass Configuration
+//=3D=3D=3D---------------------------------------------------------------=
------=3D=3D=3D//
+
+/// Add passes that optimize machine instructions after register allocatio=
n.
+void TargetPassConfig::addMachineLateOptimization() {
+ // Branch folding must be run after regalloc and prolog/epilog insertion.
+ if (addPass(BranchFolderPassID) !=3D &NoPassID)
+ printAndVerify("After BranchFolding");
+
+ // Tail duplication.
+ if (addPass(TailDuplicateID) !=3D &NoPassID)
+ printAndVerify("After TailDuplicate");
+
+ // Copy propagation.
+ if (addPass(MachineCopyPropagationID) !=3D &NoPassID)
+ printAndVerify("After copy propagation pass");
+}
+
+/// Add standard basic block placement passes.
+void TargetPassConfig::addBlockPlacement() {
+ AnalysisID ID =3D &NoPassID;
+ if (EnableBlockPlacement) {
+ // MachineBlockPlacement is an experimental pass which is disabled by
+ // default currently. Eventually it should subsume CodePlacementOpt, so
+ // when enabled, the other is disabled.
+ ID =3D addPass(MachineBlockPlacementID);
+ } else {
+ ID =3D addPass(CodePlacementOptID);
+ }
+ if (ID !=3D &NoPassID) {
+ // Run a separate pass to collect block placement statistics.
+ if (EnableBlockPlacementStats)
+ addPass(MachineBlockPlacementStatsID);
+
+ printAndVerify("After machine block placement.");
}
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Peephole=
Optimizer.cpp
--- a/head/contrib/llvm/lib/CodeGen/PeepholeOptimizer.cpp Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/PeepholeOptimizer.cpp Tue Apr 17 11:51:=
51 2012 +0300
@@ -39,7 +39,7 @@
// =3D>
// v1 =3D bitcast v0
// =3D v0
-//=20
+//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
#define DEBUG_TYPE "peephole-opt"
@@ -68,7 +68,7 @@
STATISTIC(NumReuse, "Number of extension results reused");
STATISTIC(NumBitcasts, "Number of bitcasts eliminated");
STATISTIC(NumCmps, "Number of compares eliminated");
-STATISTIC(NumImmFold, "Number of move immediate foled");
+STATISTIC(NumImmFold, "Number of move immediate folded");
=20
namespace {
class PeepholeOptimizer : public MachineFunctionPass {
@@ -109,22 +109,19 @@
}
=20
char PeepholeOptimizer::ID =3D 0;
+char &llvm::PeepholeOptimizerID =3D PeepholeOptimizer::ID;
INITIALIZE_PASS_BEGIN(PeepholeOptimizer, "peephole-opts",
"Peephole Optimizations", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
INITIALIZE_PASS_END(PeepholeOptimizer, "peephole-opts",
"Peephole Optimizations", false, false)
=20
-FunctionPass *llvm::createPeepholeOptimizerPass() {
- return new PeepholeOptimizer();
-}
-
/// OptimizeExtInstr - If instruction is a copy-like instruction, i.e. it =
reads
/// a single register and writes a single register and it does not modify =
the
/// source, and if the source value is preserved as a sub-register of the
/// result, then replace all reachable uses of the source with the subreg =
of the
/// result.
-///=20
+///
/// Do not generate an EXTRACT that is used only in a debug use, as this c=
hanges
/// the code. Since this code does not currently share EXTRACTs, just igno=
re all
/// debug uses.
@@ -134,7 +131,7 @@
unsigned SrcReg, DstReg, SubIdx;
if (!TII->isCoalescableExtInstr(*MI, SrcReg, DstReg, SubIdx))
return false;
- =20
+
if (TargetRegisterInfo::isPhysicalRegister(DstReg) ||
TargetRegisterInfo::isPhysicalRegister(SrcReg))
return false;
@@ -240,6 +237,10 @@
if (PHIBBs.count(UseMBB))
continue;
=20
+ // About to add uses of DstReg, clear DstReg's kill flags.
+ if (!Changed)
+ MRI->clearKillFlags(DstReg);
+
unsigned NewVR =3D MRI->createVirtualRegister(RC);
BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(),
TII->get(TargetOpcode::COPY), NewVR)
@@ -292,7 +293,7 @@
assert(Def && Src && "Malformed bitcast instruction!");
=20
MachineInstr *DefMI =3D MRI->getVRegDef(Src);
- if (!DefMI || !DefMI->getDesc().isBitcast())
+ if (!DefMI || !DefMI->isBitcast())
return false;
=20
unsigned SrcSrc =3D 0;
@@ -353,7 +354,7 @@
SmallSet<unsigned, 4> &ImmDefRegs,
DenseMap<unsigned, MachineInstr*> &ImmDef=
MIs) {
const MCInstrDesc &MCID =3D MI->getDesc();
- if (!MCID.isMoveImmediate())
+ if (!MI->isMoveImmediate())
return false;
if (MCID.getNumDefs() !=3D 1)
return false;
@@ -363,7 +364,7 @@
ImmDefRegs.insert(Reg);
return true;
}
- =20
+
return false;
}
=20
@@ -395,7 +396,7 @@
bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) {
if (DisablePeephole)
return false;
- =20
+
TM =3D &MF.getTarget();
TII =3D TM->getInstrInfo();
MRI =3D &MF.getRegInfo();
@@ -408,7 +409,7 @@
DenseMap<unsigned, MachineInstr*> ImmDefMIs;
for (MachineFunction::iterator I =3D MF.begin(), E =3D MF.end(); I !=3D =
E; ++I) {
MachineBasicBlock *MBB =3D &*I;
- =20
+
bool SeenMoveImm =3D false;
LocalMIs.clear();
ImmDefRegs.clear();
@@ -428,17 +429,15 @@
continue;
}
=20
- const MCInstrDesc &MCID =3D MI->getDesc();
-
- if (MCID.isBitcast()) {
+ if (MI->isBitcast()) {
if (OptimizeBitcastInstr(MI, MBB)) {
// MI is deleted.
LocalMIs.erase(MI);
Changed =3D true;
MII =3D First ? I->begin() : llvm::next(PMII);
continue;
- } =20
- } else if (MCID.isCompare()) {
+ }
+ } else if (MI->isCompare()) {
if (OptimizeCmpInstr(MI, MBB)) {
// MI is deleted.
LocalMIs.erase(MI);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/PostRASc=
hedulerList.cpp
--- a/head/contrib/llvm/lib/CodeGen/PostRASchedulerList.cpp Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/PostRASchedulerList.cpp Tue Apr 17 11:5=
1:51 2012 +0300
@@ -23,7 +23,6 @@
#include "AggressiveAntiDepBreaker.h"
#include "CriticalAntiDepBreaker.h"
#include "RegisterClassInfo.h"
-#include "ScheduleDAGInstrs.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/LatencyPriorityQueue.h"
#include "llvm/CodeGen/SchedulerRegistry.h"
@@ -32,6 +31,7 @@
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/ScheduleDAGInstrs.h"
#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Target/TargetLowering.h"
@@ -45,7 +45,6 @@
#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/Statistic.h"
-#include <set>
using namespace llvm;
=20
STATISTIC(NumNoops, "Number of noops inserted");
@@ -82,16 +81,15 @@
AliasAnalysis *AA;
const TargetInstrInfo *TII;
RegisterClassInfo RegClassInfo;
- CodeGenOpt::Level OptLevel;
=20
public:
static char ID;
- PostRAScheduler(CodeGenOpt::Level ol) :
- MachineFunctionPass(ID), OptLevel(ol) {}
+ PostRAScheduler() : MachineFunctionPass(ID) {}
=20
void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
AU.addRequired<AliasAnalysis>();
+ AU.addRequired<TargetPassConfig>();
AU.addRequired<MachineDominatorTree>();
AU.addPreserved<MachineDominatorTree>();
AU.addRequired<MachineLoopInfo>();
@@ -99,10 +97,6 @@
MachineFunctionPass::getAnalysisUsage(AU);
}
=20
- const char *getPassName() const {
- return "Post RA top-down list latency scheduler";
- }
-
bool runOnMachineFunction(MachineFunction &Fn);
};
char PostRAScheduler::ID =3D 0;
@@ -130,36 +124,49 @@
/// AA - AliasAnalysis for making memory reference queries.
AliasAnalysis *AA;
=20
- /// KillIndices - The index of the most recent kill (proceding bottom-=
up),
- /// or ~0u if the register is not live.
- std::vector<unsigned> KillIndices;
+ /// LiveRegs - true if the register is live.
+ BitVector LiveRegs;
+
+ /// The schedule. Null SUnit*'s represent noop instructions.
+ std::vector<SUnit*> Sequence;
=20
public:
SchedulePostRATDList(
MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
AliasAnalysis *AA, const RegisterClassInfo&,
TargetSubtargetInfo::AntiDepBreakMode AntiDepMode,
- SmallVectorImpl<TargetRegisterClass*> &CriticalPathRCs);
+ SmallVectorImpl<const TargetRegisterClass*> &CriticalPathRCs);
=20
~SchedulePostRATDList();
=20
- /// StartBlock - Initialize register live-range state for scheduling in
+ /// startBlock - Initialize register live-range state for scheduling in
/// this block.
///
- void StartBlock(MachineBasicBlock *BB);
+ void startBlock(MachineBasicBlock *BB);
+
+ /// Initialize the scheduler state for the next scheduling region.
+ virtual void enterRegion(MachineBasicBlock *bb,
+ MachineBasicBlock::iterator begin,
+ MachineBasicBlock::iterator end,
+ unsigned endcount);
+
+ /// Notify that the scheduler has finished scheduling the current regi=
on.
+ virtual void exitRegion();
=20
/// Schedule - Schedule the instruction range using list scheduling.
///
- void Schedule();
+ void schedule();
+
+ void EmitSchedule();
=20
/// Observe - Update liveness information to account for the current
/// instruction, which will not be scheduled.
///
void Observe(MachineInstr *MI, unsigned Count);
=20
- /// FinishBlock - Clean up register live-range state.
+ /// finishBlock - Clean up register live-range state.
///
- void FinishBlock();
+ void finishBlock();
=20
/// FixupKills - Fix register kill flags that have been made
/// invalid due to scheduling
@@ -177,16 +184,23 @@
// adjustments may be made to the instruction if necessary. Return
// true if the operand has been deleted, false if not.
bool ToggleKillFlag(MachineInstr *MI, MachineOperand &MO);
+
+ void dumpSchedule() const;
};
}
=20
+char &llvm::PostRASchedulerID =3D PostRAScheduler::ID;
+
+INITIALIZE_PASS(PostRAScheduler, "post-RA-sched",
+ "Post RA top-down list latency scheduler", false, false)
+
SchedulePostRATDList::SchedulePostRATDList(
MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
AliasAnalysis *AA, const RegisterClassInfo &RCI,
TargetSubtargetInfo::AntiDepBreakMode AntiDepMode,
- SmallVectorImpl<TargetRegisterClass*> &CriticalPathRCs)
- : ScheduleDAGInstrs(MF, MLI, MDT), Topo(SUnits), AA(AA),
- KillIndices(TRI->getNumRegs())
+ SmallVectorImpl<const TargetRegisterClass*> &CriticalPathRCs)
+ : ScheduleDAGInstrs(MF, MLI, MDT, /*IsPostRA=3D*/true), Topo(SUnits), AA=
(AA),
+ LiveRegs(TRI->getNumRegs())
{
const TargetMachine &TM =3D MF.getTarget();
const InstrItineraryData *InstrItins =3D TM.getInstrItineraryData();
@@ -204,16 +218,48 @@
delete AntiDepBreak;
}
=20
+/// Initialize state associated with the next scheduling region.
+void SchedulePostRATDList::enterRegion(MachineBasicBlock *bb,
+ MachineBasicBlock::iterator begin,
+ MachineBasicBlock::iterator end,
+ unsigned endcount) {
+ ScheduleDAGInstrs::enterRegion(bb, begin, end, endcount);
+ Sequence.clear();
+}
+
+/// Print the schedule before exiting the region.
+void SchedulePostRATDList::exitRegion() {
+ DEBUG({
+ dbgs() << "*** Final schedule ***\n";
+ dumpSchedule();
+ dbgs() << '\n';
+ });
+ ScheduleDAGInstrs::exitRegion();
+}
+
+/// dumpSchedule - dump the scheduled Sequence.
+void SchedulePostRATDList::dumpSchedule() const {
+ for (unsigned i =3D 0, e =3D Sequence.size(); i !=3D e; i++) {
+ if (SUnit *SU =3D Sequence[i])
+ SU->dump(this);
+ else
+ dbgs() << "**** NOOP ****\n";
+ }
+}
+
bool PostRAScheduler::runOnMachineFunction(MachineFunction &Fn) {
TII =3D Fn.getTarget().getInstrInfo();
MachineLoopInfo &MLI =3D getAnalysis<MachineLoopInfo>();
MachineDominatorTree &MDT =3D getAnalysis<MachineDominatorTree>();
AliasAnalysis *AA =3D &getAnalysis<AliasAnalysis>();
+ TargetPassConfig *PassConfig =3D &getAnalysis<TargetPassConfig>();
+
RegClassInfo.runOnMachineFunction(Fn);
=20
// Check for explicit enable/disable of post-ra scheduling.
- TargetSubtargetInfo::AntiDepBreakMode AntiDepMode =3D TargetSubtargetInf=
o::ANTIDEP_NONE;
- SmallVector<TargetRegisterClass*, 4> CriticalPathRCs;
+ TargetSubtargetInfo::AntiDepBreakMode AntiDepMode =3D
+ TargetSubtargetInfo::ANTIDEP_NONE;
+ SmallVector<const TargetRegisterClass*, 4> CriticalPathRCs;
if (EnablePostRAScheduler.getPosition() > 0) {
if (!EnablePostRAScheduler)
return false;
@@ -221,7 +267,8 @@
// Check that post-RA scheduling is enabled for this target.
// This may upgrade the AntiDepMode.
const TargetSubtargetInfo &ST =3D Fn.getTarget().getSubtarget<TargetSu=
btargetInfo>();
- if (!ST.enablePostRAScheduler(OptLevel, AntiDepMode, CriticalPathRCs))
+ if (!ST.enablePostRAScheduler(PassConfig->getOptLevel(), AntiDepMode,
+ CriticalPathRCs))
return false;
}
=20
@@ -248,13 +295,13 @@
static int bbcnt =3D 0;
if (bbcnt++ % DebugDiv !=3D DebugMod)
continue;
- dbgs() << "*** DEBUG scheduling " << Fn.getFunction()->getNameStr() =
<<
- ":BB#" << MBB->getNumber() << " ***\n";
+ dbgs() << "*** DEBUG scheduling " << Fn.getFunction()->getName()
+ << ":BB#" << MBB->getNumber() << " ***\n";
}
#endif
=20
// Initialize register live-range state for scheduling in this block.
- Scheduler.StartBlock(MBB);
+ Scheduler.startBlock(MBB);
=20
// Schedule each sequence of instructions not interrupted by a label
// or anything else that effectively needs to shut down scheduling.
@@ -262,8 +309,13 @@
unsigned Count =3D MBB->size(), CurrentCount =3D Count;
for (MachineBasicBlock::iterator I =3D Current; I !=3D MBB->begin(); )=
{
MachineInstr *MI =3D llvm::prior(I);
- if (TII->isSchedulingBoundary(MI, MBB, Fn)) {
- Scheduler.Run(MBB, I, Current, CurrentCount);
+ // Calls are not scheduling boundaries before register allocation, b=
ut
+ // post-ra we don't gain anything by scheduling across calls since we
+ // don't need to worry about register pressure.
+ if (MI->isCall() || TII->isSchedulingBoundary(MI, MBB, Fn)) {
+ Scheduler.enterRegion(MBB, I, Current, CurrentCount);
+ Scheduler.schedule();
+ Scheduler.exitRegion();
Scheduler.EmitSchedule();
Current =3D MI;
CurrentCount =3D Count - 1;
@@ -271,15 +323,19 @@
}
I =3D MI;
--Count;
+ if (MI->isBundle())
+ Count -=3D MI->getBundleSize();
}
assert(Count =3D=3D 0 && "Instruction count mismatch!");
assert((MBB->begin() =3D=3D Current || CurrentCount !=3D 0) &&
"Instruction count mismatch!");
- Scheduler.Run(MBB, MBB->begin(), Current, CurrentCount);
+ Scheduler.enterRegion(MBB, MBB->begin(), Current, CurrentCount);
+ Scheduler.schedule();
+ Scheduler.exitRegion();
Scheduler.EmitSchedule();
=20
// Clean up register live-range state.
- Scheduler.FinishBlock();
+ Scheduler.finishBlock();
=20
// Update register kills
Scheduler.FixupKills(MBB);
@@ -291,9 +347,9 @@
/// StartBlock - Initialize register live-range state for scheduling in
/// this block.
///
-void SchedulePostRATDList::StartBlock(MachineBasicBlock *BB) {
+void SchedulePostRATDList::startBlock(MachineBasicBlock *BB) {
// Call the superclass.
- ScheduleDAGInstrs::StartBlock(BB);
+ ScheduleDAGInstrs::startBlock(BB);
=20
// Reset the hazard recognizer and anti-dep breaker.
HazardRec->Reset();
@@ -303,14 +359,14 @@
=20
/// Schedule - Schedule the instruction range using list scheduling.
///
-void SchedulePostRATDList::Schedule() {
+void SchedulePostRATDList::schedule() {
// Build the scheduling graph.
- BuildSchedGraph(AA);
+ buildSchedGraph(AA);
=20
if (AntiDepBreak !=3D NULL) {
unsigned Broken =3D
- AntiDepBreak->BreakAntiDependencies(SUnits, Begin, InsertPos,
- InsertPosIndex, DbgValues);
+ AntiDepBreak->BreakAntiDependencies(SUnits, RegionBegin, RegionEnd,
+ EndIndex, DbgValues);
=20
if (Broken !=3D 0) {
// We made changes. Update the dependency graph.
@@ -319,11 +375,8 @@
// the def's anti-dependence *and* output-dependence edges due to
// that register, and add new anti-dependence and output-dependence
// edges based on the next live range of the register.
- SUnits.clear();
- Sequence.clear();
- EntrySU =3D SUnit();
- ExitSU =3D SUnit();
- BuildSchedGraph(AA);
+ ScheduleDAG::clearDAG();
+ buildSchedGraph(AA);
=20
NumFixedAnti +=3D Broken;
}
@@ -343,38 +396,36 @@
///
void SchedulePostRATDList::Observe(MachineInstr *MI, unsigned Count) {
if (AntiDepBreak !=3D NULL)
- AntiDepBreak->Observe(MI, Count, InsertPosIndex);
+ AntiDepBreak->Observe(MI, Count, EndIndex);
}
=20
/// FinishBlock - Clean up register live-range state.
///
-void SchedulePostRATDList::FinishBlock() {
+void SchedulePostRATDList::finishBlock() {
if (AntiDepBreak !=3D NULL)
AntiDepBreak->FinishBlock();
=20
// Call the superclass.
- ScheduleDAGInstrs::FinishBlock();
+ ScheduleDAGInstrs::finishBlock();
}
=20
/// StartBlockForKills - Initialize register live-range state for updating=
kills
///
void SchedulePostRATDList::StartBlockForKills(MachineBasicBlock *BB) {
- // Initialize the indices to indicate that no registers are live.
- for (unsigned i =3D 0; i < TRI->getNumRegs(); ++i)
- KillIndices[i] =3D ~0u;
+ // Start with no live registers.
+ LiveRegs.reset();
=20
// Determine the live-out physregs for this block.
- if (!BB->empty() && BB->back().getDesc().isReturn()) {
+ if (!BB->empty() && BB->back().isReturn()) {
// In a return block, examine the function live-out regs.
for (MachineRegisterInfo::liveout_iterator I =3D MRI.liveout_begin(),
E =3D MRI.liveout_end(); I !=3D E; ++I) {
unsigned Reg =3D *I;
- KillIndices[Reg] =3D BB->size();
+ LiveRegs.set(Reg);
// Repeat, for all subregs.
- for (const unsigned *Subreg =3D TRI->getSubRegisters(Reg);
- *Subreg; ++Subreg) {
- KillIndices[*Subreg] =3D BB->size();
- }
+ for (const uint16_t *Subreg =3D TRI->getSubRegisters(Reg);
+ *Subreg; ++Subreg)
+ LiveRegs.set(*Subreg);
}
}
else {
@@ -384,12 +435,11 @@
for (MachineBasicBlock::livein_iterator I =3D (*SI)->livein_begin(),
E =3D (*SI)->livein_end(); I !=3D E; ++I) {
unsigned Reg =3D *I;
- KillIndices[Reg] =3D BB->size();
+ LiveRegs.set(Reg);
// Repeat, for all subregs.
- for (const unsigned *Subreg =3D TRI->getSubRegisters(Reg);
- *Subreg; ++Subreg) {
- KillIndices[*Subreg] =3D BB->size();
- }
+ for (const uint16_t *Subreg =3D TRI->getSubRegisters(Reg);
+ *Subreg; ++Subreg)
+ LiveRegs.set(*Subreg);
}
}
}
@@ -404,7 +454,7 @@
}
=20
// If MO itself is live, clear the kill flag...
- if (KillIndices[MO.getReg()] !=3D ~0u) {
+ if (LiveRegs.test(MO.getReg())) {
MO.setIsKill(false);
return false;
}
@@ -414,9 +464,9 @@
MO.setIsKill(false);
bool AllDead =3D true;
const unsigned SuperReg =3D MO.getReg();
- for (const unsigned *Subreg =3D TRI->getSubRegisters(SuperReg);
+ for (const uint16_t *Subreg =3D TRI->getSubRegisters(SuperReg);
*Subreg; ++Subreg) {
- if (KillIndices[*Subreg] !=3D ~0u) {
+ if (LiveRegs.test(*Subreg)) {
MI->addOperand(MachineOperand::CreateReg(*Subreg,
true /*IsDef*/,
true /*IsImp*/,
@@ -437,7 +487,7 @@
void SchedulePostRATDList::FixupKills(MachineBasicBlock *MBB) {
DEBUG(dbgs() << "Fixup kills for BB#" << MBB->getNumber() << '\n');
=20
- std::set<unsigned> killedRegs;
+ BitVector killedRegs(TRI->getNumRegs());
BitVector ReservedRegs =3D TRI->getReservedRegs(MF);
=20
StartBlockForKills(MBB);
@@ -455,6 +505,8 @@
// are completely defined.
for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
MachineOperand &MO =3D MI->getOperand(i);
+ if (MO.isRegMask())
+ LiveRegs.clearBitsNotInMask(MO.getRegMask());
if (!MO.isReg()) continue;
unsigned Reg =3D MO.getReg();
if (Reg =3D=3D 0) continue;
@@ -462,19 +514,18 @@
// Ignore two-addr defs.
if (MI->isRegTiedToUseOperand(i)) continue;
=20
- KillIndices[Reg] =3D ~0u;
+ LiveRegs.reset(Reg);
=20
// Repeat for all subregs.
- for (const unsigned *Subreg =3D TRI->getSubRegisters(Reg);
- *Subreg; ++Subreg) {
- KillIndices[*Subreg] =3D ~0u;
- }
+ for (const uint16_t *Subreg =3D TRI->getSubRegisters(Reg);
+ *Subreg; ++Subreg)
+ LiveRegs.reset(*Subreg);
}
=20
// Examine all used registers and set/clear kill flag. When a
// register is used multiple times we only set the kill flag on
// the first use.
- killedRegs.clear();
+ killedRegs.reset();
for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
MachineOperand &MO =3D MI->getOperand(i);
if (!MO.isReg() || !MO.isUse()) continue;
@@ -482,12 +533,12 @@
if ((Reg =3D=3D 0) || ReservedRegs.test(Reg)) continue;
=20
bool kill =3D false;
- if (killedRegs.find(Reg) =3D=3D killedRegs.end()) {
+ if (!killedRegs.test(Reg)) {
kill =3D true;
// A register is not killed if any subregs are live...
- for (const unsigned *Subreg =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *Subreg =3D TRI->getSubRegisters(Reg);
*Subreg; ++Subreg) {
- if (KillIndices[*Subreg] !=3D ~0u) {
+ if (LiveRegs.test(*Subreg)) {
kill =3D false;
break;
}
@@ -496,7 +547,7 @@
// If subreg is not live, then register is killed if it became
// live in this instruction
if (kill)
- kill =3D (KillIndices[Reg] =3D=3D ~0u);
+ kill =3D !LiveRegs.test(Reg);
}
=20
if (MO.isKill() !=3D kill) {
@@ -506,7 +557,7 @@
DEBUG(MI->dump());
}
=20
- killedRegs.insert(Reg);
+ killedRegs.set(Reg);
}
=20
// Mark any used register (that is not using undef) and subregs as
@@ -517,12 +568,11 @@
unsigned Reg =3D MO.getReg();
if ((Reg =3D=3D 0) || ReservedRegs.test(Reg)) continue;
=20
- KillIndices[Reg] =3D Count;
+ LiveRegs.set(Reg);
=20
- for (const unsigned *Subreg =3D TRI->getSubRegisters(Reg);
- *Subreg; ++Subreg) {
- KillIndices[*Subreg] =3D Count;
- }
+ for (const uint16_t *Subreg =3D TRI->getSubRegisters(Reg);
+ *Subreg; ++Subreg)
+ LiveRegs.set(*Subreg);
}
}
}
@@ -585,7 +635,7 @@
=20
ReleaseSuccessors(SU);
SU->isScheduled =3D true;
- AvailableQueue.ScheduledNode(SU);
+ AvailableQueue.scheduledNode(SU);
}
=20
/// ListScheduleTopDown - The main loop of list scheduling for top-down
@@ -699,14 +749,46 @@
}
=20
#ifndef NDEBUG
- VerifySchedule(/*isBottomUp=3D*/false);
-#endif
+ unsigned ScheduledNodes =3D VerifyScheduledDAG(/*isBottomUp=3D*/false);
+ unsigned Noops =3D 0;
+ for (unsigned i =3D 0, e =3D Sequence.size(); i !=3D e; ++i)
+ if (!Sequence[i])
+ ++Noops;
+ assert(Sequence.size() - Noops =3D=3D ScheduledNodes &&
+ "The number of nodes scheduled doesn't match the expected number!=
");
+#endif // NDEBUG
}
=20
-//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
-// Public Constructor Functions
-//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
+// EmitSchedule - Emit the machine code in scheduled order.
+void SchedulePostRATDList::EmitSchedule() {
+ RegionBegin =3D RegionEnd;
=20
-FunctionPass *llvm::createPostRAScheduler(CodeGenOpt::Level OptLevel) {
- return new PostRAScheduler(OptLevel);
+ // If first instruction was a DBG_VALUE then put it back.
+ if (FirstDbgValue)
+ BB->splice(RegionEnd, BB, FirstDbgValue);
+
+ // Then re-insert them according to the given schedule.
+ for (unsigned i =3D 0, e =3D Sequence.size(); i !=3D e; i++) {
+ if (SUnit *SU =3D Sequence[i])
+ BB->splice(RegionEnd, BB, SU->getInstr());
+ else
+ // Null SUnit* is a noop.
+ TII->insertNoop(*BB, RegionEnd);
+
+ // Update the Begin iterator, as the first instruction in the block
+ // may have been scheduled later.
+ if (i =3D=3D 0)
+ RegionBegin =3D prior(RegionEnd);
+ }
+
+ // Reinsert any remaining debug_values.
+ for (std::vector<std::pair<MachineInstr *, MachineInstr *> >::iterator
+ DI =3D DbgValues.end(), DE =3D DbgValues.begin(); DI !=3D DE; --D=
I) {
+ std::pair<MachineInstr *, MachineInstr *> P =3D *prior(DI);
+ MachineInstr *DbgValue =3D P.first;
+ MachineBasicBlock::iterator OrigPrivMI =3D P.second;
+ BB->splice(++OrigPrivMI, BB, DbgValue);
+ }
+ DbgValues.clear();
+ FirstDbgValue =3D NULL;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/ProcessI=
mplicitDefs.cpp
--- a/head/contrib/llvm/lib/CodeGen/ProcessImplicitDefs.cpp Tue Apr 17 11:3=
6:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/ProcessImplicitDefs.cpp Tue Apr 17 11:5=
1:51 2012 +0300
@@ -26,6 +26,8 @@
using namespace llvm;
=20
char ProcessImplicitDefs::ID =3D 0;
+char &llvm::ProcessImplicitDefsID =3D ProcessImplicitDefs::ID;
+
INITIALIZE_PASS_BEGIN(ProcessImplicitDefs, "processimpdefs",
"Process Implicit Definitions", false, false)
INITIALIZE_PASS_DEPENDENCY(LiveVariables)
@@ -36,7 +38,6 @@
AU.setPreservesCFG();
AU.addPreserved<AliasAnalysis>();
AU.addPreserved<LiveVariables>();
- AU.addRequired<LiveVariables>();
AU.addPreservedID(MachineLoopInfoID);
AU.addPreservedID(MachineDominatorsID);
AU.addPreservedID(TwoAddressInstructionPassID);
@@ -50,10 +51,10 @@
SmallSet<unsigned, 8> &ImpDefR=
egs) {
switch(OpIdx) {
case 1:
- return MI->isCopy() && (MI->getOperand(0).getSubReg() =3D=3D 0 ||
+ return MI->isCopy() && (!MI->getOperand(0).readsReg() ||
ImpDefRegs.count(MI->getOperand(0).getReg()));
case 2:
- return MI->isSubregToReg() && (MI->getOperand(0).getSubReg() =3D=3D 0 =
||
+ return MI->isSubregToReg() && (!MI->getOperand(0).readsReg() ||
ImpDefRegs.count(MI->getOperand(0).getRe=
g()));
default: return false;
}
@@ -66,7 +67,7 @@
MachineOperand &MO1 =3D MI->getOperand(1);
if (MO1.getReg() !=3D Reg)
return false;
- if (!MO0.getSubReg() || ImpDefRegs.count(MO0.getReg()))
+ if (!MO0.readsReg() || ImpDefRegs.count(MO0.getReg()))
return true;
return false;
}
@@ -87,7 +88,7 @@
TII =3D fn.getTarget().getInstrInfo();
TRI =3D fn.getTarget().getRegisterInfo();
MRI =3D &fn.getRegInfo();
- LV =3D &getAnalysis<LiveVariables>();
+ LV =3D getAnalysisIfAvailable<LiveVariables>();
=20
SmallSet<unsigned, 8> ImpDefRegs;
SmallVector<MachineInstr*, 8> ImpDefMIs;
@@ -105,23 +106,24 @@
MachineInstr *MI =3D &*I;
++I;
if (MI->isImplicitDef()) {
- if (MI->getOperand(0).getSubReg())
+ ImpDefMIs.push_back(MI);
+ // Is this a sub-register read-modify-write?
+ if (MI->getOperand(0).readsReg())
continue;
unsigned Reg =3D MI->getOperand(0).getReg();
ImpDefRegs.insert(Reg);
if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
- for (const unsigned *SS =3D TRI->getSubRegisters(Reg); *SS; ++SS)
+ for (const uint16_t *SS =3D TRI->getSubRegisters(Reg); *SS; ++SS)
ImpDefRegs.insert(*SS);
}
- ImpDefMIs.push_back(MI);
continue;
}
=20
// Eliminate %reg1032:sub<def> =3D COPY undef.
- if (MI->isCopy() && MI->getOperand(0).getSubReg()) {
+ if (MI->isCopy() && MI->getOperand(0).readsReg()) {
MachineOperand &MO =3D MI->getOperand(1);
if (MO.isUndef() || ImpDefRegs.count(MO.getReg())) {
- if (MO.isKill()) {
+ if (LV && MO.isKill()) {
LiveVariables::VarInfo& vi =3D LV->getVarInfo(MO.getReg());
vi.removeKill(MI);
}
@@ -140,7 +142,7 @@
bool ChangedToImpDef =3D false;
for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
MachineOperand& MO =3D MI->getOperand(i);
- if (!MO.isReg() || (MO.isDef() && !MO.getSubReg()) || MO.isUndef())
+ if (!MO.isReg() || !MO.readsReg())
continue;
unsigned Reg =3D MO.getReg();
if (!Reg)
@@ -155,8 +157,10 @@
MI->RemoveOperand(j);
if (isKill) {
ImpDefRegs.erase(Reg);
- LiveVariables::VarInfo& vi =3D LV->getVarInfo(Reg);
- vi.removeKill(MI);
+ if (LV) {
+ LiveVariables::VarInfo& vi =3D LV->getVarInfo(Reg);
+ vi.removeKill(MI);
+ }
}
ChangedToImpDef =3D true;
Changed =3D true;
@@ -172,10 +176,10 @@
continue;
}
if (MO.isKill() || MI->isRegTiedToDefOperand(i)) {
- // Make sure other uses of=20
+ // Make sure other reads of Reg are also marked <undef>.
for (unsigned j =3D i+1; j !=3D e; ++j) {
MachineOperand &MOJ =3D MI->getOperand(j);
- if (MOJ.isReg() && MOJ.isUse() && MOJ.getReg() =3D=3D Reg)
+ if (MOJ.isReg() && MOJ.getReg() =3D=3D Reg && MOJ.readsReg())
MOJ.setIsUndef();
}
ImpDefRegs.erase(Reg);
@@ -265,7 +269,7 @@
}
=20
// Update LiveVariables varinfo if the instruction is a kill.
- if (isKill) {
+ if (LV && isKill) {
LiveVariables::VarInfo& vi =3D LV->getVarInfo(Reg);
vi.removeKill(RMI);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/PrologEp=
ilogInserter.cpp
--- a/head/contrib/llvm/lib/CodeGen/PrologEpilogInserter.cpp Tue Apr 17 11:=
36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/PrologEpilogInserter.cpp Tue Apr 17 11:=
51:51 2012 +0300
@@ -45,24 +45,22 @@
using namespace llvm;
=20
char PEI::ID =3D 0;
+char &llvm::PrologEpilogCodeInserterID =3D PEI::ID;
=20
INITIALIZE_PASS_BEGIN(PEI, "prologepilog",
"Prologue/Epilogue Insertion", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
+INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
INITIALIZE_PASS_END(PEI, "prologepilog",
- "Prologue/Epilogue Insertion", false, false)
+ "Prologue/Epilogue Insertion & Frame Finalization",
+ false, false)
=20
STATISTIC(NumVirtualFrameRegs, "Number of virtual frame regs encountered");
STATISTIC(NumScavengedRegs, "Number of frame index regs scavenged");
STATISTIC(NumBytesStackSpace,
"Number of bytes used for stack in all functions");
=20
-/// createPrologEpilogCodeInserter - This function returns a pass that ins=
erts
-/// prolog and epilog code, and eliminates abstract frame references.
-///
-FunctionPass *llvm::createPrologEpilogCodeInserter() { return new PEI(); }
-
/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
/// frame indexes with appropriate references.
///
@@ -71,6 +69,8 @@
const TargetRegisterInfo *TRI =3D Fn.getTarget().getRegisterInfo();
const TargetFrameLowering *TFI =3D Fn.getTarget().getFrameLowering();
=20
+ assert(!Fn.getRegInfo().getNumVirtRegs() && "Regalloc must assign all vr=
egs");
+
RS =3D TRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL;
FrameIndexVirtualScavenging =3D TRI->requiresFrameIndexScavenging(Fn);
=20
@@ -125,6 +125,9 @@
if (TRI->requiresRegisterScavenging(Fn) && FrameIndexVirtualScavenging)
scavengeFrameVirtualRegs(Fn);
=20
+ // Clear any vregs created by virtual scavenging.
+ Fn.getRegInfo().clearVirtRegs();
+
delete RS;
clearAllSets();
return true;
@@ -207,7 +210,7 @@
MachineFrameInfo *MFI =3D Fn.getFrameInfo();
=20
// Get the callee saved register list...
- const unsigned *CSRegs =3D RegInfo->getCalleeSavedRegs(&Fn);
+ const uint16_t *CSRegs =3D RegInfo->getCalleeSavedRegs(&Fn);
=20
// These are used to keep track the callee-save area. Initialize them.
MinCSFrameIndex =3D INT_MAX;
@@ -224,17 +227,9 @@
std::vector<CalleeSavedInfo> CSI;
for (unsigned i =3D 0; CSRegs[i]; ++i) {
unsigned Reg =3D CSRegs[i];
- if (Fn.getRegInfo().isPhysRegUsed(Reg)) {
+ if (Fn.getRegInfo().isPhysRegOrOverlapUsed(Reg)) {
// If the reg is modified, save it!
CSI.push_back(CalleeSavedInfo(Reg));
- } else {
- for (const unsigned *AliasSet =3D RegInfo->getAliasSet(Reg);
- *AliasSet; ++AliasSet) { // Check alias registers too.
- if (Fn.getRegInfo().isPhysRegUsed(*AliasSet)) {
- CSI.push_back(CalleeSavedInfo(Reg));
- break;
- }
- }
}
}
=20
@@ -332,7 +327,7 @@
// Skip over all terminator instructions, which are part of the retu=
rn
// sequence.
MachineBasicBlock::iterator I2 =3D I;
- while (I2 !=3D MBB->begin() && (--I2)->getDesc().isTerminator())
+ while (I2 !=3D MBB->begin() && (--I2)->isTerminator())
I =3D I2;
=20
bool AtStart =3D I =3D=3D MBB->begin();
@@ -426,11 +421,11 @@
=20
// Skip over all terminator instructions, which are part of the
// return sequence.
- if (! I->getDesc().isTerminator()) {
+ if (! I->isTerminator()) {
++I;
} else {
MachineBasicBlock::iterator I2 =3D I;
- while (I2 !=3D MBB->begin() && (--I2)->getDesc().isTerminator())
+ while (I2 !=3D MBB->begin() && (--I2)->isTerminator())
I =3D I2;
}
}
@@ -698,7 +693,7 @@
// Add epilogue to restore the callee-save registers in each exiting blo=
ck
for (MachineFunction::iterator I =3D Fn.begin(), E =3D Fn.end(); I !=3D =
E; ++I) {
// If last instruction is a return instruction, add an epilogue
- if (!I->empty() && I->back().getDesc().isReturn())
+ if (!I->empty() && I->back().isReturn())
TFI.emitEpilogue(Fn, *I);
}
=20
@@ -706,7 +701,7 @@
// we've been asked for it. This, when linked with a runtime with suppo=
rt
// for segmented stacks (libgcc is one), will result in allocating stack
// space in small chunks instead of one large contiguous block.
- if (EnableSegmentedStacks)
+ if (Fn.getTarget().Options.EnableSegmentedStacks)
TFI.adjustForSegmentedStacks(Fn);
}
=20
@@ -813,6 +808,10 @@
/// scavengeFrameVirtualRegs - Replace all frame index virtual registers
/// with physical registers. Use the register scavenger to find an
/// appropriate register to use.
+///
+/// FIXME: Iterating over the instruction stream is unnecessary. We can si=
mply
+/// iterate over the vreg use list, which at this point only contains mach=
ine
+/// operands for which eliminateFrameIndex need a new scratch reg.
void PEI::scavengeFrameVirtualRegs(MachineFunction &Fn) {
// Run through the instructions and find any virtual registers.
for (MachineFunction::iterator BB =3D Fn.begin(),
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/PrologEp=
ilogInserter.h
--- a/head/contrib/llvm/lib/CodeGen/PrologEpilogInserter.h Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/PrologEpilogInserter.h Tue Apr 17 11:51=
:51 2012 +0300
@@ -40,10 +40,6 @@
initializePEIPass(*PassRegistry::getPassRegistry());
}
=20
- const char *getPassName() const {
- return "Prolog/Epilog Insertion & Frame Finalization";
- }
-
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
=20
/// runOnMachineFunction - Insert prolog/epilog code and replace abstr=
act
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/PseudoSo=
urceValue.cpp
--- a/head/contrib/llvm/lib/CodeGen/PseudoSourceValue.cpp Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/PseudoSourceValue.cpp Tue Apr 17 11:51:=
51 2012 +0300
@@ -87,7 +87,6 @@
this =3D=3D getJumpTable())
return true;
llvm_unreachable("Unknown PseudoSourceValue!");
- return false;
}
=20
bool PseudoSourceValue::isAliased(const MachineFrameInfo *MFI) const {
@@ -97,7 +96,6 @@
this =3D=3D getJumpTable())
return false;
llvm_unreachable("Unknown PseudoSourceValue!");
- return true;
}
=20
bool PseudoSourceValue::mayAlias(const MachineFrameInfo *MFI) const {
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/RegAlloc=
Base.h
--- a/head/contrib/llvm/lib/CodeGen/RegAllocBase.h Tue Apr 17 11:36:47 2012=
+0300
+++ b/head/contrib/llvm/lib/CodeGen/RegAllocBase.h Tue Apr 17 11:51:51 2012=
+0300
@@ -49,11 +49,6 @@
class LiveIntervals;
class Spiller;
=20
-// Forward declare a priority queue of live virtual registers. If an
-// implementation needs to prioritize by anything other than spill weight,=
then
-// this will become an abstract base class with virtual calls to push/get.
-class LiveVirtRegQueue;
-
/// RegAllocBase provides the register allocation driver and interface tha=
t can
/// be extended to add interesting heuristics.
///
@@ -67,7 +62,6 @@
// registers may have changed.
unsigned UserTag;
=20
-protected:
// Array of LiveIntervalUnions indexed by physical register.
class LiveUnionArray {
unsigned NumRegs;
@@ -88,16 +82,18 @@
}
};
=20
+ LiveUnionArray PhysReg2LiveUnion;
+
+ // Current queries, one per physreg. They must be reinitialized each tim=
e we
+ // query on a new live virtual register.
+ OwningArrayPtr<LiveIntervalUnion::Query> Queries;
+
+protected:
const TargetRegisterInfo *TRI;
MachineRegisterInfo *MRI;
VirtRegMap *VRM;
LiveIntervals *LIS;
RegisterClassInfo RegClassInfo;
- LiveUnionArray PhysReg2LiveUnion;
-
- // Current queries, one per physreg. They must be reinitialized each tim=
e we
- // query on a new live virtual register.
- OwningArrayPtr<LiveIntervalUnion::Query> Queries;
=20
RegAllocBase(): UserTag(0), TRI(0), MRI(0), VRM(0), LIS(0) {}
=20
@@ -115,16 +111,17 @@
return Queries[PhysReg];
}
=20
+ // Get direct access to the underlying LiveIntervalUnion for PhysReg.
+ LiveIntervalUnion &getLiveUnion(unsigned PhysReg) {
+ return PhysReg2LiveUnion[PhysReg];
+ }
+
// Invalidate all cached information about virtual registers - live rang=
es may
// have changed.
void invalidateVirtRegs() { ++UserTag; }
=20
// The top-level driver. The output is a VirtRegMap that us updated with
// physical register assignments.
- //
- // If an implementation wants to override the LiveInterval comparator, we
- // should modify this interface to allow passing in an instance derived =
from
- // LiveVirtRegQueue.
void allocatePhysRegs();
=20
// Get a temporary reference to a Spiller instance.
@@ -160,12 +157,6 @@
/// allocation is making progress.
void unassign(LiveInterval &VirtReg, unsigned PhysReg);
=20
- // Helper for spilling all live virtual registers currently unified unde=
r preg
- // that interfere with the most recently queried lvr. Return true if sp=
illing
- // was successful, and append any new spilled/split intervals to splitLV=
Rs.
- bool spillInterferences(LiveInterval &VirtReg, unsigned PhysReg,
- SmallVectorImpl<LiveInterval*> &SplitVRegs);
-
/// addMBBLiveIns - Add physreg liveins to basic blocks.
void addMBBLiveIns(MachineFunction *);
=20
@@ -183,9 +174,6 @@
=20
private:
void seedLiveRegs();
-
- void spillReg(LiveInterval &VirtReg, unsigned PhysReg,
- SmallVectorImpl<LiveInterval*> &SplitVRegs);
};
=20
} // end namespace llvm
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/RegAlloc=
Basic.cpp
--- a/head/contrib/llvm/lib/CodeGen/RegAllocBasic.cpp Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/RegAllocBasic.cpp Tue Apr 17 11:51:51 2=
012 +0300
@@ -1,4 +1,4 @@
-//=3D=3D=3D-- RegAllocBasic.cpp - basic register allocator ---------------=
-------=3D=3D=3D//
+//=3D=3D=3D-- RegAllocBasic.cpp - Basic Register Allocator ---------------=
-------=3D=3D=3D//
//
// The LLVM Compiler Infrastructure
//
@@ -15,18 +15,15 @@
#define DEBUG_TYPE "regalloc"
#include "RegAllocBase.h"
#include "LiveDebugVariables.h"
-#include "LiveIntervalUnion.h"
-#include "LiveRangeEdit.h"
#include "RenderMachineFunction.h"
#include "Spiller.h"
#include "VirtRegMap.h"
-#include "llvm/ADT/OwningPtr.h"
-#include "llvm/ADT/Statistic.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Function.h"
#include "llvm/PassAnalysisSupport.h"
#include "llvm/CodeGen/CalcSpillWeights.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
+#include "llvm/CodeGen/LiveRangeEdit.h"
#include "llvm/CodeGen/LiveStackAnalysis.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
@@ -37,35 +34,17 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetRegisterInfo.h"
-#ifndef NDEBUG
-#include "llvm/ADT/SparseBitVector.h"
-#endif
#include "llvm/Support/Debug.h"
-#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
-#include "llvm/Support/Timer.h"
=20
#include <cstdlib>
#include <queue>
=20
using namespace llvm;
=20
-STATISTIC(NumAssigned , "Number of registers assigned");
-STATISTIC(NumUnassigned , "Number of registers unassigned");
-STATISTIC(NumNewQueued , "Number of new live ranges queued");
-
static RegisterRegAlloc basicRegAlloc("basic", "basic register allocator",
createBasicRegisterAllocator);
=20
-// Temporary verification option until we can put verification inside
-// MachineVerifier.
-static cl::opt<bool, true>
-VerifyRegAlloc("verify-regalloc", cl::location(RegAllocBase::VerifyEnabled=
),
- cl::desc("Verify during register allocation"));
-
-const char *RegAllocBase::TimerGroupName =3D "Register Allocation";
-bool RegAllocBase::VerifyEnabled =3D false;
-
namespace {
struct CompSpillWeight {
bool operator()(LiveInterval *A, LiveInterval *B) const {
@@ -93,6 +72,11 @@
std::auto_ptr<Spiller> SpillerInstance;
std::priority_queue<LiveInterval*, std::vector<LiveInterval*>,
CompSpillWeight> Queue;
+
+ // Scratch space. Allocated here to avoid repeated malloc calls in
+ // selectOrSplit().
+ BitVector UsableRegs;
+
public:
RABasic();
=20
@@ -128,6 +112,15 @@
/// Perform register allocation.
virtual bool runOnMachineFunction(MachineFunction &mf);
=20
+ // Helper for spilling all live virtual registers currently unified unde=
r preg
+ // that interfere with the most recently queried lvr. Return true if sp=
illing
+ // was successful, and append any new spilled/split intervals to splitLV=
Rs.
+ bool spillInterferences(LiveInterval &VirtReg, unsigned PhysReg,
+ SmallVectorImpl<LiveInterval*> &SplitVRegs);
+
+ void spillReg(LiveInterval &VirtReg, unsigned PhysReg,
+ SmallVectorImpl<LiveInterval*> &SplitVRegs);
+
static char ID;
};
=20
@@ -139,8 +132,8 @@
initializeLiveDebugVariablesPass(*PassRegistry::getPassRegistry());
initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
- initializeStrongPHIEliminationPass(*PassRegistry::getPassRegistry());
initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry());
+ initializeMachineSchedulerPass(*PassRegistry::getPassRegistry());
initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
initializeLiveStacksPass(*PassRegistry::getPassRegistry());
initializeMachineDominatorTreePass(*PassRegistry::getPassRegistry());
@@ -157,9 +150,6 @@
AU.addPreserved<SlotIndexes>();
AU.addRequired<LiveDebugVariables>();
AU.addPreserved<LiveDebugVariables>();
- if (StrongPHIElim)
- AU.addRequiredID(StrongPHIEliminationID);
- AU.addRequiredTransitiveID(RegisterCoalescerPassID);
AU.addRequired<CalculateSpillWeights>();
AU.addRequired<LiveStacks>();
AU.addPreserved<LiveStacks>();
@@ -178,204 +168,10 @@
RegAllocBase::releaseMemory();
}
=20
-#ifndef NDEBUG
-// Verify each LiveIntervalUnion.
-void RegAllocBase::verify() {
- LiveVirtRegBitSet VisitedVRegs;
- OwningArrayPtr<LiveVirtRegBitSet>
- unionVRegs(new LiveVirtRegBitSet[PhysReg2LiveUnion.numRegs()]);
-
- // Verify disjoint unions.
- for (unsigned PhysReg =3D 0; PhysReg < PhysReg2LiveUnion.numRegs(); ++Ph=
ysReg) {
- DEBUG(PhysReg2LiveUnion[PhysReg].print(dbgs(), TRI));
- LiveVirtRegBitSet &VRegs =3D unionVRegs[PhysReg];
- PhysReg2LiveUnion[PhysReg].verify(VRegs);
- // Union + intersection test could be done efficiently in one pass, but
- // don't add a method to SparseBitVector unless we really need it.
- assert(!VisitedVRegs.intersects(VRegs) && "vreg in multiple unions");
- VisitedVRegs |=3D VRegs;
- }
-
- // Verify vreg coverage.
- for (LiveIntervals::iterator liItr =3D LIS->begin(), liEnd =3D LIS->end(=
);
- liItr !=3D liEnd; ++liItr) {
- unsigned reg =3D liItr->first;
- if (TargetRegisterInfo::isPhysicalRegister(reg)) continue;
- if (!VRM->hasPhys(reg)) continue; // spilled?
- unsigned PhysReg =3D VRM->getPhys(reg);
- if (!unionVRegs[PhysReg].test(reg)) {
- dbgs() << "LiveVirtReg " << reg << " not in union " <<
- TRI->getName(PhysReg) << "\n";
- llvm_unreachable("unallocated live vreg");
- }
- }
- // FIXME: I'm not sure how to verify spilled intervals.
-}
-#endif //!NDEBUG
-
-//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
-// RegAllocBase Implementation
-//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
-
-// Instantiate a LiveIntervalUnion for each physical register.
-void RegAllocBase::LiveUnionArray::init(LiveIntervalUnion::Allocator &allo=
cator,
- unsigned NRegs) {
- NumRegs =3D NRegs;
- Array =3D
- static_cast<LiveIntervalUnion*>(malloc(sizeof(LiveIntervalUnion)*NRegs=
));
- for (unsigned r =3D 0; r !=3D NRegs; ++r)
- new(Array + r) LiveIntervalUnion(r, allocator);
-}
-
-void RegAllocBase::init(VirtRegMap &vrm, LiveIntervals &lis) {
- NamedRegionTimer T("Initialize", TimerGroupName, TimePassesIsEnabled);
- TRI =3D &vrm.getTargetRegInfo();
- MRI =3D &vrm.getRegInfo();
- VRM =3D &vrm;
- LIS =3D &lis;
- RegClassInfo.runOnMachineFunction(vrm.getMachineFunction());
-
- const unsigned NumRegs =3D TRI->getNumRegs();
- if (NumRegs !=3D PhysReg2LiveUnion.numRegs()) {
- PhysReg2LiveUnion.init(UnionAllocator, NumRegs);
- // Cache an interferece query for each physical reg
- Queries.reset(new LiveIntervalUnion::Query[PhysReg2LiveUnion.numRegs()=
]);
- }
-}
-
-void RegAllocBase::LiveUnionArray::clear() {
- if (!Array)
- return;
- for (unsigned r =3D 0; r !=3D NumRegs; ++r)
- Array[r].~LiveIntervalUnion();
- free(Array);
- NumRegs =3D 0;
- Array =3D 0;
-}
-
-void RegAllocBase::releaseMemory() {
- for (unsigned r =3D 0, e =3D PhysReg2LiveUnion.numRegs(); r !=3D e; ++r)
- PhysReg2LiveUnion[r].clear();
-}
-
-// Visit all the live registers. If they are already assigned to a physical
-// register, unify them with the corresponding LiveIntervalUnion, otherwis=
e push
-// them on the priority queue for later assignment.
-void RegAllocBase::seedLiveRegs() {
- NamedRegionTimer T("Seed Live Regs", TimerGroupName, TimePassesIsEnabled=
);
- for (LiveIntervals::iterator I =3D LIS->begin(), E =3D LIS->end(); I !=
=3D E; ++I) {
- unsigned RegNum =3D I->first;
- LiveInterval &VirtReg =3D *I->second;
- if (TargetRegisterInfo::isPhysicalRegister(RegNum))
- PhysReg2LiveUnion[RegNum].unify(VirtReg);
- else
- enqueue(&VirtReg);
- }
-}
-
-void RegAllocBase::assign(LiveInterval &VirtReg, unsigned PhysReg) {
- DEBUG(dbgs() << "assigning " << PrintReg(VirtReg.reg, TRI)
- << " to " << PrintReg(PhysReg, TRI) << '\n');
- assert(!VRM->hasPhys(VirtReg.reg) && "Duplicate VirtReg assignment");
- VRM->assignVirt2Phys(VirtReg.reg, PhysReg);
- MRI->setPhysRegUsed(PhysReg);
- PhysReg2LiveUnion[PhysReg].unify(VirtReg);
- ++NumAssigned;
-}
-
-void RegAllocBase::unassign(LiveInterval &VirtReg, unsigned PhysReg) {
- DEBUG(dbgs() << "unassigning " << PrintReg(VirtReg.reg, TRI)
- << " from " << PrintReg(PhysReg, TRI) << '\n');
- assert(VRM->getPhys(VirtReg.reg) =3D=3D PhysReg && "Inconsistent unassig=
n");
- PhysReg2LiveUnion[PhysReg].extract(VirtReg);
- VRM->clearVirt(VirtReg.reg);
- ++NumUnassigned;
-}
-
-// Top-level driver to manage the queue of unassigned VirtRegs and call the
-// selectOrSplit implementation.
-void RegAllocBase::allocatePhysRegs() {
- seedLiveRegs();
-
- // Continue assigning vregs one at a time to available physical register=
s.
- while (LiveInterval *VirtReg =3D dequeue()) {
- assert(!VRM->hasPhys(VirtReg->reg) && "Register already assigned");
-
- // Unused registers can appear when the spiller coalesces snippets.
- if (MRI->reg_nodbg_empty(VirtReg->reg)) {
- DEBUG(dbgs() << "Dropping unused " << *VirtReg << '\n');
- LIS->removeInterval(VirtReg->reg);
- continue;
- }
-
- // Invalidate all interference queries, live ranges could have changed.
- invalidateVirtRegs();
-
- // selectOrSplit requests the allocator to return an available physical
- // register if possible and populate a list of new live intervals that
- // result from splitting.
- DEBUG(dbgs() << "\nselectOrSplit "
- << MRI->getRegClass(VirtReg->reg)->getName()
- << ':' << *VirtReg << '\n');
- typedef SmallVector<LiveInterval*, 4> VirtRegVec;
- VirtRegVec SplitVRegs;
- unsigned AvailablePhysReg =3D selectOrSplit(*VirtReg, SplitVRegs);
-
- if (AvailablePhysReg =3D=3D ~0u) {
- // selectOrSplit failed to find a register!
- const char *Msg =3D "ran out of registers during register allocation=
";
- // Probably caused by an inline asm.
- MachineInstr *MI;
- for (MachineRegisterInfo::reg_iterator I =3D MRI->reg_begin(VirtReg-=
>reg);
- (MI =3D I.skipInstruction());)
- if (MI->isInlineAsm())
- break;
- if (MI)
- MI->emitError(Msg);
- else
- report_fatal_error(Msg);
- // Keep going after reporting the error.
- VRM->assignVirt2Phys(VirtReg->reg,
- RegClassInfo.getOrder(MRI->getRegClass(VirtReg->reg)).fro=
nt());
- continue;
- }
-
- if (AvailablePhysReg)
- assign(*VirtReg, AvailablePhysReg);
-
- for (VirtRegVec::iterator I =3D SplitVRegs.begin(), E =3D SplitVRegs.e=
nd();
- I !=3D E; ++I) {
- LiveInterval *SplitVirtReg =3D *I;
- assert(!VRM->hasPhys(SplitVirtReg->reg) && "Register already assigne=
d");
- if (MRI->reg_nodbg_empty(SplitVirtReg->reg)) {
- DEBUG(dbgs() << "not queueing unused " << *SplitVirtReg << '\n');
- LIS->removeInterval(SplitVirtReg->reg);
- continue;
- }
- DEBUG(dbgs() << "queuing new interval: " << *SplitVirtReg << "\n");
- assert(TargetRegisterInfo::isVirtualRegister(SplitVirtReg->reg) &&
- "expect split value in virtual register");
- enqueue(SplitVirtReg);
- ++NumNewQueued;
- }
- }
-}
-
-// Check if this live virtual register interferes with a physical register=
. If
-// not, then check for interference on each register that aliases with the
-// physical register. Return the interfering register.
-unsigned RegAllocBase::checkPhysRegInterference(LiveInterval &VirtReg,
- unsigned PhysReg) {
- for (const unsigned *AliasI =3D TRI->getOverlaps(PhysReg); *AliasI; ++Al=
iasI)
- if (query(VirtReg, *AliasI).checkInterference())
- return *AliasI;
- return 0;
-}
-
-// Helper for spillInteferences() that spills all interfering vregs curren=
tly
+// Helper for spillInterferences() that spills all interfering vregs curre=
ntly
// assigned to this physical register.
-void RegAllocBase::spillReg(LiveInterval& VirtReg, unsigned PhysReg,
- SmallVectorImpl<LiveInterval*> &SplitVRegs) {
+void RABasic::spillReg(LiveInterval& VirtReg, unsigned PhysReg,
+ SmallVectorImpl<LiveInterval*> &SplitVRegs) {
LiveIntervalUnion::Query &Q =3D query(VirtReg, PhysReg);
assert(Q.seenAllInterferences() && "need collectInterferences()");
const SmallVectorImpl<LiveInterval*> &PendingSpills =3D Q.interferingVRe=
gs();
@@ -391,7 +187,7 @@
unassign(SpilledVReg, PhysReg);
=20
// Spill the extracted interval.
- LiveRangeEdit LRE(SpilledVReg, SplitVRegs, 0, &PendingSpills);
+ LiveRangeEdit LRE(SpilledVReg, SplitVRegs, *MF, *LIS, VRM);
spiller().spill(LRE);
}
// After extracting segments, the query's results are invalid. But keep =
the
@@ -402,14 +198,13 @@
// Spill or split all live virtual registers currently unified under PhysR=
eg
// that interfere with VirtReg. The newly spilled or split live intervals =
are
// returned by appending them to SplitVRegs.
-bool
-RegAllocBase::spillInterferences(LiveInterval &VirtReg, unsigned PhysReg,
+bool RABasic::spillInterferences(LiveInterval &VirtReg, unsigned PhysReg,
SmallVectorImpl<LiveInterval*> &SplitVReg=
s) {
// Record each interference and determine if all are spillable before mu=
tating
// either the union or live intervals.
unsigned NumInterferences =3D 0;
// Collect interferences assigned to any alias of the physical register.
- for (const unsigned *asI =3D TRI->getOverlaps(PhysReg); *asI; ++asI) {
+ for (const uint16_t *asI =3D TRI->getOverlaps(PhysReg); *asI; ++asI) {
LiveIntervalUnion::Query &QAlias =3D query(VirtReg, *asI);
NumInterferences +=3D QAlias.collectInterferingVRegs();
if (QAlias.seenUnspillableVReg()) {
@@ -421,52 +216,11 @@
assert(NumInterferences > 0 && "expect interference");
=20
// Spill each interfering vreg allocated to PhysReg or an alias.
- for (const unsigned *AliasI =3D TRI->getOverlaps(PhysReg); *AliasI; ++Al=
iasI)
+ for (const uint16_t *AliasI =3D TRI->getOverlaps(PhysReg); *AliasI; ++Al=
iasI)
spillReg(VirtReg, *AliasI, SplitVRegs);
return true;
}
=20
-// Add newly allocated physical registers to the MBB live in sets.
-void RegAllocBase::addMBBLiveIns(MachineFunction *MF) {
- NamedRegionTimer T("MBB Live Ins", TimerGroupName, TimePassesIsEnabled);
- SlotIndexes *Indexes =3D LIS->getSlotIndexes();
- if (MF->size() <=3D 1)
- return;
-
- LiveIntervalUnion::SegmentIter SI;
- for (unsigned PhysReg =3D 0; PhysReg < PhysReg2LiveUnion.numRegs(); ++Ph=
ysReg) {
- LiveIntervalUnion &LiveUnion =3D PhysReg2LiveUnion[PhysReg];
- if (LiveUnion.empty())
- continue;
- DEBUG(dbgs() << PrintReg(PhysReg, TRI) << " live-in:");
- MachineFunction::iterator MBB =3D llvm::next(MF->begin());
- MachineFunction::iterator MFE =3D MF->end();
- SlotIndex Start, Stop;
- tie(Start, Stop) =3D Indexes->getMBBRange(MBB);
- SI.setMap(LiveUnion.getMap());
- SI.find(Start);
- while (SI.valid()) {
- if (SI.start() <=3D Start) {
- if (!MBB->isLiveIn(PhysReg))
- MBB->addLiveIn(PhysReg);
- DEBUG(dbgs() << "\tBB#" << MBB->getNumber() << ':'
- << PrintReg(SI.value()->reg, TRI));
- } else if (SI.start() > Stop)
- MBB =3D Indexes->getMBBFromIndex(SI.start().getPrevIndex());
- if (++MBB =3D=3D MFE)
- break;
- tie(Start, Stop) =3D Indexes->getMBBRange(MBB);
- SI.advanceTo(Start);
- }
- DEBUG(dbgs() << '\n');
- }
-}
-
-
-//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
-// RABasic Implementation
-//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
-
// Driver for the register assignment and splitting heuristics.
// Manages iteration over the LiveIntervalUnions.
//
@@ -481,6 +235,10 @@
// selectOrSplit().
unsigned RABasic::selectOrSplit(LiveInterval &VirtReg,
SmallVectorImpl<LiveInterval*> &SplitVRegs=
) {
+ // Check for register mask interference. When live ranges cross calls, =
the
+ // set of usable registers is reduced to the callee-saved ones.
+ bool CrossRegMasks =3D LIS->checkRegMaskInterference(VirtReg, UsableRegs=
);
+
// Populate a list of physical register spill candidates.
SmallVector<unsigned, 8> PhysRegSpillCands;
=20
@@ -491,6 +249,11 @@
++I) {
unsigned PhysReg =3D *I;
=20
+ // If PhysReg is clobbered by a register mask, it isn't useful for
+ // allocation or spilling.
+ if (CrossRegMasks && !UsableRegs.test(PhysReg))
+ continue;
+
// Check interference and as a side effect, intialize queries for this
// VirtReg and its aliases.
unsigned interfReg =3D checkPhysRegInterference(VirtReg, PhysReg);
@@ -498,9 +261,9 @@
// Found an available register.
return PhysReg;
}
- Queries[interfReg].collectInterferingVRegs(1);
- LiveInterval *interferingVirtReg =3D
- Queries[interfReg].interferingVRegs().front();
+ LiveIntervalUnion::Query &IntfQ =3D query(VirtReg, interfReg);
+ IntfQ.collectInterferingVRegs(1);
+ LiveInterval *interferingVirtReg =3D IntfQ.interferingVRegs().front();
=20
// The current VirtReg must either be spillable, or one of its interfe=
rences
// must have less spill weight.
@@ -524,7 +287,7 @@
DEBUG(dbgs() << "spilling: " << VirtReg << '\n');
if (!VirtReg.isSpillable())
return ~0u;
- LiveRangeEdit LRE(VirtReg, SplitVRegs);
+ LiveRangeEdit LRE(VirtReg, SplitVRegs, *MF, *LIS, VRM);
spiller().spill(LRE);
=20
// The live virtual register requesting allocation was spilled, so tell
@@ -579,7 +342,10 @@
// Write out new DBG_VALUE instructions.
getAnalysis<LiveDebugVariables>().emitDebugValues(VRM);
=20
- // The pass output is in VirtRegMap. Release all the transient data.
+ // All machine operands and other references to virtual registers have b=
een
+ // replaced. Remove the virtual registers and release all the transient =
data.
+ VRM->clearAllVirt();
+ MRI->clearVirtRegs();
releaseMemory();
=20
return true;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/RegAlloc=
Fast.cpp
--- a/head/contrib/llvm/lib/CodeGen/RegAllocFast.cpp Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/lib/CodeGen/RegAllocFast.cpp Tue Apr 17 11:51:51 20=
12 +0300
@@ -32,6 +32,7 @@
#include "llvm/ADT/IndexedMap.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/SparseSet.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h"
#include <algorithm>
@@ -49,10 +50,7 @@
public:
static char ID;
RAFast() : MachineFunctionPass(ID), StackSlotForVirtReg(-1),
- isBulkSpilling(false) {
- initializePHIEliminationPass(*PassRegistry::getPassRegistry());
- initializeTwoAddressInstructionPassPass(*PassRegistry::getPassRegist=
ry());
- }
+ isBulkSpilling(false) {}
private:
const TargetMachine *TM;
MachineFunction *MF;
@@ -71,16 +69,20 @@
// Everything we know about a live virtual register.
struct LiveReg {
MachineInstr *LastUse; // Last instr to use reg.
+ unsigned VirtReg; // Virtual register number.
unsigned PhysReg; // Currently held here.
unsigned short LastOpNum; // OpNum on LastUse.
bool Dirty; // Register needs spill.
=20
- LiveReg(unsigned p=3D0) : LastUse(0), PhysReg(p), LastOpNum(0),
- Dirty(false) {}
+ explicit LiveReg(unsigned v)
+ : LastUse(0), VirtReg(v), PhysReg(0), LastOpNum(0), Dirty(false) {}
+
+ unsigned getSparseSetKey() const {
+ return TargetRegisterInfo::virtReg2Index(VirtReg);
+ }
};
=20
- typedef DenseMap<unsigned, LiveReg> LiveRegMap;
- typedef LiveRegMap::value_type LiveRegEntry;
+ typedef SparseSet<LiveReg> LiveRegMap;
=20
// LiveVirtRegs - This map contains entries for each virtual register
// that is currently available in a physical register.
@@ -137,8 +139,6 @@
=20
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
- AU.addRequiredID(PHIEliminationID);
- AU.addRequiredID(TwoAddressInstructionPassID);
MachineFunctionPass::getAnalysisUsage(AU);
}
=20
@@ -159,14 +159,23 @@
void usePhysReg(MachineOperand&);
void definePhysReg(MachineInstr *MI, unsigned PhysReg, RegState NewSta=
te);
unsigned calcSpillCost(unsigned PhysReg) const;
- void assignVirtToPhysReg(LiveRegEntry &LRE, unsigned PhysReg);
- void allocVirtReg(MachineInstr *MI, LiveRegEntry &LRE, unsigned Hint);
+ void assignVirtToPhysReg(LiveReg&, unsigned PhysReg);
+ LiveRegMap::iterator findLiveVirtReg(unsigned VirtReg) {
+ return LiveVirtRegs.find(TargetRegisterInfo::virtReg2Index(VirtReg));
+ }
+ LiveRegMap::const_iterator findLiveVirtReg(unsigned VirtReg) const {
+ return LiveVirtRegs.find(TargetRegisterInfo::virtReg2Index(VirtReg));
+ }
+ LiveRegMap::iterator assignVirtToPhysReg(unsigned VReg, unsigned PhysR=
eg);
+ LiveRegMap::iterator allocVirtReg(MachineInstr *MI, LiveRegMap::iterat=
or,
+ unsigned Hint);
LiveRegMap::iterator defineVirtReg(MachineInstr *MI, unsigned OpNum,
unsigned VirtReg, unsigned Hint);
LiveRegMap::iterator reloadVirtReg(MachineInstr *MI, unsigned OpNum,
unsigned VirtReg, unsigned Hint);
void spillAll(MachineInstr *MI);
bool setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg);
+ void addRetOperands(MachineBasicBlock *MBB);
};
char RAFast::ID =3D 0;
}
@@ -222,10 +231,10 @@
=20
/// killVirtReg - Mark virtreg as no longer available.
void RAFast::killVirtReg(LiveRegMap::iterator LRI) {
- addKillFlag(LRI->second);
- const LiveReg &LR =3D LRI->second;
- assert(PhysRegState[LR.PhysReg] =3D=3D LRI->first && "Broken RegState ma=
pping");
- PhysRegState[LR.PhysReg] =3D regFree;
+ addKillFlag(*LRI);
+ assert(PhysRegState[LRI->PhysReg] =3D=3D LRI->VirtReg &&
+ "Broken RegState mapping");
+ PhysRegState[LRI->PhysReg] =3D regFree;
// Erase from LiveVirtRegs unless we're spilling in bulk.
if (!isBulkSpilling)
LiveVirtRegs.erase(LRI);
@@ -235,7 +244,7 @@
void RAFast::killVirtReg(unsigned VirtReg) {
assert(TargetRegisterInfo::isVirtualRegister(VirtReg) &&
"killVirtReg needs a virtual register");
- LiveRegMap::iterator LRI =3D LiveVirtRegs.find(VirtReg);
+ LiveRegMap::iterator LRI =3D findLiveVirtReg(VirtReg);
if (LRI !=3D LiveVirtRegs.end())
killVirtReg(LRI);
}
@@ -245,7 +254,7 @@
void RAFast::spillVirtReg(MachineBasicBlock::iterator MI, unsigned VirtReg=
) {
assert(TargetRegisterInfo::isVirtualRegister(VirtReg) &&
"Spilling a physical register is illegal!");
- LiveRegMap::iterator LRI =3D LiveVirtRegs.find(VirtReg);
+ LiveRegMap::iterator LRI =3D findLiveVirtReg(VirtReg);
assert(LRI !=3D LiveVirtRegs.end() && "Spilling unmapped virtual registe=
r");
spillVirtReg(MI, LRI);
}
@@ -253,18 +262,18 @@
/// spillVirtReg - Do the actual work of spilling.
void RAFast::spillVirtReg(MachineBasicBlock::iterator MI,
LiveRegMap::iterator LRI) {
- LiveReg &LR =3D LRI->second;
- assert(PhysRegState[LR.PhysReg] =3D=3D LRI->first && "Broken RegState ma=
pping");
+ LiveReg &LR =3D *LRI;
+ assert(PhysRegState[LR.PhysReg] =3D=3D LRI->VirtReg && "Broken RegState =
mapping");
=20
if (LR.Dirty) {
// If this physreg is used by the instruction, we want to kill it on t=
he
// instruction, not on the spill.
bool SpillKill =3D LR.LastUse !=3D MI;
LR.Dirty =3D false;
- DEBUG(dbgs() << "Spilling " << PrintReg(LRI->first, TRI)
+ DEBUG(dbgs() << "Spilling " << PrintReg(LRI->VirtReg, TRI)
<< " in " << PrintReg(LR.PhysReg, TRI));
- const TargetRegisterClass *RC =3D MRI->getRegClass(LRI->first);
- int FI =3D getStackSpaceFor(LRI->first, RC);
+ const TargetRegisterClass *RC =3D MRI->getRegClass(LRI->VirtReg);
+ int FI =3D getStackSpaceFor(LRI->VirtReg, RC);
DEBUG(dbgs() << " to stack slot #" << FI << "\n");
TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI);
++NumStores; // Update statistics
@@ -272,7 +281,8 @@
// If this register is used by DBG_VALUE then insert new DBG_VALUE to
// identify spilled location as the place to find corresponding variab=
le's
// value.
- SmallVector<MachineInstr *, 4> &LRIDbgValues =3D LiveDbgValueMap[LRI->=
first];
+ SmallVector<MachineInstr *, 4> &LRIDbgValues =3D
+ LiveDbgValueMap[LRI->VirtReg];
for (unsigned li =3D 0, le =3D LRIDbgValues.size(); li !=3D le; ++li) {
MachineInstr *DBG =3D LRIDbgValues[li];
const MDNode *MDPtr =3D
@@ -295,8 +305,9 @@
DEBUG(dbgs() << "Inserting debug info due to spill:" << "\n" << *N=
ewDV);
}
}
- // Now this register is spilled there is should not be any DBG_VALUE p=
ointing
- // to this register because they are all pointing to spilled value now.
+ // Now this register is spilled there is should not be any DBG_VALUE
+ // pointing to this register because they are all pointing to spilled =
value
+ // now.
LRIDbgValues.clear();
if (SpillKill)
LR.LastUse =3D 0; // Don't kill register again
@@ -343,7 +354,7 @@
}
=20
// Maybe a superregister is reserved?
- for (const unsigned *AS =3D TRI->getAliasSet(PhysReg);
+ for (const uint16_t *AS =3D TRI->getAliasSet(PhysReg);
unsigned Alias =3D *AS; ++AS) {
switch (PhysRegState[Alias]) {
case regDisabled:
@@ -397,7 +408,7 @@
=20
// This is a disabled register, disable all aliases.
PhysRegState[PhysReg] =3D NewState;
- for (const unsigned *AS =3D TRI->getAliasSet(PhysReg);
+ for (const uint16_t *AS =3D TRI->getAliasSet(PhysReg);
unsigned Alias =3D *AS; ++AS) {
switch (unsigned VirtReg =3D PhysRegState[Alias]) {
case regDisabled:
@@ -435,14 +446,17 @@
DEBUG(dbgs() << PrintReg(VirtReg, TRI) << " corresponding "
<< PrintReg(PhysReg, TRI) << " is reserved already.\n");
return spillImpossible;
- default:
- return LiveVirtRegs.lookup(VirtReg).Dirty ? spillDirty : spillClean;
+ default: {
+ LiveRegMap::const_iterator I =3D findLiveVirtReg(VirtReg);
+ assert(I !=3D LiveVirtRegs.end() && "Missing VirtReg entry");
+ return I->Dirty ? spillDirty : spillClean;
+ }
}
=20
// This is a disabled register, add up cost of aliases.
DEBUG(dbgs() << PrintReg(PhysReg, TRI) << " is disabled.\n");
unsigned Cost =3D 0;
- for (const unsigned *AS =3D TRI->getAliasSet(PhysReg);
+ for (const uint16_t *AS =3D TRI->getAliasSet(PhysReg);
unsigned Alias =3D *AS; ++AS) {
if (UsedInInstr.test(Alias))
return spillImpossible;
@@ -454,10 +468,13 @@
break;
case regReserved:
return spillImpossible;
- default:
- Cost +=3D LiveVirtRegs.lookup(VirtReg).Dirty ? spillDirty : spillCle=
an;
+ default: {
+ LiveRegMap::const_iterator I =3D findLiveVirtReg(VirtReg);
+ assert(I !=3D LiveVirtRegs.end() && "Missing VirtReg entry");
+ Cost +=3D I->Dirty ? spillDirty : spillClean;
break;
}
+ }
}
return Cost;
}
@@ -467,17 +484,27 @@
/// that PhysReg is the proper container for VirtReg now. The physical
/// register must not be used for anything else when this is called.
///
-void RAFast::assignVirtToPhysReg(LiveRegEntry &LRE, unsigned PhysReg) {
- DEBUG(dbgs() << "Assigning " << PrintReg(LRE.first, TRI) << " to "
+void RAFast::assignVirtToPhysReg(LiveReg &LR, unsigned PhysReg) {
+ DEBUG(dbgs() << "Assigning " << PrintReg(LR.VirtReg, TRI) << " to "
<< PrintReg(PhysReg, TRI) << "\n");
- PhysRegState[PhysReg] =3D LRE.first;
- assert(!LRE.second.PhysReg && "Already assigned a physreg");
- LRE.second.PhysReg =3D PhysReg;
+ PhysRegState[PhysReg] =3D LR.VirtReg;
+ assert(!LR.PhysReg && "Already assigned a physreg");
+ LR.PhysReg =3D PhysReg;
+}
+
+RAFast::LiveRegMap::iterator
+RAFast::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
+ LiveRegMap::iterator LRI =3D findLiveVirtReg(VirtReg);
+ assert(LRI !=3D LiveVirtRegs.end() && "VirtReg disappeared");
+ assignVirtToPhysReg(*LRI, PhysReg);
+ return LRI;
}
=20
/// allocVirtReg - Allocate a physical register for VirtReg.
-void RAFast::allocVirtReg(MachineInstr *MI, LiveRegEntry &LRE, unsigned Hi=
nt) {
- const unsigned VirtReg =3D LRE.first;
+RAFast::LiveRegMap::iterator RAFast::allocVirtReg(MachineInstr *MI,
+ LiveRegMap::iterator LRI,
+ unsigned Hint) {
+ const unsigned VirtReg =3D LRI->VirtReg;
=20
assert(TargetRegisterInfo::isVirtualRegister(VirtReg) &&
"Can only allocate virtual registers");
@@ -496,7 +523,9 @@
if (Cost < spillDirty) {
if (Cost)
definePhysReg(MI, Hint, regFree);
- return assignVirtToPhysReg(LRE, Hint);
+ // definePhysReg may kill virtual registers and modify LiveVirtRegs.
+ // That invalidates LRI, so run a new lookup for VirtReg.
+ return assignVirtToPhysReg(VirtReg, Hint);
}
}
=20
@@ -505,8 +534,10 @@
// First try to find a completely free register.
for (ArrayRef<unsigned>::iterator I =3D AO.begin(), E =3D AO.end(); I !=
=3D E; ++I) {
unsigned PhysReg =3D *I;
- if (PhysRegState[PhysReg] =3D=3D regFree && !UsedInInstr.test(PhysReg))
- return assignVirtToPhysReg(LRE, PhysReg);
+ if (PhysRegState[PhysReg] =3D=3D regFree && !UsedInInstr.test(PhysReg)=
) {
+ assignVirtToPhysReg(*LRI, PhysReg);
+ return LRI;
+ }
}
=20
DEBUG(dbgs() << "Allocating " << PrintReg(VirtReg) << " from "
@@ -519,21 +550,25 @@
DEBUG(dbgs() << "\tCost: " << Cost << "\n");
DEBUG(dbgs() << "\tBestCost: " << BestCost << "\n");
// Cost is 0 when all aliases are already disabled.
- if (Cost =3D=3D 0)
- return assignVirtToPhysReg(LRE, *I);
+ if (Cost =3D=3D 0) {
+ assignVirtToPhysReg(*LRI, *I);
+ return LRI;
+ }
if (Cost < BestCost)
BestReg =3D *I, BestCost =3D Cost;
}
=20
if (BestReg) {
definePhysReg(MI, BestReg, regFree);
- return assignVirtToPhysReg(LRE, BestReg);
+ // definePhysReg may kill virtual registers and modify LiveVirtRegs.
+ // That invalidates LRI, so run a new lookup for VirtReg.
+ return assignVirtToPhysReg(VirtReg, BestReg);
}
=20
// Nothing we can do. Report an error and keep going with a bad allocati=
on.
MI->emitError("ran out of registers during register allocation");
definePhysReg(MI, *AO.begin(), regFree);
- assignVirtToPhysReg(LRE, *AO.begin());
+ return assignVirtToPhysReg(VirtReg, *AO.begin());
}
=20
/// defineVirtReg - Allocate a register for VirtReg and mark it as dirty.
@@ -544,8 +579,7 @@
"Not a virtual register");
LiveRegMap::iterator LRI;
bool New;
- tie(LRI, New) =3D LiveVirtRegs.insert(std::make_pair(VirtReg, LiveReg())=
);
- LiveReg &LR =3D LRI->second;
+ tie(LRI, New) =3D LiveVirtRegs.insert(LiveReg(VirtReg));
if (New) {
// If there is no hint, peek at the only use of this register.
if ((!Hint || !TargetRegisterInfo::isPhysicalRegister(Hint)) &&
@@ -555,18 +589,18 @@
if (UseMI.isCopyLike())
Hint =3D UseMI.getOperand(0).getReg();
}
- allocVirtReg(MI, *LRI, Hint);
- } else if (LR.LastUse) {
+ LRI =3D allocVirtReg(MI, LRI, Hint);
+ } else if (LRI->LastUse) {
// Redefining a live register - kill at the last use, unless it is this
// instruction defining VirtReg multiple times.
- if (LR.LastUse !=3D MI || LR.LastUse->getOperand(LR.LastOpNum).isUse())
- addKillFlag(LR);
+ if (LRI->LastUse !=3D MI || LRI->LastUse->getOperand(LRI->LastOpNum).i=
sUse())
+ addKillFlag(*LRI);
}
- assert(LR.PhysReg && "Register not assigned");
- LR.LastUse =3D MI;
- LR.LastOpNum =3D OpNum;
- LR.Dirty =3D true;
- UsedInInstr.set(LR.PhysReg);
+ assert(LRI->PhysReg && "Register not assigned");
+ LRI->LastUse =3D MI;
+ LRI->LastOpNum =3D OpNum;
+ LRI->Dirty =3D true;
+ UsedInInstr.set(LRI->PhysReg);
return LRI;
}
=20
@@ -578,18 +612,17 @@
"Not a virtual register");
LiveRegMap::iterator LRI;
bool New;
- tie(LRI, New) =3D LiveVirtRegs.insert(std::make_pair(VirtReg, LiveReg())=
);
- LiveReg &LR =3D LRI->second;
+ tie(LRI, New) =3D LiveVirtRegs.insert(LiveReg(VirtReg));
MachineOperand &MO =3D MI->getOperand(OpNum);
if (New) {
- allocVirtReg(MI, *LRI, Hint);
+ LRI =3D allocVirtReg(MI, LRI, Hint);
const TargetRegisterClass *RC =3D MRI->getRegClass(VirtReg);
int FrameIndex =3D getStackSpaceFor(VirtReg, RC);
DEBUG(dbgs() << "Reloading " << PrintReg(VirtReg, TRI) << " into "
- << PrintReg(LR.PhysReg, TRI) << "\n");
- TII->loadRegFromStackSlot(*MBB, MI, LR.PhysReg, FrameIndex, RC, TRI);
+ << PrintReg(LRI->PhysReg, TRI) << "\n");
+ TII->loadRegFromStackSlot(*MBB, MI, LRI->PhysReg, FrameIndex, RC, TRI);
++NumLoads;
- } else if (LR.Dirty) {
+ } else if (LRI->Dirty) {
if (isLastUseOfLocalReg(MO)) {
DEBUG(dbgs() << "Killing last use: " << MO << "\n");
if (MO.isUse())
@@ -614,10 +647,10 @@
DEBUG(dbgs() << "Clearing clean dead: " << MO << "\n");
MO.setIsDead(false);
}
- assert(LR.PhysReg && "Register not assigned");
- LR.LastUse =3D MI;
- LR.LastOpNum =3D OpNum;
- UsedInInstr.set(LR.PhysReg);
+ assert(LRI->PhysReg && "Register not assigned");
+ LRI->LastUse =3D MI;
+ LRI->LastOpNum =3D OpNum;
+ UsedInInstr.set(LRI->PhysReg);
return LRI;
}
=20
@@ -674,7 +707,7 @@
UsedInInstr.set(Reg);
if (ThroughRegs.count(PhysRegState[Reg]))
definePhysReg(MI, Reg, regFree);
- for (const unsigned *AS =3D TRI->getAliasSet(Reg); *AS; ++AS) {
+ for (const uint16_t *AS =3D TRI->getAliasSet(Reg); *AS; ++AS) {
UsedInInstr.set(*AS);
if (ThroughRegs.count(PhysRegState[*AS]))
definePhysReg(MI, *AS, regFree);
@@ -682,7 +715,7 @@
}
=20
SmallVector<unsigned, 8> PartialDefs;
- DEBUG(dbgs() << "Allocating tied uses and early clobbers.\n");
+ DEBUG(dbgs() << "Allocating tied uses.\n");
for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
MachineOperand &MO =3D MI->getOperand(i);
if (!MO.isReg()) continue;
@@ -694,7 +727,7 @@
DEBUG(dbgs() << "Operand " << i << "("<< MO << ") is tied to operand=
"
<< DefIdx << ".\n");
LiveRegMap::iterator LRI =3D reloadVirtReg(MI, i, Reg, 0);
- unsigned PhysReg =3D LRI->second.PhysReg;
+ unsigned PhysReg =3D LRI->PhysReg;
setPhysReg(MI, i, PhysReg);
// Note: we don't update the def operand yet. That would cause the n=
ormal
// def-scan to attempt spilling.
@@ -703,16 +736,25 @@
// Reload the register, but don't assign to the operand just yet.
// That would confuse the later phys-def processing pass.
LiveRegMap::iterator LRI =3D reloadVirtReg(MI, i, Reg, 0);
- PartialDefs.push_back(LRI->second.PhysReg);
- } else if (MO.isEarlyClobber()) {
- // Note: defineVirtReg may invalidate MO.
- LiveRegMap::iterator LRI =3D defineVirtReg(MI, i, Reg, 0);
- unsigned PhysReg =3D LRI->second.PhysReg;
- if (setPhysReg(MI, i, PhysReg))
- VirtDead.push_back(Reg);
+ PartialDefs.push_back(LRI->PhysReg);
}
}
=20
+ DEBUG(dbgs() << "Allocating early clobbers.\n");
+ for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
+ MachineOperand &MO =3D MI->getOperand(i);
+ if (!MO.isReg()) continue;
+ unsigned Reg =3D MO.getReg();
+ if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue;
+ if (!MO.isEarlyClobber())
+ continue;
+ // Note: defineVirtReg may invalidate MO.
+ LiveRegMap::iterator LRI =3D defineVirtReg(MI, i, Reg, 0);
+ unsigned PhysReg =3D LRI->PhysReg;
+ if (setPhysReg(MI, i, PhysReg))
+ VirtDead.push_back(Reg);
+ }
+
// Restore UsedInInstr to a state usable for allocating normal virtual u=
ses.
UsedInInstr.reset();
for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
@@ -730,32 +772,66 @@
UsedInInstr.set(PartialDefs[i]);
}
=20
+/// addRetOperand - ensure that a return instruction has an operand for ea=
ch
+/// value live out of the function.
+///
+/// Things marked both call and return are tail calls; do not do this for =
them.
+/// The tail callee need not take the same registers as input that it prod=
uces
+/// as output, and there are dependencies for its input registers elsewher=
e.
+///
+/// FIXME: This should be done as part of instruction selection, and this =
helper
+/// should be deleted. Until then, we use custom logic here to create the =
proper
+/// operand under all circumstances. We can't use addRegisterKilled becaus=
e that
+/// doesn't make sense for undefined values. We can't simply avoid calling=
it
+/// for undefined values, because we must ensure that the operand always e=
xists.
+void RAFast::addRetOperands(MachineBasicBlock *MBB) {
+ if (MBB->empty() || !MBB->back().isReturn() || MBB->back().isCall())
+ return;
+
+ MachineInstr *MI =3D &MBB->back();
+
+ for (MachineRegisterInfo::liveout_iterator
+ I =3D MBB->getParent()->getRegInfo().liveout_begin(),
+ E =3D MBB->getParent()->getRegInfo().liveout_end(); I !=3D E; ++I=
) {
+ unsigned Reg =3D *I;
+ assert(TargetRegisterInfo::isPhysicalRegister(Reg) &&
+ "Cannot have a live-out virtual register.");
+
+ bool hasDef =3D PhysRegState[Reg] =3D=3D regReserved;
+
+ // Check if this register already has an operand.
+ bool Found =3D false;
+ for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
+ MachineOperand &MO =3D MI->getOperand(i);
+ if (!MO.isReg() || !MO.isUse())
+ continue;
+
+ unsigned OperReg =3D MO.getReg();
+ if (!TargetRegisterInfo::isPhysicalRegister(OperReg))
+ continue;
+
+ if (OperReg =3D=3D Reg || TRI->isSuperRegister(OperReg, Reg)) {
+ // If the ret already has an operand for this physreg or a superse=
t,
+ // don't duplicate it. Set the kill flag if the value is defined.
+ if (hasDef && !MO.isKill())
+ MO.setIsKill();
+ Found =3D true;
+ break;
+ }
+ }
+ if (!Found)
+ MI->addOperand(MachineOperand::CreateReg(Reg,
+ false /*IsDef*/,
+ true /*IsImp*/,
+ hasDef/*IsKill*/));
+ }
+}
+
void RAFast::AllocateBasicBlock() {
DEBUG(dbgs() << "\nAllocating " << *MBB);
=20
- // FIXME: This should probably be added by instruction selection instead?
- // If the last instruction in the block is a return, make sure to mark i=
t as
- // using all of the live-out values in the function. Things marked both=
call
- // and return are tail calls; do not do this for them. The tail callee =
need
- // not take the same registers as input that it produces as output, and =
there
- // are dependencies for its input registers elsewhere.
- if (!MBB->empty() && MBB->back().getDesc().isReturn() &&
- !MBB->back().getDesc().isCall()) {
- MachineInstr *Ret =3D &MBB->back();
-
- for (MachineRegisterInfo::liveout_iterator
- I =3D MF->getRegInfo().liveout_begin(),
- E =3D MF->getRegInfo().liveout_end(); I !=3D E; ++I) {
- assert(TargetRegisterInfo::isPhysicalRegister(*I) &&
- "Cannot have a live-out virtual register.");
-
- // Add live-out registers as implicit uses.
- Ret->addRegisterKilled(*I, TRI, true);
- }
- }
-
PhysRegState.assign(TRI->getNumRegs(), regDisabled);
- assert(LiveVirtRegs.empty() && "Mapping not cleared form last block?");
+ assert(LiveVirtRegs.empty() && "Mapping not cleared from last block?");
=20
MachineBasicBlock::iterator MII =3D MBB->begin();
=20
@@ -783,25 +859,26 @@
case regReserved:
dbgs() << "*";
break;
- default:
+ default: {
dbgs() << '=3D' << PrintReg(PhysRegState[Reg]);
- if (LiveVirtRegs[PhysRegState[Reg]].Dirty)
+ LiveRegMap::iterator I =3D findLiveVirtReg(PhysRegState[Reg]);
+ assert(I !=3D LiveVirtRegs.end() && "Missing VirtReg entry");
+ if (I->Dirty)
dbgs() << "*";
- assert(LiveVirtRegs[PhysRegState[Reg]].PhysReg =3D=3D Reg &&
- "Bad inverse map");
+ assert(I->PhysReg =3D=3D Reg && "Bad inverse map");
break;
}
+ }
}
dbgs() << '\n';
// Check that LiveVirtRegs is the inverse.
for (LiveRegMap::iterator i =3D LiveVirtRegs.begin(),
e =3D LiveVirtRegs.end(); i !=3D e; ++i) {
- assert(TargetRegisterInfo::isVirtualRegister(i->first) &&
+ assert(TargetRegisterInfo::isVirtualRegister(i->VirtReg) &&
"Bad map key");
- assert(TargetRegisterInfo::isPhysicalRegister(i->second.PhysReg=
) &&
+ assert(TargetRegisterInfo::isPhysicalRegister(i->PhysReg) &&
"Bad map value");
- assert(PhysRegState[i->second.PhysReg] =3D=3D i->first &&
- "Bad inverse map");
+ assert(PhysRegState[i->PhysReg] =3D=3D i->VirtReg && "Bad inver=
se map");
}
});
=20
@@ -815,10 +892,9 @@
if (!MO.isReg()) continue;
unsigned Reg =3D MO.getReg();
if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue;
- LiveDbgValueMap[Reg].push_back(MI);
- LiveRegMap::iterator LRI =3D LiveVirtRegs.find(Reg);
+ LiveRegMap::iterator LRI =3D findLiveVirtReg(Reg);
if (LRI !=3D LiveVirtRegs.end())
- setPhysReg(MI, i, LRI->second.PhysReg);
+ setPhysReg(MI, i, LRI->PhysReg);
else {
int SS =3D StackSlotForVirtReg[Reg];
if (SS =3D=3D -1) {
@@ -849,6 +925,7 @@
}
}
}
+ LiveDbgValueMap[Reg].push_back(MI);
}
}
// Next instruction.
@@ -932,7 +1009,7 @@
if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue;
if (MO.isUse()) {
LiveRegMap::iterator LRI =3D reloadVirtReg(MI, i, Reg, CopyDst);
- unsigned PhysReg =3D LRI->second.PhysReg;
+ unsigned PhysReg =3D LRI->PhysReg;
CopySrc =3D (CopySrc =3D=3D Reg || CopySrc =3D=3D PhysReg) ? PhysR=
eg : 0;
if (setPhysReg(MI, i, PhysReg))
killVirtReg(LRI);
@@ -953,13 +1030,13 @@
// Look for physreg defs and tied uses.
if (!MO.isDef() && !MI->isRegTiedToDefOperand(i)) continue;
UsedInInstr.set(Reg);
- for (const unsigned *AS =3D TRI->getAliasSet(Reg); *AS; ++AS)
+ for (const uint16_t *AS =3D TRI->getAliasSet(Reg); *AS; ++AS)
UsedInInstr.set(*AS);
}
}
=20
unsigned DefOpEnd =3D MI->getNumOperands();
- if (MCID.isCall()) {
+ if (MI->isCall()) {
// Spill all virtregs before a call. This serves two purposes: 1. If=
an
// exception is thrown, the landing pad is going to expect to find
// registers in their spill slots, and 2. we don't have to wade thro=
ugh
@@ -988,7 +1065,7 @@
continue;
}
LiveRegMap::iterator LRI =3D defineVirtReg(MI, i, Reg, CopySrc);
- unsigned PhysReg =3D LRI->second.PhysReg;
+ unsigned PhysReg =3D LRI->PhysReg;
if (setPhysReg(MI, i, PhysReg)) {
VirtDead.push_back(Reg);
CopyDst =3D 0; // cancel coalescing;
@@ -1024,6 +1101,9 @@
MBB->erase(Coalesced[i]);
NumCopies +=3D Coalesced.size();
=20
+ // addRetOperands must run after we've seen all defs in this block.
+ addRetOperands(MBB);
+
DEBUG(MBB->dump());
}
=20
@@ -1038,12 +1118,16 @@
TM =3D &Fn.getTarget();
TRI =3D TM->getRegisterInfo();
TII =3D TM->getInstrInfo();
+ MRI->freezeReservedRegs(Fn);
RegClassInfo.runOnMachineFunction(Fn);
UsedInInstr.resize(TRI->getNumRegs());
=20
+ assert(!MRI->isSSA() && "regalloc requires leaving SSA");
+
// initialize the virtual->physical register map to have a 'null'
// mapping for all virtual registers
StackSlotForVirtReg.resize(MRI->getNumVirtRegs());
+ LiveVirtRegs.setUniverse(MRI->getNumVirtRegs());
=20
// Loop over all of the basic blocks, eliminating virtual register refer=
ences
for (MachineFunction::iterator MBBi =3D Fn.begin(), MBBe =3D Fn.end();
@@ -1052,16 +1136,17 @@
AllocateBasicBlock();
}
=20
- // Make sure the set of used physregs is closed under subreg operations.
- MRI->closePhysRegsUsed(*TRI);
-
// Add the clobber lists for all the instructions we skipped earlier.
for (SmallPtrSet<const MCInstrDesc*, 4>::const_iterator
I =3D SkippedInstrs.begin(), E =3D SkippedInstrs.end(); I !=3D E; +=
+I)
- if (const unsigned *Defs =3D (*I)->getImplicitDefs())
+ if (const uint16_t *Defs =3D (*I)->getImplicitDefs())
while (*Defs)
MRI->setPhysRegUsed(*Defs++);
=20
+ // All machine operands and other references to virtual registers have b=
een
+ // replaced. Remove the virtual registers.
+ MRI->clearVirtRegs();
+
SkippedInstrs.clear();
StackSlotForVirtReg.clear();
LiveDbgValueMap.clear();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/RegAlloc=
Greedy.cpp
--- a/head/contrib/llvm/lib/CodeGen/RegAllocGreedy.cpp Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/RegAllocGreedy.cpp Tue Apr 17 11:51:51 =
2012 +0300
@@ -16,7 +16,6 @@
#include "AllocationOrder.h"
#include "InterferenceCache.h"
#include "LiveDebugVariables.h"
-#include "LiveRangeEdit.h"
#include "RegAllocBase.h"
#include "Spiller.h"
#include "SpillPlacement.h"
@@ -29,6 +28,7 @@
#include "llvm/CodeGen/CalcSpillWeights.h"
#include "llvm/CodeGen/EdgeBundles.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
+#include "llvm/CodeGen/LiveRangeEdit.h"
#include "llvm/CodeGen/LiveStackAnalysis.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
@@ -168,6 +168,19 @@
}
};
=20
+ // Register mask interference. The current VirtReg is checked for regist=
er
+ // mask interference on entry to selectOrSplit(). If there is no
+ // interference, UsableRegs is left empty. If there is interference,
+ // UsableRegs has a bit mask of registers that can be used without regis=
ter
+ // mask interference.
+ BitVector UsableRegs;
+
+ /// clobberedByRegMask - Returns true if PhysReg is not directly usable
+ /// because of register mask clobbers.
+ bool clobberedByRegMask(unsigned PhysReg) const {
+ return !UsableRegs.empty() && !UsableRegs.test(PhysReg);
+ }
+
// splitting state.
std::auto_ptr<SplitAnalysis> SA;
std::auto_ptr<SplitEditor> SE;
@@ -248,7 +261,6 @@
static char ID;
=20
private:
- void LRE_WillEraseInstruction(MachineInstr*);
bool LRE_CanEraseVirtReg(unsigned);
void LRE_WillShrinkVirtReg(unsigned);
void LRE_DidCloneVirtReg(unsigned, unsigned);
@@ -308,8 +320,8 @@
initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
- initializeStrongPHIEliminationPass(*PassRegistry::getPassRegistry());
initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry());
+ initializeMachineSchedulerPass(*PassRegistry::getPassRegistry());
initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
initializeLiveStacksPass(*PassRegistry::getPassRegistry());
initializeMachineDominatorTreePass(*PassRegistry::getPassRegistry());
@@ -328,9 +340,6 @@
AU.addPreserved<SlotIndexes>();
AU.addRequired<LiveDebugVariables>();
AU.addPreserved<LiveDebugVariables>();
- if (StrongPHIElim)
- AU.addRequiredID(StrongPHIEliminationID);
- AU.addRequiredTransitiveID(RegisterCoalescerPassID);
AU.addRequired<CalculateSpillWeights>();
AU.addRequired<LiveStacks>();
AU.addPreserved<LiveStacks>();
@@ -350,11 +359,6 @@
// LiveRangeEdit delegate methods
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
-void RAGreedy::LRE_WillEraseInstruction(MachineInstr *MI) {
- // LRE itself will remove from SlotIndexes and parent basic block.
- VRM->RemoveMachineInstrFromMaps(MI);
-}
-
bool RAGreedy::LRE_CanEraseVirtReg(unsigned VirtReg) {
if (unsigned PhysReg =3D VRM->getPhys(VirtReg)) {
unassign(LIS->getInterval(VirtReg), PhysReg);
@@ -424,13 +428,13 @@
Prio |=3D (1u << 30);
}
=20
- Queue.push(std::make_pair(Prio, Reg));
+ Queue.push(std::make_pair(Prio, ~Reg));
}
=20
LiveInterval *RAGreedy::dequeue() {
if (Queue.empty())
return 0;
- LiveInterval *LI =3D &LIS->getInterval(Queue.top().second);
+ LiveInterval *LI =3D &LIS->getInterval(~Queue.top().second);
Queue.pop();
return LI;
}
@@ -446,9 +450,12 @@
SmallVectorImpl<LiveInterval*> &NewVRegs) {
Order.rewind();
unsigned PhysReg;
- while ((PhysReg =3D Order.next()))
+ while ((PhysReg =3D Order.next())) {
+ if (clobberedByRegMask(PhysReg))
+ continue;
if (!checkPhysRegInterference(VirtReg, PhysReg))
break;
+ }
if (!PhysReg || Order.isHint(PhysReg))
return PhysReg;
=20
@@ -457,7 +464,7 @@
// If we missed a simple hint, try to cheaply evict interference from the
// preferred register.
if (unsigned Hint =3D MRI->getSimpleHint(VirtReg.reg))
- if (Order.isHint(Hint)) {
+ if (Order.isHint(Hint) && !clobberedByRegMask(Hint)) {
DEBUG(dbgs() << "missed hint " << PrintReg(Hint, TRI) << '\n');
EvictionCost MaxCost(1);
if (canEvictInterference(VirtReg, Hint, true, MaxCost)) {
@@ -532,7 +539,7 @@
Cascade =3D NextCascade;
=20
EvictionCost Cost;
- for (const unsigned *AliasI =3D TRI->getOverlaps(PhysReg); *AliasI; ++Al=
iasI) {
+ for (const uint16_t *AliasI =3D TRI->getOverlaps(PhysReg); *AliasI; ++Al=
iasI) {
LiveIntervalUnion::Query &Q =3D query(VirtReg, *AliasI);
// If there is 10 or more interferences, chances are one is heavier.
if (Q.collectInterferingVRegs(10) >=3D 10)
@@ -590,7 +597,7 @@
=20
DEBUG(dbgs() << "evicting " << PrintReg(PhysReg, TRI)
<< " interference: Cascade " << Cascade << '\n');
- for (const unsigned *AliasI =3D TRI->getOverlaps(PhysReg); *AliasI; ++Al=
iasI) {
+ for (const uint16_t *AliasI =3D TRI->getOverlaps(PhysReg); *AliasI; ++Al=
iasI) {
LiveIntervalUnion::Query &Q =3D query(VirtReg, *AliasI);
assert(Q.seenAllInterferences() && "Didn't check all interfererences."=
);
for (unsigned i =3D 0, e =3D Q.interferingVRegs().size(); i !=3D e; ++=
i) {
@@ -629,6 +636,8 @@
=20
Order.rewind();
while (unsigned PhysReg =3D Order.next()) {
+ if (clobberedByRegMask(PhysReg))
+ continue;
if (TRI->getCostPerUse(PhysReg) >=3D CostPerUseLimit)
continue;
// The first use of a callee-saved register in a function has cost 1.
@@ -1118,6 +1127,8 @@
}
--NumCands;
GlobalCand[Worst] =3D GlobalCand[NumCands];
+ if (BestCand =3D=3D NumCands)
+ BestCand =3D Worst;
}
=20
if (GlobalCand.size() <=3D NumCands)
@@ -1172,7 +1183,7 @@
return 0;
=20
// Prepare split editor.
- LiveRangeEdit LREdit(VirtReg, NewVRegs, this);
+ LiveRangeEdit LREdit(VirtReg, NewVRegs, *MF, *LIS, VRM, this);
SE->reset(LREdit, SplitSpillMode);
=20
// Assign all edge bundles to the preferred candidate, or NoCand.
@@ -1220,7 +1231,7 @@
assert(&SA->getParent() =3D=3D &VirtReg && "Live range wasn't analyzed");
unsigned Reg =3D VirtReg.reg;
bool SingleInstrs =3D RegClassInfo.isProperSubClass(MRI->getRegClass(Reg=
));
- LiveRangeEdit LREdit(VirtReg, NewVRegs, this);
+ LiveRangeEdit LREdit(VirtReg, NewVRegs, *MF, *LIS, VRM, this);
SE->reset(LREdit, SplitSpillMode);
ArrayRef<SplitAnalysis::BlockInfo> UseBlocks =3D SA->getUseBlocks();
for (unsigned i =3D 0; i !=3D UseBlocks.size(); ++i) {
@@ -1268,7 +1279,7 @@
SmallVectorImpl<float> &GapWeight) {
assert(SA->getUseBlocks().size() =3D=3D 1 && "Not a local interval");
const SplitAnalysis::BlockInfo &BI =3D SA->getUseBlocks().front();
- const SmallVectorImpl<SlotIndex> &Uses =3D SA->UseSlots;
+ ArrayRef<SlotIndex> Uses =3D SA->getUseSlots();
const unsigned NumGaps =3D Uses.size()-1;
=20
// Start and end points for the interference check.
@@ -1280,7 +1291,7 @@
GapWeight.assign(NumGaps, 0.0f);
=20
// Add interference from each overlapping register.
- for (const unsigned *AI =3D TRI->getOverlaps(PhysReg); *AI; ++AI) {
+ for (const uint16_t *AI =3D TRI->getOverlaps(PhysReg); *AI; ++AI) {
if (!query(const_cast<LiveInterval&>(SA->getParent()), *AI)
.checkInterference())
continue;
@@ -1292,7 +1303,7 @@
// surrounding the instruction. The exception is interference before
// StartIdx and after StopIdx.
//
- LiveIntervalUnion::SegmentIter IntI =3D PhysReg2LiveUnion[*AI].find(St=
artIdx);
+ LiveIntervalUnion::SegmentIter IntI =3D getLiveUnion(*AI).find(StartId=
x);
for (unsigned Gap =3D 0; IntI.valid() && IntI.start() < StopIdx; ++Int=
I) {
// Skip the gaps before IntI.
while (Uses[Gap+1].getBoundaryIndex() < IntI.start())
@@ -1329,7 +1340,7 @@
// that the interval is continuous from FirstInstr to LastInstr. We shou=
ld
// make sure that we don't do anything illegal to such an interval, thou=
gh.
=20
- const SmallVectorImpl<SlotIndex> &Uses =3D SA->UseSlots;
+ ArrayRef<SlotIndex> Uses =3D SA->getUseSlots();
if (Uses.size() <=3D 2)
return 0;
const unsigned NumGaps =3D Uses.size()-1;
@@ -1337,10 +1348,40 @@
DEBUG({
dbgs() << "tryLocalSplit: ";
for (unsigned i =3D 0, e =3D Uses.size(); i !=3D e; ++i)
- dbgs() << ' ' << SA->UseSlots[i];
+ dbgs() << ' ' << Uses[i];
dbgs() << '\n';
});
=20
+ // If VirtReg is live across any register mask operands, compute a list =
of
+ // gaps with register masks.
+ SmallVector<unsigned, 8> RegMaskGaps;
+ if (!UsableRegs.empty()) {
+ // Get regmask slots for the whole block.
+ ArrayRef<SlotIndex> RMS =3D LIS->getRegMaskSlotsInBlock(BI.MBB->getNum=
ber());
+ DEBUG(dbgs() << RMS.size() << " regmasks in block:");
+ // Constrain to VirtReg's live range.
+ unsigned ri =3D std::lower_bound(RMS.begin(), RMS.end(),
+ Uses.front().getRegSlot()) - RMS.begin(=
);
+ unsigned re =3D RMS.size();
+ for (unsigned i =3D 0; i !=3D NumGaps && ri !=3D re; ++i) {
+ // Look for Uses[i] <=3D RMS <=3D Uses[i+1].
+ assert(!SlotIndex::isEarlierInstr(RMS[ri], Uses[i]));
+ if (SlotIndex::isEarlierInstr(Uses[i+1], RMS[ri]))
+ continue;
+ // Skip a regmask on the same instruction as the last use. It doesn't
+ // overlap the live range.
+ if (SlotIndex::isSameInstr(Uses[i+1], RMS[ri]) && i+1 =3D=3D NumGaps)
+ break;
+ DEBUG(dbgs() << ' ' << RMS[ri] << ':' << Uses[i] << '-' << Uses[i+1]=
);
+ RegMaskGaps.push_back(i);
+ // Advance ri to the next gap. A regmask on one of the uses counts in
+ // both gaps.
+ while (ri !=3D re && SlotIndex::isEarlierInstr(RMS[ri], Uses[i+1]))
+ ++ri;
+ }
+ DEBUG(dbgs() << '\n');
+ }
+
// Since we allow local split results to be split again, there is a risk=
of
// creating infinite loops. It is tempting to require that the new live
// ranges have less instructions than the original. That would guarantee
@@ -1375,6 +1416,11 @@
// order to make use of PhysReg between UseSlots[i] and UseSlots[i+1].
calcGapWeights(PhysReg, GapWeight);
=20
+ // Remove any gaps with regmask clobbers.
+ if (clobberedByRegMask(PhysReg))
+ for (unsigned i =3D 0, e =3D RegMaskGaps.size(); i !=3D e; ++i)
+ GapWeight[RegMaskGaps[i]] =3D HUGE_VALF;
+
// Try to find the best sequence of gaps to close.
// The new spill weight must be larger than any gap interference.
=20
@@ -1466,7 +1512,7 @@
<< '-' << Uses[BestAfter] << ", " << BestDiff
<< ", " << (BestAfter - BestBefore + 1) << " instrs\n");
=20
- LiveRangeEdit LREdit(VirtReg, NewVRegs, this);
+ LiveRangeEdit LREdit(VirtReg, NewVRegs, *MF, *LIS, VRM, this);
SE->reset(LREdit);
=20
SE->openIntv();
@@ -1553,6 +1599,11 @@
=20
unsigned RAGreedy::selectOrSplit(LiveInterval &VirtReg,
SmallVectorImpl<LiveInterval*> &NewVRegs)=
{
+ // Check if VirtReg is live across any calls.
+ UsableRegs.clear();
+ if (LIS->checkRegMaskInterference(VirtReg, UsableRegs))
+ DEBUG(dbgs() << "Live across regmasks.\n");
+
// First try assigning a free register.
AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo);
if (unsigned PhysReg =3D tryAssign(VirtReg, Order, NewVRegs))
@@ -1593,7 +1644,7 @@
=20
// Finally spill VirtReg itself.
NamedRegionTimer T("Spiller", TimerGroupName, TimePassesIsEnabled);
- LiveRangeEdit LRE(VirtReg, NewVRegs, this);
+ LiveRangeEdit LRE(VirtReg, NewVRegs, *MF, *LIS, VRM, this);
spiller().spill(LRE);
setStage(NewVRegs.begin(), NewVRegs.end(), RS_Done);
=20
@@ -1628,7 +1679,7 @@
ExtraRegInfo.clear();
ExtraRegInfo.resize(MRI->getNumVirtRegs());
NextCascade =3D 1;
- IntfCache.init(MF, &PhysReg2LiveUnion[0], Indexes, TRI);
+ IntfCache.init(MF, &getLiveUnion(0), Indexes, LIS, TRI);
GlobalCand.resize(32); // This will grow as needed.
=20
allocatePhysRegs();
@@ -1647,7 +1698,10 @@
DebugVars->emitDebugValues(VRM);
}
=20
- // The pass output is in VirtRegMap. Release all the transient data.
+ // All machine operands and other references to virtual registers have b=
een
+ // replaced. Remove the virtual registers and release all the transient =
data.
+ VRM->clearAllVirt();
+ MRI->clearVirtRegs();
releaseMemory();
=20
return true;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/RegAlloc=
PBQP.cpp
--- a/head/contrib/llvm/lib/CodeGen/RegAllocPBQP.cpp Tue Apr 17 11:36:47 20=
12 +0300
+++ b/head/contrib/llvm/lib/CodeGen/RegAllocPBQP.cpp Tue Apr 17 11:51:51 20=
12 +0300
@@ -32,14 +32,17 @@
#define DEBUG_TYPE "regalloc"
=20
#include "RenderMachineFunction.h"
-#include "Splitter.h"
+#include "Spiller.h"
#include "VirtRegMap.h"
-#include "VirtRegRewriter.h"
#include "RegisterCoalescer.h"
+#include "llvm/Module.h"
+#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/CodeGen/CalcSpillWeights.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
+#include "llvm/CodeGen/LiveRangeEdit.h"
#include "llvm/CodeGen/LiveStackAnalysis.h"
#include "llvm/CodeGen/RegAllocPBQP.h"
+#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
@@ -54,6 +57,7 @@
#include <limits>
#include <memory>
#include <set>
+#include <sstream>
#include <vector>
=20
using namespace llvm;
@@ -67,10 +71,12 @@
cl::desc("Attempt coalescing during PBQP register allocati=
on."),
cl::init(false), cl::Hidden);
=20
+#ifndef NDEBUG
static cl::opt<bool>
-pbqpPreSplitting("pbqp-pre-splitting",
- cl::desc("Pre-split before PBQP register allocation."),
- cl::init(false), cl::Hidden);
+pbqpDumpGraphs("pbqp-dump-graphs",
+ cl::desc("Dump graphs for each function/round in the compil=
ation unit."),
+ cl::init(false), cl::Hidden);
+#endif
=20
namespace {
=20
@@ -88,11 +94,9 @@
: MachineFunctionPass(ID), builder(b), customPassID(cPassID) {
initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
- initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry());
initializeCalculateSpillWeightsPass(*PassRegistry::getPassRegistry());
initializeLiveStacksPass(*PassRegistry::getPassRegistry());
initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
- initializeLoopSplitterPass(*PassRegistry::getPassRegistry());
initializeVirtRegMapPass(*PassRegistry::getPassRegistry());
initializeRenderMachineFunctionPass(*PassRegistry::getPassRegistry());
}
@@ -132,6 +136,7 @@
MachineRegisterInfo *mri;
RenderMachineFunction *rmf;
=20
+ std::auto_ptr<Spiller> spiller;
LiveIntervals *lis;
LiveStacks *lss;
VirtRegMap *vrm;
@@ -141,10 +146,6 @@
/// \brief Finds the initial set of vreg intervals to allocate.
void findVRegIntervalsToAlloc();
=20
- /// \brief Adds a stack interval if the given live interval has been
- /// spilled. Used to support stack slot coloring.
- void addStackInterval(const LiveInterval *spilled,MachineRegisterInfo* m=
ri);
-
/// \brief Given a solved PBQP problem maps this solution back to a regi=
ster
/// assignment.
bool mapPBQPToRegAlloc(const PBQPRAProblem &problem,
@@ -170,7 +171,7 @@
VReg2Node::const_iterator nodeItr =3D vreg2Node.find(vreg);
assert(nodeItr !=3D vreg2Node.end() && "No node for vreg.");
return nodeItr->second;
- =20
+
}
=20
const PBQPRAProblem::AllowedSet&
@@ -195,9 +196,9 @@
const RegSet &vregs) {
=20
typedef std::vector<const LiveInterval*> LIVector;
-
+ ArrayRef<SlotIndex> regMaskSlots =3D lis->getRegMaskSlots();
MachineRegisterInfo *mri =3D &mf->getRegInfo();
- const TargetRegisterInfo *tri =3D mf->getTarget().getRegisterInfo(); =20
+ const TargetRegisterInfo *tri =3D mf->getTarget().getRegisterInfo();
=20
std::auto_ptr<PBQPRAProblem> p(new PBQPRAProblem());
PBQP::Graph &g =3D p->getGraph();
@@ -214,7 +215,7 @@
=20
BitVector reservedRegs =3D tri->getReservedRegs(*mf);
=20
- // Iterate over vregs.=20
+ // Iterate over vregs.
for (RegSet::const_iterator vregItr =3D vregs.begin(), vregEnd =3D vregs=
.end();
vregItr !=3D vregEnd; ++vregItr) {
unsigned vreg =3D *vregItr;
@@ -224,7 +225,7 @@
// Compute an initial allowed set for the current vreg.
typedef std::vector<unsigned> VRAllowed;
VRAllowed vrAllowed;
- ArrayRef<unsigned> rawOrder =3D trc->getRawAllocationOrder(*mf);
+ ArrayRef<uint16_t> rawOrder =3D trc->getRawAllocationOrder(*mf);
for (unsigned i =3D 0; i !=3D rawOrder.size(); ++i) {
unsigned preg =3D rawOrder[i];
if (!reservedRegs.test(preg)) {
@@ -232,7 +233,9 @@
}
}
=20
- // Remove any physical registers which overlap.
+ RegSet overlappingPRegs;
+
+ // Record physical registers whose ranges overlap.
for (RegSet::const_iterator pregItr =3D pregs.begin(),
pregEnd =3D pregs.end();
pregItr !=3D pregEnd; ++pregItr) {
@@ -243,9 +246,41 @@
continue;
}
=20
- if (!vregLI->overlaps(*pregLI)) {
- continue;
+ if (vregLI->overlaps(*pregLI))
+ overlappingPRegs.insert(preg); =20
+ }
+
+ // Record any overlaps with regmask operands.
+ BitVector regMaskOverlaps(tri->getNumRegs());
+ for (ArrayRef<SlotIndex>::iterator rmItr =3D regMaskSlots.begin(),
+ rmEnd =3D regMaskSlots.end();
+ rmItr !=3D rmEnd; ++rmItr) {
+ SlotIndex rmIdx =3D *rmItr;
+ if (vregLI->liveAt(rmIdx)) {
+ MachineInstr *rmMI =3D lis->getInstructionFromIndex(rmIdx);
+ const uint32_t* regMask =3D 0;
+ for (MachineInstr::mop_iterator mopItr =3D rmMI->operands_begin(),
+ mopEnd =3D rmMI->operands_end();
+ mopItr !=3D mopEnd; ++mopItr) {
+ if (mopItr->isRegMask()) {
+ regMask =3D mopItr->getRegMask();
+ break;
+ }
+ }
+ assert(regMask !=3D 0 && "Couldn't find register mask.");
+ regMaskOverlaps.setBitsNotInMask(regMask);
}
+ }
+
+ for (unsigned preg =3D 0; preg < tri->getNumRegs(); ++preg) {
+ if (regMaskOverlaps.test(preg))
+ overlappingPRegs.insert(preg);
+ }
+
+ for (RegSet::const_iterator pregItr =3D overlappingPRegs.begin(),
+ pregEnd =3D overlappingPRegs.end();
+ pregItr !=3D pregEnd; ++pregItr) {
+ unsigned preg =3D *pregItr;
=20
// Remove the register from the allowed set.
VRAllowed::iterator eraseItr =3D
@@ -256,7 +291,7 @@
}
=20
// Also remove any aliases.
- const unsigned *aliasItr =3D tri->getAliasSet(preg);
+ const uint16_t *aliasItr =3D tri->getAliasSet(preg);
if (aliasItr !=3D 0) {
for (; *aliasItr !=3D 0; ++aliasItr) {
VRAllowed::iterator eraseItr =3D
@@ -270,7 +305,7 @@
}
=20
// Construct the node.
- PBQP::Graph::NodeItr node =3D=20
+ PBQP::Graph::NodeItr node =3D
g.addNode(PBQP::Vector(vrAllowed.size() + 1, 0));
=20
// Record the mapping and allowed set in the problem.
@@ -371,7 +406,7 @@
=20
const float copyFactor =3D 0.5; // Cost of copy relative to load. Cu=
rrent
// value plucked randomly out of the air.
- =20
+
PBQP::PBQPNum cBenefit =3D
copyFactor * LiveIntervals::getSpillWeight(false, true,
loopInfo->getLoopDepth(=
mbb));
@@ -382,7 +417,7 @@
}
=20
const PBQPRAProblem::AllowedSet &allowed =3D p->getAllowedSet(src);
- unsigned pregOpt =3D 0; =20
+ unsigned pregOpt =3D 0;
while (pregOpt < allowed.size() && allowed[pregOpt] !=3D dst) {
++pregOpt;
}
@@ -407,7 +442,7 @@
std::swap(allowed1, allowed2);
}
}
- =20
+
addVirtRegCoalesce(g.getEdgeCosts(edge), *allowed1, *allowed2,
cBenefit);
}
@@ -439,27 +474,29 @@
=20
if (preg1 =3D=3D preg2) {
costMat[i + 1][j + 1] +=3D -benefit;
- }=20
+ }
}
}
}
=20
=20
void RegAllocPBQP::getAnalysisUsage(AnalysisUsage &au) const {
+ au.setPreservesCFG();
+ au.addRequired<AliasAnalysis>();
+ au.addPreserved<AliasAnalysis>();
au.addRequired<SlotIndexes>();
au.addPreserved<SlotIndexes>();
au.addRequired<LiveIntervals>();
//au.addRequiredID(SplitCriticalEdgesID);
- au.addRequiredID(RegisterCoalescerPassID);
if (customPassID)
au.addRequiredID(*customPassID);
au.addRequired<CalculateSpillWeights>();
au.addRequired<LiveStacks>();
au.addPreserved<LiveStacks>();
+ au.addRequired<MachineDominatorTree>();
+ au.addPreserved<MachineDominatorTree>();
au.addRequired<MachineLoopInfo>();
au.addPreserved<MachineLoopInfo>();
- if (pbqpPreSplitting)
- au.addRequired<LoopSplitter>();
au.addRequired<VirtRegMap>();
au.addRequired<RenderMachineFunction>();
MachineFunctionPass::getAnalysisUsage(au);
@@ -488,29 +525,6 @@
}
}
=20
-void RegAllocPBQP::addStackInterval(const LiveInterval *spilled,
- MachineRegisterInfo* mri) {
- int stackSlot =3D vrm->getStackSlot(spilled->reg);
-
- if (stackSlot =3D=3D VirtRegMap::NO_STACK_SLOT) {
- return;
- }
-
- const TargetRegisterClass *RC =3D mri->getRegClass(spilled->reg);
- LiveInterval &stackInterval =3D lss->getOrCreateInterval(stackSlot, RC);
-
- VNInfo *vni;
- if (stackInterval.getNumValNums() !=3D 0) {
- vni =3D stackInterval.getValNumInfo(0);
- } else {
- vni =3D stackInterval.getNextValue(
- SlotIndex(), 0, lss->getVNInfoAllocator());
- }
-
- LiveInterval &rhsInterval =3D lis->getInterval(spilled->reg);
- stackInterval.MergeRangesInAsValue(rhsInterval, vni);
-}
-
bool RegAllocPBQP::mapPBQPToRegAlloc(const PBQPRAProblem &problem,
const PBQP::Solution &solution) {
// Set to true if we have any spills
@@ -529,28 +543,22 @@
unsigned alloc =3D solution.getSelection(node);
=20
if (problem.isPRegOption(vreg, alloc)) {
- unsigned preg =3D problem.getPRegForOption(vreg, alloc); =20
+ unsigned preg =3D problem.getPRegForOption(vreg, alloc);
DEBUG(dbgs() << "VREG " << vreg << " -> " << tri->getName(preg) << "=
\n");
assert(preg !=3D 0 && "Invalid preg selected.");
- vrm->assignVirt2Phys(vreg, preg); =20
+ vrm->assignVirt2Phys(vreg, preg);
} else if (problem.isSpillOption(vreg, alloc)) {
vregsToAlloc.erase(vreg);
- const LiveInterval* spillInterval =3D &lis->getInterval(vreg);
- double oldWeight =3D spillInterval->weight;
- rmf->rememberUseDefs(spillInterval);
- std::vector<LiveInterval*> newSpills =3D
- lis->addIntervalsForSpills(*spillInterval, 0, loopInfo, *vrm);
- addStackInterval(spillInterval, mri);
- rmf->rememberSpills(spillInterval, newSpills);
+ SmallVector<LiveInterval*, 8> newSpills;
+ LiveRangeEdit LRE(lis->getInterval(vreg), newSpills, *mf, *lis, vrm);
+ spiller->spill(LRE);
=20
- (void) oldWeight;
DEBUG(dbgs() << "VREG " << vreg << " -> SPILLED (Cost: "
- << oldWeight << ", New vregs: ");
+ << LRE.getParent().weight << ", New vregs: ");
=20
// Copy any newly inserted live intervals into the list of regs to
// allocate.
- for (std::vector<LiveInterval*>::const_iterator
- itr =3D newSpills.begin(), end =3D newSpills.end();
+ for (LiveRangeEdit::iterator itr =3D LRE.begin(), end =3D LRE.end();
itr !=3D end; ++itr) {
assert(!(*itr)->empty() && "Empty spill range.");
DEBUG(dbgs() << (*itr)->reg << " ");
@@ -560,9 +568,9 @@
DEBUG(dbgs() << ")\n");
=20
// We need another round if spill intervals were added.
- anotherRoundNeeded |=3D !newSpills.empty();
+ anotherRoundNeeded |=3D !LRE.empty();
} else {
- assert(false && "Unknown allocation option.");
+ llvm_unreachable("Unknown allocation option.");
}
}
=20
@@ -642,7 +650,7 @@
tm =3D &mf->getTarget();
tri =3D tm->getRegisterInfo();
tii =3D tm->getInstrInfo();
- mri =3D &mf->getRegInfo();=20
+ mri =3D &mf->getRegInfo();
=20
lis =3D &getAnalysis<LiveIntervals>();
lss =3D &getAnalysis<LiveStacks>();
@@ -650,7 +658,9 @@
rmf =3D &getAnalysis<RenderMachineFunction>();
=20
vrm =3D &getAnalysis<VirtRegMap>();
+ spiller.reset(createInlineSpiller(*this, MF, *vrm));
=20
+ mri->freezeReservedRegs(MF);
=20
DEBUG(dbgs() << "PBQP Register Allocating for " << mf->getFunction()->ge=
tName() << "\n");
=20
@@ -666,6 +676,12 @@
// Find the vreg intervals in need of allocation.
findVRegIntervalsToAlloc();
=20
+ const Function* func =3D mf->getFunction();
+ std::string fqn =3D
+ func->getParent()->getModuleIdentifier() + "." +
+ func->getName().str();
+ (void)fqn;
+
// If there are non-empty intervals allocate them using pbqp.
if (!vregsToAlloc.empty()) {
=20
@@ -677,6 +693,20 @@
=20
std::auto_ptr<PBQPRAProblem> problem =3D
builder->build(mf, lis, loopInfo, vregsToAlloc);
+
+#ifndef NDEBUG
+ if (pbqpDumpGraphs) {
+ std::ostringstream rs;
+ rs << round;
+ std::string graphFileName(fqn + "." + rs.str() + ".pbqpgraph");
+ std::string tmp;
+ raw_fd_ostream os(graphFileName.c_str(), tmp);
+ DEBUG(dbgs() << "Dumping graph for round " << round << " to \""
+ << graphFileName << "\"\n");
+ problem->getGraph().dump(os);
+ }
+#endif
+
PBQP::Solution solution =3D
PBQP::HeuristicSolver<PBQP::Heuristics::Briggs>::solve(
problem->getGraph());
@@ -698,9 +728,12 @@
DEBUG(dbgs() << "Post alloc VirtRegMap:\n" << *vrm << "\n");
=20
// Run rewriter
- std::auto_ptr<VirtRegRewriter> rewriter(createVirtRegRewriter());
+ vrm->rewrite(lis->getSlotIndexes());
=20
- rewriter->runOnMachineFunction(*mf, *vrm, lis);
+ // All machine operands and other references to virtual registers have b=
een
+ // replaced. Remove the virtual registers.
+ vrm->clearAllVirt();
+ mri->clearVirtRegs();
=20
return true;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Register=
ClassInfo.cpp
--- a/head/contrib/llvm/lib/CodeGen/RegisterClassInfo.cpp Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/RegisterClassInfo.cpp Tue Apr 17 11:51:=
51 2012 +0300
@@ -18,12 +18,16 @@
#include "RegisterClassInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Target/TargetMachine.h"
-
+#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
=20
using namespace llvm;
=20
+static cl::opt<unsigned>
+StressRA("stress-regalloc", cl::Hidden, cl::init(0), cl::value_desc("N"),
+ cl::desc("Limit all regclasses to N registers"));
+
RegisterClassInfo::RegisterClassInfo() : Tag(0), MF(0), TRI(0), CalleeSave=
d(0)
{}
=20
@@ -39,14 +43,14 @@
}
=20
// Does this MF have different CSRs?
- const unsigned *CSR =3D TRI->getCalleeSavedRegs(MF);
+ const uint16_t *CSR =3D TRI->getCalleeSavedRegs(MF);
if (Update || CSR !=3D CalleeSaved) {
// Build a CSRNum map. Every CSR alias gets an entry pointing to the l=
ast
// overlapping CSR.
CSRNum.clear();
CSRNum.resize(TRI->getNumRegs(), 0);
for (unsigned N =3D 0; unsigned Reg =3D CSR[N]; ++N)
- for (const unsigned *AS =3D TRI->getOverlaps(Reg);
+ for (const uint16_t *AS =3D TRI->getOverlaps(Reg);
unsigned Alias =3D *AS; ++AS)
CSRNum[Alias] =3D N + 1; // 0 means no CSR, 1 means CalleeSaved[0]=
, ...
Update =3D true;
@@ -81,7 +85,7 @@
=20
// FIXME: Once targets reserve registers instead of removing them from t=
he
// allocation order, we can simply use begin/end here.
- ArrayRef<unsigned> RawOrder =3D RC->getRawAllocationOrder(*MF);
+ ArrayRef<uint16_t> RawOrder =3D RC->getRawAllocationOrder(*MF);
for (unsigned i =3D 0; i !=3D RawOrder.size(); ++i) {
unsigned PhysReg =3D RawOrder[i];
// Remove reserved registers from the allocation order.
@@ -99,6 +103,10 @@
// CSR aliases go after the volatile registers, preserve the target's or=
der.
std::copy(CSRAlias.begin(), CSRAlias.end(), &RCI.Order[N]);
=20
+ // Register allocator stress test. Clip register class to N registers.
+ if (StressRA && RCI.NumRegs > StressRA)
+ RCI.NumRegs =3D StressRA;
+
// Check if RC is a proper sub-class.
if (const TargetRegisterClass *Super =3D TRI->getLargestLegalSuperClass(=
RC))
if (Super !=3D RC && getNumAllocatableRegs(Super) > RCI.NumRegs)
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Register=
ClassInfo.h
--- a/head/contrib/llvm/lib/CodeGen/RegisterClassInfo.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/RegisterClassInfo.h Tue Apr 17 11:51:51=
2012 +0300
@@ -49,7 +49,7 @@
=20
// Callee saved registers of last MF. Assumed to be valid until the next
// runOnFunction() call.
- const unsigned *CalleeSaved;
+ const uint16_t *CalleeSaved;
=20
// Map register number to CalleeSaved index + 1;
SmallVector<uint8_t, 4> CSRNum;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Register=
Coalescer.cpp
--- a/head/contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp Tue Apr 17 11:51:=
51 2012 +0300
@@ -13,7 +13,7 @@
//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
-#define DEBUG_TYPE "regcoalescing"
+#define DEBUG_TYPE "regalloc"
#include "RegisterCoalescer.h"
#include "LiveDebugVariables.h"
#include "RegisterClassInfo.h"
@@ -169,10 +169,6 @@
/// it as well.
bool RemoveDeadDef(LiveInterval &li, MachineInstr *DefMI);
=20
- /// RemoveCopyFlag - If DstReg is no longer defined by CopyMI, clear t=
he
- /// VNInfo copy flag for DstReg and all aliases.
- void RemoveCopyFlag(unsigned DstReg, const MachineInstr *CopyMI);
-
/// markAsJoined - Remember that CopyMI has already been joined.
void markAsJoined(MachineInstr *CopyMI);
=20
@@ -197,7 +193,7 @@
};
} /// end anonymous namespace
=20
-char &llvm::RegisterCoalescerPassID =3D RegisterCoalescer::ID;
+char &llvm::RegisterCoalescerID =3D RegisterCoalescer::ID;
=20
INITIALIZE_PASS_BEGIN(RegisterCoalescer, "simple-register-coalescing",
"Simple Register Coalescing", false, false)
@@ -205,9 +201,6 @@
INITIALIZE_PASS_DEPENDENCY(LiveDebugVariables)
INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
-INITIALIZE_PASS_DEPENDENCY(StrongPHIElimination)
-INITIALIZE_PASS_DEPENDENCY(PHIElimination)
-INITIALIZE_PASS_DEPENDENCY(TwoAddressInstructionPass)
INITIALIZE_AG_DEPENDENCY(AliasAnalysis)
INITIALIZE_PASS_END(RegisterCoalescer, "simple-register-coalescing",
"Simple Register Coalescing", false, false)
@@ -379,9 +372,6 @@
AU.addRequired<MachineLoopInfo>();
AU.addPreserved<MachineLoopInfo>();
AU.addPreservedID(MachineDominatorsID);
- AU.addPreservedID(StrongPHIEliminationID);
- AU.addPreservedID(PHIEliminationID);
- AU.addPreservedID(TwoAddressInstructionPassID);
MachineFunctionPass::getAnalysisUsage(AU);
}
=20
@@ -423,7 +413,7 @@
LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg());
LiveInterval &IntB =3D
LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg());
- SlotIndex CopyIdx =3D LIS->getInstructionIndex(CopyMI).getDefIndex();
+ SlotIndex CopyIdx =3D LIS->getInstructionIndex(CopyMI).getRegSlot();
=20
// BValNo is a value number in B that is defined by a copy from A. 'B3'=
in
// the example above.
@@ -434,40 +424,19 @@
// Get the location that B is defined at. Two options: either this valu=
e has
// an unknown definition point or it is defined at CopyIdx. If unknown,=
we
// can't process it.
- if (!BValNo->isDefByCopy()) return false;
- assert(BValNo->def =3D=3D CopyIdx && "Copy doesn't define the value?");
+ if (BValNo->def !=3D CopyIdx) return false;
=20
// AValNo is the value number in A that defines the copy, A3 in the exam=
ple.
- SlotIndex CopyUseIdx =3D CopyIdx.getUseIndex();
+ SlotIndex CopyUseIdx =3D CopyIdx.getRegSlot(true);
LiveInterval::iterator ALR =3D IntA.FindLiveRangeContaining(CopyUseIdx);
// The live range might not exist after fun with physreg coalescing.
if (ALR =3D=3D IntA.end()) return false;
VNInfo *AValNo =3D ALR->valno;
- // If it's re-defined by an early clobber somewhere in the live range, t=
hen
- // it's not safe to eliminate the copy. FIXME: This is a temporary worka=
round.
- // See PR3149:
- // 172 %ECX<def> =3D MOV32rr %reg1039<kill>
- // 180 INLINEASM <es:subl $5,$1
- // sbbl $3,$0>, 10, %EAX<def>, 14, %ECX<earlyclobber,def>, 9,
- // %EAX<kill>,
- // 36, <fi#0>, 1, %reg0, 0, 9, %ECX<kill>, 36, <fi#1>, 1, %reg0, 0
- // 188 %EAX<def> =3D MOV32rr %EAX<kill>
- // 196 %ECX<def> =3D MOV32rr %ECX<kill>
- // 204 %ECX<def> =3D MOV32rr %ECX<kill>
- // 212 %EAX<def> =3D MOV32rr %EAX<kill>
- // 220 %EAX<def> =3D MOV32rr %EAX
- // 228 %reg1039<def> =3D MOV32rr %ECX<kill>
- // The early clobber operand ties ECX input to the ECX def.
- //
- // The live interval of ECX is represented as this:
- // %reg20,inf =3D [46,47:1)[174,230:0) 0 at 174-(230) 1 at 46-(47)
- // The coalescer has no idea there was a def in the middle of [174,230].
- if (AValNo->hasRedefByEC())
- return false;
=20
// If AValNo is defined as a copy from IntB, we can potentially process =
this.
// Get the instruction that defines this value number.
- if (!CP.isCoalescable(AValNo->getCopy()))
+ MachineInstr *ACopyMI =3D LIS->getInstructionFromIndex(AValNo->def);
+ if (!CP.isCoalescable(ACopyMI))
return false;
=20
// Get the LiveRange in IntB that this value number starts with.
@@ -492,7 +461,7 @@
// of its aliases is overlapping the live interval of the virtual regist=
er.
// If so, do not coalesce.
if (TargetRegisterInfo::isPhysicalRegister(IntB.reg)) {
- for (const unsigned *AS =3D TRI->getAliasSet(IntB.reg); *AS; ++AS)
+ for (const uint16_t *AS =3D TRI->getAliasSet(IntB.reg); *AS; ++AS)
if (LIS->hasInterval(*AS) && IntA.overlaps(LIS->getInterval(*AS))) {
DEBUG({
dbgs() << "\t\tInterfere with alias ";
@@ -511,8 +480,7 @@
// We are about to delete CopyMI, so need to remove it as the 'instructi=
on
// that defines this value #'. Update the valnum with the new defining
// instruction #.
- BValNo->def =3D FillerStart;
- BValNo->setCopy(0);
+ BValNo->def =3D FillerStart;
=20
// Okay, we can merge them. We need to insert a new liverange:
// [ValLR.end, BLR.begin) of either value number, then we merge the
@@ -522,12 +490,12 @@
// If the IntB live range is assigned to a physical register, and if that
// physreg has sub-registers, update their live intervals as well.
if (TargetRegisterInfo::isPhysicalRegister(IntB.reg)) {
- for (const unsigned *SR =3D TRI->getSubRegisters(IntB.reg); *SR; ++SR)=
{
+ for (const uint16_t *SR =3D TRI->getSubRegisters(IntB.reg); *SR; ++SR)=
{
if (!LIS->hasInterval(*SR))
continue;
LiveInterval &SRLI =3D LIS->getInterval(*SR);
SRLI.addRange(LiveRange(FillerStart, FillerEnd,
- SRLI.getNextValue(FillerStart, 0,
+ SRLI.getNextValue(FillerStart,
LIS->getVNInfoAllocator())=
));
}
}
@@ -554,9 +522,11 @@
ValLREndInst->getOperand(UIdx).setIsKill(false);
}
=20
- // If the copy instruction was killing the destination register before t=
he
- // merge, find the last use and trim the live range. That will also add =
the
- // isKill marker.
+ // Rewrite the copy. If the copy instruction was killing the destination
+ // register before the merge, find the last use and trim the live range.=
That
+ // will also add the isKill marker.
+ CopyMI->substituteRegister(IntA.reg, IntB.reg, CP.getSubIdx(),
+ *TRI);
if (ALR->end =3D=3D CopyIdx)
LIS->shrinkToUses(&IntA);
=20
@@ -625,7 +595,7 @@
if (!LIS->hasInterval(CP.getDstReg()))
return false;
=20
- SlotIndex CopyIdx =3D LIS->getInstructionIndex(CopyMI).getDefIndex();
+ SlotIndex CopyIdx =3D LIS->getInstructionIndex(CopyMI).getRegSlot();
=20
LiveInterval &IntA =3D
LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg());
@@ -635,13 +605,13 @@
// BValNo is a value number in B that is defined by a copy from A. 'B3' =
in
// the example above.
VNInfo *BValNo =3D IntB.getVNInfoAt(CopyIdx);
- if (!BValNo || !BValNo->isDefByCopy())
+ if (!BValNo || BValNo->def !=3D CopyIdx)
return false;
=20
assert(BValNo->def =3D=3D CopyIdx && "Copy doesn't define the value?");
=20
// AValNo is the value number in A that defines the copy, A3 in the exam=
ple.
- VNInfo *AValNo =3D IntA.getVNInfoAt(CopyIdx.getUseIndex());
+ VNInfo *AValNo =3D IntA.getVNInfoAt(CopyIdx.getRegSlot(true));
assert(AValNo && "COPY source not live");
=20
// If other defs can reach uses of this def, then it's not safe to perfo=
rm
@@ -651,8 +621,7 @@
MachineInstr *DefMI =3D LIS->getInstructionFromIndex(AValNo->def);
if (!DefMI)
return false;
- const MCInstrDesc &MCID =3D DefMI->getDesc();
- if (!MCID.isCommutable())
+ if (!DefMI->isCommutable())
return false;
// If DefMI is a two-address instruction then commuting it will change t=
he
// destination register.
@@ -684,7 +653,7 @@
// Abort if the aliases of IntB.reg have values that are not simply the
// clobbers from the superreg.
if (TargetRegisterInfo::isPhysicalRegister(IntB.reg))
- for (const unsigned *AS =3D TRI->getAliasSet(IntB.reg); *AS; ++AS)
+ for (const uint16_t *AS =3D TRI->getAliasSet(IntB.reg); *AS; ++AS)
if (LIS->hasInterval(*AS) &&
HasOtherReachingDefs(IntA, LIS->getInterval(*AS), AValNo, 0))
return false;
@@ -718,7 +687,8 @@
return false;
if (NewMI !=3D DefMI) {
LIS->ReplaceMachineInstrInMaps(DefMI, NewMI);
- MBB->insert(DefMI, NewMI);
+ MachineBasicBlock::iterator Pos =3D DefMI;
+ MBB->insert(Pos, NewMI);
MBB->erase(DefMI);
}
unsigned OpIdx =3D NewMI->findRegisterUseOperandIdx(IntA.reg, false);
@@ -747,7 +717,7 @@
UseMO.setReg(NewReg);
continue;
}
- SlotIndex UseIdx =3D LIS->getInstructionIndex(UseMI).getUseIndex();
+ SlotIndex UseIdx =3D LIS->getInstructionIndex(UseMI).getRegSlot(true);
LiveInterval::iterator ULR =3D IntA.FindLiveRangeContaining(UseIdx);
if (ULR =3D=3D IntA.end() || ULR->valno !=3D AValNo)
continue;
@@ -765,7 +735,7 @@
=20
// This copy will become a noop. If it's defining a new val#, merge it=
into
// BValNo.
- SlotIndex DefIdx =3D UseIdx.getDefIndex();
+ SlotIndex DefIdx =3D UseIdx.getRegSlot();
VNInfo *DVNI =3D IntB.getVNInfoAt(DefIdx);
if (!DVNI)
continue;
@@ -779,7 +749,6 @@
// is updated.
VNInfo *ValNo =3D BValNo;
ValNo->def =3D AValNo->def;
- ValNo->setCopy(0);
for (LiveInterval::iterator AI =3D IntA.begin(), AE =3D IntA.end();
AI !=3D AE; ++AI) {
if (AI->valno !=3D AValNo) continue;
@@ -799,7 +768,7 @@
bool preserveSrcInt,
unsigned DstReg,
MachineInstr *CopyM=
I) {
- SlotIndex CopyIdx =3D LIS->getInstructionIndex(CopyMI).getUseIndex();
+ SlotIndex CopyIdx =3D LIS->getInstructionIndex(CopyMI).getRegSlot(true);
LiveInterval::iterator SrcLR =3D SrcInt.FindLiveRangeContaining(CopyIdx);
assert(SrcLR !=3D SrcInt.end() && "Live range not found!");
VNInfo *ValNo =3D SrcLR->valno;
@@ -809,14 +778,14 @@
if (!DefMI)
return false;
assert(DefMI && "Defining instruction disappeared");
- const MCInstrDesc &MCID =3D DefMI->getDesc();
- if (!MCID.isAsCheapAsAMove())
+ if (!DefMI->isAsCheapAsAMove())
return false;
if (!TII->isTriviallyReMaterializable(DefMI, AA))
return false;
bool SawStore =3D false;
if (!DefMI->isSafeToMove(TII, AA, SawStore))
return false;
+ const MCInstrDesc &MCID =3D DefMI->getDesc();
if (MCID.getNumDefs() !=3D 1)
return false;
if (!DefMI->isImplicitDef()) {
@@ -831,27 +800,52 @@
return false;
}
=20
- RemoveCopyFlag(DstReg, CopyMI);
-
MachineBasicBlock *MBB =3D CopyMI->getParent();
MachineBasicBlock::iterator MII =3D
llvm::next(MachineBasicBlock::iterator(CopyMI));
TII->reMaterialize(*MBB, MII, DstReg, 0, DefMI, *TRI);
MachineInstr *NewMI =3D prior(MII);
=20
+ // NewMI may have dead implicit defs (E.g. EFLAGS for MOV<bits>r0 on X86=
).
+ // We need to remember these so we can add intervals once we insert
+ // NewMI into SlotIndexes.
+ SmallVector<unsigned, 4> NewMIImplDefs;
+ for (unsigned i =3D NewMI->getDesc().getNumOperands(),
+ e =3D NewMI->getNumOperands(); i !=3D e; ++i) {
+ MachineOperand &MO =3D NewMI->getOperand(i);
+ if (MO.isReg()) {
+ assert(MO.isDef() && MO.isImplicit() && MO.isDead() &&
+ TargetRegisterInfo::isPhysicalRegister(MO.getReg()));
+ NewMIImplDefs.push_back(MO.getReg());
+ }
+ }
+
// CopyMI may have implicit operands, transfer them over to the newly
// rematerialized instruction. And update implicit def interval valnos.
for (unsigned i =3D CopyMI->getDesc().getNumOperands(),
e =3D CopyMI->getNumOperands(); i !=3D e; ++i) {
MachineOperand &MO =3D CopyMI->getOperand(i);
- if (MO.isReg() && MO.isImplicit())
- NewMI->addOperand(MO);
- if (MO.isDef())
- RemoveCopyFlag(MO.getReg(), CopyMI);
+ if (MO.isReg()) {
+ assert(MO.isImplicit() && "No explicit operands after implict operan=
ds.");
+ // Discard VReg implicit defs.
+ if (TargetRegisterInfo::isPhysicalRegister(MO.getReg())) {
+ NewMI->addOperand(MO);
+ }
+ }
}
=20
- NewMI->copyImplicitOps(CopyMI);
LIS->ReplaceMachineInstrInMaps(CopyMI, NewMI);
+
+ SlotIndex NewMIIdx =3D LIS->getInstructionIndex(NewMI);
+ for (unsigned i =3D 0, e =3D NewMIImplDefs.size(); i !=3D e; ++i) {
+ unsigned reg =3D NewMIImplDefs[i];
+ LiveInterval &li =3D LIS->getInterval(reg);
+ VNInfo *DeadDefVN =3D li.getNextValue(NewMIIdx.getRegSlot(),
+ LIS->getVNInfoAllocator());
+ LiveRange lr(NewMIIdx.getRegSlot(), NewMIIdx.getDeadSlot(), DeadDefVN);
+ li.addRange(lr);
+ }
+
CopyMI->eraseFromParent();
ReMatCopies.insert(CopyMI);
ReMatDefs.insert(DefMI);
@@ -887,7 +881,7 @@
DstInt =3D SrcInt;
SrcInt =3D 0;
=20
- VNInfo *DeadVNI =3D DstInt->getVNInfoAt(Idx.getDefIndex());
+ VNInfo *DeadVNI =3D DstInt->getVNInfoAt(Idx.getRegSlot());
assert(DeadVNI && "No value defined in DstInt");
DstInt->removeValNo(DeadVNI);
=20
@@ -941,13 +935,10 @@
SmallVector<unsigned,8> Ops;
bool Reads, Writes;
tie(Reads, Writes) =3D UseMI->readsWritesVirtualRegister(SrcReg, &Ops);
- bool Kills =3D false, Deads =3D false;
=20
// Replace SrcReg with DstReg in all UseMI operands.
for (unsigned i =3D 0, e =3D Ops.size(); i !=3D e; ++i) {
MachineOperand &MO =3D UseMI->getOperand(Ops[i]);
- Kills |=3D MO.isKill();
- Deads |=3D MO.isDead();
=20
// Make sure we don't create read-modify-write defs accidentally. We
// assume here that a SrcReg def cannot be joined into a live DstReg=
. If
@@ -967,19 +958,6 @@
if (JoinedCopies.count(UseMI))
continue;
=20
- if (SubIdx) {
- // If UseMI was a simple SrcReg def, make sure we didn't turn it int=
o a
- // read-modify-write of DstReg.
- if (Deads)
- UseMI->addRegisterDead(DstReg, TRI);
- else if (!Reads && Writes)
- UseMI->addRegisterDefined(DstReg, TRI);
-
- // Kill flags apply to the whole physical register.
- if (DstIsPhys && Kills)
- UseMI->addRegisterKilled(DstReg, TRI);
- }
-
DEBUG({
dbgs() << "\t\tupdated: ";
if (!UseMI->isDebugValue())
@@ -996,7 +974,7 @@
const TargetRegisterInfo *TRI) {
if (li.empty()) {
if (TargetRegisterInfo::isPhysicalRegister(li.reg))
- for (const unsigned* SR =3D TRI->getSubRegisters(li.reg); *SR; ++SR)=
{
+ for (const uint16_t* SR =3D TRI->getSubRegisters(li.reg); *SR; ++SR)=
{
if (!LIS->hasInterval(*SR))
continue;
LiveInterval &sli =3D LIS->getInterval(*SR);
@@ -1013,7 +991,7 @@
/// the val# it defines. If the live interval becomes empty, remove it as =
well.
bool RegisterCoalescer::RemoveDeadDef(LiveInterval &li,
MachineInstr *DefMI) {
- SlotIndex DefIdx =3D LIS->getInstructionIndex(DefMI).getDefIndex();
+ SlotIndex DefIdx =3D LIS->getInstructionIndex(DefMI).getRegSlot();
LiveInterval::iterator MLR =3D li.FindLiveRangeContaining(DefIdx);
if (DefIdx !=3D MLR->valno->def)
return false;
@@ -1021,27 +999,6 @@
return removeIntervalIfEmpty(li, LIS, TRI);
}
=20
-void RegisterCoalescer::RemoveCopyFlag(unsigned DstReg,
- const MachineInstr *CopyMI) {
- SlotIndex DefIdx =3D LIS->getInstructionIndex(CopyMI).getDefIndex();
- if (LIS->hasInterval(DstReg)) {
- LiveInterval &LI =3D LIS->getInterval(DstReg);
- if (const LiveRange *LR =3D LI.getLiveRangeContaining(DefIdx))
- if (LR->valno->def =3D=3D DefIdx)
- LR->valno->setCopy(0);
- }
- if (!TargetRegisterInfo::isPhysicalRegister(DstReg))
- return;
- for (const unsigned* AS =3D TRI->getAliasSet(DstReg); *AS; ++AS) {
- if (!LIS->hasInterval(*AS))
- continue;
- LiveInterval &LI =3D LIS->getInterval(*AS);
- if (const LiveRange *LR =3D LI.getLiveRangeContaining(DefIdx))
- if (LR->valno->def =3D=3D DefIdx)
- LR->valno->setCopy(0);
- }
-}
-
/// shouldJoinPhys - Return true if a copy involving a physreg should be j=
oined.
/// We need to be careful about coalescing a source physical register with=
a
/// virtual register. Once the coalescing is done, it cannot be broken and=
these
@@ -1279,7 +1236,7 @@
}
}
=20
- // SrcReg is guarateed to be the register whose live interval that is
+ // SrcReg is guaranteed to be the register whose live interval that is
// being merged.
LIS->removeInterval(CP.getSrcReg());
=20
@@ -1368,9 +1325,9 @@
// FIXME: This is very conservative. For example, we don't handle
// physical registers.
=20
- MachineInstr *MI =3D VNI->getCopy();
+ MachineInstr *MI =3D li.getInstructionFromIndex(VNI->def);
=20
- if (!MI->isFullCopy() || CP.isPartial() || CP.isPhys())
+ if (!MI || !MI->isFullCopy() || CP.isPartial() || CP.isPhys())
return false;
=20
unsigned Dst =3D MI->getOperand(0).getReg();
@@ -1388,11 +1345,9 @@
assert(Dst =3D=3D A);
=20
VNInfo *Other =3D LR->valno;
- if (!Other->isDefByCopy())
- return false;
- const MachineInstr *OtherMI =3D Other->getCopy();
+ const MachineInstr *OtherMI =3D li.getInstructionFromIndex(Other->def);
=20
- if (!OtherMI->isFullCopy())
+ if (!OtherMI || !OtherMI->isFullCopy())
return false;
=20
unsigned OtherDst =3D OtherMI->getOperand(0).getReg();
@@ -1431,7 +1386,44 @@
// than the full interfeence check below. We allow overlapping live rang=
es
// only when one is a copy of the other.
if (CP.isPhys()) {
- for (const unsigned *AS =3D TRI->getAliasSet(CP.getDstReg()); *AS; ++A=
S){
+ // Optimization for reserved registers like ESP.
+ // We can only merge with a reserved physreg if RHS has a single value=
that
+ // is a copy of CP.DstReg(). The live range of the reserved register =
will
+ // look like a set of dead defs - we don't properly track the live ran=
ge of
+ // reserved registers.
+ if (RegClassInfo.isReserved(CP.getDstReg())) {
+ assert(CP.isFlipped() && RHS.containsOneValue() &&
+ "Invalid join with reserved register");
+ // Deny any overlapping intervals. This depends on all the reserved
+ // register live ranges to look like dead defs.
+ for (const uint16_t *AS =3D TRI->getOverlaps(CP.getDstReg()); *AS; +=
+AS) {
+ if (!LIS->hasInterval(*AS)) {
+ // Make sure at least DstReg itself exists before attempting a j=
oin.
+ if (*AS =3D=3D CP.getDstReg())
+ LIS->getOrCreateInterval(CP.getDstReg());
+ continue;
+ }
+ if (RHS.overlaps(LIS->getInterval(*AS))) {
+ DEBUG(dbgs() << "\t\tInterference: " << PrintReg(*AS, TRI) << '\=
n');
+ return false;
+ }
+ }
+ // Skip any value computations, we are not adding new values to the
+ // reserved register. Also skip merging the live ranges, the reserv=
ed
+ // register live range doesn't need to be accurate as long as all the
+ // defs are there.
+ return true;
+ }
+
+ // Check if a register mask clobbers DstReg.
+ BitVector UsableRegs;
+ if (LIS->checkRegMaskInterference(RHS, UsableRegs) &&
+ !UsableRegs.test(CP.getDstReg())) {
+ DEBUG(dbgs() << "\t\tRegister mask interference.\n");
+ return false;
+ }
+
+ for (const uint16_t *AS =3D TRI->getAliasSet(CP.getDstReg()); *AS; ++A=
S){
if (!LIS->hasInterval(*AS))
continue;
const LiveInterval &LHS =3D LIS->getInterval(*AS);
@@ -1485,12 +1477,12 @@
for (LiveInterval::vni_iterator i =3D LHS.vni_begin(), e =3D LHS.vni_end=
();
i !=3D e; ++i) {
VNInfo *VNI =3D *i;
- if (VNI->isUnused() || !VNI->isDefByCopy()) // Src not defined by a c=
opy?
+ if (VNI->isUnused() || VNI->isPHIDef())
continue;
-
- // Never join with a register that has EarlyClobber redefs.
- if (VNI->hasRedefByEC())
- return false;
+ MachineInstr *MI =3D LIS->getInstructionFromIndex(VNI->def);
+ assert(MI && "Missing def");
+ if (!MI->isCopyLike()) // Src not defined by a copy?
+ continue;
=20
// Figure out the value # from the RHS.
LiveRange *lr =3D RHS.getLiveRangeContaining(VNI->def.getPrevSlot());
@@ -1499,7 +1491,6 @@
=20
// DstReg is known to be a register in the LHS interval. If the src is
// from the RHS interval, we can use its value #.
- MachineInstr *MI =3D VNI->getCopy();
if (!CP.isCoalescable(MI) &&
!RegistersDefinedFromSameValue(*LIS, *TRI, CP, VNI, lr, DupCopies))
continue;
@@ -1512,12 +1503,12 @@
for (LiveInterval::vni_iterator i =3D RHS.vni_begin(), e =3D RHS.vni_end=
();
i !=3D e; ++i) {
VNInfo *VNI =3D *i;
- if (VNI->isUnused() || !VNI->isDefByCopy()) // Src not defined by a c=
opy?
+ if (VNI->isUnused() || VNI->isPHIDef())
continue;
-
- // Never join with a register that has EarlyClobber redefs.
- if (VNI->hasRedefByEC())
- return false;
+ MachineInstr *MI =3D LIS->getInstructionFromIndex(VNI->def);
+ assert(MI && "Missing def");
+ if (!MI->isCopyLike()) // Src not defined by a copy?
+ continue;
=20
// Figure out the value # from the LHS.
LiveRange *lr =3D LHS.getLiveRangeContaining(VNI->def.getPrevSlot());
@@ -1526,7 +1517,6 @@
=20
// DstReg is known to be a register in the RHS interval. If the src is
// from the LHS interval, we can use its value #.
- MachineInstr *MI =3D VNI->getCopy();
if (!CP.isCoalescable(MI) &&
!RegistersDefinedFromSameValue(*LIS, *TRI, CP, VNI, lr, DupCopies))
continue;
@@ -1600,10 +1590,6 @@
if (LHSValNoAssignments[I->valno->id] !=3D
RHSValNoAssignments[J->valno->id])
return false;
- // If it's re-defined by an early clobber somewhere in the live rang=
e,
- // then conservatively abort coalescing.
- if (NewVNInfo[LHSValNoAssignments[I->valno->id]]->hasRedefByEC())
- return false;
}
=20
if (I->end < J->end)
@@ -1905,8 +1891,8 @@
unsigned Reg =3D MO.getReg();
if (!Reg)
continue;
+ DeadDefs.push_back(Reg);
if (TargetRegisterInfo::isVirtualRegister(Reg)) {
- DeadDefs.push_back(Reg);
// Remat may also enable register class inflation.
if (RegClassInfo.isProperSubClass(MRI->getRegClass(Reg)))
InflateRegs.push_back(Reg);
@@ -1936,7 +1922,7 @@
=20
// Check for now unnecessary kill flags.
if (LIS->isNotInMIMap(MI)) continue;
- SlotIndex DefIdx =3D LIS->getInstructionIndex(MI).getDefIndex();
+ SlotIndex DefIdx =3D LIS->getInstructionIndex(MI).getRegSlot();
for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
MachineOperand &MO =3D MI->getOperand(i);
if (!MO.isReg() || !MO.isKill()) continue;
@@ -1950,7 +1936,7 @@
// remain alive.
if (!TargetRegisterInfo::isPhysicalRegister(reg))
continue;
- for (const unsigned *SR =3D TRI->getSubRegisters(reg);
+ for (const uint16_t *SR =3D TRI->getSubRegisters(reg);
unsigned S =3D *SR; ++SR)
if (LIS->hasInterval(S) && LIS->getInterval(S).liveAt(DefIdx))
MI->addRegisterDefined(S, TRI);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Register=
Coalescer.h
--- a/head/contrib/llvm/lib/CodeGen/RegisterCoalescer.h Tue Apr 17 11:36:47=
2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/RegisterCoalescer.h Tue Apr 17 11:51:51=
2012 +0300
@@ -1,4 +1,4 @@
-//=3D=3D=3D-- RegisterCoalescer.h - Register Coalescing Interface ------*-=
C++ -*-=3D=3D=3D//
+//=3D=3D=3D-- RegisterCoalescer.h - Register Coalescing Interface -----*- =
C++ -*-=3D=3D=3D//
//
// The LLVM Compiler Infrastructure
//
@@ -7,7 +7,7 @@
//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
//
-// This file contains the abstract interface for register coalescers,=20
+// This file contains the abstract interface for register coalescers,
// allowing them to interact with and query register allocators.
//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -47,7 +47,7 @@
/// CrossClass - True when both regs are virtual, and newRC is constra=
ined.
bool CrossClass;
=20
- /// Flipped - True when DstReg and SrcReg are reversed from the oriign=
al
+ /// Flipped - True when DstReg and SrcReg are reversed from the origin=
al
/// copy instruction.
bool Flipped;
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Register=
Scavenging.cpp
--- a/head/contrib/llvm/lib/CodeGen/RegisterScavenging.cpp Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/RegisterScavenging.cpp Tue Apr 17 11:51=
:51 2012 +0300
@@ -37,7 +37,7 @@
void RegScavenger::setUsed(unsigned Reg) {
RegsAvailable.reset(Reg);
=20
- for (const unsigned *SubRegs =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *SubRegs =3D TRI->getSubRegisters(Reg);
unsigned SubReg =3D *SubRegs; ++SubRegs)
RegsAvailable.reset(SubReg);
}
@@ -45,7 +45,7 @@
bool RegScavenger::isAliasUsed(unsigned Reg) const {
if (isUsed(Reg))
return true;
- for (const unsigned *R =3D TRI->getAliasSet(Reg); *R; ++R)
+ for (const uint16_t *R =3D TRI->getAliasSet(Reg); *R; ++R)
if (isUsed(*R))
return true;
return false;
@@ -59,9 +59,6 @@
// All registers started out unused.
RegsAvailable.set();
=20
- // Reserved registers are always used.
- RegsAvailable ^=3D ReservedRegs;
-
if (!MBB)
return;
=20
@@ -86,17 +83,24 @@
assert((NumPhysRegs =3D=3D 0 || NumPhysRegs =3D=3D TRI->getNumRegs()) &&
"Target changed?");
=20
+ // It is not possible to use the register scavenger after late optimizat=
ion
+ // passes that don't preserve accurate liveness information.
+ assert(MRI->tracksLiveness() &&
+ "Cannot use register scavenger with inaccurate liveness");
+
// Self-initialize.
if (!MBB) {
NumPhysRegs =3D TRI->getNumRegs();
RegsAvailable.resize(NumPhysRegs);
+ KillRegs.resize(NumPhysRegs);
+ DefRegs.resize(NumPhysRegs);
=20
// Create reserved registers bitvector.
ReservedRegs =3D TRI->getReservedRegs(MF);
=20
// Create callee-saved registers bitvector.
CalleeSavedRegs.resize(NumPhysRegs);
- const unsigned *CSRegs =3D TRI->getCalleeSavedRegs();
+ const uint16_t *CSRegs =3D TRI->getCalleeSavedRegs(&MF);
if (CSRegs !=3D NULL)
for (unsigned i =3D 0; CSRegs[i]; ++i)
CalleeSavedRegs.set(CSRegs[i]);
@@ -110,13 +114,7 @@
=20
void RegScavenger::addRegWithSubRegs(BitVector &BV, unsigned Reg) {
BV.set(Reg);
- for (const unsigned *R =3D TRI->getSubRegisters(Reg); *R; R++)
- BV.set(*R);
-}
-
-void RegScavenger::addRegWithAliases(BitVector &BV, unsigned Reg) {
- BV.set(Reg);
- for (const unsigned *R =3D TRI->getAliasSet(Reg); *R; R++)
+ for (const uint16_t *R =3D TRI->getSubRegisters(Reg); *R; R++)
BV.set(*R);
}
=20
@@ -148,12 +146,12 @@
// predicated, conservatively assume "kill" markers do not actually kill=
the
// register. Similarly ignores "dead" markers.
bool isPred =3D TII->isPredicated(MI);
- BitVector EarlyClobberRegs(NumPhysRegs);
- BitVector KillRegs(NumPhysRegs);
- BitVector DefRegs(NumPhysRegs);
- BitVector DeadRegs(NumPhysRegs);
+ KillRegs.reset();
+ DefRegs.reset();
for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
const MachineOperand &MO =3D MI->getOperand(i);
+ if (MO.isRegMask())
+ (isPred ? DefRegs : KillRegs).setBitsNotInMask(MO.getRegMask());
if (!MO.isReg())
continue;
unsigned Reg =3D MO.getReg();
@@ -164,21 +162,19 @@
// Ignore undef uses.
if (MO.isUndef())
continue;
- // Two-address operands implicitly kill.
- if (!isPred && (MO.isKill() || MI->isRegTiedToDefOperand(i)))
+ if (!isPred && MO.isKill())
addRegWithSubRegs(KillRegs, Reg);
} else {
assert(MO.isDef());
if (!isPred && MO.isDead())
- addRegWithSubRegs(DeadRegs, Reg);
+ addRegWithSubRegs(KillRegs, Reg);
else
addRegWithSubRegs(DefRegs, Reg);
- if (MO.isEarlyClobber())
- addRegWithAliases(EarlyClobberRegs, Reg);
}
}
=20
// Verify uses and defs.
+#ifndef NDEBUG
for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
const MachineOperand &MO =3D MI->getOperand(i);
if (!MO.isReg())
@@ -199,17 +195,18 @@
// Ideally we would like a way to model this, but leaving the
// insert_subreg around causes both correctness and performance is=
sues.
bool SubUsed =3D false;
- for (const unsigned *SubRegs =3D TRI->getSubRegisters(Reg);
+ for (const uint16_t *SubRegs =3D TRI->getSubRegisters(Reg);
unsigned SubReg =3D *SubRegs; ++SubRegs)
if (isUsed(SubReg)) {
SubUsed =3D true;
break;
}
- assert(SubUsed && "Using an undefined register!");
+ if (!SubUsed) {
+ MBB->getParent()->verify(NULL, "In Register Scavenger");
+ llvm_unreachable("Using an undefined register!");
+ }
(void)SubUsed;
}
- assert((!EarlyClobberRegs.test(Reg) || MI->isRegTiedToDefOperand(i))=
&&
- "Using an early clobbered register!");
} else {
assert(MO.isDef());
#if 0
@@ -221,18 +218,20 @@
#endif
}
}
+#endif // NDEBUG
=20
// Commit the changes.
setUnused(KillRegs);
- setUnused(DeadRegs);
setUsed(DefRegs);
}
=20
void RegScavenger::getRegsUsed(BitVector &used, bool includeReserved) {
+ used =3D RegsAvailable;
+ used.flip();
if (includeReserved)
- used =3D ~RegsAvailable;
+ used |=3D ReservedRegs;
else
- used =3D ~RegsAvailable & ~ReservedRegs;
+ used.reset(ReservedRegs);
}
=20
unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RC) const {
@@ -286,6 +285,8 @@
// Remove any candidates touched by instruction.
for (unsigned i =3D 0, e =3D MI->getNumOperands(); i !=3D e; ++i) {
const MachineOperand &MO =3D MI->getOperand(i);
+ if (MO.isRegMask())
+ Candidates.clearBitsNotInMask(MO.getRegMask());
if (!MO.isReg() || MO.isUndef() || !MO.getReg())
continue;
if (TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
@@ -296,7 +297,7 @@
continue;
}
Candidates.reset(MO.getReg());
- for (const unsigned *R =3D TRI->getAliasSet(MO.getReg()); *R; R++)
+ for (const uint16_t *R =3D TRI->getAliasSet(MO.getReg()); *R; R++)
Candidates.reset(*R);
}
// If we're not in a virtual reg's live range, this is a valid
@@ -347,9 +348,9 @@
// RegsAvailable, as RegsAvailable does not take aliases into account.
// That's what getRegsAvailable() is for.
BitVector Available =3D getRegsAvailable(RC);
-
- if ((Candidates & Available).any())
- Candidates &=3D Available;
+ Available &=3D Candidates;
+ if (Available.any())
+ Candidates =3D Available;
=20
// Find the register whose use is furthest away.
MachineBasicBlock::iterator UseMI;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/RenderMa=
chineFunction.cpp
--- a/head/contrib/llvm/lib/CodeGen/RenderMachineFunction.cpp Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/RenderMachineFunction.cpp Tue Apr 17 11=
:51:51 2012 +0300
@@ -1,4 +1,4 @@
-//=3D=3D=3D-- llvm/CodeGen/RenderMachineFunction.cpp - MF->HTML -----s----=
-------=3D=3D=3D//
+//=3D=3D=3D-- llvm/CodeGen/RenderMachineFunction.cpp - MF->HTML ----------=
-------=3D=3D=3D//
//
// The LLVM Compiler Infrastructure
//
@@ -560,12 +560,13 @@
=20
// For uses/defs recorded use/def indexes override current liveness and
// instruction operands (Only for the interval which records the index=
es).
- if (i.isUse() || i.isDef()) {
+ // FIXME: This is all wrong, uses and defs share the same slots.
+ if (i.isEarlyClobber() || i.isRegister()) {
UseDefs::const_iterator udItr =3D useDefs.find(li);
if (udItr !=3D useDefs.end()) {
const SlotSet &slotSet =3D udItr->second;
if (slotSet.count(i)) {
- if (i.isUse()) {
+ if (i.isEarlyClobber()) {
return Used;
}
// else
@@ -586,9 +587,9 @@
return AliveStack;
}
} else {
- if (i.isDef() && mi->definesRegister(li->reg, tri)) {
+ if (i.isRegister() && mi->definesRegister(li->reg, tri)) {
return Defined;
- } else if (i.isUse() && mi->readsRegister(li->reg)) {
+ } else if (i.isEarlyClobber() && mi->readsRegister(li->reg)) {
return Used;
} else {
if (vrm =3D=3D 0 ||=20
@@ -804,7 +805,7 @@
os << indent + s(2) << "<tr height=3D6ex>\n";
=20
// Render the code column.
- if (i.isLoad()) {
+ if (i.isBlock()) {
MachineBasicBlock *mbb =3D sis->getMBBFromIndex(i);
mi =3D sis->getInstructionFromIndex(i);
=20
@@ -823,7 +824,7 @@
}
os << indent + s(4) << "</td>\n";
} else {
- i =3D i.getStoreIndex(); // <- Will be incremented to the next i=
ndex.
+ i =3D i.getDeadSlot(); // <- Will be incremented to the next ind=
ex.
continue;
}
}
@@ -952,10 +953,10 @@
rItr !=3D rEnd; ++rItr) {
const MachineInstr *mi =3D &*rItr;
if (mi->readsRegister(li->reg)) {
- useDefs[li].insert(lis->getInstructionIndex(mi).getUseIndex());
+ useDefs[li].insert(lis->getInstructionIndex(mi).getRegSlot(true));
}
if (mi->definesRegister(li->reg)) {
- useDefs[li].insert(lis->getInstructionIndex(mi).getDefIndex());
+ useDefs[li].insert(lis->getInstructionIndex(mi).getRegSlot());
}
}
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Schedule=
DAG.cpp
--- a/head/contrib/llvm/lib/CodeGen/ScheduleDAG.cpp Tue Apr 17 11:36:47 201=
2 +0300
+++ b/head/contrib/llvm/lib/CodeGen/ScheduleDAG.cpp Tue Apr 17 11:51:51 201=
2 +0300
@@ -31,6 +31,8 @@
cl::desc("Stress test instruction scheduling"));
#endif
=20
+void SchedulingPriorityQueue::anchor() { }
+
ScheduleDAG::ScheduleDAG(MachineFunction &mf)
: TM(mf.getTarget()),
TII(TM.getInstrInfo()),
@@ -44,44 +46,19 @@
=20
ScheduleDAG::~ScheduleDAG() {}
=20
+/// Clear the DAG state (e.g. between scheduling regions).
+void ScheduleDAG::clearDAG() {
+ SUnits.clear();
+ EntrySU =3D SUnit();
+ ExitSU =3D SUnit();
+}
+
/// getInstrDesc helper to handle SDNodes.
const MCInstrDesc *ScheduleDAG::getNodeDesc(const SDNode *Node) const {
if (!Node || !Node->isMachineOpcode()) return NULL;
return &TII->get(Node->getMachineOpcode());
}
=20
-/// dump - dump the schedule.
-void ScheduleDAG::dumpSchedule() const {
- for (unsigned i =3D 0, e =3D Sequence.size(); i !=3D e; i++) {
- if (SUnit *SU =3D Sequence[i])
- SU->dump(this);
- else
- dbgs() << "**** NOOP ****\n";
- }
-}
-
-
-/// Run - perform scheduling.
-///
-void ScheduleDAG::Run(MachineBasicBlock *bb,
- MachineBasicBlock::iterator insertPos) {
- BB =3D bb;
- InsertPos =3D insertPos;
-
- SUnits.clear();
- Sequence.clear();
- EntrySU =3D SUnit();
- ExitSU =3D SUnit();
-
- Schedule();
-
- DEBUG({
- dbgs() << "*** Final schedule ***\n";
- dumpSchedule();
- dbgs() << '\n';
- });
-}
-
/// addPred - This adds the specified edge as a pred of the current node if
/// not already. It also adds the current node as a successor of the
/// specified node.
@@ -313,13 +290,12 @@
case SDep::Output: dbgs() << "out "; break;
case SDep::Order: dbgs() << "ch "; break;
}
- dbgs() << "#";
- dbgs() << I->getSUnit() << " - SU(" << I->getSUnit()->NodeNum << ")";
+ dbgs() << "SU(" << I->getSUnit()->NodeNum << ")";
if (I->isArtificial())
dbgs() << " *";
dbgs() << ": Latency=3D" << I->getLatency();
if (I->isAssignedRegDep())
- dbgs() << " Reg=3D" << G->TRI->getName(I->getReg());
+ dbgs() << " Reg=3D" << PrintReg(I->getReg(), G->TRI);
dbgs() << "\n";
}
}
@@ -334,8 +310,7 @@
case SDep::Output: dbgs() << "out "; break;
case SDep::Order: dbgs() << "ch "; break;
}
- dbgs() << "#";
- dbgs() << I->getSUnit() << " - SU(" << I->getSUnit()->NodeNum << ")";
+ dbgs() << "SU(" << I->getSUnit()->NodeNum << ")";
if (I->isArtificial())
dbgs() << " *";
dbgs() << ": Latency=3D" << I->getLatency();
@@ -346,13 +321,12 @@
}
=20
#ifndef NDEBUG
-/// VerifySchedule - Verify that all SUnits were scheduled and that
-/// their state is consistent.
+/// VerifyScheduledDAG - Verify that all SUnits were scheduled and that
+/// their state is consistent. Return the number of scheduled nodes.
///
-void ScheduleDAG::VerifySchedule(bool isBottomUp) {
+unsigned ScheduleDAG::VerifyScheduledDAG(bool isBottomUp) {
bool AnyNotSched =3D false;
unsigned DeadNodes =3D 0;
- unsigned Noops =3D 0;
for (unsigned i =3D 0, e =3D SUnits.size(); i !=3D e; ++i) {
if (!SUnits[i].isScheduled) {
if (SUnits[i].NumPreds =3D=3D 0 && SUnits[i].NumSuccs =3D=3D 0) {
@@ -393,12 +367,8 @@
}
}
}
- for (unsigned i =3D 0, e =3D Sequence.size(); i !=3D e; ++i)
- if (!Sequence[i])
- ++Noops;
assert(!AnyNotSched);
- assert(Sequence.size() + DeadNodes - Noops =3D=3D SUnits.size() &&
- "The number of nodes scheduled doesn't match the expected number!=
");
+ return SUnits.size() - DeadNodes;
}
#endif
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Schedule=
DAGInstrs.cpp
--- a/head/contrib/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp Tue Apr 17 11:36:=
47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp Tue Apr 17 11:51:=
51 2012 +0300
@@ -13,14 +13,15 @@
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
#define DEBUG_TYPE "sched-instrs"
-#include "ScheduleDAGInstrs.h"
#include "llvm/Operator.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/ValueTracking.h"
+#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/PseudoSourceValue.h"
+#include "llvm/CodeGen/ScheduleDAGInstrs.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetInstrInfo.h"
@@ -33,25 +34,17 @@
=20
ScheduleDAGInstrs::ScheduleDAGInstrs(MachineFunction &mf,
const MachineLoopInfo &mli,
- const MachineDominatorTree &mdt)
+ const MachineDominatorTree &mdt,
+ bool IsPostRAFlag,
+ LiveIntervals *lis)
: ScheduleDAG(mf), MLI(mli), MDT(mdt), MFI(mf.getFrameInfo()),
- InstrItins(mf.getTarget().getInstrItineraryData()),
- Defs(TRI->getNumRegs()), Uses(TRI->getNumRegs()),
- LoopRegs(MLI, MDT), FirstDbgValue(0) {
+ InstrItins(mf.getTarget().getInstrItineraryData()), LIS(lis),
+ IsPostRA(IsPostRAFlag), UnitLatencies(false), LoopRegs(MLI, MDT),
+ FirstDbgValue(0) {
+ assert((IsPostRA || LIS) && "PreRA scheduling requires LiveIntervals");
DbgValues.clear();
-}
-
-/// Run - perform scheduling.
-///
-void ScheduleDAGInstrs::Run(MachineBasicBlock *bb,
- MachineBasicBlock::iterator begin,
- MachineBasicBlock::iterator end,
- unsigned endcount) {
- BB =3D bb;
- Begin =3D begin;
- InsertPosIndex =3D endcount;
-
- ScheduleDAG::Run(bb, end);
+ assert(!(IsPostRA && MRI.getNumVirtRegs()) &&
+ "Virtual registers must be removed prior to PostRA scheduling");
}
=20
/// getUnderlyingObjectFromInt - This is the function that does the work of
@@ -133,19 +126,58 @@
return 0;
}
=20
-void ScheduleDAGInstrs::StartBlock(MachineBasicBlock *BB) {
+void ScheduleDAGInstrs::startBlock(MachineBasicBlock *BB) {
LoopRegs.Deps.clear();
if (MachineLoop *ML =3D MLI.getLoopFor(BB))
- if (BB =3D=3D ML->getLoopLatch()) {
- MachineBasicBlock *Header =3D ML->getHeader();
- for (MachineBasicBlock::livein_iterator I =3D Header->livein_begin(),
- E =3D Header->livein_end(); I !=3D E; ++I)
- LoopLiveInRegs.insert(*I);
+ if (BB =3D=3D ML->getLoopLatch())
LoopRegs.VisitLoop(ML);
- }
}
=20
-/// AddSchedBarrierDeps - Add dependencies from instructions in the current
+void ScheduleDAGInstrs::finishBlock() {
+ // Nothing to do.
+}
+
+/// Initialize the map with the number of registers.
+void Reg2SUnitsMap::setRegLimit(unsigned Limit) {
+ PhysRegSet.setUniverse(Limit);
+ SUnits.resize(Limit);
+}
+
+/// Clear the map without deallocating storage.
+void Reg2SUnitsMap::clear() {
+ for (const_iterator I =3D reg_begin(), E =3D reg_end(); I !=3D E; ++I) {
+ SUnits[*I].clear();
+ }
+ PhysRegSet.clear();
+}
+
+/// Initialize the DAG and common scheduler state for the current scheduli=
ng
+/// region. This does not actually create the DAG, only clears it. The
+/// scheduling driver may call BuildSchedGraph multiple times per scheduli=
ng
+/// region.
+void ScheduleDAGInstrs::enterRegion(MachineBasicBlock *bb,
+ MachineBasicBlock::iterator begin,
+ MachineBasicBlock::iterator end,
+ unsigned endcount) {
+ BB =3D bb;
+ RegionBegin =3D begin;
+ RegionEnd =3D end;
+ EndIndex =3D endcount;
+ MISUnitMap.clear();
+
+ // Check to see if the scheduler cares about latencies.
+ UnitLatencies =3D forceUnitLatencies();
+
+ ScheduleDAG::clearDAG();
+}
+
+/// Close the current scheduling region. Don't clear any state in case the
+/// driver wants to refer to the previous scheduling region.
+void ScheduleDAGInstrs::exitRegion() {
+ // Nothing to do.
+}
+
+/// addSchedBarrierDeps - Add dependencies from instructions in the current
/// list of instructions being scheduled to scheduling barrier by adding
/// the exit SU to the register defs and use list. This is because we want=
to
/// make sure instructions which define registers that are either used by
@@ -153,11 +185,11 @@
/// especially important when the definition latency of the return value(s)
/// are too high to be hidden by the branch or when the liveout registers
/// used by instructions in the fallthrough block.
-void ScheduleDAGInstrs::AddSchedBarrierDeps() {
- MachineInstr *ExitMI =3D InsertPos !=3D BB->end() ? &*InsertPos : 0;
+void ScheduleDAGInstrs::addSchedBarrierDeps() {
+ MachineInstr *ExitMI =3D RegionEnd !=3D BB->end() ? &*RegionEnd : 0;
ExitSU.setInstr(ExitMI);
bool AllDepKnown =3D ExitMI &&
- (ExitMI->getDesc().isCall() || ExitMI->getDesc().isBarrier());
+ (ExitMI->isCall() || ExitMI->isBarrier());
if (ExitMI && AllDepKnown) {
// If it's a call or a barrier, add dependencies on the defs and uses =
of
// instruction.
@@ -167,29 +199,313 @@
unsigned Reg =3D MO.getReg();
if (Reg =3D=3D 0) continue;
=20
- assert(TRI->isPhysicalRegister(Reg) && "Virtual register encountered=
!");
- Uses[Reg].push_back(&ExitSU);
+ if (TRI->isPhysicalRegister(Reg))
+ Uses[Reg].push_back(&ExitSU);
+ else {
+ assert(!IsPostRA && "Virtual register encountered after regalloc."=
);
+ addVRegUseDeps(&ExitSU, i);
+ }
}
} else {
// For others, e.g. fallthrough, conditional branch, assume the exit
// uses all the registers that are livein to the successor blocks.
- SmallSet<unsigned, 8> Seen;
+ assert(Uses.empty() && "Uses in set before adding deps?");
for (MachineBasicBlock::succ_iterator SI =3D BB->succ_begin(),
SE =3D BB->succ_end(); SI !=3D SE; ++SI)
for (MachineBasicBlock::livein_iterator I =3D (*SI)->livein_begin(),
E =3D (*SI)->livein_end(); I !=3D E; ++I) {
unsigned Reg =3D *I;
- if (Seen.insert(Reg))
+ if (!Uses.contains(Reg))
Uses[Reg].push_back(&ExitSU);
}
}
}
=20
-void ScheduleDAGInstrs::BuildSchedGraph(AliasAnalysis *AA) {
- // We'll be allocating one SUnit for each instruction, plus one for
- // the region exit node.
+/// MO is an operand of SU's instruction that defines a physical register.=
Add
+/// data dependencies from SU to any uses of the physical register.
+void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU,
+ const MachineOperand &MO) {
+ assert(MO.isDef() && "expect physreg def");
+
+ // Ask the target if address-backscheduling is desirable, and if so how =
much.
+ const TargetSubtargetInfo &ST =3D TM.getSubtarget<TargetSubtargetInfo>();
+ unsigned SpecialAddressLatency =3D ST.getSpecialAddressLatency();
+ unsigned DataLatency =3D SU->Latency;
+
+ for (const uint16_t *Alias =3D TRI->getOverlaps(MO.getReg()); *Alias; ++=
Alias) {
+ if (!Uses.contains(*Alias))
+ continue;
+ std::vector<SUnit*> &UseList =3D Uses[*Alias];
+ for (unsigned i =3D 0, e =3D UseList.size(); i !=3D e; ++i) {
+ SUnit *UseSU =3D UseList[i];
+ if (UseSU =3D=3D SU)
+ continue;
+ unsigned LDataLatency =3D DataLatency;
+ // Optionally add in a special extra latency for nodes that
+ // feed addresses.
+ // TODO: Perhaps we should get rid of
+ // SpecialAddressLatency and just move this into
+ // adjustSchedDependency for the targets that care about it.
+ if (SpecialAddressLatency !=3D 0 && !UnitLatencies &&
+ UseSU !=3D &ExitSU) {
+ MachineInstr *UseMI =3D UseSU->getInstr();
+ const MCInstrDesc &UseMCID =3D UseMI->getDesc();
+ int RegUseIndex =3D UseMI->findRegisterUseOperandIdx(*Alias);
+ assert(RegUseIndex >=3D 0 && "UseMI doesn't use register!");
+ if (RegUseIndex >=3D 0 &&
+ (UseMI->mayLoad() || UseMI->mayStore()) &&
+ (unsigned)RegUseIndex < UseMCID.getNumOperands() &&
+ UseMCID.OpInfo[RegUseIndex].isLookupPtrRegClass())
+ LDataLatency +=3D SpecialAddressLatency;
+ }
+ // Adjust the dependence latency using operand def/use
+ // information (if any), and then allow the target to
+ // perform its own adjustments.
+ const SDep& dep =3D SDep(SU, SDep::Data, LDataLatency, *Alias);
+ if (!UnitLatencies) {
+ computeOperandLatency(SU, UseSU, const_cast<SDep &>(dep));
+ ST.adjustSchedDependency(SU, UseSU, const_cast<SDep &>(dep));
+ }
+ UseSU->addPred(dep);
+ }
+ }
+}
+
+/// addPhysRegDeps - Add register dependencies (data, anti, and output) fr=
om
+/// this SUnit to following instructions in the same scheduling region that
+/// depend the physical register referenced at OperIdx.
+void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) {
+ const MachineInstr *MI =3D SU->getInstr();
+ const MachineOperand &MO =3D MI->getOperand(OperIdx);
+
+ // Optionally add output and anti dependencies. For anti
+ // dependencies we use a latency of 0 because for a multi-issue
+ // target we want to allow the defining instruction to issue
+ // in the same cycle as the using instruction.
+ // TODO: Using a latency of 1 here for output dependencies assumes
+ // there's no cost for reusing registers.
+ SDep::Kind Kind =3D MO.isUse() ? SDep::Anti : SDep::Output;
+ for (const uint16_t *Alias =3D TRI->getOverlaps(MO.getReg()); *Alias; ++=
Alias) {
+ if (!Defs.contains(*Alias))
+ continue;
+ std::vector<SUnit *> &DefList =3D Defs[*Alias];
+ for (unsigned i =3D 0, e =3D DefList.size(); i !=3D e; ++i) {
+ SUnit *DefSU =3D DefList[i];
+ if (DefSU =3D=3D &ExitSU)
+ continue;
+ if (DefSU !=3D SU &&
+ (Kind !=3D SDep::Output || !MO.isDead() ||
+ !DefSU->getInstr()->registerDefIsDead(*Alias))) {
+ if (Kind =3D=3D SDep::Anti)
+ DefSU->addPred(SDep(SU, Kind, 0, /*Reg=3D*/*Alias));
+ else {
+ unsigned AOLat =3D TII->getOutputLatency(InstrItins, MI, OperIdx,
+ DefSU->getInstr());
+ DefSU->addPred(SDep(SU, Kind, AOLat, /*Reg=3D*/*Alias));
+ }
+ }
+ }
+ }
+
+ if (!MO.isDef()) {
+ // Either insert a new Reg2SUnits entry with an empty SUnits list, or
+ // retrieve the existing SUnits list for this register's uses.
+ // Push this SUnit on the use list.
+ Uses[MO.getReg()].push_back(SU);
+ }
+ else {
+ addPhysRegDataDeps(SU, MO);
+
+ // Either insert a new Reg2SUnits entry with an empty SUnits list, or
+ // retrieve the existing SUnits list for this register's defs.
+ std::vector<SUnit *> &DefList =3D Defs[MO.getReg()];
+
+ // If a def is going to wrap back around to the top of the loop,
+ // backschedule it.
+ if (!UnitLatencies && DefList.empty()) {
+ LoopDependencies::LoopDeps::iterator I =3D LoopRegs.Deps.find(MO.get=
Reg());
+ if (I !=3D LoopRegs.Deps.end()) {
+ const MachineOperand *UseMO =3D I->second.first;
+ unsigned Count =3D I->second.second;
+ const MachineInstr *UseMI =3D UseMO->getParent();
+ unsigned UseMOIdx =3D UseMO - &UseMI->getOperand(0);
+ const MCInstrDesc &UseMCID =3D UseMI->getDesc();
+ const TargetSubtargetInfo &ST =3D
+ TM.getSubtarget<TargetSubtargetInfo>();
+ unsigned SpecialAddressLatency =3D ST.getSpecialAddressLatency();
+ // TODO: If we knew the total depth of the region here, we could
+ // handle the case where the whole loop is inside the region but
+ // is large enough that the isScheduleHigh trick isn't needed.
+ if (UseMOIdx < UseMCID.getNumOperands()) {
+ // Currently, we only support scheduling regions consisting of
+ // single basic blocks. Check to see if the instruction is in
+ // the same region by checking to see if it has the same parent.
+ if (UseMI->getParent() !=3D MI->getParent()) {
+ unsigned Latency =3D SU->Latency;
+ if (UseMCID.OpInfo[UseMOIdx].isLookupPtrRegClass())
+ Latency +=3D SpecialAddressLatency;
+ // This is a wild guess as to the portion of the latency which
+ // will be overlapped by work done outside the current
+ // scheduling region.
+ Latency -=3D std::min(Latency, Count);
+ // Add the artificial edge.
+ ExitSU.addPred(SDep(SU, SDep::Order, Latency,
+ /*Reg=3D*/0, /*isNormalMemory=3D*/false,
+ /*isMustAlias=3D*/false,
+ /*isArtificial=3D*/true));
+ } else if (SpecialAddressLatency > 0 &&
+ UseMCID.OpInfo[UseMOIdx].isLookupPtrRegClass()) {
+ // The entire loop body is within the current scheduling region
+ // and the latency of this operation is assumed to be greater
+ // than the latency of the loop.
+ // TODO: Recursively mark data-edge predecessors as
+ // isScheduleHigh too.
+ SU->isScheduleHigh =3D true;
+ }
+ }
+ LoopRegs.Deps.erase(I);
+ }
+ }
+
+ // clear this register's use list
+ if (Uses.contains(MO.getReg()))
+ Uses[MO.getReg()].clear();
+
+ if (!MO.isDead())
+ DefList.clear();
+
+ // Calls will not be reordered because of chain dependencies (see
+ // below). Since call operands are dead, calls may continue to be added
+ // to the DefList making dependence checking quadratic in the size of
+ // the block. Instead, we leave only one call at the back of the
+ // DefList.
+ if (SU->isCall) {
+ while (!DefList.empty() && DefList.back()->isCall)
+ DefList.pop_back();
+ }
+ // Defs are pushed in the order they are visited and never reordered.
+ DefList.push_back(SU);
+ }
+}
+
+/// addVRegDefDeps - Add register output and data dependencies from this S=
Unit
+/// to instructions that occur later in the same scheduling region if they=
read
+/// from or write to the virtual register defined at OperIdx.
+///
+/// TODO: Hoist loop induction variable increments. This has to be
+/// reevaluated. Generally, IV scheduling should be done before coalescing.
+void ScheduleDAGInstrs::addVRegDefDeps(SUnit *SU, unsigned OperIdx) {
+ const MachineInstr *MI =3D SU->getInstr();
+ unsigned Reg =3D MI->getOperand(OperIdx).getReg();
+
+ // SSA defs do not have output/anti dependencies.
+ // The current operand is a def, so we have at least one.
+ if (llvm::next(MRI.def_begin(Reg)) =3D=3D MRI.def_end())
+ return;
+
+ // Add output dependence to the next nearest def of this vreg.
+ //
+ // Unless this definition is dead, the output dependence should be
+ // transitively redundant with antidependencies from this definition's
+ // uses. We're conservative for now until we have a way to guarantee the=
uses
+ // are not eliminated sometime during scheduling. The output dependence =
edge
+ // is also useful if output latency exceeds def-use latency.
+ VReg2SUnitMap::iterator DefI =3D findVRegDef(Reg);
+ if (DefI =3D=3D VRegDefs.end())
+ VRegDefs.insert(VReg2SUnit(Reg, SU));
+ else {
+ SUnit *DefSU =3D DefI->SU;
+ if (DefSU !=3D SU && DefSU !=3D &ExitSU) {
+ unsigned OutLatency =3D TII->getOutputLatency(InstrItins, MI, OperId=
x,
+ DefSU->getInstr());
+ DefSU->addPred(SDep(SU, SDep::Output, OutLatency, Reg));
+ }
+ DefI->SU =3D SU;
+ }
+}
+
+/// addVRegUseDeps - Add a register data dependency if the instruction that
+/// defines the virtual register used at OperIdx is mapped to an SUnit. Ad=
d a
+/// register antidependency from this SUnit to instructions that occur lat=
er in
+/// the same scheduling region if they write the virtual register.
+///
+/// TODO: Handle ExitSU "uses" properly.
+void ScheduleDAGInstrs::addVRegUseDeps(SUnit *SU, unsigned OperIdx) {
+ MachineInstr *MI =3D SU->getInstr();
+ unsigned Reg =3D MI->getOperand(OperIdx).getReg();
+
+ // Lookup this operand's reaching definition.
+ assert(LIS && "vreg dependencies requires LiveIntervals");
+ SlotIndex UseIdx =3D LIS->getInstructionIndex(MI).getRegSlot();
+ LiveInterval *LI =3D &LIS->getInterval(Reg);
+ VNInfo *VNI =3D LI->getVNInfoBefore(UseIdx);
+ // VNI will be valid because MachineOperand::readsReg() is checked by ca=
ller.
+ MachineInstr *Def =3D LIS->getInstructionFromIndex(VNI->def);
+ // Phis and other noninstructions (after coalescing) have a NULL Def.
+ if (Def) {
+ SUnit *DefSU =3D getSUnit(Def);
+ if (DefSU) {
+ // The reaching Def lives within this scheduling region.
+ // Create a data dependence.
+ //
+ // TODO: Handle "special" address latencies cleanly.
+ const SDep &dep =3D SDep(DefSU, SDep::Data, DefSU->Latency, Reg);
+ if (!UnitLatencies) {
+ // Adjust the dependence latency using operand def/use information=
, then
+ // allow the target to perform its own adjustments.
+ computeOperandLatency(DefSU, SU, const_cast<SDep &>(dep));
+ const TargetSubtargetInfo &ST =3D TM.getSubtarget<TargetSubtargetI=
nfo>();
+ ST.adjustSchedDependency(DefSU, SU, const_cast<SDep &>(dep));
+ }
+ SU->addPred(dep);
+ }
+ }
+
+ // Add antidependence to the following def of the vreg it uses.
+ VReg2SUnitMap::iterator DefI =3D findVRegDef(Reg);
+ if (DefI !=3D VRegDefs.end() && DefI->SU !=3D SU)
+ DefI->SU->addPred(SDep(SU, SDep::Anti, 0, Reg));
+}
+
+/// Create an SUnit for each real instruction, numbered in top-down toplol=
ogical
+/// order. The instruction order A < B, implies that no edge exists from B=
to A.
+///
+/// Map each real instruction to its SUnit.
+///
+/// After initSUnits, the SUnits vector cannot be resized and the schedule=
r may
+/// hang onto SUnit pointers. We may relax this in the future by using SUn=
it IDs
+/// instead of pointers.
+///
+/// MachineScheduler relies on initSUnits numbering the nodes by their ord=
er in
+/// the original instruction list.
+void ScheduleDAGInstrs::initSUnits() {
+ // We'll be allocating one SUnit for each real instruction in the region,
+ // which is contained within a basic block.
SUnits.reserve(BB->size());
=20
+ for (MachineBasicBlock::iterator I =3D RegionBegin; I !=3D RegionEnd; ++=
I) {
+ MachineInstr *MI =3D I;
+ if (MI->isDebugValue())
+ continue;
+
+ SUnit *SU =3D newSUnit(MI);
+ MISUnitMap[MI] =3D SU;
+
+ SU->isCall =3D MI->isCall();
+ SU->isCommutable =3D MI->isCommutable();
+
+ // Assign the Latency field of SU using target-provided information.
+ if (UnitLatencies)
+ SU->Latency =3D 1;
+ else
+ computeLatency(SU);
+ }
+}
+
+void ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA) {
+ // Create an SUnit for each real instruction.
+ initSUnits();
+
// We build scheduling units by walking a block's instruction list from =
bottom
// to top.
=20
@@ -203,29 +519,29 @@
std::map<const Value *, SUnit *> AliasMemDefs, NonAliasMemDefs;
std::map<const Value *, std::vector<SUnit *> > AliasMemUses, NonAliasMem=
Uses;
=20
- // Check to see if the scheduler cares about latencies.
- bool UnitLatencies =3D ForceUnitLatencies();
-
- // Ask the target if address-backscheduling is desirable, and if so how =
much.
- const TargetSubtargetInfo &ST =3D TM.getSubtarget<TargetSubtargetInfo>();
- unsigned SpecialAddressLatency =3D ST.getSpecialAddressLatency();
-
// Remove any stale debug info; sometimes BuildSchedGraph is called again
// without emitting the info from the previous call.
DbgValues.clear();
FirstDbgValue =3D NULL;
=20
+ assert(Defs.empty() && Uses.empty() &&
+ "Only BuildGraph should update Defs/Uses");
+ Defs.setRegLimit(TRI->getNumRegs());
+ Uses.setRegLimit(TRI->getNumRegs());
+
+ assert(VRegDefs.empty() && "Only BuildSchedGraph may access VRegDefs");
+ // FIXME: Allow SparseSet to reserve space for the creation of virtual
+ // registers during scheduling. Don't artificially inflate the Universe
+ // because we want to assert that vregs are not created during DAG build=
ing.
+ VRegDefs.setUniverse(MRI.getNumVirtRegs());
+
// Model data dependencies between instructions being scheduled and the
// ExitSU.
- AddSchedBarrierDeps();
-
- for (int i =3D 0, e =3D TRI->getNumRegs(); i !=3D e; ++i) {
- assert(Defs[i].empty() && "Only BuildGraph should push/pop Defs");
- }
+ addSchedBarrierDeps();
=20
// Walk the list of instructions, from bottom moving up.
MachineInstr *PrevMI =3D NULL;
- for (MachineBasicBlock::iterator MII =3D InsertPos, MIE =3D Begin;
+ for (MachineBasicBlock::iterator MII =3D RegionEnd, MIE =3D RegionBegin;
MII !=3D MIE; --MII) {
MachineInstr *MI =3D prior(MII);
if (MI && PrevMI) {
@@ -238,19 +554,11 @@
continue;
}
=20
- const MCInstrDesc &MCID =3D MI->getDesc();
- assert(!MCID.isTerminator() && !MI->isLabel() &&
+ assert(!MI->isTerminator() && !MI->isLabel() &&
"Cannot schedule terminators or labels!");
- // Create the SUnit for this MI.
- SUnit *SU =3D NewSUnit(MI);
- SU->isCall =3D MCID.isCall();
- SU->isCommutable =3D MCID.isCommutable();
=20
- // Assign the Latency field of SU using target-provided information.
- if (UnitLatencies)
- SU->Latency =3D 1;
- else
- ComputeLatency(SU);
+ SUnit *SU =3D MISUnitMap[MI];
+ assert(SU && "No SUnit mapped to this MI");
=20
// Add register-based dependencies (data, anti, and output).
for (unsigned j =3D 0, n =3D MI->getNumOperands(); j !=3D n; ++j) {
@@ -259,152 +567,14 @@
unsigned Reg =3D MO.getReg();
if (Reg =3D=3D 0) continue;
=20
- assert(TRI->isPhysicalRegister(Reg) && "Virtual register encountered=
!");
-
- std::vector<SUnit *> &UseList =3D Uses[Reg];
- // Defs are push in the order they are visited and never reordered.
- std::vector<SUnit *> &DefList =3D Defs[Reg];
- // Optionally add output and anti dependencies. For anti
- // dependencies we use a latency of 0 because for a multi-issue
- // target we want to allow the defining instruction to issue
- // in the same cycle as the using instruction.
- // TODO: Using a latency of 1 here for output dependencies assumes
- // there's no cost for reusing registers.
- SDep::Kind Kind =3D MO.isUse() ? SDep::Anti : SDep::Output;
- unsigned AOLatency =3D (Kind =3D=3D SDep::Anti) ? 0 : 1;
- for (unsigned i =3D 0, e =3D DefList.size(); i !=3D e; ++i) {
- SUnit *DefSU =3D DefList[i];
- if (DefSU =3D=3D &ExitSU)
- continue;
- if (DefSU !=3D SU &&
- (Kind !=3D SDep::Output || !MO.isDead() ||
- !DefSU->getInstr()->registerDefIsDead(Reg)))
- DefSU->addPred(SDep(SU, Kind, AOLatency, /*Reg=3D*/Reg));
- }
- for (const unsigned *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alia=
s) {
- std::vector<SUnit *> &MemDefList =3D Defs[*Alias];
- for (unsigned i =3D 0, e =3D MemDefList.size(); i !=3D e; ++i) {
- SUnit *DefSU =3D MemDefList[i];
- if (DefSU =3D=3D &ExitSU)
- continue;
- if (DefSU !=3D SU &&
- (Kind !=3D SDep::Output || !MO.isDead() ||
- !DefSU->getInstr()->registerDefIsDead(*Alias)))
- DefSU->addPred(SDep(SU, Kind, AOLatency, /*Reg=3D*/ *Alias));
- }
- }
-
- if (MO.isDef()) {
- // Add any data dependencies.
- unsigned DataLatency =3D SU->Latency;
- for (unsigned i =3D 0, e =3D UseList.size(); i !=3D e; ++i) {
- SUnit *UseSU =3D UseList[i];
- if (UseSU =3D=3D SU)
- continue;
- unsigned LDataLatency =3D DataLatency;
- // Optionally add in a special extra latency for nodes that
- // feed addresses.
- // TODO: Do this for register aliases too.
- // TODO: Perhaps we should get rid of
- // SpecialAddressLatency and just move this into
- // adjustSchedDependency for the targets that care about it.
- if (SpecialAddressLatency !=3D 0 && !UnitLatencies &&
- UseSU !=3D &ExitSU) {
- MachineInstr *UseMI =3D UseSU->getInstr();
- const MCInstrDesc &UseMCID =3D UseMI->getDesc();
- int RegUseIndex =3D UseMI->findRegisterUseOperandIdx(Reg);
- assert(RegUseIndex >=3D 0 && "UseMI doesn's use register!");
- if (RegUseIndex >=3D 0 &&
- (UseMCID.mayLoad() || UseMCID.mayStore()) &&
- (unsigned)RegUseIndex < UseMCID.getNumOperands() &&
- UseMCID.OpInfo[RegUseIndex].isLookupPtrRegClass())
- LDataLatency +=3D SpecialAddressLatency;
- }
- // Adjust the dependence latency using operand def/use
- // information (if any), and then allow the target to
- // perform its own adjustments.
- const SDep& dep =3D SDep(SU, SDep::Data, LDataLatency, Reg);
- if (!UnitLatencies) {
- ComputeOperandLatency(SU, UseSU, const_cast<SDep &>(dep));
- ST.adjustSchedDependency(SU, UseSU, const_cast<SDep &>(dep));
- }
- UseSU->addPred(dep);
- }
- for (const unsigned *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Al=
ias) {
- std::vector<SUnit *> &UseList =3D Uses[*Alias];
- for (unsigned i =3D 0, e =3D UseList.size(); i !=3D e; ++i) {
- SUnit *UseSU =3D UseList[i];
- if (UseSU =3D=3D SU)
- continue;
- const SDep& dep =3D SDep(SU, SDep::Data, DataLatency, *Alias);
- if (!UnitLatencies) {
- ComputeOperandLatency(SU, UseSU, const_cast<SDep &>(dep));
- ST.adjustSchedDependency(SU, UseSU, const_cast<SDep &>(dep));
- }
- UseSU->addPred(dep);
- }
- }
-
- // If a def is going to wrap back around to the top of the loop,
- // backschedule it.
- if (!UnitLatencies && DefList.empty()) {
- LoopDependencies::LoopDeps::iterator I =3D LoopRegs.Deps.find(Re=
g);
- if (I !=3D LoopRegs.Deps.end()) {
- const MachineOperand *UseMO =3D I->second.first;
- unsigned Count =3D I->second.second;
- const MachineInstr *UseMI =3D UseMO->getParent();
- unsigned UseMOIdx =3D UseMO - &UseMI->getOperand(0);
- const MCInstrDesc &UseMCID =3D UseMI->getDesc();
- // TODO: If we knew the total depth of the region here, we cou=
ld
- // handle the case where the whole loop is inside the region b=
ut
- // is large enough that the isScheduleHigh trick isn't needed.
- if (UseMOIdx < UseMCID.getNumOperands()) {
- // Currently, we only support scheduling regions consisting =
of
- // single basic blocks. Check to see if the instruction is in
- // the same region by checking to see if it has the same par=
ent.
- if (UseMI->getParent() !=3D MI->getParent()) {
- unsigned Latency =3D SU->Latency;
- if (UseMCID.OpInfo[UseMOIdx].isLookupPtrRegClass())
- Latency +=3D SpecialAddressLatency;
- // This is a wild guess as to the portion of the latency w=
hich
- // will be overlapped by work done outside the current
- // scheduling region.
- Latency -=3D std::min(Latency, Count);
- // Add the artificial edge.
- ExitSU.addPred(SDep(SU, SDep::Order, Latency,
- /*Reg=3D*/0, /*isNormalMemory=3D*/fals=
e,
- /*isMustAlias=3D*/false,
- /*isArtificial=3D*/true));
- } else if (SpecialAddressLatency > 0 &&
- UseMCID.OpInfo[UseMOIdx].isLookupPtrRegClass()) {
- // The entire loop body is within the current scheduling r=
egion
- // and the latency of this operation is assumed to be grea=
ter
- // than the latency of the loop.
- // TODO: Recursively mark data-edge predecessors as
- // isScheduleHigh too.
- SU->isScheduleHigh =3D true;
- }
- }
- LoopRegs.Deps.erase(I);
- }
- }
-
- UseList.clear();
- if (!MO.isDead())
- DefList.clear();
-
- // Calls will not be reordered because of chain dependencies (see
- // below). Since call operands are dead, calls may continue to be =
added
- // to the DefList making dependence checking quadratic in the size=
of
- // the block. Instead, we leave only one call at the back of the
- // DefList.
- if (SU->isCall) {
- while (!DefList.empty() && DefList.back()->isCall)
- DefList.pop_back();
- }
- DefList.push_back(SU);
- } else {
- UseList.push_back(SU);
+ if (TRI->isPhysicalRegister(Reg))
+ addPhysRegDeps(SU, j);
+ else {
+ assert(!IsPostRA && "Virtual register encountered!");
+ if (MO.isDef())
+ addVRegDefDeps(SU, j);
+ else if (MO.readsReg()) // ignore undef operands
+ addVRegUseDeps(SU, j);
}
}
=20
@@ -419,9 +589,9 @@
// produce more precise dependence information.
#define STORE_LOAD_LATENCY 1
unsigned TrueMemOrderLatency =3D 0;
- if (MCID.isCall() || MI->hasUnmodeledSideEffects() ||
+ if (MI->isCall() || MI->hasUnmodeledSideEffects() ||
(MI->hasVolatileMemoryRef() &&
- (!MCID.mayLoad() || !MI->isInvariantLoad(AA)))) {
+ (!MI->mayLoad() || !MI->isInvariantLoad(AA)))) {
// Be conservative with these and add dependencies on all memory
// references, even those that are known to not alias.
for (std::map<const Value *, SUnit *>::iterator I =3D
@@ -460,7 +630,7 @@
PendingLoads.clear();
AliasMemDefs.clear();
AliasMemUses.clear();
- } else if (MCID.mayStore()) {
+ } else if (MI->mayStore()) {
bool MayAlias =3D true;
TrueMemOrderLatency =3D STORE_LOAD_LATENCY;
if (const Value *V =3D getUnderlyingObjectForInstr(MI, MFI, MayAlias=
)) {
@@ -516,7 +686,7 @@
/*Reg=3D*/0, /*isNormalMemory=3D*/false,
/*isMustAlias=3D*/false,
/*isArtificial=3D*/true));
- } else if (MCID.mayLoad()) {
+ } else if (MI->mayLoad()) {
bool MayAlias =3D true;
TrueMemOrderLatency =3D 0;
if (MI->isInvariantLoad(AA)) {
@@ -558,32 +728,27 @@
if (PrevMI)
FirstDbgValue =3D PrevMI;
=20
- for (int i =3D 0, e =3D TRI->getNumRegs(); i !=3D e; ++i) {
- Defs[i].clear();
- Uses[i].clear();
- }
+ Defs.clear();
+ Uses.clear();
+ VRegDefs.clear();
PendingLoads.clear();
}
=20
-void ScheduleDAGInstrs::FinishBlock() {
- // Nothing to do.
-}
-
-void ScheduleDAGInstrs::ComputeLatency(SUnit *SU) {
+void ScheduleDAGInstrs::computeLatency(SUnit *SU) {
// Compute the latency for the node.
if (!InstrItins || InstrItins->isEmpty()) {
SU->Latency =3D 1;
=20
// Simplistic target-independent heuristic: assume that loads take
// extra time.
- if (SU->getInstr()->getDesc().mayLoad())
+ if (SU->getInstr()->mayLoad())
SU->Latency +=3D 2;
} else {
SU->Latency =3D TII->getInstrLatency(InstrItins, SU->getInstr());
}
}
=20
-void ScheduleDAGInstrs::ComputeOperandLatency(SUnit *Def, SUnit *Use,
+void ScheduleDAGInstrs::computeOperandLatency(SUnit *Def, SUnit *Use,
SDep& dep) const {
if (!InstrItins || InstrItins->isEmpty())
return;
@@ -608,7 +773,9 @@
// %Q1<def> =3D VMULv8i16 %Q1<kill>, %Q3<kill>, ...
// What we want is to compute latency between def of %D6/%D7 and use=
of
// %Q3 instead.
- DefIdx =3D DefMI->findRegisterDefOperandIdx(Reg, false, true, TRI);
+ unsigned Op2 =3D DefMI->findRegisterDefOperandIdx(Reg, false, true, =
TRI);
+ if (DefMI->getOperand(Op2).isReg())
+ DefIdx =3D Op2;
}
MachineInstr *UseMI =3D Use->getInstr();
// For all uses of the register, calculate the maxmimum latency
@@ -656,43 +823,8 @@
return oss.str();
}
=20
-// EmitSchedule - Emit the machine code in scheduled order.
-MachineBasicBlock *ScheduleDAGInstrs::EmitSchedule() {
- // For MachineInstr-based scheduling, we're rescheduling the instruction=
s in
- // the block, so start by removing them from the block.
- while (Begin !=3D InsertPos) {
- MachineBasicBlock::iterator I =3D Begin;
- ++Begin;
- BB->remove(I);
- }
-
- // If first instruction was a DBG_VALUE then put it back.
- if (FirstDbgValue)
- BB->insert(InsertPos, FirstDbgValue);
-
- // Then re-insert them according to the given schedule.
- for (unsigned i =3D 0, e =3D Sequence.size(); i !=3D e; i++) {
- if (SUnit *SU =3D Sequence[i])
- BB->insert(InsertPos, SU->getInstr());
- else
- // Null SUnit* is a noop.
- EmitNoop();
- }
-
- // Update the Begin iterator, as the first instruction in the block
- // may have been scheduled later.
- if (!Sequence.empty())
- Begin =3D Sequence[0]->getInstr();
-
- // Reinsert any remaining debug_values.
- for (std::vector<std::pair<MachineInstr *, MachineInstr *> >::iterator
- DI =3D DbgValues.end(), DE =3D DbgValues.begin(); DI !=3D DE; --D=
I) {
- std::pair<MachineInstr *, MachineInstr *> P =3D *prior(DI);
- MachineInstr *DbgValue =3D P.first;
- MachineInstr *OrigPrivMI =3D P.second;
- BB->insertAfter(OrigPrivMI, DbgValue);
- }
- DbgValues.clear();
- FirstDbgValue =3D NULL;
- return BB;
+/// Return the basic block label. It is not necessarilly unique because a =
block
+/// contains multiple scheduling regions. But it is fine for visualization.
+std::string ScheduleDAGInstrs::getDAGName() const {
+ return "dag." + BB->getFullName();
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Schedule=
DAGPrinter.cpp
--- a/head/contrib/llvm/lib/CodeGen/ScheduleDAGPrinter.cpp Tue Apr 17 11:36=
:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/ScheduleDAGPrinter.cpp Tue Apr 17 11:51=
:51 2012 +0300
@@ -25,7 +25,6 @@
#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/StringExtras.h"
-#include "llvm/Config/config.h"
#include <fstream>
using namespace llvm;
=20
@@ -42,12 +41,12 @@
static bool renderGraphFromBottomUp() {
return true;
}
- =20
+
static bool hasNodeAddressLabel(const SUnit *Node,
const ScheduleDAG *Graph) {
return true;
}
- =20
+
/// If you want to override the dot attributes printed for a particular
/// edge, override this method.
static std::string getEdgeAttributes(const SUnit *Node,
@@ -59,7 +58,7 @@
return "color=3Dblue,style=3Ddashed";
return "";
}
- =20
+
=20
std::string getNodeLabel(const SUnit *Node, const ScheduleDAG *Graph);
static std::string getNodeAttributes(const SUnit *N,
@@ -82,18 +81,17 @@
/// viewGraph - Pop up a ghostview window with the reachable parts of the =
DAG
/// rendered using 'dot'.
///
-void ScheduleDAG::viewGraph() {
-// This code is only for debugging!
+void ScheduleDAG::viewGraph(const Twine &Name, const Twine &Title) {
+ // This code is only for debugging!
#ifndef NDEBUG
- if (BB->getBasicBlock())
- ViewGraph(this, "dag." + MF.getFunction()->getNameStr(), false,
- "Scheduling-Units Graph for " + MF.getFunction()->getNameStr=
() +=20
- ":" + BB->getBasicBlock()->getNameStr());
- else
- ViewGraph(this, "dag." + MF.getFunction()->getNameStr(), false,
- "Scheduling-Units Graph for " + MF.getFunction()->getNameStr=
());
+ ViewGraph(this, Name, false, Title);
#else
errs() << "ScheduleDAG::viewGraph is only available in debug builds on "
<< "systems with Graphviz or gv!\n";
#endif // NDEBUG
}
+
+/// Out-of-line implementation with no arguments is handy for gdb.
+void ScheduleDAG::viewGraph() {
+ viewGraph(getDAGName(), "Scheduling-Units Graph for " + getDAGName());
+}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Scoreboa=
rdHazardRecognizer.cpp
--- a/head/contrib/llvm/lib/CodeGen/ScoreboardHazardRecognizer.cpp Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/ScoreboardHazardRecognizer.cpp Tue Apr =
17 11:51:51 2012 +0300
@@ -140,8 +140,6 @@
=20
unsigned freeUnits =3D IS->getUnits();
switch (IS->getReservationKind()) {
- default:
- assert(0 && "Invalid FU reservation");
case InstrStage::Required:
// Required FUs conflict with both reserved and required ones
freeUnits &=3D ~ReservedScoreboard[StageCycle];
@@ -194,8 +192,6 @@
=20
unsigned freeUnits =3D IS->getUnits();
switch (IS->getReservationKind()) {
- default:
- assert(0 && "Invalid FU reservation");
case InstrStage::Required:
// Required FUs conflict with both reserved and required ones
freeUnits &=3D ~ReservedScoreboard[cycle + i];
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/DAGCombiner.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Apr 17=
11:51:51 2012 +0300
@@ -22,7 +22,6 @@
#include "llvm/LLVMContext.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
-#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetLowering.h"
@@ -64,7 +63,24 @@
bool LegalTypes;
=20
// Worklist of all of the nodes that need to be simplified.
- std::vector<SDNode*> WorkList;
+ //
+ // This has the semantics that when adding to the worklist,
+ // the item added must be next to be processed. It should
+ // also only appear once. The naive approach to this takes
+ // linear time.
+ //
+ // To reduce the insert/remove time to logarithmic, we use
+ // a set and a vector to maintain our worklist.
+ //
+ // The set contains the items on the worklist, but does not
+ // maintain the order they should be visited.
+ //
+ // The vector maintains the order nodes should be visited, but may
+ // contain duplicate or removed nodes. When choosing a node to
+ // visit, we pop off the order stack until we find an item that is
+ // also in the contents set. All operations are O(log N).
+ SmallPtrSet<SDNode*, 64> WorkListContents;
+ SmallVector<SDNode*, 64> WorkListOrder;
=20
// AA - Used for DAG load/store alias analysis.
AliasAnalysis &AA;
@@ -84,18 +100,17 @@
SDValue visit(SDNode *N);
=20
public:
- /// AddToWorkList - Add to the work list making sure it's instance is =
at the
- /// the back (next to be processed.)
+ /// AddToWorkList - Add to the work list making sure its instance is a=
t the
+ /// back (next to be processed.)
void AddToWorkList(SDNode *N) {
- removeFromWorkList(N);
- WorkList.push_back(N);
+ WorkListContents.insert(N);
+ WorkListOrder.push_back(N);
}
=20
/// removeFromWorkList - remove all instances of N from the worklist.
///
void removeFromWorkList(SDNode *N) {
- WorkList.erase(std::remove(WorkList.begin(), WorkList.end(), N),
- WorkList.end());
+ WorkListContents.erase(N);
}
=20
SDValue CombineTo(SDNode *N, const SDValue *To, unsigned NumTo,
@@ -159,7 +174,9 @@
SDValue visitADD(SDNode *N);
SDValue visitSUB(SDNode *N);
SDValue visitADDC(SDNode *N);
+ SDValue visitSUBC(SDNode *N);
SDValue visitADDE(SDNode *N);
+ SDValue visitSUBE(SDNode *N);
SDValue visitMUL(SDNode *N);
SDValue visitSDIV(SDNode *N);
SDValue visitUDIV(SDNode *N);
@@ -181,7 +198,9 @@
SDValue visitSRA(SDNode *N);
SDValue visitSRL(SDNode *N);
SDValue visitCTLZ(SDNode *N);
+ SDValue visitCTLZ_ZERO_UNDEF(SDNode *N);
SDValue visitCTTZ(SDNode *N);
+ SDValue visitCTTZ_ZERO_UNDEF(SDNode *N);
SDValue visitCTPOP(SDNode *N);
SDValue visitSELECT(SDNode *N);
SDValue visitSELECT_CC(SDNode *N);
@@ -279,7 +298,7 @@
=20
public:
DAGCombiner(SelectionDAG &D, AliasAnalysis &A, CodeGenOpt::Level OL)
- : DAG(D), TLI(D.getTargetLoweringInfo()), Level(Unrestricted),
+ : DAG(D), TLI(D.getTargetLoweringInfo()), Level(BeforeLegalizeTypes),
OptLevel(OL), LegalOperations(false), LegalTypes(false), AA(A) {}
=20
/// Run - runs the dag combiner on all nodes in the work list
@@ -362,6 +381,8 @@
/// specified expression for the same cost as the expression itself, or 2 =
if we
/// can compute the negated form more cheaply than the expression itself.
static char isNegatibleForFree(SDValue Op, bool LegalOperations,
+ const TargetLowering &TLI,
+ const TargetOptions *Options,
unsigned Depth =3D 0) {
// No compile time optimizations on this type.
if (Op.getValueType() =3D=3D MVT::ppcf128)
@@ -384,34 +405,44 @@
return LegalOperations ? 0 : 1;
case ISD::FADD:
// FIXME: determine better conditions for this xform.
- if (!UnsafeFPMath) return 0;
+ if (!Options->UnsafeFPMath) return 0;
+
+ // After operation legalization, it might not be legal to create new F=
SUBs.
+ if (LegalOperations &&
+ !TLI.isOperationLegalOrCustom(ISD::FSUB, Op.getValueType()))
+ return 0;
=20
// fold (fsub (fadd A, B)) -> (fsub (fneg A), B)
- if (char V =3D isNegatibleForFree(Op.getOperand(0), LegalOperations, D=
epth+1))
+ if (char V =3D isNegatibleForFree(Op.getOperand(0), LegalOperations, T=
LI,
+ Options, Depth + 1))
return V;
// fold (fneg (fadd A, B)) -> (fsub (fneg B), A)
- return isNegatibleForFree(Op.getOperand(1), LegalOperations, Depth+1);
+ return isNegatibleForFree(Op.getOperand(1), LegalOperations, TLI, Opti=
ons,
+ Depth + 1);
case ISD::FSUB:
// We can't turn -(A-B) into B-A when we honor signed zeros.
- if (!UnsafeFPMath) return 0;
+ if (!Options->UnsafeFPMath) return 0;
=20
// fold (fneg (fsub A, B)) -> (fsub B, A)
return 1;
=20
case ISD::FMUL:
case ISD::FDIV:
- if (HonorSignDependentRoundingFPMath()) return 0;
+ if (Options->HonorSignDependentRoundingFPMath()) return 0;
=20
// fold (fneg (fmul X, Y)) -> (fmul (fneg X), Y) or (fmul X, (fneg Y))
- if (char V =3D isNegatibleForFree(Op.getOperand(0), LegalOperations, D=
epth+1))
+ if (char V =3D isNegatibleForFree(Op.getOperand(0), LegalOperations, T=
LI,
+ Options, Depth + 1))
return V;
=20
- return isNegatibleForFree(Op.getOperand(1), LegalOperations, Depth+1);
+ return isNegatibleForFree(Op.getOperand(1), LegalOperations, TLI, Opti=
ons,
+ Depth + 1);
=20
case ISD::FP_EXTEND:
case ISD::FP_ROUND:
case ISD::FSIN:
- return isNegatibleForFree(Op.getOperand(0), LegalOperations, Depth+1);
+ return isNegatibleForFree(Op.getOperand(0), LegalOperations, TLI, Opti=
ons,
+ Depth + 1);
}
}
=20
@@ -435,10 +466,12 @@
}
case ISD::FADD:
// FIXME: determine better conditions for this xform.
- assert(UnsafeFPMath);
+ assert(DAG.getTarget().Options.UnsafeFPMath);
=20
// fold (fneg (fadd A, B)) -> (fsub (fneg A), B)
- if (isNegatibleForFree(Op.getOperand(0), LegalOperations, Depth+1))
+ if (isNegatibleForFree(Op.getOperand(0), LegalOperations,
+ DAG.getTargetLoweringInfo(),
+ &DAG.getTarget().Options, Depth+1))
return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(),
GetNegatedExpression(Op.getOperand(0), DAG,
LegalOperations, Depth+1),
@@ -450,7 +483,7 @@
Op.getOperand(0));
case ISD::FSUB:
// We can't turn -(A-B) into B-A when we honor signed zeros.
- assert(UnsafeFPMath);
+ assert(DAG.getTarget().Options.UnsafeFPMath);
=20
// fold (fneg (fsub 0, B)) -> B
if (ConstantFPSDNode *N0CFP =3D dyn_cast<ConstantFPSDNode>(Op.getOpera=
nd(0)))
@@ -463,10 +496,12 @@
=20
case ISD::FMUL:
case ISD::FDIV:
- assert(!HonorSignDependentRoundingFPMath());
+ assert(!DAG.getTarget().Options.HonorSignDependentRoundingFPMath());
=20
// fold (fneg (fmul X, Y)) -> (fmul (fneg X), Y)
- if (isNegatibleForFree(Op.getOperand(0), LegalOperations, Depth+1))
+ if (isNegatibleForFree(Op.getOperand(0), LegalOperations,
+ DAG.getTargetLoweringInfo(),
+ &DAG.getTarget().Options, Depth+1))
return DAG.getNode(Op.getOpcode(), Op.getDebugLoc(), Op.getValueType=
(),
GetNegatedExpression(Op.getOperand(0), DAG,
LegalOperations, Depth+1),
@@ -944,14 +979,13 @@
void DAGCombiner::Run(CombineLevel AtLevel) {
// set the instance variables, so that the various visit routines may us=
e it.
Level =3D AtLevel;
- LegalOperations =3D Level >=3D NoIllegalOperations;
- LegalTypes =3D Level >=3D NoIllegalTypes;
+ LegalOperations =3D Level >=3D AfterLegalizeVectorOps;
+ LegalTypes =3D Level >=3D AfterLegalizeTypes;
=20
// Add all the dag nodes to the worklist.
- WorkList.reserve(DAG.allnodes_size());
for (SelectionDAG::allnodes_iterator I =3D DAG.allnodes_begin(),
E =3D DAG.allnodes_end(); I !=3D E; ++I)
- WorkList.push_back(I);
+ AddToWorkList(I);
=20
// Create a dummy node (which is not added to allnodes), that adds a ref=
erence
// to the root node, preventing it from being deleted, and tracking any
@@ -962,11 +996,17 @@
// done. Set it to null to avoid confusion.
DAG.setRoot(SDValue());
=20
- // while the worklist isn't empty, inspect the node on the end of it and
+ // while the worklist isn't empty, find a node and
// try and combine it.
- while (!WorkList.empty()) {
- SDNode *N =3D WorkList.back();
- WorkList.pop_back();
+ while (!WorkListContents.empty()) {
+ SDNode *N;
+ // The WorkListOrder holds the SDNodes in order, but it may contain du=
plicates.
+ // In order to avoid a linear scan, we use a set (O(log N)) to hold wh=
at the
+ // worklist *should* contain, and check the node we want to visit is s=
hould
+ // actually be visited.
+ do {
+ N =3D WorkListOrder.pop_back_val();
+ } while (!WorkListContents.erase(N));
=20
// If N has no uses, it is dead. Make sure to revisit all N's operand=
s once
// N is deleted from the DAG, since they too may now be dead or may ha=
ve a
@@ -1050,7 +1090,9 @@
case ISD::ADD: return visitADD(N);
case ISD::SUB: return visitSUB(N);
case ISD::ADDC: return visitADDC(N);
+ case ISD::SUBC: return visitSUBC(N);
case ISD::ADDE: return visitADDE(N);
+ case ISD::SUBE: return visitSUBE(N);
case ISD::MUL: return visitMUL(N);
case ISD::SDIV: return visitSDIV(N);
case ISD::UDIV: return visitUDIV(N);
@@ -1071,7 +1113,9 @@
case ISD::SRA: return visitSRA(N);
case ISD::SRL: return visitSRL(N);
case ISD::CTLZ: return visitCTLZ(N);
+ case ISD::CTLZ_ZERO_UNDEF: return visitCTLZ_ZERO_UNDEF(N);
case ISD::CTTZ: return visitCTTZ(N);
+ case ISD::CTTZ_ZERO_UNDEF: return visitCTTZ_ZERO_UNDEF(N);
case ISD::CTPOP: return visitCTPOP(N);
case ISD::SELECT: return visitSELECT(N);
case ISD::SELECT_CC: return visitSELECT_CC(N);
@@ -1408,16 +1452,14 @@
if (VT.isInteger() && !VT.isVector()) {
APInt LHSZero, LHSOne;
APInt RHSZero, RHSOne;
- APInt Mask =3D APInt::getAllOnesValue(VT.getScalarType().getSizeInBits=
());
- DAG.ComputeMaskedBits(N0, Mask, LHSZero, LHSOne);
+ DAG.ComputeMaskedBits(N0, LHSZero, LHSOne);
=20
if (LHSZero.getBoolValue()) {
- DAG.ComputeMaskedBits(N1, Mask, RHSZero, RHSOne);
+ DAG.ComputeMaskedBits(N1, RHSZero, RHSOne);
=20
// If all possibly-set bits on the LHS are clear on the RHS, return =
an OR.
// If all possibly-set bits on the RHS are clear on the LHS, return =
an OR.
- if ((RHSZero & (~LHSZero & Mask)) =3D=3D (~LHSZero & Mask) ||
- (LHSZero & (~RHSZero & Mask)) =3D=3D (~RHSZero & Mask))
+ if ((RHSZero & ~LHSZero) =3D=3D ~LHSZero || (LHSZero & ~RHSZero) =3D=
=3D ~RHSZero)
return DAG.getNode(ISD::OR, N->getDebugLoc(), VT, N0, N1);
}
}
@@ -1486,8 +1528,8 @@
EVT VT =3D N0.getValueType();
=20
// If the flag result is dead, turn this into an ADD.
- if (N->hasNUsesOfValue(0, 1))
- return CombineTo(N, DAG.getNode(ISD::ADD, N->getDebugLoc(), VT, N1, N0=
),
+ if (!N->hasAnyUseOfValue(1))
+ return CombineTo(N, DAG.getNode(ISD::ADD, N->getDebugLoc(), VT, N0, N1=
),
DAG.getNode(ISD::CARRY_FALSE,
N->getDebugLoc(), MVT::Glue));
=20
@@ -1503,16 +1545,14 @@
// fold (addc a, b) -> (or a, b), CARRY_FALSE iff a and b share no bits.
APInt LHSZero, LHSOne;
APInt RHSZero, RHSOne;
- APInt Mask =3D APInt::getAllOnesValue(VT.getScalarType().getSizeInBits()=
);
- DAG.ComputeMaskedBits(N0, Mask, LHSZero, LHSOne);
+ DAG.ComputeMaskedBits(N0, LHSZero, LHSOne);
=20
if (LHSZero.getBoolValue()) {
- DAG.ComputeMaskedBits(N1, Mask, RHSZero, RHSOne);
+ DAG.ComputeMaskedBits(N1, RHSZero, RHSOne);
=20
// If all possibly-set bits on the LHS are clear on the RHS, return an=
OR.
// If all possibly-set bits on the RHS are clear on the LHS, return an=
OR.
- if ((RHSZero & (~LHSZero & Mask)) =3D=3D (~LHSZero & Mask) ||
- (LHSZero & (~RHSZero & Mask)) =3D=3D (~RHSZero & Mask))
+ if ((RHSZero & ~LHSZero) =3D=3D ~LHSZero || (LHSZero & ~RHSZero) =3D=
=3D ~RHSZero)
return CombineTo(N, DAG.getNode(ISD::OR, N->getDebugLoc(), VT, N0, N=
1),
DAG.getNode(ISD::CARRY_FALSE,
N->getDebugLoc(), MVT::Glue));
@@ -1535,7 +1575,7 @@
=20
// fold (adde x, y, false) -> (addc x, y)
if (CarryIn.getOpcode() =3D=3D ISD::CARRY_FALSE)
- return DAG.getNode(ISD::ADDC, N->getDebugLoc(), N->getVTList(), N1, N0=
);
+ return DAG.getNode(ISD::ADDC, N->getDebugLoc(), N->getVTList(), N0, N1=
);
=20
return SDValue();
}
@@ -1645,6 +1685,51 @@
return SDValue();
}
=20
+SDValue DAGCombiner::visitSUBC(SDNode *N) {
+ SDValue N0 =3D N->getOperand(0);
+ SDValue N1 =3D N->getOperand(1);
+ ConstantSDNode *N0C =3D dyn_cast<ConstantSDNode>(N0);
+ ConstantSDNode *N1C =3D dyn_cast<ConstantSDNode>(N1);
+ EVT VT =3D N0.getValueType();
+
+ // If the flag result is dead, turn this into an SUB.
+ if (!N->hasAnyUseOfValue(1))
+ return CombineTo(N, DAG.getNode(ISD::SUB, N->getDebugLoc(), VT, N0, N1=
),
+ DAG.getNode(ISD::CARRY_FALSE, N->getDebugLoc(),
+ MVT::Glue));
+
+ // fold (subc x, x) -> 0 + no borrow
+ if (N0 =3D=3D N1)
+ return CombineTo(N, DAG.getConstant(0, VT),
+ DAG.getNode(ISD::CARRY_FALSE, N->getDebugLoc(),
+ MVT::Glue));
+
+ // fold (subc x, 0) -> x + no borrow
+ if (N1C && N1C->isNullValue())
+ return CombineTo(N, N0, DAG.getNode(ISD::CARRY_FALSE, N->getDebugLoc(),
+ MVT::Glue));
+
+ // Canonicalize (sub -1, x) -> ~x, i.e. (xor x, -1) + no borrow
+ if (N0C && N0C->isAllOnesValue())
+ return CombineTo(N, DAG.getNode(ISD::XOR, N->getDebugLoc(), VT, N1, N0=
),
+ DAG.getNode(ISD::CARRY_FALSE, N->getDebugLoc(),
+ MVT::Glue));
+
+ return SDValue();
+}
+
+SDValue DAGCombiner::visitSUBE(SDNode *N) {
+ SDValue N0 =3D N->getOperand(0);
+ SDValue N1 =3D N->getOperand(1);
+ SDValue CarryIn =3D N->getOperand(2);
+
+ // fold (sube x, y, false) -> (subc x, y)
+ if (CarryIn.getOpcode() =3D=3D ISD::CARRY_FALSE)
+ return DAG.getNode(ISD::SUBC, N->getDebugLoc(), N->getVTList(), N0, N1=
);
+
+ return SDValue();
+}
+
SDValue DAGCombiner::visitMUL(SDNode *N) {
SDValue N0 =3D N->getOperand(0);
SDValue N1 =3D N->getOperand(1);
@@ -1756,7 +1841,7 @@
if (N0C && N1C && !N1C->isNullValue())
return DAG.FoldConstantArithmetic(ISD::SDIV, VT, N0C, N1C);
// fold (sdiv X, 1) -> X
- if (N1C && N1C->getSExtValue() =3D=3D 1LL)
+ if (N1C && N1C->getAPIntValue() =3D=3D 1LL)
return N0;
// fold (sdiv X, -1) -> 0-X
if (N1C && N1C->isAllOnesValue())
@@ -1770,17 +1855,15 @@
N0, N1);
}
// fold (sdiv X, pow2) -> simple ops after legalize
- if (N1C && !N1C->isNullValue() && !TLI.isIntDivCheap() &&
- (isPowerOf2_64(N1C->getSExtValue()) ||
- isPowerOf2_64(-N1C->getSExtValue()))) {
+ if (N1C && !N1C->isNullValue() &&
+ (N1C->getAPIntValue().isPowerOf2() ||
+ (-N1C->getAPIntValue()).isPowerOf2())) {
// If dividing by powers of two is cheap, then don't perform the follo=
wing
// fold.
if (TLI.isPow2DivCheap())
return SDValue();
=20
- int64_t pow2 =3D N1C->getSExtValue();
- int64_t abs2 =3D pow2 > 0 ? pow2 : -pow2;
- unsigned lg2 =3D Log2_64(abs2);
+ unsigned lg2 =3D N1C->getAPIntValue().countTrailingZeros();
=20
// Splat the sign bit into the register
SDValue SGN =3D DAG.getNode(ISD::SRA, N->getDebugLoc(), VT, N0,
@@ -1800,7 +1883,7 @@
=20
// If we're dividing by a positive value, we're done. Otherwise, we m=
ust
// negate the result.
- if (pow2 > 0)
+ if (N1C->getAPIntValue().isNonNegative())
return SRA;
=20
AddToWorkList(SRA.getNode());
@@ -1810,8 +1893,7 @@
=20
// if integer divide is expensive and we satisfy the requirements, emit =
an
// alternate sequence.
- if (N1C && (N1C->getSExtValue() < -1 || N1C->getSExtValue() > 1) &&
- !TLI.isIntDivCheap()) {
+ if (N1C && !N1C->isNullValue() && !TLI.isIntDivCheap()) {
SDValue Op =3D BuildSDIV(N);
if (Op.getNode()) return Op;
}
@@ -2250,6 +2332,67 @@
ORNode, N0.getOperand(1));
}
=20
+ // Simplify xor/and/or (bitcast(A), bitcast(B)) -> bitcast(op (A,B))
+ // Only perform this optimization after type legalization and before
+ // LegalizeVectorOprs. LegalizeVectorOprs promotes vector operations by
+ // adding bitcasts. For example (xor v4i32) is promoted to (v2i64), and
+ // we don't want to undo this promotion.
+ // We also handle SCALAR_TO_VECTOR because xor/or/and operations are che=
aper
+ // on scalars.
+ if ((N0.getOpcode() =3D=3D ISD::BITCAST || N0.getOpcode() =3D=3D ISD::SC=
ALAR_TO_VECTOR)
+ && Level =3D=3D AfterLegalizeVectorOps) {
+ SDValue In0 =3D N0.getOperand(0);
+ SDValue In1 =3D N1.getOperand(0);
+ EVT In0Ty =3D In0.getValueType();
+ EVT In1Ty =3D In1.getValueType();
+ // If both incoming values are integers, and the original types are th=
e same.
+ if (In0Ty.isInteger() && In1Ty.isInteger() && In0Ty =3D=3D In1Ty) {
+ SDValue Op =3D DAG.getNode(N->getOpcode(), N->getDebugLoc(), In0Ty, =
In0, In1);
+ SDValue BC =3D DAG.getNode(N0.getOpcode(), N->getDebugLoc(), VT, Op);
+ AddToWorkList(Op.getNode());
+ return BC;
+ }
+ }
+
+ // Xor/and/or are indifferent to the swizzle operation (shuffle of one v=
alue).
+ // Simplify xor/and/or (shuff(A), shuff(B)) -> shuff(op (A,B))
+ // If both shuffles use the same mask, and both shuffle within a single
+ // vector, then it is worthwhile to move the swizzle after the operation.
+ // The type-legalizer generates this pattern when loading illegal
+ // vector types from memory. In many cases this allows additional shuffle
+ // optimizations.
+ if (N0.getOpcode() =3D=3D ISD::VECTOR_SHUFFLE && Level < AfterLegalizeDA=
G &&
+ N0.getOperand(1).getOpcode() =3D=3D ISD::UNDEF &&
+ N1.getOperand(1).getOpcode() =3D=3D ISD::UNDEF) {
+ ShuffleVectorSDNode *SVN0 =3D cast<ShuffleVectorSDNode>(N0);
+ ShuffleVectorSDNode *SVN1 =3D cast<ShuffleVectorSDNode>(N1);
+
+ assert(N0.getOperand(0).getValueType() =3D=3D N1.getOperand(1).getValu=
eType() &&
+ "Inputs to shuffles are not the same type");
+
+ unsigned NumElts =3D VT.getVectorNumElements();
+
+ // Check that both shuffles use the same mask. The masks are known to =
be of
+ // the same length because the result vector type is the same.
+ bool SameMask =3D true;
+ for (unsigned i =3D 0; i !=3D NumElts; ++i) {
+ int Idx0 =3D SVN0->getMaskElt(i);
+ int Idx1 =3D SVN1->getMaskElt(i);
+ if (Idx0 !=3D Idx1) {
+ SameMask =3D false;
+ break;
+ }
+ }
+
+ if (SameMask) {
+ SDValue Op =3D DAG.getNode(N->getOpcode(), N->getDebugLoc(), VT,
+ N0.getOperand(0), N1.getOperand(0));
+ AddToWorkList(Op.getNode());
+ return DAG.getVectorShuffle(VT, N->getDebugLoc(), Op,
+ DAG.getUNDEF(VT), &SVN0->getMask()[0]);
+ }
+ }
+
return SDValue();
}
=20
@@ -2312,6 +2455,88 @@
return SDValue(N, 0); // Return N so it doesn't get rechecked!
}
}
+ // similarly fold (and (X (load ([non_ext|any_ext|zero_ext] V))), c) ->=20
+ // (X (load ([non_ext|zero_ext] V))) if 'and' only clears top bits which=
must
+ // already be zero by virtue of the width of the base type of the load.
+ //
+ // the 'X' node here can either be nothing or an extract_vector_elt to c=
atch
+ // more cases.
+ if ((N0.getOpcode() =3D=3D ISD::EXTRACT_VECTOR_ELT &&
+ N0.getOperand(0).getOpcode() =3D=3D ISD::LOAD) ||
+ N0.getOpcode() =3D=3D ISD::LOAD) {
+ LoadSDNode *Load =3D cast<LoadSDNode>( (N0.getOpcode() =3D=3D ISD::LOA=
D) ?
+ N0 : N0.getOperand(0) );
+
+ // Get the constant (if applicable) the zero'th operand is being ANDed=
with.
+ // This can be a pure constant or a vector splat, in which case we tre=
at the
+ // vector as a scalar and use the splat value.
+ APInt Constant =3D APInt::getNullValue(1);
+ if (const ConstantSDNode *C =3D dyn_cast<ConstantSDNode>(N1)) {
+ Constant =3D C->getAPIntValue();
+ } else if (BuildVectorSDNode *Vector =3D dyn_cast<BuildVectorSDNode>(N=
1)) {
+ APInt SplatValue, SplatUndef;
+ unsigned SplatBitSize;
+ bool HasAnyUndefs;
+ bool IsSplat =3D Vector->isConstantSplat(SplatValue, SplatUndef,
+ SplatBitSize, HasAnyUndefs);
+ if (IsSplat) {
+ // Undef bits can contribute to a possible optimisation if set, so
+ // set them.
+ SplatValue |=3D SplatUndef;
+
+ // The splat value may be something like "0x00FFFFFF", which means=
0 for
+ // the first vector value and FF for the rest, repeating. We need =
a mask
+ // that will apply equally to all members of the vector, so AND al=
l the
+ // lanes of the constant together.
+ EVT VT =3D Vector->getValueType(0);
+ unsigned BitWidth =3D VT.getVectorElementType().getSizeInBits();
+ Constant =3D APInt::getAllOnesValue(BitWidth);
+ for (unsigned i =3D 0, n =3D VT.getVectorNumElements(); i < n; ++i)
+ Constant &=3D SplatValue.lshr(i*BitWidth).zextOrTrunc(BitWidth);
+ }
+ }
+
+ // If we want to change an EXTLOAD to a ZEXTLOAD, ensure a ZEXTLOAD is
+ // actually legal and isn't going to get expanded, else this is a false
+ // optimisation.
+ bool CanZextLoadProfitably =3D TLI.isLoadExtLegal(ISD::ZEXTLOAD,
+ Load->getMemoryVT());
+
+ // Resize the constant to the same size as the original memory access =
before
+ // extension. If it is still the AllOnesValue then this AND is complet=
ely
+ // unneeded.
+ Constant =3D
+ Constant.zextOrTrunc(Load->getMemoryVT().getScalarType().getSizeInBi=
ts());
+
+ bool B;
+ switch (Load->getExtensionType()) {
+ default: B =3D false; break;
+ case ISD::EXTLOAD: B =3D CanZextLoadProfitably; break;
+ case ISD::ZEXTLOAD:
+ case ISD::NON_EXTLOAD: B =3D true; break;
+ }
+
+ if (B && Constant.isAllOnesValue()) {
+ // If the load type was an EXTLOAD, convert to ZEXTLOAD in order to
+ // preserve semantics once we get rid of the AND.
+ SDValue NewLoad(Load, 0);
+ if (Load->getExtensionType() =3D=3D ISD::EXTLOAD) {
+ NewLoad =3D DAG.getLoad(Load->getAddressingMode(), ISD::ZEXTLOAD,
+ Load->getValueType(0), Load->getDebugLoc(),
+ Load->getChain(), Load->getBasePtr(),
+ Load->getOffset(), Load->getMemoryVT(),
+ Load->getMemOperand());
+ // Replace uses of the EXTLOAD with the new ZEXTLOAD.
+ CombineTo(Load, NewLoad.getValue(0), NewLoad.getValue(1));
+ }
+
+ // Fold the AND away, taking care not to fold to the old load node i=
f we
+ // replaced it.
+ CombineTo(N, (N0.getNode() =3D=3D Load) ? NewLoad : N0);
+
+ return SDValue(N, 0); // Return N so it doesn't get rechecked!
+ }
+ }
// fold (and (setcc x), (setcc y)) -> (setcc (and x, y))
if (isSetCCEquivalent(N0, LL, LR, CC0) && isSetCCEquivalent(N1, RL, RR, =
CC1)){
ISD::CondCode Op0 =3D cast<CondCodeSDNode>(CC0)->get();
@@ -3323,7 +3548,9 @@
=20
// fold (shl (srl x, c1), c2) -> (and (shl x, (sub c2, c1), MASK) or
// (and (srl x, (sub c1, c2), MASK)
- if (N1C && N0.getOpcode() =3D=3D ISD::SRL &&
+ // Only fold this if the inner shift has no other uses -- if it does, fo=
lding
+ // this will increase the total number of instructions.
+ if (N1C && N0.getOpcode() =3D=3D ISD::SRL && N0.hasOneUse() &&
N0.getOperand(1).getOpcode() =3D=3D ISD::Constant) {
uint64_t c1 =3D cast<ConstantSDNode>(N0.getOperand(1))->getZExtValue();
if (c1 < VT.getSizeInBits()) {
@@ -3603,8 +3830,7 @@
if (N1C && N0.getOpcode() =3D=3D ISD::CTLZ &&
N1C->getAPIntValue() =3D=3D Log2_32(VT.getSizeInBits())) {
APInt KnownZero, KnownOne;
- APInt Mask =3D APInt::getAllOnesValue(VT.getScalarType().getSizeInBits=
());
- DAG.ComputeMaskedBits(N0.getOperand(0), Mask, KnownZero, KnownOne);
+ DAG.ComputeMaskedBits(N0.getOperand(0), KnownZero, KnownOne);
=20
// If any of the input bits are KnownOne, then the input couldn't be a=
ll
// zeros, thus the result of the srl will always be zero.
@@ -3612,7 +3838,7 @@
=20
// If all of the bits input the to ctlz node are known to be zero, then
// the result of the ctlz is "32" and the result of the shift is one.
- APInt UnknownBits =3D ~KnownZero & Mask;
+ APInt UnknownBits =3D ~KnownZero;
if (UnknownBits =3D=3D 0) return DAG.getConstant(1, VT);
=20
// Otherwise, check to see if there is exactly one bit input to the ct=
lz.
@@ -3713,6 +3939,16 @@
return SDValue();
}
=20
+SDValue DAGCombiner::visitCTLZ_ZERO_UNDEF(SDNode *N) {
+ SDValue N0 =3D N->getOperand(0);
+ EVT VT =3D N->getValueType(0);
+
+ // fold (ctlz_zero_undef c1) -> c2
+ if (isa<ConstantSDNode>(N0))
+ return DAG.getNode(ISD::CTLZ_ZERO_UNDEF, N->getDebugLoc(), VT, N0);
+ return SDValue();
+}
+
SDValue DAGCombiner::visitCTTZ(SDNode *N) {
SDValue N0 =3D N->getOperand(0);
EVT VT =3D N->getValueType(0);
@@ -3723,6 +3959,16 @@
return SDValue();
}
=20
+SDValue DAGCombiner::visitCTTZ_ZERO_UNDEF(SDNode *N) {
+ SDValue N0 =3D N->getOperand(0);
+ EVT VT =3D N->getValueType(0);
+
+ // fold (cttz_zero_undef c1) -> c2
+ if (isa<ConstantSDNode>(N0))
+ return DAG.getNode(ISD::CTTZ_ZERO_UNDEF, N->getDebugLoc(), VT, N0);
+ return SDValue();
+}
+
SDValue DAGCombiner::visitCTPOP(SDNode *N) {
SDValue N0 =3D N->getOperand(0);
EVT VT =3D N->getValueType(0);
@@ -4108,12 +4354,17 @@
// Only do this before legalize for now.
if (VT.isVector() && !LegalOperations) {
EVT N0VT =3D N0.getOperand(0).getValueType();
- // We know that the # elements of the results is the same as the
- // # elements of the compare (and the # elements of the compare re=
sult
- // for that matter). Check to see that they are the same size. I=
f so,
- // we know that the element size of the sext'd result matches the
- // element size of the compare operands.
- if (VT.getSizeInBits() =3D=3D N0VT.getSizeInBits())
+ // On some architectures (such as SSE/NEON/etc) the SETCC result typ=
e is
+ // of the same size as the compared operands. Only optimize sext(set=
cc())
+ // if this is the case.
+ EVT SVT =3D TLI.getSetCCResultType(N0VT);
+
+ // We know that the # elements of the results is the same as the
+ // # elements of the compare (and the # elements of the compare resu=
lt
+ // for that matter). Check to see that they are the same size. If =
so,
+ // we know that the element size of the sext'd result matches the
+ // element size of the compare operands.
+ if (VT.getSizeInBits() =3D=3D SVT.getSizeInBits())
return DAG.getSetCC(N->getDebugLoc(), VT, N0.getOperand(0),
N0.getOperand(1),
cast<CondCodeSDNode>(N0.getOperand(2))->get()=
);
@@ -4127,11 +4378,13 @@
EVT MatchingVectorType =3D
EVT::getVectorVT(*DAG.getContext(), MatchingElementType,
N0VT.getVectorNumElements());
- SDValue VsetCC =3D
- DAG.getSetCC(N->getDebugLoc(), MatchingVectorType, N0.getOperand=
(0),
- N0.getOperand(1),
- cast<CondCodeSDNode>(N0.getOperand(2))->get());
- return DAG.getSExtOrTrunc(VsetCC, N->getDebugLoc(), VT);
+
+ if (SVT =3D=3D MatchingVectorType) {
+ SDValue VsetCC =3D DAG.getSetCC(N->getDebugLoc(), MatchingVector=
Type,
+ N0.getOperand(0), N0.getOperand(1),
+ cast<CondCodeSDNode>(N0.getOperand(2))->g=
et());
+ return DAG.getSExtOrTrunc(VsetCC, N->getDebugLoc(), VT);
+ }
}
}
=20
@@ -4162,6 +4415,44 @@
return SDValue();
}
=20
+// isTruncateOf - If N is a truncate of some other value, return true, rec=
ord
+// the value being truncated in Op and which of Op's bits are zero in Know=
nZero.
+// This function computes KnownZero to avoid a duplicated call to
+// ComputeMaskedBits in the caller.
+static bool isTruncateOf(SelectionDAG &DAG, SDValue N, SDValue &Op,
+ APInt &KnownZero) {
+ APInt KnownOne;
+ if (N->getOpcode() =3D=3D ISD::TRUNCATE) {
+ Op =3D N->getOperand(0);
+ DAG.ComputeMaskedBits(Op, KnownZero, KnownOne);
+ return true;
+ }
+
+ if (N->getOpcode() !=3D ISD::SETCC || N->getValueType(0) !=3D MVT::i1 ||
+ cast<CondCodeSDNode>(N->getOperand(2))->get() !=3D ISD::SETNE)
+ return false;
+
+ SDValue Op0 =3D N->getOperand(0);
+ SDValue Op1 =3D N->getOperand(1);
+ assert(Op0.getValueType() =3D=3D Op1.getValueType());
+
+ ConstantSDNode *COp0 =3D dyn_cast<ConstantSDNode>(Op0);
+ ConstantSDNode *COp1 =3D dyn_cast<ConstantSDNode>(Op1);
+ if (COp0 && COp0->isNullValue())
+ Op =3D Op1;
+ else if (COp1 && COp1->isNullValue())
+ Op =3D Op0;
+ else
+ return false;
+
+ DAG.ComputeMaskedBits(Op, KnownZero, KnownOne);
+
+ if (!(KnownZero | APInt(Op.getValueSizeInBits(), 1)).isAllOnesValue())
+ return false;
+
+ return true;
+}
+
SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) {
SDValue N0 =3D N->getOperand(0);
EVT VT =3D N->getValueType(0);
@@ -4175,6 +4466,30 @@
return DAG.getNode(ISD::ZERO_EXTEND, N->getDebugLoc(), VT,
N0.getOperand(0));
=20
+ // fold (zext (truncate x)) -> (zext x) or
+ // (zext (truncate x)) -> (truncate x)
+ // This is valid when the truncated bits of x are already zero.
+ // FIXME: We should extend this to work for vectors too.
+ SDValue Op;
+ APInt KnownZero;
+ if (!VT.isVector() && isTruncateOf(DAG, N0, Op, KnownZero)) {
+ APInt TruncatedBits =3D
+ (Op.getValueSizeInBits() =3D=3D N0.getValueSizeInBits()) ?
+ APInt(Op.getValueSizeInBits(), 0) :
+ APInt::getBitsSet(Op.getValueSizeInBits(),
+ N0.getValueSizeInBits(),
+ std::min(Op.getValueSizeInBits(),
+ VT.getSizeInBits()));
+ if (TruncatedBits =3D=3D (KnownZero & TruncatedBits)) {
+ if (VT.bitsGT(Op.getValueType()))
+ return DAG.getNode(ISD::ZERO_EXTEND, N->getDebugLoc(), VT, Op);
+ if (VT.bitsLT(Op.getValueType()))
+ return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), VT, Op);
+
+ return Op;
+ }
+ }
+
// fold (zext (truncate (load x))) -> (zext (smaller load x))
// fold (zext (truncate (srl (load x), c))) -> (zext (small load (x+c/n)=
))
if (N0.getOpcode() =3D=3D ISD::TRUNCATE) {
@@ -4567,6 +4882,16 @@
SDValue DAGCombiner::GetDemandedBits(SDValue V, const APInt &Mask) {
switch (V.getOpcode()) {
default: break;
+ case ISD::Constant: {
+ const ConstantSDNode *CV =3D cast<ConstantSDNode>(V.getNode());
+ assert(CV !=3D 0 && "Const value should be ConstSDNode.");
+ const APInt &CVal =3D CV->getAPIntValue();
+ APInt NewVal =3D CVal & Mask;
+ if (NewVal !=3D CVal) {
+ return DAG.getConstant(NewVal, V.getValueType());
+ }
+ break;
+ }
case ISD::OR:
case ISD::XOR:
// If the LHS or RHS don't contribute bits to the or, drop them.
@@ -4705,7 +5030,8 @@
if (ExtType =3D=3D ISD::NON_EXTLOAD)
Load =3D DAG.getLoad(VT, N0.getDebugLoc(), LN0->getChain(), NewPtr,
LN0->getPointerInfo().getWithOffset(PtrOff),
- LN0->isVolatile(), LN0->isNonTemporal(), NewAlign);
+ LN0->isVolatile(), LN0->isNonTemporal(),
+ LN0->isInvariant(), NewAlign);
else
Load =3D DAG.getExtLoad(ExtType, N0.getDebugLoc(), VT, LN0->getChain()=
,NewPtr,
LN0->getPointerInfo().getWithOffset(PtrOff),
@@ -4844,6 +5170,7 @@
SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
SDValue N0 =3D N->getOperand(0);
EVT VT =3D N->getValueType(0);
+ bool isLE =3D TLI.isLittleEndian();
=20
// noop truncate
if (N0.getValueType() =3D=3D N->getValueType(0))
@@ -4871,6 +5198,44 @@
return N0.getOperand(0);
}
=20
+ // Fold extract-and-trunc into a narrow extract. For example:
+ // i64 x =3D EXTRACT_VECTOR_ELT(v2i64 val, i32 1)
+ // i32 y =3D TRUNCATE(i64 x)
+ // -- becomes --
+ // v16i8 b =3D BITCAST (v2i64 val)
+ // i8 x =3D EXTRACT_VECTOR_ELT(v16i8 b, i32 8)
+ //
+ // Note: We only run this optimization after type legalization (which of=
ten
+ // creates this pattern) and before operation legalization after which
+ // we need to be more careful about the vector instructions that we gene=
rate.
+ if (N0.getOpcode() =3D=3D ISD::EXTRACT_VECTOR_ELT &&
+ LegalTypes && !LegalOperations && N0->hasOneUse()) {
+
+ EVT VecTy =3D N0.getOperand(0).getValueType();
+ EVT ExTy =3D N0.getValueType();
+ EVT TrTy =3D N->getValueType(0);
+
+ unsigned NumElem =3D VecTy.getVectorNumElements();
+ unsigned SizeRatio =3D ExTy.getSizeInBits()/TrTy.getSizeInBits();
+
+ EVT NVT =3D EVT::getVectorVT(*DAG.getContext(), TrTy, SizeRatio * NumE=
lem);
+ assert(NVT.getSizeInBits() =3D=3D VecTy.getSizeInBits() && "Invalid Si=
ze");
+
+ SDValue EltNo =3D N0->getOperand(1);
+ if (isa<ConstantSDNode>(EltNo) && isTypeLegal(NVT)) {
+ int Elt =3D cast<ConstantSDNode>(EltNo)->getZExtValue();
+
+ int Index =3D isLE ? (Elt*SizeRatio) : (Elt*SizeRatio + (SizeRatio-1=
));
+
+ SDValue V =3D DAG.getNode(ISD::BITCAST, N->getDebugLoc(),
+ NVT, N0.getOperand(0));
+
+ return DAG.getNode(ISD::EXTRACT_VECTOR_ELT,
+ N->getDebugLoc(), TrTy, V,
+ DAG.getConstant(Index, MVT::i32));
+ }
+ }
+
// See if we can simplify the input to this truncate through knowledge t=
hat
// only the low bits are being used.
// For example "trunc (or (shl x, 8), y)" // -> trunc y
@@ -4934,7 +5299,7 @@
(!LegalOperations || TLI.isOperationLegal(ISD::LOAD, VT)))
return DAG.getLoad(VT, N->getDebugLoc(), LD1->getChain(),
LD1->getBasePtr(), LD1->getPointerInfo(),
- false, false, Align);
+ false, false, false, Align);
}
=20
return SDValue();
@@ -5004,7 +5369,7 @@
SDValue Load =3D DAG.getLoad(VT, N->getDebugLoc(), LN0->getChain(),
LN0->getBasePtr(), LN0->getPointerInfo(),
LN0->isVolatile(), LN0->isNonTemporal(),
- OrigAlign);
+ LN0->isInvariant(), OrigAlign);
AddToWorkList(N);
CombineTo(N0.getNode(),
DAG.getNode(ISD::BITCAST, N0.getDebugLoc(),
@@ -5017,7 +5382,8 @@
// fold (bitconvert (fneg x)) -> (xor (bitconvert x), signbit)
// fold (bitconvert (fabs x)) -> (and (bitconvert x), (not signbit))
// This often reduces constant pool loads.
- if ((N0.getOpcode() =3D=3D ISD::FNEG || N0.getOpcode() =3D=3D ISD::FABS)=
&&
+ if (((N0.getOpcode() =3D=3D ISD::FNEG && !TLI.isFNegFree(VT)) ||
+ (N0.getOpcode() =3D=3D ISD::FABS && !TLI.isFAbsFree(VT))) &&
N0.getNode()->hasOneUse() && VT.isInteger() && !VT.isVector()) {
SDValue NewConv =3D DAG.getNode(ISD::BITCAST, N0.getDebugLoc(), VT,
N0.getOperand(0));
@@ -5247,20 +5613,24 @@
if (N0CFP && !N1CFP)
return DAG.getNode(ISD::FADD, N->getDebugLoc(), VT, N1, N0);
// fold (fadd A, 0) -> A
- if (UnsafeFPMath && N1CFP && N1CFP->getValueAPF().isZero())
+ if (DAG.getTarget().Options.UnsafeFPMath && N1CFP &&
+ N1CFP->getValueAPF().isZero())
return N0;
// fold (fadd A, (fneg B)) -> (fsub A, B)
- if (isNegatibleForFree(N1, LegalOperations) =3D=3D 2)
+ if ((!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FSUB, VT)) &&
+ isNegatibleForFree(N1, LegalOperations, TLI, &DAG.getTarget().Option=
s) =3D=3D 2)
return DAG.getNode(ISD::FSUB, N->getDebugLoc(), VT, N0,
GetNegatedExpression(N1, DAG, LegalOperations));
// fold (fadd (fneg A), B) -> (fsub B, A)
- if (isNegatibleForFree(N0, LegalOperations) =3D=3D 2)
+ if ((!LegalOperations || TLI.isOperationLegalOrCustom(ISD::FSUB, VT)) &&
+ isNegatibleForFree(N0, LegalOperations, TLI, &DAG.getTarget().Option=
s) =3D=3D 2)
return DAG.getNode(ISD::FSUB, N->getDebugLoc(), VT, N1,
GetNegatedExpression(N0, DAG, LegalOperations));
=20
// If allowed, fold (fadd (fadd x, c1), c2) -> (fadd x, (fadd c1, c2))
- if (UnsafeFPMath && N1CFP && N0.getOpcode() =3D=3D ISD::FADD &&
- N0.getNode()->hasOneUse() && isa<ConstantFPSDNode>(N0.getOperand(1)))
+ if (DAG.getTarget().Options.UnsafeFPMath && N1CFP &&
+ N0.getOpcode() =3D=3D ISD::FADD && N0.getNode()->hasOneUse() &&
+ isa<ConstantFPSDNode>(N0.getOperand(1)))
return DAG.getNode(ISD::FADD, N->getDebugLoc(), VT, N0.getOperand(0),
DAG.getNode(ISD::FADD, N->getDebugLoc(), VT,
N0.getOperand(1), N1));
@@ -5285,20 +5655,39 @@
if (N0CFP && N1CFP && VT !=3D MVT::ppcf128)
return DAG.getNode(ISD::FSUB, N->getDebugLoc(), VT, N0, N1);
// fold (fsub A, 0) -> A
- if (UnsafeFPMath && N1CFP && N1CFP->getValueAPF().isZero())
+ if (DAG.getTarget().Options.UnsafeFPMath &&
+ N1CFP && N1CFP->getValueAPF().isZero())
return N0;
// fold (fsub 0, B) -> -B
- if (UnsafeFPMath && N0CFP && N0CFP->getValueAPF().isZero()) {
- if (isNegatibleForFree(N1, LegalOperations))
+ if (DAG.getTarget().Options.UnsafeFPMath &&
+ N0CFP && N0CFP->getValueAPF().isZero()) {
+ if (isNegatibleForFree(N1, LegalOperations, TLI, &DAG.getTarget().Opti=
ons))
return GetNegatedExpression(N1, DAG, LegalOperations);
if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))
return DAG.getNode(ISD::FNEG, N->getDebugLoc(), VT, N1);
}
// fold (fsub A, (fneg B)) -> (fadd A, B)
- if (isNegatibleForFree(N1, LegalOperations))
+ if (isNegatibleForFree(N1, LegalOperations, TLI, &DAG.getTarget().Option=
s))
return DAG.getNode(ISD::FADD, N->getDebugLoc(), VT, N0,
GetNegatedExpression(N1, DAG, LegalOperations));
=20
+ // If 'unsafe math' is enabled, fold
+ // (fsub x, (fadd x, y)) -> (fneg y) &
+ // (fsub x, (fadd y, x)) -> (fneg y)
+ if (DAG.getTarget().Options.UnsafeFPMath) {
+ if (N1.getOpcode() =3D=3D ISD::FADD) {
+ SDValue N10 =3D N1->getOperand(0);
+ SDValue N11 =3D N1->getOperand(1);
+
+ if (N10 =3D=3D N0 && isNegatibleForFree(N11, LegalOperations, TLI,
+ &DAG.getTarget().Options))
+ return GetNegatedExpression(N11, DAG, LegalOperations);
+ else if (N11 =3D=3D N0 && isNegatibleForFree(N10, LegalOperations, T=
LI,
+ &DAG.getTarget().Options))
+ return GetNegatedExpression(N10, DAG, LegalOperations);
+ }
+ }
+
return SDValue();
}
=20
@@ -5308,6 +5697,7 @@
ConstantFPSDNode *N0CFP =3D dyn_cast<ConstantFPSDNode>(N0);
ConstantFPSDNode *N1CFP =3D dyn_cast<ConstantFPSDNode>(N1);
EVT VT =3D N->getValueType(0);
+ const TargetLowering &TLI =3D DAG.getTargetLoweringInfo();
=20
// fold vector ops
if (VT.isVector()) {
@@ -5322,10 +5712,12 @@
if (N0CFP && !N1CFP)
return DAG.getNode(ISD::FMUL, N->getDebugLoc(), VT, N1, N0);
// fold (fmul A, 0) -> 0
- if (UnsafeFPMath && N1CFP && N1CFP->getValueAPF().isZero())
+ if (DAG.getTarget().Options.UnsafeFPMath &&
+ N1CFP && N1CFP->getValueAPF().isZero())
return N1;
// fold (fmul A, 0) -> 0, vector edition.
- if (UnsafeFPMath && ISD::isBuildVectorAllZeros(N1.getNode()))
+ if (DAG.getTarget().Options.UnsafeFPMath &&
+ ISD::isBuildVectorAllZeros(N1.getNode()))
return N1;
// fold (fmul X, 2.0) -> (fadd X, X)
if (N1CFP && N1CFP->isExactlyValue(+2.0))
@@ -5336,8 +5728,10 @@
return DAG.getNode(ISD::FNEG, N->getDebugLoc(), VT, N0);
=20
// fold (fmul (fneg X), (fneg Y)) -> (fmul X, Y)
- if (char LHSNeg =3D isNegatibleForFree(N0, LegalOperations)) {
- if (char RHSNeg =3D isNegatibleForFree(N1, LegalOperations)) {
+ if (char LHSNeg =3D isNegatibleForFree(N0, LegalOperations, TLI,
+ &DAG.getTarget().Options)) {
+ if (char RHSNeg =3D isNegatibleForFree(N1, LegalOperations, TLI,=20
+ &DAG.getTarget().Options)) {
// Both can be negated for free, check to see if at least one is che=
aper
// negated.
if (LHSNeg =3D=3D 2 || RHSNeg =3D=3D 2)
@@ -5348,7 +5742,8 @@
}
=20
// If allowed, fold (fmul (fmul x, c1), c2) -> (fmul x, (fmul c1, c2))
- if (UnsafeFPMath && N1CFP && N0.getOpcode() =3D=3D ISD::FMUL &&
+ if (DAG.getTarget().Options.UnsafeFPMath &&
+ N1CFP && N0.getOpcode() =3D=3D ISD::FMUL &&
N0.getNode()->hasOneUse() && isa<ConstantFPSDNode>(N0.getOperand(1)))
return DAG.getNode(ISD::FMUL, N->getDebugLoc(), VT, N0.getOperand(0),
DAG.getNode(ISD::FMUL, N->getDebugLoc(), VT,
@@ -5363,6 +5758,7 @@
ConstantFPSDNode *N0CFP =3D dyn_cast<ConstantFPSDNode>(N0);
ConstantFPSDNode *N1CFP =3D dyn_cast<ConstantFPSDNode>(N1);
EVT VT =3D N->getValueType(0);
+ const TargetLowering &TLI =3D DAG.getTargetLoweringInfo();
=20
// fold vector ops
if (VT.isVector()) {
@@ -5374,10 +5770,30 @@
if (N0CFP && N1CFP && VT !=3D MVT::ppcf128)
return DAG.getNode(ISD::FDIV, N->getDebugLoc(), VT, N0, N1);
=20
+ // fold (fdiv X, c2) -> fmul X, 1/c2 if losing precision is acceptable.
+ if (N1CFP && VT !=3D MVT::ppcf128 && DAG.getTarget().Options.UnsafeFPMat=
h) {
+ // Compute the reciprocal 1.0 / c2.
+ APFloat N1APF =3D N1CFP->getValueAPF();
+ APFloat Recip(N1APF.getSemantics(), 1); // 1.0
+ APFloat::opStatus st =3D Recip.divide(N1APF, APFloat::rmNearestTiesToE=
ven);
+ // Only do the transform if the reciprocal is a legal fp immediate that
+ // isn't too nasty (eg NaN, denormal, ...).
+ if ((st =3D=3D APFloat::opOK || st =3D=3D APFloat::opInexact) && // No=
t too nasty
+ (!LegalOperations ||
+ // FIXME: custom lowering of ConstantFP might fail (see e.g. ARM
+ // backend)... we should handle this gracefully after Legalize.
+ // TLI.isOperationLegalOrCustom(llvm::ISD::ConstantFP, VT) ||
+ TLI.isOperationLegal(llvm::ISD::ConstantFP, VT) ||
+ TLI.isFPImmLegal(Recip, VT)))
+ return DAG.getNode(ISD::FMUL, N->getDebugLoc(), VT, N0,
+ DAG.getConstantFP(Recip, VT));
+ }
=20
// (fdiv (fneg X), (fneg Y)) -> (fdiv X, Y)
- if (char LHSNeg =3D isNegatibleForFree(N0, LegalOperations)) {
- if (char RHSNeg =3D isNegatibleForFree(N1, LegalOperations)) {
+ if (char LHSNeg =3D isNegatibleForFree(N0, LegalOperations, TLI,
+ &DAG.getTarget().Options)) {
+ if (char RHSNeg =3D isNegatibleForFree(N1, LegalOperations, TLI,
+ &DAG.getTarget().Options)) {
// Both can be negated for free, check to see if at least one is che=
aper
// negated.
if (LHSNeg =3D=3D 2 || RHSNeg =3D=3D 2)
@@ -5463,7 +5879,7 @@
// fold (sint_to_fp c1) -> c1fp
if (N0C && OpVT !=3D MVT::ppcf128 &&
// ...but only if the target supports immediate floating-point values
- (Level =3D=3D llvm::Unrestricted ||
+ (!LegalOperations ||
TLI.isOperationLegalOrCustom(llvm::ISD::ConstantFP, VT)))
return DAG.getNode(ISD::SINT_TO_FP, N->getDebugLoc(), VT, N0);
=20
@@ -5488,7 +5904,7 @@
// fold (uint_to_fp c1) -> c1fp
if (N0C && OpVT !=3D MVT::ppcf128 &&
// ...but only if the target supports immediate floating-point values
- (Level =3D=3D llvm::Unrestricted ||
+ (!LegalOperations ||
TLI.isOperationLegalOrCustom(llvm::ISD::ConstantFP, VT)))
return DAG.getNode(ISD::UINT_TO_FP, N->getDebugLoc(), VT, N0);
=20
@@ -5630,12 +6046,13 @@
SDValue N0 =3D N->getOperand(0);
EVT VT =3D N->getValueType(0);
=20
- if (isNegatibleForFree(N0, LegalOperations))
+ if (isNegatibleForFree(N0, LegalOperations, DAG.getTargetLoweringInfo(),
+ &DAG.getTarget().Options))
return GetNegatedExpression(N0, DAG, LegalOperations);
=20
// Transform fneg(bitconvert(x)) -> bitconvert(x^sign) to avoid loading
// constant pool values.
- if (N0.getOpcode() =3D=3D ISD::BITCAST &&
+ if (!TLI.isFNegFree(VT) && N0.getOpcode() =3D=3D ISD::BITCAST &&
!VT.isVector() &&
N0.getNode()->hasOneUse() &&
N0.getOperand(0).getValueType().isInteger()) {
@@ -5671,7 +6088,8 @@
=20
// Transform fabs(bitconvert(x)) -> bitconvert(x&~sign) to avoid loading
// constant pool values.
- if (N0.getOpcode() =3D=3D ISD::BITCAST && N0.getNode()->hasOneUse() &&
+ if (!TLI.isFAbsFree(VT) &&=20
+ N0.getOpcode() =3D=3D ISD::BITCAST && N0.getNode()->hasOneUse() &&
N0.getOperand(0).getValueType().isInteger() &&
!N0.getOperand(0).getValueType().isVector()) {
SDValue Int =3D N0.getOperand(0);
@@ -5860,6 +6278,47 @@
return SDValue();
}
=20
+/// canFoldInAddressingMode - Return true if 'Use' is a load or a store th=
at
+/// uses N as its base pointer and that N may be folded in the load / store
+/// addressing mode.
+static bool canFoldInAddressingMode(SDNode *N, SDNode *Use,
+ SelectionDAG &DAG,
+ const TargetLowering &TLI) {
+ EVT VT;
+ if (LoadSDNode *LD =3D dyn_cast<LoadSDNode>(Use)) {
+ if (LD->isIndexed() || LD->getBasePtr().getNode() !=3D N)
+ return false;
+ VT =3D Use->getValueType(0);
+ } else if (StoreSDNode *ST =3D dyn_cast<StoreSDNode>(Use)) {
+ if (ST->isIndexed() || ST->getBasePtr().getNode() !=3D N)
+ return false;
+ VT =3D ST->getValue().getValueType();
+ } else
+ return false;
+
+ TargetLowering::AddrMode AM;
+ if (N->getOpcode() =3D=3D ISD::ADD) {
+ ConstantSDNode *Offset =3D dyn_cast<ConstantSDNode>(N->getOperand(1));
+ if (Offset)
+ // [reg +/- imm]
+ AM.BaseOffs =3D Offset->getSExtValue();
+ else
+ // [reg +/- reg]
+ AM.Scale =3D 1;
+ } else if (N->getOpcode() =3D=3D ISD::SUB) {
+ ConstantSDNode *Offset =3D dyn_cast<ConstantSDNode>(N->getOperand(1));
+ if (Offset)
+ // [reg +/- imm]
+ AM.BaseOffs =3D -Offset->getSExtValue();
+ else
+ // [reg +/- reg]
+ AM.Scale =3D 1;
+ } else
+ return false;
+
+ return TLI.isLegalAddressingMode(AM, VT.getTypeForEVT(*DAG.getContext())=
);
+}
+
/// CombineToPreIndexedLoadStore - Try turning a load / store into a
/// pre-indexed load / store when the base pointer is an add or subtract
/// and it has other uses besides the load / store. After the
@@ -5867,7 +6326,7 @@
/// the add / subtract in and all of its other uses are redirected to the
/// new load / store.
bool DAGCombiner::CombineToPreIndexedLoadStore(SDNode *N) {
- if (!LegalOperations)
+ if (Level < AfterLegalizeDAG)
return false;
=20
bool isLoad =3D true;
@@ -5946,10 +6405,9 @@
if (N->hasPredecessorHelper(Use, Visited, Worklist))
return false;
=20
- if (!((Use->getOpcode() =3D=3D ISD::LOAD &&
- cast<LoadSDNode>(Use)->getBasePtr() =3D=3D Ptr) ||
- (Use->getOpcode() =3D=3D ISD::STORE &&
- cast<StoreSDNode>(Use)->getBasePtr() =3D=3D Ptr)))
+ // If Ptr may be folded in addressing mode of other use, then it's
+ // not profitable to do this transformation.
+ if (!canFoldInAddressingMode(Ptr.getNode(), Use, DAG, TLI))
RealUse =3D true;
}
=20
@@ -5999,7 +6457,7 @@
/// load / store effectively and all of its uses are redirected to the
/// new load / store.
bool DAGCombiner::CombineToPostIndexedLoadStore(SDNode *N) {
- if (!LegalOperations)
+ if (Level < AfterLegalizeDAG)
return false;
=20
bool isLoad =3D true;
@@ -6046,7 +6504,8 @@
continue;
=20
// Try turning it into a post-indexed load / store except when
- // 1) All uses are load / store ops that use it as base ptr.
+ // 1) All uses are load / store ops that use it as base ptr (and
+ // it may be folded as addressing mmode).
// 2) Op must be independent of N, i.e. Op is neither a predecessor
// nor a successor of N. Otherwise, if Op is folded that would
// create a cycle.
@@ -6069,10 +6528,7 @@
for (SDNode::use_iterator III =3D Use->use_begin(),
EEE =3D Use->use_end(); III !=3D EEE; ++III) {
SDNode *UseUse =3D *III;
- if (!((UseUse->getOpcode() =3D=3D ISD::LOAD &&
- cast<LoadSDNode>(UseUse)->getBasePtr().getNode() =3D=3D=
Use) ||
- (UseUse->getOpcode() =3D=3D ISD::STORE &&
- cast<StoreSDNode>(UseUse)->getBasePtr().getNode() =3D=
=3D Use)))
+ if (!canFoldInAddressingMode(Use, UseUse, DAG, TLI))=20
RealUse =3D true;
}
=20
@@ -6139,7 +6595,7 @@
if (!LD->isVolatile()) {
if (N->getValueType(1) =3D=3D MVT::Other) {
// Unindexed loads.
- if (N->hasNUsesOfValue(0, 0)) {
+ if (!N->hasAnyUseOfValue(0)) {
// It's not safe to use the two value CombineTo variant here. e.g.
// v1, chain2 =3D load chain1, loc
// v2, chain3 =3D load chain2, loc
@@ -6164,7 +6620,7 @@
} else {
// Indexed loads.
assert(N->getValueType(2) =3D=3D MVT::Other && "Malformed indexed lo=
ads?");
- if (N->hasNUsesOfValue(0, 0) && N->hasNUsesOfValue(0, 1)) {
+ if (!N->hasAnyUseOfValue(0) && !N->hasAnyUseOfValue(1)) {
SDValue Undef =3D DAG.getUNDEF(N->getValueType(0));
DEBUG(dbgs() << "\nReplacing.7 ";
N->dump(&DAG);
@@ -6222,7 +6678,7 @@
ReplLoad =3D DAG.getLoad(N->getValueType(0), LD->getDebugLoc(),
BetterChain, Ptr, LD->getPointerInfo(),
LD->isVolatile(), LD->isNonTemporal(),
- LD->getAlignment());
+ LD->isInvariant(), LD->getAlignment());
} else {
ReplLoad =3D DAG.getExtLoad(LD->getExtensionType(), LD->getDebugLo=
c(),
LD->getValueType(0),
@@ -6486,7 +6942,7 @@
LD->getChain(), NewPtr,
LD->getPointerInfo().getWithOffset(PtrOf=
f),
LD->isVolatile(), LD->isNonTemporal(),
- NewAlign);
+ LD->isInvariant(), NewAlign);
SDValue NewVal =3D DAG.getNode(Opc, Value.getDebugLoc(), NewVT, NewL=
D,
DAG.getConstant(NewImm, NewVT));
SDValue NewST =3D DAG.getStore(Chain, N->getDebugLoc(),
@@ -6546,7 +7002,7 @@
SDValue NewLD =3D DAG.getLoad(IntVT, Value.getDebugLoc(),
LD->getChain(), LD->getBasePtr(),
LD->getPointerInfo(),
- false, false, LDAlign);
+ false, false, false, LDAlign);
=20
SDValue NewST =3D DAG.getStore(NewLD.getValue(1), N->getDebugLoc(),
NewLD, ST->getBasePtr(),
@@ -6823,13 +7279,14 @@
SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) {
// (vextract (scalar_to_vector val, 0) -> val
SDValue InVec =3D N->getOperand(0);
+ EVT VT =3D InVec.getValueType();
+ EVT NVT =3D N->getValueType(0);
=20
if (InVec.getOpcode() =3D=3D ISD::SCALAR_TO_VECTOR) {
// Check if the result type doesn't match the inserted element type. A
// SCALAR_TO_VECTOR may truncate the inserted element and the
// EXTRACT_VECTOR_ELT may widen the extracted vector.
SDValue InOp =3D InVec.getOperand(0);
- EVT NVT =3D N->getValueType(0);
if (InOp.getValueType() !=3D NVT) {
assert(InOp.getValueType().isInteger() && NVT.isInteger());
return DAG.getSExtOrTrunc(InOp, InVec.getDebugLoc(), NVT);
@@ -6837,6 +7294,38 @@
return InOp;
}
=20
+ SDValue EltNo =3D N->getOperand(1);
+ bool ConstEltNo =3D isa<ConstantSDNode>(EltNo);
+
+ // Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_E=
LT.
+ // We only perform this optimization before the op legalization phase be=
cause
+ // we may introduce new vector instructions which are not backed by TD p=
atterns.
+ // For example on AVX, extracting elements from a wide vector without us=
ing
+ // extract_subvector.
+ if (InVec.getOpcode() =3D=3D ISD::VECTOR_SHUFFLE
+ && ConstEltNo && !LegalOperations) {
+ int Elt =3D cast<ConstantSDNode>(EltNo)->getZExtValue();
+ int NumElem =3D VT.getVectorNumElements();
+ ShuffleVectorSDNode *SVOp =3D cast<ShuffleVectorSDNode>(InVec);
+ // Find the new index to extract from.
+ int OrigElt =3D SVOp->getMaskElt(Elt);
+
+ // Extracting an undef index is undef.
+ if (OrigElt =3D=3D -1)
+ return DAG.getUNDEF(NVT);
+
+ // Select the right vector half to extract from.
+ if (OrigElt < NumElem) {
+ InVec =3D InVec->getOperand(0);
+ } else {
+ InVec =3D InVec->getOperand(1);
+ OrigElt -=3D NumElem;
+ }
+
+ return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(), NVT,
+ InVec, DAG.getConstant(OrigElt, MVT::i32));
+ }
+
// Perform only after legalization to ensure build_vector / vector_shuff=
le
// optimizations have already been done.
if (!LegalOperations) return SDValue();
@@ -6844,17 +7333,24 @@
// (vextract (v4f32 load $addr), c) -> (f32 load $addr+c*size)
// (vextract (v4f32 s2v (f32 load $addr)), c) -> (f32 load $addr+c*size)
// (vextract (v4f32 shuffle (load $addr), <1,u,u,u>), 0) -> (f32 load $a=
ddr)
- SDValue EltNo =3D N->getOperand(1);
-
- if (isa<ConstantSDNode>(EltNo)) {
+
+ if (ConstEltNo) {
int Elt =3D cast<ConstantSDNode>(EltNo)->getZExtValue();
bool NewLoad =3D false;
bool BCNumEltsChanged =3D false;
- EVT VT =3D InVec.getValueType();
EVT ExtVT =3D VT.getVectorElementType();
EVT LVT =3D ExtVT;
=20
+ // If the result of load has to be truncated, then it's not necessarily
+ // profitable.
+ if (NVT.bitsLT(LVT) && !TLI.isTruncateFree(LVT, NVT))
+ return SDValue();
+
if (InVec.getOpcode() =3D=3D ISD::BITCAST) {
+ // Don't duplicate a load with other uses.
+ if (!InVec.hasOneUse())
+ return SDValue();
+
EVT BCVT =3D InVec.getOperand(0).getValueType();
if (!BCVT.isVector() || ExtVT.bitsGT(BCVT.getVectorElementType()))
return SDValue();
@@ -6872,12 +7368,20 @@
} else if (InVec.getOpcode() =3D=3D ISD::SCALAR_TO_VECTOR &&
InVec.getOperand(0).getValueType() =3D=3D ExtVT &&
ISD::isNormalLoad(InVec.getOperand(0).getNode())) {
+ // Don't duplicate a load with other uses.
+ if (!InVec.hasOneUse())
+ return SDValue();
+
LN0 =3D cast<LoadSDNode>(InVec.getOperand(0));
} else if ((SVN =3D dyn_cast<ShuffleVectorSDNode>(InVec))) {
// (vextract (vector_shuffle (load $addr), v2, <1, u, u, u>), 1)
// =3D>
// (load $addr+1*size)
=20
+ // Don't duplicate a load with other uses.
+ if (!InVec.hasOneUse())
+ return SDValue();
+
// If the bit convert changed the number of elements, it is unsafe
// to examine the mask.
if (BCNumEltsChanged)
@@ -6888,14 +7392,21 @@
int Idx =3D (Elt > (int)NumElems) ? -1 : SVN->getMaskElt(Elt);
InVec =3D (Idx < (int)NumElems) ? InVec.getOperand(0) : InVec.getOpe=
rand(1);
=20
- if (InVec.getOpcode() =3D=3D ISD::BITCAST)
+ if (InVec.getOpcode() =3D=3D ISD::BITCAST) {
+ // Don't duplicate a load with other uses.
+ if (!InVec.hasOneUse())
+ return SDValue();
+
InVec =3D InVec.getOperand(0);
+ }
if (ISD::isNormalLoad(InVec.getNode())) {
LN0 =3D cast<LoadSDNode>(InVec);
Elt =3D (Idx < (int)NumElems) ? Idx : Idx - (int)NumElems;
}
}
=20
+ // Make sure we found a non-volatile load and the extractelement is
+ // the only use.
if (!LN0 || !LN0->hasNUsesOfValue(1,0) || LN0->isVolatile())
return SDValue();
=20
@@ -6929,9 +7440,45 @@
DAG.getConstant(PtrOff, PtrType));
}
=20
- return DAG.getLoad(LVT, N->getDebugLoc(), LN0->getChain(), NewPtr,
- LN0->getPointerInfo().getWithOffset(PtrOff),
- LN0->isVolatile(), LN0->isNonTemporal(), Align);
+ // The replacement we need to do here is a little tricky: we need to
+ // replace an extractelement of a load with a load.
+ // Use ReplaceAllUsesOfValuesWith to do the replacement.
+ // Note that this replacement assumes that the extractvalue is the only
+ // use of the load; that's okay because we don't want to perform this
+ // transformation in other cases anyway.
+ SDValue Load;
+ SDValue Chain;
+ if (NVT.bitsGT(LVT)) {
+ // If the result type of vextract is wider than the load, then issue=
an
+ // extending load instead.
+ ISD::LoadExtType ExtType =3D TLI.isLoadExtLegal(ISD::ZEXTLOAD, LVT)
+ ? ISD::ZEXTLOAD : ISD::EXTLOAD;
+ Load =3D DAG.getExtLoad(ExtType, N->getDebugLoc(), NVT, LN0->getChai=
n(),
+ NewPtr, LN0->getPointerInfo().getWithOffset(Pt=
rOff),
+ LVT, LN0->isVolatile(), LN0->isNonTemporal(),A=
lign);
+ Chain =3D Load.getValue(1);
+ } else {
+ Load =3D DAG.getLoad(LVT, N->getDebugLoc(), LN0->getChain(), NewPtr,
+ LN0->getPointerInfo().getWithOffset(PtrOff),
+ LN0->isVolatile(), LN0->isNonTemporal(),=20
+ LN0->isInvariant(), Align);
+ Chain =3D Load.getValue(1);
+ if (NVT.bitsLT(LVT))
+ Load =3D DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), NVT, Load);
+ else
+ Load =3D DAG.getNode(ISD::BITCAST, N->getDebugLoc(), NVT, Load);
+ }
+ WorkListRemover DeadNodes(*this);
+ SDValue From[] =3D { SDValue(N, 0), SDValue(LN0,1) };
+ SDValue To[] =3D { Load, Chain };
+ DAG.ReplaceAllUsesOfValuesWith(From, To, 2, &DeadNodes);
+ // Since we're explcitly calling ReplaceAllUses, add the new node to t=
he
+ // worklist explicitly as well.
+ AddToWorkList(Load.getNode());
+ AddUsersToWorkList(Load.getNode()); // Add users too
+ // Make sure to revisit this node to clean it up; it will usually be d=
ead.
+ AddToWorkList(N);
+ return SDValue(N, 0);
}
=20
return SDValue();
@@ -6939,11 +7486,122 @@
=20
SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) {
unsigned NumInScalars =3D N->getNumOperands();
+ DebugLoc dl =3D N->getDebugLoc();
EVT VT =3D N->getValueType(0);
+ // Check to see if this is a BUILD_VECTOR of a bunch of values
+ // which come from any_extend or zero_extend nodes. If so, we can create
+ // a new BUILD_VECTOR using bit-casts which may enable other BUILD_VECTOR
+ // optimizations. We do not handle sign-extend because we can't fill the=
sign
+ // using shuffles.
+ EVT SourceType =3D MVT::Other;
+ bool AllAnyExt =3D true;
+ bool AllUndef =3D true;
+ for (unsigned i =3D 0; i !=3D NumInScalars; ++i) {
+ SDValue In =3D N->getOperand(i);
+ // Ignore undef inputs.
+ if (In.getOpcode() =3D=3D ISD::UNDEF) continue;
+ AllUndef =3D false;
+
+ bool AnyExt =3D In.getOpcode() =3D=3D ISD::ANY_EXTEND;
+ bool ZeroExt =3D In.getOpcode() =3D=3D ISD::ZERO_EXTEND;
+
+ // Abort if the element is not an extension.
+ if (!ZeroExt && !AnyExt) {
+ SourceType =3D MVT::Other;
+ break;
+ }
+
+ // The input is a ZeroExt or AnyExt. Check the original type.
+ EVT InTy =3D In.getOperand(0).getValueType();
+
+ // Check that all of the widened source types are the same.
+ if (SourceType =3D=3D MVT::Other)
+ // First time.
+ SourceType =3D InTy;
+ else if (InTy !=3D SourceType) {
+ // Multiple income types. Abort.
+ SourceType =3D MVT::Other;
+ break;
+ }
+
+ // Check if all of the extends are ANY_EXTENDs.
+ AllAnyExt &=3D AnyExt;
+ }
+
+ if (AllUndef)
+ return DAG.getUNDEF(VT);
+
+ // In order to have valid types, all of the inputs must be extended from=
the
+ // same source type and all of the inputs must be any or zero extend.
+ // Scalar sizes must be a power of two.
+ EVT OutScalarTy =3D N->getValueType(0).getScalarType();
+ bool ValidTypes =3D SourceType !=3D MVT::Other &&
+ isPowerOf2_32(OutScalarTy.getSizeInBits()) &&
+ isPowerOf2_32(SourceType.getSizeInBits());
+
+ // We perform this optimization post type-legalization because
+ // the type-legalizer often scalarizes integer-promoted vectors.
+ // Performing this optimization before may create bit-casts which
+ // will be type-legalized to complex code sequences.
+ // We perform this optimization only before the operation legalizer beca=
use we
+ // may introduce illegal operations.
+ // Create a new simpler BUILD_VECTOR sequence which other optimizations =
can
+ // turn into a single shuffle instruction.
+ if ((Level =3D=3D AfterLegalizeVectorOps || Level =3D=3D AfterLegalizeTy=
pes) &&
+ ValidTypes) {
+ bool isLE =3D TLI.isLittleEndian();
+ unsigned ElemRatio =3D OutScalarTy.getSizeInBits()/SourceType.getSizeI=
nBits();
+ assert(ElemRatio > 1 && "Invalid element size ratio");
+ SDValue Filler =3D AllAnyExt ? DAG.getUNDEF(SourceType):
+ DAG.getConstant(0, SourceType);
+
+ unsigned NewBVElems =3D ElemRatio * N->getValueType(0).getVectorNumEle=
ments();
+ SmallVector<SDValue, 8> Ops(NewBVElems, Filler);
+
+ // Populate the new build_vector
+ for (unsigned i=3D0; i < N->getNumOperands(); ++i) {
+ SDValue Cast =3D N->getOperand(i);
+ assert((Cast.getOpcode() =3D=3D ISD::ANY_EXTEND ||
+ Cast.getOpcode() =3D=3D ISD::ZERO_EXTEND ||
+ Cast.getOpcode() =3D=3D ISD::UNDEF) && "Invalid cast opcode"=
);
+ SDValue In;
+ if (Cast.getOpcode() =3D=3D ISD::UNDEF)
+ In =3D DAG.getUNDEF(SourceType);
+ else
+ In =3D Cast->getOperand(0);
+ unsigned Index =3D isLE ? (i * ElemRatio) :
+ (i * ElemRatio + (ElemRatio - 1));
+
+ assert(Index < Ops.size() && "Invalid index");
+ Ops[Index] =3D In;
+ }
+
+ // The type of the new BUILD_VECTOR node.
+ EVT VecVT =3D EVT::getVectorVT(*DAG.getContext(), SourceType, NewBVEle=
ms);
+ assert(VecVT.getSizeInBits() =3D=3D N->getValueType(0).getSizeInBits()=
&&
+ "Invalid vector size");
+ // Check if the new vector type is legal.
+ if (!isTypeLegal(VecVT)) return SDValue();
+
+ // Make the new BUILD_VECTOR.
+ SDValue BV =3D DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(),
+ VecVT, &Ops[0], Ops.size());
+
+ // The new BUILD_VECTOR node has the potential to be further optimized.
+ AddToWorkList(BV.getNode());
+ // Bitcast to the desired type.
+ return DAG.getNode(ISD::BITCAST, dl, N->getValueType(0), BV);
+ }
=20
// Check to see if this is a BUILD_VECTOR of a bunch of EXTRACT_VECTOR_E=
LT
// operations. If so, and if the EXTRACT_VECTOR_ELT vector inputs come =
from
// at most two distinct vectors, turn this into a shuffle node.
+
+ // May only combine to shuffle after legalize if shuffle is legal.
+ if (LegalOperations &&
+ !TLI.isOperationLegalOrCustom(ISD::VECTOR_SHUFFLE, VT))
+ return SDValue();
+
SDValue VecIn1, VecIn2;
for (unsigned i =3D 0; i !=3D NumInScalars; ++i) {
// Ignore undef inputs.
@@ -6957,15 +7615,8 @@
break;
}
=20
- // If the input vector type disagrees with the result of the build_vec=
tor,
- // we can't make a shuffle.
+ // We allow up to two distinct input vectors.
SDValue ExtractedFromVec =3D N->getOperand(i).getOperand(0);
- if (ExtractedFromVec.getValueType() !=3D VT) {
- VecIn1 =3D VecIn2 =3D SDValue(0, 0);
- break;
- }
-
- // Otherwise, remember this. We allow up to two distinct input vector=
s.
if (ExtractedFromVec =3D=3D VecIn1 || ExtractedFromVec =3D=3D VecIn2)
continue;
=20
@@ -6980,7 +7631,7 @@
}
}
=20
- // If everything is good, we can make a shuffle operation.
+ // If everything is good, we can make a shuffle operation.
if (VecIn1.getNode()) {
SmallVector<int, 8> Mask;
for (unsigned i =3D 0; i !=3D NumInScalars; ++i) {
@@ -7006,14 +7657,39 @@
Mask.push_back(Idx+NumInScalars);
}
=20
- // Add count and size info.
+ // We can't generate a shuffle node with mismatched input and output t=
ypes.
+ // Attempt to transform a single input vector to the correct type.
+ if ((VT !=3D VecIn1.getValueType())) {
+ // We don't support shuffeling between TWO values of different types.
+ if (VecIn2.getNode() !=3D 0)
+ return SDValue();
+
+ // We only support widening of vectors which are half the size of the
+ // output registers. For example XMM->YMM widening on X86 with AVX.
+ if (VecIn1.getValueType().getSizeInBits()*2 !=3D VT.getSizeInBits())
+ return SDValue();
+
+ // Widen the input vector by adding undef values.
+ VecIn1 =3D DAG.getNode(ISD::CONCAT_VECTORS, N->getDebugLoc(), VT,
+ VecIn1, DAG.getUNDEF(VecIn1.getValueType()));
+ }
+
+ // If VecIn2 is unused then change it to undef.
+ VecIn2 =3D VecIn2.getNode() ? VecIn2 : DAG.getUNDEF(VT);
+
+ // Check that we were able to transform all incoming values to the sam=
e type.
+ if (VecIn2.getValueType() !=3D VecIn1.getValueType() ||
+ VecIn1.getValueType() !=3D VT)
+ return SDValue();
+
+ // Only type-legal BUILD_VECTOR nodes are converted to shuffle nodes.
if (!isTypeLegal(VT))
return SDValue();
=20
// Return the new VECTOR_SHUFFLE node.
SDValue Ops[2];
Ops[0] =3D VecIn1;
- Ops[1] =3D VecIn2.getNode() ? VecIn2 : DAG.getUNDEF(VT);
+ Ops[1] =3D VecIn2;
return DAG.getVectorShuffle(VT, N->getDebugLoc(), Ops[0], Ops[1], &Mas=
k[0]);
}
=20
@@ -7045,19 +7721,23 @@
if (NVT !=3D SmallVT || NVT.getSizeInBits()*2 !=3D BigVT.getSizeInBits=
())
return SDValue();
=20
- // Combine:
- // (extract_subvec (insert_subvec V1, V2, InsIdx), ExtIdx)
- // Into:
- // indicies are equal =3D> V1
- // otherwise =3D> (extract_subvec V1, ExtIdx)
- //
- SDValue InsIdx =3D N->getOperand(1);
- SDValue ExtIdx =3D V->getOperand(2);
-
- if (InsIdx =3D=3D ExtIdx)
- return V->getOperand(1);
- return DAG.getNode(ISD::EXTRACT_SUBVECTOR, N->getDebugLoc(), NVT,
- V->getOperand(0), N->getOperand(1));
+ // Only handle cases where both indexes are constants with the same ty=
pe.
+ ConstantSDNode *InsIdx =3D dyn_cast<ConstantSDNode>(N->getOperand(1));
+ ConstantSDNode *ExtIdx =3D dyn_cast<ConstantSDNode>(V->getOperand(2));
+
+ if (InsIdx && ExtIdx &&
+ InsIdx->getValueType(0).getSizeInBits() <=3D 64 &&
+ ExtIdx->getValueType(0).getSizeInBits() <=3D 64) {
+ // Combine:
+ // (extract_subvec (insert_subvec V1, V2, InsIdx), ExtIdx)
+ // Into:
+ // indices are equal =3D> V1
+ // otherwise =3D> (extract_subvec V1, ExtIdx)
+ if (InsIdx->getZExtValue() =3D=3D ExtIdx->getZExtValue())
+ return V->getOperand(1);
+ return DAG.getNode(ISD::EXTRACT_SUBVECTOR, N->getDebugLoc(), NVT,
+ V->getOperand(0), N->getOperand(1));
+ }
}
=20
return SDValue();
@@ -7068,15 +7748,63 @@
unsigned NumElts =3D VT.getVectorNumElements();
=20
SDValue N0 =3D N->getOperand(0);
-
- assert(N0.getValueType().getVectorNumElements() =3D=3D NumElts &&
- "Vector shuffle must be normalized in DAG");
-
- // FIXME: implement canonicalizations from DAG.getVectorShuffle()
+ SDValue N1 =3D N->getOperand(1);
+
+ assert(N0.getValueType() =3D=3D VT && "Vector shuffle must be normalized=
in DAG");
+
+ // Canonicalize shuffle undef, undef -> undef
+ if (N0.getOpcode() =3D=3D ISD::UNDEF && N1.getOpcode() =3D=3D ISD::UNDEF)
+ return DAG.getUNDEF(VT);
+
+ ShuffleVectorSDNode *SVN =3D cast<ShuffleVectorSDNode>(N);
+
+ // Canonicalize shuffle v, v -> v, undef
+ if (N0 =3D=3D N1) {
+ SmallVector<int, 8> NewMask;
+ for (unsigned i =3D 0; i !=3D NumElts; ++i) {
+ int Idx =3D SVN->getMaskElt(i);
+ if (Idx >=3D (int)NumElts) Idx -=3D NumElts;
+ NewMask.push_back(Idx);
+ }
+ return DAG.getVectorShuffle(VT, N->getDebugLoc(), N0, DAG.getUNDEF(VT),
+ &NewMask[0]);
+ }
+
+ // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
+ if (N0.getOpcode() =3D=3D ISD::UNDEF) {
+ SmallVector<int, 8> NewMask;
+ for (unsigned i =3D 0; i !=3D NumElts; ++i) {
+ int Idx =3D SVN->getMaskElt(i);
+ if (Idx >=3D 0) {
+ if (Idx < (int)NumElts)
+ Idx +=3D NumElts;
+ else
+ Idx -=3D NumElts;
+ }
+ NewMask.push_back(Idx);
+ }
+ return DAG.getVectorShuffle(VT, N->getDebugLoc(), N1, DAG.getUNDEF(VT),
+ &NewMask[0]);
+ }
+
+ // Remove references to rhs if it is undef
+ if (N1.getOpcode() =3D=3D ISD::UNDEF) {
+ bool Changed =3D false;
+ SmallVector<int, 8> NewMask;
+ for (unsigned i =3D 0; i !=3D NumElts; ++i) {
+ int Idx =3D SVN->getMaskElt(i);
+ if (Idx >=3D (int)NumElts) {
+ Idx =3D -1;
+ Changed =3D true;
+ }
+ NewMask.push_back(Idx);
+ }
+ if (Changed)
+ return DAG.getVectorShuffle(VT, N->getDebugLoc(), N0, N1, &NewMask[0=
]);
+ }
=20
// If it is a splat, check if the argument vector is another splat or a
// build_vector with all scalar elements the same.
- ShuffleVectorSDNode *SVN =3D cast<ShuffleVectorSDNode>(N);
if (SVN->isSplat() && SVN->getSplatIndex() < (int)NumElts) {
SDNode *V =3D N0.getNode();
=20
@@ -7115,6 +7843,40 @@
return N0;
}
}
+
+ // If this shuffle node is simply a swizzle of another shuffle node,
+ // and it reverses the swizzle of the previous shuffle then we can
+ // optimize shuffle(shuffle(x, undef), undef) -> x.
+ if (N0.getOpcode() =3D=3D ISD::VECTOR_SHUFFLE && Level < AfterLegalizeDA=
G &&
+ N1.getOpcode() =3D=3D ISD::UNDEF) {
+
+ ShuffleVectorSDNode *OtherSV =3D cast<ShuffleVectorSDNode>(N0);
+
+ // Shuffle nodes can only reverse shuffles with a single non-undef val=
ue.
+ if (N0.getOperand(1).getOpcode() !=3D ISD::UNDEF)
+ return SDValue();
+
+ // The incoming shuffle must be of the same type as the result of the
+ // current shuffle.
+ assert(OtherSV->getOperand(0).getValueType() =3D=3D VT &&
+ "Shuffle types don't match");
+
+ for (unsigned i =3D 0; i !=3D NumElts; ++i) {
+ int Idx =3D SVN->getMaskElt(i);
+ assert(Idx < (int)NumElts && "Index references undef operand");
+ // Next, this index comes from the first value, which is the incoming
+ // shuffle. Adopt the incoming index.
+ if (Idx >=3D 0)
+ Idx =3D OtherSV->getMaskElt(Idx);
+
+ // The combined shuffle must map each index to itself.
+ if (Idx >=3D 0 && (unsigned)Idx !=3D i)
+ return SDValue();
+ }
+
+ return OtherSV->getOperand(0);
+ }
+
return SDValue();
}
=20
@@ -7190,7 +7952,8 @@
SDValue Elt =3D RHS.getOperand(i);
if (!isa<ConstantSDNode>(Elt))
return SDValue();
- else if (cast<ConstantSDNode>(Elt)->isAllOnesValue())
+
+ if (cast<ConstantSDNode>(Elt)->isAllOnesValue())
Indices.push_back(i);
else if (cast<ConstantSDNode>(Elt)->isNullValue())
Indices.push_back(NumElts);
@@ -7261,8 +8024,19 @@
}
=20
EVT VT =3D LHSOp.getValueType();
- assert(RHSOp.getValueType() =3D=3D VT &&
- "SimplifyVBinOp with different BUILD_VECTOR element types");
+ EVT RVT =3D RHSOp.getValueType();
+ if (RVT !=3D VT) {
+ // Integer BUILD_VECTOR operands may have types larger than the el=
ement
+ // size (e.g., when the element type is not legal). Prior to type
+ // legalization, the types may not match between the two BUILD_VEC=
TORS.
+ // Truncate one of the operands to make them match.
+ if (RVT.getSizeInBits() > VT.getSizeInBits()) {
+ RHSOp =3D DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), VT, RHSOp=
);
+ } else {
+ LHSOp =3D DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), RVT, LHSO=
p);
+ VT =3D RVT;
+ }
+ }
SDValue FoldOp =3D DAG.getNode(N->getOpcode(), LHS.getDebugLoc(), VT,
LHSOp, RHSOp);
if (FoldOp.getOpcode() !=3D ISD::UNDEF &&
@@ -7374,8 +8148,8 @@
=20
if ((LLD->hasAnyUseOfValue(1) &&
(LLD->isPredecessorOf(CondLHS) || LLD->isPredecessorOf(CondRHS)=
)) ||
- (LLD->hasAnyUseOfValue(1) &&
- (LLD->isPredecessorOf(CondLHS) || LLD->isPredecessorOf(CondRHS)=
)))
+ (RLD->hasAnyUseOfValue(1) &&
+ (RLD->isPredecessorOf(CondLHS) || RLD->isPredecessorOf(CondRHS)=
)))
return false;
=20
Addr =3D DAG.getNode(ISD::SELECT_CC, TheSelect->getDebugLoc(),
@@ -7393,7 +8167,7 @@
// FIXME: Discards pointer info.
LLD->getChain(), Addr, MachinePointerInfo(),
LLD->isVolatile(), LLD->isNonTemporal(),
- LLD->getAlignment());
+ LLD->isInvariant(), LLD->getAlignment());
} else {
Load =3D DAG.getExtLoad(LLD->getExtensionType() =3D=3D ISD::EXTLOAD ?
RLD->getExtensionType() : LLD->getExtensionTyp=
e(),
@@ -7509,7 +8283,7 @@
AddToWorkList(CPIdx.getNode());
return DAG.getLoad(TV->getValueType(0), DL, DAG.getEntryNode(), CP=
Idx,
MachinePointerInfo::getConstantPool(), false,
- false, Alignment);
+ false, false, Alignment);
=20
}
}
@@ -7517,8 +8291,6 @@
// Check to see if we can perform the "gzip trick", transforming
// (select_cc setlt X, 0, A, 0) -> (and (sra X, (sub size(X), 1), A)
if (N1C && N3C && N3C->isNullValue() && CC =3D=3D ISD::SETLT &&
- N0.getValueType().isInteger() &&
- N2.getValueType().isInteger() &&
(N1C->isNullValue() || // (a < 0) ? b : 0
(N1C->getAPIntValue() =3D=3D 1 && N0 =3D=3D N2))) { // (a < 1) ? =
a : 0
EVT XType =3D N0.getValueType();
@@ -7720,7 +8492,7 @@
/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
SDValue DAGCombiner::BuildSDIV(SDNode *N) {
std::vector<SDNode*> Built;
- SDValue S =3D TLI.BuildSDIV(N, DAG, &Built);
+ SDValue S =3D TLI.BuildSDIV(N, DAG, LegalOperations, &Built);
=20
for (std::vector<SDNode*>::iterator ii =3D Built.begin(), ee =3D Built.e=
nd();
ii !=3D ee; ++ii)
@@ -7734,7 +8506,7 @@
/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
SDValue DAGCombiner::BuildUDIV(SDNode *N) {
std::vector<SDNode*> Built;
- SDValue S =3D TLI.BuildUDIV(N, DAG, &Built);
+ SDValue S =3D TLI.BuildUDIV(N, DAG, LegalOperations, &Built);
=20
for (std::vector<SDNode*>::iterator ii =3D Built.begin(), ee =3D Built.e=
nd();
ii !=3D ee; ++ii)
@@ -7856,30 +8628,20 @@
/// FindAliasInfo - Extracts the relevant alias information from the memory
/// node. Returns true if the operand was a load.
bool DAGCombiner::FindAliasInfo(SDNode *N,
- SDValue &Ptr, int64_t &Size,
- const Value *&SrcValue,
- int &SrcValueOffset,
- unsigned &SrcValueAlign,
- const MDNode *&TBAAInfo) const {
- if (LoadSDNode *LD =3D dyn_cast<LoadSDNode>(N)) {
- Ptr =3D LD->getBasePtr();
- Size =3D LD->getMemoryVT().getSizeInBits() >> 3;
- SrcValue =3D LD->getSrcValue();
- SrcValueOffset =3D LD->getSrcValueOffset();
- SrcValueAlign =3D LD->getOriginalAlignment();
- TBAAInfo =3D LD->getTBAAInfo();
- return true;
- }
- if (StoreSDNode *ST =3D dyn_cast<StoreSDNode>(N)) {
- Ptr =3D ST->getBasePtr();
- Size =3D ST->getMemoryVT().getSizeInBits() >> 3;
- SrcValue =3D ST->getSrcValue();
- SrcValueOffset =3D ST->getSrcValueOffset();
- SrcValueAlign =3D ST->getOriginalAlignment();
- TBAAInfo =3D ST->getTBAAInfo();
- return false;
- }
- llvm_unreachable("FindAliasInfo expected a memory operand");
+ SDValue &Ptr, int64_t &Size,
+ const Value *&SrcValue,
+ int &SrcValueOffset,
+ unsigned &SrcValueAlign,
+ const MDNode *&TBAAInfo) const {
+ LSBaseSDNode *LS =3D cast<LSBaseSDNode>(N);
+
+ Ptr =3D LS->getBasePtr();
+ Size =3D LS->getMemoryVT().getSizeInBits() >> 3;
+ SrcValue =3D LS->getSrcValue();
+ SrcValueOffset =3D LS->getSrcValueOffset();
+ SrcValueAlign =3D LS->getOriginalAlignment();
+ TBAAInfo =3D LS->getTBAAInfo();
+ return isa<LoadSDNode>(LS);
}
=20
/// GatherAllAliases - Walk up chain skipping non-aliasing memory nodes,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/FastISel.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp Tue Apr 17 11=
:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp Tue Apr 17 11=
:51:51 2012 +0300
@@ -39,6 +39,7 @@
//
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
+#define DEBUG_TYPE "isel"
#include "llvm/Function.h"
#include "llvm/GlobalVariable.h"
#include "llvm/Instructions.h"
@@ -58,8 +59,15 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Debug.h"
+#include "llvm/ADT/Statistic.h"
using namespace llvm;
=20
+STATISTIC(NumFastIselSuccessIndependent, "Number of insts selected by "
+ "target-independent selector");
+STATISTIC(NumFastIselSuccessTarget, "Number of insts selected by "
+ "target-specific selector");
+STATISTIC(NumFastIselDead, "Number of dead insts removed on failure");
+
/// startNewBlock - Set the current block to which generated machine
/// instructions will be appended, and clear the local CSE map.
///
@@ -96,6 +104,11 @@
!hasTrivialKill(Cast->getOperand(0)))
return false;
=20
+ // GEPs with all zero indices are trivially coalesced by fast-isel.
+ if (const GetElementPtrInst *GEP =3D dyn_cast<GetElementPtrInst>(I))
+ if (GEP->hasAllZeroIndices() && !hasTrivialKill(GEP->getOperand(0)))
+ return false;
+
// Only instructions with a single use in the same basic block are consi=
dered
// to have trivial kills.
return I->hasOneUse() &&
@@ -123,15 +136,8 @@
return 0;
}
=20
- // Look up the value to see if we already have a register for it. We
- // cache values defined by Instructions across blocks, and other values
- // only locally. This is because Instructions already have the SSA
- // def-dominates-use requirement enforced.
- DenseMap<const Value *, unsigned>::iterator I =3D FuncInfo.ValueMap.find=
(V);
- if (I !=3D FuncInfo.ValueMap.end())
- return I->second;
-
- unsigned Reg =3D LocalValueMap[V];
+ // Look up the value to see if we already have a register for it.
+ unsigned Reg =3D lookUpRegForValue(V);
if (Reg !=3D 0)
return Reg;
=20
@@ -186,7 +192,7 @@
uint32_t IntBitWidth =3D IntVT.getSizeInBits();
bool isExact;
(void) Flt.convertToInteger(x, IntBitWidth, /*isSigned=3D*/true,
- APFloat::rmTowardZero, &isExact);
+ APFloat::rmTowardZero, &isExact);
if (isExact) {
APInt IntVal(IntBitWidth, x);
=20
@@ -297,6 +303,18 @@
++FuncInfo.InsertPt;
}
=20
+void FastISel::removeDeadCode(MachineBasicBlock::iterator I,
+ MachineBasicBlock::iterator E) {
+ assert (I && E && std::distance(I, E) > 0 && "Invalid iterator!");
+ while (I !=3D E) {
+ MachineInstr *Dead =3D &*I;
+ ++I;
+ Dead->eraseFromParent();
+ ++NumFastIselDead;
+ }
+ recomputeInsertPt();
+}
+
FastISel::SavePoint FastISel::enterLocalValueArea() {
MachineBasicBlock::iterator OldInsertPt =3D FuncInfo.InsertPt;
DebugLoc OldDL =3D DL;
@@ -377,6 +395,13 @@
ISDOpcode =3D ISD::SRA;
}
=20
+ // Transform "urem x, pow2" -> "and x, pow2-1".
+ if (ISDOpcode =3D=3D ISD::UREM && isa<BinaryOperator>(I) &&
+ isPowerOf2_64(Imm)) {
+ --Imm;
+ ISDOpcode =3D ISD::AND;
+ }
+
unsigned ResultReg =3D FastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0,
Op0IsKill, Imm, VT.getSimpleVT());
if (ResultReg =3D=3D 0) return false;
@@ -427,6 +452,11 @@
=20
bool NIsKill =3D hasTrivialKill(I->getOperand(0));
=20
+ // Keep a running tab of the total offset to coalesce multiple N =3D N +=
Offset
+ // into a single N =3D N + TotalOffset.
+ uint64_t TotalOffs =3D 0;
+ // FIXME: What's a good SWAG number for MaxOffs?
+ uint64_t MaxOffs =3D 2048;
Type *Ty =3D I->getOperand(0)->getType();
MVT VT =3D TLI.getPointerTy();
for (GetElementPtrInst::const_op_iterator OI =3D I->op_begin()+1,
@@ -436,14 +466,15 @@
unsigned Field =3D cast<ConstantInt>(Idx)->getZExtValue();
if (Field) {
// N =3D N + Offset
- uint64_t Offs =3D TD.getStructLayout(StTy)->getElementOffset(Field=
);
- // FIXME: This can be optimized by combining the add with a
- // subsequent one.
- N =3D FastEmit_ri_(VT, ISD::ADD, N, NIsKill, Offs, VT);
- if (N =3D=3D 0)
- // Unhandled operand. Halt "fast" selection and bail.
- return false;
- NIsKill =3D true;
+ TotalOffs +=3D TD.getStructLayout(StTy)->getElementOffset(Field);
+ if (TotalOffs >=3D MaxOffs) {
+ N =3D FastEmit_ri_(VT, ISD::ADD, N, NIsKill, TotalOffs, VT);
+ if (N =3D=3D 0)
+ // Unhandled operand. Halt "fast" selection and bail.
+ return false;
+ NIsKill =3D true;
+ TotalOffs =3D 0;
+ }
}
Ty =3D StTy->getElementType(Field);
} else {
@@ -452,14 +483,26 @@
// If this is a constant subscript, handle it quickly.
if (const ConstantInt *CI =3D dyn_cast<ConstantInt>(Idx)) {
if (CI->isZero()) continue;
- uint64_t Offs =3D
+ // N =3D N + Offset
+ TotalOffs +=3D=20
TD.getTypeAllocSize(Ty)*cast<ConstantInt>(CI)->getSExtValue();
- N =3D FastEmit_ri_(VT, ISD::ADD, N, NIsKill, Offs, VT);
+ if (TotalOffs >=3D MaxOffs) {
+ N =3D FastEmit_ri_(VT, ISD::ADD, N, NIsKill, TotalOffs, VT);
+ if (N =3D=3D 0)
+ // Unhandled operand. Halt "fast" selection and bail.
+ return false;
+ NIsKill =3D true;
+ TotalOffs =3D 0;
+ }
+ continue;
+ }
+ if (TotalOffs) {
+ N =3D FastEmit_ri_(VT, ISD::ADD, N, NIsKill, TotalOffs, VT);
if (N =3D=3D 0)
// Unhandled operand. Halt "fast" selection and bail.
return false;
NIsKill =3D true;
- continue;
+ TotalOffs =3D 0;
}
=20
// N =3D N + Idx * ElementSize;
@@ -484,6 +527,12 @@
return false;
}
}
+ if (TotalOffs) {
+ N =3D FastEmit_ri_(VT, ISD::ADD, N, NIsKill, TotalOffs, VT);
+ if (N =3D=3D 0)
+ // Unhandled operand. Halt "fast" selection and bail.
+ return false;
+ }
=20
// We successfully emitted code for the given LLVM Instruction.
UpdateValueMap(I, N);
@@ -512,21 +561,32 @@
return true;
}
=20
+ MachineModuleInfo &MMI =3D FuncInfo.MF->getMMI();
+ ComputeUsesVAFloatArgument(*Call, &MMI);
+
const Function *F =3D Call->getCalledFunction();
if (!F) return false;
=20
// Handle selected intrinsic function calls.
switch (F->getIntrinsicID()) {
default: break;
+ // At -O0 we don't care about the lifetime intrinsics.
+ case Intrinsic::lifetime_start:
+ case Intrinsic::lifetime_end:
+ return true;
case Intrinsic::dbg_declare: {
const DbgDeclareInst *DI =3D cast<DbgDeclareInst>(Call);
if (!DIVariable(DI->getVariable()).Verify() ||
- !FuncInfo.MF->getMMI().hasDebugInfo())
+ !FuncInfo.MF->getMMI().hasDebugInfo()) {
+ DEBUG(dbgs() << "Dropping debug info for " << *DI << "\n");
return true;
+ }
=20
const Value *Address =3D DI->getAddress();
- if (!Address || isa<UndefValue>(Address) || isa<AllocaInst>(Address))
+ if (!Address || isa<UndefValue>(Address)) {
+ DEBUG(dbgs() << "Dropping debug info for " << *DI << "\n");
return true;
+ }
=20
unsigned Reg =3D 0;
unsigned Offset =3D 0;
@@ -534,16 +594,36 @@
// Some arguments' frame index is recorded during argument lowering.
Offset =3D FuncInfo.getArgumentFrameIndex(Arg);
if (Offset)
- Reg =3D TRI.getFrameRegister(*FuncInfo.MF);
+ Reg =3D TRI.getFrameRegister(*FuncInfo.MF);
}
if (!Reg)
- Reg =3D getRegForValue(Address);
+ Reg =3D lookUpRegForValue(Address);
+
+ // If we have a VLA that has a "use" in a metadata node that's then us=
ed
+ // here but it has no other uses, then we have a problem. E.g.,
+ //
+ // int foo (const int *x) {
+ // char a[*x];
+ // return 0;
+ // }
+ //
+ // If we assign 'a' a vreg and fast isel later on has to use the selec=
tion
+ // DAG isel, it will want to copy the value to the vreg. However, ther=
e are
+ // no uses, which goes counter to what selection DAG isel expects.
+ if (!Reg && !Address->use_empty() && isa<Instruction>(Address) &&
+ (!isa<AllocaInst>(Address) ||
+ !FuncInfo.StaticAllocaMap.count(cast<AllocaInst>(Address))))
+ Reg =3D FuncInfo.InitializeRegForValue(Address);
=20
if (Reg)
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(TargetOpcode::DBG_VALUE))
.addReg(Reg, RegState::Debug).addImm(Offset)
.addMetadata(DI->getVariable());
+ else
+ // We can't yet handle anything else here because it would require
+ // generating code, thus altering codegen because of debug info.
+ DEBUG(dbgs() << "Dropping debug info for " << DI);
return true;
}
case Intrinsic::dbg_value: {
@@ -581,60 +661,6 @@
}
return true;
}
- case Intrinsic::eh_exception: {
- EVT VT =3D TLI.getValueType(Call->getType());
- if (TLI.getOperationAction(ISD::EXCEPTIONADDR, VT)!=3DTargetLowering::=
Expand)
- break;
-
- assert(FuncInfo.MBB->isLandingPad() &&
- "Call to eh.exception not in landing pad!");
- unsigned Reg =3D TLI.getExceptionAddressRegister();
- const TargetRegisterClass *RC =3D TLI.getRegClassFor(VT);
- unsigned ResultReg =3D createResultReg(RC);
- BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::CO=
PY),
- ResultReg).addReg(Reg);
- UpdateValueMap(Call, ResultReg);
- return true;
- }
- case Intrinsic::eh_selector: {
- EVT VT =3D TLI.getValueType(Call->getType());
- if (TLI.getOperationAction(ISD::EHSELECTION, VT) !=3D TargetLowering::=
Expand)
- break;
- if (FuncInfo.MBB->isLandingPad())
- AddCatchInfo(*Call, &FuncInfo.MF->getMMI(), FuncInfo.MBB);
- else {
-#ifndef NDEBUG
- FuncInfo.CatchInfoLost.insert(Call);
-#endif
- // FIXME: Mark exception selector register as live in. Hack for PR1=
508.
- unsigned Reg =3D TLI.getExceptionSelectorRegister();
- if (Reg) FuncInfo.MBB->addLiveIn(Reg);
- }
-
- unsigned Reg =3D TLI.getExceptionSelectorRegister();
- EVT SrcVT =3D TLI.getPointerTy();
- const TargetRegisterClass *RC =3D TLI.getRegClassFor(SrcVT);
- unsigned ResultReg =3D createResultReg(RC);
- BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::CO=
PY),
- ResultReg).addReg(Reg);
-
- bool ResultRegIsKill =3D hasTrivialKill(Call);
-
- // Cast the register to the type of the selector.
- if (SrcVT.bitsGT(MVT::i32))
- ResultReg =3D FastEmit_r(SrcVT.getSimpleVT(), MVT::i32, ISD::TRUNCAT=
E,
- ResultReg, ResultRegIsKill);
- else if (SrcVT.bitsLT(MVT::i32))
- ResultReg =3D FastEmit_r(SrcVT.getSimpleVT(), MVT::i32,
- ISD::SIGN_EXTEND, ResultReg, ResultRegIsKill);
- if (ResultReg =3D=3D 0)
- // Unhandled operand. Halt "fast" selection and bail.
- return false;
-
- UpdateValueMap(Call, ResultReg);
-
- return true;
- }
case Intrinsic::objectsize: {
ConstantInt *CI =3D cast<ConstantInt>(Call->getArgOperand(1));
unsigned long long Res =3D CI->isZero() ? -1ULL : 0;
@@ -726,8 +752,8 @@
// First, try to perform the bitcast by inserting a reg-reg copy.
unsigned ResultReg =3D 0;
if (SrcVT.getSimpleVT() =3D=3D DstVT.getSimpleVT()) {
- TargetRegisterClass* SrcClass =3D TLI.getRegClassFor(SrcVT);
- TargetRegisterClass* DstClass =3D TLI.getRegClassFor(DstVT);
+ const TargetRegisterClass* SrcClass =3D TLI.getRegClassFor(SrcVT);
+ const TargetRegisterClass* DstClass =3D TLI.getRegClassFor(DstVT);
// Don't attempt a cross-class copy. It will likely fail.
if (SrcClass =3D=3D DstClass) {
ResultReg =3D createResultReg(DstClass);
@@ -758,17 +784,33 @@
=20
DL =3D I->getDebugLoc();
=20
+ MachineBasicBlock::iterator SavedInsertPt =3D FuncInfo.InsertPt;
+
// First, try doing target-independent selection.
if (SelectOperator(I, I->getOpcode())) {
+ ++NumFastIselSuccessIndependent;
DL =3D DebugLoc();
return true;
}
+ // Remove dead code. However, ignore call instructions since we've flus=
hed=20
+ // the local value map and recomputed the insert point.
+ if (!isa<CallInst>(I)) {
+ recomputeInsertPt();
+ if (SavedInsertPt !=3D FuncInfo.InsertPt)
+ removeDeadCode(FuncInfo.InsertPt, SavedInsertPt);
+ }
=20
// Next, try calling the target to attempt to handle the instruction.
+ SavedInsertPt =3D FuncInfo.InsertPt;
if (TargetSelectInstruction(I)) {
+ ++NumFastIselSuccessTarget;
DL =3D DebugLoc();
return true;
}
+ // Check for dead code and remove as necessary.
+ recomputeInsertPt();
+ if (SavedInsertPt !=3D FuncInfo.InsertPt)
+ removeDeadCode(FuncInfo.InsertPt, SavedInsertPt);
=20
DL =3D DebugLoc();
return false;
@@ -779,8 +821,11 @@
/// the CFG.
void
FastISel::FastEmitBranch(MachineBasicBlock *MSucc, DebugLoc DL) {
- if (FuncInfo.MBB->isLayoutSuccessor(MSucc)) {
- // The unconditional fall-through case, which needs no instructions.
+
+ if (FuncInfo.MBB->getBasicBlock()->size() > 1 && FuncInfo.MBB->isLayoutS=
uccessor(MSucc)) {
+ // For more accurate line information if this is the only instruction
+ // in the block then emit it, otherwise we have the unconditional
+ // fall-through case, which needs no instructions.
} else {
// The unconditional branch case.
TII.InsertBranch(*FuncInfo.MBB, MSucc, NULL,
@@ -1354,8 +1399,8 @@
// exactly one register for each non-void instruction.
EVT VT =3D TLI.getValueType(PN->getType(), /*AllowUnknown=3D*/true);
if (VT =3D=3D MVT::Other || !TLI.isTypeLegal(VT)) {
- // Promote MVT::i1.
- if (VT =3D=3D MVT::i1)
+ // Handle integer promotions, though, because they're common and e=
asy.
+ if (VT =3D=3D MVT::i1 || VT =3D=3D MVT::i8 || VT =3D=3D MVT::i16)
VT =3D TLI.getTypeToTransformTo(LLVMBB->getContext(), VT);
else {
FuncInfo.PHINodesToUpdate.resize(OrigNumPHINodesToUpdate);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/FunctionLoweringInfo.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp T=
ue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp T=
ue Apr 17 11:51:51 2012 +0300
@@ -13,6 +13,7 @@
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
#define DEBUG_TYPE "function-lowering-info"
+#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/CodeGen/FunctionLoweringInfo.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Function.h"
@@ -68,7 +69,7 @@
GetReturnInfo(Fn->getReturnType(),
Fn->getAttributes().getRetAttributes(), Outs, TLI);
CanLowerReturn =3D TLI.CanLowerReturn(Fn->getCallingConv(), *MF,
- Fn->isVarArg(),
+ Fn->isVarArg(),
Outs, Fn->getContext());
=20
// Initialize the mapping of values to registers. This is only set up f=
or
@@ -92,14 +93,16 @@
// candidate. I.e., it would trigger the creation of a stack prote=
ctor.
bool MayNeedSP =3D
(AI->isArrayAllocation() ||
- (TySize > 8 && isa<ArrayType>(Ty) &&
+ (TySize >=3D 8 && isa<ArrayType>(Ty) &&
cast<ArrayType>(Ty)->getElementType()->isIntegerTy(8)));
StaticAllocaMap[AI] =3D
- MF->getFrameInfo()->CreateStackObject(TySize, Align, false, MayN=
eedSP);
+ MF->getFrameInfo()->CreateStackObject(TySize, Align, false,
+ MayNeedSP);
}
=20
for (; BB !=3D EB; ++BB)
- for (BasicBlock::const_iterator I =3D BB->begin(), E =3D BB->end(); I =
!=3D E; ++I) {
+ for (BasicBlock::const_iterator I =3D BB->begin(), E =3D BB->end();
+ I !=3D E; ++I) {
// Mark values used outside their block as exported, by allocating
// a virtual register for them.
if (isUsedOutsideOfDefiningBlock(I))
@@ -355,7 +358,7 @@
/// argument. This overrides previous frame index entry for this argument,
/// if any.
void FunctionLoweringInfo::setArgumentFrameIndex(const Argument *A,
- int FI) {
+ int FI) {
ByValArgFrameIndexMap[A] =3D FI;
}
=20
@@ -367,10 +370,34 @@
ByValArgFrameIndexMap.find(A);
if (I !=3D ByValArgFrameIndexMap.end())
return I->second;
- DEBUG(dbgs() << "Argument does not have assigned frame index!");
+ DEBUG(dbgs() << "Argument does not have assigned frame index!\n");
return 0;
}
=20
+/// ComputeUsesVAFloatArgument - Determine if any floating-point values are
+/// being passed to this variadic function, and set the MachineModuleInfo's
+/// usesVAFloatArgument flag if so. This flag is used to emit an undefined
+/// reference to _fltused on Windows, which will link in MSVCRT's
+/// floating-point support.
+void llvm::ComputeUsesVAFloatArgument(const CallInst &I,
+ MachineModuleInfo *MMI)
+{
+ FunctionType *FT =3D cast<FunctionType>(
+ I.getCalledValue()->getType()->getContainedType(0));
+ if (FT->isVarArg() && !MMI->usesVAFloatArgument()) {
+ for (unsigned i =3D 0, e =3D I.getNumArgOperands(); i !=3D e; ++i) {
+ Type* T =3D I.getArgOperand(i)->getType();
+ for (po_iterator<Type*> i =3D po_begin(T), e =3D po_end(T);
+ i !=3D e; ++i) {
+ if (i->isFloatingPointTy()) {
+ MMI->setUsesVAFloatArgument(true);
+ return;
+ }
+ }
+ }
+ }
+}
+
/// AddCatchInfo - Extract the personality and type infos from an eh.selec=
tor
/// call, and add them to the specified machine basic block.
void llvm::AddCatchInfo(const CallInst &I, MachineModuleInfo *MMI,
@@ -425,34 +452,6 @@
}
}
=20
-void llvm::CopyCatchInfo(const BasicBlock *SuccBB, const BasicBlock *LPad,
- MachineModuleInfo *MMI, FunctionLoweringInfo &FLI=
) {
- SmallPtrSet<const BasicBlock*, 4> Visited;
-
- // The 'eh.selector' call may not be in the direct successor of a basic =
block,
- // but could be several successors deeper. If we don't find it, try goin=
g one
- // level further. <rdar://problem/8824861>
- while (Visited.insert(SuccBB)) {
- for (BasicBlock::const_iterator I =3D SuccBB->begin(), E =3D --SuccBB-=
>end();
- I !=3D E; ++I)
- if (const EHSelectorInst *EHSel =3D dyn_cast<EHSelectorInst>(I)) {
- // Apply the catch info to LPad.
- AddCatchInfo(*EHSel, MMI, FLI.MBBMap[LPad]);
-#ifndef NDEBUG
- if (!FLI.MBBMap[SuccBB]->isLandingPad())
- FLI.CatchInfoFound.insert(EHSel);
-#endif
- return;
- }
-
- const BranchInst *Br =3D dyn_cast<BranchInst>(SuccBB->getTerminator());
- if (Br && Br->isUnconditional())
- SuccBB =3D Br->getSuccessor(0);
- else
- break;
- }
-}
-
/// AddLandingPadInfo - Extract the exception handling information from the
/// landingpad instruction and add them to the specified machine module in=
fo.
void llvm::AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &M=
MI,
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/InstrEmitter.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Tue Apr 1=
7 11:51:51 2012 +0300
@@ -294,7 +294,7 @@
const TargetRegisterClass *DstRC =3D 0;
if (IIOpNum < II->getNumOperands())
DstRC =3D TII->getRegClass(*II, IIOpNum, TRI);
- assert((DstRC || (MCID.isVariadic() && IIOpNum >=3D MCID.getNumOperand=
s())) &&
+ assert((DstRC || (MI->isVariadic() && IIOpNum >=3D MCID.getNumOperands=
())) &&
"Don't have operand info for this instruction!");
if (DstRC && !MRI->constrainRegClass(VReg, DstRC, MinRCSize)) {
unsigned NewVReg =3D MRI->createVirtualRegister(DstRC);
@@ -351,6 +351,8 @@
MI->addOperand(MachineOperand::CreateFPImm(CFP));
} else if (RegisterSDNode *R =3D dyn_cast<RegisterSDNode>(Op)) {
MI->addOperand(MachineOperand::CreateReg(R->getReg(), false));
+ } else if (RegisterMaskSDNode *RM =3D dyn_cast<RegisterMaskSDNode>(Op)) {
+ MI->addOperand(MachineOperand::CreateRegMask(RM->getRegMask()));
} else if (GlobalAddressSDNode *TGA =3D dyn_cast<GlobalAddressSDNode>(Op=
)) {
MI->addOperand(MachineOperand::CreateGA(TGA->getGlobal(), TGA->getOffs=
et(),
TGA->getTargetFlags()));
@@ -574,14 +576,19 @@
for (unsigned i =3D 1; i !=3D NumOps; ++i) {
SDValue Op =3D Node->getOperand(i);
if ((i & 1) =3D=3D 0) {
- unsigned SubIdx =3D cast<ConstantSDNode>(Op)->getZExtValue();
- unsigned SubReg =3D getVR(Node->getOperand(i-1), VRBaseMap);
- const TargetRegisterClass *TRC =3D MRI->getRegClass(SubReg);
- const TargetRegisterClass *SRC =3D
+ RegisterSDNode *R =3D dyn_cast<RegisterSDNode>(Node->getOperand(i-1)=
);
+ // Skip physical registers as they don't have a vreg to get and we'll
+ // insert copies for them in TwoAddressInstructionPass anyway.
+ if (!R || !TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
+ unsigned SubIdx =3D cast<ConstantSDNode>(Op)->getZExtValue();
+ unsigned SubReg =3D getVR(Node->getOperand(i-1), VRBaseMap);
+ const TargetRegisterClass *TRC =3D MRI->getRegClass(SubReg);
+ const TargetRegisterClass *SRC =3D
TRI->getMatchingSuperRegClass(RC, TRC, SubIdx);
- if (SRC && SRC !=3D RC) {
- MRI->setRegClass(NewVReg, SRC);
- RC =3D SRC;
+ if (SRC && SRC !=3D RC) {
+ MRI->setRegClass(NewVReg, SRC);
+ RC =3D SRC;
+ }
}
}
AddOperand(MI, Op, i+1, &II, VRBaseMap, /*IsDebug=3D*/false,
@@ -700,33 +707,6 @@
// Create the new machine instruction.
MachineInstr *MI =3D BuildMI(*MF, Node->getDebugLoc(), II);
=20
- // The MachineInstr constructor adds implicit-def operands. Scan through
- // these to determine which are dead.
- if (MI->getNumOperands() !=3D 0 &&
- Node->getValueType(Node->getNumValues()-1) =3D=3D MVT::Glue) {
- // First, collect all used registers.
- SmallVector<unsigned, 8> UsedRegs;
- for (SDNode *F =3D Node->getGluedUser(); F; F =3D F->getGluedUser())
- if (F->getOpcode() =3D=3D ISD::CopyFromReg)
- UsedRegs.push_back(cast<RegisterSDNode>(F->getOperand(1))->getReg(=
));
- else {
- // Collect declared implicit uses.
- const MCInstrDesc &MCID =3D TII->get(F->getMachineOpcode());
- UsedRegs.append(MCID.getImplicitUses(),
- MCID.getImplicitUses() + MCID.getNumImplicitUses()=
);
- // In addition to declared implicit uses, we must also check for
- // direct RegisterSDNode operands.
- for (unsigned i =3D 0, e =3D F->getNumOperands(); i !=3D e; ++i)
- if (RegisterSDNode *R =3D dyn_cast<RegisterSDNode>(F->getOperand=
(i))) {
- unsigned Reg =3D R->getReg();
- if (TargetRegisterInfo::isPhysicalRegister(Reg))
- UsedRegs.push_back(Reg);
- }
- }
- // Then mark unused registers as dead.
- MI->setPhysRegsDeadExcept(UsedRegs, *TRI);
- }
-
// Add result register values for things that are defined by this
// instruction.
if (NumResults)
@@ -751,30 +731,63 @@
// hook knows where in the block to insert the replacement code.
MBB->insert(InsertPos, MI);
=20
+ // The MachineInstr may also define physregs instead of virtregs. These
+ // physreg values can reach other instructions in different ways:
+ //
+ // 1. When there is a use of a Node value beyond the explicitly defined
+ // virtual registers, we emit a CopyFromReg for one of the implicitly
+ // defined physregs. This only happens when HasPhysRegOuts is true.
+ //
+ // 2. A CopyFromReg reading a physreg may be glued to this instruction.
+ //
+ // 3. A glued instruction may implicitly use a physreg.
+ //
+ // 4. A glued instruction may use a RegisterSDNode operand.
+ //
+ // Collect all the used physreg defs, and make sure that any unused phys=
reg
+ // defs are marked as dead.
+ SmallVector<unsigned, 8> UsedRegs;
+
// Additional results must be physical register defs.
if (HasPhysRegOuts) {
for (unsigned i =3D II.getNumDefs(); i < NumResults; ++i) {
unsigned Reg =3D II.getImplicitDefs()[i - II.getNumDefs()];
- if (Node->hasAnyUseOfValue(i))
- EmitCopyFromReg(Node, i, IsClone, IsCloned, Reg, VRBaseMap);
- // If there are no uses, mark the register as dead now, so that
- // MachineLICM/Sink can see that it's dead. Don't do this if the
- // node has a Glue value, for the benefit of targets still using
- // Glue for values in physregs.
- else if (Node->getValueType(Node->getNumValues()-1) !=3D MVT::Glue)
- MI->addRegisterDead(Reg, TRI);
+ if (!Node->hasAnyUseOfValue(i))
+ continue;
+ // This implicitly defined physreg has a use.
+ UsedRegs.push_back(Reg);
+ EmitCopyFromReg(Node, i, IsClone, IsCloned, Reg, VRBaseMap);
}
}
=20
- // If the instruction has implicit defs and the node doesn't, mark the
- // implicit def as dead. If the node has any glue outputs, we don't do =
this
- // because we don't know what implicit defs are being used by glued node=
s.
- if (Node->getValueType(Node->getNumValues()-1) !=3D MVT::Glue)
- if (const unsigned *IDList =3D II.getImplicitDefs()) {
- for (unsigned i =3D NumResults, e =3D II.getNumDefs()+II.getNumImpli=
citDefs();
- i !=3D e; ++i)
- MI->addRegisterDead(IDList[i-II.getNumDefs()], TRI);
+ // Scan the glue chain for any used physregs.
+ if (Node->getValueType(Node->getNumValues()-1) =3D=3D MVT::Glue) {
+ for (SDNode *F =3D Node->getGluedUser(); F; F =3D F->getGluedUser()) {
+ if (F->getOpcode() =3D=3D ISD::CopyFromReg) {
+ UsedRegs.push_back(cast<RegisterSDNode>(F->getOperand(1))->getReg(=
));
+ continue;
+ } else if (F->getOpcode() =3D=3D ISD::CopyToReg) {
+ // Skip CopyToReg nodes that are internal to the glue chain.
+ continue;
+ }
+ // Collect declared implicit uses.
+ const MCInstrDesc &MCID =3D TII->get(F->getMachineOpcode());
+ UsedRegs.append(MCID.getImplicitUses(),
+ MCID.getImplicitUses() + MCID.getNumImplicitUses());
+ // In addition to declared implicit uses, we must also check for
+ // direct RegisterSDNode operands.
+ for (unsigned i =3D 0, e =3D F->getNumOperands(); i !=3D e; ++i)
+ if (RegisterSDNode *R =3D dyn_cast<RegisterSDNode>(F->getOperand(i=
))) {
+ unsigned Reg =3D R->getReg();
+ if (TargetRegisterInfo::isPhysicalRegister(Reg))
+ UsedRegs.push_back(Reg);
+ }
}
+ }
+
+ // Finally mark unused registers as dead.
+ if (!UsedRegs.empty() || II.getImplicitDefs())
+ MI->setPhysRegsDeadExcept(UsedRegs, *TRI);
=20
// Run post-isel target hook to adjust this instruction if needed.
#ifdef NDEBUG
@@ -794,10 +807,8 @@
Node->dump();
#endif
llvm_unreachable("This target-independent node should have been select=
ed!");
- break;
case ISD::EntryToken:
llvm_unreachable("EntryToken should have been excluded from the schedu=
le!");
- break;
case ISD::MERGE_VALUES:
case ISD::TokenFactor: // fall thru
break;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/LegalizeDAG.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Apr 17=
11:51:51 2012 +0300
@@ -46,47 +46,27 @@
/// will attempt merge setcc and brc instructions into brcc's.
///
namespace {
-class SelectionDAGLegalize {
+class SelectionDAGLegalize : public SelectionDAG::DAGUpdateListener {
const TargetMachine &TM;
const TargetLowering &TLI;
SelectionDAG &DAG;
=20
+ /// LegalizePosition - The iterator for walking through the node list.
+ SelectionDAG::allnodes_iterator LegalizePosition;
+
+ /// LegalizedNodes - The set of nodes which have already been legalized.
+ SmallPtrSet<SDNode *, 16> LegalizedNodes;
+
// Libcall insertion helpers.
=20
- /// LastCALLSEQ_END - This keeps track of the CALLSEQ_END node that has =
been
- /// legalized. We use this to ensure that calls are properly serialized
- /// against each other, including inserted libcalls.
- SDValue LastCALLSEQ_END;
-
- /// IsLegalizingCall - This member is used *only* for purposes of provid=
ing
- /// helpful assertions that a libcall isn't created while another call is
- /// being legalized (which could lead to non-serialized call sequences).
- bool IsLegalizingCall;
-
- /// LegalizedNodes - For nodes that are of legal width, and that have mo=
re
- /// than one use, this map indicates what regularized operand to use. T=
his
- /// allows us to avoid legalizing the same thing more than once.
- DenseMap<SDValue, SDValue> LegalizedNodes;
-
- void AddLegalizedOperand(SDValue From, SDValue To) {
- LegalizedNodes.insert(std::make_pair(From, To));
- // If someone requests legalization of the new node, return itself.
- if (From !=3D To)
- LegalizedNodes.insert(std::make_pair(To, To));
-
- // Transfer SDDbgValues.
- DAG.TransferDbgValues(From, To);
- }
-
public:
explicit SelectionDAGLegalize(SelectionDAG &DAG);
=20
void LegalizeDAG();
=20
private:
- /// LegalizeOp - Return a legal replacement for the given operation, with
- /// all legal operands.
- SDValue LegalizeOp(SDValue O);
+ /// LegalizeOp - Legalizes the given operation.
+ void LegalizeOp(SDNode *Node);
=20
SDValue OptimizeFloatStore(StoreSDNode *ST);
=20
@@ -105,10 +85,7 @@
/// e.g. <v4i32> <0, 1, 0, 1> -> v8i16 <0, 1, 2, 3, 0, 1, 2, 3>
SDValue ShuffleWithNarrowerEltType(EVT NVT, EVT VT, DebugLoc dl,
SDValue N1, SDValue N2,
- SmallVectorImpl<int> &Mask) const;
-
- bool LegalizeAllNodesNotLeadingTo(SDNode *N, SDNode *Dest,
- SmallPtrSet<SDNode*, 32> &NodesLeading=
To);
+ ArrayRef<int> Mask) const;
=20
void LegalizeSetCCCondCode(EVT VT, SDValue &LHS, SDValue &RHS, SDValue &=
CC,
DebugLoc dl);
@@ -150,10 +127,46 @@
SDValue ExpandInsertToVectorThroughStack(SDValue Op);
SDValue ExpandVectorBuildThroughStack(SDNode* Node);
=20
+ SDValue ExpandConstantFP(ConstantFPSDNode *CFP, bool UseCP);
+
std::pair<SDValue, SDValue> ExpandAtomic(SDNode *Node);
=20
- void ExpandNode(SDNode *Node, SmallVectorImpl<SDValue> &Results);
- void PromoteNode(SDNode *Node, SmallVectorImpl<SDValue> &Results);
+ void ExpandNode(SDNode *Node);
+ void PromoteNode(SDNode *Node);
+
+ void ForgetNode(SDNode *N) {
+ LegalizedNodes.erase(N);
+ if (LegalizePosition =3D=3D SelectionDAG::allnodes_iterator(N))
+ ++LegalizePosition;
+ }
+
+public:
+ // DAGUpdateListener implementation.
+ virtual void NodeDeleted(SDNode *N, SDNode *E) {
+ ForgetNode(N);
+ }
+ virtual void NodeUpdated(SDNode *N) {}
+
+ // Node replacement helpers
+ void ReplacedNode(SDNode *N) {
+ if (N->use_empty()) {
+ DAG.RemoveDeadNode(N, this);
+ } else {
+ ForgetNode(N);
+ }
+ }
+ void ReplaceNode(SDNode *Old, SDNode *New) {
+ DAG.ReplaceAllUsesWith(Old, New, this);
+ ReplacedNode(Old);
+ }
+ void ReplaceNode(SDValue Old, SDValue New) {
+ DAG.ReplaceAllUsesWith(Old, New, this);
+ ReplacedNode(Old.getNode());
+ }
+ void ReplaceNode(SDNode *Old, const SDValue *New) {
+ DAG.ReplaceAllUsesWith(Old, New, this);
+ ReplacedNode(Old);
+ }
};
}
=20
@@ -164,7 +177,7 @@
SDValue
SelectionDAGLegalize::ShuffleWithNarrowerEltType(EVT NVT, EVT VT, DebugLo=
c dl,
SDValue N1, SDValue N2,
- SmallVectorImpl<int> &Mask) c=
onst {
+ ArrayRef<int> Mask) const=
{
unsigned NumMaskElts =3D VT.getVectorNumElements();
unsigned NumDestElts =3D NVT.getVectorNumElements();
unsigned NumEltsGrowth =3D NumDestElts / NumMaskElts;
@@ -195,145 +208,37 @@
}
=20
void SelectionDAGLegalize::LegalizeDAG() {
- LastCALLSEQ_END =3D DAG.getEntryNode();
- IsLegalizingCall =3D false;
-
- // The legalize process is inherently a bottom-up recursive process (use=
rs
- // legalize their uses before themselves). Given infinite stack space, =
we
- // could just start legalizing on the root and traverse the whole graph.=
In
- // practice however, this causes us to run out of stack space on large b=
asic
- // blocks. To avoid this problem, compute an ordering of the nodes wher=
e each
- // node is only legalized after all of its operands are legalized.
DAG.AssignTopologicalOrder();
- for (SelectionDAG::allnodes_iterator I =3D DAG.allnodes_begin(),
- E =3D prior(DAG.allnodes_end()); I !=3D llvm::next(E); ++I)
- LegalizeOp(SDValue(I, 0));
-
- // Finally, it's possible the root changed. Get the new root.
- SDValue OldRoot =3D DAG.getRoot();
- assert(LegalizedNodes.count(OldRoot) && "Root didn't get legalized?");
- DAG.setRoot(LegalizedNodes[OldRoot]);
-
- LegalizedNodes.clear();
+
+ // Visit all the nodes. We start in topological order, so that we see
+ // nodes with their original operands intact. Legalization can produce
+ // new nodes which may themselves need to be legalized. Iterate until all
+ // nodes have been legalized.
+ for (;;) {
+ bool AnyLegalized =3D false;
+ for (LegalizePosition =3D DAG.allnodes_end();
+ LegalizePosition !=3D DAG.allnodes_begin(); ) {
+ --LegalizePosition;
+
+ SDNode *N =3D LegalizePosition;
+ if (LegalizedNodes.insert(N)) {
+ AnyLegalized =3D true;
+ LegalizeOp(N);
+ }
+ }
+ if (!AnyLegalized)
+ break;
+
+ }
=20
// Remove dead nodes now.
DAG.RemoveDeadNodes();
}
=20
-
-/// FindCallEndFromCallStart - Given a chained node that is part of a call
-/// sequence, find the CALLSEQ_END node that terminates the call sequence.
-static SDNode *FindCallEndFromCallStart(SDNode *Node, int depth =3D 0) {
- // Nested CALLSEQ_START/END constructs aren't yet legal,
- // but we can DTRT and handle them correctly here.
- if (Node->getOpcode() =3D=3D ISD::CALLSEQ_START)
- depth++;
- else if (Node->getOpcode() =3D=3D ISD::CALLSEQ_END) {
- depth--;
- if (depth =3D=3D 0)
- return Node;
- }
- if (Node->use_empty())
- return 0; // No CallSeqEnd
-
- // The chain is usually at the end.
- SDValue TheChain(Node, Node->getNumValues()-1);
- if (TheChain.getValueType() !=3D MVT::Other) {
- // Sometimes it's at the beginning.
- TheChain =3D SDValue(Node, 0);
- if (TheChain.getValueType() !=3D MVT::Other) {
- // Otherwise, hunt for it.
- for (unsigned i =3D 1, e =3D Node->getNumValues(); i !=3D e; ++i)
- if (Node->getValueType(i) =3D=3D MVT::Other) {
- TheChain =3D SDValue(Node, i);
- break;
- }
-
- // Otherwise, we walked into a node without a chain.
- if (TheChain.getValueType() !=3D MVT::Other)
- return 0;
- }
- }
-
- for (SDNode::use_iterator UI =3D Node->use_begin(),
- E =3D Node->use_end(); UI !=3D E; ++UI) {
-
- // Make sure to only follow users of our token chain.
- SDNode *User =3D *UI;
- for (unsigned i =3D 0, e =3D User->getNumOperands(); i !=3D e; ++i)
- if (User->getOperand(i) =3D=3D TheChain)
- if (SDNode *Result =3D FindCallEndFromCallStart(User, depth))
- return Result;
- }
- return 0;
-}
-
-/// FindCallStartFromCallEnd - Given a chained node that is part of a call
-/// sequence, find the CALLSEQ_START node that initiates the call sequence.
-static SDNode *FindCallStartFromCallEnd(SDNode *Node) {
- int nested =3D 0;
- assert(Node && "Didn't find callseq_start for a call??");
- while (Node->getOpcode() !=3D ISD::CALLSEQ_START || nested) {
- Node =3D Node->getOperand(0).getNode();
- assert(Node->getOperand(0).getValueType() =3D=3D MVT::Other &&
- "Node doesn't have a token chain argument!");
- switch (Node->getOpcode()) {
- default:
- break;
- case ISD::CALLSEQ_START:
- if (!nested)
- return Node;
- nested--;
- break;
- case ISD::CALLSEQ_END:
- nested++;
- break;
- }
- }
- return 0;
-}
-
-/// LegalizeAllNodesNotLeadingTo - Recursively walk the uses of N, looking=
to
-/// see if any uses can reach Dest. If no dest operands can get to dest,
-/// legalize them, legalize ourself, and return false, otherwise, return t=
rue.
-///
-/// Keep track of the nodes we fine that actually do lead to Dest in
-/// NodesLeadingTo. This avoids retraversing them exponential number of t=
imes.
-///
-bool SelectionDAGLegalize::LegalizeAllNodesNotLeadingTo(SDNode *N, SDNode =
*Dest,
- SmallPtrSet<SDNode*, 32> &NodesLeadin=
gTo) {
- if (N =3D=3D Dest) return true; // N certainly leads to Dest :)
-
- // If we've already processed this node and it does lead to Dest, there =
is no
- // need to reprocess it.
- if (NodesLeadingTo.count(N)) return true;
-
- // If the first result of this node has been already legalized, then it =
cannot
- // reach N.
- if (LegalizedNodes.count(SDValue(N, 0))) return false;
-
- // Okay, this node has not already been legalized. Check and legalize a=
ll
- // operands. If none lead to Dest, then we can legalize this node.
- bool OperandsLeadToDest =3D false;
- for (unsigned i =3D 0, e =3D N->getNumOperands(); i !=3D e; ++i)
- OperandsLeadToDest |=3D // If an operand leads to Dest, so do we.
- LegalizeAllNodesNotLeadingTo(N->getOperand(i).getNode(), Dest,
- NodesLeadingTo);
-
- if (OperandsLeadToDest) {
- NodesLeadingTo.insert(N);
- return true;
- }
-
- // Okay, this node looks safe, legalize it and return false.
- LegalizeOp(SDValue(N, 0));
- return false;
-}
-
/// ExpandConstantFP - Expands the ConstantFP node to an integer constant =
or
/// a load from the constant pool.
-static SDValue ExpandConstantFP(ConstantFPSDNode *CFP, bool UseCP,
- SelectionDAG &DAG, const TargetLowering &T=
LI) {
+SDValue
+SelectionDAGLegalize::ExpandConstantFP(ConstantFPSDNode *CFP, bool UseCP) {
bool Extend =3D false;
DebugLoc dl =3D CFP->getDebugLoc();
=20
@@ -369,20 +274,27 @@
=20
SDValue CPIdx =3D DAG.getConstantPool(LLVMC, TLI.getPointerTy());
unsigned Alignment =3D cast<ConstantPoolSDNode>(CPIdx)->getAlignment();
- if (Extend)
- return DAG.getExtLoad(ISD::EXTLOAD, dl, OrigVT,
- DAG.getEntryNode(),
- CPIdx, MachinePointerInfo::getConstantPool(),
- VT, false, false, Alignment);
- return DAG.getLoad(OrigVT, dl, DAG.getEntryNode(), CPIdx,
- MachinePointerInfo::getConstantPool(), false, false,
- Alignment);
+ if (Extend) {
+ SDValue Result =3D
+ DAG.getExtLoad(ISD::EXTLOAD, dl, OrigVT,
+ DAG.getEntryNode(),
+ CPIdx, MachinePointerInfo::getConstantPool(),
+ VT, false, false, Alignment);
+ return Result;
+ }
+ SDValue Result =3D
+ DAG.getLoad(OrigVT, dl, DAG.getEntryNode(), CPIdx,
+ MachinePointerInfo::getConstantPool(), false, false, false,
+ Alignment);
+ return Result;
}
=20
/// ExpandUnalignedStore - Expands an unaligned store to 2 half-size store=
s.
-static
-SDValue ExpandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG,
- const TargetLowering &TLI) {
+static void ExpandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG,
+ const TargetLowering &TLI,
+ SelectionDAGLegalize *DAGLegalize) {
+ assert(ST->getAddressingMode() =3D=3D ISD::UNINDEXED &&
+ "unaligned indexed stores not implemented!");
SDValue Chain =3D ST->getChain();
SDValue Ptr =3D ST->getBasePtr();
SDValue Val =3D ST->getValue();
@@ -397,8 +309,10 @@
// same size, then a (misaligned) int store.
// FIXME: Does not handle truncating floating point stores!
SDValue Result =3D DAG.getNode(ISD::BITCAST, dl, intVT, Val);
- return DAG.getStore(Chain, dl, Result, Ptr, ST->getPointerInfo(),
- ST->isVolatile(), ST->isNonTemporal(), Alignment=
);
+ Result =3D DAG.getStore(Chain, dl, Result, Ptr, ST->getPointerInfo(),
+ ST->isVolatile(), ST->isNonTemporal(), Alignmen=
t);
+ DAGLegalize->ReplaceNode(SDValue(ST, 0), Result);
+ return;
}
// Do a (aligned) store to a stack slot, then copy from the stack slot
// to the final destination using (unaligned) integer loads and stores.
@@ -427,7 +341,7 @@
// Load one integer register's worth from the stack slot.
SDValue Load =3D DAG.getLoad(RegVT, dl, Store, StackPtr,
MachinePointerInfo(),
- false, false, 0);
+ false, false, false, 0);
// Store it to the final location. Remember the store.
Stores.push_back(DAG.getStore(Load.getValue(1), dl, Load, Ptr,
ST->getPointerInfo().getWithOffset(Offse=
t),
@@ -458,8 +372,11 @@
ST->isNonTemporal(),
MinAlign(ST->getAlignment(), Offset=
)));
// The order of the stores doesn't matter - say it with a TokenFactor.
- return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Stores[0],
- Stores.size());
+ SDValue Result =3D
+ DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Stores[0],
+ Stores.size());
+ DAGLegalize->ReplaceNode(SDValue(ST, 0), Result);
+ return;
}
assert(ST->getMemoryVT().isInteger() &&
!ST->getMemoryVT().isVector() &&
@@ -488,13 +405,18 @@
NewStoredVT, ST->isVolatile(), ST->isNonTempo=
ral(),
Alignment);
=20
- return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Store1, Store2);
+ SDValue Result =3D
+ DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Store1, Store2);
+ DAGLegalize->ReplaceNode(SDValue(ST, 0), Result);
}
=20
/// ExpandUnalignedLoad - Expands an unaligned load to 2 half-size loads.
-static
-SDValue ExpandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG,
- const TargetLowering &TLI) {
+static void
+ExpandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG,
+ const TargetLowering &TLI,
+ SDValue &ValResult, SDValue &ChainResult) {
+ assert(LD->getAddressingMode() =3D=3D ISD::UNINDEXED &&
+ "unaligned indexed loads not implemented!");
SDValue Chain =3D LD->getChain();
SDValue Ptr =3D LD->getBasePtr();
EVT VT =3D LD->getValueType(0);
@@ -507,13 +429,15 @@
// then bitconvert to floating point or vector.
SDValue newLoad =3D DAG.getLoad(intVT, dl, Chain, Ptr, LD->getPointe=
rInfo(),
LD->isVolatile(),
- LD->isNonTemporal(), LD->getAlignment(=
));
+ LD->isNonTemporal(),
+ LD->isInvariant(), LD->getAlignment());
SDValue Result =3D DAG.getNode(ISD::BITCAST, dl, LoadedVT, newLoad);
if (VT.isFloatingPoint() && LoadedVT !=3D VT)
Result =3D DAG.getNode(ISD::FP_EXTEND, dl, VT, Result);
=20
- SDValue Ops[] =3D { Result, Chain };
- return DAG.getMergeValues(Ops, 2, dl);
+ ValResult =3D Result;
+ ChainResult =3D Chain;
+ return;
}
=20
// Copy the value to a (aligned) stack slot using (unaligned) integer
@@ -537,6 +461,7 @@
SDValue Load =3D DAG.getLoad(RegVT, dl, Chain, Ptr,
LD->getPointerInfo().getWithOffset(Offset=
),
LD->isVolatile(), LD->isNonTemporal(),
+ LD->isInvariant(),
MinAlign(LD->getAlignment(), Offset));
// Follow the load with a store to the stack slot. Remember the sto=
re.
Stores.push_back(DAG.getStore(Load.getValue(1), dl, Load, StackPtr,
@@ -572,8 +497,9 @@
MachinePointerInfo(), LoadedVT, false, false, 0);
=20
// Callers expect a MERGE_VALUES node.
- SDValue Ops[] =3D { Load, TF };
- return DAG.getMergeValues(Ops, 2, dl);
+ ValResult =3D Load;
+ ChainResult =3D TF;
+ return;
}
assert(LoadedVT.isInteger() && !LoadedVT.isVector() &&
"Unaligned load of unsupported type.");
@@ -626,8 +552,8 @@
SDValue TF =3D DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue=
(1),
Hi.getValue(1));
=20
- SDValue Ops[] =3D { Result, TF };
- return DAG.getMergeValues(Ops, 2, dl);
+ ValResult =3D Result;
+ ChainResult =3D TF;
}
=20
/// PerformInsertVectorEltInMemory - Some target cannot handle a variable
@@ -672,7 +598,8 @@
false, false, 0);
// Load the updated vector.
return DAG.getLoad(VT, dl, Ch, StackPtr,
- MachinePointerInfo::getFixedStack(SPFI), false, false=
, 0);
+ MachinePointerInfo::getFixedStack(SPFI), false, false=
,=20
+ false, 0);
}
=20
=20
@@ -763,11 +690,10 @@
=20
/// LegalizeOp - Return a legal replacement for the given operation, with
/// all legal operands.
-SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
- if (Op.getOpcode() =3D=3D ISD::TargetConstant) // Allow illegal target n=
odes.
- return Op;
-
- SDNode *Node =3D Op.getNode();
+void SelectionDAGLegalize::LegalizeOp(SDNode *Node) {
+ if (Node->getOpcode() =3D=3D ISD::TargetConstant) // Allow illegal targe=
t nodes.
+ return;
+
DebugLoc dl =3D Node->getDebugLoc();
=20
for (unsigned i =3D 0, e =3D Node->getNumValues(); i !=3D e; ++i)
@@ -782,13 +708,7 @@
Node->getOperand(i).getOpcode() =3D=3D ISD::TargetConstant) &&
"Unexpected illegal type!");
=20
- // Note that LegalizeOp may be reentered even from single-use nodes, whi=
ch
- // means that we always must cache transformed nodes.
- DenseMap<SDValue, SDValue>::iterator I =3D LegalizedNodes.find(Op);
- if (I !=3D LegalizedNodes.end()) return I->second;
-
SDValue Tmp1, Tmp2, Tmp3, Tmp4;
- SDValue Result =3D Op;
bool isCustom =3D false;
=20
// Figure out the correct action; the way to query this varies by opcode
@@ -798,10 +718,15 @@
case ISD::INTRINSIC_W_CHAIN:
case ISD::INTRINSIC_WO_CHAIN:
case ISD::INTRINSIC_VOID:
- case ISD::VAARG:
case ISD::STACKSAVE:
Action =3D TLI.getOperationAction(Node->getOpcode(), MVT::Other);
break;
+ case ISD::VAARG:
+ Action =3D TLI.getOperationAction(Node->getOpcode(),
+ Node->getValueType(0));
+ if (Action !=3D TargetLowering::Promote)
+ Action =3D TLI.getOperationAction(Node->getOpcode(), MVT::Other);
+ break;
case ISD::SINT_TO_FP:
case ISD::UINT_TO_FP:
case ISD::EXTRACT_VECTOR_ELT:
@@ -865,7 +790,6 @@
case ISD::FRAME_TO_ARGS_OFFSET:
case ISD::EH_SJLJ_SETJMP:
case ISD::EH_SJLJ_LONGJMP:
- case ISD::EH_SJLJ_DISPATCHSETUP:
// These operations lie about being legal: when they claim to be legal,
// they should actually be expanded.
Action =3D TLI.getOperationAction(Node->getOpcode(), Node->getValueTyp=
e(0));
@@ -882,17 +806,6 @@
if (Action =3D=3D TargetLowering::Legal)
Action =3D TargetLowering::Custom;
break;
- case ISD::BUILD_VECTOR:
- // A weird case: legalization for BUILD_VECTOR never legalizes the
- // operands!
- // FIXME: This really sucks... changing it isn't semantically incorrec=
t,
- // but it massively pessimizes the code for floating-point BUILD_VECTO=
Rs
- // because ConstantFP operands get legalized into constant pool loads
- // before the BUILD_VECTOR code can see them. It doesn't usually bite,
- // though, because BUILD_VECTORS usually get lowered into other nodes
- // which get legalized properly.
- SimpleFinishLegalizing =3D false;
- break;
default:
if (Node->getOpcode() >=3D ISD::BUILTIN_OP_END) {
Action =3D TargetLowering::Legal;
@@ -903,22 +816,11 @@
}
=20
if (SimpleFinishLegalizing) {
- SmallVector<SDValue, 8> Ops, ResultVals;
+ SmallVector<SDValue, 8> Ops;
for (unsigned i =3D 0, e =3D Node->getNumOperands(); i !=3D e; ++i)
- Ops.push_back(LegalizeOp(Node->getOperand(i)));
+ Ops.push_back(Node->getOperand(i));
switch (Node->getOpcode()) {
default: break;
- case ISD::BR:
- case ISD::BRIND:
- case ISD::BR_JT:
- case ISD::BR_CC:
- case ISD::BRCOND:
- // Branches tweak the chain to include LastCALLSEQ_END
- Ops[0] =3D DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Ops[0],
- LastCALLSEQ_END);
- Ops[0] =3D LegalizeOp(Ops[0]);
- LastCALLSEQ_END =3D DAG.getEntryNode();
- break;
case ISD::SHL:
case ISD::SRL:
case ISD::SRA:
@@ -926,57 +828,66 @@
case ISD::ROTR:
// Legalizing shifts/rotates requires adjusting the shift amount
// to the appropriate width.
- if (!Ops[1].getValueType().isVector())
- Ops[1] =3D LegalizeOp(DAG.getShiftAmountOperand(Ops[0].getValueTyp=
e(),
- Ops[1]));
+ if (!Ops[1].getValueType().isVector()) {
+ SDValue SAO =3D DAG.getShiftAmountOperand(Ops[0].getValueType(), O=
ps[1]);
+ HandleSDNode Handle(SAO);
+ LegalizeOp(SAO.getNode());
+ Ops[1] =3D Handle.getValue();
+ }
break;
case ISD::SRL_PARTS:
case ISD::SRA_PARTS:
case ISD::SHL_PARTS:
// Legalizing shifts/rotates requires adjusting the shift amount
// to the appropriate width.
- if (!Ops[2].getValueType().isVector())
- Ops[2] =3D LegalizeOp(DAG.getShiftAmountOperand(Ops[0].getValueTyp=
e(),
- Ops[2]));
+ if (!Ops[2].getValueType().isVector()) {
+ SDValue SAO =3D DAG.getShiftAmountOperand(Ops[0].getValueType(), O=
ps[2]);
+ HandleSDNode Handle(SAO);
+ LegalizeOp(SAO.getNode());
+ Ops[2] =3D Handle.getValue();
+ }
break;
}
=20
- Result =3D SDValue(DAG.UpdateNodeOperands(Result.getNode(), Ops.data(),
- Ops.size()), 0);
+ SDNode *NewNode =3D DAG.UpdateNodeOperands(Node, Ops.data(), Ops.size(=
));
+ if (NewNode !=3D Node) {
+ DAG.ReplaceAllUsesWith(Node, NewNode, this);
+ for (unsigned i =3D 0, e =3D Node->getNumValues(); i !=3D e; ++i)
+ DAG.TransferDbgValues(SDValue(Node, i), SDValue(NewNode, i));
+ ReplacedNode(Node);
+ Node =3D NewNode;
+ }
switch (Action) {
case TargetLowering::Legal:
- for (unsigned i =3D 0, e =3D Node->getNumValues(); i !=3D e; ++i)
- ResultVals.push_back(Result.getValue(i));
- break;
+ return;
case TargetLowering::Custom:
// FIXME: The handling for custom lowering with multiple results is
// a complete mess.
- Tmp1 =3D TLI.LowerOperation(Result, DAG);
+ Tmp1 =3D TLI.LowerOperation(SDValue(Node, 0), DAG);
if (Tmp1.getNode()) {
+ SmallVector<SDValue, 8> ResultVals;
for (unsigned i =3D 0, e =3D Node->getNumValues(); i !=3D e; ++i) {
if (e =3D=3D 1)
ResultVals.push_back(Tmp1);
else
ResultVals.push_back(Tmp1.getValue(i));
}
- break;
+ if (Tmp1.getNode() !=3D Node || Tmp1.getResNo() !=3D 0) {
+ DAG.ReplaceAllUsesWith(Node, ResultVals.data(), this);
+ for (unsigned i =3D 0, e =3D Node->getNumValues(); i !=3D e; ++i)
+ DAG.TransferDbgValues(SDValue(Node, i), ResultVals[i]);
+ ReplacedNode(Node);
+ }
+ return;
}
=20
// FALL THROUGH
case TargetLowering::Expand:
- ExpandNode(Result.getNode(), ResultVals);
- break;
+ ExpandNode(Node);
+ return;
case TargetLowering::Promote:
- PromoteNode(Result.getNode(), ResultVals);
- break;
- }
- if (!ResultVals.empty()) {
- for (unsigned i =3D 0, e =3D ResultVals.size(); i !=3D e; ++i) {
- if (ResultVals[i] !=3D SDValue(Node, i))
- ResultVals[i] =3D LegalizeOp(ResultVals[i]);
- AddLegalizedOperand(SDValue(Node, i), ResultVals[i]);
- }
- return ResultVals[Op.getResNo()];
+ PromoteNode(Node);
+ return;
}
}
=20
@@ -987,160 +898,24 @@
Node->dump( &DAG);
dbgs() << "\n";
#endif
- assert(0 && "Do not know how to legalize this operator!");
-
- case ISD::SRA:
- case ISD::SRL:
- case ISD::SHL: {
- // Scalarize vector SRA/SRL/SHL.
- EVT VT =3D Node->getValueType(0);
- assert(VT.isVector() && "Unable to legalize non-vector shift");
- assert(TLI.isTypeLegal(VT.getScalarType())&& "Element type must be leg=
al");
- unsigned NumElem =3D VT.getVectorNumElements();
-
- SmallVector<SDValue, 8> Scalars;
- for (unsigned Idx =3D 0; Idx < NumElem; Idx++) {
- SDValue Ex =3D DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
- VT.getScalarType(),
- Node->getOperand(0), DAG.getIntPtrConstant(=
Idx));
- SDValue Sh =3D DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
- VT.getScalarType(),
- Node->getOperand(1), DAG.getIntPtrConstant(=
Idx));
- Scalars.push_back(DAG.getNode(Node->getOpcode(), dl,
- VT.getScalarType(), Ex, Sh));
- }
- Result =3D DAG.getNode(ISD::BUILD_VECTOR, dl, Node->getValueType(0),
- &Scalars[0], Scalars.size());
+ llvm_unreachable("Do not know how to legalize this operator!");
+
+ case ISD::CALLSEQ_START:
+ case ISD::CALLSEQ_END:
break;
- }
-
- case ISD::BUILD_VECTOR:
- switch (TLI.getOperationAction(ISD::BUILD_VECTOR, Node->getValueType(0=
))) {
- default: assert(0 && "This action is not supported yet!");
- case TargetLowering::Custom:
- Tmp3 =3D TLI.LowerOperation(Result, DAG);
- if (Tmp3.getNode()) {
- Result =3D Tmp3;
- break;
- }
- // FALLTHROUGH
- case TargetLowering::Expand:
- Result =3D ExpandBUILD_VECTOR(Result.getNode());
- break;
- }
- break;
- case ISD::CALLSEQ_START: {
- SDNode *CallEnd =3D FindCallEndFromCallStart(Node);
-
- // Recursively Legalize all of the inputs of the call end that do not =
lead
- // to this call start. This ensures that any libcalls that need be in=
serted
- // are inserted *before* the CALLSEQ_START.
- {SmallPtrSet<SDNode*, 32> NodesLeadingTo;
- for (unsigned i =3D 0, e =3D CallEnd->getNumOperands(); i !=3D e; ++i)
- LegalizeAllNodesNotLeadingTo(CallEnd->getOperand(i).getNode(), Node,
- NodesLeadingTo);
- }
-
- // Now that we have legalized all of the inputs (which may have insert=
ed
- // libcalls), create the new CALLSEQ_START node.
- Tmp1 =3D LegalizeOp(Node->getOperand(0)); // Legalize the chain.
-
- // Merge in the last call to ensure that this call starts after the la=
st
- // call ended.
- if (LastCALLSEQ_END.getOpcode() !=3D ISD::EntryToken) {
- Tmp1 =3D DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
- Tmp1, LastCALLSEQ_END);
- Tmp1 =3D LegalizeOp(Tmp1);
- }
-
- // Do not try to legalize the target-specific arguments (#1+).
- if (Tmp1 !=3D Node->getOperand(0)) {
- SmallVector<SDValue, 8> Ops(Node->op_begin(), Node->op_end());
- Ops[0] =3D Tmp1;
- Result =3D SDValue(DAG.UpdateNodeOperands(Result.getNode(), &Ops[0],
- Ops.size()), Result.getResNo=
());
- }
-
- // Remember that the CALLSEQ_START is legalized.
- AddLegalizedOperand(Op.getValue(0), Result);
- if (Node->getNumValues() =3D=3D 2) // If this has a flag result, re=
member it.
- AddLegalizedOperand(Op.getValue(1), Result.getValue(1));
-
- // Now that the callseq_start and all of the non-call nodes above this=
call
- // sequence have been legalized, legalize the call itself. During this
- // process, no libcalls can/will be inserted, guaranteeing that no cal=
ls
- // can overlap.
- assert(!IsLegalizingCall && "Inconsistent sequentialization of calls!"=
);
- // Note that we are selecting this call!
- LastCALLSEQ_END =3D SDValue(CallEnd, 0);
- IsLegalizingCall =3D true;
-
- // Legalize the call, starting from the CALLSEQ_END.
- LegalizeOp(LastCALLSEQ_END);
- assert(!IsLegalizingCall && "CALLSEQ_END should have cleared this!");
- return Result;
- }
- case ISD::CALLSEQ_END:
- // If the CALLSEQ_START node hasn't been legalized first, legalize it.=
This
- // will cause this node to be legalized as well as handling libcalls r=
ight.
- if (LastCALLSEQ_END.getNode() !=3D Node) {
- LegalizeOp(SDValue(FindCallStartFromCallEnd(Node), 0));
- DenseMap<SDValue, SDValue>::iterator I =3D LegalizedNodes.find(Op);
- assert(I !=3D LegalizedNodes.end() &&
- "Legalizing the call start should have legalized this node!");
- return I->second;
- }
-
- // Otherwise, the call start has been legalized and everything is going
- // according to plan. Just legalize ourselves normally here.
- Tmp1 =3D LegalizeOp(Node->getOperand(0)); // Legalize the chain.
- // Do not try to legalize the target-specific arguments (#1+), except =
for
- // an optional flag input.
- if (Node->getOperand(Node->getNumOperands()-1).getValueType() !=3D MVT=
::Glue){
- if (Tmp1 !=3D Node->getOperand(0)) {
- SmallVector<SDValue, 8> Ops(Node->op_begin(), Node->op_end());
- Ops[0] =3D Tmp1;
- Result =3D SDValue(DAG.UpdateNodeOperands(Result.getNode(),
- &Ops[0], Ops.size()),
- Result.getResNo());
- }
- } else {
- Tmp2 =3D LegalizeOp(Node->getOperand(Node->getNumOperands()-1));
- if (Tmp1 !=3D Node->getOperand(0) ||
- Tmp2 !=3D Node->getOperand(Node->getNumOperands()-1)) {
- SmallVector<SDValue, 8> Ops(Node->op_begin(), Node->op_end());
- Ops[0] =3D Tmp1;
- Ops.back() =3D Tmp2;
- Result =3D SDValue(DAG.UpdateNodeOperands(Result.getNode(),
- &Ops[0], Ops.size()),
- Result.getResNo());
- }
- }
- assert(IsLegalizingCall && "Call sequence imbalance between start/end?=
");
- // This finishes up call legalization.
- IsLegalizingCall =3D false;
-
- // If the CALLSEQ_END node has a flag, remember that we legalized it.
- AddLegalizedOperand(SDValue(Node, 0), Result.getValue(0));
- if (Node->getNumValues() =3D=3D 2)
- AddLegalizedOperand(SDValue(Node, 1), Result.getValue(1));
- return Result.getValue(Op.getResNo());
case ISD::LOAD: {
LoadSDNode *LD =3D cast<LoadSDNode>(Node);
- Tmp1 =3D LegalizeOp(LD->getChain()); // Legalize the chain.
- Tmp2 =3D LegalizeOp(LD->getBasePtr()); // Legalize the base pointer.
+ Tmp1 =3D LD->getChain(); // Legalize the chain.
+ Tmp2 =3D LD->getBasePtr(); // Legalize the base pointer.
=20
ISD::LoadExtType ExtType =3D LD->getExtensionType();
if (ExtType =3D=3D ISD::NON_EXTLOAD) {
EVT VT =3D Node->getValueType(0);
- Result =3D SDValue(DAG.UpdateNodeOperands(Result.getNode(),
- Tmp1, Tmp2, LD->getOffset()),
- Result.getResNo());
- Tmp3 =3D Result.getValue(0);
- Tmp4 =3D Result.getValue(1);
+ Tmp3 =3D SDValue(Node, 0);
+ Tmp4 =3D SDValue(Node, 1);
=20
switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
- default: assert(0 && "This action is not supported yet!");
+ default: llvm_unreachable("This action is not supported yet!");
case TargetLowering::Legal:
// If this is an unaligned load and the target doesn't support it,
// expand it.
@@ -1148,20 +923,16 @@
Type *Ty =3D LD->getMemoryVT().getTypeForEVT(*DAG.getContext());
unsigned ABIAlignment =3D TLI.getTargetData()->getABITypeAlignme=
nt(Ty);
if (LD->getAlignment() < ABIAlignment){
- Result =3D ExpandUnalignedLoad(cast<LoadSDNode>(Result.getNode=
()),
- DAG, TLI);
- Tmp3 =3D Result.getOperand(0);
- Tmp4 =3D Result.getOperand(1);
- Tmp3 =3D LegalizeOp(Tmp3);
- Tmp4 =3D LegalizeOp(Tmp4);
+ ExpandUnalignedLoad(cast<LoadSDNode>(Node),
+ DAG, TLI, Tmp3, Tmp4);
}
}
break;
case TargetLowering::Custom:
Tmp1 =3D TLI.LowerOperation(Tmp3, DAG);
if (Tmp1.getNode()) {
- Tmp3 =3D LegalizeOp(Tmp1);
- Tmp4 =3D LegalizeOp(Tmp1.getValue(1));
+ Tmp3 =3D Tmp1;
+ Tmp4 =3D Tmp1.getValue(1);
}
break;
case TargetLowering::Promote: {
@@ -1172,17 +943,19 @@
=20
Tmp1 =3D DAG.getLoad(NVT, dl, Tmp1, Tmp2, LD->getPointerInfo(),
LD->isVolatile(), LD->isNonTemporal(),
- LD->getAlignment());
- Tmp3 =3D LegalizeOp(DAG.getNode(ISD::BITCAST, dl, VT, Tmp1));
- Tmp4 =3D LegalizeOp(Tmp1.getValue(1));
+ LD->isInvariant(), LD->getAlignment());
+ Tmp3 =3D DAG.getNode(ISD::BITCAST, dl, VT, Tmp1);
+ Tmp4 =3D Tmp1.getValue(1);
break;
}
}
- // Since loads produce two values, make sure to remember that we
- // legalized both of them.
- AddLegalizedOperand(SDValue(Node, 0), Tmp3);
- AddLegalizedOperand(SDValue(Node, 1), Tmp4);
- return Op.getResNo() ? Tmp4 : Tmp3;
+ if (Tmp4.getNode() !=3D Node) {
+ assert(Tmp3.getNode() !=3D Node && "Load must be completely replac=
ed");
+ DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 0), Tmp3);
+ DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 1), Tmp4);
+ ReplacedNode(Node);
+ }
+ return;
}
=20
EVT SrcVT =3D LD->getMemoryVT();
@@ -1213,9 +986,10 @@
ISD::LoadExtType NewExtType =3D
ExtType =3D=3D ISD::ZEXTLOAD ? ISD::ZEXTLOAD : ISD::EXTLOAD;
=20
- Result =3D DAG.getExtLoad(NewExtType, dl, Node->getValueType(0),
- Tmp1, Tmp2, LD->getPointerInfo(),
- NVT, isVolatile, isNonTemporal, Alignment);
+ SDValue Result =3D
+ DAG.getExtLoad(NewExtType, dl, Node->getValueType(0),
+ Tmp1, Tmp2, LD->getPointerInfo(),
+ NVT, isVolatile, isNonTemporal, Alignment);
=20
Ch =3D Result.getValue(1); // The chain.
=20
@@ -1230,8 +1004,8 @@
Result.getValueType(), Result,
DAG.getValueType(SrcVT));
=20
- Tmp1 =3D LegalizeOp(Result);
- Tmp2 =3D LegalizeOp(Ch);
+ Tmp1 =3D Result;
+ Tmp2 =3D Ch;
} else if (SrcWidth & (SrcWidth - 1)) {
// If not loading a power-of-2 number of bits, expand as two loads.
assert(!SrcVT.isVector() && "Unsupported extload!");
@@ -1274,7 +1048,7 @@
TLI.getShiftAmountTy(Hi.getValueType=
())));
=20
// Join the hi and lo parts.
- Result =3D DAG.getNode(ISD::OR, dl, Node->getValueType(0), Lo, Hi);
+ Tmp1 =3D DAG.getNode(ISD::OR, dl, Node->getValueType(0), Lo, Hi);
} else {
// Big endian - avoid unaligned loads.
// EXTLOAD:i24 -> (shl EXTLOAD:i16, 8) | ZEXTLOAD at +2:i8
@@ -1304,29 +1078,25 @@
TLI.getShiftAmountTy(Hi.getValueType=
())));
=20
// Join the hi and lo parts.
- Result =3D DAG.getNode(ISD::OR, dl, Node->getValueType(0), Lo, Hi);
+ Tmp1 =3D DAG.getNode(ISD::OR, dl, Node->getValueType(0), Lo, Hi);
}
=20
- Tmp1 =3D LegalizeOp(Result);
- Tmp2 =3D LegalizeOp(Ch);
+ Tmp2 =3D Ch;
} else {
switch (TLI.getLoadExtAction(ExtType, SrcVT)) {
- default: assert(0 && "This action is not supported yet!");
+ default: llvm_unreachable("This action is not supported yet!");
case TargetLowering::Custom:
isCustom =3D true;
// FALLTHROUGH
case TargetLowering::Legal:
- Result =3D SDValue(DAG.UpdateNodeOperands(Result.getNode(),
- Tmp1, Tmp2, LD->getOffset(=
)),
- Result.getResNo());
- Tmp1 =3D Result.getValue(0);
- Tmp2 =3D Result.getValue(1);
+ Tmp1 =3D SDValue(Node, 0);
+ Tmp2 =3D SDValue(Node, 1);
=20
if (isCustom) {
- Tmp3 =3D TLI.LowerOperation(Result, DAG);
+ Tmp3 =3D TLI.LowerOperation(SDValue(Node, 0), DAG);
if (Tmp3.getNode()) {
- Tmp1 =3D LegalizeOp(Tmp3);
- Tmp2 =3D LegalizeOp(Tmp3.getValue(1));
+ Tmp1 =3D Tmp3;
+ Tmp2 =3D Tmp3.getValue(1);
}
} else {
// If this is an unaligned load and the target doesn't support i=
t,
@@ -1337,12 +1107,8 @@
unsigned ABIAlignment =3D
TLI.getTargetData()->getABITypeAlignment(Ty);
if (LD->getAlignment() < ABIAlignment){
- Result =3D ExpandUnalignedLoad(cast<LoadSDNode>(Result.getNo=
de()),
- DAG, TLI);
- Tmp1 =3D Result.getOperand(0);
- Tmp2 =3D Result.getOperand(1);
- Tmp1 =3D LegalizeOp(Tmp1);
- Tmp2 =3D LegalizeOp(Tmp2);
+ ExpandUnalignedLoad(cast<LoadSDNode>(Node),
+ DAG, TLI, Tmp1, Tmp2);
}
}
}
@@ -1352,7 +1118,7 @@
SDValue Load =3D DAG.getLoad(SrcVT, dl, Tmp1, Tmp2,
LD->getPointerInfo(),
LD->isVolatile(), LD->isNonTemporal(),
- LD->getAlignment());
+ LD->isInvariant(), LD->getAlignment()=
);
unsigned ExtendOp;
switch (ExtType) {
case ISD::EXTLOAD:
@@ -1363,95 +1129,13 @@
case ISD::ZEXTLOAD: ExtendOp =3D ISD::ZERO_EXTEND; break;
default: llvm_unreachable("Unexpected extend load type!");
}
- Result =3D DAG.getNode(ExtendOp, dl, Node->getValueType(0), Load=
);
- Tmp1 =3D LegalizeOp(Result); // Relegalize new nodes.
- Tmp2 =3D LegalizeOp(Load.getValue(1));
+ Tmp1 =3D DAG.getNode(ExtendOp, dl, Node->getValueType(0), Load);
+ Tmp2 =3D Load.getValue(1);
break;
}
=20
- // If this is a promoted vector load, and the vector element types=
are
- // legal, then scalarize it.
- if (ExtType =3D=3D ISD::EXTLOAD && SrcVT.isVector() &&
- TLI.isTypeLegal(Node->getValueType(0).getScalarType())) {
- SmallVector<SDValue, 8> LoadVals;
- SmallVector<SDValue, 8> LoadChains;
- unsigned NumElem =3D SrcVT.getVectorNumElements();
- unsigned Stride =3D SrcVT.getScalarType().getSizeInBits()/8;
-
- for (unsigned Idx=3D0; Idx<NumElem; Idx++) {
- Tmp2 =3D DAG.getNode(ISD::ADD, dl, Tmp2.getValueType(), Tmp2,
- DAG.getIntPtrConstant(Stride));
- SDValue ScalarLoad =3D DAG.getExtLoad(ISD::EXTLOAD, dl,
- Node->getValueType(0).getScalarType(),
- Tmp1, Tmp2, LD->getPointerInfo().getWithOffset(Idx * Str=
ide),
- SrcVT.getScalarType(),
- LD->isVolatile(), LD->isNonTemporal(),
- LD->getAlignment());
-
- LoadVals.push_back(ScalarLoad.getValue(0));
- LoadChains.push_back(ScalarLoad.getValue(1));
- }
- Result =3D DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
- &LoadChains[0], LoadChains.size());
- SDValue ValRes =3D DAG.getNode(ISD::BUILD_VECTOR, dl,
- Node->getValueType(0), &LoadVals[0], LoadVals.size());
-
- Tmp1 =3D LegalizeOp(ValRes); // Relegalize new nodes.
- Tmp2 =3D LegalizeOp(Result.getValue(0)); // Relegalize new node=
s.
- break;
- }
-
- // If this is a promoted vector load, and the vector element types=
are
- // illegal, create the promoted vector from bitcasted segments.
- if (ExtType =3D=3D ISD::EXTLOAD && SrcVT.isVector()) {
- EVT MemElemTy =3D Node->getValueType(0).getScalarType();
- EVT SrcSclrTy =3D SrcVT.getScalarType();
- unsigned SizeRatio =3D
- (MemElemTy.getSizeInBits() / SrcSclrTy.getSizeInBits());
-
- SmallVector<SDValue, 8> LoadVals;
- SmallVector<SDValue, 8> LoadChains;
- unsigned NumElem =3D SrcVT.getVectorNumElements();
- unsigned Stride =3D SrcVT.getScalarType().getSizeInBits()/8;
-
- for (unsigned Idx=3D0; Idx<NumElem; Idx++) {
- Tmp2 =3D DAG.getNode(ISD::ADD, dl, Tmp2.getValueType(), Tmp2,
- DAG.getIntPtrConstant(Stride));
- SDValue ScalarLoad =3D DAG.getExtLoad(ISD::EXTLOAD, dl,
- SrcVT.getScalarType(),
- Tmp1, Tmp2, LD->getPointerInfo().getWithOffset(Idx * Str=
ide),
- SrcVT.getScalarType(),
- LD->isVolatile(), LD->isNonTemporal(),
- LD->getAlignment());
- if (TLI.isBigEndian()) {
- // MSB (which is garbage, comes first)
- LoadVals.push_back(ScalarLoad.getValue(0));
- for (unsigned i =3D 0; i<SizeRatio-1; ++i)
- LoadVals.push_back(DAG.getUNDEF(SrcVT.getScalarType()));
- } else {
- // LSB (which is data, comes first)
- for (unsigned i =3D 0; i<SizeRatio-1; ++i)
- LoadVals.push_back(DAG.getUNDEF(SrcVT.getScalarType()));
- LoadVals.push_back(ScalarLoad.getValue(0));
- }
- LoadChains.push_back(ScalarLoad.getValue(1));
- }
-
- Result =3D DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
- &LoadChains[0], LoadChains.size());
- EVT TempWideVector =3D EVT::getVectorVT(*DAG.getContext(),
- SrcVT.getScalarType(), NumElem*SizeRatio);
- SDValue ValRes =3D DAG.getNode(ISD::BUILD_VECTOR, dl,=20
- TempWideVector, &LoadVals[0], LoadVals.size());
-
- // Cast to the correct type
- ValRes =3D DAG.getNode(ISD::BITCAST, dl, Node->getValueType(0), =
ValRes);
-
- Tmp1 =3D LegalizeOp(ValRes); // Relegalize new nodes.
- Tmp2 =3D LegalizeOp(Result.getValue(0)); // Relegalize new node=
s.
- break;
-
- }
+ assert(!SrcVT.isVector() &&
+ "Vector Loads are handled in LegalizeVectorOps");
=20
// FIXME: This does not work for vectors on most targets. Sign- a=
nd
// zero-extend operations are currently folded into extending load=
s,
@@ -1461,10 +1145,10 @@
"EXTLOAD should always be supported!");
// Turn the unsupported load into an EXTLOAD followed by an explic=
it
// zero/sign extend inreg.
- Result =3D DAG.getExtLoad(ISD::EXTLOAD, dl, Node->getValueType(0),
- Tmp1, Tmp2, LD->getPointerInfo(), SrcVT,
- LD->isVolatile(), LD->isNonTemporal(),
- LD->getAlignment());
+ SDValue Result =3D DAG.getExtLoad(ISD::EXTLOAD, dl, Node->getValue=
Type(0),
+ Tmp1, Tmp2, LD->getPointerInfo(), =
SrcVT,
+ LD->isVolatile(), LD->isNonTempora=
l(),
+ LD->getAlignment());
SDValue ValRes;
if (ExtType =3D=3D ISD::SEXTLOAD)
ValRes =3D DAG.getNode(ISD::SIGN_EXTEND_INREG, dl,
@@ -1472,42 +1156,41 @@
Result, DAG.getValueType(SrcVT));
else
ValRes =3D DAG.getZeroExtendInReg(Result, dl, SrcVT.getScalarTyp=
e());
- Tmp1 =3D LegalizeOp(ValRes); // Relegalize new nodes.
- Tmp2 =3D LegalizeOp(Result.getValue(1)); // Relegalize new nodes.
+ Tmp1 =3D ValRes;
+ Tmp2 =3D Result.getValue(1);
break;
}
}
=20
// Since loads produce two values, make sure to remember that we legal=
ized
// both of them.
- AddLegalizedOperand(SDValue(Node, 0), Tmp1);
- AddLegalizedOperand(SDValue(Node, 1), Tmp2);
- return Op.getResNo() ? Tmp2 : Tmp1;
+ if (Tmp2.getNode() !=3D Node) {
+ assert(Tmp1.getNode() !=3D Node && "Load must be completely replaced=
");
+ DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 0), Tmp1);
+ DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 1), Tmp2);
+ ReplacedNode(Node);
+ }
+ break;
}
case ISD::STORE: {
StoreSDNode *ST =3D cast<StoreSDNode>(Node);
- Tmp1 =3D LegalizeOp(ST->getChain()); // Legalize the chain.
- Tmp2 =3D LegalizeOp(ST->getBasePtr()); // Legalize the pointer.
+ Tmp1 =3D ST->getChain();
+ Tmp2 =3D ST->getBasePtr();
unsigned Alignment =3D ST->getAlignment();
bool isVolatile =3D ST->isVolatile();
bool isNonTemporal =3D ST->isNonTemporal();
=20
if (!ST->isTruncatingStore()) {
if (SDNode *OptStore =3D OptimizeFloatStore(ST).getNode()) {
- Result =3D SDValue(OptStore, 0);
+ ReplaceNode(ST, OptStore);
break;
}
=20
{
- Tmp3 =3D LegalizeOp(ST->getValue());
- Result =3D SDValue(DAG.UpdateNodeOperands(Result.getNode(),
- Tmp1, Tmp3, Tmp2,
- ST->getOffset()),
- Result.getResNo());
-
+ Tmp3 =3D ST->getValue();
EVT VT =3D Tmp3.getValueType();
switch (TLI.getOperationAction(ISD::STORE, VT)) {
- default: assert(0 && "This action is not supported yet!");
+ default: llvm_unreachable("This action is not supported yet!");
case TargetLowering::Legal:
// If this is an unaligned store and the target doesn't support =
it,
// expand it.
@@ -1515,27 +1198,31 @@
Type *Ty =3D ST->getMemoryVT().getTypeForEVT(*DAG.getContext()=
);
unsigned ABIAlignment=3D TLI.getTargetData()->getABITypeAlignm=
ent(Ty);
if (ST->getAlignment() < ABIAlignment)
- Result =3D ExpandUnalignedStore(cast<StoreSDNode>(Result.get=
Node()),
- DAG, TLI);
+ ExpandUnalignedStore(cast<StoreSDNode>(Node),
+ DAG, TLI, this);
}
break;
case TargetLowering::Custom:
- Tmp1 =3D TLI.LowerOperation(Result, DAG);
- if (Tmp1.getNode()) Result =3D Tmp1;
+ Tmp1 =3D TLI.LowerOperation(SDValue(Node, 0), DAG);
+ if (Tmp1.getNode())
+ ReplaceNode(SDValue(Node, 0), Tmp1);
break;
- case TargetLowering::Promote:
+ case TargetLowering::Promote: {
assert(VT.isVector() && "Unknown legal promote case!");
Tmp3 =3D DAG.getNode(ISD::BITCAST, dl,
TLI.getTypeToPromoteTo(ISD::STORE, VT), Tmp3);
- Result =3D DAG.getStore(Tmp1, dl, Tmp3, Tmp2,
- ST->getPointerInfo(), isVolatile,
- isNonTemporal, Alignment);
+ SDValue Result =3D
+ DAG.getStore(Tmp1, dl, Tmp3, Tmp2,
+ ST->getPointerInfo(), isVolatile,
+ isNonTemporal, Alignment);
+ ReplaceNode(SDValue(Node, 0), Result);
break;
}
+ }
break;
}
} else {
- Tmp3 =3D LegalizeOp(ST->getValue());
+ Tmp3 =3D ST->getValue();
=20
EVT StVT =3D ST->getMemoryVT();
unsigned StWidth =3D StVT.getSizeInBits();
@@ -1547,8 +1234,10 @@
EVT NVT =3D EVT::getIntegerVT(*DAG.getContext(),
StVT.getStoreSizeInBits());
Tmp3 =3D DAG.getZeroExtendInReg(Tmp3, dl, StVT);
- Result =3D DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerI=
nfo(),
- NVT, isVolatile, isNonTemporal, Alignme=
nt);
+ SDValue Result =3D
+ DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(),
+ NVT, isVolatile, isNonTemporal, Alignment);
+ ReplaceNode(SDValue(Node, 0), Result);
} else if (StWidth & (StWidth - 1)) {
// If not storing a power-of-2 number of bits, expand as two store=
s.
assert(!StVT.isVector() && "Unsupported truncstore!");
@@ -1602,17 +1291,11 @@
}
=20
// The order of the stores doesn't matter.
- Result =3D DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
+ SDValue Result =3D DAG.getNode(ISD::TokenFactor, dl, MVT::Other, L=
o, Hi);
+ ReplaceNode(SDValue(Node, 0), Result);
} else {
- if (Tmp1 !=3D ST->getChain() || Tmp3 !=3D ST->getValue() ||
- Tmp2 !=3D ST->getBasePtr())
- Result =3D SDValue(DAG.UpdateNodeOperands(Result.getNode(),
- Tmp1, Tmp3, Tmp2,
- ST->getOffset()),
- Result.getResNo());
-
switch (TLI.getTruncStoreAction(ST->getValue().getValueType(), StV=
T)) {
- default: assert(0 && "This action is not supported yet!");
+ default: llvm_unreachable("This action is not supported yet!");
case TargetLowering::Legal:
// If this is an unaligned store and the target doesn't support =
it,
// expand it.
@@ -1620,120 +1303,24 @@
Type *Ty =3D ST->getMemoryVT().getTypeForEVT(*DAG.getContext()=
);
unsigned ABIAlignment=3D TLI.getTargetData()->getABITypeAlignm=
ent(Ty);
if (ST->getAlignment() < ABIAlignment)
- Result =3D ExpandUnalignedStore(cast<StoreSDNode>(Result.get=
Node()),
- DAG, TLI);
+ ExpandUnalignedStore(cast<StoreSDNode>(Node), DAG, TLI, this=
);
}
break;
case TargetLowering::Custom:
- Result =3D TLI.LowerOperation(Result, DAG);
+ ReplaceNode(SDValue(Node, 0),
+ TLI.LowerOperation(SDValue(Node, 0), DAG));
break;
case TargetLowering::Expand:
-
- EVT WideScalarVT =3D Tmp3.getValueType().getScalarType();
- EVT NarrowScalarVT =3D StVT.getScalarType();
-
- if (StVT.isVector()) {
- unsigned NumElem =3D StVT.getVectorNumElements();
- // The type of the data we want to save
- EVT RegVT =3D Tmp3.getValueType();
- EVT RegSclVT =3D RegVT.getScalarType();
- // The type of data as saved in memory.
- EVT MemSclVT =3D StVT.getScalarType();
-
- bool RegScalarLegal =3D TLI.isTypeLegal(RegSclVT);
- bool MemScalarLegal =3D TLI.isTypeLegal(MemSclVT);
-
- // We need to expand this store. If the register element type
- // is legal then we can scalarize the vector and use
- // truncating stores.
- if (RegScalarLegal) {
- // Cast floats into integers
- unsigned ScalarSize =3D MemSclVT.getSizeInBits();
- EVT EltVT =3D EVT::getIntegerVT(*DAG.getContext(), ScalarSiz=
e);
-
- // Round odd types to the next pow of two.
- if (!isPowerOf2_32(ScalarSize))
- ScalarSize =3D NextPowerOf2(ScalarSize);
-
- // Store Stride in bytes
- unsigned Stride =3D ScalarSize/8;
- // Extract each of the elements from the original vector
- // and save them into memory individually.
- SmallVector<SDValue, 8> Stores;
- for (unsigned Idx =3D 0; Idx < NumElem; Idx++) {
- SDValue Ex =3D DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
- RegSclVT, Tmp3, DAG.getIntPtrConstant(Idx)=
);
-
- Tmp2 =3D DAG.getNode(ISD::ADD, dl, Tmp2.getValueType(), Tm=
p2,
- DAG.getIntPtrConstant(Stride));
-
- // This scalar TruncStore may be illegal, but we lehalize =
it
- // later.
- SDValue Store =3D DAG.getTruncStore(Tmp1, dl, Ex, Tmp2,
- ST->getPointerInfo().getWithOffset(Idx*Stride), MemS=
clVT,
- isVolatile, isNonTemporal, Alignment);
-
- Stores.push_back(Store);
- }
-
- Result =3D DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
- &Stores[0], Stores.size());
- break;
- }
-
- // The scalar register type is illegal.
- // For example saving <2 x i64> -> <2 x i32> on a x86.
- // In here we bitcast the value into a vector of smaller parts=
and
- // save it using smaller scalars.
- if (!RegScalarLegal && MemScalarLegal) {
- // Store Stride in bytes
- unsigned Stride =3D MemSclVT.getSizeInBits()/8;
-
- unsigned SizeRatio =3D
- (RegSclVT.getSizeInBits() / MemSclVT.getSizeInBits());
-
- EVT CastValueVT =3D EVT::getVectorVT(*DAG.getContext(),
- MemSclVT,
- SizeRatio * NumElem);
-
- // Cast the wide elem vector to wider vec with smaller elem =
type.
- // Example <2 x i64> -> <4 x i32>
- Tmp3 =3D DAG.getNode(ISD::BITCAST, dl, CastValueVT, Tmp3);
-
- SmallVector<SDValue, 8> Stores;
- for (unsigned Idx=3D0; Idx < NumElem * SizeRatio; Idx++) {
- // Extract the Ith element.
- SDValue Ex =3D DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
- NarrowScalarVT, Tmp3, DAG.getIntPtrConstant=
(Idx));
- // Bump pointer.
- Tmp2 =3D DAG.getNode(ISD::ADD, dl, Tmp2.getValueType(), Tm=
p2,
- DAG.getIntPtrConstant(Stride));
-
- // Store if, this element is:
- // - First element on big endian, or
- // - Last element on little endian
- if (( TLI.isBigEndian() && (Idx % SizeRatio =3D=3D 0)) ||
- ((!TLI.isBigEndian() && (Idx % SizeRatio =3D=3D SizeRa=
tio-1)))) {
- SDValue Store =3D DAG.getStore(Tmp1, dl, Ex, Tmp2,
- ST->getPointerInfo().getWithOffset(Idx*S=
tride),
- isVolatile, isNonTemporal, Alig=
nment);
- Stores.push_back(Store);
- }
- }
- Result =3D DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
- &Stores[0], Stores.size());
- break;
- }
-
- assert(false && "Unable to legalize the vector trunc store!");
- }// is vector
-
+ assert(!StVT.isVector() &&
+ "Vector Stores are handled in LegalizeVectorOps");
=20
// TRUNCSTORE:i16 i32 -> STORE i16
assert(TLI.isTypeLegal(StVT) && "Do not know how to expand this =
store!");
Tmp3 =3D DAG.getNode(ISD::TRUNCATE, dl, StVT, Tmp3);
- Result =3D DAG.getStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo=
(),
- isVolatile, isNonTemporal, Alignment);
+ SDValue Result =3D
+ DAG.getStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(),
+ isVolatile, isNonTemporal, Alignment);
+ ReplaceNode(SDValue(Node, 0), Result);
break;
}
}
@@ -1741,17 +1328,6 @@
break;
}
}
- assert(Result.getValueType() =3D=3D Op.getValueType() &&
- "Bad legalization!");
-
- // Make sure that the generated code is itself legal.
- if (Result !=3D Op)
- Result =3D LegalizeOp(Result);
-
- // Note that LegalizeOp may be reentered even from single-use nodes, whi=
ch
- // means that we always must cache transformed nodes.
- AddLegalizedOperand(Op, Result);
- return Result;
}
=20
SDValue SelectionDAGLegalize::ExpandExtractFromVectorThroughStack(SDValue =
Op) {
@@ -1778,7 +1354,7 @@
=20
if (Op.getValueType().isVector())
return DAG.getLoad(Op.getValueType(), dl, Ch, StackPtr,MachinePointerI=
nfo(),
- false, false, 0);
+ false, false, false, 0);
return DAG.getExtLoad(ISD::EXTLOAD, dl, Op.getValueType(), Ch, StackPtr,
MachinePointerInfo(),
Vec.getValueType().getVectorElementType(),
@@ -1826,7 +1402,7 @@
=20
// Finally, load the updated vector.
return DAG.getLoad(Op.getValueType(), dl, Ch, StackPtr, PtrInfo,
- false, false, 0);
+ false, false, false, 0);
}
=20
SDValue SelectionDAGLegalize::ExpandVectorBuildThroughStack(SDNode* Node) {
@@ -1876,7 +1452,8 @@
StoreChain =3D DAG.getEntryNode();
=20
// Result is a load from the stack slot.
- return DAG.getLoad(VT, dl, StoreChain, FIPtr, PtrInfo, false, false, 0);
+ return DAG.getLoad(VT, dl, StoreChain, FIPtr, PtrInfo,=20
+ false, false, false, 0);
}
=20
SDValue SelectionDAGLegalize::ExpandFCOPYSIGN(SDNode* Node) {
@@ -1905,7 +1482,7 @@
assert(FloatVT.isByteSized() && "Unsupported floating point type!");
// Load out a legal integer with the same sign bit as the float.
SignBit =3D DAG.getLoad(LoadTy, dl, Ch, StackPtr, MachinePointerInfo=
(),
- false, false, 0);
+ false, false, false, 0);
} else { // Little endian
SDValue LoadPtr =3D StackPtr;
// The float may be wider than the integer we are going to load. Ad=
vance
@@ -1916,7 +1493,7 @@
LoadPtr, DAG.getIntPtrConstant(ByteOffset));
// Load a legal integer containing the sign bit.
SignBit =3D DAG.getLoad(LoadTy, dl, Ch, LoadPtr, MachinePointerInfo(=
),
- false, false, 0);
+ false, false, false, 0);
// Move the sign bit to the top bit of the loaded integer.
unsigned BitShift =3D LoadTy.getSizeInBits() -
(FloatVT.getSizeInBits() - 8 * ByteOffset);
@@ -1984,7 +1561,7 @@
EVT OpVT =3D LHS.getValueType();
ISD::CondCode CCCode =3D cast<CondCodeSDNode>(CC)->get();
switch (TLI.getCondCodeAction(CCCode, OpVT)) {
- default: assert(0 && "Unknown condition code action!");
+ default: llvm_unreachable("Unknown condition code action!");
case TargetLowering::Legal:
// Nothing to do.
break;
@@ -1992,7 +1569,7 @@
ISD::CondCode CC1 =3D ISD::SETCC_INVALID, CC2 =3D ISD::SETCC_INVALID;
unsigned Opc =3D 0;
switch (CCCode) {
- default: assert(0 && "Don't know how to expand this condition!");
+ default: llvm_unreachable("Don't know how to expand this condition!");
case ISD::SETOEQ: CC1 =3D ISD::SETEQ; CC2 =3D ISD::SETO; Opc =3D ISD:=
:AND; break;
case ISD::SETOGT: CC1 =3D ISD::SETGT; CC2 =3D ISD::SETO; Opc =3D ISD:=
:AND; break;
case ISD::SETOGE: CC1 =3D ISD::SETGE; CC2 =3D ISD::SETO; Opc =3D ISD:=
:AND; break;
@@ -2058,7 +1635,7 @@
// Result is a load from the stack slot.
if (SlotSize =3D=3D DestSize)
return DAG.getLoad(DestVT, dl, Store, FIPtr, PtrInfo,
- false, false, DestAlign);
+ false, false, false, DestAlign);
=20
assert(SlotSize < DestSize && "Unknown extension!");
return DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT, Store, FIPtr,
@@ -2081,7 +1658,7 @@
false, false, 0);
return DAG.getLoad(Node->getValueType(0), dl, Ch, StackPtr,
MachinePointerInfo::getFixedStack(SPFI),
- false, false, 0);
+ false, false, false, 0);
}
=20
=20
@@ -2127,7 +1704,7 @@
=20
// If all elements are constants, create a load from the constant pool.
if (isConstant) {
- std::vector<Constant*> CV;
+ SmallVector<Constant*, 16> CV;
for (unsigned i =3D 0, e =3D NumElems; i !=3D e; ++i) {
if (ConstantFPSDNode *V =3D
dyn_cast<ConstantFPSDNode>(Node->getOperand(i))) {
@@ -2155,7 +1732,7 @@
unsigned Alignment =3D cast<ConstantPoolSDNode>(CPIdx)->getAlignment();
return DAG.getLoad(VT, dl, DAG.getEntryNode(), CPIdx,
MachinePointerInfo::getConstantPool(),
- false, false, Alignment);
+ false, false, false, Alignment);
}
=20
if (!MoreThanTwoValues) {
@@ -2190,12 +1767,6 @@
// and leave the Hi part unset.
SDValue SelectionDAGLegalize::ExpandLibCall(RTLIB::Libcall LC, SDNode *Nod=
e,
bool isSigned) {
- assert(!IsLegalizingCall && "Cannot overlap legalization of calls!");
- // The input chain to this libcall is the entry node of the function.
- // Legalizing the call will automatically add the previous call to the
- // dependence.
- SDValue InChain =3D DAG.getEntryNode();
-
TargetLowering::ArgListTy Args;
TargetLowering::ArgListEntry Entry;
for (unsigned i =3D 0, e =3D Node->getNumOperands(); i !=3D e; ++i) {
@@ -2209,26 +1780,31 @@
SDValue Callee =3D DAG.getExternalSymbol(TLI.getLibcallName(LC),
TLI.getPointerTy());
=20
- // Splice the libcall in wherever FindInputOutputChains tells us to.
Type *RetTy =3D Node->getValueType(0).getTypeForEVT(*DAG.getContext());
=20
+ // By default, the input chain to this libcall is the entry node of the
+ // function. If the libcall is going to be emitted as a tail call then
+ // TLI.isUsedByReturnOnly will change it to the right chain if the return
+ // node which is being folded has a non-entry input chain.
+ SDValue InChain =3D DAG.getEntryNode();
+
// isTailCall may be true since the callee does not reference caller sta=
ck
// frame. Check if it's in the right position.
- bool isTailCall =3D isInTailCallPosition(DAG, Node, TLI);
+ SDValue TCChain =3D InChain;
+ bool isTailCall =3D isInTailCallPosition(DAG, Node, TCChain, TLI);
+ if (isTailCall)
+ InChain =3D TCChain;
+
std::pair<SDValue, SDValue> CallInfo =3D
TLI.LowerCallTo(InChain, RetTy, isSigned, !isSigned, false, false,
0, TLI.getLibcallCallingConv(LC), isTailCall,
- /*isReturnValueUsed=3D*/true,
+ /*doesNotReturn=3D*/false, /*isReturnValueUsed=3D*/tru=
e,
Callee, Args, DAG, Node->getDebugLoc());
=20
if (!CallInfo.second.getNode())
// It's a tailcall, return the chain (which is the DAG root).
return DAG.getRoot();
=20
- // Legalize the call sequence, starting with the chain. This will advan=
ce
- // the LastCALLSEQ_END to the legalized version of the CALLSEQ_END node =
that
- // was added by LowerCallTo (guaranteeing proper serialization of calls).
- LegalizeOp(CallInfo.second);
return CallInfo.first;
}
=20
@@ -2254,15 +1830,10 @@
Type *RetTy =3D RetVT.getTypeForEVT(*DAG.getContext());
std::pair<SDValue,SDValue> CallInfo =3D
TLI.LowerCallTo(DAG.getEntryNode(), RetTy, isSigned, !isSigned, false,
- false, 0, TLI.getLibcallCallingConv(LC), false,
- /*isReturnValueUsed=3D*/true,
+ false, 0, TLI.getLibcallCallingConv(LC), /*isTailCall=3D=
*/false,
+ /*doesNotReturn=3D*/false, /*isReturnValueUsed=3D*/true,
Callee, Args, DAG, dl);
=20
- // Legalize the call sequence, starting with the chain. This will advan=
ce
- // the LastCALLSEQ_END to the legalized version of the CALLSEQ_END node =
that
- // was added by LowerCallTo (guaranteeing proper serialization of calls).
- LegalizeOp(CallInfo.second);
-
return CallInfo.first;
}
=20
@@ -2272,7 +1843,6 @@
SelectionDAGLegalize::ExpandChainLibCall(RTLIB::Libcall LC,
SDNode *Node,
bool isSigned) {
- assert(!IsLegalizingCall && "Cannot overlap legalization of calls!");
SDValue InChain =3D Node->getOperand(0);
=20
TargetLowering::ArgListTy Args;
@@ -2289,18 +1859,13 @@
SDValue Callee =3D DAG.getExternalSymbol(TLI.getLibcallName(LC),
TLI.getPointerTy());
=20
- // Splice the libcall in wherever FindInputOutputChains tells us to.
Type *RetTy =3D Node->getValueType(0).getTypeForEVT(*DAG.getContext());
std::pair<SDValue, SDValue> CallInfo =3D
TLI.LowerCallTo(InChain, RetTy, isSigned, !isSigned, false, false,
0, TLI.getLibcallCallingConv(LC), /*isTailCall=3D*/fal=
se,
- /*isReturnValueUsed=3D*/true,
+ /*doesNotReturn=3D*/false, /*isReturnValueUsed=3D*/tru=
e,
Callee, Args, DAG, Node->getDebugLoc());
=20
- // Legalize the call sequence, starting with the chain. This will advan=
ce
- // the LastCALLSEQ_END to the legalized version of the CALLSEQ_END node =
that
- // was added by LowerCallTo (guaranteeing proper serialization of calls).
- LegalizeOp(CallInfo.second);
return CallInfo;
}
=20
@@ -2311,7 +1876,7 @@
RTLIB::Libcall Call_PPCF128)=
{
RTLIB::Libcall LC;
switch (Node->getValueType(0).getSimpleVT().SimpleTy) {
- default: assert(0 && "Unexpected request for libcall!");
+ default: llvm_unreachable("Unexpected request for libcall!");
case MVT::f32: LC =3D Call_F32; break;
case MVT::f64: LC =3D Call_F64; break;
case MVT::f80: LC =3D Call_F80; break;
@@ -2328,7 +1893,7 @@
RTLIB::Libcall Call_I128) {
RTLIB::Libcall LC;
switch (Node->getValueType(0).getSimpleVT().SimpleTy) {
- default: assert(0 && "Unexpected request for libcall!");
+ default: llvm_unreachable("Unexpected request for libcall!");
case MVT::i8: LC =3D Call_I8; break;
case MVT::i16: LC =3D Call_I16; break;
case MVT::i32: LC =3D Call_I32; break;
@@ -2343,7 +1908,7 @@
const TargetLowering &TLI) {
RTLIB::Libcall LC;
switch (Node->getValueType(0).getSimpleVT().SimpleTy) {
- default: assert(0 && "Unexpected request for libcall!");
+ default: llvm_unreachable("Unexpected request for libcall!");
case MVT::i8: LC=3D isSigned ? RTLIB::SDIVREM_I8 : RTLIB::UDIVREM_I8;=
break;
case MVT::i16: LC=3D isSigned ? RTLIB::SDIVREM_I16 : RTLIB::UDIVREM_I16=
; break;
case MVT::i32: LC=3D isSigned ? RTLIB::SDIVREM_I32 : RTLIB::UDIVREM_I32=
; break;
@@ -2388,7 +1953,7 @@
=20
RTLIB::Libcall LC;
switch (Node->getValueType(0).getSimpleVT().SimpleTy) {
- default: assert(0 && "Unexpected request for libcall!");
+ default: llvm_unreachable("Unexpected request for libcall!");
case MVT::i8: LC=3D isSigned ? RTLIB::SDIVREM_I8 : RTLIB::UDIVREM_I8;=
break;
case MVT::i16: LC=3D isSigned ? RTLIB::SDIVREM_I16 : RTLIB::UDIVREM_I16=
; break;
case MVT::i32: LC=3D isSigned ? RTLIB::SDIVREM_I32 : RTLIB::UDIVREM_I32=
; break;
@@ -2426,21 +1991,16 @@
SDValue Callee =3D DAG.getExternalSymbol(TLI.getLibcallName(LC),
TLI.getPointerTy());
=20
- // Splice the libcall in wherever FindInputOutputChains tells us to.
DebugLoc dl =3D Node->getDebugLoc();
std::pair<SDValue, SDValue> CallInfo =3D
TLI.LowerCallTo(InChain, RetTy, isSigned, !isSigned, false, false,
0, TLI.getLibcallCallingConv(LC), /*isTailCall=3D*/fal=
se,
- /*isReturnValueUsed=3D*/true, Callee, Args, DAG, dl);
-
- // Legalize the call sequence, starting with the chain. This will advan=
ce
- // the LastCALLSEQ to the legalized version of the CALLSEQ_END node that
- // was added by LowerCallTo (guaranteeing proper serialization of calls).
- LegalizeOp(CallInfo.second);
+ /*doesNotReturn=3D*/false, /*isReturnValueUsed=3D*/tru=
e,
+ Callee, Args, DAG, dl);
=20
// Remainder is loaded back from the stack frame.
- SDValue Rem =3D DAG.getLoad(RetVT, dl, LastCALLSEQ_END, FIPtr,
- MachinePointerInfo(), false, false, 0);
+ SDValue Rem =3D DAG.getLoad(RetVT, dl, CallInfo.second, FIPtr,
+ MachinePointerInfo(), false, false, false, 0);
Results.push_back(CallInfo.first);
Results.push_back(Rem);
}
@@ -2489,7 +2049,7 @@
false, false, 0);
// load the constructed double
SDValue Load =3D DAG.getLoad(MVT::f64, dl, Store2, StackSlot,
- MachinePointerInfo(), false, false, 0);
+ MachinePointerInfo(), false, false, false, =
0);
// FP constant to bias correct the final result
SDValue Bias =3D DAG.getConstantFP(isSigned ?
BitsToDouble(0x4330000080000000ULL) :
@@ -2611,7 +2171,7 @@
// offset depending on the data type.
uint64_t FF;
switch (Op0.getValueType().getSimpleVT().SimpleTy) {
- default: assert(0 && "Unsupported integer type!");
+ default: llvm_unreachable("Unsupported integer type!");
case MVT::i8 : FF =3D 0x43800000ULL; break; // 2^8 (as a float)
case MVT::i16: FF =3D 0x47800000ULL; break; // 2^16 (as a float)
case MVT::i32: FF =3D 0x4F800000ULL; break; // 2^32 (as a float)
@@ -2629,13 +2189,15 @@
if (DestVT =3D=3D MVT::f32)
FudgeInReg =3D DAG.getLoad(MVT::f32, dl, DAG.getEntryNode(), CPIdx,
MachinePointerInfo::getConstantPool(),
- false, false, Alignment);
+ false, false, false, Alignment);
else {
- FudgeInReg =3D
- LegalizeOp(DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT,
- DAG.getEntryNode(), CPIdx,
- MachinePointerInfo::getConstantPool(),
- MVT::f32, false, false, Alignment));
+ SDValue Load =3D DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT,
+ DAG.getEntryNode(), CPIdx,
+ MachinePointerInfo::getConstantPool(),
+ MVT::f32, false, false, Alignment);
+ HandleSDNode Handle(Load);
+ LegalizeOp(Load.getNode());
+ FudgeInReg =3D Handle.getValue();
}
=20
return DAG.getNode(ISD::FADD, dl, DestVT, Tmp1, FudgeInReg);
@@ -2731,7 +2293,7 @@
EVT SHVT =3D TLI.getShiftAmountTy(VT);
SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8;
switch (VT.getSimpleVT().SimpleTy) {
- default: assert(0 && "Unhandled Expand type in BSWAP!");
+ default: llvm_unreachable("Unhandled Expand type in BSWAP!");
case MVT::i16:
Tmp2 =3D DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(8, SHVT));
Tmp1 =3D DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(8, SHVT));
@@ -2788,7 +2350,7 @@
SDValue SelectionDAGLegalize::ExpandBitCount(unsigned Opc, SDValue Op,
DebugLoc dl) {
switch (Opc) {
- default: assert(0 && "Cannot expand this yet!");
+ default: llvm_unreachable("Cannot expand this yet!");
case ISD::CTPOP: {
EVT VT =3D Op.getValueType();
EVT ShVT =3D TLI.getShiftAmountTy(VT);
@@ -2831,6 +2393,9 @@
=20
return Op;
}
+ case ISD::CTLZ_ZERO_UNDEF:
+ // This trivially expands to CTLZ.
+ return DAG.getNode(ISD::CTLZ, dl, Op.getValueType(), Op);
case ISD::CTLZ: {
// for now, we do this:
// x =3D x | (x >> 1);
@@ -2852,6 +2417,9 @@
Op =3D DAG.getNOT(dl, Op, VT);
return DAG.getNode(ISD::CTPOP, dl, VT, Op);
}
+ case ISD::CTTZ_ZERO_UNDEF:
+ // This trivially expands to CTTZ.
+ return DAG.getNode(ISD::CTTZ, dl, Op.getValueType(), Op);
case ISD::CTTZ: {
// for now, we use: { return popcount(~x & (x - 1)); }
// unless the target has ctlz but not ctpop, in which case we use:
@@ -2881,7 +2449,6 @@
switch (Opc) {
default:
llvm_unreachable("Unhandled atomic intrinsic Expand!");
- break;
case ISD::ATOMIC_SWAP:
switch (VT.SimpleTy) {
default: llvm_unreachable("Unexpected value type for atomic!");
@@ -2959,14 +2526,16 @@
return ExpandChainLibCall(LC, Node, false);
}
=20
-void SelectionDAGLegalize::ExpandNode(SDNode *Node,
- SmallVectorImpl<SDValue> &Results) {
+void SelectionDAGLegalize::ExpandNode(SDNode *Node) {
+ SmallVector<SDValue, 8> Results;
DebugLoc dl =3D Node->getDebugLoc();
SDValue Tmp1, Tmp2, Tmp3, Tmp4;
switch (Node->getOpcode()) {
case ISD::CTPOP:
case ISD::CTLZ:
+ case ISD::CTLZ_ZERO_UNDEF:
case ISD::CTTZ:
+ case ISD::CTTZ_ZERO_UNDEF:
Tmp1 =3D ExpandBitCount(Node->getOpcode(), Node->getOperand(0), dl);
Results.push_back(Tmp1);
break;
@@ -2986,7 +2555,6 @@
case ISD::PREFETCH:
case ISD::VAEND:
case ISD::EH_SJLJ_LONGJMP:
- case ISD::EH_SJLJ_DISPATCHSETUP:
// If the target didn't expand these, there's nothing to do, so just
// preserve the chain and be done.
Results.push_back(Node->getOperand(0));
@@ -3006,7 +2574,7 @@
TLI.LowerCallTo(Node->getOperand(0), Type::getVoidTy(*DAG.getContext=
()),
false, false, false, false, 0, CallingConv::C,
/*isTailCall=3D*/false,
- /*isReturnValueUsed=3D*/true,
+ /*doesNotReturn=3D*/false, /*isReturnValueUsed=3D*/t=
rue,
DAG.getExternalSymbol("__sync_synchronize",
TLI.getPointerTy()),
Args, DAG, dl);
@@ -3083,7 +2651,7 @@
TLI.LowerCallTo(Node->getOperand(0), Type::getVoidTy(*DAG.getContext=
()),
false, false, false, false, 0, CallingConv::C,
/*isTailCall=3D*/false,
- /*isReturnValueUsed=3D*/true,
+ /*doesNotReturn=3D*/false, /*isReturnValueUsed=3D*/t=
rue,
DAG.getExternalSymbol("abort", TLI.getPointerTy()),
Args, DAG, dl);
Results.push_back(CallResult.second);
@@ -3166,7 +2734,8 @@
unsigned Align =3D Node->getConstantOperandVal(3);
=20
SDValue VAListLoad =3D DAG.getLoad(TLI.getPointerTy(), dl, Tmp1, Tmp2,
- MachinePointerInfo(V), false, false, =
0);
+ MachinePointerInfo(V),=20
+ false, false, false, 0);
SDValue VAList =3D VAListLoad;
=20
if (Align > TLI.getMinStackArgumentAlignment()) {
@@ -3191,7 +2760,7 @@
MachinePointerInfo(V), false, false, 0);
// Load the actual argument out of the pointer VAList
Results.push_back(DAG.getLoad(VT, dl, Tmp3, VAList, MachinePointerInfo=
(),
- false, false, 0));
+ false, false, false, 0));
Results.push_back(Results[0].getValue(1));
break;
}
@@ -3202,7 +2771,7 @@
const Value *VS =3D cast<SrcValueSDNode>(Node->getOperand(4))->getValu=
e();
Tmp1 =3D DAG.getLoad(TLI.getPointerTy(), dl, Node->getOperand(0),
Node->getOperand(2), MachinePointerInfo(VS),
- false, false, 0);
+ false, false, false, 0);
Tmp1 =3D DAG.getStore(Tmp1.getValue(1), dl, Tmp1, Node->getOperand(1),
MachinePointerInfo(VD), false, false, 0);
Results.push_back(Tmp1);
@@ -3236,15 +2805,57 @@
Node->getOperand(2), dl));
break;
case ISD::VECTOR_SHUFFLE: {
- SmallVector<int, 8> Mask;
- cast<ShuffleVectorSDNode>(Node)->getMask(Mask);
+ SmallVector<int, 32> NewMask;
+ ArrayRef<int> Mask =3D cast<ShuffleVectorSDNode>(Node)->getMask();
=20
EVT VT =3D Node->getValueType(0);
EVT EltVT =3D VT.getVectorElementType();
- if (!TLI.isTypeLegal(EltVT))
- EltVT =3D TLI.getTypeToTransformTo(*DAG.getContext(), EltVT);
+ SDValue Op0 =3D Node->getOperand(0);
+ SDValue Op1 =3D Node->getOperand(1);
+ if (!TLI.isTypeLegal(EltVT)) {
+
+ EVT NewEltVT =3D TLI.getTypeToTransformTo(*DAG.getContext(), EltVT);
+
+ // BUILD_VECTOR operands are allowed to be wider than the element ty=
pe.
+ // But if NewEltVT is smaller that EltVT the BUILD_VECTOR does not a=
ccept it
+ if (NewEltVT.bitsLT(EltVT)) {
+
+ // Convert shuffle node.
+ // If original node was v4i64 and the new EltVT is i32,
+ // cast operands to v8i32 and re-build the mask.
+
+ // Calculate new VT, the size of the new VT should be equal to ori=
ginal.
+ EVT NewVT =3D EVT::getVectorVT(*DAG.getContext(), NewEltVT,=20
+ VT.getSizeInBits()/NewEltVT.getSizeI=
nBits());
+ assert(NewVT.bitsEq(VT));
+
+ // cast operands to new VT
+ Op0 =3D DAG.getNode(ISD::BITCAST, dl, NewVT, Op0);
+ Op1 =3D DAG.getNode(ISD::BITCAST, dl, NewVT, Op1);
+
+ // Convert the shuffle mask
+ unsigned int factor =3D NewVT.getVectorNumElements()/VT.getVectorN=
umElements();
+
+ // EltVT gets smaller
+ assert(factor > 0);
+
+ for (unsigned i =3D 0; i < VT.getVectorNumElements(); ++i) {
+ if (Mask[i] < 0) {
+ for (unsigned fi =3D 0; fi < factor; ++fi)
+ NewMask.push_back(Mask[i]);
+ }
+ else {
+ for (unsigned fi =3D 0; fi < factor; ++fi)
+ NewMask.push_back(Mask[i]*factor+fi);
+ }
+ }
+ Mask =3D NewMask;
+ VT =3D NewVT;
+ }
+ EltVT =3D NewEltVT;
+ }
unsigned NumElems =3D VT.getVectorNumElements();
- SmallVector<SDValue, 8> Ops;
+ SmallVector<SDValue, 16> Ops;
for (unsigned i =3D 0; i !=3D NumElems; ++i) {
if (Mask[i] < 0) {
Ops.push_back(DAG.getUNDEF(EltVT));
@@ -3253,14 +2864,17 @@
unsigned Idx =3D Mask[i];
if (Idx < NumElems)
Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
- Node->getOperand(0),
+ Op0,
DAG.getIntPtrConstant(Idx)));
else
Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
- Node->getOperand(1),
+ Op1,
DAG.getIntPtrConstant(Idx - NumElems)));
}
+
Tmp1 =3D DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], Ops.size());
+ // We may have changed the BUILD_VECTOR type. Cast it back to the Node=
type.
+ Tmp1 =3D DAG.getNode(ISD::BITCAST, dl, Node->getValueType(0), Tmp1);
Results.push_back(Tmp1);
break;
}
@@ -3408,10 +3022,8 @@
ConstantFPSDNode *CFP =3D cast<ConstantFPSDNode>(Node);
// Check to see if this FP immediate is already legal.
// If this is a legal constant, turn it into a TargetConstantFP node.
- if (TLI.isFPImmLegal(CFP->getValueAPF(), Node->getValueType(0)))
- Results.push_back(SDValue(Node, 0));
- else
- Results.push_back(ExpandConstantFP(CFP, true, DAG, TLI));
+ if (!TLI.isFPImmLegal(CFP->getValueAPF(), Node->getValueType(0)))
+ Results.push_back(ExpandConstantFP(CFP, true));
break;
}
case ISD::EHSELECTION: {
@@ -3423,13 +3035,23 @@
break;
}
case ISD::EXCEPTIONADDR: {
- unsigned Reg =3D TLI.getExceptionAddressRegister();
+ unsigned Reg =3D TLI.getExceptionPointerRegister();
assert(Reg && "Can't expand to unknown register!");
Results.push_back(DAG.getCopyFromReg(Node->getOperand(0), dl, Reg,
Node->getValueType(0)));
Results.push_back(Results[0].getValue(1));
break;
}
+ case ISD::FSUB: {
+ EVT VT =3D Node->getValueType(0);
+ assert(TLI.isOperationLegalOrCustom(ISD::FADD, VT) &&
+ TLI.isOperationLegalOrCustom(ISD::FNEG, VT) &&
+ "Don't know how to expand this FP subtraction!");
+ Tmp1 =3D DAG.getNode(ISD::FNEG, dl, VT, Node->getOperand(1));
+ Tmp1 =3D DAG.getNode(ISD::FADD, dl, VT, Node->getOperand(0), Tmp1);
+ Results.push_back(Tmp1);
+ break;
+ }
case ISD::SUB: {
EVT VT =3D Node->getValueType(0);
assert(TLI.isOperationLegalOrCustom(ISD::ADD, VT) &&
@@ -3657,6 +3279,10 @@
DAG.getIntPtrConstant(0));
TopHalf =3D DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT, Ret,
DAG.getIntPtrConstant(1));
+ // Ret is a node with an illegal type. Because such things are not
+ // generally permitted during this phase of legalization, delete the
+ // node. The above EXTRACT_ELEMENT nodes should have been folded.
+ DAG.DeleteNode(Ret.getNode());
}
=20
if (isSigned) {
@@ -3797,7 +3423,6 @@
=20
LegalizeSetCCCondCode(TLI.getSetCCResultType(Tmp2.getValueType()),
Tmp2, Tmp3, Tmp4, dl);
- LastCALLSEQ_END =3D DAG.getEntryNode();
=20
assert(!Tmp3.getNode() && "Can't legalize BR_CC with legal condition!"=
);
Tmp3 =3D DAG.getConstant(0, Tmp2.getValueType());
@@ -3807,6 +3432,35 @@
Results.push_back(Tmp1);
break;
}
+ case ISD::BUILD_VECTOR:
+ Results.push_back(ExpandBUILD_VECTOR(Node));
+ break;
+ case ISD::SRA:
+ case ISD::SRL:
+ case ISD::SHL: {
+ // Scalarize vector SRA/SRL/SHL.
+ EVT VT =3D Node->getValueType(0);
+ assert(VT.isVector() && "Unable to legalize non-vector shift");
+ assert(TLI.isTypeLegal(VT.getScalarType())&& "Element type must be leg=
al");
+ unsigned NumElem =3D VT.getVectorNumElements();
+
+ SmallVector<SDValue, 8> Scalars;
+ for (unsigned Idx =3D 0; Idx < NumElem; Idx++) {
+ SDValue Ex =3D DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
+ VT.getScalarType(),
+ Node->getOperand(0), DAG.getIntPtrConstant(=
Idx));
+ SDValue Sh =3D DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
+ VT.getScalarType(),
+ Node->getOperand(1), DAG.getIntPtrConstant(=
Idx));
+ Scalars.push_back(DAG.getNode(Node->getOpcode(), dl,
+ VT.getScalarType(), Ex, Sh));
+ }
+ SDValue Result =3D
+ DAG.getNode(ISD::BUILD_VECTOR, dl, Node->getValueType(0),
+ &Scalars[0], Scalars.size());
+ ReplaceNode(SDValue(Node, 0), Result);
+ break;
+ }
case ISD::GLOBAL_OFFSET_TABLE:
case ISD::GlobalAddress:
case ISD::GlobalTLSAddress:
@@ -3817,13 +3471,16 @@
case ISD::INTRINSIC_WO_CHAIN:
case ISD::INTRINSIC_VOID:
// FIXME: Custom lowering for these operations shouldn't return null!
- for (unsigned i =3D 0, e =3D Node->getNumValues(); i !=3D e; ++i)
- Results.push_back(SDValue(Node, i));
break;
}
+
+ // Replace the original node with the legalized result.
+ if (!Results.empty())
+ ReplaceNode(Node, Results.data());
}
-void SelectionDAGLegalize::PromoteNode(SDNode *Node,
- SmallVectorImpl<SDValue> &Results) {
+
+void SelectionDAGLegalize::PromoteNode(SDNode *Node) {
+ SmallVector<SDValue, 8> Results;
EVT OVT =3D Node->getValueType(0);
if (Node->getOpcode() =3D=3D ISD::UINT_TO_FP ||
Node->getOpcode() =3D=3D ISD::SINT_TO_FP ||
@@ -3835,20 +3492,24 @@
SDValue Tmp1, Tmp2, Tmp3;
switch (Node->getOpcode()) {
case ISD::CTTZ:
+ case ISD::CTTZ_ZERO_UNDEF:
case ISD::CTLZ:
+ case ISD::CTLZ_ZERO_UNDEF:
case ISD::CTPOP:
// Zero extend the argument.
Tmp1 =3D DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Node->getOperand(0));
- // Perform the larger operation.
+ // Perform the larger operation. For CTPOP and CTTZ_ZERO_UNDEF, this is
+ // already the correct result.
Tmp1 =3D DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1);
if (Node->getOpcode() =3D=3D ISD::CTTZ) {
- //if Tmp1 =3D=3D sizeinbits(NVT) then Tmp1 =3D sizeinbits(Old VT)
+ // FIXME: This should set a bit in the zero extended value instead.
Tmp2 =3D DAG.getSetCC(dl, TLI.getSetCCResultType(NVT),
Tmp1, DAG.getConstant(NVT.getSizeInBits(), NVT),
ISD::SETEQ);
Tmp1 =3D DAG.getNode(ISD::SELECT, dl, NVT, Tmp2,
DAG.getConstant(OVT.getSizeInBits(), NVT), Tmp1);
- } else if (Node->getOpcode() =3D=3D ISD::CTLZ) {
+ } else if (Node->getOpcode() =3D=3D ISD::CTLZ ||
+ Node->getOpcode() =3D=3D ISD::CTLZ_ZERO_UNDEF) {
// Tmp1 =3D Tmp1 - (sizeinbits(NVT) - sizeinbits(Old VT))
Tmp1 =3D DAG.getNode(ISD::SUB, dl, NVT, Tmp1,
DAG.getConstant(NVT.getSizeInBits() -
@@ -3877,6 +3538,33 @@
Node->getOpcode() =3D=3D ISD::SINT_TO_FP,=
dl);
Results.push_back(Tmp1);
break;
+ case ISD::VAARG: {
+ SDValue Chain =3D Node->getOperand(0); // Get the chain.
+ SDValue Ptr =3D Node->getOperand(1); // Get the pointer.
+
+ unsigned TruncOp;
+ if (OVT.isVector()) {
+ TruncOp =3D ISD::BITCAST;
+ } else {
+ assert(OVT.isInteger()
+ && "VAARG promotion is supported only for vectors or integer types=
");
+ TruncOp =3D ISD::TRUNCATE;
+ }
+
+ // Perform the larger operation, then convert back
+ Tmp1 =3D DAG.getVAArg(NVT, dl, Chain, Ptr, Node->getOperand(2),
+ Node->getConstantOperandVal(3));
+ Chain =3D Tmp1.getValue(1);
+
+ Tmp2 =3D DAG.getNode(TruncOp, dl, OVT, Tmp1);
+
+ // Modified the chain result - switch anything that used the old chain=
to
+ // use the new one.
+ DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 0), Tmp2);
+ DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 1), Chain);
+ ReplacedNode(Node);
+ break;
+ }
case ISD::AND:
case ISD::OR:
case ISD::XOR: {
@@ -3924,8 +3612,7 @@
break;
}
case ISD::VECTOR_SHUFFLE: {
- SmallVector<int, 8> Mask;
- cast<ShuffleVectorSDNode>(Node)->getMask(Mask);
+ ArrayRef<int> Mask =3D cast<ShuffleVectorSDNode>(Node)->getMask();
=20
// Cast the two input vectors.
Tmp1 =3D DAG.getNode(ISD::BITCAST, dl, NVT, Node->getOperand(0));
@@ -3950,7 +3637,31 @@
Tmp1, Tmp2, Node->getOperand(2)));
break;
}
+ case ISD::FDIV:
+ case ISD::FREM:
+ case ISD::FPOW: {
+ Tmp1 =3D DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
+ Tmp2 =3D DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(1));
+ Tmp3 =3D DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1, Tmp2);
+ Results.push_back(DAG.getNode(ISD::FP_ROUND, dl, OVT,
+ Tmp3, DAG.getIntPtrConstant(0)));
+ break;
}
+ case ISD::FLOG2:
+ case ISD::FEXP2:
+ case ISD::FLOG:
+ case ISD::FEXP: {
+ Tmp1 =3D DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
+ Tmp2 =3D DAG.getNode(Node->getOpcode(), dl, NVT, Tmp1);
+ Results.push_back(DAG.getNode(ISD::FP_ROUND, dl, OVT,
+ Tmp2, DAG.getIntPtrConstant(0)));
+ break;
+ }
+ }
+
+ // Replace the original node with the legalized result.
+ if (!Results.empty())
+ ReplaceNode(Node, Results.data());
}
=20
// SelectionDAG::Legalize - This is the entry point for the file.
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/LegalizeFloatTypes.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Tue=
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp Tue=
Apr 17 11:51:51 2012 +0300
@@ -479,8 +479,8 @@
if (L->getExtensionType() =3D=3D ISD::NON_EXTLOAD) {
NewL =3D DAG.getLoad(L->getAddressingMode(), L->getExtensionType(),
NVT, dl, L->getChain(), L->getBasePtr(), L->getOffs=
et(),
- L->getPointerInfo(), NVT,
- L->isVolatile(), L->isNonTemporal(), L->getAlignmen=
t());
+ L->getPointerInfo(), NVT, L->isVolatile(),=20
+ L->isNonTemporal(), false, L->getAlignment());
// Legalized the chain result - switch anything that used the old chai=
n to
// use the new one.
ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
@@ -492,7 +492,7 @@
L->getMemoryVT(), dl, L->getChain(),
L->getBasePtr(), L->getOffset(), L->getPointerInfo(),
L->getMemoryVT(), L->isVolatile(),
- L->isNonTemporal(), L->getAlignment());
+ L->isNonTemporal(), false, L->getAlignment());
// Legalized the chain result - switch anything that used the old chain =
to
// use the new one.
ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
@@ -672,7 +672,7 @@
case ISD::SETUEQ:
LC2 =3D (VT =3D=3D MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64;
break;
- default: assert(false && "Do not know how to soften this setcc!");
+ default: llvm_unreachable("Do not know how to soften this setcc!");
}
}
=20
@@ -1212,7 +1212,7 @@
=20
switch (SrcVT.getSimpleVT().SimpleTy) {
default:
- assert(false && "Unsupported UINT_TO_FP!");
+ llvm_unreachable("Unsupported UINT_TO_FP!");
case MVT::i32:
Parts =3D TwoE32;
break;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/LegalizeIntegerTypes.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp T=
ue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp T=
ue Apr 17 11:51:51 2012 +0300
@@ -20,7 +20,6 @@
=20
#include "LegalizeTypes.h"
#include "llvm/DerivedTypes.h"
-#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
@@ -57,8 +56,10 @@
case ISD::Constant: Res =3D PromoteIntRes_Constant(N); break;
case ISD::CONVERT_RNDSAT:
Res =3D PromoteIntRes_CONVERT_RNDSAT(N); break;
+ case ISD::CTLZ_ZERO_UNDEF:
case ISD::CTLZ: Res =3D PromoteIntRes_CTLZ(N); break;
case ISD::CTPOP: Res =3D PromoteIntRes_CTPOP(N); break;
+ case ISD::CTTZ_ZERO_UNDEF:
case ISD::CTTZ: Res =3D PromoteIntRes_CTTZ(N); break;
case ISD::EXTRACT_VECTOR_ELT:
Res =3D PromoteIntRes_EXTRACT_VECTOR_ELT(N); brea=
k;
@@ -211,13 +212,10 @@
DebugLoc dl =3D N->getDebugLoc();
=20
switch (getTypeAction(InVT)) {
- default:
- assert(false && "Unknown type action!");
- break;
case TargetLowering::TypeLegal:
break;
case TargetLowering::TypePromoteInteger:
- if (NOutVT.bitsEq(NInVT))
+ if (NOutVT.bitsEq(NInVT) && !NOutVT.isVector() && !NInVT.isVector())
// The input promotes to the same size. Convert the promoted value.
return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp=
));
break;
@@ -251,9 +249,11 @@
return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp);
}
case TargetLowering::TypeWidenVector:
- if (OutVT.bitsEq(NInVT))
- // The input is widened to the same size. Convert to the widened va=
lue.
- return DAG.getNode(ISD::BITCAST, dl, OutVT, GetWidenedVector(InOp));
+ // The input is widened to the same size. Convert to the widened value.
+ // Make sure that the outgoing value is not a vector, because this wou=
ld
+ // make us bitcast between two vectors which are legalized in differen=
t ways.
+ if (NOutVT.bitsEq(NInVT) && !NOutVT.isVector())
+ return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp));
}
=20
return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT,
@@ -312,7 +312,7 @@
DebugLoc dl =3D N->getDebugLoc();
EVT OVT =3D N->getValueType(0);
EVT NVT =3D Op.getValueType();
- Op =3D DAG.getNode(ISD::CTLZ, dl, NVT, Op);
+ Op =3D DAG.getNode(N->getOpcode(), dl, NVT, Op);
// Subtract off the extra leading bits in the bigger type.
return DAG.getNode(ISD::SUB, dl, NVT, Op,
DAG.getConstant(NVT.getSizeInBits() -
@@ -330,13 +330,15 @@
EVT OVT =3D N->getValueType(0);
EVT NVT =3D Op.getValueType();
DebugLoc dl =3D N->getDebugLoc();
- // The count is the same in the promoted type except if the original
- // value was zero. This can be handled by setting the bit just off
- // the top of the original type.
- APInt TopBit(NVT.getSizeInBits(), 0);
- TopBit.setBit(OVT.getSizeInBits());
- Op =3D DAG.getNode(ISD::OR, dl, NVT, Op, DAG.getConstant(TopBit, NVT));
- return DAG.getNode(ISD::CTTZ, dl, NVT, Op);
+ if (N->getOpcode() =3D=3D ISD::CTTZ) {
+ // The count is the same in the promoted type except if the original
+ // value was zero. This can be handled by setting the bit just off
+ // the top of the original type.
+ APInt TopBit(NVT.getSizeInBits(), 0);
+ TopBit.setBit(OVT.getSizeInBits());
+ Op =3D DAG.getNode(ISD::OR, dl, NVT, Op, DAG.getConstant(TopBit, NVT));
+ }
+ return DAG.getNode(N->getOpcode(), dl, NVT, Op);
}
=20
SDValue DAGTypeLegalizer::PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode *N) {
@@ -486,7 +488,11 @@
}
=20
SDValue DAGTypeLegalizer::PromoteIntRes_VSELECT(SDNode *N) {
- SDValue Mask =3D GetPromotedInteger(N->getOperand(0));
+ SDValue Mask =3D N->getOperand(0);
+ EVT OpTy =3D N->getOperand(1).getValueType();
+
+ // Promote all the way up to the canonical SetCC type.
+ Mask =3D PromoteTargetBoolean(Mask, TLI.getSetCCResultType(OpTy));
SDValue LHS =3D GetPromotedInteger(N->getOperand(1));
SDValue RHS =3D GetPromotedInteger(N->getOperand(2));
return DAG.getNode(ISD::VSELECT, N->getDebugLoc(),
@@ -1098,8 +1104,10 @@
case ISD::AssertZext: ExpandIntRes_AssertZext(N, Lo, Hi); break;
case ISD::BSWAP: ExpandIntRes_BSWAP(N, Lo, Hi); break;
case ISD::Constant: ExpandIntRes_Constant(N, Lo, Hi); break;
+ case ISD::CTLZ_ZERO_UNDEF:
case ISD::CTLZ: ExpandIntRes_CTLZ(N, Lo, Hi); break;
case ISD::CTPOP: ExpandIntRes_CTPOP(N, Lo, Hi); break;
+ case ISD::CTTZ_ZERO_UNDEF:
case ISD::CTTZ: ExpandIntRes_CTTZ(N, Lo, Hi); break;
case ISD::FP_TO_SINT: ExpandIntRes_FP_TO_SINT(N, Lo, Hi); break;
case ISD::FP_TO_UINT: ExpandIntRes_FP_TO_UINT(N, Lo, Hi); break;
@@ -1171,7 +1179,6 @@
switch (Opc) {
default:
llvm_unreachable("Unhandled atomic intrinsic Expand!");
- break;
case ISD::ATOMIC_SWAP:
switch (VT.SimpleTy) {
default: llvm_unreachable("Unexpected value type for atomic!");
@@ -1355,7 +1362,7 @@
=20
APInt HighBitMask =3D APInt::getHighBitsSet(ShBits, ShBits - Log2_32(NVT=
Bits));
APInt KnownZero, KnownOne;
- DAG.ComputeMaskedBits(N->getOperand(1), HighBitMask, KnownZero, KnownOne=
);
+ DAG.ComputeMaskedBits(N->getOperand(1), KnownZero, KnownOne);
=20
// If we don't know anything about the high bits, exit.
if (((KnownZero|KnownOne) & HighBitMask) =3D=3D 0)
@@ -1390,15 +1397,15 @@
}
}
=20
-#if 0
- // FIXME: This code is broken for shifts with a zero amount!
// If we know that all of the high bits of the shift amount are zero, th=
en we
// can do this as a couple of simple shifts.
if ((KnownZero & HighBitMask) =3D=3D HighBitMask) {
- // Compute 32-amt.
- SDValue Amt2 =3D DAG.getNode(ISD::SUB, ShTy,
- DAG.getConstant(NVTBits, ShTy),
- Amt);
+ // Calculate 31-x. 31 is used instead of 32 to avoid creating an undef=
ined
+ // shift if x is zero. We can use XOR here because x is known to be s=
maller
+ // than 32.
+ SDValue Amt2 =3D DAG.getNode(ISD::XOR, dl, ShTy, Amt,
+ DAG.getConstant(NVTBits-1, ShTy));
+
unsigned Op1, Op2;
switch (N->getOpcode()) {
default: llvm_unreachable("Unknown shift");
@@ -1407,13 +1414,23 @@
case ISD::SRA: Op1 =3D ISD::SRL; Op2 =3D ISD::SHL; break;
}
=20
- Lo =3D DAG.getNode(N->getOpcode(), NVT, InL, Amt);
- Hi =3D DAG.getNode(ISD::OR, NVT,
- DAG.getNode(Op1, NVT, InH, Amt),
- DAG.getNode(Op2, NVT, InL, Amt2));
+ // When shifting right the arithmetic for Lo and Hi is swapped.
+ if (N->getOpcode() !=3D ISD::SHL)
+ std::swap(InL, InH);
+
+ // Use a little trick to get the bits that move from Lo to Hi. First
+ // shift by one bit.
+ SDValue Sh1 =3D DAG.getNode(Op2, dl, NVT, InL, DAG.getConstant(1, ShTy=
));
+ // Then compute the remaining shift with amount-1.
+ SDValue Sh2 =3D DAG.getNode(Op2, dl, NVT, Sh1, Amt2);
+
+ Lo =3D DAG.getNode(N->getOpcode(), dl, NVT, InL, Amt);
+ Hi =3D DAG.getNode(ISD::OR, dl, NVT, DAG.getNode(Op1, dl, NVT, InH, Am=
t),Sh2);
+
+ if (N->getOpcode() !=3D ISD::SHL)
+ std::swap(Hi, Lo);
return true;
}
-#endif
=20
return false;
}
@@ -1493,8 +1510,6 @@
Hi =3D DAG.getNode(ISD::SELECT, dl, NVT, isShort, HiS, HiL);
return true;
}
-
- return false;
}
=20
void DAGTypeLegalizer::ExpandIntRes_ADDSUB(SDNode *N,
@@ -1702,8 +1717,8 @@
SDValue HiNotZero =3D DAG.getSetCC(dl, TLI.getSetCCResultType(NVT), Hi,
DAG.getConstant(0, NVT), ISD::SETNE);
=20
- SDValue LoLZ =3D DAG.getNode(ISD::CTLZ, dl, NVT, Lo);
- SDValue HiLZ =3D DAG.getNode(ISD::CTLZ, dl, NVT, Hi);
+ SDValue LoLZ =3D DAG.getNode(N->getOpcode(), dl, NVT, Lo);
+ SDValue HiLZ =3D DAG.getNode(ISD::CTLZ_ZERO_UNDEF, dl, NVT, Hi);
=20
Lo =3D DAG.getNode(ISD::SELECT, dl, NVT, HiNotZero, HiLZ,
DAG.getNode(ISD::ADD, dl, NVT, LoLZ,
@@ -1732,8 +1747,8 @@
SDValue LoNotZero =3D DAG.getSetCC(dl, TLI.getSetCCResultType(NVT), Lo,
DAG.getConstant(0, NVT), ISD::SETNE);
=20
- SDValue LoLZ =3D DAG.getNode(ISD::CTTZ, dl, NVT, Lo);
- SDValue HiLZ =3D DAG.getNode(ISD::CTTZ, dl, NVT, Hi);
+ SDValue LoLZ =3D DAG.getNode(ISD::CTTZ_ZERO_UNDEF, dl, NVT, Lo);
+ SDValue HiLZ =3D DAG.getNode(N->getOpcode(), dl, NVT, Hi);
=20
Lo =3D DAG.getNode(ISD::SELECT, dl, NVT, LoNotZero, LoLZ,
DAG.getNode(ISD::ADD, dl, NVT, HiLZ,
@@ -1778,6 +1793,7 @@
unsigned Alignment =3D N->getAlignment();
bool isVolatile =3D N->isVolatile();
bool isNonTemporal =3D N->isNonTemporal();
+ bool isInvariant =3D N->isInvariant();
DebugLoc dl =3D N->getDebugLoc();
=20
assert(NVT.isByteSized() && "Expanded type not byte sized!");
@@ -1808,7 +1824,7 @@
} else if (TLI.isLittleEndian()) {
// Little-endian - low bits are at low addresses.
Lo =3D DAG.getLoad(NVT, dl, Ch, Ptr, N->getPointerInfo(),
- isVolatile, isNonTemporal, Alignment);
+ isVolatile, isNonTemporal, isInvariant, Alignment);
=20
unsigned ExcessBits =3D
N->getMemoryVT().getSizeInBits() - NVT.getSizeInBits();
@@ -2305,12 +2321,14 @@
SDValue Func =3D DAG.getExternalSymbol(TLI.getLibcallName(LC), PtrVT);
std::pair<SDValue, SDValue> CallInfo =3D
TLI.LowerCallTo(Chain, RetTy, true, false, false, false,
- 0, TLI.getLibcallCallingConv(LC), false,
- true, Func, Args, DAG, dl);
+ 0, TLI.getLibcallCallingConv(LC),
+ /*isTailCall=3D*/false,
+ /*doesNotReturn=3D*/false, /*isReturnValueUsed=3D*/true,
+ Func, Args, DAG, dl);
=20
SplitInteger(CallInfo.first, Lo, Hi);
SDValue Temp2 =3D DAG.getLoad(PtrVT, dl, CallInfo.second, Temp,
- MachinePointerInfo(), false, false, 0);
+ MachinePointerInfo(), false, false, false, 0);
SDValue Ofl =3D DAG.getSetCC(dl, N->getValueType(1), Temp2,
DAG.getConstant(0, PtrVT),
ISD::SETNE);
@@ -2781,7 +2799,7 @@
else if (SrcVT =3D=3D MVT::i128)
FF =3D APInt(32, F32TwoE128);
else
- assert(false && "Unsupported UINT_TO_FP!");
+ llvm_unreachable("Unsupported UINT_TO_FP!");
=20
// Check whether the sign bit is set.
SDValue Lo, Hi;
@@ -2926,38 +2944,28 @@
SDValue DAGTypeLegalizer::PromoteIntRes_CONCAT_VECTORS(SDNode *N) {
DebugLoc dl =3D N->getDebugLoc();
=20
- SDValue Op0 =3D N->getOperand(1);
- SDValue Op1 =3D N->getOperand(1);
- assert(Op0.getValueType() =3D=3D Op1.getValueType() &&
- "Invalid input vector types");
-
EVT OutVT =3D N->getValueType(0);
EVT NOutVT =3D TLI.getTypeToTransformTo(*DAG.getContext(), OutVT);
assert(NOutVT.isVector() && "This type must be promoted to a vector type=
");
=20
+ EVT InElemTy =3D OutVT.getVectorElementType();
EVT OutElemTy =3D NOutVT.getVectorElementType();
=20
- unsigned NumElem0 =3D Op0.getValueType().getVectorNumElements();
- unsigned NumElem1 =3D Op1.getValueType().getVectorNumElements();
+ unsigned NumElem =3D N->getOperand(0).getValueType().getVectorNumElement=
s();
unsigned NumOutElem =3D NOutVT.getVectorNumElements();
- assert(NumElem0 + NumElem1 =3D=3D NumOutElem &&
- "Invalid number of incoming elements");
+ unsigned NumOperands =3D N->getNumOperands();
+ assert(NumElem * NumOperands =3D=3D NumOutElem &&
+ "Unexpected number of elements");
=20
// Take the elements from the first vector.
SmallVector<SDValue, 8> Ops(NumOutElem);
- for (unsigned i =3D 0; i < NumElem0; ++i) {
- SDValue Ext =3D DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
- Op0.getValueType().getScalarType(), Op0,
- DAG.getIntPtrConstant(i));
- Ops[i] =3D DAG.getNode(ISD::ANY_EXTEND, dl, OutElemTy, Ext);
- }
-
- // Take the elements from the second vector
- for (unsigned i =3D 0; i < NumElem1; ++i) {
- SDValue Ext =3D DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
- Op1.getValueType().getScalarType(), Op1,
- DAG.getIntPtrConstant(i));
- Ops[i + NumElem0] =3D DAG.getNode(ISD::ANY_EXTEND, dl, OutElemTy, Ext);
+ for (unsigned i =3D 0; i < NumOperands; ++i) {
+ SDValue Op =3D N->getOperand(i);
+ for (unsigned j =3D 0; j < NumElem; ++j) {
+ SDValue Ext =3D DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
+ InElemTy, Op, DAG.getIntPtrConstant(j));
+ Ops[i * NumElem + j] =3D DAG.getNode(ISD::ANY_EXTEND, dl, OutElemTy,=
Ext);
+ }
}
=20
return DAG.getNode(ISD::BUILD_VECTOR, dl, NOutVT, &Ops[0], Ops.size());
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/LegalizeTypes.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Tue Apr =
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Tue Apr =
17 11:51:51 2012 +0300
@@ -222,8 +222,6 @@
for (unsigned i =3D 0, NumResults =3D N->getNumValues(); i < NumResult=
s; ++i) {
EVT ResultVT =3D N->getValueType(i);
switch (getTypeAction(ResultVT)) {
- default:
- assert(false && "Unknown action!");
case TargetLowering::TypeLegal:
break;
// The following calls must take care of *all* of the node's results,
@@ -275,8 +273,6 @@
=20
EVT OpVT =3D N->getOperand(i).getValueType();
switch (getTypeAction(OpVT)) {
- default:
- assert(false && "Unknown action!");
case TargetLowering::TypeLegal:
continue;
// The following calls must either replace all of the node's results
@@ -752,7 +748,11 @@
}
=20
void DAGTypeLegalizer::SetScalarizedVector(SDValue Op, SDValue Result) {
- assert(Result.getValueType() =3D=3D Op.getValueType().getVectorElementTy=
pe() &&
+ // Note that in some cases vector operation operands may be greater than
+ // the vector element type. For example BUILD_VECTOR of type <1 x i1> wi=
th
+ // a constant i8 operand.
+ assert(Result.getValueType().getSizeInBits() >=3D
+ Op.getValueType().getVectorElementType().getSizeInBits() &&
"Invalid type for scalarized vector");
AnalyzeNewValue(Result);
=20
@@ -889,7 +889,7 @@
MachinePointerInfo(), false, false, 0);
// Result is a load from the stack slot.
return DAG.getLoad(DestVT, dl, Store, StackPtr, MachinePointerInfo(),
- false, false, 0);
+ false, false, false, 0);
}
=20
/// CustomLowerNode - Replace the node's results with custom code provided
@@ -1056,8 +1056,9 @@
Type *RetTy =3D RetVT.getTypeForEVT(*DAG.getContext());
std::pair<SDValue,SDValue> CallInfo =3D
TLI.LowerCallTo(DAG.getEntryNode(), RetTy, isSigned, !isSigned, false,
- false, 0, TLI.getLibcallCallingConv(LC), false,
- /*isReturnValueUsed=3D*/true,
+ false, 0, TLI.getLibcallCallingConv(LC),
+ /*isTailCall=3D*/false,
+ /*doesNotReturn=3D*/false, /*isReturnValueUsed=3D*/tru=
e,
Callee, Args, DAG, dl);
return CallInfo.first;
}
@@ -1084,12 +1085,11 @@
SDValue Callee =3D DAG.getExternalSymbol(TLI.getLibcallName(LC),
TLI.getPointerTy());
=20
- // Splice the libcall in wherever FindInputOutputChains tells us to.
Type *RetTy =3D Node->getValueType(0).getTypeForEVT(*DAG.getContext());
std::pair<SDValue, SDValue> CallInfo =3D
TLI.LowerCallTo(InChain, RetTy, isSigned, !isSigned, false, false,
0, TLI.getLibcallCallingConv(LC), /*isTailCall=3D*/fal=
se,
- /*isReturnValueUsed=3D*/true,
+ /*doesNotReturn=3D*/false, /*isReturnValueUsed=3D*/tru=
e,
Callee, Args, DAG, Node->getDebugLoc());
=20
return CallInfo;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/LegalizeTypes.h
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h Tue Apr 17=
11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h Tue Apr 17=
11:51:51 2012 +0300
@@ -521,6 +521,7 @@
SDValue ScalarizeVecRes_LOAD(LoadSDNode *N);
SDValue ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N);
SDValue ScalarizeVecRes_SIGN_EXTEND_INREG(SDNode *N);
+ SDValue ScalarizeVecRes_VSELECT(SDNode *N);
SDValue ScalarizeVecRes_SELECT(SDNode *N);
SDValue ScalarizeVecRes_SELECT_CC(SDNode *N);
SDValue ScalarizeVecRes_SETCC(SDNode *N);
@@ -633,6 +634,7 @@
SDValue WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
SDValue WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N);
SDValue WidenVecOp_STORE(SDNode* N);
+ SDValue WidenVecOp_SETCC(SDNode* N);
=20
SDValue WidenVecOp_Convert(SDNode *N);
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/LegalizeTypesGeneric.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp T=
ue Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp T=
ue Apr 17 11:51:51 2012 +0300
@@ -21,7 +21,6 @@
=20
#include "LegalizeTypes.h"
#include "llvm/Target/TargetData.h"
-#include "llvm/CodeGen/PseudoSourceValue.h"
using namespace llvm;
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -46,8 +45,6 @@
=20
// Handle some special cases efficiently.
switch (getTypeAction(InVT)) {
- default:
- assert(false && "Unknown type action!");
case TargetLowering::TypeLegal:
case TargetLowering::TypePromoteInteger:
break;
@@ -130,7 +127,8 @@
false, false, 0);
=20
// Load the first half from the stack slot.
- Lo =3D DAG.getLoad(NOutVT, dl, Store, StackPtr, PtrInfo, false, false, 0=
);
+ Lo =3D DAG.getLoad(NOutVT, dl, Store, StackPtr, PtrInfo,=20
+ false, false, false, 0);
=20
// Increment the pointer to the other half.
unsigned IncrementSize =3D NOutVT.getSizeInBits() / 8;
@@ -140,7 +138,7 @@
// Load the second half from the stack slot.
Hi =3D DAG.getLoad(NOutVT, dl, Store, StackPtr,
PtrInfo.getWithOffset(IncrementSize), false,
- false, MinAlign(Alignment, IncrementSize));
+ false, false, MinAlign(Alignment, IncrementSize));
=20
// Handle endianness of the load.
if (TLI.isBigEndian())
@@ -212,11 +210,12 @@
unsigned Alignment =3D LD->getAlignment();
bool isVolatile =3D LD->isVolatile();
bool isNonTemporal =3D LD->isNonTemporal();
+ bool isInvariant =3D LD->isInvariant();
=20
assert(NVT.isByteSized() && "Expanded type not byte sized!");
=20
Lo =3D DAG.getLoad(NVT, dl, Chain, Ptr, LD->getPointerInfo(),
- isVolatile, isNonTemporal, Alignment);
+ isVolatile, isNonTemporal, isInvariant, Alignment);
=20
// Increment the pointer to the other half.
unsigned IncrementSize =3D NVT.getSizeInBits() / 8;
@@ -224,7 +223,7 @@
DAG.getIntPtrConstant(IncrementSize));
Hi =3D DAG.getLoad(NVT, dl, Chain, Ptr,
LD->getPointerInfo().getWithOffset(IncrementSize),
- isVolatile, isNonTemporal,
+ isVolatile, isNonTemporal, isInvariant,
MinAlign(Alignment, IncrementSize));
=20
// Build a factor node to remember that this load is independent of the
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/LegalizeVectorOps.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp Tue =
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp Tue =
Apr 17 11:51:51 2012 +0300
@@ -64,6 +64,8 @@
// Implement vselect in terms of XOR, AND, OR when blend is not supported
// by the target.
SDValue ExpandVSELECT(SDValue Op);
+ SDValue ExpandLoad(SDValue Op);
+ SDValue ExpandStore(SDValue Op);
SDValue ExpandFNEG(SDValue Op);
// Implements vector promotion; this is essentially just bitcasting the
// operands to a different type and bitcasting the result back to the
@@ -124,6 +126,33 @@
SDValue Result =3D
SDValue(DAG.UpdateNodeOperands(Op.getNode(), Ops.data(), Ops.size()), =
0);
=20
+ if (Op.getOpcode() =3D=3D ISD::LOAD) {
+ LoadSDNode *LD =3D cast<LoadSDNode>(Op.getNode());
+ ISD::LoadExtType ExtType =3D LD->getExtensionType();
+ if (LD->getMemoryVT().isVector() && ExtType !=3D ISD::NON_EXTLOAD) {
+ if (TLI.isLoadExtLegal(LD->getExtensionType(), LD->getMemoryVT()))
+ return TranslateLegalizeResults(Op, Result);
+ Changed =3D true;
+ return LegalizeOp(ExpandLoad(Op));
+ }
+ } else if (Op.getOpcode() =3D=3D ISD::STORE) {
+ StoreSDNode *ST =3D cast<StoreSDNode>(Op.getNode());
+ EVT StVT =3D ST->getMemoryVT();
+ EVT ValVT =3D ST->getValue().getValueType();
+ if (StVT.isVector() && ST->isTruncatingStore())
+ switch (TLI.getTruncStoreAction(ValVT, StVT)) {
+ default: llvm_unreachable("This action is not supported yet!");
+ case TargetLowering::Legal:
+ return TranslateLegalizeResults(Op, Result);
+ case TargetLowering::Custom:
+ Changed =3D true;
+ return LegalizeOp(TLI.LowerOperation(Result, DAG));
+ case TargetLowering::Expand:
+ Changed =3D true;
+ return LegalizeOp(ExpandStore(Op));
+ }
+ }
+
bool HasVectorValue =3D false;
for (SDNode::value_iterator J =3D Node->value_begin(), E =3D Node->value=
_end();
J !=3D E;
@@ -156,8 +185,10 @@
case ISD::SRL:
case ISD::ROTL:
case ISD::ROTR:
+ case ISD::CTLZ:
case ISD::CTTZ:
- case ISD::CTLZ:
+ case ISD::CTLZ_ZERO_UNDEF:
+ case ISD::CTTZ_ZERO_UNDEF:
case ISD::CTPOP:
case ISD::SELECT:
case ISD::VSELECT:
@@ -262,6 +293,97 @@
return DAG.getNode(ISD::BITCAST, dl, VT, Op);
}
=20
+
+SDValue VectorLegalizer::ExpandLoad(SDValue Op) {
+ DebugLoc dl =3D Op.getDebugLoc();
+ LoadSDNode *LD =3D cast<LoadSDNode>(Op.getNode());
+ SDValue Chain =3D LD->getChain();
+ SDValue BasePTR =3D LD->getBasePtr();
+ EVT SrcVT =3D LD->getMemoryVT();
+ ISD::LoadExtType ExtType =3D LD->getExtensionType();
+
+ SmallVector<SDValue, 8> LoadVals;
+ SmallVector<SDValue, 8> LoadChains;
+ unsigned NumElem =3D SrcVT.getVectorNumElements();
+ unsigned Stride =3D SrcVT.getScalarType().getSizeInBits()/8;
+
+ for (unsigned Idx=3D0; Idx<NumElem; Idx++) {
+ SDValue ScalarLoad =3D DAG.getExtLoad(ExtType, dl,
+ Op.getNode()->getValueType(0).getScalarType(),
+ Chain, BasePTR, LD->getPointerInfo().getWithOffset(Idx * Str=
ide),
+ SrcVT.getScalarType(),
+ LD->isVolatile(), LD->isNonTemporal(),
+ LD->getAlignment());
+
+ BasePTR =3D DAG.getNode(ISD::ADD, dl, BasePTR.getValueType(), BasePTR,
+ DAG.getIntPtrConstant(Stride));
+
+ LoadVals.push_back(ScalarLoad.getValue(0));
+ LoadChains.push_back(ScalarLoad.getValue(1));
+ }
+
+ SDValue NewChain =3D DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
+ &LoadChains[0], LoadChains.size());
+ SDValue Value =3D DAG.getNode(ISD::BUILD_VECTOR, dl,
+ Op.getNode()->getValueType(0), &LoadVals[0], LoadVals.size());
+
+ AddLegalizedOperand(Op.getValue(0), Value);
+ AddLegalizedOperand(Op.getValue(1), NewChain);
+
+ return (Op.getResNo() ? NewChain : Value);
+}
+
+SDValue VectorLegalizer::ExpandStore(SDValue Op) {
+ DebugLoc dl =3D Op.getDebugLoc();
+ StoreSDNode *ST =3D cast<StoreSDNode>(Op.getNode());
+ SDValue Chain =3D ST->getChain();
+ SDValue BasePTR =3D ST->getBasePtr();
+ SDValue Value =3D ST->getValue();
+ EVT StVT =3D ST->getMemoryVT();
+
+ unsigned Alignment =3D ST->getAlignment();
+ bool isVolatile =3D ST->isVolatile();
+ bool isNonTemporal =3D ST->isNonTemporal();
+
+ unsigned NumElem =3D StVT.getVectorNumElements();
+ // The type of the data we want to save
+ EVT RegVT =3D Value.getValueType();
+ EVT RegSclVT =3D RegVT.getScalarType();
+ // The type of data as saved in memory.
+ EVT MemSclVT =3D StVT.getScalarType();
+
+ // Cast floats into integers
+ unsigned ScalarSize =3D MemSclVT.getSizeInBits();
+
+ // Round odd types to the next pow of two.
+ if (!isPowerOf2_32(ScalarSize))
+ ScalarSize =3D NextPowerOf2(ScalarSize);
+
+ // Store Stride in bytes
+ unsigned Stride =3D ScalarSize/8;
+ // Extract each of the elements from the original vector
+ // and save them into memory individually.
+ SmallVector<SDValue, 8> Stores;
+ for (unsigned Idx =3D 0; Idx < NumElem; Idx++) {
+ SDValue Ex =3D DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
+ RegSclVT, Value, DAG.getIntPtrConstant(Idx));
+
+ // This scalar TruncStore may be illegal, but we legalize it later.
+ SDValue Store =3D DAG.getTruncStore(Chain, dl, Ex, BasePTR,
+ ST->getPointerInfo().getWithOffset(Idx*Stride), MemSclVT,
+ isVolatile, isNonTemporal, Alignment);
+
+ BasePTR =3D DAG.getNode(ISD::ADD, dl, BasePTR.getValueType(), BasePTR,
+ DAG.getIntPtrConstant(Stride));
+
+ Stores.push_back(Store);
+ }
+ SDValue TF =3D DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
+ &Stores[0], Stores.size());
+ AddLegalizedOperand(Op, TF);
+ return TF;
+}
+
SDValue VectorLegalizer::ExpandVSELECT(SDValue Op) {
// Implement VSELECT in terms of XOR, AND, OR
// on platforms which do not support blend natively.
@@ -274,10 +396,12 @@
=20
// If we can't even use the basic vector operations of
// AND,OR,XOR, we will have to scalarize the op.
- if (!TLI.isOperationLegalOrCustom(ISD::AND, VT) ||
- !TLI.isOperationLegalOrCustom(ISD::XOR, VT) ||
- !TLI.isOperationLegalOrCustom(ISD::OR, VT))
- return DAG.UnrollVectorOp(Op.getNode());
+ // Notice that the operation may be 'promoted' which means that it is
+ // 'bitcasted' to another type which is handled.
+ if (TLI.getOperationAction(ISD::AND, VT) =3D=3D TargetLowering::Expand ||
+ TLI.getOperationAction(ISD::XOR, VT) =3D=3D TargetLowering::Expand ||
+ TLI.getOperationAction(ISD::OR, VT) =3D=3D TargetLowering::Expand)
+ return DAG.UnrollVectorOp(Op.getNode());
=20
assert(VT.getSizeInBits() =3D=3D Op.getOperand(1).getValueType().getSize=
InBits()
&& "Invalid mask size");
@@ -301,9 +425,9 @@
DebugLoc DL =3D Op.getDebugLoc();
=20
// Make sure that the SINT_TO_FP and SRL instructions are available.
- if (!TLI.isOperationLegalOrCustom(ISD::SINT_TO_FP, VT) ||
- !TLI.isOperationLegalOrCustom(ISD::SRL, VT))
- return DAG.UnrollVectorOp(Op.getNode());
+ if (TLI.getOperationAction(ISD::SINT_TO_FP, VT) =3D=3D TargetLowering::E=
xpand ||
+ TLI.getOperationAction(ISD::SRL, VT) =3D=3D TargetLowering::E=
xpand)
+ return DAG.UnrollVectorOp(Op.getNode());
=20
EVT SVT =3D VT.getScalarType();
assert((SVT.getSizeInBits() =3D=3D 64 || SVT.getSizeInBits() =3D=3D 32) =
&&
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/LegalizeVectorTypes.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Tu=
e Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Tu=
e Apr 17 11:51:51 2012 +0300
@@ -21,7 +21,6 @@
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
#include "LegalizeTypes.h"
-#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
@@ -59,6 +58,7 @@
case ISD::LOAD: R =3D ScalarizeVecRes_LOAD(cast<LoadSDNode>(N)=
);break;
case ISD::SCALAR_TO_VECTOR: R =3D ScalarizeVecRes_SCALAR_TO_VECTOR(N); =
break;
case ISD::SIGN_EXTEND_INREG: R =3D ScalarizeVecRes_InregOp(N); break;
+ case ISD::VSELECT: R =3D ScalarizeVecRes_VSELECT(N); break;
case ISD::SELECT: R =3D ScalarizeVecRes_SELECT(N); break;
case ISD::SELECT_CC: R =3D ScalarizeVecRes_SELECT_CC(N); break;
case ISD::SETCC: R =3D ScalarizeVecRes_SETCC(N); break;
@@ -194,7 +194,7 @@
N->getPointerInfo(),
N->getMemoryVT().getVectorElementType(),
N->isVolatile(), N->isNonTemporal(),
- N->getOriginalAlignment());
+ N->isInvariant(), N->getOriginalAlignment()=
);
=20
// Legalized the chain result - switch anything that used the old chain =
to
// use the new one.
@@ -227,6 +227,37 @@
return InOp;
}
=20
+SDValue DAGTypeLegalizer::ScalarizeVecRes_VSELECT(SDNode *N) {
+ SDValue Cond =3D GetScalarizedVector(N->getOperand(0));
+ SDValue LHS =3D GetScalarizedVector(N->getOperand(1));
+ TargetLowering::BooleanContent ScalarBool =3D TLI.getBooleanContents(fal=
se);
+ TargetLowering::BooleanContent VecBool =3D TLI.getBooleanContents(true);
+ if (ScalarBool !=3D VecBool) {
+ EVT CondVT =3D Cond.getValueType();
+ switch (ScalarBool) {
+ case TargetLowering::UndefinedBooleanContent:
+ break;
+ case TargetLowering::ZeroOrOneBooleanContent:
+ assert(VecBool =3D=3D TargetLowering::UndefinedBooleanContent ||
+ VecBool =3D=3D TargetLowering::ZeroOrNegativeOneBooleanCont=
ent);
+ // Vector read from all ones, scalar expects a single 1 so mask.
+ Cond =3D DAG.getNode(ISD::AND, N->getDebugLoc(), CondVT,
+ Cond, DAG.getConstant(1, CondVT));
+ break;
+ case TargetLowering::ZeroOrNegativeOneBooleanContent:
+ assert(VecBool =3D=3D TargetLowering::UndefinedBooleanContent ||
+ VecBool =3D=3D TargetLowering::ZeroOrOneBooleanContent);
+ // Vector reads from a one, scalar from all ones so sign extend.
+ Cond =3D DAG.getNode(ISD::SIGN_EXTEND_INREG, N->getDebugLoc(), Con=
dVT,
+ Cond, DAG.getValueType(MVT::i1));
+ break;
+ }
+ }
+ return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
+ LHS.getValueType(), Cond, LHS,
+ GetScalarizedVector(N->getOperand(2)));
+}
+
SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
SDValue LHS =3D GetScalarizedVector(N->getOperand(1));
return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
@@ -405,6 +436,10 @@
N->dump(&DAG);
dbgs() << "\n");
SDValue Lo, Hi;
+ =20
+ // See if the target wants to custom expand this node.
+ if (CustomLowerNode(N, N->getValueType(ResNo), true))
+ return;
=20
switch (N->getOpcode()) {
default:
@@ -442,8 +477,10 @@
case ISD::ANY_EXTEND:
case ISD::CONVERT_RNDSAT:
case ISD::CTLZ:
+ case ISD::CTTZ:
+ case ISD::CTLZ_ZERO_UNDEF:
+ case ISD::CTTZ_ZERO_UNDEF:
case ISD::CTPOP:
- case ISD::CTTZ:
case ISD::FABS:
case ISD::FCEIL:
case ISD::FCOS:
@@ -677,7 +714,7 @@
=20
// Load the Lo part from the stack slot.
Lo =3D DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointe=
rInfo(),
- false, false, 0);
+ false, false, false, 0);
=20
// Increment the pointer to the other part.
unsigned IncrementSize =3D Lo.getValueType().getSizeInBits() / 8;
@@ -686,7 +723,7 @@
=20
// Load the Hi part from the stack slot.
Hi =3D DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointe=
rInfo(),
- false, false, MinAlign(Alignment, IncrementSize));
+ false, false, false, MinAlign(Alignment, IncrementSize)=
);
}
=20
void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
@@ -713,20 +750,21 @@
unsigned Alignment =3D LD->getOriginalAlignment();
bool isVolatile =3D LD->isVolatile();
bool isNonTemporal =3D LD->isNonTemporal();
+ bool isInvariant =3D LD->isInvariant();
=20
EVT LoMemVT, HiMemVT;
GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
=20
Lo =3D DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
LD->getPointerInfo(), LoMemVT, isVolatile, isNonTempora=
l,
- Alignment);
+ isInvariant, Alignment);
=20
unsigned IncrementSize =3D LoMemVT.getSizeInBits()/8;
Ptr =3D DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
DAG.getIntPtrConstant(IncrementSize));
Hi =3D DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
LD->getPointerInfo().getWithOffset(IncrementSize),
- HiMemVT, isVolatile, isNonTemporal, Alignment);
+ HiMemVT, isVolatile, isNonTemporal, isInvariant, Alignm=
ent);
=20
// Build a factor node to remember that this load is independent of the
// other one.
@@ -773,46 +811,18 @@
DebugLoc dl =3D N->getDebugLoc();
GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
=20
- // Split the input.
+ // If the input also splits, handle it directly for a compile time speed=
up.
+ // Otherwise split it by hand.
EVT InVT =3D N->getOperand(0).getValueType();
- switch (getTypeAction(InVT)) {
- default: llvm_unreachable("Unexpected type action!");
- case TargetLowering::TypeLegal: {
+ if (getTypeAction(InVT) =3D=3D TargetLowering::TypeSplitVector) {
+ GetSplitVector(N->getOperand(0), Lo, Hi);
+ } else {
EVT InNVT =3D EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElemen=
tType(),
LoVT.getVectorNumElements());
Lo =3D DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
DAG.getIntPtrConstant(0));
Hi =3D DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
- break;
- }
- case TargetLowering::TypePromoteInteger: {
- SDValue InOp =3D GetPromotedInteger(N->getOperand(0));
- EVT InNVT =3D EVT::getVectorVT(*DAG.getContext(),
- InOp.getValueType().getVectorElementType(=
),
- LoVT.getVectorNumElements());
- Lo =3D DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
- DAG.getIntPtrConstant(0));
- Hi =3D DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
- DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
- break;
- }
- case TargetLowering::TypeSplitVector:
- GetSplitVector(N->getOperand(0), Lo, Hi);
- break;
- case TargetLowering::TypeWidenVector: {
- // If the result needs to be split and the input needs to be widened,
- // the two types must have different lengths. Use the widened result
- // and extract from it to do the split.
- SDValue InOp =3D GetWidenedVector(N->getOperand(0));
- EVT InNVT =3D EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElemen=
tType(),
- LoVT.getVectorNumElements());
- Lo =3D DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
- DAG.getIntPtrConstant(0));
- Hi =3D DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
- DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
- break;
- }
}
=20
if (N->getOpcode() =3D=3D ISD::FP_ROUND) {
@@ -1239,6 +1249,7 @@
case ISD::LOAD: Res =3D WidenVecRes_LOAD(N); break;
case ISD::SCALAR_TO_VECTOR: Res =3D WidenVecRes_SCALAR_TO_VECTOR(N); br=
eak;
case ISD::SIGN_EXTEND_INREG: Res =3D WidenVecRes_InregOp(N); break;
+ case ISD::VSELECT:
case ISD::SELECT: Res =3D WidenVecRes_SELECT(N); break;
case ISD::SELECT_CC: Res =3D WidenVecRes_SELECT_CC(N); break;
case ISD::SETCC: Res =3D WidenVecRes_SETCC(N); break;
@@ -1590,12 +1601,15 @@
DebugLoc dl =3D N->getDebugLoc();
=20
switch (getTypeAction(InVT)) {
- default:
- assert(false && "Unknown type action!");
- break;
case TargetLowering::TypeLegal:
break;
case TargetLowering::TypePromoteInteger:
+ // If the incoming type is a vector that is being promoted, then
+ // we know that the elements are arranged differently and that we
+ // must perform the conversion using a stack slot.
+ if (InVT.isVector())
+ break;
+
// If the InOp is promoted to the same size, convert it. Otherwise,
// fall out of the switch and widen the promoted input.
InOp =3D GetPromotedInteger(InOp);
@@ -1928,7 +1942,7 @@
SDValue InOp1 =3D GetWidenedVector(N->getOperand(1));
SDValue InOp2 =3D GetWidenedVector(N->getOperand(2));
assert(InOp1.getValueType() =3D=3D WidenVT && InOp2.getValueType() =3D=
=3D WidenVT);
- return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
+ return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
WidenVT, Cond1, InOp1, InOp2);
}
=20
@@ -2032,6 +2046,7 @@
case ISD::EXTRACT_SUBVECTOR: Res =3D WidenVecOp_EXTRACT_SUBVECTOR(N); b=
reak;
case ISD::EXTRACT_VECTOR_ELT: Res =3D WidenVecOp_EXTRACT_VECTOR_ELT(N); =
break;
case ISD::STORE: Res =3D WidenVecOp_STORE(N); break;
+ case ISD::SETCC: Res =3D WidenVecOp_SETCC(N); break;
=20
case ISD::FP_EXTEND:
case ISD::FP_TO_SINT:
@@ -2165,6 +2180,32 @@
MVT::Other,&StChain[0],StChain.size());
}
=20
+SDValue DAGTypeLegalizer::WidenVecOp_SETCC(SDNode *N) {
+ SDValue InOp0 =3D GetWidenedVector(N->getOperand(0));
+ SDValue InOp1 =3D GetWidenedVector(N->getOperand(1));
+ DebugLoc dl =3D N->getDebugLoc();
+
+ // WARNING: In this code we widen the compare instruction with garbage.
+ // This garbage may contain denormal floats which may be slow. Is this a=
real
+ // concern ? Should we zero the unused lanes if this is a float compare ?
+
+ // Get a new SETCC node to compare the newly widened operands.
+ // Only some of the compared elements are legal.
+ EVT SVT =3D TLI.getSetCCResultType(InOp0.getValueType());
+ SDValue WideSETCC =3D DAG.getNode(ISD::SETCC, N->getDebugLoc(),
+ SVT, InOp0, InOp1, N->getOperand(2));
+
+ // Extract the needed results from the result vector.
+ EVT ResVT =3D EVT::getVectorVT(*DAG.getContext(),
+ SVT.getVectorElementType(),
+ N->getValueType(0).getVectorNumElements());
+ SDValue CC =3D DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl,
+ ResVT, WideSETCC, DAG.getIntPtrConstant(0));
+
+ return PromoteTargetBoolean(CC, N->getValueType(0));=20
+}
+
+
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// Vector Widening Utilities
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -2276,6 +2317,7 @@
unsigned Align =3D LD->getAlignment();
bool isVolatile =3D LD->isVolatile();
bool isNonTemporal =3D LD->isNonTemporal();
+ bool isInvariant =3D LD->isInvariant();
=20
int LdWidth =3D LdVT.getSizeInBits();
int WidthDiff =3D WidenWidth - LdWidth; // Difference
@@ -2285,7 +2327,7 @@
EVT NewVT =3D FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff=
);
int NewVTWidth =3D NewVT.getSizeInBits();
SDValue LdOp =3D DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerIn=
fo(),
- isVolatile, isNonTemporal, Align);
+ isVolatile, isNonTemporal, isInvariant, Align=
);
LdChain.push_back(LdOp.getValue(1));
=20
// Check if we can load the element with one instruction
@@ -2323,18 +2365,37 @@
BasePtr =3D DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
DAG.getIntPtrConstant(Increment));
=20
+ SDValue L;
if (LdWidth < NewVTWidth) {
// Our current type we are using is too large, find a better size
NewVT =3D FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff=
);
NewVTWidth =3D NewVT.getSizeInBits();
+ L =3D DAG.getLoad(NewVT, dl, Chain, BasePtr,
+ LD->getPointerInfo().getWithOffset(Offset),
+ isVolatile,
+ isNonTemporal, isInvariant,
+ MinAlign(Align, Increment));
+ LdChain.push_back(L.getValue(1));
+ if (L->getValueType(0).isVector()) {
+ SmallVector<SDValue, 16> Loads;
+ Loads.push_back(L);
+ unsigned size =3D L->getValueSizeInBits(0);
+ while (size < LdOp->getValueSizeInBits(0)) {
+ Loads.push_back(DAG.getUNDEF(L->getValueType(0)));
+ size +=3D L->getValueSizeInBits(0);
+ }
+ L =3D DAG.getNode(ISD::CONCAT_VECTORS, dl, LdOp->getValueType(0),
+ &Loads[0], Loads.size());
+ }
+ } else {
+ L =3D DAG.getLoad(NewVT, dl, Chain, BasePtr,
+ LD->getPointerInfo().getWithOffset(Offset), isVolati=
le,
+ isNonTemporal, isInvariant, MinAlign(Align, Incremen=
t));
+ LdChain.push_back(L.getValue(1));
}
=20
- SDValue LdOp =3D DAG.getLoad(NewVT, dl, Chain, BasePtr,
- LD->getPointerInfo().getWithOffset(Offset),
- isVolatile,
- isNonTemporal, MinAlign(Align, Increment));
- LdChain.push_back(LdOp.getValue(1));
- LdOps.push_back(LdOp);
+ LdOps.push_back(L);
+
=20
LdWidth -=3D NewVTWidth;
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/ScheduleDAGFast.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp Tue Ap=
r 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp Tue Ap=
r 17 11:51:51 2012 +0300
@@ -43,7 +43,7 @@
SmallVector<SUnit *, 16> Queue;
=20
bool empty() const { return Queue.empty(); }
- =20
+
void push(SUnit *U) {
Queue.push_back(U);
}
@@ -101,8 +101,8 @@
bool DelayForLiveRegsBottomUp(SUnit*, SmallVector<unsigned, 4>&);
void ListScheduleBottomUp();
=20
- /// ForceUnitLatencies - The fast scheduler doesn't care about real late=
ncies.
- bool ForceUnitLatencies() const { return true; }
+ /// forceUnitLatencies - The fast scheduler doesn't care about real late=
ncies.
+ bool forceUnitLatencies() const { return true; }
};
} // end anonymous namespace
=20
@@ -112,7 +112,7 @@
DEBUG(dbgs() << "********** List Scheduling **********\n");
=20
NumLiveRegs =3D 0;
- LiveRegDefs.resize(TRI->getNumRegs(), NULL); =20
+ LiveRegDefs.resize(TRI->getNumRegs(), NULL);
LiveRegCycles.resize(TRI->getNumRegs(), 0);
=20
// Build the scheduling graph.
@@ -159,7 +159,7 @@
ReleasePred(SU, &*I);
if (I->isAssignedRegDep()) {
// This is a physical register dependency and it's impossible or
- // expensive to copy the register. Make sure nothing that can=20
+ // expensive to copy the register. Make sure nothing that can
// clobber the register is scheduled between the predecessor and
// this node.
if (!LiveRegDefs[I->getReg()]) {
@@ -245,10 +245,10 @@
DAG->ReplaceAllUsesOfValueWith(SDValue(SU->getNode(), OldNumVals-1),
SDValue(LoadNode, 1));
=20
- SUnit *NewSU =3D NewSUnit(N);
+ SUnit *NewSU =3D newSUnit(N);
assert(N->getNodeId() =3D=3D -1 && "Node already inserted!");
N->setNodeId(NewSU->NodeNum);
- =20
+
const MCInstrDesc &MCID =3D TII->get(N->getMachineOpcode());
for (unsigned i =3D 0; i !=3D MCID.getNumOperands(); ++i) {
if (MCID.getOperandConstraint(i, MCOI::TIED_TO) !=3D -1) {
@@ -268,7 +268,7 @@
LoadSU =3D &SUnits[LoadNode->getNodeId()];
isNewLoad =3D false;
} else {
- LoadSU =3D NewSUnit(LoadNode);
+ LoadSU =3D newSUnit(LoadNode);
LoadNode->setNodeId(LoadSU->NodeNum);
}
=20
@@ -329,7 +329,7 @@
D.setSUnit(LoadSU);
AddPred(SuccDep, D);
}
- }=20
+ }
if (isNewLoad) {
AddPred(NewSU, SDep(LoadSU, SDep::Order, LoadSU->Latency));
}
@@ -381,11 +381,11 @@
const TargetRegisterClass *D=
estRC,
const TargetRegisterClass *S=
rcRC,
SmallVector<SUnit*, 2> &Cop=
ies) {
- SUnit *CopyFromSU =3D NewSUnit(static_cast<SDNode *>(NULL));
+ SUnit *CopyFromSU =3D newSUnit(static_cast<SDNode *>(NULL));
CopyFromSU->CopySrcRC =3D SrcRC;
CopyFromSU->CopyDstRC =3D DestRC;
=20
- SUnit *CopyToSU =3D NewSUnit(static_cast<SDNode *>(NULL));
+ SUnit *CopyToSU =3D newSUnit(static_cast<SDNode *>(NULL));
CopyToSU->CopySrcRC =3D DestRC;
CopyToSU->CopyDstRC =3D SrcRC;
=20
@@ -425,7 +425,7 @@
const MCInstrDesc &MCID =3D TII->get(N->getMachineOpcode());
assert(MCID.ImplicitDefs && "Physical reg def must be in implicit def li=
st!");
unsigned NumRes =3D MCID.getNumDefs();
- for (const unsigned *ImpDef =3D MCID.getImplicitDefs(); *ImpDef; ++ImpDe=
f) {
+ for (const uint16_t *ImpDef =3D MCID.getImplicitDefs(); *ImpDef; ++ImpDe=
f) {
if (Reg =3D=3D *ImpDef)
break;
++NumRes;
@@ -447,7 +447,7 @@
Added =3D true;
}
}
- for (const unsigned *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alias)
+ for (const uint16_t *Alias =3D TRI->getAliasSet(Reg); *Alias; ++Alias)
if (LiveRegDefs[*Alias] && LiveRegDefs[*Alias] !=3D SU) {
if (RegAdded.insert(*Alias)) {
LRegs.push_back(*Alias);
@@ -508,7 +508,7 @@
const MCInstrDesc &MCID =3D TII->get(Node->getMachineOpcode());
if (!MCID.ImplicitDefs)
continue;
- for (const unsigned *Reg =3D MCID.ImplicitDefs; *Reg; ++Reg) {
+ for (const uint16_t *Reg =3D MCID.getImplicitDefs(); *Reg; ++Reg) {
CheckForLiveRegDef(SU, *Reg, LiveRegDefs, RegAdded, LRegs, TRI);
}
}
@@ -630,7 +630,7 @@
std::reverse(Sequence.begin(), Sequence.end());
=20
#ifndef NDEBUG
- VerifySchedule(/*isBottomUp=3D*/true);
+ VerifyScheduledSequence(/*isBottomUp=3D*/true);
#endif
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/ScheduleDAGRRList.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Tue =
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Tue =
Apr 17 11:51:51 2012 +0300
@@ -45,10 +45,6 @@
"Bottom-up register reduction list scheduling",
createBURRListDAGScheduler);
static RegisterScheduler
- tdrListrDAGScheduler("list-tdrr",
- "Top-down register reduction list scheduling",
- createTDRRListDAGScheduler);
-static RegisterScheduler
sourceListDAGScheduler("source",
"Similar to list-burr but schedules in source "
"order when possible",
@@ -93,6 +89,9 @@
static cl::opt<bool> DisableSchedHeight(
"disable-sched-height", cl::Hidden, cl::init(false),
cl::desc("Disable scheduled-height priority in sched=3Dlist-ilp"));
+static cl::opt<bool> Disable2AddrHack(
+ "disable-2addr-hack", cl::Hidden, cl::init(true),
+ cl::desc("Disable scheduler's two-address hack"));
=20
static cl::opt<int> MaxReorderWindow(
"max-sched-reorder", cl::Hidden, cl::init(6),
@@ -103,17 +102,6 @@
"sched-avg-ipc", cl::Hidden, cl::init(1),
cl::desc("Average inst/cycle whan no target itinerary exists."));
=20
-#ifndef NDEBUG
-namespace {
- // For sched=3Dlist-ilp, Count the number of times each factor comes int=
o play.
- enum { FactPressureDiff, FactRegUses, FactStall, FactHeight, FactDepth,
- FactStatic, FactOther, NumFactors };
-}
-static const char *FactorName[NumFactors] =3D
-{"PressureDiff", "RegUses", "Stall", "Height", "Depth","Static", "Other"};
-static int FactorCount[NumFactors];
-#endif //!NDEBUG
-
namespace {
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
/// ScheduleDAGRRList - The actual register reduction list scheduler
@@ -121,10 +109,6 @@
///
class ScheduleDAGRRList : public ScheduleDAGSDNodes {
private:
- /// isBottomUp - This is true if the scheduling problem is bottom-up, fa=
lse if
- /// it is top-down.
- bool isBottomUp;
-
/// NeedLatency - True if the scheduler will make use of latency informa=
tion.
///
bool NeedLatency;
@@ -162,11 +146,15 @@
/// and similar queries.
ScheduleDAGTopologicalSort Topo;
=20
+ // Hack to keep track of the inverse of FindCallSeqStart without more cr=
azy
+ // DAG crawling.
+ DenseMap<SUnit*, SUnit*> CallSeqEndForStart;
+
public:
ScheduleDAGRRList(MachineFunction &mf, bool needlatency,
SchedulingPriorityQueue *availqueue,
CodeGenOpt::Level OptLevel)
- : ScheduleDAGSDNodes(mf), isBottomUp(availqueue->isBottomUp()),
+ : ScheduleDAGSDNodes(mf),
NeedLatency(needlatency), AvailableQueue(availqueue), CurCycle(0),
Topo(SUnits) {
=20
@@ -221,8 +209,6 @@
=20
void ReleasePred(SUnit *SU, const SDep *PredEdge);
void ReleasePredecessors(SUnit *SU);
- void ReleaseSucc(SUnit *SU, const SDep *SuccEdge);
- void ReleaseSuccessors(SUnit *SU);
void ReleasePending();
void AdvanceToCycle(unsigned NextCycle);
void AdvancePastStalls(SUnit *SU);
@@ -242,15 +228,11 @@
SUnit *PickNodeToScheduleBottomUp();
void ListScheduleBottomUp();
=20
- void ScheduleNodeTopDown(SUnit*);
- void ListScheduleTopDown();
-
-
/// CreateNewSUnit - Creates a new SUnit and returns a pointer to it.
/// Updates the topological ordering if required.
SUnit *CreateNewSUnit(SDNode *N) {
unsigned NumSUnits =3D SUnits.size();
- SUnit *NewNode =3D NewSUnit(N);
+ SUnit *NewNode =3D newSUnit(N);
// Update the topological ordering.
if (NewNode->NodeNum >=3D NumSUnits)
Topo.InitDAGTopologicalSorting();
@@ -268,9 +250,9 @@
return NewNode;
}
=20
- /// ForceUnitLatencies - Register-pressure-reducing scheduling doesn't
+ /// forceUnitLatencies - Register-pressure-reducing scheduling doesn't
/// need actual latency information but the hybrid scheduler does.
- bool ForceUnitLatencies() const {
+ bool forceUnitLatencies() const {
return !NeedLatency;
}
};
@@ -278,7 +260,7 @@
=20
/// GetCostForDef - Looks up the register class and cost for a given defin=
ition.
/// Typically this just means looking up the representative register class,
-/// but for untyped values (MVT::untyped) it means inspecting the node's
+/// but for untyped values (MVT::Untyped) it means inspecting the node's
/// opcode to determine what register class is being generated.
static void GetCostForDef(const ScheduleDAGSDNodes::RegDefIter &RegDefPos,
const TargetLowering *TLI,
@@ -289,7 +271,7 @@
=20
// Special handling for untyped values. These values can only come from
// the expansion of custom DAG-to-DAG patterns.
- if (VT =3D=3D MVT::untyped) {
+ if (VT =3D=3D MVT::Untyped) {
const SDNode *Node =3D RegDefPos.GetNode();
unsigned Opcode =3D Node->getMachineOpcode();
=20
@@ -319,18 +301,16 @@
DEBUG(dbgs()
<< "********** List Scheduling BB#" << BB->getNumber()
<< " '" << BB->getName() << "' **********\n");
-#ifndef NDEBUG
- for (int i =3D 0; i < NumFactors; ++i) {
- FactorCount[i] =3D 0;
- }
-#endif //!NDEBUG
=20
CurCycle =3D 0;
IssueCount =3D 0;
MinAvailableCycle =3D DisableSchedCycles ? 0 : UINT_MAX;
NumLiveRegs =3D 0;
- LiveRegDefs.resize(TRI->getNumRegs(), NULL);
- LiveRegGens.resize(TRI->getNumRegs(), NULL);
+ // Allocate slots for each physical register, plus one for a special reg=
ister
+ // to track the virtual resource of a calling sequence.
+ LiveRegDefs.resize(TRI->getNumRegs() + 1, NULL);
+ LiveRegGens.resize(TRI->getNumRegs() + 1, NULL);
+ CallSeqEndForStart.clear();
=20
// Build the scheduling graph.
BuildSchedGraph(NULL);
@@ -343,18 +323,16 @@
=20
HazardRec->Reset();
=20
- // Execute the actual scheduling loop Top-Down or Bottom-Up as appropria=
te.
- if (isBottomUp)
- ListScheduleBottomUp();
- else
- ListScheduleTopDown();
-
-#ifndef NDEBUG
- for (int i =3D 0; i < NumFactors; ++i) {
- DEBUG(dbgs() << FactorName[i] << "\t" << FactorCount[i] << "\n");
- }
-#endif // !NDEBUG
+ // Execute the actual scheduling loop.
+ ListScheduleBottomUp();
+
AvailableQueue->releaseState();
+
+ DEBUG({
+ dbgs() << "*** Final schedule ***\n";
+ dumpSchedule();
+ dbgs() << '\n';
+ });
}
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -376,7 +354,7 @@
#endif
--PredSU->NumSuccsLeft;
=20
- if (!ForceUnitLatencies()) {
+ if (!forceUnitLatencies()) {
// Updating predecessor's height. This is now the cycle when the
// predecessor can be scheduled without causing a pipeline stall.
PredSU->setHeightToAtLeast(SU->getHeight() + PredEdge->getLatency());
@@ -403,6 +381,109 @@
}
}
=20
+/// IsChainDependent - Test if Outer is reachable from Inner through
+/// chain dependencies.
+static bool IsChainDependent(SDNode *Outer, SDNode *Inner,
+ unsigned NestLevel,
+ const TargetInstrInfo *TII) {
+ SDNode *N =3D Outer;
+ for (;;) {
+ if (N =3D=3D Inner)
+ return true;
+ // For a TokenFactor, examine each operand. There may be multiple ways
+ // to get to the CALLSEQ_BEGIN, but we need to find the path with the
+ // most nesting in order to ensure that we find the corresponding matc=
h.
+ if (N->getOpcode() =3D=3D ISD::TokenFactor) {
+ for (unsigned i =3D 0, e =3D N->getNumOperands(); i !=3D e; ++i)
+ if (IsChainDependent(N->getOperand(i).getNode(), Inner, NestLevel,=
TII))
+ return true;
+ return false;
+ }
+ // Check for a lowered CALLSEQ_BEGIN or CALLSEQ_END.
+ if (N->isMachineOpcode()) {
+ if (N->getMachineOpcode() =3D=3D
+ (unsigned)TII->getCallFrameDestroyOpcode()) {
+ ++NestLevel;
+ } else if (N->getMachineOpcode() =3D=3D
+ (unsigned)TII->getCallFrameSetupOpcode()) {
+ if (NestLevel =3D=3D 0)
+ return false;
+ --NestLevel;
+ }
+ }
+ // Otherwise, find the chain and continue climbing.
+ for (unsigned i =3D 0, e =3D N->getNumOperands(); i !=3D e; ++i)
+ if (N->getOperand(i).getValueType() =3D=3D MVT::Other) {
+ N =3D N->getOperand(i).getNode();
+ goto found_chain_operand;
+ }
+ return false;
+ found_chain_operand:;
+ if (N->getOpcode() =3D=3D ISD::EntryToken)
+ return false;
+ }
+}
+
+/// FindCallSeqStart - Starting from the (lowered) CALLSEQ_END node, locate
+/// the corresponding (lowered) CALLSEQ_BEGIN node.
+///
+/// NestLevel and MaxNested are used in recursion to indcate the current l=
evel
+/// of nesting of CALLSEQ_BEGIN and CALLSEQ_END pairs, as well as the maxi=
mum
+/// level seen so far.
+///
+/// TODO: It would be better to give CALLSEQ_END an explicit operand to po=
int
+/// to the corresponding CALLSEQ_BEGIN to avoid needing to search for it.
+static SDNode *
+FindCallSeqStart(SDNode *N, unsigned &NestLevel, unsigned &MaxNest,
+ const TargetInstrInfo *TII) {
+ for (;;) {
+ // For a TokenFactor, examine each operand. There may be multiple ways
+ // to get to the CALLSEQ_BEGIN, but we need to find the path with the
+ // most nesting in order to ensure that we find the corresponding matc=
h.
+ if (N->getOpcode() =3D=3D ISD::TokenFactor) {
+ SDNode *Best =3D 0;
+ unsigned BestMaxNest =3D MaxNest;
+ for (unsigned i =3D 0, e =3D N->getNumOperands(); i !=3D e; ++i) {
+ unsigned MyNestLevel =3D NestLevel;
+ unsigned MyMaxNest =3D MaxNest;
+ if (SDNode *New =3D FindCallSeqStart(N->getOperand(i).getNode(),
+ MyNestLevel, MyMaxNest, TII))
+ if (!Best || (MyMaxNest > BestMaxNest)) {
+ Best =3D New;
+ BestMaxNest =3D MyMaxNest;
+ }
+ }
+ assert(Best);
+ MaxNest =3D BestMaxNest;
+ return Best;
+ }
+ // Check for a lowered CALLSEQ_BEGIN or CALLSEQ_END.
+ if (N->isMachineOpcode()) {
+ if (N->getMachineOpcode() =3D=3D
+ (unsigned)TII->getCallFrameDestroyOpcode()) {
+ ++NestLevel;
+ MaxNest =3D std::max(MaxNest, NestLevel);
+ } else if (N->getMachineOpcode() =3D=3D
+ (unsigned)TII->getCallFrameSetupOpcode()) {
+ assert(NestLevel !=3D 0);
+ --NestLevel;
+ if (NestLevel =3D=3D 0)
+ return N;
+ }
+ }
+ // Otherwise, find the chain and continue climbing.
+ for (unsigned i =3D 0, e =3D N->getNumOperands(); i !=3D e; ++i)
+ if (N->getOperand(i).getValueType() =3D=3D MVT::Other) {
+ N =3D N->getOperand(i).getNode();
+ goto found_chain_operand;
+ }
+ return 0;
+ found_chain_operand:;
+ if (N->getOpcode() =3D=3D ISD::EntryToken)
+ return 0;
+ }
+}
+
/// Call ReleasePred for each predecessor, then update register live def/g=
en.
/// Always update LiveRegDefs for a register dependence even if the curren=
t SU
/// also defines the register. This effectively create one large live range
@@ -440,6 +521,27 @@
}
}
}
+
+ // If we're scheduling a lowered CALLSEQ_END, find the corresponding
+ // CALLSEQ_BEGIN. Inject an artificial physical register dependence betw=
een
+ // these nodes, to prevent other calls from being interscheduled with th=
em.
+ unsigned CallResource =3D TRI->getNumRegs();
+ if (!LiveRegDefs[CallResource])
+ for (SDNode *Node =3D SU->getNode(); Node; Node =3D Node->getGluedNode=
())
+ if (Node->isMachineOpcode() &&
+ Node->getMachineOpcode() =3D=3D (unsigned)TII->getCallFrameDestr=
oyOpcode()) {
+ unsigned NestLevel =3D 0;
+ unsigned MaxNest =3D 0;
+ SDNode *N =3D FindCallSeqStart(Node, NestLevel, MaxNest, TII);
+
+ SUnit *Def =3D &SUnits[N->getNodeId()];
+ CallSeqEndForStart[Def] =3D SU;
+
+ ++NumLiveRegs;
+ LiveRegDefs[CallResource] =3D Def;
+ LiveRegGens[CallResource] =3D SU;
+ break;
+ }
}
=20
/// Check to see if any of the pending instructions are ready to issue. If
@@ -457,8 +559,7 @@
// Check to see if any of the pending instructions are ready to issue. =
If
// so, add them to the available queue.
for (unsigned i =3D 0, e =3D PendingQueue.size(); i !=3D e; ++i) {
- unsigned ReadyCycle =3D
- isBottomUp ? PendingQueue[i]->getHeight() : PendingQueue[i]->getDept=
h();
+ unsigned ReadyCycle =3D PendingQueue[i]->getHeight();
if (ReadyCycle < MinAvailableCycle)
MinAvailableCycle =3D ReadyCycle;
=20
@@ -487,10 +588,7 @@
}
else {
for (; CurCycle !=3D NextCycle; ++CurCycle) {
- if (isBottomUp)
- HazardRec->RecedeCycle();
- else
- HazardRec->AdvanceCycle();
+ HazardRec->RecedeCycle();
}
}
// FIXME: Instead of visiting the pending Q each time, set a dirty flag =
on the
@@ -511,7 +609,7 @@
// currently need to treat these nodes like real instructions.
// if (!SU->getNode() || !SU->getNode()->isMachineOpcode()) return;
=20
- unsigned ReadyCycle =3D isBottomUp ? SU->getHeight() : SU->getDepth();
+ unsigned ReadyCycle =3D SU->getHeight();
=20
// Bump CurCycle to account for latency. We assume the latency of other
// available instructions may be hidden by the stall (not a full pipe st=
all).
@@ -522,7 +620,7 @@
// Calls are scheduled in their preceding cycle, so don't conflict with
// hazards from instructions after the call. EmitNode will reset the
// scoreboard state before emitting the call.
- if (isBottomUp && SU->isCall)
+ if (SU->isCall)
return;
=20
// FIXME: For resource conflicts in very long non-pipelined stages, we
@@ -530,7 +628,7 @@
int Stalls =3D 0;
while (true) {
ScheduleHazardRecognizer::HazardType HT =3D
- HazardRec->getHazardType(SU, isBottomUp ? -Stalls : Stalls);
+ HazardRec->getHazardType(SU, -Stalls);
=20
if (HT =3D=3D ScheduleHazardRecognizer::NoHazard)
break;
@@ -568,17 +666,13 @@
HazardRec->Reset();
return;
}
- if (isBottomUp && SU->isCall) {
+ if (SU->isCall) {
// Calls are scheduled with their preceding instructions. For bottom-up
// scheduling, clear the pipeline state before emitting.
HazardRec->Reset();
}
=20
HazardRec->EmitInstruction(SU);
-
- if (!isBottomUp && SU->isCall) {
- HazardRec->Reset();
- }
}
=20
static void resetVRegCycle(SUnit *SU);
@@ -607,7 +701,7 @@
=20
Sequence.push_back(SU);
=20
- AvailableQueue->ScheduledNode(SU);
+ AvailableQueue->scheduledNode(SU);
=20
// If HazardRec is disabled, and each inst counts as one cycle, then
// advance CurCycle before ReleasePredecessors to avoid useless pushes to
@@ -630,6 +724,20 @@
LiveRegGens[I->getReg()] =3D NULL;
}
}
+ // Release the special call resource dependence, if this is the beginning
+ // of a call.
+ unsigned CallResource =3D TRI->getNumRegs();
+ if (LiveRegDefs[CallResource] =3D=3D SU)
+ for (const SDNode *SUNode =3D SU->getNode(); SUNode;
+ SUNode =3D SUNode->getGluedNode()) {
+ if (SUNode->isMachineOpcode() &&
+ SUNode->getMachineOpcode() =3D=3D (unsigned)TII->getCallFrameSet=
upOpcode()) {
+ assert(NumLiveRegs > 0 && "NumLiveRegs is already zero!");
+ --NumLiveRegs;
+ LiveRegDefs[CallResource] =3D NULL;
+ LiveRegGens[CallResource] =3D NULL;
+ }
+ }
=20
resetVRegCycle(SU);
=20
@@ -686,15 +794,41 @@
}
}
=20
+ // Reclaim the special call resource dependence, if this is the beginning
+ // of a call.
+ unsigned CallResource =3D TRI->getNumRegs();
+ for (const SDNode *SUNode =3D SU->getNode(); SUNode;
+ SUNode =3D SUNode->getGluedNode()) {
+ if (SUNode->isMachineOpcode() &&
+ SUNode->getMachineOpcode() =3D=3D (unsigned)TII->getCallFrameSetup=
Opcode()) {
+ ++NumLiveRegs;
+ LiveRegDefs[CallResource] =3D SU;
+ LiveRegGens[CallResource] =3D CallSeqEndForStart[SU];
+ }
+ }
+
+ // Release the special call resource dependence, if this is the end
+ // of a call.
+ if (LiveRegGens[CallResource] =3D=3D SU)
+ for (const SDNode *SUNode =3D SU->getNode(); SUNode;
+ SUNode =3D SUNode->getGluedNode()) {
+ if (SUNode->isMachineOpcode() &&
+ SUNode->getMachineOpcode() =3D=3D (unsigned)TII->getCallFrameDes=
troyOpcode()) {
+ assert(NumLiveRegs > 0 && "NumLiveRegs is already zero!");
+ --NumLiveRegs;
+ LiveRegDefs[CallResource] =3D NULL;
+ LiveRegGens[CallResource] =3D NULL;
+ }
+ }
+
for (SUnit::succ_iterator I =3D SU->Succs.begin(), E =3D SU->Succs.end();
I !=3D E; ++I) {
if (I->isAssignedRegDep()) {
+ if (!LiveRegDefs[I->getReg()])
+ ++NumLiveRegs;
// This becomes the nearest def. Note that an earlier def may still =
be
// pending if this is a two-address node.
LiveRegDefs[I->getReg()] =3D SU;
- if (!LiveRegDefs[I->getReg()]) {
- ++NumLiveRegs;
- }
if (LiveRegGens[I->getReg()] =3D=3D NULL ||
I->getSUnit()->getHeight() < LiveRegGens[I->getReg()]->getHeight=
())
LiveRegGens[I->getReg()] =3D I->getSUnit();
@@ -714,7 +848,7 @@
else {
AvailableQueue->push(SU);
}
- AvailableQueue->UnscheduledNode(SU);
+ AvailableQueue->unscheduledNode(SU);
}
=20
/// After backtracking, the hazard checker needs to be restored to a state
@@ -805,6 +939,11 @@
if (!TII->unfoldMemoryOperand(*DAG, N, NewNodes))
return NULL;
=20
+ // unfolding an x86 DEC64m operation results in store, dec, load which
+ // can't be handled here so quit
+ if (NewNodes.size() =3D=3D 3)
+ return NULL;
+
DEBUG(dbgs() << "Unfolding SU #" << SU->NodeNum << "\n");
assert(NewNodes.size() =3D=3D 2 && "Expected a load folding node!");
=20
@@ -830,7 +969,7 @@
LoadNode->setNodeId(LoadSU->NodeNum);
=20
InitNumRegDefsLeft(LoadSU);
- ComputeLatency(LoadSU);
+ computeLatency(LoadSU);
}
=20
SUnit *NewSU =3D CreateNewSUnit(N);
@@ -848,7 +987,7 @@
NewSU->isCommutable =3D true;
=20
InitNumRegDefsLeft(NewSU);
- ComputeLatency(NewSU);
+ computeLatency(NewSU);
=20
// Record all the edges to and from the old SU, by category.
SmallVector<SDep, 4> ChainPreds;
@@ -1027,7 +1166,7 @@
const MCInstrDesc &MCID =3D TII->get(N->getMachineOpcode());
assert(MCID.ImplicitDefs && "Physical reg def must be in implicit def li=
st!");
unsigned NumRes =3D MCID.getNumDefs();
- for (const unsigned *ImpDef =3D MCID.getImplicitDefs(); *ImpDef; ++ImpDe=
f) {
+ for (const uint16_t *ImpDef =3D MCID.getImplicitDefs(); *ImpDef; ++ImpDe=
f) {
if (Reg =3D=3D *ImpDef)
break;
++NumRes;
@@ -1042,7 +1181,7 @@
SmallSet<unsigned, 4> &RegAdded,
SmallVector<unsigned, 4> &LRegs,
const TargetRegisterInfo *TRI) {
- for (const unsigned *AliasI =3D TRI->getOverlaps(Reg); *AliasI; ++AliasI=
) {
+ for (const uint16_t *AliasI =3D TRI->getOverlaps(Reg); *AliasI; ++AliasI=
) {
=20
// Check if Ref is live.
if (!LiveRegDefs[*AliasI]) continue;
@@ -1057,6 +1196,31 @@
}
}
=20
+/// CheckForLiveRegDefMasked - Check for any live physregs that are clobbe=
red
+/// by RegMask, and add them to LRegs.
+static void CheckForLiveRegDefMasked(SUnit *SU, const uint32_t *RegMask,
+ std::vector<SUnit*> &LiveRegDefs,
+ SmallSet<unsigned, 4> &RegAdded,
+ SmallVector<unsigned, 4> &LRegs) {
+ // Look at all live registers. Skip Reg0 and the special CallResource.
+ for (unsigned i =3D 1, e =3D LiveRegDefs.size()-1; i !=3D e; ++i) {
+ if (!LiveRegDefs[i]) continue;
+ if (LiveRegDefs[i] =3D=3D SU) continue;
+ if (!MachineOperand::clobbersPhysReg(RegMask, i)) continue;
+ if (RegAdded.insert(i))
+ LRegs.push_back(i);
+ }
+}
+
+/// getNodeRegMask - Returns the register mask attached to an SDNode, if a=
ny.
+static const uint32_t *getNodeRegMask(const SDNode *N) {
+ for (unsigned i =3D 0, e =3D N->getNumOperands(); i !=3D e; ++i)
+ if (const RegisterMaskSDNode *Op =3D
+ dyn_cast<RegisterMaskSDNode>(N->getOperand(i).getNode()))
+ return Op->getRegMask();
+ return NULL;
+}
+
/// DelayForLiveRegsBottomUp - Returns true if it is necessary to delay
/// scheduling of the given node to satisfy live physical register depende=
ncies.
/// If the specific node is the last one that's available to schedule, do
@@ -1108,10 +1272,27 @@
=20
if (!Node->isMachineOpcode())
continue;
+ // If we're in the middle of scheduling a call, don't begin scheduling
+ // another call. Also, don't allow any physical registers to be live a=
cross
+ // the call.
+ if (Node->getMachineOpcode() =3D=3D (unsigned)TII->getCallFrameDestroy=
Opcode()) {
+ // Check the special calling-sequence resource.
+ unsigned CallResource =3D TRI->getNumRegs();
+ if (LiveRegDefs[CallResource]) {
+ SDNode *Gen =3D LiveRegGens[CallResource]->getNode();
+ while (SDNode *Glued =3D Gen->getGluedNode())
+ Gen =3D Glued;
+ if (!IsChainDependent(Gen, Node, 0, TII) && RegAdded.insert(CallRe=
source))
+ LRegs.push_back(CallResource);
+ }
+ }
+ if (const uint32_t *RegMask =3D getNodeRegMask(Node))
+ CheckForLiveRegDefMasked(SU, RegMask, LiveRegDefs, RegAdded, LRegs);
+
const MCInstrDesc &MCID =3D TII->get(Node->getMachineOpcode());
if (!MCID.ImplicitDefs)
continue;
- for (const unsigned *Reg =3D MCID.ImplicitDefs; *Reg; ++Reg)
+ for (const uint16_t *Reg =3D MCID.getImplicitDefs(); *Reg; ++Reg)
CheckForLiveRegDef(SU, *Reg, LiveRegDefs, RegAdded, LRegs, TRI);
}
=20
@@ -1300,100 +1481,11 @@
std::reverse(Sequence.begin(), Sequence.end());
=20
#ifndef NDEBUG
- VerifySchedule(isBottomUp);
+ VerifyScheduledSequence(/*isBottomUp=3D*/true);
#endif
}
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
-// Top-Down Scheduling
-//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
-
-/// ReleaseSucc - Decrement the NumPredsLeft count of a successor. Add it =
to
-/// the AvailableQueue if the count reaches zero. Also update its cycle bo=
und.
-void ScheduleDAGRRList::ReleaseSucc(SUnit *SU, const SDep *SuccEdge) {
- SUnit *SuccSU =3D SuccEdge->getSUnit();
-
-#ifndef NDEBUG
- if (SuccSU->NumPredsLeft =3D=3D 0) {
- dbgs() << "*** Scheduling failed! ***\n";
- SuccSU->dump(this);
- dbgs() << " has been released too many times!\n";
- llvm_unreachable(0);
- }
-#endif
- --SuccSU->NumPredsLeft;
-
- // If all the node's predecessors are scheduled, this node is ready
- // to be scheduled. Ignore the special ExitSU node.
- if (SuccSU->NumPredsLeft =3D=3D 0 && SuccSU !=3D &ExitSU) {
- SuccSU->isAvailable =3D true;
- AvailableQueue->push(SuccSU);
- }
-}
-
-void ScheduleDAGRRList::ReleaseSuccessors(SUnit *SU) {
- // Top down: release successors
- for (SUnit::succ_iterator I =3D SU->Succs.begin(), E =3D SU->Succs.end();
- I !=3D E; ++I) {
- assert(!I->isAssignedRegDep() &&
- "The list-tdrr scheduler doesn't yet support physreg dependenci=
es!");
-
- ReleaseSucc(SU, &*I);
- }
-}
-
-/// ScheduleNodeTopDown - Add the node to the schedule. Decrement the pend=
ing
-/// count of its successors. If a successor pending count is zero, add it =
to
-/// the Available queue.
-void ScheduleDAGRRList::ScheduleNodeTopDown(SUnit *SU) {
- DEBUG(dbgs() << "*** Scheduling [" << CurCycle << "]: ");
- DEBUG(SU->dump(this));
-
- assert(CurCycle >=3D SU->getDepth() && "Node scheduled above its depth!"=
);
- SU->setDepthToAtLeast(CurCycle);
- Sequence.push_back(SU);
-
- ReleaseSuccessors(SU);
- SU->isScheduled =3D true;
- AvailableQueue->ScheduledNode(SU);
-}
-
-/// ListScheduleTopDown - The main loop of list scheduling for top-down
-/// schedulers.
-void ScheduleDAGRRList::ListScheduleTopDown() {
- AvailableQueue->setCurCycle(CurCycle);
-
- // Release any successors of the special Entry node.
- ReleaseSuccessors(&EntrySU);
-
- // All leaves to Available queue.
- for (unsigned i =3D 0, e =3D SUnits.size(); i !=3D e; ++i) {
- // It is available if it has no predecessors.
- if (SUnits[i].Preds.empty()) {
- AvailableQueue->push(&SUnits[i]);
- SUnits[i].isAvailable =3D true;
- }
- }
-
- // While Available queue is not empty, grab the node with the highest
- // priority. If it is not ready put it back. Schedule the node.
- Sequence.reserve(SUnits.size());
- while (!AvailableQueue->empty()) {
- SUnit *CurSU =3D AvailableQueue->pop();
-
- if (CurSU)
- ScheduleNodeTopDown(CurSU);
- ++CurCycle;
- AvailableQueue->setCurCycle(CurCycle);
- }
-
-#ifndef NDEBUG
- VerifySchedule(isBottomUp);
-#endif
-}
-
-
-//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// RegReductionPriorityQueue Definition
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
//
@@ -1437,21 +1529,6 @@
bool operator()(SUnit* left, SUnit* right) const;
};
=20
-// td_ls_rr_sort - Priority function for top down register pressure reduct=
ion
-// scheduler.
-struct td_ls_rr_sort : public queue_sort {
- enum {
- IsBottomUp =3D false,
- HasReadyFilter =3D false
- };
-
- RegReductionPQBase *SPQ;
- td_ls_rr_sort(RegReductionPQBase *spq) : SPQ(spq) {}
- td_ls_rr_sort(const td_ls_rr_sort &RHS) : SPQ(RHS.SPQ) {}
-
- bool operator()(const SUnit* left, const SUnit* right) const;
-};
-
// src_ls_rr_sort - Priority function for source order scheduler.
struct src_ls_rr_sort : public queue_sort {
enum {
@@ -1510,6 +1587,7 @@
std::vector<SUnit*> Queue;
unsigned CurQueueId;
bool TracksRegPressure;
+ bool SrcOrder;
=20
// SUnits - The SUnits for the current graph.
std::vector<SUnit> *SUnits;
@@ -1535,11 +1613,12 @@
RegReductionPQBase(MachineFunction &mf,
bool hasReadyFilter,
bool tracksrp,
+ bool srcorder,
const TargetInstrInfo *tii,
const TargetRegisterInfo *tri,
const TargetLowering *tli)
: SchedulingPriorityQueue(hasReadyFilter),
- CurQueueId(0), TracksRegPressure(tracksrp),
+ CurQueueId(0), TracksRegPressure(tracksrp), SrcOrder(srcorder),
MF(mf), TII(tii), TRI(tri), TLI(tli), scheduleDAG(NULL) {
if (TracksRegPressure) {
unsigned NumRC =3D TRI->getNumRegClasses();
@@ -1610,9 +1689,9 @@
=20
int RegPressureDiff(SUnit *SU, unsigned &LiveUses) const;
=20
- void ScheduledNode(SUnit *SU);
-
- void UnscheduledNode(SUnit *SU);
+ void scheduledNode(SUnit *SU);
+
+ void unscheduledNode(SUnit *SU);
=20
protected:
bool canClobber(const SUnit *SU, const SUnit *Op);
@@ -1654,10 +1733,12 @@
public:
RegReductionPriorityQueue(MachineFunction &mf,
bool tracksrp,
+ bool srcorder,
const TargetInstrInfo *tii,
const TargetRegisterInfo *tri,
const TargetLowering *tli)
- : RegReductionPQBase(mf, SF::HasReadyFilter, tracksrp, tii, tri, tli),
+ : RegReductionPQBase(mf, SF::HasReadyFilter, tracksrp, srcorder,
+ tii, tri, tli),
Picker(this) {}
=20
bool isBottomUp() const { return SF::IsBottomUp; }
@@ -1680,10 +1761,7 @@
SF DumpPicker =3D Picker;
while (!DumpQueue.empty()) {
SUnit *SU =3D popFromQueue(DumpQueue, DumpPicker, scheduleDAG);
- if (isBottomUp())
- dbgs() << "Height " << SU->getHeight() << ": ";
- else
- dbgs() << "Depth " << SU->getDepth() << ": ";
+ dbgs() << "Height " << SU->getHeight() << ": ";
SU->dump(DAG);
}
}
@@ -1692,9 +1770,6 @@
typedef RegReductionPriorityQueue<bu_ls_rr_sort>
BURegReductionPriorityQueue;
=20
-typedef RegReductionPriorityQueue<td_ls_rr_sort>
-TDRegReductionPriorityQueue;
-
typedef RegReductionPriorityQueue<src_ls_rr_sort>
SrcRegReductionPriorityQueue;
=20
@@ -1919,7 +1994,7 @@
return PDiff;
}
=20
-void RegReductionPQBase::ScheduledNode(SUnit *SU) {
+void RegReductionPQBase::scheduledNode(SUnit *SU) {
if (!TracksRegPressure)
return;
=20
@@ -1988,7 +2063,7 @@
dumpRegPressure();
}
=20
-void RegReductionPQBase::UnscheduledNode(SUnit *SU) {
+void RegReductionPQBase::unscheduledNode(SUnit *SU) {
if (!TracksRegPressure)
return;
=20
@@ -2235,37 +2310,29 @@
int LHeight =3D (int)left->getHeight() + LPenalty;
int RHeight =3D (int)right->getHeight() + RPenalty;
=20
- bool LStall =3D (!checkPref || left->SchedulingPref =3D=3D Sched::Latenc=
y) &&
+ bool LStall =3D (!checkPref || left->SchedulingPref =3D=3D Sched::ILP) &&
BUHasStall(left, LHeight, SPQ);
- bool RStall =3D (!checkPref || right->SchedulingPref =3D=3D Sched::Laten=
cy) &&
+ bool RStall =3D (!checkPref || right->SchedulingPref =3D=3D Sched::ILP) =
&&
BUHasStall(right, RHeight, SPQ);
=20
// If scheduling one of the node will cause a pipeline stall, delay it.
// If scheduling either one of the node will cause a pipeline stall, sort
// them according to their height.
if (LStall) {
- if (!RStall) {
- DEBUG(++FactorCount[FactStall]);
+ if (!RStall)
return 1;
- }
- if (LHeight !=3D RHeight) {
- DEBUG(++FactorCount[FactStall]);
+ if (LHeight !=3D RHeight)
return LHeight > RHeight ? 1 : -1;
- }
- } else if (RStall) {
- DEBUG(++FactorCount[FactStall]);
+ } else if (RStall)
return -1;
- }
=20
// If either node is scheduling for latency, sort them by height/depth
// and latency.
- if (!checkPref || (left->SchedulingPref =3D=3D Sched::Latency ||
- right->SchedulingPref =3D=3D Sched::Latency)) {
+ if (!checkPref || (left->SchedulingPref =3D=3D Sched::ILP ||
+ right->SchedulingPref =3D=3D Sched::ILP)) {
if (DisableSchedCycles) {
- if (LHeight !=3D RHeight) {
- DEBUG(++FactorCount[FactHeight]);
+ if (LHeight !=3D RHeight)
return LHeight > RHeight ? 1 : -1;
- }
}
else {
// If neither instruction stalls (!LStall && !RStall) then
@@ -2274,17 +2341,14 @@
int LDepth =3D left->getDepth() - LPenalty;
int RDepth =3D right->getDepth() - RPenalty;
if (LDepth !=3D RDepth) {
- DEBUG(++FactorCount[FactDepth]);
DEBUG(dbgs() << " Comparing latency of SU (" << left->NodeNum
<< ") depth " << LDepth << " vs SU (" << right->NodeNum
<< ") depth " << RDepth << "\n");
return LDepth < RDepth ? 1 : -1;
}
}
- if (left->Latency !=3D right->Latency) {
- DEBUG(++FactorCount[FactOther]);
+ if (left->Latency !=3D right->Latency)
return left->Latency > right->Latency ? 1 : -1;
- }
}
return 0;
}
@@ -2298,7 +2362,6 @@
bool LHasPhysReg =3D left->hasPhysRegDefs;
bool RHasPhysReg =3D right->hasPhysRegDefs;
if (LHasPhysReg !=3D RHasPhysReg) {
- DEBUG(++FactorCount[FactRegUses]);
#ifndef NDEBUG
const char *PhysRegMsg[] =3D {" has no physreg", " defines a physreg=
"};
#endif
@@ -2324,10 +2387,8 @@
LPriority =3D (LPriority > LNumVals) ? (LPriority - LNumVals) : 0;
}
=20
- if (LPriority !=3D RPriority) {
- DEBUG(++FactorCount[FactStatic]);
+ if (LPriority !=3D RPriority)
return LPriority > RPriority;
- }
=20
// One or both of the nodes are calls and their sethi-ullman numbers are=
the
// same, then keep source order.
@@ -2360,18 +2421,14 @@
// This creates more short live intervals.
unsigned LDist =3D closestSucc(left);
unsigned RDist =3D closestSucc(right);
- if (LDist !=3D RDist) {
- DEBUG(++FactorCount[FactOther]);
+ if (LDist !=3D RDist)
return LDist < RDist;
- }
=20
// How many registers becomes live when the node is scheduled.
unsigned LScratch =3D calcMaxScratches(left);
unsigned RScratch =3D calcMaxScratches(right);
- if (LScratch !=3D RScratch) {
- DEBUG(++FactorCount[FactOther]);
+ if (LScratch !=3D RScratch)
return LScratch > RScratch;
- }
=20
// Comparing latency against a call makes little sense unless the node
// is register pressure-neutral.
@@ -2386,20 +2443,15 @@
return result > 0;
}
else {
- if (left->getHeight() !=3D right->getHeight()) {
- DEBUG(++FactorCount[FactHeight]);
+ if (left->getHeight() !=3D right->getHeight())
return left->getHeight() > right->getHeight();
- }
-
- if (left->getDepth() !=3D right->getDepth()) {
- DEBUG(++FactorCount[FactDepth]);
+
+ if (left->getDepth() !=3D right->getDepth())
return left->getDepth() < right->getDepth();
- }
}
=20
assert(left->NodeQueueId && right->NodeQueueId &&
"NodeQueueId cannot be zero");
- DEBUG(++FactorCount[FactOther]);
return (left->NodeQueueId > right->NodeQueueId);
}
=20
@@ -2459,13 +2511,11 @@
// Avoid causing spills. If register pressure is high, schedule for
// register pressure reduction.
if (LHigh && !RHigh) {
- DEBUG(++FactorCount[FactPressureDiff]);
DEBUG(dbgs() << " pressure SU(" << left->NodeNum << ") > SU("
<< right->NodeNum << ")\n");
return true;
}
else if (!LHigh && RHigh) {
- DEBUG(++FactorCount[FactPressureDiff]);
DEBUG(dbgs() << " pressure SU(" << right->NodeNum << ") > SU("
<< left->NodeNum << ")\n");
return false;
@@ -2529,7 +2579,6 @@
RPDiff =3D SPQ->RegPressureDiff(right, RLiveUses);
}
if (!DisableSchedRegPressure && LPDiff !=3D RPDiff) {
- DEBUG(++FactorCount[FactPressureDiff]);
DEBUG(dbgs() << "RegPressureDiff SU(" << left->NodeNum << "): " << LPD=
iff
<< " !=3D SU(" << right->NodeNum << "): " << RPDiff << "\n");
return LPDiff > RPDiff;
@@ -2538,7 +2587,6 @@
if (!DisableSchedRegPressure && (LPDiff > 0 || RPDiff > 0)) {
bool LReduce =3D canEnableCoalescing(left);
bool RReduce =3D canEnableCoalescing(right);
- DEBUG(if (LReduce !=3D RReduce) ++FactorCount[FactPressureDiff]);
if (LReduce && !RReduce) return false;
if (RReduce && !LReduce) return true;
}
@@ -2546,17 +2594,14 @@
if (!DisableSchedLiveUses && (LLiveUses !=3D RLiveUses)) {
DEBUG(dbgs() << "Live uses SU(" << left->NodeNum << "): " << LLiveUses
<< " !=3D SU(" << right->NodeNum << "): " << RLiveUses << "\n");
- DEBUG(++FactorCount[FactRegUses]);
return LLiveUses < RLiveUses;
}
=20
if (!DisableSchedStalls) {
bool LStall =3D BUHasStall(left, left->getHeight(), SPQ);
bool RStall =3D BUHasStall(right, right->getHeight(), SPQ);
- if (LStall !=3D RStall) {
- DEBUG(++FactorCount[FactHeight]);
+ if (LStall !=3D RStall)
return left->getHeight() > right->getHeight();
- }
}
=20
if (!DisableSchedCriticalPath) {
@@ -2565,17 +2610,14 @@
DEBUG(dbgs() << "Depth of SU(" << left->NodeNum << "): "
<< left->getDepth() << " !=3D SU(" << right->NodeNum << "): "
<< right->getDepth() << "\n");
- DEBUG(++FactorCount[FactDepth]);
return left->getDepth() < right->getDepth();
}
}
=20
if (!DisableSchedHeight && left->getHeight() !=3D right->getHeight()) {
int spread =3D (int)left->getHeight() - (int)right->getHeight();
- if (std::abs(spread) > MaxReorderWindow) {
- DEBUG(++FactorCount[FactHeight]);
+ if (std::abs(spread) > MaxReorderWindow)
return left->getHeight() > right->getHeight();
- }
}
=20
return BURRSort(left, right, SPQ);
@@ -2584,9 +2626,10 @@
void RegReductionPQBase::initNodes(std::vector<SUnit> &sunits) {
SUnits =3D &sunits;
// Add pseudo dependency edges for two-address nodes.
- AddPseudoTwoAddrDeps();
+ if (!Disable2AddrHack)
+ AddPseudoTwoAddrDeps();
// Reroute edges to nodes with multiple uses.
- if (!TracksRegPressure)
+ if (!TracksRegPressure && !SrcOrder)
PrescheduleNodesWithMultipleUses();
// Calculate node priorities.
CalculateSethiUllmanNumbers();
@@ -2628,9 +2671,10 @@
ScheduleDAGRRList *scheduleDAG,
const TargetInstrInfo *TII,
const TargetRegisterInfo *TRI) {
- const unsigned *ImpDefs
+ const uint16_t *ImpDefs
=3D TII->get(SU->getNode()->getMachineOpcode()).getImplicitDefs();
- if(!ImpDefs)
+ const uint32_t *RegMask =3D getNodeRegMask(SU->getNode());
+ if(!ImpDefs && !RegMask)
return false;
=20
for (SUnit::const_succ_iterator SI =3D SU->Succs.begin(), SE =3D SU->Suc=
cs.end();
@@ -2641,14 +2685,18 @@
if (!PI->isAssignedRegDep())
continue;
=20
- for (const unsigned *ImpDef =3D ImpDefs; *ImpDef; ++ImpDef) {
- // Return true if SU clobbers this physical register use and the
- // definition of the register reaches from DepSU. IsReachable quer=
ies a
- // topological forward sort of the DAG (following the successors).
- if (TRI->regsOverlap(*ImpDef, PI->getReg()) &&
- scheduleDAG->IsReachable(DepSU, PI->getSUnit()))
- return true;
- }
+ if (RegMask && MachineOperand::clobbersPhysReg(RegMask, PI->getReg()=
) &&
+ scheduleDAG->IsReachable(DepSU, PI->getSUnit()))
+ return true;
+
+ if (ImpDefs)
+ for (const uint16_t *ImpDef =3D ImpDefs; *ImpDef; ++ImpDef)
+ // Return true if SU clobbers this physical register use and the
+ // definition of the register reaches from DepSU. IsReachable qu=
eries
+ // a topological forward sort of the DAG (following the successo=
rs).
+ if (TRI->regsOverlap(*ImpDef, PI->getReg()) &&
+ scheduleDAG->IsReachable(DepSU, PI->getSUnit()))
+ return true;
}
}
return false;
@@ -2661,16 +2709,17 @@
const TargetRegisterInfo *TRI) {
SDNode *N =3D SuccSU->getNode();
unsigned NumDefs =3D TII->get(N->getMachineOpcode()).getNumDefs();
- const unsigned *ImpDefs =3D TII->get(N->getMachineOpcode()).getImplicitD=
efs();
+ const uint16_t *ImpDefs =3D TII->get(N->getMachineOpcode()).getImplicitD=
efs();
assert(ImpDefs && "Caller should check hasPhysRegDefs");
for (const SDNode *SUNode =3D SU->getNode(); SUNode;
SUNode =3D SUNode->getGluedNode()) {
if (!SUNode->isMachineOpcode())
continue;
- const unsigned *SUImpDefs =3D
+ const uint16_t *SUImpDefs =3D
TII->get(SUNode->getMachineOpcode()).getImplicitDefs();
- if (!SUImpDefs)
- return false;
+ const uint32_t *SURegMask =3D getNodeRegMask(SUNode);
+ if (!SUImpDefs && !SURegMask)
+ continue;
for (unsigned i =3D NumDefs, e =3D N->getNumValues(); i !=3D e; ++i) {
EVT VT =3D N->getValueType(i);
if (VT =3D=3D MVT::Glue || VT =3D=3D MVT::Other)
@@ -2678,6 +2727,10 @@
if (!N->hasAnyUseOfValue(i))
continue;
unsigned Reg =3D ImpDefs[i - NumDefs];
+ if (SURegMask && MachineOperand::clobbersPhysReg(SURegMask, Reg))
+ return true;
+ if (!SUImpDefs)
+ continue;
for (;*SUImpDefs; ++SUImpDefs) {
unsigned SUReg =3D *SUImpDefs;
if (TRI->regsOverlap(Reg, SUReg))
@@ -2887,69 +2940,6 @@
}
}
=20
-/// LimitedSumOfUnscheduledPredsOfSuccs - Compute the sum of the unschedul=
ed
-/// predecessors of the successors of the SUnit SU. Stop when the provided
-/// limit is exceeded.
-static unsigned LimitedSumOfUnscheduledPredsOfSuccs(const SUnit *SU,
- unsigned Limit) {
- unsigned Sum =3D 0;
- for (SUnit::const_succ_iterator I =3D SU->Succs.begin(), E =3D SU->Succs=
.end();
- I !=3D E; ++I) {
- const SUnit *SuccSU =3D I->getSUnit();
- for (SUnit::const_pred_iterator II =3D SuccSU->Preds.begin(),
- EE =3D SuccSU->Preds.end(); II !=3D EE; ++II) {
- SUnit *PredSU =3D II->getSUnit();
- if (!PredSU->isScheduled)
- if (++Sum > Limit)
- return Sum;
- }
- }
- return Sum;
-}
-
-
-// Top down
-bool td_ls_rr_sort::operator()(const SUnit *left, const SUnit *right) cons=
t {
- if (int res =3D checkSpecialNodes(left, right))
- return res < 0;
-
- unsigned LPriority =3D SPQ->getNodePriority(left);
- unsigned RPriority =3D SPQ->getNodePriority(right);
- bool LIsTarget =3D left->getNode() && left->getNode()->isMachineOpcode();
- bool RIsTarget =3D right->getNode() && right->getNode()->isMachineOpcode=
();
- bool LIsFloater =3D LIsTarget && left->NumPreds =3D=3D 0;
- bool RIsFloater =3D RIsTarget && right->NumPreds =3D=3D 0;
- unsigned LBonus =3D (LimitedSumOfUnscheduledPredsOfSuccs(left,1) =3D=3D =
1) ? 2 : 0;
- unsigned RBonus =3D (LimitedSumOfUnscheduledPredsOfSuccs(right,1) =3D=3D=
1) ? 2 : 0;
-
- if (left->NumSuccs =3D=3D 0 && right->NumSuccs !=3D 0)
- return false;
- else if (left->NumSuccs !=3D 0 && right->NumSuccs =3D=3D 0)
- return true;
-
- if (LIsFloater)
- LBonus -=3D 2;
- if (RIsFloater)
- RBonus -=3D 2;
- if (left->NumSuccs =3D=3D 1)
- LBonus +=3D 2;
- if (right->NumSuccs =3D=3D 1)
- RBonus +=3D 2;
-
- if (LPriority+LBonus !=3D RPriority+RBonus)
- return LPriority+LBonus < RPriority+RBonus;
-
- if (left->getDepth() !=3D right->getDepth())
- return left->getDepth() < right->getDepth();
-
- if (left->NumSuccsLeft !=3D right->NumSuccsLeft)
- return left->NumSuccsLeft > right->NumSuccsLeft;
-
- assert(left->NodeQueueId && right->NodeQueueId &&
- "NodeQueueId cannot be zero");
- return (left->NodeQueueId > right->NodeQueueId);
-}
-
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
// Public Constructor Functions
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -2962,21 +2952,7 @@
const TargetRegisterInfo *TRI =3D TM.getRegisterInfo();
=20
BURegReductionPriorityQueue *PQ =3D
- new BURegReductionPriorityQueue(*IS->MF, false, TII, TRI, 0);
- ScheduleDAGRRList *SD =3D new ScheduleDAGRRList(*IS->MF, false, PQ, OptL=
evel);
- PQ->setScheduleDAG(SD);
- return SD;
-}
-
-llvm::ScheduleDAGSDNodes *
-llvm::createTDRRListDAGScheduler(SelectionDAGISel *IS,
- CodeGenOpt::Level OptLevel) {
- const TargetMachine &TM =3D IS->TM;
- const TargetInstrInfo *TII =3D TM.getInstrInfo();
- const TargetRegisterInfo *TRI =3D TM.getRegisterInfo();
-
- TDRegReductionPriorityQueue *PQ =3D
- new TDRegReductionPriorityQueue(*IS->MF, false, TII, TRI, 0);
+ new BURegReductionPriorityQueue(*IS->MF, false, false, TII, TRI, 0);
ScheduleDAGRRList *SD =3D new ScheduleDAGRRList(*IS->MF, false, PQ, OptL=
evel);
PQ->setScheduleDAG(SD);
return SD;
@@ -2990,7 +2966,7 @@
const TargetRegisterInfo *TRI =3D TM.getRegisterInfo();
=20
SrcRegReductionPriorityQueue *PQ =3D
- new SrcRegReductionPriorityQueue(*IS->MF, false, TII, TRI, 0);
+ new SrcRegReductionPriorityQueue(*IS->MF, false, true, TII, TRI, 0);
ScheduleDAGRRList *SD =3D new ScheduleDAGRRList(*IS->MF, false, PQ, OptL=
evel);
PQ->setScheduleDAG(SD);
return SD;
@@ -3005,7 +2981,7 @@
const TargetLowering *TLI =3D &IS->getTargetLowering();
=20
HybridBURRPriorityQueue *PQ =3D
- new HybridBURRPriorityQueue(*IS->MF, true, TII, TRI, TLI);
+ new HybridBURRPriorityQueue(*IS->MF, true, false, TII, TRI, TLI);
=20
ScheduleDAGRRList *SD =3D new ScheduleDAGRRList(*IS->MF, true, PQ, OptLe=
vel);
PQ->setScheduleDAG(SD);
@@ -3021,7 +2997,7 @@
const TargetLowering *TLI =3D &IS->getTargetLowering();
=20
ILPBURRPriorityQueue *PQ =3D
- new ILPBURRPriorityQueue(*IS->MF, true, TII, TRI, TLI);
+ new ILPBURRPriorityQueue(*IS->MF, true, false, TII, TRI, TLI);
ScheduleDAGRRList *SD =3D new ScheduleDAGRRList(*IS->MF, true, PQ, OptLe=
vel);
PQ->setScheduleDAG(SD);
return SD;
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/ScheduleDAGSDNodes.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Tue=
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Tue=
Apr 17 11:51:51 2012 +0300
@@ -17,6 +17,8 @@
#include "ScheduleDAGSDNodes.h"
#include "InstrEmitter.h"
#include "llvm/CodeGen/SelectionDAG.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetInstrInfo.h"
@@ -44,20 +46,26 @@
"instructions take for targets with no itinerary"));
=20
ScheduleDAGSDNodes::ScheduleDAGSDNodes(MachineFunction &mf)
- : ScheduleDAG(mf),
+ : ScheduleDAG(mf), BB(0), DAG(0),
InstrItins(mf.getTarget().getInstrItineraryData()) {}
=20
/// Run - perform scheduling.
///
-void ScheduleDAGSDNodes::Run(SelectionDAG *dag, MachineBasicBlock *bb,
- MachineBasicBlock::iterator insertPos) {
+void ScheduleDAGSDNodes::Run(SelectionDAG *dag, MachineBasicBlock *bb) {
+ BB =3D bb;
DAG =3D dag;
- ScheduleDAG::Run(bb, insertPos);
+
+ // Clear the scheduler's SUnit DAG.
+ ScheduleDAG::clearDAG();
+ Sequence.clear();
+
+ // Invoke the target's selection of scheduler.
+ Schedule();
}
=20
/// NewSUnit - Creates a new SUnit and return a ptr to it.
///
-SUnit *ScheduleDAGSDNodes::NewSUnit(SDNode *N) {
+SUnit *ScheduleDAGSDNodes::newSUnit(SDNode *N) {
#ifndef NDEBUG
const SUnit *Addr =3D 0;
if (!SUnits.empty())
@@ -79,7 +87,7 @@
}
=20
SUnit *ScheduleDAGSDNodes::Clone(SUnit *Old) {
- SUnit *SU =3D NewSUnit(Old->getNode());
+ SUnit *SU =3D newSUnit(Old->getNode());
SU->OrigNode =3D Old->OrigNode;
SU->Latency =3D Old->Latency;
SU->isVRegCycle =3D Old->isVRegCycle;
@@ -302,7 +310,7 @@
// If this node has already been processed, stop now.
if (NI->getNodeId() !=3D -1) continue;
=20
- SUnit *NodeSUnit =3D NewSUnit(NI);
+ SUnit *NodeSUnit =3D newSUnit(NI);
=20
// See if anything is glued to this node, if so, add them to glued
// nodes. Nodes can have at most one glue input and one glue output. =
Glue
@@ -360,7 +368,7 @@
InitNumRegDefsLeft(NodeSUnit);
=20
// Assign the Latency field of NodeSUnit using target-provided informa=
tion.
- ComputeLatency(NodeSUnit);
+ computeLatency(NodeSUnit);
}
=20
// Find all call operands.
@@ -382,7 +390,7 @@
const TargetSubtargetInfo &ST =3D TM.getSubtarget<TargetSubtargetInfo>();
=20
// Check to see if the scheduler cares about latencies.
- bool UnitLatencies =3D ForceUnitLatencies();
+ bool UnitLatencies =3D forceUnitLatencies();
=20
// Pass 2: add the preds, succs, etc.
for (unsigned su =3D 0, e =3D SUnits.size(); su !=3D e; ++su) {
@@ -448,7 +456,7 @@
const SDep &dep =3D SDep(OpSU, isChain ? SDep::Order : SDep::Data,
OpLatency, PhysReg);
if (!isChain && !UnitLatencies) {
- ComputeOperandLatency(OpN, N, i, const_cast<SDep &>(dep));
+ computeOperandLatency(OpN, N, i, const_cast<SDep &>(dep));
ST.adjustSchedDependency(OpSU, SU, const_cast<SDep &>(dep));
}
=20
@@ -541,7 +549,7 @@
}
}
=20
-void ScheduleDAGSDNodes::ComputeLatency(SUnit *SU) {
+void ScheduleDAGSDNodes::computeLatency(SUnit *SU) {
SDNode *N =3D SU->getNode();
=20
// TokenFactor operands are considered zero latency, and some schedulers
@@ -553,7 +561,7 @@
}
=20
// Check to see if the scheduler cares about latencies.
- if (ForceUnitLatencies()) {
+ if (forceUnitLatencies()) {
SU->Latency =3D 1;
return;
}
@@ -575,10 +583,10 @@
SU->Latency +=3D TII->getInstrLatency(InstrItins, N);
}
=20
-void ScheduleDAGSDNodes::ComputeOperandLatency(SDNode *Def, SDNode *Use,
+void ScheduleDAGSDNodes::computeOperandLatency(SDNode *Def, SDNode *Use,
unsigned OpIdx, SDep& dep) =
const{
// Check to see if the scheduler cares about latencies.
- if (ForceUnitLatencies())
+ if (forceUnitLatencies())
return;
=20
if (dep.getKind() !=3D SDep::Data)
@@ -621,6 +629,30 @@
}
}
=20
+void ScheduleDAGSDNodes::dumpSchedule() const {
+ for (unsigned i =3D 0, e =3D Sequence.size(); i !=3D e; i++) {
+ if (SUnit *SU =3D Sequence[i])
+ SU->dump(this);
+ else
+ dbgs() << "**** NOOP ****\n";
+ }
+}
+
+#ifndef NDEBUG
+/// VerifyScheduledSequence - Verify that all SUnits were scheduled and th=
at
+/// their state is consistent with the nodes listed in Sequence.
+///
+void ScheduleDAGSDNodes::VerifyScheduledSequence(bool isBottomUp) {
+ unsigned ScheduledNodes =3D ScheduleDAG::VerifyScheduledDAG(isBottomUp);
+ unsigned Noops =3D 0;
+ for (unsigned i =3D 0, e =3D Sequence.size(); i !=3D e; ++i)
+ if (!Sequence[i])
+ ++Noops;
+ assert(Sequence.size() - Noops =3D=3D ScheduledNodes &&
+ "The number of nodes scheduled doesn't match the expected number!=
");
+}
+#endif // NDEBUG
+
namespace {
struct OrderSorter {
bool operator()(const std::pair<unsigned, MachineInstr*> &A,
@@ -686,9 +718,48 @@
ProcessSDDbgValues(N, DAG, Emitter, Orders, VRBaseMap, Order);
}
=20
+void ScheduleDAGSDNodes::
+EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, unsigned> &VRBaseMap,
+ MachineBasicBlock::iterator InsertPos) {
+ for (SUnit::const_pred_iterator I =3D SU->Preds.begin(), E =3D SU->Preds=
.end();
+ I !=3D E; ++I) {
+ if (I->isCtrl()) continue; // ignore chain preds
+ if (I->getSUnit()->CopyDstRC) {
+ // Copy to physical register.
+ DenseMap<SUnit*, unsigned>::iterator VRI =3D VRBaseMap.find(I->getSU=
nit());
+ assert(VRI !=3D VRBaseMap.end() && "Node emitted out of order - late=
");
+ // Find the destination physical register.
+ unsigned Reg =3D 0;
+ for (SUnit::const_succ_iterator II =3D SU->Succs.begin(),
+ EE =3D SU->Succs.end(); II !=3D EE; ++II) {
+ if (II->isCtrl()) continue; // ignore chain preds
+ if (II->getReg()) {
+ Reg =3D II->getReg();
+ break;
+ }
+ }
+ BuildMI(*BB, InsertPos, DebugLoc(), TII->get(TargetOpcode::COPY), Re=
g)
+ .addReg(VRI->second);
+ } else {
+ // Copy from physical register.
+ assert(I->getReg() && "Unknown physical register!");
+ unsigned VRBase =3D MRI.createVirtualRegister(SU->CopyDstRC);
+ bool isNew =3D VRBaseMap.insert(std::make_pair(SU, VRBase)).second;
+ (void)isNew; // Silence compiler warning.
+ assert(isNew && "Node emitted out of order - early");
+ BuildMI(*BB, InsertPos, DebugLoc(), TII->get(TargetOpcode::COPY), VR=
Base)
+ .addReg(I->getReg());
+ }
+ break;
+ }
+}
=20
-/// EmitSchedule - Emit the machine code in scheduled order.
-MachineBasicBlock *ScheduleDAGSDNodes::EmitSchedule() {
+/// EmitSchedule - Emit the machine code in scheduled order. Return the new
+/// InsertPos and MachineBasicBlock that contains this insertion
+/// point. ScheduleDAGSDNodes holds a BB pointer for convenience, but this=
does
+/// not necessarily refer to returned BB. The emitter may split blocks.
+MachineBasicBlock *ScheduleDAGSDNodes::
+EmitSchedule(MachineBasicBlock::iterator &InsertPos) {
InstrEmitter Emitter(BB, InsertPos);
DenseMap<SDValue, unsigned> VRBaseMap;
DenseMap<SUnit*, unsigned> CopyVRBaseMap;
@@ -711,7 +782,7 @@
SUnit *SU =3D Sequence[i];
if (!SU) {
// Null SUnit* is a noop.
- EmitNoop();
+ TII->insertNoop(*Emitter.getBlock(), InsertPos);
continue;
}
=20
@@ -719,7 +790,7 @@
// SDNode and any glued SDNodes and append them to the block.
if (!SU->getNode()) {
// Emit a copy.
- EmitPhysRegCopy(SU, CopyVRBaseMap);
+ EmitPhysRegCopy(SU, CopyVRBaseMap, InsertPos);
continue;
}
=20
@@ -784,19 +855,24 @@
}
// Add trailing DbgValue's before the terminator. FIXME: May want to a=
dd
// some of them before one or more conditional branches?
+ SmallVector<MachineInstr*, 8> DbgMIs;
while (DI !=3D DE) {
- MachineBasicBlock *InsertBB =3D Emitter.getBlock();
- MachineBasicBlock::iterator Pos=3D Emitter.getBlock()->getFirstTermi=
nator();
- if (!(*DI)->isInvalidated()) {
- MachineInstr *DbgMI=3D Emitter.EmitDbgValue(*DI, VRBaseMap);
- if (DbgMI)
- InsertBB->insert(Pos, DbgMI);
- }
+ if (!(*DI)->isInvalidated())
+ if (MachineInstr *DbgMI =3D Emitter.EmitDbgValue(*DI, VRBaseMap))
+ DbgMIs.push_back(DbgMI);
++DI;
}
+
+ MachineBasicBlock *InsertBB =3D Emitter.getBlock();
+ MachineBasicBlock::iterator Pos =3D InsertBB->getFirstTerminator();
+ InsertBB->insert(Pos, DbgMIs.begin(), DbgMIs.end());
}
=20
- BB =3D Emitter.getBlock();
InsertPos =3D Emitter.getInsertPos();
- return BB;
+ return Emitter.getBlock();
}
+
+/// Return the basic block label.
+std::string ScheduleDAGSDNodes::getDAGName() const {
+ return "sunit-dag." + BB->getFullName();
+}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/ScheduleDAGSDNodes.h
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h Tue A=
pr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h Tue A=
pr 17 11:51:51 2012 +0300
@@ -35,17 +35,20 @@
///
class ScheduleDAGSDNodes : public ScheduleDAG {
public:
+ MachineBasicBlock *BB;
SelectionDAG *DAG; // DAG of the current basic block
const InstrItineraryData *InstrItins;
=20
+ /// The schedule. Null SUnit*'s represent noop instructions.
+ std::vector<SUnit*> Sequence;
+
explicit ScheduleDAGSDNodes(MachineFunction &mf);
=20
virtual ~ScheduleDAGSDNodes() {}
=20
/// Run - perform scheduling.
///
- void Run(SelectionDAG *dag, MachineBasicBlock *bb,
- MachineBasicBlock::iterator insertPos);
+ void Run(SelectionDAG *dag, MachineBasicBlock *bb);
=20
/// isPassiveNode - Return true if the node is a non-scheduled leaf.
///
@@ -53,6 +56,7 @@
if (isa<ConstantSDNode>(Node)) return true;
if (isa<ConstantFPSDNode>(Node)) return true;
if (isa<RegisterSDNode>(Node)) return true;
+ if (isa<RegisterMaskSDNode>(Node)) return true;
if (isa<GlobalAddressSDNode>(Node)) return true;
if (isa<BasicBlockSDNode>(Node)) return true;
if (isa<FrameIndexSDNode>(Node)) return true;
@@ -67,7 +71,7 @@
=20
/// NewSUnit - Creates a new SUnit and return a ptr to it.
///
- SUnit *NewSUnit(SDNode *N);
+ SUnit *newSUnit(SDNode *N);
=20
/// Clone - Creates a clone of the specified SUnit. It does not copy t=
he
/// predecessors / successors info nor the temporary scheduling states.
@@ -78,7 +82,7 @@
/// are input. This SUnit graph is similar to the SelectionDAG, but
/// excludes nodes that aren't interesting to scheduling, and represen=
ts
/// flagged together nodes with a single SUnit.
- virtual void BuildSchedGraph(AliasAnalysis *AA);
+ void BuildSchedGraph(AliasAnalysis *AA);
=20
/// InitVRegCycleFlag - Set isVRegCycle if this node's single use is
/// CopyToReg and its only active data operands are CopyFromReg within=
a
@@ -90,30 +94,41 @@
///
void InitNumRegDefsLeft(SUnit *SU);
=20
- /// ComputeLatency - Compute node latency.
+ /// computeLatency - Compute node latency.
///
- virtual void ComputeLatency(SUnit *SU);
+ virtual void computeLatency(SUnit *SU);
=20
- /// ComputeOperandLatency - Override dependence edge latency using
+ /// computeOperandLatency - Override dependence edge latency using
/// operand use/def information
///
- virtual void ComputeOperandLatency(SUnit *Def, SUnit *Use,
+ virtual void computeOperandLatency(SUnit *Def, SUnit *Use,
SDep& dep) const { }
=20
- virtual void ComputeOperandLatency(SDNode *Def, SDNode *Use,
+ virtual void computeOperandLatency(SDNode *Def, SDNode *Use,
unsigned OpIdx, SDep& dep) const;
=20
- virtual MachineBasicBlock *EmitSchedule();
-
/// Schedule - Order nodes according to selected style, filling
/// in the Sequence member.
///
virtual void Schedule() =3D 0;
=20
+ /// VerifyScheduledSequence - Verify that all SUnits are scheduled and
+ /// consistent with the Sequence of scheduled instructions.
+ void VerifyScheduledSequence(bool isBottomUp);
+
+ /// EmitSchedule - Insert MachineInstrs into the MachineBasicBlock
+ /// according to the order specified in Sequence.
+ ///
+ MachineBasicBlock *EmitSchedule(MachineBasicBlock::iterator &InsertPos=
);
+
virtual void dumpNode(const SUnit *SU) const;
=20
+ void dumpSchedule() const;
+
virtual std::string getGraphNodeLabel(const SUnit *SU) const;
=20
+ virtual std::string getDAGName() const;
+
virtual void getCustomGraphFeatures(GraphWriter<ScheduleDAG*> &GW) con=
st;
=20
/// RegDefIter - In place iteration over the values defined by an
@@ -159,6 +174,9 @@
/// BuildSchedUnits, AddSchedEdges - Helper functions for BuildSchedGr=
aph.
void BuildSchedUnits();
void AddSchedEdges();
+
+ void EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, unsigned> &VRBaseMap,
+ MachineBasicBlock::iterator InsertPos);
};
}
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/SelectionDAG.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Apr 1=
7 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Apr 1=
7 11:51:51 2012 +0300
@@ -28,7 +28,6 @@
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
-#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetLowering.h"
@@ -63,6 +62,7 @@
static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
switch (VT.getSimpleVT().SimpleTy) {
default: llvm_unreachable("Unknown FP format");
+ case MVT::f16: return &APFloat::IEEEhalf;
case MVT::f32: return &APFloat::IEEEsingle;
case MVT::f64: return &APFloat::IEEEdouble;
case MVT::f80: return &APFloat::x87DoubleExtended;
@@ -125,20 +125,29 @@
if (i =3D=3D e) return false;
=20
// Do not accept build_vectors that aren't all constants or which have n=
on-~0
- // elements.
+ // elements. We have to be a bit careful here, as the type of the consta=
nt
+ // may not be the same as the type of the vector elements due to type
+ // legalization (the elements are promoted to a legal type for the targe=
t and
+ // a vector of a type may be legal when the base element type is not).
+ // We only want to check enough bits to cover the vector elements, becau=
se
+ // we care if the resultant vector is all ones, not whether the individu=
al
+ // constants are.
SDValue NotZero =3D N->getOperand(i);
+ unsigned EltSize =3D N->getValueType(0).getVectorElementType().getSizeIn=
Bits();
if (isa<ConstantSDNode>(NotZero)) {
- if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
+ if (cast<ConstantSDNode>(NotZero)->getAPIntValue().countTrailingOnes()=
<
+ EltSize)
return false;
} else if (isa<ConstantFPSDNode>(NotZero)) {
- if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
- bitcastToAPInt().isAllOnesValue())
+ if (cast<ConstantFPSDNode>(NotZero)->getValueAPF()
+ .bitcastToAPInt().countTrailingOnes() < EltSize)
return false;
} else
return false;
=20
// Okay, we have at least one ~0 value, check to see if the rest match o=
r are
- // undefs.
+ // undefs. Even with the above element type twiddling, this should be OK=
, as
+ // the same type legalization should have applied to all the elements.
for (++i; i !=3D e; ++i)
if (N->getOperand(i) !=3D NotZero &&
N->getOperand(i).getOpcode() !=3D ISD::UNDEF)
@@ -384,7 +393,9 @@
case ISD::Register:
ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
break;
-
+ case ISD::RegisterMask:
+ ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
+ break;
case ISD::SRCVALUE:
ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
break;
@@ -475,7 +486,7 @@
///
static inline unsigned
encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
- bool isNonTemporal) {
+ bool isNonTemporal, bool isInvariant) {
assert((ConvType & 3) =3D=3D ConvType &&
"ConvType may not require more than 2 bits!");
assert((AM & 7) =3D=3D AM &&
@@ -483,7 +494,8 @@
return ConvType |
(AM << 2) |
(isVolatile << 5) |
- (isNonTemporal << 6);
+ (isNonTemporal << 6) |
+ (isInvariant << 7);
}
=20
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
@@ -564,6 +576,12 @@
=20
void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateList=
ener){
SmallVector<SDNode*, 16> DeadNodes(1, N);
+
+ // Create a dummy node that adds a reference to the root node, preventing
+ // it from being deleted. (This matters if the root is an operand of the
+ // dead node.)
+ HandleSDNode Dummy(getRoot());
+
RemoveDeadNodes(DeadNodes, UpdateListener);
}
=20
@@ -834,9 +852,9 @@
}
=20
// EntryNode could meaningfully have debug info if we can find it...
-SelectionDAG::SelectionDAG(const TargetMachine &tm)
+SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
: TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
- EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
+ OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Ot=
her)),
Root(getEntryNode()), Ordering(0) {
AllNodes.push_back(&EntryNode);
Ordering =3D new SDNodeOrdering();
@@ -1025,16 +1043,14 @@
return getConstantFP(APFloat((float)Val), VT, isTarget);
else if (EltVT=3D=3DMVT::f64)
return getConstantFP(APFloat(Val), VT, isTarget);
- else if (EltVT=3D=3DMVT::f80 || EltVT=3D=3DMVT::f128) {
+ else if (EltVT=3D=3DMVT::f80 || EltVT=3D=3DMVT::f128 || EltVT=3D=3DMVT::=
f16) {
bool ignored;
APFloat apf =3D APFloat(Val);
apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEve=
n,
&ignored);
return getConstantFP(apf, VT, isTarget);
- } else {
- assert(0 && "Unsupported type in getConstantFP");
- return SDValue();
- }
+ } else
+ llvm_unreachable("Unsupported type in getConstantFP");
}
=20
SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
@@ -1369,6 +1385,20 @@
return SDValue(N, 0);
}
=20
+SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
+ FoldingSetNodeID ID;
+ AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
+ ID.AddPointer(RegMask);
+ void *IP =3D 0;
+ if (SDNode *E =3D CSEMap.FindNodeOrInsertPos(ID, IP))
+ return SDValue(E, 0);
+
+ SDNode *N =3D new (NodeAllocator) RegisterMaskSDNode(RegMask);
+ CSEMap.InsertNode(N, IP);
+ AllNodes.push_back(N);
+ return SDValue(N, 0);
+}
+
SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Labe=
l) {
FoldingSetNodeID ID;
SDValue Ops[] =3D { Root };
@@ -1598,7 +1628,7 @@
bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
unsigned Depth) const {
APInt KnownZero, KnownOne;
- ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
+ ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND zero=
?");
return (KnownZero & Mask) =3D=3D Mask;
}
@@ -1607,15 +1637,12 @@
/// known to be either zero or one and return them in the KnownZero/KnownO=
ne
/// bitsets. This code only analyzes bits in Mask, in order to short-circ=
uit
/// processing.
-void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
- APInt &KnownZero, APInt &KnownOne,
- unsigned Depth) const {
- unsigned BitWidth =3D Mask.getBitWidth();
- assert(BitWidth =3D=3D Op.getValueType().getScalarType().getSizeInBits()=
&&
- "Mask size mismatches value type size!");
+void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
+ APInt &KnownOne, unsigned Depth) cons=
t {
+ unsigned BitWidth =3D Op.getValueType().getScalarType().getSizeInBits();
=20
KnownZero =3D KnownOne =3D APInt(BitWidth, 0); // Don't know anything.
- if (Depth =3D=3D 6 || Mask =3D=3D 0)
+ if (Depth =3D=3D 6)
return; // Limit search depth.
=20
APInt KnownZero2, KnownOne2;
@@ -1623,14 +1650,13 @@
switch (Op.getOpcode()) {
case ISD::Constant:
// We know all of the bits for a constant!
- KnownOne =3D cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
- KnownZero =3D ~KnownOne & Mask;
+ KnownOne =3D cast<ConstantSDNode>(Op)->getAPIntValue();
+ KnownZero =3D ~KnownOne;
return;
case ISD::AND:
// If either the LHS or the RHS are Zero, the result is zero.
- ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1=
);
- ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
- KnownZero2, KnownOne2, Depth+1);
+ ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND ze=
ro?");
assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND =
zero?");
=20
@@ -1640,9 +1666,8 @@
KnownZero |=3D KnownZero2;
return;
case ISD::OR:
- ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1=
);
- ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
- KnownZero2, KnownOne2, Depth+1);
+ ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND ze=
ro?");
assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND =
zero?");
=20
@@ -1652,8 +1677,8 @@
KnownOne |=3D KnownOne2;
return;
case ISD::XOR: {
- ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1=
);
- ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth=
+1);
+ ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND ze=
ro?");
assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND =
zero?");
=20
@@ -1665,9 +1690,8 @@
return;
}
case ISD::MUL: {
- APInt Mask2 =3D APInt::getAllOnesValue(BitWidth);
- ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+=
1);
- ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Dept=
h+1);
+ ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND ze=
ro?");
assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND =
zero?");
=20
@@ -1686,33 +1710,29 @@
LeadZ =3D std::min(LeadZ, BitWidth);
KnownZero =3D APInt::getLowBitsSet(BitWidth, TrailZ) |
APInt::getHighBitsSet(BitWidth, LeadZ);
- KnownZero &=3D Mask;
return;
}
case ISD::UDIV: {
// For the purposes of computing leading zeros we can conservatively
// treat a udiv as a logical right shift by the power of 2 known to
// be less than the denominator.
- APInt AllOnes =3D APInt::getAllOnesValue(BitWidth);
- ComputeMaskedBits(Op.getOperand(0),
- AllOnes, KnownZero2, KnownOne2, Depth+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
unsigned LeadZ =3D KnownZero2.countLeadingOnes();
=20
KnownOne2.clearAllBits();
KnownZero2.clearAllBits();
- ComputeMaskedBits(Op.getOperand(1),
- AllOnes, KnownZero2, KnownOne2, Depth+1);
+ ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
unsigned RHSUnknownLeadingOnes =3D KnownOne2.countLeadingZeros();
if (RHSUnknownLeadingOnes !=3D BitWidth)
LeadZ =3D std::min(BitWidth,
LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
=20
- KnownZero =3D APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
+ KnownZero =3D APInt::getHighBitsSet(BitWidth, LeadZ);
return;
}
case ISD::SELECT:
- ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1=
);
- ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth=
+1);
+ ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
+ ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND ze=
ro?");
assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND =
zero?");
=20
@@ -1721,8 +1741,8 @@
KnownZero &=3D KnownZero2;
return;
case ISD::SELECT_CC:
- ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1=
);
- ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth=
+1);
+ ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
+ ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND ze=
ro?");
assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND =
zero?");
=20
@@ -1754,8 +1774,7 @@
if (ShAmt >=3D BitWidth)
return;
=20
- ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
- KnownZero, KnownOne, Depth+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND =
zero?");
KnownZero <<=3D ShAmt;
KnownOne <<=3D ShAmt;
@@ -1772,13 +1791,12 @@
if (ShAmt >=3D BitWidth)
return;
=20
- ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
- KnownZero, KnownOne, Depth+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND =
zero?");
KnownZero =3D KnownZero.lshr(ShAmt);
KnownOne =3D KnownOne.lshr(ShAmt);
=20
- APInt HighBits =3D APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
+ APInt HighBits =3D APInt::getHighBitsSet(BitWidth, ShAmt);
KnownZero |=3D HighBits; // High bits known zero.
}
return;
@@ -1790,15 +1808,11 @@
if (ShAmt >=3D BitWidth)
return;
=20
- APInt InDemandedMask =3D (Mask << ShAmt);
// If any of the demanded bits are produced by the sign extension, w=
e also
// demand the input sign bit.
- APInt HighBits =3D APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
- if (HighBits.getBoolValue())
- InDemandedMask |=3D APInt::getSignBit(BitWidth);
-
- ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, Known=
One,
- Depth+1);
+ APInt HighBits =3D APInt::getHighBitsSet(BitWidth, ShAmt);
+
+ ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND =
zero?");
KnownZero =3D KnownZero.lshr(ShAmt);
KnownOne =3D KnownOne.lshr(ShAmt);
@@ -1820,10 +1834,10 @@
=20
// Sign extension. Compute the demanded bits in the result that are n=
ot
// present in the input.
- APInt NewBits =3D APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & =
Mask;
+ APInt NewBits =3D APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
=20
APInt InSignBit =3D APInt::getSignBit(EBits);
- APInt InputDemandedBits =3D Mask & APInt::getLowBitsSet(BitWidth, EBit=
s);
+ APInt InputDemandedBits =3D APInt::getLowBitsSet(BitWidth, EBits);
=20
// If the sign extended bits are demanded, we know that the sign
// bit is demanded.
@@ -1831,8 +1845,9 @@
if (NewBits.getBoolValue())
InputDemandedBits |=3D InSignBit;
=20
- ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
- KnownZero, KnownOne, Depth+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
+ KnownOne &=3D InputDemandedBits;
+ KnownZero &=3D InputDemandedBits;
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND ze=
ro?");
=20
// If the sign bit of the input is known set or clear, then we know the
@@ -1850,7 +1865,9 @@
return;
}
case ISD::CTTZ:
+ case ISD::CTTZ_ZERO_UNDEF:
case ISD::CTLZ:
+ case ISD::CTLZ_ZERO_UNDEF:
case ISD::CTPOP: {
unsigned LowBits =3D Log2_32(BitWidth)+1;
KnownZero =3D APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
@@ -1858,22 +1875,23 @@
return;
}
case ISD::LOAD: {
+ LoadSDNode *LD =3D cast<LoadSDNode>(Op);
if (ISD::isZEXTLoad(Op.getNode())) {
- LoadSDNode *LD =3D cast<LoadSDNode>(Op);
EVT VT =3D LD->getMemoryVT();
unsigned MemBits =3D VT.getScalarType().getSizeInBits();
- KnownZero |=3D APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) &=
Mask;
+ KnownZero |=3D APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
+ } else if (const MDNode *Ranges =3D LD->getRanges()) {
+ computeMaskedBitsLoad(*Ranges, KnownZero);
}
return;
}
case ISD::ZERO_EXTEND: {
EVT InVT =3D Op.getOperand(0).getValueType();
unsigned InBits =3D InVT.getScalarType().getSizeInBits();
- APInt NewBits =3D APInt::getHighBitsSet(BitWidth, BitWidth - InBits)=
& Mask;
- APInt InMask =3D Mask.trunc(InBits);
+ APInt NewBits =3D APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
KnownZero =3D KnownZero.trunc(InBits);
KnownOne =3D KnownOne.trunc(InBits);
- ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth=
+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
KnownZero =3D KnownZero.zext(BitWidth);
KnownOne =3D KnownOne.zext(BitWidth);
KnownZero |=3D NewBits;
@@ -1883,17 +1901,11 @@
EVT InVT =3D Op.getOperand(0).getValueType();
unsigned InBits =3D InVT.getScalarType().getSizeInBits();
APInt InSignBit =3D APInt::getSignBit(InBits);
- APInt NewBits =3D APInt::getHighBitsSet(BitWidth, BitWidth - InBits)=
& Mask;
- APInt InMask =3D Mask.trunc(InBits);
-
- // If any of the sign extended bits are demanded, we know that the sign
- // bit is demanded. Temporarily set this bit in the mask for our calle=
e.
- if (NewBits.getBoolValue())
- InMask |=3D InSignBit;
+ APInt NewBits =3D APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
=20
KnownZero =3D KnownZero.trunc(InBits);
KnownOne =3D KnownOne.trunc(InBits);
- ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth=
+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
=20
// Note if the sign bit is known to be zero or one.
bool SignBitKnownZero =3D KnownZero.isNegative();
@@ -1901,13 +1913,6 @@
assert(!(SignBitKnownZero && SignBitKnownOne) &&
"Sign bit can't be known to be both zero and one!");
=20
- // If the sign bit wasn't actually demanded by our caller, we don't
- // want it set in the KnownZero and KnownOne result values. Reset the
- // mask and reapply it to the result values.
- InMask =3D Mask.trunc(InBits);
- KnownZero &=3D InMask;
- KnownOne &=3D InMask;
-
KnownZero =3D KnownZero.zext(BitWidth);
KnownOne =3D KnownOne.zext(BitWidth);
=20
@@ -1921,10 +1926,9 @@
case ISD::ANY_EXTEND: {
EVT InVT =3D Op.getOperand(0).getValueType();
unsigned InBits =3D InVT.getScalarType().getSizeInBits();
- APInt InMask =3D Mask.trunc(InBits);
KnownZero =3D KnownZero.trunc(InBits);
KnownOne =3D KnownOne.trunc(InBits);
- ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth=
+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
KnownZero =3D KnownZero.zext(BitWidth);
KnownOne =3D KnownOne.zext(BitWidth);
return;
@@ -1932,10 +1936,9 @@
case ISD::TRUNCATE: {
EVT InVT =3D Op.getOperand(0).getValueType();
unsigned InBits =3D InVT.getScalarType().getSizeInBits();
- APInt InMask =3D Mask.zext(InBits);
KnownZero =3D KnownZero.zext(InBits);
KnownOne =3D KnownOne.zext(InBits);
- ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth=
+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
assert((KnownZero & KnownOne) =3D=3D 0 && "Bits known to be one AND ze=
ro?");
KnownZero =3D KnownZero.trunc(BitWidth);
KnownOne =3D KnownOne.trunc(BitWidth);
@@ -1944,9 +1947,8 @@
case ISD::AssertZext: {
EVT VT =3D cast<VTSDNode>(Op.getOperand(1))->getVT();
APInt InMask =3D APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
- ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
- KnownOne, Depth+1);
- KnownZero |=3D (~InMask) & Mask;
+ ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
+ KnownZero |=3D (~InMask);
return;
}
case ISD::FGETSIGN:
@@ -1963,8 +1965,7 @@
unsigned NLZ =3D (CLHS->getAPIntValue()+1).countLeadingZeros();
// NLZ can't be BitWidth with no sign bit
APInt MaskV =3D APInt::getHighBitsSet(BitWidth, NLZ+1);
- ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
- Depth+1);
+ ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1=
);
=20
// If all of the MaskV bits are known to be zero, then we know the
// output top bits are zero, because we now know that the output is
@@ -1972,7 +1973,7 @@
if ((KnownZero2 & MaskV) =3D=3D MaskV) {
unsigned NLZ2 =3D CLHS->getAPIntValue().countLeadingZeros();
// Top bits known zero.
- KnownZero =3D APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
+ KnownZero =3D APInt::getHighBitsSet(BitWidth, NLZ2);
}
}
}
@@ -1983,13 +1984,11 @@
// Output known-0 bits are known if clear or set in both the low clear=
bits
// common to both LHS & RHS. For example, 8+(X<<3) is known to have t=
he
// low 3 bits clear.
- APInt Mask2 =3D APInt::getLowBitsSet(BitWidth,
- BitWidth - Mask.countLeadingZeros()=
);
- ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Dept=
h+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND =
zero?");
unsigned KnownZeroOut =3D KnownZero2.countTrailingOnes();
=20
- ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Dept=
h+1);
+ ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
assert((KnownZero2 & KnownOne2) =3D=3D 0 && "Bits known to be one AND =
zero?");
KnownZeroOut =3D std::min(KnownZeroOut,
KnownZero2.countTrailingOnes());
@@ -2013,7 +2012,7 @@
if (RA.isPowerOf2()) {
APInt LowBits =3D RA - 1;
APInt Mask2 =3D LowBits | APInt::getSignBit(BitWidth);
- ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Dep=
th+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
=20
// The low bits of the first operand are unchanged by the srem.
KnownZero =3D KnownZero2 & LowBits;
@@ -2028,10 +2027,6 @@
// the upper bits are all one.
if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) !=3D 0))
KnownOne |=3D ~LowBits;
-
- KnownZero &=3D Mask;
- KnownOne &=3D Mask;
-
assert((KnownZero & KnownOne) =3D=3D 0&&"Bits known to be one AND =
zero?");
}
}
@@ -2041,9 +2036,8 @@
const APInt &RA =3D Rem->getAPIntValue();
if (RA.isPowerOf2()) {
APInt LowBits =3D (RA - 1);
- APInt Mask2 =3D LowBits & Mask;
- KnownZero |=3D ~LowBits & Mask;
- ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Dep=
th+1);
+ KnownZero |=3D ~LowBits;
+ ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
assert((KnownZero & KnownOne) =3D=3D 0&&"Bits known to be one AND =
zero?");
break;
}
@@ -2051,16 +2045,13 @@
=20
// Since the result is less than or equal to either operand, any leadi=
ng
// zero bits in either operand must also exist in the result.
- APInt AllOnes =3D APInt::getAllOnesValue(BitWidth);
- ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
- Depth+1);
- ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
- Depth+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
+ ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
=20
uint32_t Leaders =3D std::max(KnownZero.countLeadingOnes(),
KnownZero2.countLeadingOnes());
KnownOne.clearAllBits();
- KnownZero =3D APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
+ KnownZero =3D APInt::getHighBitsSet(BitWidth, Leaders);
return;
}
case ISD::FrameIndex:
@@ -2080,8 +2071,7 @@
case ISD::INTRINSIC_W_CHAIN:
case ISD::INTRINSIC_VOID:
// Allow the target to implement this method for its nodes.
- TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *thi=
s,
- Depth);
+ TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Dep=
th);
return;
}
}
@@ -2205,12 +2195,11 @@
if (ConstantSDNode *CRHS =3D dyn_cast<ConstantSDNode>(Op.getOperand(1)=
))
if (CRHS->isAllOnesValue()) {
APInt KnownZero, KnownOne;
- APInt Mask =3D APInt::getAllOnesValue(VTBits);
- ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Dep=
th+1);
+ ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
=20
// If the input is known to be 0 or 1, the output is 0/-1, which i=
s all
// sign bits set.
- if ((KnownZero | APInt(VTBits, 1)) =3D=3D Mask)
+ if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
return VTBits;
=20
// If we are subtracting one from a positive number, there is no c=
arry
@@ -2221,8 +2210,7 @@
=20
Tmp2 =3D ComputeNumSignBits(Op.getOperand(1), Depth+1);
if (Tmp2 =3D=3D 1) return 1;
- return std::min(Tmp, Tmp2)-1;
- break;
+ return std::min(Tmp, Tmp2)-1;
=20
case ISD::SUB:
Tmp2 =3D ComputeNumSignBits(Op.getOperand(1), Depth+1);
@@ -2232,11 +2220,10 @@
if (ConstantSDNode *CLHS =3D dyn_cast<ConstantSDNode>(Op.getOperand(0)=
))
if (CLHS->isNullValue()) {
APInt KnownZero, KnownOne;
- APInt Mask =3D APInt::getAllOnesValue(VTBits);
- ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Dep=
th+1);
+ ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
// If the input is known to be 0 or 1, the output is 0/-1, which i=
s all
// sign bits set.
- if ((KnownZero | APInt(VTBits, 1)) =3D=3D Mask)
+ if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
return VTBits;
=20
// If the input is known to be positive (the sign bit is known cle=
ar),
@@ -2251,8 +2238,7 @@
// is, at worst, one more bit than the inputs.
Tmp =3D ComputeNumSignBits(Op.getOperand(0), Depth+1);
if (Tmp =3D=3D 1) return 1; // Early out.
- return std::min(Tmp, Tmp2)-1;
- break;
+ return std::min(Tmp, Tmp2)-1;
case ISD::TRUNCATE:
// FIXME: it's tricky to do anything useful for this, but it is an imp=
ortant
// case for targets like X86.
@@ -2286,9 +2272,9 @@
// Finally, if we can prove that the top bits of the result are 0's or 1=
's,
// use this information.
APInt KnownZero, KnownOne;
- APInt Mask =3D APInt::getAllOnesValue(VTBits);
- ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
-
+ ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
+
+ APInt Mask;
if (KnownZero.isNegative()) { // sign bit is 0
Mask =3D KnownZero;
} else if (KnownOne.isNegative()) { // sign bit is 1;
@@ -2328,7 +2314,7 @@
=20
bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
// If we're told that NaNs won't happen, assume they won't.
- if (NoNaNsFPMath)
+ if (getTarget().Options.NoNaNsFPMath)
return true;
=20
// If the value is a constant, we can obviously see if it is a NaN or no=
t.
@@ -2423,8 +2409,10 @@
case ISD::CTPOP:
return getConstant(Val.countPopulation(), VT);
case ISD::CTLZ:
+ case ISD::CTLZ_ZERO_UNDEF:
return getConstant(Val.countLeadingZeros(), VT);
case ISD::CTTZ:
+ case ISD::CTTZ_ZERO_UNDEF:
return getConstant(Val.countTrailingZeros(), VT);
}
}
@@ -2440,7 +2428,6 @@
case ISD::FABS:
V.clearSign();
return getConstantFP(V, VT);
- case ISD::FP_ROUND:
case ISD::FP_EXTEND: {
bool ignored;
// This can return overflow, underflow, or inexact; we don't care.
@@ -2561,17 +2548,18 @@
"Vector element count mismatch!");
if (OpOpcode =3D=3D ISD::TRUNCATE)
return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(=
0));
- else if (OpOpcode =3D=3D ISD::ZERO_EXTEND || OpOpcode =3D=3D ISD::SIGN=
_EXTEND ||
- OpOpcode =3D=3D ISD::ANY_EXTEND) {
+ if (OpOpcode =3D=3D ISD::ZERO_EXTEND || OpOpcode =3D=3D ISD::SIGN_EXTE=
ND ||
+ OpOpcode =3D=3D ISD::ANY_EXTEND) {
// If the source is smaller than the dest, we still need an extend.
if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
.bitsLT(VT.getScalarType()))
return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
- else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
+ if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperan=
d(0));
- else
- return Operand.getNode()->getOperand(0);
+ return Operand.getNode()->getOperand(0);
}
+ if (OpOpcode =3D=3D ISD::UNDEF)
+ return getUNDEF(VT);
break;
case ISD::BITCAST:
// Basic sanity checking.
@@ -2601,7 +2589,7 @@
break;
case ISD::FNEG:
// -(X-Y) -> (Y-X) is unsafe because when X=3D=3DY, -0.0 !=3D +0.0
- if (UnsafeFPMath && OpOpcode =3D=3D ISD::FSUB)
+ if (getTarget().Options.UnsafeFPMath && OpOpcode =3D=3D ISD::FSUB)
return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
Operand.getNode()->getOperand(0));
if (OpOpcode =3D=3D ISD::FNEG) // --X -> X
@@ -2736,7 +2724,7 @@
case ISD::FMUL:
case ISD::FDIV:
case ISD::FREM:
- if (UnsafeFPMath) {
+ if (getTarget().Options.UnsafeFPMath) {
if (Opcode =3D=3D ISD::FADD) {
// 0+x --> x
if (ConstantFPSDNode *CFP =3D dyn_cast<ConstantFPSDNode>(N1))
@@ -3005,6 +2993,16 @@
default: break;
}
}
+
+ if (Opcode =3D=3D ISD::FP_ROUND) {
+ APFloat V =3D N1CFP->getValueAPF(); // make copy
+ bool ignored;
+ // This can return overflow, underflow, or inexact; we don't care.
+ // FIXME need to be more flexible about rounding mode.
+ (void)V.convert(*EVTToAPFloatSemantics(VT),
+ APFloat::rmNearestTiesToEven, &ignored);
+ return getConstantFP(V, VT);
+ }
}
=20
// Canonicalize an UNDEF to the RHS, even over a constant.
@@ -3059,7 +3057,7 @@
case ISD::FMUL:
case ISD::FDIV:
case ISD::FREM:
- if (UnsafeFPMath)
+ if (getTarget().Options.UnsafeFPMath)
return N2;
break;
case ISD::MUL:
@@ -3133,16 +3131,14 @@
case ISD::SELECT:
if (N1C) {
if (N1C->getZExtValue())
- return N2; // select true, X, Y -> X
- else
- return N3; // select false, X, Y -> Y
+ return N2; // select true, X, Y -> X
+ return N3; // select false, X, Y -> Y
}
=20
if (N2 =3D=3D N3) return N2; // select C, X, X -> X
break;
case ISD::VECTOR_SHUFFLE:
llvm_unreachable("should use getVectorShuffle constructor!");
- break;
case ISD::INSERT_SUBVECTOR: {
SDValue Index =3D N3;
if (VT.isSimple() && N1.getValueType().isSimple()
@@ -3275,8 +3271,7 @@
/// used when a memcpy is turned into a memset when the source is a consta=
nt
/// string ptr.
static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
- const TargetLowering &TLI,
- std::string &Str, unsigned Offset) {
+ const TargetLowering &TLI, StringRef Str=
) {
// Handle vector with all elements zero.
if (Str.empty()) {
if (VT.isInteger())
@@ -3294,15 +3289,18 @@
}
=20
assert(!VT.isVector() && "Can't handle vector type here!");
- unsigned NumBits =3D VT.getSizeInBits();
- unsigned MSB =3D NumBits / 8;
+ unsigned NumVTBytes =3D VT.getSizeInBits() / 8;
+ unsigned NumBytes =3D std::min(NumVTBytes, unsigned(Str.size()));
+
uint64_t Val =3D 0;
- if (TLI.isLittleEndian())
- Offset =3D Offset + MSB - 1;
- for (unsigned i =3D 0; i !=3D MSB; ++i) {
- Val =3D (Val << 8) | (unsigned char)Str[Offset];
- Offset +=3D TLI.isLittleEndian() ? -1 : 1;
+ if (TLI.isLittleEndian()) {
+ for (unsigned i =3D 0; i !=3D NumBytes; ++i)
+ Val |=3D (uint64_t)(unsigned char)Str[i] << i*8;
+ } else {
+ for (unsigned i =3D 0; i !=3D NumBytes; ++i)
+ Val |=3D (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
}
+
return DAG.getConstant(Val, VT);
}
=20
@@ -3317,7 +3315,7 @@
=20
/// isMemSrcFromString - Returns true if memcpy source is a string constan=
t.
///
-static bool isMemSrcFromString(SDValue Src, std::string &Str) {
+static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
unsigned SrcDelta =3D 0;
GlobalAddressSDNode *G =3D NULL;
if (Src.getOpcode() =3D=3D ISD::GlobalAddress)
@@ -3331,11 +3329,7 @@
if (!G)
return false;
=20
- const GlobalVariable *GV =3D dyn_cast<GlobalVariable>(G->getGlobal());
- if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
- return true;
-
- return false;
+ return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
}
=20
/// FindOptimalMemOpLowering - Determines the optimial series memory ops
@@ -3345,7 +3339,7 @@
static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
unsigned Limit, uint64_t Size,
unsigned DstAlign, unsigned SrcAlign,
- bool NonScalarIntSafe,
+ bool IsZeroVal,
bool MemcpyStrSrc,
SelectionDAG &DAG,
const TargetLowering &TLI) {
@@ -3359,7 +3353,7 @@
// 'MemcpyStrSrc' indicates whether the memcpy source is constant so it =
does
// not need to be loaded.
EVT VT =3D TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
- NonScalarIntSafe, MemcpyStrSrc,
+ IsZeroVal, MemcpyStrSrc,
DAG.getMachineFunction());
=20
if (VT =3D=3D MVT::Other) {
@@ -3438,7 +3432,7 @@
unsigned SrcAlign =3D DAG.InferPtrAlignment(Src);
if (Align > SrcAlign)
SrcAlign =3D Align;
- std::string Str;
+ StringRef Str;
bool CopyFromStr =3D isMemSrcFromString(Src, Str);
bool isZeroStr =3D CopyFromStr && Str.empty();
unsigned Limit =3D AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSiz=
e);
@@ -3475,7 +3469,7 @@
// We only handle zero vectors here.
// FIXME: Handle other cases where store of vector immediate is done=
in
// a single instruction.
- Value =3D getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
+ Value =3D getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
Store =3D DAG.getStore(Chain, dl, Value,
getMemBasePlusOffset(Dst, DstOff, DAG),
DstPtrInfo.getWithOffset(DstOff), isVol,
@@ -3562,7 +3556,7 @@
Value =3D DAG.getLoad(VT, dl, Chain,
getMemBasePlusOffset(Src, SrcOff, DAG),
SrcPtrInfo.getWithOffset(SrcOff), isVol,
- false, SrcAlign);
+ false, false, SrcAlign);
LoadValues.push_back(Value);
LoadChains.push_back(Value.getValue(1));
SrcOff +=3D VTSize;
@@ -3606,11 +3600,11 @@
FrameIndexSDNode *FI =3D dyn_cast<FrameIndexSDNode>(Dst);
if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
DstAlignCanChange =3D true;
- bool NonScalarIntSafe =3D
+ bool IsZeroVal =3D
isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
Size, (DstAlignCanChange ? 0 : Align), 0,
- NonScalarIntSafe, false, DAG, TLI))
+ IsZeroVal, false, DAG, TLI))
return SDValue();
=20
if (DstAlignCanChange) {
@@ -3717,8 +3711,9 @@
std::pair<SDValue,SDValue> CallResult =3D
TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
false, false, false, false, 0,
- TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
- /*isReturnValueUsed=3D*/false,
+ TLI.getLibcallCallingConv(RTLIB::MEMCPY),
+ /*isTailCall=3D*/false,
+ /*doesNotReturn=3D*/false, /*isReturnValueUsed=3D*/fal=
se,
getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
TLI.getPointerTy()),
Args, *this, dl);
@@ -3769,8 +3764,9 @@
std::pair<SDValue,SDValue> CallResult =3D
TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
false, false, false, false, 0,
- TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
- /*isReturnValueUsed=3D*/false,
+ TLI.getLibcallCallingConv(RTLIB::MEMMOVE),
+ /*isTailCall=3D*/false,
+ /*doesNotReturn=3D*/false, /*isReturnValueUsed=3D*/fal=
se,
getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
TLI.getPointerTy()),
Args, *this, dl);
@@ -3829,8 +3825,9 @@
std::pair<SDValue,SDValue> CallResult =3D
TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
false, false, false, false, 0,
- TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
- /*isReturnValueUsed=3D*/false,
+ TLI.getLibcallCallingConv(RTLIB::MEMSET),
+ /*isTailCall=3D*/false,
+ /*doesNotReturn*/false, /*isReturnValueUsed=3D*/false,
getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
TLI.getPointerTy()),
Args, *this, dl);
@@ -4138,8 +4135,9 @@
EVT VT, DebugLoc dl, SDValue Chain,
SDValue Ptr, SDValue Offset,
MachinePointerInfo PtrInfo, EVT MemVT,
- bool isVolatile, bool isNonTemporal,
- unsigned Alignment, const MDNode *TBAAInfo) {
+ bool isVolatile, bool isNonTemporal, bool isInvarian=
t,
+ unsigned Alignment, const MDNode *TBAAInfo,
+ const MDNode *Ranges) {
assert(Chain.getValueType() =3D=3D MVT::Other &&=20
"Invalid chain type");
if (Alignment =3D=3D 0) // Ensure that codegen never sees alignment 0
@@ -4150,6 +4148,8 @@
Flags |=3D MachineMemOperand::MOVolatile;
if (isNonTemporal)
Flags |=3D MachineMemOperand::MONonTemporal;
+ if (isInvariant)
+ Flags |=3D MachineMemOperand::MOInvariant;
=20
// If we don't have a PtrInfo, infer the trivial frame index case to sim=
plify
// clients.
@@ -4159,7 +4159,7 @@
MachineFunction &MF =3D getMachineFunction();
MachineMemOperand *MMO =3D
MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignmen=
t,
- TBAAInfo);
+ TBAAInfo, Ranges);
return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
}
=20
@@ -4196,7 +4196,8 @@
AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
ID.AddInteger(MemVT.getRawBits());
ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
- MMO->isNonTemporal()));
+ MMO->isNonTemporal(),=20
+ MMO->isInvariant()));
void *IP =3D 0;
if (SDNode *E =3D CSEMap.FindNodeOrInsertPos(ID, IP)) {
cast<LoadSDNode>(E)->refineAlignment(MMO);
@@ -4213,10 +4214,13 @@
SDValue Chain, SDValue Ptr,
MachinePointerInfo PtrInfo,
bool isVolatile, bool isNonTemporal,
- unsigned Alignment, const MDNode *TBAAInfo) {
+ bool isInvariant, unsigned Alignment,=20
+ const MDNode *TBAAInfo,
+ const MDNode *Ranges) {
SDValue Undef =3D getUNDEF(Ptr.getValueType());
return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Und=
ef,
- PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAIn=
fo);
+ PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alig=
nment,
+ TBAAInfo, Ranges);
}
=20
SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EV=
T VT,
@@ -4226,7 +4230,7 @@
unsigned Alignment, const MDNode *TBAAInf=
o) {
SDValue Undef =3D getUNDEF(Ptr.getValueType());
return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
- PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment,
+ PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignme=
nt,
TBAAInfo);
}
=20
@@ -4239,8 +4243,8 @@
"Load is already a indexed load!");
return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
LD->getChain(), Base, Offset, LD->getPointerInfo(),
- LD->getMemoryVT(),
- LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()=
);
+ LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),=20
+ false, LD->getAlignment());
}
=20
SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
@@ -4282,7 +4286,7 @@
AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
ID.AddInteger(VT.getRawBits());
ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatil=
e(),
- MMO->isNonTemporal()));
+ MMO->isNonTemporal(), MMO->isInvarian=
t()));
void *IP =3D 0;
if (SDNode *E =3D CSEMap.FindNodeOrInsertPos(ID, IP)) {
cast<StoreSDNode>(E)->refineAlignment(MMO);
@@ -4349,7 +4353,7 @@
AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
ID.AddInteger(SVT.getRawBits());
ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile=
(),
- MMO->isNonTemporal()));
+ MMO->isNonTemporal(), MMO->isInvarian=
t()));
void *IP =3D 0;
if (SDNode *E =3D CSEMap.FindNodeOrInsertPos(ID, IP)) {
cast<StoreSDNode>(E)->refineAlignment(MMO);
@@ -4903,6 +4907,20 @@
return N;
}
=20
+/// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws =
away
+/// the line number information on the merged node since it is not possibl=
e to
+/// preserve the information that operation is associated with multiple li=
nes.
+/// This will make the debugger working better at -O0, were there is a hig=
her
+/// probability having other instructions associated with that line.
+///
+SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLo=
c) {
+ DebugLoc NLoc =3D N->getDebugLoc();
+ if (!(NLoc.isUnknown()) && (OptLevel =3D=3D CodeGenOpt::None) && (OLoc !=
=3D NLoc)) {
+ N->setDebugLoc(DebugLoc());
+ }
+ return N;
+}
+
/// MorphNodeTo - This *mutates* the specified node to have the specified
/// return type, opcode, and operands.
///
@@ -4924,7 +4942,7 @@
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
if (SDNode *ON =3D CSEMap.FindNodeOrInsertPos(ID, IP))
- return ON;
+ return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
}
=20
if (!RemoveNodeFromCSEMaps(N))
@@ -5128,8 +5146,9 @@
FoldingSetNodeID ID;
AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
IP =3D 0;
- if (SDNode *E =3D CSEMap.FindNodeOrInsertPos(ID, IP))
- return cast<MachineSDNode>(E);
+ if (SDNode *E =3D CSEMap.FindNodeOrInsertPos(ID, IP)) {
+ return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
+ }
}
=20
// Allocate a new MachineSDNode.
@@ -5290,6 +5309,10 @@
// already exists there, recursively merge the results together.
AddModifiedNodeToCSEMaps(User, &Listener);
}
+
+ // If we just RAUW'd the root, take note.
+ if (FromN =3D=3D getRoot())
+ setRoot(To);
}
=20
/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
@@ -5335,6 +5358,10 @@
// already exists there, recursively merge the results together.
AddModifiedNodeToCSEMaps(User, &Listener);
}
+
+ // If we just RAUW'd the root, take note.
+ if (From =3D=3D getRoot().getNode())
+ setRoot(SDValue(To, getRoot().getResNo()));
}
=20
/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
@@ -5373,6 +5400,10 @@
// already exists there, recursively merge the results together.
AddModifiedNodeToCSEMaps(User, &Listener);
}
+
+ // If we just RAUW'd the root, take note.
+ if (From =3D=3D getRoot().getNode())
+ setRoot(SDValue(To[getRoot().getResNo()]));
}
=20
/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
@@ -5431,6 +5462,10 @@
// already exists there, recursively merge the results together.
AddModifiedNodeToCSEMaps(User, &Listener);
}
+
+ // If we just RAUW'd the root, take note.
+ if (From =3D=3D getRoot())
+ setRoot(To);
}
=20
namespace {
@@ -5657,7 +5692,7 @@
MachineMemOperand *mmo)
: SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
SubclassData =3D encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile=
(),
- MMO->isNonTemporal());
+ MMO->isNonTemporal(), MMO->isInvaria=
nt());
assert(isVolatile() =3D=3D MMO->isVolatile() && "Volatile encoding error=
!");
assert(isNonTemporal() =3D=3D MMO->isNonTemporal() &&
"Non-temporal encoding error!");
@@ -5670,7 +5705,7 @@
: SDNode(Opc, dl, VTs, Ops, NumOps),
MemoryVT(memvt), MMO(mmo) {
SubclassData =3D encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile=
(),
- MMO->isNonTemporal());
+ MMO->isNonTemporal(), MMO->isInvaria=
nt());
assert(isVolatile() =3D=3D MMO->isVolatile() && "Volatile encoding error=
!");
assert(memvt.getStoreSize() =3D=3D MMO->getSize() && "Size mismatch!");
}
@@ -5846,565 +5881,6 @@
return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
}
=20
-std::string SDNode::getOperationName(const SelectionDAG *G) const {
- switch (getOpcode()) {
- default:
- if (getOpcode() < ISD::BUILTIN_OP_END)
- return "<<Unknown DAG Node>>";
- if (isMachineOpcode()) {
- if (G)
- if (const TargetInstrInfo *TII =3D G->getTarget().getInstrInfo())
- if (getMachineOpcode() < TII->getNumOpcodes())
- return TII->get(getMachineOpcode()).getName();
- return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
- }
- if (G) {
- const TargetLowering &TLI =3D G->getTargetLoweringInfo();
- const char *Name =3D TLI.getTargetNodeName(getOpcode());
- if (Name) return Name;
- return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
- }
- return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
-
-#ifndef NDEBUG
- case ISD::DELETED_NODE:
- return "<<Deleted Node!>>";
-#endif
- case ISD::PREFETCH: return "Prefetch";
- case ISD::MEMBARRIER: return "MemBarrier";
- case ISD::ATOMIC_FENCE: return "AtomicFence";
- case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
- case ISD::ATOMIC_SWAP: return "AtomicSwap";
- case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
- case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
- case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
- case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
- case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
- case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
- case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
- case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
- case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
- case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
- case ISD::ATOMIC_LOAD: return "AtomicLoad";
- case ISD::ATOMIC_STORE: return "AtomicStore";
- case ISD::PCMARKER: return "PCMarker";
- case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
- case ISD::SRCVALUE: return "SrcValue";
- case ISD::MDNODE_SDNODE: return "MDNode";
- case ISD::EntryToken: return "EntryToken";
- case ISD::TokenFactor: return "TokenFactor";
- case ISD::AssertSext: return "AssertSext";
- case ISD::AssertZext: return "AssertZext";
-
- case ISD::BasicBlock: return "BasicBlock";
- case ISD::VALUETYPE: return "ValueType";
- case ISD::Register: return "Register";
-
- case ISD::Constant: return "Constant";
- case ISD::ConstantFP: return "ConstantFP";
- case ISD::GlobalAddress: return "GlobalAddress";
- case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
- case ISD::FrameIndex: return "FrameIndex";
- case ISD::JumpTable: return "JumpTable";
- case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
- case ISD::RETURNADDR: return "RETURNADDR";
- case ISD::FRAMEADDR: return "FRAMEADDR";
- case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
- case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
- case ISD::LSDAADDR: return "LSDAADDR";
- case ISD::EHSELECTION: return "EHSELECTION";
- case ISD::EH_RETURN: return "EH_RETURN";
- case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
- case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
- case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP";
- case ISD::ConstantPool: return "ConstantPool";
- case ISD::ExternalSymbol: return "ExternalSymbol";
- case ISD::BlockAddress: return "BlockAddress";
- case ISD::INTRINSIC_WO_CHAIN:
- case ISD::INTRINSIC_VOID:
- case ISD::INTRINSIC_W_CHAIN: {
- unsigned OpNo =3D getOpcode() =3D=3D ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
- unsigned IID =3D cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(=
);
- if (IID < Intrinsic::num_intrinsics)
- return Intrinsic::getName((Intrinsic::ID)IID);
- else if (const TargetIntrinsicInfo *TII =3D G->getTarget().getIntrinsi=
cInfo())
- return TII->getName(IID);
- llvm_unreachable("Invalid intrinsic ID");
- }
-
- case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
- case ISD::TargetConstant: return "TargetConstant";
- case ISD::TargetConstantFP:return "TargetConstantFP";
- case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
- case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
- case ISD::TargetFrameIndex: return "TargetFrameIndex";
- case ISD::TargetJumpTable: return "TargetJumpTable";
- case ISD::TargetConstantPool: return "TargetConstantPool";
- case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
- case ISD::TargetBlockAddress: return "TargetBlockAddress";
-
- case ISD::CopyToReg: return "CopyToReg";
- case ISD::CopyFromReg: return "CopyFromReg";
- case ISD::UNDEF: return "undef";
- case ISD::MERGE_VALUES: return "merge_values";
- case ISD::INLINEASM: return "inlineasm";
- case ISD::EH_LABEL: return "eh_label";
- case ISD::HANDLENODE: return "handlenode";
-
- // Unary operators
- case ISD::FABS: return "fabs";
- case ISD::FNEG: return "fneg";
- case ISD::FSQRT: return "fsqrt";
- case ISD::FSIN: return "fsin";
- case ISD::FCOS: return "fcos";
- case ISD::FTRUNC: return "ftrunc";
- case ISD::FFLOOR: return "ffloor";
- case ISD::FCEIL: return "fceil";
- case ISD::FRINT: return "frint";
- case ISD::FNEARBYINT: return "fnearbyint";
- case ISD::FEXP: return "fexp";
- case ISD::FEXP2: return "fexp2";
- case ISD::FLOG: return "flog";
- case ISD::FLOG2: return "flog2";
- case ISD::FLOG10: return "flog10";
-
- // Binary operators
- case ISD::ADD: return "add";
- case ISD::SUB: return "sub";
- case ISD::MUL: return "mul";
- case ISD::MULHU: return "mulhu";
- case ISD::MULHS: return "mulhs";
- case ISD::SDIV: return "sdiv";
- case ISD::UDIV: return "udiv";
- case ISD::SREM: return "srem";
- case ISD::UREM: return "urem";
- case ISD::SMUL_LOHI: return "smul_lohi";
- case ISD::UMUL_LOHI: return "umul_lohi";
- case ISD::SDIVREM: return "sdivrem";
- case ISD::UDIVREM: return "udivrem";
- case ISD::AND: return "and";
- case ISD::OR: return "or";
- case ISD::XOR: return "xor";
- case ISD::SHL: return "shl";
- case ISD::SRA: return "sra";
- case ISD::SRL: return "srl";
- case ISD::ROTL: return "rotl";
- case ISD::ROTR: return "rotr";
- case ISD::FADD: return "fadd";
- case ISD::FSUB: return "fsub";
- case ISD::FMUL: return "fmul";
- case ISD::FDIV: return "fdiv";
- case ISD::FMA: return "fma";
- case ISD::FREM: return "frem";
- case ISD::FCOPYSIGN: return "fcopysign";
- case ISD::FGETSIGN: return "fgetsign";
- case ISD::FPOW: return "fpow";
-
- case ISD::FPOWI: return "fpowi";
- case ISD::SETCC: return "setcc";
- case ISD::SELECT: return "select";
- case ISD::VSELECT: return "vselect";
- case ISD::SELECT_CC: return "select_cc";
- case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
- case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
- case ISD::CONCAT_VECTORS: return "concat_vectors";
- case ISD::INSERT_SUBVECTOR: return "insert_subvector";
- case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
- case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
- case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
- case ISD::CARRY_FALSE: return "carry_false";
- case ISD::ADDC: return "addc";
- case ISD::ADDE: return "adde";
- case ISD::SADDO: return "saddo";
- case ISD::UADDO: return "uaddo";
- case ISD::SSUBO: return "ssubo";
- case ISD::USUBO: return "usubo";
- case ISD::SMULO: return "smulo";
- case ISD::UMULO: return "umulo";
- case ISD::SUBC: return "subc";
- case ISD::SUBE: return "sube";
- case ISD::SHL_PARTS: return "shl_parts";
- case ISD::SRA_PARTS: return "sra_parts";
- case ISD::SRL_PARTS: return "srl_parts";
-
- // Conversion operators.
- case ISD::SIGN_EXTEND: return "sign_extend";
- case ISD::ZERO_EXTEND: return "zero_extend";
- case ISD::ANY_EXTEND: return "any_extend";
- case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
- case ISD::TRUNCATE: return "truncate";
- case ISD::FP_ROUND: return "fp_round";
- case ISD::FLT_ROUNDS_: return "flt_rounds";
- case ISD::FP_ROUND_INREG: return "fp_round_inreg";
- case ISD::FP_EXTEND: return "fp_extend";
-
- case ISD::SINT_TO_FP: return "sint_to_fp";
- case ISD::UINT_TO_FP: return "uint_to_fp";
- case ISD::FP_TO_SINT: return "fp_to_sint";
- case ISD::FP_TO_UINT: return "fp_to_uint";
- case ISD::BITCAST: return "bitcast";
- case ISD::FP16_TO_FP32: return "fp16_to_fp32";
- case ISD::FP32_TO_FP16: return "fp32_to_fp16";
-
- case ISD::CONVERT_RNDSAT: {
- switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
- default: llvm_unreachable("Unknown cvt code!");
- case ISD::CVT_FF: return "cvt_ff";
- case ISD::CVT_FS: return "cvt_fs";
- case ISD::CVT_FU: return "cvt_fu";
- case ISD::CVT_SF: return "cvt_sf";
- case ISD::CVT_UF: return "cvt_uf";
- case ISD::CVT_SS: return "cvt_ss";
- case ISD::CVT_SU: return "cvt_su";
- case ISD::CVT_US: return "cvt_us";
- case ISD::CVT_UU: return "cvt_uu";
- }
- }
-
- // Control flow instructions
- case ISD::BR: return "br";
- case ISD::BRIND: return "brind";
- case ISD::BR_JT: return "br_jt";
- case ISD::BRCOND: return "brcond";
- case ISD::BR_CC: return "br_cc";
- case ISD::CALLSEQ_START: return "callseq_start";
- case ISD::CALLSEQ_END: return "callseq_end";
-
- // Other operators
- case ISD::LOAD: return "load";
- case ISD::STORE: return "store";
- case ISD::VAARG: return "vaarg";
- case ISD::VACOPY: return "vacopy";
- case ISD::VAEND: return "vaend";
- case ISD::VASTART: return "vastart";
- case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
- case ISD::EXTRACT_ELEMENT: return "extract_element";
- case ISD::BUILD_PAIR: return "build_pair";
- case ISD::STACKSAVE: return "stacksave";
- case ISD::STACKRESTORE: return "stackrestore";
- case ISD::TRAP: return "trap";
-
- // Bit manipulation
- case ISD::BSWAP: return "bswap";
- case ISD::CTPOP: return "ctpop";
- case ISD::CTTZ: return "cttz";
- case ISD::CTLZ: return "ctlz";
-
- // Trampolines
- case ISD::INIT_TRAMPOLINE: return "init_trampoline";
- case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
-
- case ISD::CONDCODE:
- switch (cast<CondCodeSDNode>(this)->get()) {
- default: llvm_unreachable("Unknown setcc condition!");
- case ISD::SETOEQ: return "setoeq";
- case ISD::SETOGT: return "setogt";
- case ISD::SETOGE: return "setoge";
- case ISD::SETOLT: return "setolt";
- case ISD::SETOLE: return "setole";
- case ISD::SETONE: return "setone";
-
- case ISD::SETO: return "seto";
- case ISD::SETUO: return "setuo";
- case ISD::SETUEQ: return "setue";
- case ISD::SETUGT: return "setugt";
- case ISD::SETUGE: return "setuge";
- case ISD::SETULT: return "setult";
- case ISD::SETULE: return "setule";
- case ISD::SETUNE: return "setune";
-
- case ISD::SETEQ: return "seteq";
- case ISD::SETGT: return "setgt";
- case ISD::SETGE: return "setge";
- case ISD::SETLT: return "setlt";
- case ISD::SETLE: return "setle";
- case ISD::SETNE: return "setne";
- }
- }
-}
-
-const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
- switch (AM) {
- default:
- return "";
- case ISD::PRE_INC:
- return "<pre-inc>";
- case ISD::PRE_DEC:
- return "<pre-dec>";
- case ISD::POST_INC:
- return "<post-inc>";
- case ISD::POST_DEC:
- return "<post-dec>";
- }
-}
-
-std::string ISD::ArgFlagsTy::getArgFlagsString() {
- std::string S =3D "< ";
-
- if (isZExt())
- S +=3D "zext ";
- if (isSExt())
- S +=3D "sext ";
- if (isInReg())
- S +=3D "inreg ";
- if (isSRet())
- S +=3D "sret ";
- if (isByVal())
- S +=3D "byval ";
- if (isNest())
- S +=3D "nest ";
- if (getByValAlign())
- S +=3D "byval-align:" + utostr(getByValAlign()) + " ";
- if (getOrigAlign())
- S +=3D "orig-align:" + utostr(getOrigAlign()) + " ";
- if (getByValSize())
- S +=3D "byval-size:" + utostr(getByValSize()) + " ";
- return S + ">";
-}
-
-void SDNode::dump() const { dump(0); }
-void SDNode::dump(const SelectionDAG *G) const {
- print(dbgs(), G);
- dbgs() << '\n';
-}
-
-void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
- OS << (void*)this << ": ";
-
- for (unsigned i =3D 0, e =3D getNumValues(); i !=3D e; ++i) {
- if (i) OS << ",";
- if (getValueType(i) =3D=3D MVT::Other)
- OS << "ch";
- else
- OS << getValueType(i).getEVTString();
- }
- OS << " =3D " << getOperationName(G);
-}
-
-void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
- if (const MachineSDNode *MN =3D dyn_cast<MachineSDNode>(this)) {
- if (!MN->memoperands_empty()) {
- OS << "<";
- OS << "Mem:";
- for (MachineSDNode::mmo_iterator i =3D MN->memoperands_begin(),
- e =3D MN->memoperands_end(); i !=3D e; ++i) {
- OS << **i;
- if (llvm::next(i) !=3D e)
- OS << " ";
- }
- OS << ">";
- }
- } else if (const ShuffleVectorSDNode *SVN =3D
- dyn_cast<ShuffleVectorSDNode>(this)) {
- OS << "<";
- for (unsigned i =3D 0, e =3D ValueList[0].getVectorNumElements(); i !=
=3D e; ++i) {
- int Idx =3D SVN->getMaskElt(i);
- if (i) OS << ",";
- if (Idx < 0)
- OS << "u";
- else
- OS << Idx;
- }
- OS << ">";
- } else if (const ConstantSDNode *CSDN =3D dyn_cast<ConstantSDNode>(this)=
) {
- OS << '<' << CSDN->getAPIntValue() << '>';
- } else if (const ConstantFPSDNode *CSDN =3D dyn_cast<ConstantFPSDNode>(t=
his)) {
- if (&CSDN->getValueAPF().getSemantics()=3D=3D&APFloat::IEEEsingle)
- OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
- else if (&CSDN->getValueAPF().getSemantics()=3D=3D&APFloat::IEEEdouble)
- OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
- else {
- OS << "<APFloat(";
- CSDN->getValueAPF().bitcastToAPInt().dump();
- OS << ")>";
- }
- } else if (const GlobalAddressSDNode *GADN =3D
- dyn_cast<GlobalAddressSDNode>(this)) {
- int64_t offset =3D GADN->getOffset();
- OS << '<';
- WriteAsOperand(OS, GADN->getGlobal());
- OS << '>';
- if (offset > 0)
- OS << " + " << offset;
- else
- OS << " " << offset;
- if (unsigned int TF =3D GADN->getTargetFlags())
- OS << " [TF=3D" << TF << ']';
- } else if (const FrameIndexSDNode *FIDN =3D dyn_cast<FrameIndexSDNode>(t=
his)) {
- OS << "<" << FIDN->getIndex() << ">";
- } else if (const JumpTableSDNode *JTDN =3D dyn_cast<JumpTableSDNode>(thi=
s)) {
- OS << "<" << JTDN->getIndex() << ">";
- if (unsigned int TF =3D JTDN->getTargetFlags())
- OS << " [TF=3D" << TF << ']';
- } else if (const ConstantPoolSDNode *CP =3D dyn_cast<ConstantPoolSDNode>=
(this)){
- int offset =3D CP->getOffset();
- if (CP->isMachineConstantPoolEntry())
- OS << "<" << *CP->getMachineCPVal() << ">";
- else
- OS << "<" << *CP->getConstVal() << ">";
- if (offset > 0)
- OS << " + " << offset;
- else
- OS << " " << offset;
- if (unsigned int TF =3D CP->getTargetFlags())
- OS << " [TF=3D" << TF << ']';
- } else if (const BasicBlockSDNode *BBDN =3D dyn_cast<BasicBlockSDNode>(t=
his)) {
- OS << "<";
- const Value *LBB =3D (const Value*)BBDN->getBasicBlock()->getBasicBloc=
k();
- if (LBB)
- OS << LBB->getName() << " ";
- OS << (const void*)BBDN->getBasicBlock() << ">";
- } else if (const RegisterSDNode *R =3D dyn_cast<RegisterSDNode>(this)) {
- OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo(=
) :0);
- } else if (const ExternalSymbolSDNode *ES =3D
- dyn_cast<ExternalSymbolSDNode>(this)) {
- OS << "'" << ES->getSymbol() << "'";
- if (unsigned int TF =3D ES->getTargetFlags())
- OS << " [TF=3D" << TF << ']';
- } else if (const SrcValueSDNode *M =3D dyn_cast<SrcValueSDNode>(this)) {
- if (M->getValue())
- OS << "<" << M->getValue() << ">";
- else
- OS << "<null>";
- } else if (const MDNodeSDNode *MD =3D dyn_cast<MDNodeSDNode>(this)) {
- if (MD->getMD())
- OS << "<" << MD->getMD() << ">";
- else
- OS << "<null>";
- } else if (const VTSDNode *N =3D dyn_cast<VTSDNode>(this)) {
- OS << ":" << N->getVT().getEVTString();
- }
- else if (const LoadSDNode *LD =3D dyn_cast<LoadSDNode>(this)) {
- OS << "<" << *LD->getMemOperand();
-
- bool doExt =3D true;
- switch (LD->getExtensionType()) {
- default: doExt =3D false; break;
- case ISD::EXTLOAD: OS << ", anyext"; break;
- case ISD::SEXTLOAD: OS << ", sext"; break;
- case ISD::ZEXTLOAD: OS << ", zext"; break;
- }
- if (doExt)
- OS << " from " << LD->getMemoryVT().getEVTString();
-
- const char *AM =3D getIndexedModeName(LD->getAddressingMode());
- if (*AM)
- OS << ", " << AM;
-
- OS << ">";
- } else if (const StoreSDNode *ST =3D dyn_cast<StoreSDNode>(this)) {
- OS << "<" << *ST->getMemOperand();
-
- if (ST->isTruncatingStore())
- OS << ", trunc to " << ST->getMemoryVT().getEVTString();
-
- const char *AM =3D getIndexedModeName(ST->getAddressingMode());
- if (*AM)
- OS << ", " << AM;
-
- OS << ">";
- } else if (const MemSDNode* M =3D dyn_cast<MemSDNode>(this)) {
- OS << "<" << *M->getMemOperand() << ">";
- } else if (const BlockAddressSDNode *BA =3D
- dyn_cast<BlockAddressSDNode>(this)) {
- OS << "<";
- WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
- OS << ", ";
- WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
- OS << ">";
- if (unsigned int TF =3D BA->getTargetFlags())
- OS << " [TF=3D" << TF << ']';
- }
-
- if (G)
- if (unsigned Order =3D G->GetOrdering(this))
- OS << " [ORD=3D" << Order << ']';
-
- if (getNodeId() !=3D -1)
- OS << " [ID=3D" << getNodeId() << ']';
-
- DebugLoc dl =3D getDebugLoc();
- if (G && !dl.isUnknown()) {
- DIScope
- Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext(=
)));
- OS << " dbg:";
- // Omit the directory, since it's usually long and uninteresting.
- if (Scope.Verify())
- OS << Scope.getFilename();
- else
- OS << "<unknown>";
- OS << ':' << dl.getLine();
- if (dl.getCol() !=3D 0)
- OS << ':' << dl.getCol();
- }
-}
-
-void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
- print_types(OS, G);
- for (unsigned i =3D 0, e =3D getNumOperands(); i !=3D e; ++i) {
- if (i) OS << ", "; else OS << " ";
- OS << (void*)getOperand(i).getNode();
- if (unsigned RN =3D getOperand(i).getResNo())
- OS << ":" << RN;
- }
- print_details(OS, G);
-}
-
-static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
- const SelectionDAG *G, unsigned depth,
- unsigned indent) {
- if (depth =3D=3D 0)
- return;
-
- OS.indent(indent);
-
- N->print(OS, G);
-
- if (depth < 1)
- return;
-
- for (unsigned i =3D 0, e =3D N->getNumOperands(); i !=3D e; ++i) {
- // Don't follow chain operands.
- if (N->getOperand(i).getValueType() =3D=3D MVT::Other)
- continue;
- OS << '\n';
- printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, inde=
nt+2);
- }
-}
-
-void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
- unsigned depth) const {
- printrWithDepthHelper(OS, this, G, depth, 0);
-}
-
-void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
- // Don't print impossibly deep things.
- printrWithDepth(OS, G, 10);
-}
-
-void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
- printrWithDepth(dbgs(), G, depth);
-}
-
-void SDNode::dumprFull(const SelectionDAG *G) const {
- // Don't print impossibly deep things.
- dumprWithDepth(G, 10);
-}
-
-static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG=
*G) {
- for (unsigned i =3D 0, e =3D N->getNumOperands(); i !=3D e; ++i)
- if (N->getOperand(i).getNode()->hasOneUse())
- DumpNodes(N->getOperand(i).getNode(), indent+2, G);
- else
- dbgs() << "\n" << std::string(indent+2, ' ')
- << (void*)N->getOperand(i).getNode() << ": <multiple use>";
-
-
- dbgs() << "\n";
- dbgs().indent(indent);
- N->dump(G);
-}
-
SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
assert(N->getNumValues() =3D=3D 1 &&
"Can't unroll a vector with multiple results!");
@@ -6527,20 +6003,14 @@
const GlobalValue *GV;
int64_t GVOffset =3D 0;
if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
- // If GV has specified alignment, then use it. Otherwise, use the pref=
erred
- // alignment.
- unsigned Align =3D GV->getAlignment();
- if (!Align) {
- if (const GlobalVariable *GVar =3D dyn_cast<GlobalVariable>(GV)) {
- if (GVar->hasInitializer()) {
- const TargetData *TD =3D TLI.getTargetData();
- Align =3D TD->getPreferredAlignment(GVar);
- }
- }
- if (!Align)
- Align =3D TLI.getTargetData()->getABITypeAlignment(GV->getType());
- }
- return MinAlign(Align, GVOffset);
+ unsigned PtrWidth =3D TLI.getPointerTy().getSizeInBits();
+ APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
+ llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, Known=
One,
+ TLI.getTargetData());
+ unsigned AlignBits =3D KnownZero.countTrailingOnes();
+ unsigned Align =3D AlignBits ? 1 << std::min(31U, AlignBits) : 0;
+ if (Align)
+ return MinAlign(Align, GVOffset);
}
=20
// If this is a direct reference to a stack slot, use information about =
the
@@ -6566,74 +6036,6 @@
return 0;
}
=20
-void SelectionDAG::dump() const {
- dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
-
- for (allnodes_const_iterator I =3D allnodes_begin(), E =3D allnodes_end(=
);
- I !=3D E; ++I) {
- const SDNode *N =3D I;
- if (!N->hasOneUse() && N !=3D getRoot().getNode())
- DumpNodes(N, 2, this);
- }
-
- if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
-
- dbgs() << "\n\n";
-}
-
-void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
- print_types(OS, G);
- print_details(OS, G);
-}
-
-typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
-static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
- const SelectionDAG *G, VisitedSDNodeSet &once) {
- if (!once.insert(N)) // If we've been here before, return now.
- return;
-
- // Dump the current SDNode, but don't end the line yet.
- OS << std::string(indent, ' ');
- N->printr(OS, G);
-
- // Having printed this SDNode, walk the children:
- for (unsigned i =3D 0, e =3D N->getNumOperands(); i !=3D e; ++i) {
- const SDNode *child =3D N->getOperand(i).getNode();
-
- if (i) OS << ",";
- OS << " ";
-
- if (child->getNumOperands() =3D=3D 0) {
- // This child has no grandchildren; print it inline right here.
- child->printr(OS, G);
- once.insert(child);
- } else { // Just the address. FIXME: also print the child's op=
code.
- OS << (void*)child;
- if (unsigned RN =3D N->getOperand(i).getResNo())
- OS << ":" << RN;
- }
- }
-
- OS << "\n";
-
- // Dump children that have grandchildren on their own line(s).
- for (unsigned i =3D 0, e =3D N->getNumOperands(); i !=3D e; ++i) {
- const SDNode *child =3D N->getOperand(i).getNode();
- DumpNodesr(OS, child, indent+2, G, once);
- }
-}
-
-void SDNode::dumpr() const {
- VisitedSDNodeSet once;
- DumpNodesr(dbgs(), this, 0, 0, once);
-}
-
-void SDNode::dumpr(const SelectionDAG *G) const {
- VisitedSDNodeSet once;
- DumpNodesr(dbgs(), this, 0, G, once);
-}
-
-
// getAddressSpace - Return the address space this GlobalAddress belongs t=
o.
unsigned GlobalAddressSDNode::getAddressSpace() const {
return getGlobal()->getType()->getAddressSpace();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/SelectionDAGBuilder.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Tu=
e Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Tu=
e Apr 17 11:51:51 2012 +0300
@@ -41,13 +41,13 @@
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/Analysis/DebugInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetFrameLowering.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetIntrinsicInfo.h"
+#include "llvm/Target/TargetLibraryInfo.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Support/CommandLine.h"
@@ -197,7 +197,7 @@
// FP_ROUND's are always exact here.
if (ValueVT.bitsLT(Val.getValueType()))
return DAG.getNode(ISD::FP_ROUND, DL, ValueVT, Val,
- DAG.getIntPtrConstant(1));
+ DAG.getTargetConstant(1, TLI.getPointerTy()));
=20
return DAG.getNode(ISD::FP_EXTEND, DL, ValueVT, Val);
}
@@ -206,7 +206,6 @@
return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
=20
llvm_unreachable("Unknown mismatch!");
- return SDValue();
}
=20
/// getCopyFromParts - Create a value that contains the specified legal pa=
rts
@@ -353,10 +352,13 @@
assert(NumParts =3D=3D 1 && "Do not know what to promote to!");
Val =3D DAG.getNode(ISD::FP_EXTEND, DL, PartVT, Val);
} else {
- assert(PartVT.isInteger() && ValueVT.isInteger() &&
+ assert((PartVT.isInteger() || PartVT =3D=3D MVT::x86mmx) &&
+ ValueVT.isInteger() &&
"Unknown mismatch!");
ValueVT =3D EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits=
);
Val =3D DAG.getNode(ExtendKind, DL, ValueVT, Val);
+ if (PartVT =3D=3D MVT::x86mmx)
+ Val =3D DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
}
} else if (PartBits =3D=3D ValueVT.getSizeInBits()) {
// Different types of the same size.
@@ -364,10 +366,13 @@
Val =3D DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
} else if (NumParts * PartBits < ValueVT.getSizeInBits()) {
// If the parts cover less bits than value has, truncate the value.
- assert(PartVT.isInteger() && ValueVT.isInteger() &&
+ assert((PartVT.isInteger() || PartVT =3D=3D MVT::x86mmx) &&
+ ValueVT.isInteger() &&
"Unknown mismatch!");
ValueVT =3D EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits);
Val =3D DAG.getNode(ISD::TRUNCATE, DL, ValueVT, Val);
+ if (PartVT =3D=3D MVT::x86mmx)
+ Val =3D DAG.getNode(ISD::BITCAST, DL, PartVT, Val);
}
=20
// The value may have changed - recompute ValueVT.
@@ -813,9 +818,11 @@
}
}
=20
-void SelectionDAGBuilder::init(GCFunctionInfo *gfi, AliasAnalysis &aa) {
+void SelectionDAGBuilder::init(GCFunctionInfo *gfi, AliasAnalysis &aa,
+ const TargetLibraryInfo *li) {
AA =3D &aa;
GFI =3D gfi;
+ LibInfo =3D li;
TD =3D DAG.getTarget().getTargetData();
LPadToCallSiteMap.clear();
}
@@ -964,7 +971,7 @@
DAG.AddDbgValue(SDV, Val.getNode(), false);
}
} else
- DEBUG(dbgs() << "Dropping debug info for " << DI);
+ DEBUG(dbgs() << "Dropping debug info for " << DI << "\n");
DanglingDebugInfoMap[V] =3D DanglingDebugInfo();
}
}
@@ -1054,6 +1061,23 @@
return DAG.getMergeValues(&Constants[0], Constants.size(),
getCurDebugLoc());
}
+ =20
+ if (const ConstantDataSequential *CDS =3D
+ dyn_cast<ConstantDataSequential>(C)) {
+ SmallVector<SDValue, 4> Ops;
+ for (unsigned i =3D 0, e =3D CDS->getNumElements(); i !=3D e; ++i) {
+ SDNode *Val =3D getValue(CDS->getElementAsConstant(i)).getNode();
+ // Add each leaf value from the operand to the Constants list
+ // to form a flattened list of all the values.
+ for (unsigned i =3D 0, e =3D Val->getNumValues(); i !=3D e; ++i)
+ Ops.push_back(SDValue(Val, i));
+ }
+
+ if (isa<ArrayType>(CDS->getType()))
+ return DAG.getMergeValues(&Ops[0], Ops.size(), getCurDebugLoc());
+ return NodeMap[V] =3D DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(=
),
+ VT, &Ops[0], Ops.size());
+ }
=20
if (C->getType()->isStructTy() || C->getType()->isArrayTy()) {
assert((isa<ConstantAggregateZero>(C) || isa<UndefValue>(C)) &&
@@ -1088,9 +1112,9 @@
// Now that we know the number and type of the elements, get that numb=
er of
// elements into the Ops array based on what kind of constant it is.
SmallVector<SDValue, 16> Ops;
- if (const ConstantVector *CP =3D dyn_cast<ConstantVector>(C)) {
+ if (const ConstantVector *CV =3D dyn_cast<ConstantVector>(C)) {
for (unsigned i =3D 0; i !=3D NumElements; ++i)
- Ops.push_back(getValue(CP->getOperand(i)));
+ Ops.push_back(getValue(CV->getOperand(i)));
} else {
assert(isa<ConstantAggregateZero>(C) && "Unknown vector constant!");
EVT EltVT =3D TLI.getValueType(VecTy->getElementType());
@@ -1126,7 +1150,6 @@
}
=20
llvm_unreachable("Can't get register for value!");
- return SDValue();
}
=20
void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
@@ -1285,8 +1308,8 @@
}
=20
/// Return branch probability calculated by BranchProbabilityInfo for IR b=
locks.
-uint32_t SelectionDAGBuilder::getEdgeWeight(MachineBasicBlock *Src,
- MachineBasicBlock *Dst) {
+uint32_t SelectionDAGBuilder::getEdgeWeight(const MachineBasicBlock *Src,
+ const MachineBasicBlock *Dst) =
const {
BranchProbabilityInfo *BPI =3D FuncInfo.BPI;
if (!BPI)
return 0;
@@ -1336,6 +1359,8 @@
Condition =3D getICmpCondCode(IC->getPredicate());
} else if (const FCmpInst *FC =3D dyn_cast<FCmpInst>(Cond)) {
Condition =3D getFCmpCondCode(FC->getPredicate());
+ if (TM.Options.NoNaNsFPMath)
+ Condition =3D getFCmpCodeWithoutNaN(Condition);
} else {
Condition =3D ISD::SETEQ; // silence warning.
llvm_unreachable("Unknown compare instruction");
@@ -1811,8 +1836,8 @@
CopyToExportRegsIfNeeded(&I);
=20
// Update successor info
- InvokeMBB->addSuccessor(Return);
- InvokeMBB->addSuccessor(LandingPad);
+ addSuccessorWithWeight(InvokeMBB, Return);
+ addSuccessorWithWeight(InvokeMBB, LandingPad);
=20
// Drop into normal successor.
DAG.setRoot(DAG.getNode(ISD::BR, getCurDebugLoc(),
@@ -1820,9 +1845,6 @@
DAG.getBasicBlock(Return)));
}
=20
-void SelectionDAGBuilder::visitUnwind(const UnwindInst &I) {
-}
-
void SelectionDAGBuilder::visitResume(const ResumeInst &RI) {
llvm_unreachable("SelectionDAGBuilder shouldn't visit resume instruction=
s!");
}
@@ -1835,6 +1857,12 @@
MachineModuleInfo &MMI =3D DAG.getMachineFunction().getMMI();
AddLandingPadInfo(LP, MMI, MBB);
=20
+ // If there aren't registers to copy the values into (e.g., during SjLj
+ // exceptions), then don't bother to create these DAG nodes.
+ if (TLI.getExceptionPointerRegister() =3D=3D 0 &&
+ TLI.getExceptionSelectorRegister() =3D=3D 0)
+ return;
+
SmallVector<EVT, 2> ValueVTs;
ComputeValueVTs(TLI, LP.getType(), ValueVTs);
=20
@@ -2003,7 +2031,7 @@
}
=20
static inline bool areJTsAllowed(const TargetLowering &TLI) {
- return !DisableJumpTables &&
+ return !TLI.getTargetMachine().Options.DisableJumpTables &&
(TLI.isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
TLI.isOperationLegalOrCustom(ISD::BRIND, MVT::Other));
}
@@ -2190,7 +2218,7 @@
=20
CaseRange LHSR(CR.Range.first, Pivot);
CaseRange RHSR(Pivot, CR.Range.second);
- Constant *C =3D Pivot->Low;
+ const Constant *C =3D Pivot->Low;
MachineBasicBlock *FalseBB =3D 0, *TrueBB =3D 0;
=20
// We know that we branch to the LHS if the Value being switched on is
@@ -2383,14 +2411,14 @@
=20
BranchProbabilityInfo *BPI =3D FuncInfo.BPI;
// Start with "simple" cases
- for (size_t i =3D 1; i < SI.getNumSuccessors(); ++i) {
- BasicBlock *SuccBB =3D SI.getSuccessor(i);
+ for (SwitchInst::ConstCaseIt i =3D SI.case_begin(), e =3D SI.case_end();
+ i !=3D e; ++i) {
+ const BasicBlock *SuccBB =3D i.getCaseSuccessor();
MachineBasicBlock *SMBB =3D FuncInfo.MBBMap[SuccBB];
=20
uint32_t ExtraWeight =3D BPI ? BPI->getEdgeWeight(SI.getParent(), Succ=
BB) : 0;
=20
- Cases.push_back(Case(SI.getSuccessorValue(i),
- SI.getSuccessorValue(i),
+ Cases.push_back(Case(i.getCaseValue(), i.getCaseValue(),
SMBB, ExtraWeight));
}
std::sort(Cases.begin(), Cases.end(), CaseCmp());
@@ -2457,7 +2485,7 @@
=20
// If there is only the default destination, branch to it if it is not t=
he
// next basic block. Otherwise, just fall through.
- if (SI.getNumCases() =3D=3D 1) {
+ if (!SI.getNumCases()) {
// Update machine-CFG edges.
=20
// If this is not a fall-through branch, emit the branch.
@@ -2626,6 +2654,8 @@
SDValue Op1 =3D getValue(I.getOperand(0));
SDValue Op2 =3D getValue(I.getOperand(1));
ISD::CondCode Condition =3D getFCmpCondCode(predicate);
+ if (TM.Options.NoNaNsFPMath)
+ Condition =3D getFCmpCodeWithoutNaN(Condition);
EVT DestVT =3D TLI.getValueType(I.getType());
setValue(&I, DAG.getSetCC(getCurDebugLoc(), DestVT, Op1, Op2, Condition)=
);
}
@@ -2685,11 +2715,12 @@
SDValue N =3D getValue(I.getOperand(0));
EVT DestVT =3D TLI.getValueType(I.getType());
setValue(&I, DAG.getNode(ISD::FP_ROUND, getCurDebugLoc(),
- DestVT, N, DAG.getIntPtrConstant(0)));
+ DestVT, N,
+ DAG.getTargetConstant(0, TLI.getPointerTy())));
}
=20
void SelectionDAGBuilder::visitFPExt(const User &I){
- // FPTrunc is never a no-op cast, no need to check
+ // FPExt is never a no-op cast, no need to check
SDValue N =3D getValue(I.getOperand(0));
EVT DestVT =3D TLI.getValueType(I.getType());
setValue(&I, DAG.getNode(ISD::FP_EXTEND, getCurDebugLoc(), DestVT, N));
@@ -2772,33 +2803,25 @@
TLI.getValueType(I.getType()), InVec, InIdx));
}
=20
-// Utility for visitShuffleVector - Returns true if the mask is mask start=
ing
-// from SIndx and increasing to the element length (undefs are allowed).
-static bool SequentialMask(SmallVectorImpl<int> &Mask, unsigned SIndx) {
- unsigned MaskNumElts =3D Mask.size();
- for (unsigned i =3D 0; i !=3D MaskNumElts; ++i)
- if ((Mask[i] >=3D 0) && (Mask[i] !=3D (int)(i + SIndx)))
+// Utility for visitShuffleVector - Return true if every element in Mask,
+// begining from position Pos and ending in Pos+Size, falls within the
+// specified sequential range [L, L+Pos). or is undef.
+static bool isSequentialInRange(const SmallVectorImpl<int> &Mask,
+ unsigned Pos, unsigned Size, int Low) {
+ for (unsigned i =3D Pos, e =3D Pos+Size; i !=3D e; ++i, ++Low)
+ if (Mask[i] >=3D 0 && Mask[i] !=3D Low)
return false;
return true;
}
=20
void SelectionDAGBuilder::visitShuffleVector(const User &I) {
- SmallVector<int, 8> Mask;
SDValue Src1 =3D getValue(I.getOperand(0));
SDValue Src2 =3D getValue(I.getOperand(1));
=20
- // Convert the ConstantVector mask operand into an array of ints, with -1
- // representing undef values.
- SmallVector<Constant*, 8> MaskElts;
- cast<Constant>(I.getOperand(2))->getVectorElements(MaskElts);
- unsigned MaskNumElts =3D MaskElts.size();
- for (unsigned i =3D 0; i !=3D MaskNumElts; ++i) {
- if (isa<UndefValue>(MaskElts[i]))
- Mask.push_back(-1);
- else
- Mask.push_back(cast<ConstantInt>(MaskElts[i])->getSExtValue());
- }
-
+ SmallVector<int, 8> Mask;
+ ShuffleVectorInst::getShuffleMask(cast<Constant>(I.getOperand(2)), Mask);
+ unsigned MaskNumElts =3D Mask.size();
+ =20
EVT VT =3D TLI.getValueType(I.getType());
EVT SrcVT =3D Src1.getValueType();
unsigned SrcNumElts =3D SrcVT.getVectorNumElements();
@@ -2814,11 +2837,23 @@
// Mask is longer than the source vectors and is a multiple of the sou=
rce
// vectors. We can use concatenate vector to make the mask and vectors
// lengths match.
- if (SrcNumElts*2 =3D=3D MaskNumElts && SequentialMask(Mask, 0)) {
- // The shuffle is concatenating two vectors together.
- setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, getCurDebugLoc(),
- VT, Src1, Src2));
- return;
+ if (SrcNumElts*2 =3D=3D MaskNumElts) {
+ // First check for Src1 in low and Src2 in high
+ if (isSequentialInRange(Mask, 0, SrcNumElts, 0) &&
+ isSequentialInRange(Mask, SrcNumElts, SrcNumElts, SrcNumElts)) {
+ // The shuffle is concatenating two vectors together.
+ setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, getCurDebugLoc(),
+ VT, Src1, Src2));
+ return;
+ }
+ // Then check for Src2 in low and Src1 in high
+ if (isSequentialInRange(Mask, 0, SrcNumElts, SrcNumElts) &&
+ isSequentialInRange(Mask, SrcNumElts, SrcNumElts, 0)) {
+ // The shuffle is concatenating two vectors together.
+ setValue(&I, DAG.getNode(ISD::CONCAT_VECTORS, getCurDebugLoc(),
+ VT, Src2, Src1));
+ return;
+ }
}
=20
// Pad both vectors with undefs to make them the same length as the ma=
sk.
@@ -2843,10 +2878,9 @@
SmallVector<int, 8> MappedOps;
for (unsigned i =3D 0; i !=3D MaskNumElts; ++i) {
int Idx =3D Mask[i];
- if (Idx < (int)SrcNumElts)
- MappedOps.push_back(Idx);
- else
- MappedOps.push_back(Idx + MaskNumElts - SrcNumElts);
+ if (Idx >=3D (int)SrcNumElts)
+ Idx -=3D SrcNumElts - MaskNumElts;
+ MappedOps.push_back(Idx);
}
=20
setValue(&I, DAG.getVectorShuffle(VT, getCurDebugLoc(), Src1, Src2,
@@ -2858,13 +2892,13 @@
// Analyze the access pattern of the vector to see if we can extract
// two subvectors and do the shuffle. The analysis is done by calculat=
ing
// the range of elements the mask access on both vectors.
- int MinRange[2] =3D { static_cast<int>(SrcNumElts+1),
- static_cast<int>(SrcNumElts+1)};
+ int MinRange[2] =3D { static_cast<int>(SrcNumElts),
+ static_cast<int>(SrcNumElts)};
int MaxRange[2] =3D {-1, -1};
=20
for (unsigned i =3D 0; i !=3D MaskNumElts; ++i) {
int Idx =3D Mask[i];
- int Input =3D 0;
+ unsigned Input =3D 0;
if (Idx < 0)
continue;
=20
@@ -2880,35 +2914,31 @@
=20
// Check if the access is smaller than the vector size and can we find
// a reasonable extract index.
- int RangeUse[2] =3D { 2, 2 }; // 0 =3D Unused, 1 =3D Extract, 2 =3D C=
an not
- // Extract.
+ int RangeUse[2] =3D { -1, -1 }; // 0 =3D Unused, 1 =3D Extract, -1 =
=3D Can not
+ // Extract.
int StartIdx[2]; // StartIdx to extract from
- for (int Input=3D0; Input < 2; ++Input) {
- if (MinRange[Input] =3D=3D (int)(SrcNumElts+1) && MaxRange[Input] =
=3D=3D -1) {
+ for (unsigned Input =3D 0; Input < 2; ++Input) {
+ if (MinRange[Input] >=3D (int)SrcNumElts && MaxRange[Input] < 0) {
RangeUse[Input] =3D 0; // Unused
StartIdx[Input] =3D 0;
- } else if (MaxRange[Input] - MinRange[Input] < (int)MaskNumElts) {
- // Fits within range but we should see if we can find a good
- // start index that is a multiple of the mask length.
- if (MaxRange[Input] < (int)MaskNumElts) {
- RangeUse[Input] =3D 1; // Extract from beginning of the vector
- StartIdx[Input] =3D 0;
- } else {
- StartIdx[Input] =3D (MinRange[Input]/MaskNumElts)*MaskNumElts;
- if (MaxRange[Input] - StartIdx[Input] < (int)MaskNumElts &&
- StartIdx[Input] + MaskNumElts <=3D SrcNumElts)
- RangeUse[Input] =3D 1; // Extract from a multiple of the mask =
length.
- }
+ continue;
}
+
+ // Find a good start index that is a multiple of the mask length. Th=
en
+ // see if the rest of the elements are in range.
+ StartIdx[Input] =3D (MinRange[Input]/MaskNumElts)*MaskNumElts;
+ if (MaxRange[Input] - StartIdx[Input] < (int)MaskNumElts &&
+ StartIdx[Input] + MaskNumElts <=3D SrcNumElts)
+ RangeUse[Input] =3D 1; // Extract from a multiple of the mask leng=
th.
}
=20
if (RangeUse[0] =3D=3D 0 && RangeUse[1] =3D=3D 0) {
setValue(&I, DAG.getUNDEF(VT)); // Vectors are not used.
return;
}
- else if (RangeUse[0] < 2 && RangeUse[1] < 2) {
+ if (RangeUse[0] >=3D 0 && RangeUse[1] >=3D 0) {
// Extract appropriate subvector and generate a vector shuffle
- for (int Input=3D0; Input < 2; ++Input) {
+ for (unsigned Input =3D 0; Input < 2; ++Input) {
SDValue &Src =3D Input =3D=3D 0 ? Src1 : Src2;
if (RangeUse[Input] =3D=3D 0)
Src =3D DAG.getUNDEF(VT);
@@ -2921,12 +2951,13 @@
SmallVector<int, 8> MappedOps;
for (unsigned i =3D 0; i !=3D MaskNumElts; ++i) {
int Idx =3D Mask[i];
- if (Idx < 0)
- MappedOps.push_back(Idx);
- else if (Idx < (int)SrcNumElts)
- MappedOps.push_back(Idx - StartIdx[0]);
- else
- MappedOps.push_back(Idx - SrcNumElts - StartIdx[1] + MaskNumElts=
);
+ if (Idx >=3D 0) {
+ if (Idx < (int)SrcNumElts)
+ Idx -=3D StartIdx[0];
+ else
+ Idx -=3D SrcNumElts + StartIdx[1] - MaskNumElts;
+ }
+ MappedOps.push_back(Idx);
}
=20
setValue(&I, DAG.getVectorShuffle(VT, getCurDebugLoc(), Src1, Src2,
@@ -2942,22 +2973,20 @@
EVT PtrVT =3D TLI.getPointerTy();
SmallVector<SDValue,8> Ops;
for (unsigned i =3D 0; i !=3D MaskNumElts; ++i) {
- if (Mask[i] < 0) {
- Ops.push_back(DAG.getUNDEF(EltVT));
+ int Idx =3D Mask[i];
+ SDValue Res;
+
+ if (Idx < 0) {
+ Res =3D DAG.getUNDEF(EltVT);
} else {
- int Idx =3D Mask[i];
- SDValue Res;
-
- if (Idx < (int)SrcNumElts)
- Res =3D DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurDebugLoc(),
- EltVT, Src1, DAG.getConstant(Idx, PtrVT));
- else
- Res =3D DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurDebugLoc(),
- EltVT, Src2,
- DAG.getConstant(Idx - SrcNumElts, PtrVT));
-
- Ops.push_back(Res);
+ SDValue &Src =3D Idx < (int)SrcNumElts ? Src1 : Src2;
+ if (Idx >=3D (int)SrcNumElts) Idx -=3D SrcNumElts;
+
+ Res =3D DAG.getNode(ISD::EXTRACT_VECTOR_ELT, getCurDebugLoc(),
+ EltVT, Src, DAG.getConstant(Idx, PtrVT));
}
+
+ Ops.push_back(Res);
}
=20
setValue(&I, DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(),
@@ -3042,7 +3071,9 @@
=20
void SelectionDAGBuilder::visitGetElementPtr(const User &I) {
SDValue N =3D getValue(I.getOperand(0));
- Type *Ty =3D I.getOperand(0)->getType();
+ // Note that the pointer operand may be a vector of pointers. Take the s=
calar
+ // element which holds a pointer.
+ Type *Ty =3D I.getOperand(0)->getType()->getScalarType();
=20
for (GetElementPtrInst::const_op_iterator OI =3D I.op_begin()+1, E =3D I=
.op_end();
OI !=3D E; ++OI) {
@@ -3096,7 +3127,7 @@
unsigned Amt =3D ElementSize.logBase2();
IdxN =3D DAG.getNode(ISD::SHL, getCurDebugLoc(),
N.getValueType(), IdxN,
- DAG.getConstant(Amt, TLI.getPointerTy()));
+ DAG.getConstant(Amt, IdxN.getValueType()));
} else {
SDValue Scale =3D DAG.getConstant(ElementSize, TLI.getPointerTy(=
));
IdxN =3D DAG.getNode(ISD::MUL, getCurDebugLoc(),
@@ -3175,8 +3206,10 @@
=20
bool isVolatile =3D I.isVolatile();
bool isNonTemporal =3D I.getMetadata("nontemporal") !=3D 0;
+ bool isInvariant =3D I.getMetadata("invariant.load") !=3D 0;
unsigned Alignment =3D I.getAlignment();
const MDNode *TBAAInfo =3D I.getMetadata(LLVMContext::MD_tbaa);
+ const MDNode *Ranges =3D I.getMetadata(LLVMContext::MD_range);
=20
SmallVector<EVT, 4> ValueVTs;
SmallVector<uint64_t, 4> Offsets;
@@ -3224,7 +3257,8 @@
DAG.getConstant(Offsets[i], PtrVT));
SDValue L =3D DAG.getLoad(ValueVTs[i], getCurDebugLoc(), Root,
A, MachinePointerInfo(SV, Offsets[i]), isVolat=
ile,
- isNonTemporal, Alignment, TBAAInfo);
+ isNonTemporal, isInvariant, Alignment, TBAAInf=
o,
+ Ranges);
=20
Values[i] =3D L;
Chains[ChainI] =3D L.getValue(1);
@@ -3358,7 +3392,7 @@
DebugLoc dl =3D getCurDebugLoc();
ISD::NodeType NT;
switch (I.getOperation()) {
- default: llvm_unreachable("Unknown atomicrmw operation"); return;
+ default: llvm_unreachable("Unknown atomicrmw operation");
case AtomicRMWInst::Xchg: NT =3D ISD::ATOMIC_SWAP; break;
case AtomicRMWInst::Add: NT =3D ISD::ATOMIC_LOAD_ADD; break;
case AtomicRMWInst::Sub: NT =3D ISD::ATOMIC_LOAD_SUB; break;
@@ -3496,24 +3530,16 @@
// Add the intrinsic ID as an integer operand if it's not a target intri=
nsic.
if (!IsTgtIntrinsic || Info.opc =3D=3D ISD::INTRINSIC_VOID ||
Info.opc =3D=3D ISD::INTRINSIC_W_CHAIN)
- Ops.push_back(DAG.getConstant(Intrinsic, TLI.getPointerTy()));
+ Ops.push_back(DAG.getTargetConstant(Intrinsic, TLI.getPointerTy()));
=20
// Add all operands of the call to the operand list.
for (unsigned i =3D 0, e =3D I.getNumArgOperands(); i !=3D e; ++i) {
SDValue Op =3D getValue(I.getArgOperand(i));
- assert(TLI.isTypeLegal(Op.getValueType()) &&
- "Intrinsic uses a non-legal type?");
Ops.push_back(Op);
}
=20
SmallVector<EVT, 4> ValueVTs;
ComputeValueVTs(TLI, I.getType(), ValueVTs);
-#ifndef NDEBUG
- for (unsigned Val =3D 0, E =3D ValueVTs.size(); Val !=3D E; ++Val) {
- assert(TLI.isTypeLegal(ValueVTs[Val]) &&
- "Intrinsic uses a non-legal type?");
- }
-#endif // NDEBUG
=20
if (HasChain)
ValueVTs.push_back(MVT::Other);
@@ -3556,6 +3582,12 @@
}
=20
setValue(&I, Result);
+ } else {
+ // Assign order to result here. If the intrinsic does not produce a re=
sult,
+ // it won't be mapped to a SDNode and visit() will not assign it an or=
der
+ // number.
+ ++SDNodeOrder;
+ AssignOrderingToNode(Result.getNode());
}
}
=20
@@ -3597,17 +3629,6 @@
return DAG.getConstantFP(APFloat(APInt(32, Flt)), MVT::f32);
}
=20
-// implVisitAluOverflow - Lower arithmetic overflow instrinsics.
-const char *
-SelectionDAGBuilder::implVisitAluOverflow(const CallInst &I, ISD::NodeType=
Op) {
- SDValue Op1 =3D getValue(I.getArgOperand(0));
- SDValue Op2 =3D getValue(I.getArgOperand(1));
-
- SDVTList VTs =3D DAG.getVTList(Op1.getValueType(), MVT::i1);
- setValue(&I, DAG.getNode(Op, getCurDebugLoc(), VTs, Op1, Op2));
- return 0;
-}
-
/// visitExp - Lower an exp intrinsic. Handles the special sequences for
/// limited-precision mode.
void
@@ -4367,9 +4388,8 @@
const SDValue &CFR =3D Ext.getOperand(0);
if (CFR.getOpcode() =3D=3D ISD::CopyFromReg)
return cast<RegisterSDNode>(CFR.getOperand(1))->getReg();
- else
- if (CFR.getOpcode() =3D=3D ISD::TRUNCATE)
- return getTruncatedArgReg(CFR);
+ if (CFR.getOpcode() =3D=3D ISD::TRUNCATE)
+ return getTruncatedArgReg(CFR);
}
return 0;
}
@@ -4398,7 +4418,7 @@
// Some arguments' frame index is recorded during argument lowering.
Offset =3D FuncInfo.getArgumentFrameIndex(Arg);
if (Offset)
- Reg =3D TRI->getFrameRegister(MF);
+ Reg =3D TRI->getFrameRegister(MF);
=20
if (!Reg && N.getNode()) {
if (N.getOpcode() =3D=3D ISD::CopyFromReg)
@@ -4473,9 +4493,9 @@
getValue(I.getArgOperand(0))));
return 0;
case Intrinsic::setjmp:
- return "_setjmp"+!TLI.usesUnderscoreSetJmp();
+ return &"_setjmp"[!TLI.usesUnderscoreSetJmp()];
case Intrinsic::longjmp:
- return "_longjmp"+!TLI.usesUnderscoreLongJmp();
+ return &"_longjmp"[!TLI.usesUnderscoreLongJmp()];
case Intrinsic::memcpy: {
// Assert for address < 256 since we support only user defined address
// spaces.
@@ -4531,8 +4551,10 @@
const DbgDeclareInst &DI =3D cast<DbgDeclareInst>(I);
MDNode *Variable =3D DI.getVariable();
const Value *Address =3D DI.getAddress();
- if (!Address || !DIVariable(Variable).Verify())
+ if (!Address || !DIVariable(Variable).Verify()) {
+ DEBUG(dbgs() << "Dropping debug info for " << DI << "\n");
return 0;
+ }
=20
// Build an entry in DbgOrdering. Debug info input nodes get an SDNod=
eOrder
// but do not always have a corresponding SDNode built. The SDNodeOrd=
er
@@ -4543,7 +4565,7 @@
// Check if address has undef value.
if (isa<UndefValue>(Address) ||
(Address->use_empty() && !isa<Argument>(Address))) {
- DEBUG(dbgs() << "Dropping debug info for " << DI);
+ DEBUG(dbgs() << "Dropping debug info for " << DI << "\n");
return 0;
}
=20
@@ -4553,11 +4575,13 @@
N =3D UnusedArgNodeMap[Address];
SDDbgValue *SDV;
if (N.getNode()) {
+ if (const BitCastInst *BCI =3D dyn_cast<BitCastInst>(Address))
+ Address =3D BCI->getOperand(0);
// Parameters are handled specially.
bool isParameter =3D
- DIVariable(Variable).getTag() =3D=3D dwarf::DW_TAG_arg_variable;
- if (const BitCastInst *BCI =3D dyn_cast<BitCastInst>(Address))
- Address =3D BCI->getOperand(0);
+ (DIVariable(Variable).getTag() =3D=3D dwarf::DW_TAG_arg_variable ||
+ isa<Argument>(Address));
+
const AllocaInst *AI =3D dyn_cast<AllocaInst>(Address);
=20
if (isParameter && !AI) {
@@ -4577,7 +4601,9 @@
0, dl, SDNodeOrder);
else {
// Can't do anything with other non-AI cases yet.
- DEBUG(dbgs() << "Dropping debug info for " << DI);
+ DEBUG(dbgs() << "Dropping debug info for " << DI << "\n");
+ DEBUG(dbgs() << "non-AllocaInst issue for Address: \n\t");
+ DEBUG(Address->dump());
return 0;
}
DAG.AddDbgValue(SDV, N.getNode(), isParameter);
@@ -4599,7 +4625,7 @@
}
}
}
- DEBUG(dbgs() << "Dropping debug info for " << DI);
+ DEBUG(dbgs() << "Dropping debug info for " << DI << "\n");
}
}
return 0;
@@ -4645,7 +4671,7 @@
} else {
// We may expand this to cover more cases. One case where we have=
no
// data available is an unreferenced parameter.
- DEBUG(dbgs() << "Dropping debug info for " << DI);
+ DEBUG(dbgs() << "Dropping debug info for " << DI << "\n");
}
}
=20
@@ -4654,8 +4680,11 @@
V =3D BCI->getOperand(0);
const AllocaInst *AI =3D dyn_cast<AllocaInst>(V);
// Don't handle byval struct arguments or VLAs, for example.
- if (!AI)
+ if (!AI) {
+ DEBUG(dbgs() << "Dropping debug location info for:\n " << DI << "\n=
");
+ DEBUG(dbgs() << " Last seen at:\n " << *V << "\n");
return 0;
+ }
DenseMap<const AllocaInst*, int>::iterator SI =3D
FuncInfo.StaticAllocaMap.find(AI);
if (SI =3D=3D FuncInfo.StaticAllocaMap.end())
@@ -4667,43 +4696,6 @@
MMI.setVariableDbgInfo(Variable, FI, DI.getDebugLoc());
return 0;
}
- case Intrinsic::eh_exception: {
- // Insert the EXCEPTIONADDR instruction.
- assert(FuncInfo.MBB->isLandingPad() &&
- "Call to eh.exception not in landing pad!");
- SDVTList VTs =3D DAG.getVTList(TLI.getPointerTy(), MVT::Other);
- SDValue Ops[1];
- Ops[0] =3D DAG.getRoot();
- SDValue Op =3D DAG.getNode(ISD::EXCEPTIONADDR, dl, VTs, Ops, 1);
- setValue(&I, Op);
- DAG.setRoot(Op.getValue(1));
- return 0;
- }
-
- case Intrinsic::eh_selector: {
- MachineBasicBlock *CallMBB =3D FuncInfo.MBB;
- MachineModuleInfo &MMI =3D DAG.getMachineFunction().getMMI();
- if (CallMBB->isLandingPad())
- AddCatchInfo(I, &MMI, CallMBB);
- else {
-#ifndef NDEBUG
- FuncInfo.CatchInfoLost.insert(&I);
-#endif
- // FIXME: Mark exception selector register as live in. Hack for PR1=
508.
- unsigned Reg =3D TLI.getExceptionSelectorRegister();
- if (Reg) FuncInfo.MBB->addLiveIn(Reg);
- }
-
- // Insert the EHSELECTION instruction.
- SDVTList VTs =3D DAG.getVTList(TLI.getPointerTy(), MVT::Other);
- SDValue Ops[2];
- Ops[0] =3D getValue(I.getArgOperand(0));
- Ops[1] =3D getRoot();
- SDValue Op =3D DAG.getNode(ISD::EHSELECTION, dl, VTs, Ops, 2);
- DAG.setRoot(Op.getValue(1));
- setValue(&I, DAG.getSExtOrTrunc(Op, dl, MVT::i32));
- return 0;
- }
=20
case Intrinsic::eh_typeid_for: {
// Find the type id for the given typeinfo.
@@ -4775,11 +4767,6 @@
getRoot(), getValue(I.getArgOperand(0))));
return 0;
}
- case Intrinsic::eh_sjlj_dispatch_setup: {
- DAG.setRoot(DAG.getNode(ISD::EH_SJLJ_DISPATCHSETUP, dl, MVT::Other,
- getRoot(), getValue(I.getArgOperand(0))));
- return 0;
- }
=20
case Intrinsic::x86_mmx_pslli_w:
case Intrinsic::x86_mmx_pslli_d:
@@ -4841,6 +4828,22 @@
setValue(&I, Res);
return 0;
}
+ case Intrinsic::x86_avx_vinsertf128_pd_256:
+ case Intrinsic::x86_avx_vinsertf128_ps_256:
+ case Intrinsic::x86_avx_vinsertf128_si_256:
+ case Intrinsic::x86_avx2_vinserti128: {
+ DebugLoc dl =3D getCurDebugLoc();
+ EVT DestVT =3D TLI.getValueType(I.getType());
+ EVT ElVT =3D TLI.getValueType(I.getArgOperand(1)->getType());
+ uint64_t Idx =3D (cast<ConstantInt>(I.getArgOperand(2))->getZExtValue(=
) & 1) *
+ ElVT.getVectorNumElements();
+ Res =3D DAG.getNode(ISD::INSERT_SUBVECTOR, dl, DestVT,
+ getValue(I.getArgOperand(0)),
+ getValue(I.getArgOperand(1)),
+ DAG.getConstant(Idx, MVT::i32));
+ setValue(&I, Res);
+ return 0;
+ }
case Intrinsic::convertff:
case Intrinsic::convertfsi:
case Intrinsic::convertfui:
@@ -4852,6 +4855,7 @@
case Intrinsic::convertuu: {
ISD::CvtCode Code =3D ISD::CVT_INVALID;
switch (Intrinsic) {
+ default: llvm_unreachable("Impossible intrinsic"); // Can't reach her=
e.
case Intrinsic::convertff: Code =3D ISD::CVT_FF; break;
case Intrinsic::convertfsi: Code =3D ISD::CVT_FS; break;
case Intrinsic::convertfui: Code =3D ISD::CVT_FU; break;
@@ -4946,14 +4950,18 @@
return 0;
case Intrinsic::cttz: {
SDValue Arg =3D getValue(I.getArgOperand(0));
+ ConstantInt *CI =3D cast<ConstantInt>(I.getArgOperand(1));
EVT Ty =3D Arg.getValueType();
- setValue(&I, DAG.getNode(ISD::CTTZ, dl, Ty, Arg));
+ setValue(&I, DAG.getNode(CI->isZero() ? ISD::CTTZ : ISD::CTTZ_ZERO_UND=
EF,
+ dl, Ty, Arg));
return 0;
}
case Intrinsic::ctlz: {
SDValue Arg =3D getValue(I.getArgOperand(0));
+ ConstantInt *CI =3D cast<ConstantInt>(I.getArgOperand(1));
EVT Ty =3D Arg.getValueType();
- setValue(&I, DAG.getNode(ISD::CTLZ, dl, Ty, Arg));
+ setValue(&I, DAG.getNode(CI->isZero() ? ISD::CTLZ : ISD::CTLZ_ZERO_UND=
EF,
+ dl, Ty, Arg));
return 0;
}
case Intrinsic::ctpop: {
@@ -5052,7 +5060,6 @@
case Intrinsic::gcread:
case Intrinsic::gcwrite:
llvm_unreachable("GC failed to lower gcread/gcwrite intrinsics!");
- return 0;
case Intrinsic::flt_rounds:
setValue(&I, DAG.getNode(ISD::FLT_ROUNDS_, dl, MVT::i32));
return 0;
@@ -5064,7 +5071,7 @@
}
=20
case Intrinsic::trap: {
- StringRef TrapFuncName =3D getTrapFunctionName();
+ StringRef TrapFuncName =3D TM.Options.getTrapFunctionName();
if (TrapFuncName.empty()) {
DAG.setRoot(DAG.getNode(ISD::TRAP, dl,MVT::Other, getRoot()));
return 0;
@@ -5073,25 +5080,36 @@
std::pair<SDValue, SDValue> Result =3D
TLI.LowerCallTo(getRoot(), I.getType(),
false, false, false, false, 0, CallingConv::C,
- /*isTailCall=3D*/false, /*isReturnValueUsed=3D*/true,
+ /*isTailCall=3D*/false,
+ /*doesNotRet=3D*/false, /*isReturnValueUsed=3D*/true,
DAG.getExternalSymbol(TrapFuncName.data(), TLI.getPointer=
Ty()),
Args, DAG, getCurDebugLoc());
DAG.setRoot(Result.second);
return 0;
}
case Intrinsic::uadd_with_overflow:
- return implVisitAluOverflow(I, ISD::UADDO);
case Intrinsic::sadd_with_overflow:
- return implVisitAluOverflow(I, ISD::SADDO);
case Intrinsic::usub_with_overflow:
- return implVisitAluOverflow(I, ISD::USUBO);
case Intrinsic::ssub_with_overflow:
- return implVisitAluOverflow(I, ISD::SSUBO);
case Intrinsic::umul_with_overflow:
- return implVisitAluOverflow(I, ISD::UMULO);
- case Intrinsic::smul_with_overflow:
- return implVisitAluOverflow(I, ISD::SMULO);
-
+ case Intrinsic::smul_with_overflow: {
+ ISD::NodeType Op;
+ switch (Intrinsic) {
+ default: llvm_unreachable("Impossible intrinsic"); // Can't reach her=
e.
+ case Intrinsic::uadd_with_overflow: Op =3D ISD::UADDO; break;
+ case Intrinsic::sadd_with_overflow: Op =3D ISD::SADDO; break;
+ case Intrinsic::usub_with_overflow: Op =3D ISD::USUBO; break;
+ case Intrinsic::ssub_with_overflow: Op =3D ISD::SSUBO; break;
+ case Intrinsic::umul_with_overflow: Op =3D ISD::UMULO; break;
+ case Intrinsic::smul_with_overflow: Op =3D ISD::SMULO; break;
+ }
+ SDValue Op1 =3D getValue(I.getArgOperand(0));
+ SDValue Op2 =3D getValue(I.getArgOperand(1));
+
+ SDVTList VTs =3D DAG.getVTList(Op1.getValueType(), MVT::i1);
+ setValue(&I, DAG.getNode(Op, getCurDebugLoc(), VTs, Op1, Op2));
+ return 0;
+ }
case Intrinsic::prefetch: {
SDValue Ops[5];
unsigned rw =3D cast<ConstantInt>(I.getArgOperand(1))->getZExtValue();
@@ -5226,7 +5244,7 @@
=20
// If there's a possibility that fast-isel has already selected some amo=
unt
// of the current basic block, don't emit a tail call.
- if (isTailCall && EnableFastISel)
+ if (isTailCall && TM.Options.EnableFastISel)
isTailCall =3D false;
=20
std::pair<SDValue,SDValue> Result =3D
@@ -5236,6 +5254,7 @@
CS.paramHasAttr(0, Attribute::InReg), FTy->getNumParam=
s(),
CS.getCallingConv(),
isTailCall,
+ CS.doesNotReturn(),
!CS.getInstruction()->use_empty(),
Callee, Args, DAG, getCurDebugLoc());
assert((isTailCall || Result.second.getNode()) &&
@@ -5264,7 +5283,7 @@
SDValue L =3D DAG.getLoad(Outs[i].VT, getCurDebugLoc(), Result.secon=
d,
Add,
MachinePointerInfo::getFixedStack(DemoteStackIdx, Offset=
s[i]),
- false, false, 1);
+ false, false, false, 1);
Values[i] =3D L;
Chains[i] =3D L.getValue(1);
}
@@ -5375,7 +5394,8 @@
SDValue LoadVal =3D Builder.DAG.getLoad(LoadVT, Builder.getCurDebugLoc()=
, Root,
Ptr, MachinePointerInfo(PtrVal),
false /*volatile*/,
- false /*nontemporal*/, 1 /* align=
=3D1 */);
+ false /*nontemporal*/,=20
+ false /*isinvariant*/, 1 /* align=
=3D1 */);
=20
if (!ConstantMemory)
Builder.PendingLoads.push_back(LoadVal.getValue(1));
@@ -5470,23 +5490,8 @@
return;
}
=20
- // See if any floating point values are being passed to this function. T=
his is
- // used to emit an undefined reference to fltused on Windows.
- FunctionType *FT =3D
- cast<FunctionType>(I.getCalledValue()->getType()->getContainedType(0));
MachineModuleInfo &MMI =3D DAG.getMachineFunction().getMMI();
- if (FT->isVarArg() &&
- !MMI.callsExternalVAFunctionWithFloatingPointArguments()) {
- for (unsigned i =3D 0, e =3D I.getNumArgOperands(); i !=3D e; ++i) {
- Type* T =3D I.getArgOperand(i)->getType();
- for (po_iterator<Type*> i =3D po_begin(T), e =3D po_end(T);
- i !=3D e; ++i) {
- if (!i->isFloatingPointTy()) continue;
- MMI.setCallsExternalVAFunctionWithFloatingPointArguments(true);
- break;
- }
- }
- }
+ ComputeUsesVAFloatArgument(I, &MMI);
=20
const char *RenameFn =3D 0;
if (Function *F =3D I.getCalledFunction()) {
@@ -5509,7 +5514,9 @@
// can't be a library call.
if (!F->hasLocalLinkage() && F->hasName()) {
StringRef Name =3D F->getName();
- if (Name =3D=3D "copysign" || Name =3D=3D "copysignf" || Name =3D=3D=
"copysignl") {
+ if ((LibInfo->has(LibFunc::copysign) && Name =3D=3D "copysign") ||
+ (LibInfo->has(LibFunc::copysignf) && Name =3D=3D "copysignf") ||
+ (LibInfo->has(LibFunc::copysignl) && Name =3D=3D "copysignl")) {
if (I.getNumArgOperands() =3D=3D 2 && // Basic sanity checks.
I.getArgOperand(0)->getType()->isFloatingPointTy() &&
I.getType() =3D=3D I.getArgOperand(0)->getType() &&
@@ -5520,7 +5527,9 @@
LHS.getValueType(), LHS, RHS));
return;
}
- } else if (Name =3D=3D "fabs" || Name =3D=3D "fabsf" || Name =3D=3D =
"fabsl") {
+ } else if ((LibInfo->has(LibFunc::fabs) && Name =3D=3D "fabs") ||
+ (LibInfo->has(LibFunc::fabsf) && Name =3D=3D "fabsf") ||
+ (LibInfo->has(LibFunc::fabsl) && Name =3D=3D "fabsl")) {
if (I.getNumArgOperands() =3D=3D 1 && // Basic sanity checks.
I.getArgOperand(0)->getType()->isFloatingPointTy() &&
I.getType() =3D=3D I.getArgOperand(0)->getType()) {
@@ -5529,7 +5538,9 @@
Tmp.getValueType(), Tmp));
return;
}
- } else if (Name =3D=3D "sin" || Name =3D=3D "sinf" || Name =3D=3D "s=
inl") {
+ } else if ((LibInfo->has(LibFunc::sin) && Name =3D=3D "sin") ||
+ (LibInfo->has(LibFunc::sinf) && Name =3D=3D "sinf") ||
+ (LibInfo->has(LibFunc::sinl) && Name =3D=3D "sinl")) {
if (I.getNumArgOperands() =3D=3D 1 && // Basic sanity checks.
I.getArgOperand(0)->getType()->isFloatingPointTy() &&
I.getType() =3D=3D I.getArgOperand(0)->getType() &&
@@ -5539,7 +5550,9 @@
Tmp.getValueType(), Tmp));
return;
}
- } else if (Name =3D=3D "cos" || Name =3D=3D "cosf" || Name =3D=3D "c=
osl") {
+ } else if ((LibInfo->has(LibFunc::cos) && Name =3D=3D "cos") ||
+ (LibInfo->has(LibFunc::cosf) && Name =3D=3D "cosf") ||
+ (LibInfo->has(LibFunc::cosl) && Name =3D=3D "cosl")) {
if (I.getNumArgOperands() =3D=3D 1 && // Basic sanity checks.
I.getArgOperand(0)->getType()->isFloatingPointTy() &&
I.getType() =3D=3D I.getArgOperand(0)->getType() &&
@@ -5549,7 +5562,9 @@
Tmp.getValueType(), Tmp));
return;
}
- } else if (Name =3D=3D "sqrt" || Name =3D=3D "sqrtf" || Name =3D=3D =
"sqrtl") {
+ } else if ((LibInfo->has(LibFunc::sqrt) && Name =3D=3D "sqrt") ||
+ (LibInfo->has(LibFunc::sqrtf) && Name =3D=3D "sqrtf") ||
+ (LibInfo->has(LibFunc::sqrtl) && Name =3D=3D "sqrtl")) {
if (I.getNumArgOperands() =3D=3D 1 && // Basic sanity checks.
I.getArgOperand(0)->getType()->isFloatingPointTy() &&
I.getType() =3D=3D I.getArgOperand(0)->getType() &&
@@ -5559,6 +5574,85 @@
Tmp.getValueType(), Tmp));
return;
}
+ } else if ((LibInfo->has(LibFunc::floor) && Name =3D=3D "floor") ||
+ (LibInfo->has(LibFunc::floorf) && Name =3D=3D "floorf") ||
+ (LibInfo->has(LibFunc::floorl) && Name =3D=3D "floorl")) {
+ if (I.getNumArgOperands() =3D=3D 1 && // Basic sanity checks.
+ I.getArgOperand(0)->getType()->isFloatingPointTy() &&
+ I.getType() =3D=3D I.getArgOperand(0)->getType()) {
+ SDValue Tmp =3D getValue(I.getArgOperand(0));
+ setValue(&I, DAG.getNode(ISD::FFLOOR, getCurDebugLoc(),
+ Tmp.getValueType(), Tmp));
+ return;
+ }
+ } else if ((LibInfo->has(LibFunc::nearbyint) && Name =3D=3D "nearbyi=
nt") ||
+ (LibInfo->has(LibFunc::nearbyintf) && Name =3D=3D "nearby=
intf") ||
+ (LibInfo->has(LibFunc::nearbyintl) && Name =3D=3D "nearby=
intl")) {
+ if (I.getNumArgOperands() =3D=3D 1 && // Basic sanity checks.
+ I.getArgOperand(0)->getType()->isFloatingPointTy() &&
+ I.getType() =3D=3D I.getArgOperand(0)->getType()) {
+ SDValue Tmp =3D getValue(I.getArgOperand(0));
+ setValue(&I, DAG.getNode(ISD::FNEARBYINT, getCurDebugLoc(),
+ Tmp.getValueType(), Tmp));
+ return;
+ }
+ } else if ((LibInfo->has(LibFunc::ceil) && Name =3D=3D "ceil") ||
+ (LibInfo->has(LibFunc::ceilf) && Name =3D=3D "ceilf") ||
+ (LibInfo->has(LibFunc::ceill) && Name =3D=3D "ceill")) {
+ if (I.getNumArgOperands() =3D=3D 1 && // Basic sanity checks.
+ I.getArgOperand(0)->getType()->isFloatingPointTy() &&
+ I.getType() =3D=3D I.getArgOperand(0)->getType()) {
+ SDValue Tmp =3D getValue(I.getArgOperand(0));
+ setValue(&I, DAG.getNode(ISD::FCEIL, getCurDebugLoc(),
+ Tmp.getValueType(), Tmp));
+ return;
+ }
+ } else if ((LibInfo->has(LibFunc::rint) && Name =3D=3D "rint") ||
+ (LibInfo->has(LibFunc::rintf) && Name =3D=3D "rintf") ||
+ (LibInfo->has(LibFunc::rintl) && Name =3D=3D "rintl")) {
+ if (I.getNumArgOperands() =3D=3D 1 && // Basic sanity checks.
+ I.getArgOperand(0)->getType()->isFloatingPointTy() &&
+ I.getType() =3D=3D I.getArgOperand(0)->getType()) {
+ SDValue Tmp =3D getValue(I.getArgOperand(0));
+ setValue(&I, DAG.getNode(ISD::FRINT, getCurDebugLoc(),
+ Tmp.getValueType(), Tmp));
+ return;
+ }
+ } else if ((LibInfo->has(LibFunc::trunc) && Name =3D=3D "trunc") ||
+ (LibInfo->has(LibFunc::truncf) && Name =3D=3D "truncf") ||
+ (LibInfo->has(LibFunc::truncl) && Name =3D=3D "truncl")) {
+ if (I.getNumArgOperands() =3D=3D 1 && // Basic sanity checks.
+ I.getArgOperand(0)->getType()->isFloatingPointTy() &&
+ I.getType() =3D=3D I.getArgOperand(0)->getType()) {
+ SDValue Tmp =3D getValue(I.getArgOperand(0));
+ setValue(&I, DAG.getNode(ISD::FTRUNC, getCurDebugLoc(),
+ Tmp.getValueType(), Tmp));
+ return;
+ }
+ } else if ((LibInfo->has(LibFunc::log2) && Name =3D=3D "log2") ||
+ (LibInfo->has(LibFunc::log2f) && Name =3D=3D "log2f") ||
+ (LibInfo->has(LibFunc::log2l) && Name =3D=3D "log2l")) {
+ if (I.getNumArgOperands() =3D=3D 1 && // Basic sanity checks.
+ I.getArgOperand(0)->getType()->isFloatingPointTy() &&
+ I.getType() =3D=3D I.getArgOperand(0)->getType() &&
+ I.onlyReadsMemory()) {
+ SDValue Tmp =3D getValue(I.getArgOperand(0));
+ setValue(&I, DAG.getNode(ISD::FLOG2, getCurDebugLoc(),
+ Tmp.getValueType(), Tmp));
+ return;
+ }
+ } else if ((LibInfo->has(LibFunc::exp2) && Name =3D=3D "exp2") ||
+ (LibInfo->has(LibFunc::exp2f) && Name =3D=3D "exp2f") ||
+ (LibInfo->has(LibFunc::exp2l) && Name =3D=3D "exp2l")) {
+ if (I.getNumArgOperands() =3D=3D 1 && // Basic sanity checks.
+ I.getArgOperand(0)->getType()->isFloatingPointTy() &&
+ I.getType() =3D=3D I.getArgOperand(0)->getType() &&
+ I.onlyReadsMemory()) {
+ SDValue Tmp =3D getValue(I.getArgOperand(0));
+ setValue(&I, DAG.getNode(ISD::FEXP2, getCurDebugLoc(),
+ Tmp.getValueType(), Tmp));
+ return;
+ }
} else if (Name =3D=3D "memcmp") {
if (visitMemCmpCall(I))
return;
@@ -5596,22 +5690,6 @@
: TargetLowering::AsmOperandInfo(info), CallOperand(0,0) {
}
=20
- /// MarkAllocatedRegs - Once AssignedRegs is set, mark the assigned regi=
sters
- /// busy in OutputRegs/InputRegs.
- void MarkAllocatedRegs(bool isOutReg, bool isInReg,
- std::set<unsigned> &OutputRegs,
- std::set<unsigned> &InputRegs,
- const TargetRegisterInfo &TRI) const {
- if (isOutReg) {
- for (unsigned i =3D 0, e =3D AssignedRegs.Regs.size(); i !=3D e; ++i)
- MarkRegAndAliases(AssignedRegs.Regs[i], OutputRegs, TRI);
- }
- if (isInReg) {
- for (unsigned i =3D 0, e =3D AssignedRegs.Regs.size(); i !=3D e; ++i)
- MarkRegAndAliases(AssignedRegs.Regs[i], InputRegs, TRI);
- }
- }
-
/// getCallOperandValEVT - Return the EVT of the Value* that this operand
/// corresponds to. If there is no Value* for this operand, it returns
/// MVT::Other.
@@ -5659,18 +5737,6 @@
=20
return TLI.getValueType(OpTy, true);
}
-
-private:
- /// MarkRegAndAliases - Mark the specified register and all aliases in t=
he
- /// specified set.
- static void MarkRegAndAliases(unsigned Reg, std::set<unsigned> &Regs,
- const TargetRegisterInfo &TRI) {
- assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "Isn't a physreg=
");
- Regs.insert(Reg);
- if (const unsigned *Aliases =3D TRI.getAliasSet(Reg))
- for (; *Aliases; ++Aliases)
- Regs.insert(*Aliases);
- }
};
=20
typedef SmallVector<SDISelAsmOperandInfo,16> SDISelAsmOperandInfoVector;
@@ -5684,39 +5750,13 @@
/// allocation. This produces generally horrible, but correct, code.
///
/// OpInfo describes the operand.
-/// Input and OutputRegs are the set of already allocated physical regis=
ters.
///
static void GetRegistersForValue(SelectionDAG &DAG,
const TargetLowering &TLI,
DebugLoc DL,
- SDISelAsmOperandInfo &OpInfo,
- std::set<unsigned> &OutputRegs,
- std::set<unsigned> &InputRegs) {
+ SDISelAsmOperandInfo &OpInfo) {
LLVMContext &Context =3D *DAG.getContext();
=20
- // Compute whether this value requires an input register, an output regi=
ster,
- // or both.
- bool isOutReg =3D false;
- bool isInReg =3D false;
- switch (OpInfo.Type) {
- case InlineAsm::isOutput:
- isOutReg =3D true;
-
- // If there is an input constraint that matches this, we need to reser=
ve
- // the input register so no other inputs allocate to it.
- isInReg =3D OpInfo.hasMatchingInput();
- break;
- case InlineAsm::isInput:
- isInReg =3D true;
- isOutReg =3D false;
- break;
- case InlineAsm::isClobber:
- isOutReg =3D true;
- isInReg =3D true;
- break;
- }
-
-
MachineFunction &MF =3D DAG.getMachineFunction();
SmallVector<unsigned, 4> Regs;
=20
@@ -5790,8 +5830,6 @@
}
=20
OpInfo.AssignedRegs =3D RegsForValue(Regs, RegVT, ValueVT);
- const TargetRegisterInfo *TRI =3D DAG.getTarget().getRegisterInfo();
- OpInfo.MarkAllocatedRegs(isOutReg, isInReg, OutputRegs, InputRegs, *TR=
I);
return;
}
=20
@@ -5822,8 +5860,6 @@
/// ConstraintOperands - Information about all of the constraints.
SDISelAsmOperandInfoVector ConstraintOperands;
=20
- std::set<unsigned> OutputRegs, InputRegs;
-
TargetLowering::AsmOperandInfoVector
TargetConstraints =3D TLI.ParseConstraints(CS);
=20
@@ -5956,7 +5992,7 @@
// constant pool entry to get its address.
const Value *OpVal =3D OpInfo.CallOperandVal;
if (isa<ConstantFP>(OpVal) || isa<ConstantInt>(OpVal) ||
- isa<ConstantVector>(OpVal)) {
+ isa<ConstantVector>(OpVal) || isa<ConstantDataVector>(OpVal)) {
OpInfo.CallOperand =3D DAG.getConstantPool(cast<Constant>(OpVal),
TLI.getPointerTy());
} else {
@@ -5985,8 +6021,7 @@
// If this constraint is for a specific register, allocate it before
// anything else.
if (OpInfo.ConstraintType =3D=3D TargetLowering::C_Register)
- GetRegistersForValue(DAG, TLI, getCurDebugLoc(), OpInfo, OutputRegs,
- InputRegs);
+ GetRegistersForValue(DAG, TLI, getCurDebugLoc(), OpInfo);
}
=20
// Second pass - Loop over all of the operands, assigning virtual or phy=
sregs
@@ -5997,8 +6032,7 @@
// C_Register operands have already been allocated, Other/Memory don't=
need
// to be.
if (OpInfo.ConstraintType =3D=3D TargetLowering::C_RegisterClass)
- GetRegistersForValue(DAG, TLI, getCurDebugLoc(), OpInfo, OutputRegs,
- InputRegs);
+ GetRegistersForValue(DAG, TLI, getCurDebugLoc(), OpInfo);
}
=20
// AsmNodeOperands - The operands for the ISD::INLINEASM node.
@@ -6052,9 +6086,13 @@
=20
// Copy the output from the appropriate register. Find a register t=
hat
// we can use.
- if (OpInfo.AssignedRegs.Regs.empty())
- report_fatal_error("Couldn't allocate output reg for constraint '"=
+
- Twine(OpInfo.ConstraintCode) + "'!");
+ if (OpInfo.AssignedRegs.Regs.empty()) {
+ LLVMContext &Ctx =3D *DAG.getContext();
+ Ctx.emitError(CS.getInstruction(), =20
+ "couldn't allocate output register for constraint '"=
+
+ Twine(OpInfo.ConstraintCode) + "'");
+ break;
+ }
=20
// If this is an indirect operand, store through the pointer after t=
he
// asm.
@@ -6154,9 +6192,13 @@
std::vector<SDValue> Ops;
TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCo=
de,
Ops, DAG);
- if (Ops.empty())
- report_fatal_error("Invalid operand for inline asm constraint '"=
+
- Twine(OpInfo.ConstraintCode) + "'!");
+ if (Ops.empty()) {
+ LLVMContext &Ctx =3D *DAG.getContext();
+ Ctx.emitError(CS.getInstruction(),
+ "invalid operand for inline asm constraint '" +
+ Twine(OpInfo.ConstraintCode) + "'");
+ break;
+ }
=20
// Add information to the INLINEASM node to know about this input.
unsigned ResOpType =3D
@@ -6187,9 +6229,13 @@
"Don't know how to handle indirect register inputs yet!");
=20
// Copy the input into the appropriate registers.
- if (OpInfo.AssignedRegs.Regs.empty())
- report_fatal_error("Couldn't allocate input reg for constraint '" +
- Twine(OpInfo.ConstraintCode) + "'!");
+ if (OpInfo.AssignedRegs.Regs.empty()) {
+ LLVMContext &Ctx =3D *DAG.getContext();
+ Ctx.emitError(CS.getInstruction(),=20
+ "couldn't allocate input reg for constraint '" +
+ Twine(OpInfo.ConstraintCode) + "'");
+ break;
+ }
=20
OpInfo.AssignedRegs.getCopyToRegs(InOperandVal, DAG, getCurDebugLoc(=
),
Chain, &Flag);
@@ -6327,7 +6373,7 @@
bool RetSExt, bool RetZExt, bool isVarArg,
bool isInreg, unsigned NumFixedArgs,
CallingConv::ID CallConv, bool isTailCall,
- bool isReturnValueUsed,
+ bool doesNotRet, bool isReturnValueUsed,
SDValue Callee,
ArgListTy &Args, SelectionDAG &DAG,
DebugLoc dl) const {
@@ -6424,7 +6470,7 @@
}
=20
SmallVector<SDValue, 4> InVals;
- Chain =3D LowerCall(Chain, Callee, CallConv, isVarArg, isTailCall,
+ Chain =3D LowerCall(Chain, Callee, CallConv, isVarArg, doesNotRet, isTai=
lCall,
Outs, OutVals, Ins, dl, DAG, InVals);
=20
// Verify that the target's LowerCall behaved as expected.
@@ -6493,7 +6539,6 @@
=20
SDValue TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) cons=
t {
llvm_unreachable("LowerOperation not implemented for this target!");
- return SDValue();
}
=20
void
@@ -6515,10 +6560,10 @@
/// isOnlyUsedInEntryBlock - If the specified argument is only used in the
/// entry block, return true. This includes arguments used by switches, s=
ince
/// the switch may expand into multiple basic blocks.
-static bool isOnlyUsedInEntryBlock(const Argument *A) {
+static bool isOnlyUsedInEntryBlock(const Argument *A, bool FastISel) {
// With FastISel active, we may be splitting blocks, so force creation
// of virtual registers for all non-dead arguments.
- if (EnableFastISel)
+ if (FastISel)
return A->use_empty();
=20
const BasicBlock *Entry =3D A->getParent()->begin();
@@ -6708,7 +6753,7 @@
SDB->getCurDebugLoc());
=20
SDB->setValue(I, Res);
- if (!EnableFastISel && Res.getOpcode() =3D=3D ISD::BUILD_PAIR) {
+ if (!TM.Options.EnableFastISel && Res.getOpcode() =3D=3D ISD::BUILD_PA=
IR) {
if (LoadSDNode *LNode =3D=20
dyn_cast<LoadSDNode>(Res.getOperand(0).getNode()))
if (FrameIndexSDNode *FI =3D
@@ -6718,7 +6763,7 @@
=20
// If this argument is live outside of the entry block, insert a copy =
from
// wherever we got it to the vreg that other BB's will reference it as.
- if (!EnableFastISel && Res.getOpcode() =3D=3D ISD::CopyFromReg) {
+ if (!TM.Options.EnableFastISel && Res.getOpcode() =3D=3D ISD::CopyFrom=
Reg) {
// If we can, though, try to skip creating an unnecessary vreg.
// FIXME: This isn't very clean... it would be nice to make this more
// general. It's also subtly incompatible with the hacks FastISel
@@ -6729,7 +6774,7 @@
continue;
}
}
- if (!isOnlyUsedInEntryBlock(I)) {
+ if (!isOnlyUsedInEntryBlock(I, TM.Options.EnableFastISel)) {
FuncInfo->InitializeRegForValue(I);
SDB->CopyToExportRegsIfNeeded(I);
}
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/SelectionDAGBuilder.h
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Tue =
Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Tue =
Apr 17 11:51:51 2012 +0300
@@ -67,11 +67,11 @@
class StoreInst;
class SwitchInst;
class TargetData;
+class TargetLibraryInfo;
class TargetLowering;
class TruncInst;
class UIToFPInst;
class UnreachableInst;
-class UnwindInst;
class VAArgInst;
class ZExtInst;
=20
@@ -129,13 +129,13 @@
/// Case - A struct to record the Value for a switch case, and the
/// case's target basic block.
struct Case {
- Constant* Low;
- Constant* High;
+ const Constant *Low;
+ const Constant *High;
MachineBasicBlock* BB;
uint32_t ExtraWeight;
=20
Case() : Low(0), High(0), BB(0), ExtraWeight(0) { }
- Case(Constant* low, Constant* high, MachineBasicBlock* bb,
+ Case(const Constant *low, const Constant *high, MachineBasicBlock *bb,
uint32_t extraweight) : Low(low), High(high), BB(bb),
ExtraWeight(extraweight) { }
=20
@@ -294,6 +294,7 @@
SelectionDAG &DAG;
const TargetData *TD;
AliasAnalysis *AA;
+ const TargetLibraryInfo *LibInfo;
=20
/// SwitchCases - Vector of CaseBlock structures used to communicate
/// SwitchInst code generation information.
@@ -338,7 +339,8 @@
HasTailCall(false), Context(dag.getContext()) {
}
=20
- void init(GCFunctionInfo *gfi, AliasAnalysis &aa);
+ void init(GCFunctionInfo *gfi, AliasAnalysis &aa,
+ const TargetLibraryInfo *li);
=20
/// clear - Clear out the current SelectionDAG and the associated
/// state and prepare this SelectionDAGBuilder object to be used
@@ -451,7 +453,8 @@
MachineBasicBlock* Default,
MachineBasicBlock *SwitchBB);
=20
- uint32_t getEdgeWeight(MachineBasicBlock *Src, MachineBasicBlock *Dst);
+ uint32_t getEdgeWeight(const MachineBasicBlock *Src,
+ const MachineBasicBlock *Dst) const;
void addSuccessorWithWeight(MachineBasicBlock *Src, MachineBasicBlock *D=
st,
uint32_t Weight =3D 0);
public:
@@ -471,7 +474,6 @@
// These all get lowered before this pass.
void visitInvoke(const InvokeInst &I);
void visitResume(const ResumeInst &I);
- void visitUnwind(const UnwindInst &I);
=20
void visitBinary(const User &I, unsigned OpCode);
void visitShift(const User &I, unsigned Opcode);
@@ -554,8 +556,6 @@
void visitUserOp2(const Instruction &I) {
llvm_unreachable("UserOp2 should not exist at instruction selection ti=
me!");
}
- =20
- const char *implVisitAluOverflow(const CallInst &I, ISD::NodeType Op);
=20
void HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
=20
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/SelectionDAGISel.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue A=
pr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue A=
pr 17 11:51:51 2012 +0300
@@ -41,6 +41,7 @@
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetIntrinsicInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
+#include "llvm/Target/TargetLibraryInfo.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
@@ -61,6 +62,80 @@
STATISTIC(NumDAGBlocks, "Number of blocks selected using DAG");
STATISTIC(NumDAGIselRetries,"Number of times dag isel has to try another p=
ath");
=20
+#ifndef NDEBUG
+static cl::opt<bool>
+EnableFastISelVerbose2("fast-isel-verbose2", cl::Hidden,
+ cl::desc("Enable extra verbose messages in the \"fast\" "
+ "instruction selector"));
+ // Terminators
+STATISTIC(NumFastIselFailRet,"Fast isel fails on Ret");
+STATISTIC(NumFastIselFailBr,"Fast isel fails on Br");
+STATISTIC(NumFastIselFailSwitch,"Fast isel fails on Switch");
+STATISTIC(NumFastIselFailIndirectBr,"Fast isel fails on IndirectBr");
+STATISTIC(NumFastIselFailInvoke,"Fast isel fails on Invoke");
+STATISTIC(NumFastIselFailResume,"Fast isel fails on Resume");
+STATISTIC(NumFastIselFailUnreachable,"Fast isel fails on Unreachable");
+
+ // Standard binary operators...
+STATISTIC(NumFastIselFailAdd,"Fast isel fails on Add");
+STATISTIC(NumFastIselFailFAdd,"Fast isel fails on FAdd");
+STATISTIC(NumFastIselFailSub,"Fast isel fails on Sub");
+STATISTIC(NumFastIselFailFSub,"Fast isel fails on FSub");
+STATISTIC(NumFastIselFailMul,"Fast isel fails on Mul");
+STATISTIC(NumFastIselFailFMul,"Fast isel fails on FMul");
+STATISTIC(NumFastIselFailUDiv,"Fast isel fails on UDiv");
+STATISTIC(NumFastIselFailSDiv,"Fast isel fails on SDiv");
+STATISTIC(NumFastIselFailFDiv,"Fast isel fails on FDiv");
+STATISTIC(NumFastIselFailURem,"Fast isel fails on URem");
+STATISTIC(NumFastIselFailSRem,"Fast isel fails on SRem");
+STATISTIC(NumFastIselFailFRem,"Fast isel fails on FRem");
+
+ // Logical operators...
+STATISTIC(NumFastIselFailAnd,"Fast isel fails on And");
+STATISTIC(NumFastIselFailOr,"Fast isel fails on Or");
+STATISTIC(NumFastIselFailXor,"Fast isel fails on Xor");
+
+ // Memory instructions...
+STATISTIC(NumFastIselFailAlloca,"Fast isel fails on Alloca");
+STATISTIC(NumFastIselFailLoad,"Fast isel fails on Load");
+STATISTIC(NumFastIselFailStore,"Fast isel fails on Store");
+STATISTIC(NumFastIselFailAtomicCmpXchg,"Fast isel fails on AtomicCmpXchg");
+STATISTIC(NumFastIselFailAtomicRMW,"Fast isel fails on AtomicRWM");
+STATISTIC(NumFastIselFailFence,"Fast isel fails on Frence");
+STATISTIC(NumFastIselFailGetElementPtr,"Fast isel fails on GetElementPtr");
+
+ // Convert instructions...
+STATISTIC(NumFastIselFailTrunc,"Fast isel fails on Trunc");
+STATISTIC(NumFastIselFailZExt,"Fast isel fails on ZExt");
+STATISTIC(NumFastIselFailSExt,"Fast isel fails on SExt");
+STATISTIC(NumFastIselFailFPTrunc,"Fast isel fails on FPTrunc");
+STATISTIC(NumFastIselFailFPExt,"Fast isel fails on FPExt");
+STATISTIC(NumFastIselFailFPToUI,"Fast isel fails on FPToUI");
+STATISTIC(NumFastIselFailFPToSI,"Fast isel fails on FPToSI");
+STATISTIC(NumFastIselFailUIToFP,"Fast isel fails on UIToFP");
+STATISTIC(NumFastIselFailSIToFP,"Fast isel fails on SIToFP");
+STATISTIC(NumFastIselFailIntToPtr,"Fast isel fails on IntToPtr");
+STATISTIC(NumFastIselFailPtrToInt,"Fast isel fails on PtrToInt");
+STATISTIC(NumFastIselFailBitCast,"Fast isel fails on BitCast");
+
+ // Other instructions...
+STATISTIC(NumFastIselFailICmp,"Fast isel fails on ICmp");
+STATISTIC(NumFastIselFailFCmp,"Fast isel fails on FCmp");
+STATISTIC(NumFastIselFailPHI,"Fast isel fails on PHI");
+STATISTIC(NumFastIselFailSelect,"Fast isel fails on Select");
+STATISTIC(NumFastIselFailCall,"Fast isel fails on Call");
+STATISTIC(NumFastIselFailShl,"Fast isel fails on Shl");
+STATISTIC(NumFastIselFailLShr,"Fast isel fails on LShr");
+STATISTIC(NumFastIselFailAShr,"Fast isel fails on AShr");
+STATISTIC(NumFastIselFailVAArg,"Fast isel fails on VAArg");
+STATISTIC(NumFastIselFailExtractElement,"Fast isel fails on ExtractElement=
");
+STATISTIC(NumFastIselFailInsertElement,"Fast isel fails on InsertElement");
+STATISTIC(NumFastIselFailShuffleVector,"Fast isel fails on ShuffleVector");
+STATISTIC(NumFastIselFailExtractValue,"Fast isel fails on ExtractValue");
+STATISTIC(NumFastIselFailInsertValue,"Fast isel fails on InsertValue");
+STATISTIC(NumFastIselFailLandingPad,"Fast isel fails on LandingPad");
+#endif
+
static cl::opt<bool>
EnableFastISelVerbose("fast-isel-verbose", cl::Hidden,
cl::desc("Enable verbose messages in the \"fast\" "
@@ -142,14 +217,15 @@
CodeGenOpt::Level OptLevel) {
const TargetLowering &TLI =3D IS->getTargetLowering();
=20
- if (OptLevel =3D=3D CodeGenOpt::None)
+ if (OptLevel =3D=3D CodeGenOpt::None ||
+ TLI.getSchedulingPreference() =3D=3D Sched::Source)
return createSourceListDAGScheduler(IS, OptLevel);
- if (TLI.getSchedulingPreference() =3D=3D Sched::Latency)
- return createTDListDAGScheduler(IS, OptLevel);
if (TLI.getSchedulingPreference() =3D=3D Sched::RegPressure)
return createBURRListDAGScheduler(IS, OptLevel);
if (TLI.getSchedulingPreference() =3D=3D Sched::Hybrid)
return createHybridListDAGScheduler(IS, OptLevel);
+ if (TLI.getSchedulingPreference() =3D=3D Sched::VLIW)
+ return createVLIWDAGScheduler(IS, OptLevel);
assert(TLI.getSchedulingPreference() =3D=3D Sched::ILP &&
"Unknown sched type!");
return createILPListDAGScheduler(IS, OptLevel);
@@ -174,12 +250,11 @@
"TargetLowering::EmitInstrWithCustomInserter!";
#endif
llvm_unreachable(0);
- return 0;
}
=20
void TargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI,
SDNode *Node) const {
- assert(!MI->getDesc().hasPostISelHook() &&
+ assert(!MI->hasPostISelHook() &&
"If a target marks an instruction with 'hasPostISelHook', "
"it must implement TargetLowering::AdjustInstrPostInstrSelection!=
");
}
@@ -188,11 +263,13 @@
// SelectionDAGISel code
//=3D=3D=3D---------------------------------------------------------------=
-------=3D=3D=3D//
=20
+void SelectionDAGISel::ISelUpdater::anchor() { }
+
SelectionDAGISel::SelectionDAGISel(const TargetMachine &tm,
CodeGenOpt::Level OL) :
MachineFunctionPass(ID), TM(tm), TLI(*tm.getTargetLowering()),
FuncInfo(new FunctionLoweringInfo(TLI)),
- CurDAG(new SelectionDAG(tm)),
+ CurDAG(new SelectionDAG(tm, OL)),
SDB(new SelectionDAGBuilder(*CurDAG, *FuncInfo, OL)),
GFI(),
OptLevel(OL),
@@ -200,6 +277,7 @@
initializeGCModuleInfoPass(*PassRegistry::getPassRegistry());
initializeAliasAnalysisAnalysisGroup(*PassRegistry::getPassRegistry());
initializeBranchProbabilityInfoPass(*PassRegistry::getPassRegistry());
+ initializeTargetLibraryInfoPass(*PassRegistry::getPassRegistry());
}
=20
SelectionDAGISel::~SelectionDAGISel() {
@@ -213,6 +291,7 @@
AU.addPreserved<AliasAnalysis>();
AU.addRequired<GCModuleInfo>();
AU.addPreserved<GCModuleInfo>();
+ AU.addRequired<TargetLibraryInfo>();
if (UseMBPI && OptLevel !=3D CodeGenOpt::None)
AU.addRequired<BranchProbabilityInfo>();
MachineFunctionPass::getAnalysisUsage(AU);
@@ -258,9 +337,9 @@
=20
bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
// Do some sanity-checking on the command-line options.
- assert((!EnableFastISelVerbose || EnableFastISel) &&
+ assert((!EnableFastISelVerbose || TM.Options.EnableFastISel) &&
"-fast-isel-verbose requires -fast-isel");
- assert((!EnableFastISelAbort || EnableFastISel) &&
+ assert((!EnableFastISelAbort || TM.Options.EnableFastISel) &&
"-fast-isel-abort requires -fast-isel");
=20
const Function &Fn =3D *mf.getFunction();
@@ -270,6 +349,7 @@
MF =3D &mf;
RegInfo =3D &MF->getRegInfo();
AA =3D &getAnalysis<AliasAnalysis>();
+ LibInfo =3D &getAnalysis<TargetLibraryInfo>();
GFI =3D Fn.hasGC() ? &getAnalysis<GCModuleInfo>().getFunctionInfo(Fn) : =
0;
=20
DEBUG(dbgs() << "\n\n\n=3D=3D=3D " << Fn.getName() << "\n");
@@ -284,7 +364,7 @@
else
FuncInfo->BPI =3D 0;
=20
- SDB->init(GFI, *AA);
+ SDB->init(GFI, *AA, LibInfo);
=20
SelectAllBasicBlocks(Fn);
=20
@@ -348,7 +428,8 @@
TII.get(TargetOpcode::DBG_VALUE))
.addReg(CopyUseMI->getOperand(0).getReg(), RegState::Debug)
.addImm(Offset).addMetadata(Variable);
- EntryMBB->insertAfter(CopyUseMI, NewMI);
+ MachineBasicBlock::iterator Pos =3D CopyUseMI;
+ EntryMBB->insertAfter(Pos, NewMI);
}
}
}
@@ -374,7 +455,7 @@
}
=20
// Determine if there is a call to setjmp in the machine function.
- MF->setCallsSetJmp(Fn.callsFunctionThatReturnsTwice());
+ MF->setExposesReturnsTwice(Fn.callsFunctionThatReturnsTwice());
=20
// Replace forward-declared registers with the registers containing
// the desired value.
@@ -427,7 +508,6 @@
=20
Worklist.push_back(CurDAG->getRoot().getNode());
=20
- APInt Mask;
APInt KnownZero;
APInt KnownOne;
=20
@@ -458,8 +538,7 @@
continue;
=20
unsigned NumSignBits =3D CurDAG->ComputeNumSignBits(Src);
- Mask =3D APInt::getAllOnesValue(SrcVT.getSizeInBits());
- CurDAG->ComputeMaskedBits(Src, Mask, KnownZero, KnownOne);
+ CurDAG->ComputeMaskedBits(Src, KnownZero, KnownOne);
FuncInfo->AddLiveOutRegInfo(DestReg, NumSignBits, KnownZero, KnownOne);
} while (!Worklist.empty());
}
@@ -478,8 +557,8 @@
#endif
{
BlockNumber =3D FuncInfo->MBB->getNumber();
- BlockName =3D MF->getFunction()->getNameStr() + ":" +
- FuncInfo->MBB->getBasicBlock()->getNameStr();
+ BlockName =3D MF->getFunction()->getName().str() + ":" +
+ FuncInfo->MBB->getBasicBlock()->getName().str();
}
DEBUG(dbgs() << "Initial selection DAG: BB#" << BlockNumber
<< " '" << BlockName << "'\n"; CurDAG->dump());
@@ -489,7 +568,7 @@
// Run the DAG combiner in pre-legalize mode.
{
NamedRegionTimer T("DAG Combining 1", GroupName, TimePassesIsEnabled);
- CurDAG->Combine(Unrestricted, *AA, OptLevel);
+ CurDAG->Combine(BeforeLegalizeTypes, *AA, OptLevel);
}
=20
DEBUG(dbgs() << "Optimized lowered selection DAG: BB#" << BlockNumber
@@ -517,7 +596,7 @@
{
NamedRegionTimer T("DAG Combining after legalize types", GroupName,
TimePassesIsEnabled);
- CurDAG->Combine(NoIllegalTypes, *AA, OptLevel);
+ CurDAG->Combine(AfterLegalizeTypes, *AA, OptLevel);
}
=20
DEBUG(dbgs() << "Optimized type-legalized selection DAG: BB#" << Block=
Number
@@ -542,7 +621,7 @@
{
NamedRegionTimer T("DAG Combining after legalize vectors", GroupName,
TimePassesIsEnabled);
- CurDAG->Combine(NoIllegalOperations, *AA, OptLevel);
+ CurDAG->Combine(AfterLegalizeVectorOps, *AA, OptLevel);
}
=20
DEBUG(dbgs() << "Optimized vector-legalized selection DAG: BB#"
@@ -564,7 +643,7 @@
// Run the DAG combiner in post-legalize mode.
{
NamedRegionTimer T("DAG Combining 2", GroupName, TimePassesIsEnabled);
- CurDAG->Combine(NoIllegalOperations, *AA, OptLevel);
+ CurDAG->Combine(AfterLegalizeDAG, *AA, OptLevel);
}
=20
DEBUG(dbgs() << "Optimized legalized selection DAG: BB#" << BlockNumber
@@ -592,7 +671,7 @@
{
NamedRegionTimer T("Instruction Scheduling", GroupName,
TimePassesIsEnabled);
- Scheduler->Run(CurDAG, FuncInfo->MBB, FuncInfo->InsertPt);
+ Scheduler->Run(CurDAG, FuncInfo->MBB);
}
=20
if (ViewSUnitDAGs) Scheduler->viewGraph();
@@ -603,8 +682,9 @@
{
NamedRegionTimer T("Instruction Creation", GroupName, TimePassesIsEnab=
led);
=20
- LastMBB =3D FuncInfo->MBB =3D Scheduler->EmitSchedule();
- FuncInfo->InsertPt =3D Scheduler->InsertPos;
+ // FuncInfo->InsertPt is passed by reference and set to the end of the
+ // scheduled instructions.
+ LastMBB =3D FuncInfo->MBB =3D Scheduler->EmitSchedule(FuncInfo->Insert=
Pt);
}
=20
// If the block was split, make sure we update any references that are u=
sed to
@@ -693,43 +773,18 @@
=20
// Assign the call site to the landing pad's begin label.
MF->getMMI().setCallSiteLandingPad(Label, SDB->LPadToCallSiteMap[MBB]);
- =20
+
const MCInstrDesc &II =3D TM.getInstrInfo()->get(TargetOpcode::EH_LABEL);
BuildMI(*MBB, FuncInfo->InsertPt, SDB->getCurDebugLoc(), II)
.addSym(Label);
=20
// Mark exception register as live in.
- unsigned Reg =3D TLI.getExceptionAddressRegister();
+ unsigned Reg =3D TLI.getExceptionPointerRegister();
if (Reg) MBB->addLiveIn(Reg);
=20
// Mark exception selector register as live in.
Reg =3D TLI.getExceptionSelectorRegister();
if (Reg) MBB->addLiveIn(Reg);
-
- // FIXME: Hack around an exception handling flaw (PR1508): the personali=
ty
- // function and list of typeids logically belong to the invoke (or, if y=
ou
- // like, the basic block containing the invoke), and need to be associat=
ed
- // with it in the dwarf exception handling tables. Currently however the
- // information is provided by an intrinsic (eh.selector) that can be mov=
ed
- // to unexpected places by the optimizers: if the unwind edge is critica=
l,
- // then breaking it can result in the intrinsics being in the successor =
of
- // the landing pad, not the landing pad itself. This results
- // in exceptions not being caught because no typeids are associated with
- // the invoke. This may not be the only way things can go wrong, but it
- // is the only way we try to work around for the moment.
- const BasicBlock *LLVMBB =3D MBB->getBasicBlock();
- const BranchInst *Br =3D dyn_cast<BranchInst>(LLVMBB->getTerminator());
-
- if (Br && Br->isUnconditional()) { // Critical edge?
- BasicBlock::const_iterator I, E;
- for (I =3D LLVMBB->begin(), E =3D --LLVMBB->end(); I !=3D E; ++I)
- if (isa<EHSelectorInst>(I))
- break;
-
- if (I =3D=3D E)
- // No catch info found - try to extract some from the successor.
- CopyCatchInfo(Br->getSuccessor(0), LLVMBB, &MF->getMMI(), *FuncInfo);
- }
}
=20
/// TryToFoldFastISelLoad - We're checking to see if we can fold the speci=
fied
@@ -822,10 +877,90 @@
!FuncInfo->isExportedInst(I); // Exported instrs must be computed.
}
=20
+#ifndef NDEBUG
+// Collect per Instruction statistics for fast-isel misses. Only those
+// instructions that cause the bail are accounted for. It does not accoun=
t for
+// instructions higher in the block. Thus, summing the per instructions s=
tats
+// will not add up to what is reported by NumFastIselFailures.
+static void collectFailStats(const Instruction *I) {
+ switch (I->getOpcode()) {
+ default: assert (0 && "<Invalid operator> ");
+
+ // Terminators
+ case Instruction::Ret: NumFastIselFailRet++; return;
+ case Instruction::Br: NumFastIselFailBr++; return;
+ case Instruction::Switch: NumFastIselFailSwitch++; return;
+ case Instruction::IndirectBr: NumFastIselFailIndirectBr++; return;
+ case Instruction::Invoke: NumFastIselFailInvoke++; return;
+ case Instruction::Resume: NumFastIselFailResume++; return;
+ case Instruction::Unreachable: NumFastIselFailUnreachable++; return;
+
+ // Standard binary operators...
+ case Instruction::Add: NumFastIselFailAdd++; return;
+ case Instruction::FAdd: NumFastIselFailFAdd++; return;
+ case Instruction::Sub: NumFastIselFailSub++; return;
+ case Instruction::FSub: NumFastIselFailFSub++; return;
+ case Instruction::Mul: NumFastIselFailMul++; return;
+ case Instruction::FMul: NumFastIselFailFMul++; return;
+ case Instruction::UDiv: NumFastIselFailUDiv++; return;
+ case Instruction::SDiv: NumFastIselFailSDiv++; return;
+ case Instruction::FDiv: NumFastIselFailFDiv++; return;
+ case Instruction::URem: NumFastIselFailURem++; return;
+ case Instruction::SRem: NumFastIselFailSRem++; return;
+ case Instruction::FRem: NumFastIselFailFRem++; return;
+
+ // Logical operators...
+ case Instruction::And: NumFastIselFailAnd++; return;
+ case Instruction::Or: NumFastIselFailOr++; return;
+ case Instruction::Xor: NumFastIselFailXor++; return;
+
+ // Memory instructions...
+ case Instruction::Alloca: NumFastIselFailAlloca++; return;
+ case Instruction::Load: NumFastIselFailLoad++; return;
+ case Instruction::Store: NumFastIselFailStore++; return;
+ case Instruction::AtomicCmpXchg: NumFastIselFailAtomicCmpXchg++; return;
+ case Instruction::AtomicRMW: NumFastIselFailAtomicRMW++; return;
+ case Instruction::Fence: NumFastIselFailFence++; return;
+ case Instruction::GetElementPtr: NumFastIselFailGetElementPtr++; return;
+
+ // Convert instructions...
+ case Instruction::Trunc: NumFastIselFailTrunc++; return;
+ case Instruction::ZExt: NumFastIselFailZExt++; return;
+ case Instruction::SExt: NumFastIselFailSExt++; return;
+ case Instruction::FPTrunc: NumFastIselFailFPTrunc++; return;
+ case Instruction::FPExt: NumFastIselFailFPExt++; return;
+ case Instruction::FPToUI: NumFastIselFailFPToUI++; return;
+ case Instruction::FPToSI: NumFastIselFailFPToSI++; return;
+ case Instruction::UIToFP: NumFastIselFailUIToFP++; return;
+ case Instruction::SIToFP: NumFastIselFailSIToFP++; return;
+ case Instruction::IntToPtr: NumFastIselFailIntToPtr++; return;
+ case Instruction::PtrToInt: NumFastIselFailPtrToInt++; return;
+ case Instruction::BitCast: NumFastIselFailBitCast++; return;
+
+ // Other instructions...
+ case Instruction::ICmp: NumFastIselFailICmp++; return;
+ case Instruction::FCmp: NumFastIselFailFCmp++; return;
+ case Instruction::PHI: NumFastIselFailPHI++; return;
+ case Instruction::Select: NumFastIselFailSelect++; return;
+ case Instruction::Call: NumFastIselFailCall++; return;
+ case Instruction::Shl: NumFastIselFailShl++; return;
+ case Instruction::LShr: NumFastIselFailLShr++; return;
+ case Instruction::AShr: NumFastIselFailAShr++; return;
+ case Instruction::VAArg: NumFastIselFailVAArg++; return;
+ case Instruction::ExtractElement: NumFastIselFailExtractElement++; retur=
n;
+ case Instruction::InsertElement: NumFastIselFailInsertElement++; return;
+ case Instruction::ShuffleVector: NumFastIselFailShuffleVector++; return;
+ case Instruction::ExtractValue: NumFastIselFailExtractValue++; return;
+ case Instruction::InsertValue: NumFastIselFailInsertValue++; return;
+ case Instruction::LandingPad: NumFastIselFailLandingPad++; return;
+ }
+}
+#endif
+
void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
// Initialize the Fast-ISel state, if needed.
FastISel *FastIS =3D 0;
- if (EnableFastISel)
+ if (TM.Options.EnableFastISel)
FastIS =3D TLI.createFastISel(*FuncInfo);
=20
// Iterate over all basic blocks in the function.
@@ -894,13 +1029,16 @@
FastIS->setLastLocalValue(0);
}
=20
+ unsigned NumFastIselRemaining =3D std::distance(Begin, End);
// Do FastISel on as many instructions as possible.
for (; BI !=3D Begin; --BI) {
const Instruction *Inst =3D llvm::prior(BI);
=20
// If we no longer require this instruction, skip it.
- if (isFoldedOrDeadInstruction(Inst, FuncInfo))
+ if (isFoldedOrDeadInstruction(Inst, FuncInfo)) {
+ --NumFastIselRemaining;
continue;
+ }
=20
// Bottom-up: reset the insert pos at the top, after any local-val=
ue
// instructions.
@@ -908,6 +1046,7 @@
=20
// Try to select the instruction with FastISel.
if (FastIS->SelectInstruction(Inst)) {
+ --NumFastIselRemaining;
++NumFastIselSuccess;
// If fast isel succeeded, skip over all the folded instructions=
, and
// then see if there is a load right before the selected instruc=
tions.
@@ -920,15 +1059,23 @@
}
if (BeforeInst !=3D Inst && isa<LoadInst>(BeforeInst) &&
BeforeInst->hasOneUse() &&
- TryToFoldFastISelLoad(cast<LoadInst>(BeforeInst), Inst, Fast=
IS))
+ TryToFoldFastISelLoad(cast<LoadInst>(BeforeInst), Inst, Fast=
IS)) {
// If we succeeded, don't re-select the load.
BI =3D llvm::next(BasicBlock::const_iterator(BeforeInst));
+ --NumFastIselRemaining;
+ ++NumFastIselSuccess;
+ }
continue;
}
=20
+#ifndef NDEBUG
+ if (EnableFastISelVerbose2)
+ collectFailStats(Inst);
+#endif
+
// Then handle certain instructions as single-LLVM-Instruction blo=
cks.
if (isa<CallInst>(Inst)) {
- ++NumFastIselFailures;
+
if (EnableFastISelVerbose || EnableFastISelAbort) {
dbgs() << "FastISel missed call: ";
Inst->dump();
@@ -943,24 +1090,30 @@
bool HadTailCall =3D false;
SelectBasicBlock(Inst, BI, HadTailCall);
=20
+ // Recompute NumFastIselRemaining as Selection DAG instruction
+ // selection may have handled the call, input args, etc.
+ unsigned RemainingNow =3D std::distance(Begin, BI);
+ NumFastIselFailures +=3D NumFastIselRemaining - RemainingNow;
+
// If the call was emitted as a tail call, we're done with the b=
lock.
if (HadTailCall) {
--BI;
break;
}
=20
+ NumFastIselRemaining =3D RemainingNow;
continue;
}
=20
if (isa<TerminatorInst>(Inst) && !isa<BranchInst>(Inst)) {
// Don't abort, and use a different message for terminator misse=
s.
- ++NumFastIselFailures;
+ NumFastIselFailures +=3D NumFastIselRemaining;
if (EnableFastISelVerbose || EnableFastISelAbort) {
dbgs() << "FastISel missed terminator: ";
Inst->dump();
}
} else {
- ++NumFastIselFailures;
+ NumFastIselFailures +=3D NumFastIselRemaining;
if (EnableFastISelVerbose || EnableFastISelAbort) {
dbgs() << "FastISel miss: ";
Inst->dump();
@@ -1289,7 +1442,7 @@
APInt NeededMask =3D DesiredMask & ~ActualMask;
=20
APInt KnownZero, KnownOne;
- CurDAG->ComputeMaskedBits(LHS, NeededMask, KnownZero, KnownOne);
+ CurDAG->ComputeMaskedBits(LHS, KnownZero, KnownOne);
=20
// If all the missing bits in the or are already known to be set, match!
if ((NeededMask & KnownOne) =3D=3D NeededMask)
@@ -2025,6 +2178,7 @@
case ISD::EntryToken: // These nodes remain the same.
case ISD::BasicBlock:
case ISD::Register:
+ case ISD::RegisterMask:
//case ISD::VALUETYPE:
//case ISD::CONDCODE:
case ISD::HANDLENODE:
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/SelectionDAGPrinter.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp Tu=
e Apr 17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp Tu=
e Apr 17 11:51:51 2012 +0300
@@ -19,7 +19,6 @@
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
-#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/Analysis/DebugInfo.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetMachine.h"
@@ -28,7 +27,6 @@
#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/StringExtras.h"
-#include "llvm/Config/config.h"
using namespace llvm;
=20
namespace llvm {
@@ -148,7 +146,7 @@
void SelectionDAG::viewGraph(const std::string &Title) {
// This code is only for debugging!
#ifndef NDEBUG
- ViewGraph(this, "dag." + getMachineFunction().getFunction()->getNameStr(=
),
+ ViewGraph(this, "dag." + getMachineFunction().getFunction()->getName(),
false, Title);
#else
errs() << "SelectionDAG::viewGraph is only available in debug builds on "
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/Selectio=
nDAG/TargetLowering.cpp
--- a/head/contrib/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp Tue Apr=
17 11:36:47 2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp Tue Apr=
17 11:51:51 2012 +0300
@@ -36,31 +36,9 @@
/// - the promotion of vector elements. This feature is disabled by default
/// and only enabled using this flag.
static cl::opt<bool>
-AllowPromoteIntElem("promote-elements", cl::Hidden,
+AllowPromoteIntElem("promote-elements", cl::Hidden, cl::init(true),
cl::desc("Allow promotion of integer vector element types"));
=20
-namespace llvm {
-TLSModel::Model getTLSModel(const GlobalValue *GV, Reloc::Model reloc) {
- bool isLocal =3D GV->hasLocalLinkage();
- bool isDeclaration =3D GV->isDeclaration();
- // FIXME: what should we do for protected and internal visibility?
- // For variables, is internal different from hidden?
- bool isHidden =3D GV->hasHiddenVisibility();
-
- if (reloc =3D=3D Reloc::PIC_) {
- if (isLocal || isHidden)
- return TLSModel::LocalDynamic;
- else
- return TLSModel::GeneralDynamic;
- } else {
- if (!isDeclaration || isHidden)
- return TLSModel::LocalExec;
- else
- return TLSModel::InitialExec;
- }
-}
-}
-
/// InitLibcallNames - Set default libcall names.
///
static void InitLibcallNames(const char **Names) {
@@ -572,21 +550,42 @@
// ConstantFP nodes default to expand. Targets can either change this to
// Legal, in which case all fp constants are legal, or use isFPImmLegal()
// to optimize expansions for certain constants.
+ setOperationAction(ISD::ConstantFP, MVT::f16, Expand);
setOperationAction(ISD::ConstantFP, MVT::f32, Expand);
setOperationAction(ISD::ConstantFP, MVT::f64, Expand);
setOperationAction(ISD::ConstantFP, MVT::f80, Expand);
=20
// These library functions default to expand.
- setOperationAction(ISD::FLOG , MVT::f64, Expand);
- setOperationAction(ISD::FLOG2, MVT::f64, Expand);
- setOperationAction(ISD::FLOG10,MVT::f64, Expand);
- setOperationAction(ISD::FEXP , MVT::f64, Expand);
- setOperationAction(ISD::FEXP2, MVT::f64, Expand);
- setOperationAction(ISD::FLOG , MVT::f32, Expand);
- setOperationAction(ISD::FLOG2, MVT::f32, Expand);
- setOperationAction(ISD::FLOG10,MVT::f32, Expand);
- setOperationAction(ISD::FEXP , MVT::f32, Expand);
- setOperationAction(ISD::FEXP2, MVT::f32, Expand);
+ setOperationAction(ISD::FLOG , MVT::f16, Expand);
+ setOperationAction(ISD::FLOG2, MVT::f16, Expand);
+ setOperationAction(ISD::FLOG10, MVT::f16, Expand);
+ setOperationAction(ISD::FEXP , MVT::f16, Expand);
+ setOperationAction(ISD::FEXP2, MVT::f16, Expand);
+ setOperationAction(ISD::FFLOOR, MVT::f16, Expand);
+ setOperationAction(ISD::FNEARBYINT, MVT::f16, Expand);
+ setOperationAction(ISD::FCEIL, MVT::f16, Expand);
+ setOperationAction(ISD::FRINT, MVT::f16, Expand);
+ setOperationAction(ISD::FTRUNC, MVT::f16, Expand);
+ setOperationAction(ISD::FLOG , MVT::f32, Expand);
+ setOperationAction(ISD::FLOG2, MVT::f32, Expand);
+ setOperationAction(ISD::FLOG10, MVT::f32, Expand);
+ setOperationAction(ISD::FEXP , MVT::f32, Expand);
+ setOperationAction(ISD::FEXP2, MVT::f32, Expand);
+ setOperationAction(ISD::FFLOOR, MVT::f32, Expand);
+ setOperationAction(ISD::FNEARBYINT, MVT::f32, Expand);
+ setOperationAction(ISD::FCEIL, MVT::f32, Expand);
+ setOperationAction(ISD::FRINT, MVT::f32, Expand);
+ setOperationAction(ISD::FTRUNC, MVT::f32, Expand);
+ setOperationAction(ISD::FLOG , MVT::f64, Expand);
+ setOperationAction(ISD::FLOG2, MVT::f64, Expand);
+ setOperationAction(ISD::FLOG10, MVT::f64, Expand);
+ setOperationAction(ISD::FEXP , MVT::f64, Expand);
+ setOperationAction(ISD::FEXP2, MVT::f64, Expand);
+ setOperationAction(ISD::FFLOOR, MVT::f64, Expand);
+ setOperationAction(ISD::FNEARBYINT, MVT::f64, Expand);
+ setOperationAction(ISD::FCEIL, MVT::f64, Expand);
+ setOperationAction(ISD::FRINT, MVT::f64, Expand);
+ setOperationAction(ISD::FTRUNC, MVT::f64, Expand);
=20
// Default ISD::TRAP to expand (which turns it into abort).
setOperationAction(ISD::TRAP, MVT::Other, Expand);
@@ -610,7 +609,7 @@
ExceptionSelectorRegister =3D 0;
BooleanContents =3D UndefinedBooleanContent;
BooleanVectorContents =3D UndefinedBooleanContent;
- SchedPreferenceInfo =3D Sched::Latency;
+ SchedPreferenceInfo =3D Sched::ILP;
JumpBufSize =3D 0;
JumpBufAlignment =3D 0;
MinFunctionAlignment =3D 0;
@@ -1080,8 +1079,12 @@
SDValue TargetLowering::getPICJumpTableRelocBase(SDValue Table,
SelectionDAG &DAG) const {
// If our PIC model is GP relative, use the global offset table as the b=
ase.
- if (getJumpTableEncoding() =3D=3D MachineJumpTableInfo::EK_GPRel32BlockA=
ddress)
+ unsigned JTEncoding =3D getJumpTableEncoding();
+
+ if ((JTEncoding =3D=3D MachineJumpTableInfo::EK_GPRel64BlockAddress) ||
+ (JTEncoding =3D=3D MachineJumpTableInfo::EK_GPRel32BlockAddress))
return DAG.getGLOBAL_OFFSET_TABLE(getPointerTy());
+
return Table;
}
=20
@@ -1223,7 +1226,7 @@
if (Depth !=3D 0) {
// If not at the root, Just compute the KnownZero/KnownOne bits to
// simplify things downstream.
- TLO.DAG.ComputeMaskedBits(Op, DemandedMask, KnownZero, KnownOne, Dep=
th);
+ TLO.DAG.ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
return false;
}
// If this is the root being simplified, allow it to have multiple use=
s,
@@ -1242,8 +1245,8 @@
switch (Op.getOpcode()) {
case ISD::Constant:
// We know all of the bits for a constant!
- KnownOne =3D cast<ConstantSDNode>(Op)->getAPIntValue() & NewMask;
- KnownZero =3D ~KnownOne & NewMask;
+ KnownOne =3D cast<ConstantSDNode>(Op)->getAPIntValue();
+ KnownZero =3D ~KnownOne;
return false; // Don't fall through, will infinitely loop.
case ISD::AND:
// If the RHS is a constant, check to see if the LHS would be zero wit=
hout
@@ -1253,8 +1256,7 @@
if (ConstantSDNode *RHSC =3D dyn_cast<ConstantSDNode>(Op.getOperand(1)=
)) {
APInt LHSZero, LHSOne;
// Do not increment Depth here; that can cause an infinite loop.
- TLO.DAG.ComputeMaskedBits(Op.getOperand(0), NewMask,
- LHSZero, LHSOne, Depth);
+ TLO.DAG.ComputeMaskedBits(Op.getOperand(0), LHSZero, LHSOne, Depth);
// If the LHS already has zeros where RHSC does, this and is dead.
if ((LHSZero & NewMask) =3D=3D (~RHSC->getAPIntValue() & NewMask))
return TLO.CombineTo(Op, Op.getOperand(0));
@@ -1473,9 +1475,8 @@
if (InOp.getNode()->getOpcode() =3D=3D ISD::ANY_EXTEND) {
SDValue InnerOp =3D InOp.getNode()->getOperand(0);
EVT InnerVT =3D InnerOp.getValueType();
- if ((APInt::getHighBitsSet(BitWidth,
- BitWidth - InnerVT.getSizeInBits()) &
- DemandedMask) =3D=3D 0 &&
+ unsigned InnerBits =3D InnerVT.getSizeInBits();
+ if (ShAmt < InnerBits && NewMask.lshr(InnerBits) =3D=3D 0 &&
isTypeDesirableForOp(ISD::SHL, InnerVT)) {
EVT ShTy =3D getShiftAmountTy(InnerVT);
if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits()))
@@ -1545,7 +1546,7 @@
// always convert this into a logical shr, even if the shift amount is
// variable. The low bit of the shift cannot be an input sign bit unl=
ess
// the shift amount is >=3D the size of the datatype, which is undefin=
ed.
- if (DemandedMask =3D=3D 1)
+ if (NewMask =3D=3D 1)
return TLO.CombineTo(Op,
TLO.DAG.getNode(ISD::SRL, dl, Op.getValueType(),
Op.getOperand(0), Op.getOperand=
(1)));
@@ -1588,23 +1589,40 @@
}
break;
case ISD::SIGN_EXTEND_INREG: {
- EVT EVT =3D cast<VTSDNode>(Op.getOperand(1))->getVT();
+ EVT ExVT =3D cast<VTSDNode>(Op.getOperand(1))->getVT();
+
+ APInt MsbMask =3D APInt::getHighBitsSet(BitWidth, 1);
+ // If we only care about the highest bit, don't bother shifting right.
+ if (MsbMask =3D=3D DemandedMask) {
+ unsigned ShAmt =3D ExVT.getScalarType().getSizeInBits();
+ SDValue InOp =3D Op.getOperand(0);
+
+ // Compute the correct shift amount type, which must be getShiftAmou=
ntTy
+ // for scalar types after legalization.
+ EVT ShiftAmtTy =3D Op.getValueType();
+ if (TLO.LegalTypes() && !ShiftAmtTy.isVector())
+ ShiftAmtTy =3D getShiftAmountTy(ShiftAmtTy);
+
+ SDValue ShiftAmt =3D TLO.DAG.getConstant(BitWidth - ShAmt, ShiftAmtT=
y);
+ return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl,
+ Op.getValueType(), InOp, Shift=
Amt));
+ }
=20
// Sign extension. Compute the demanded bits in the result that are n=
ot
// present in the input.
APInt NewBits =3D
APInt::getHighBitsSet(BitWidth,
- BitWidth - EVT.getScalarType().getSizeInBits()=
);
+ BitWidth - ExVT.getScalarType().getSizeInBits(=
));
=20
// If none of the extended bits are demanded, eliminate the sextinreg.
if ((NewBits & NewMask) =3D=3D 0)
return TLO.CombineTo(Op, Op.getOperand(0));
=20
APInt InSignBit =3D
- APInt::getSignBit(EVT.getScalarType().getSizeInBits()).zext(BitWidth=
);
+ APInt::getSignBit(ExVT.getScalarType().getSizeInBits()).zext(BitWidt=
h);
APInt InputDemandedBits =3D
APInt::getLowBitsSet(BitWidth,
- EVT.getScalarType().getSizeInBits()) &
+ ExVT.getScalarType().getSizeInBits()) &
NewMask;
=20
// Since the sign extended bits are demanded, we know that the sign
@@ -1622,7 +1640,7 @@
// If the input sign bit is known zero, convert this into a zero exten=
sion.
if (KnownZero.intersects(InSignBit))
return TLO.CombineTo(Op,
- TLO.DAG.getZeroExtendInReg(Op.getOperand(0),dl,=
EVT));
+ TLO.DAG.getZeroExtendInReg(Op.getOperand(0),dl,E=
xVT));
=20
if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
KnownOne |=3D NewBits;
@@ -1688,11 +1706,11 @@
=20
// If the sign bit is known one, the top bits match.
if (KnownOne.intersects(InSignBit)) {
- KnownOne |=3D NewBits;
- KnownZero &=3D ~NewBits;
+ KnownOne |=3D NewBits;
+ assert((KnownZero & NewBits) =3D=3D 0);
} else { // Otherwise, top bits aren't known.
- KnownOne &=3D ~NewBits;
- KnownZero &=3D ~NewBits;
+ assert((KnownOne & NewBits) =3D=3D 0);
+ assert((KnownZero & NewBits) =3D=3D 0);
}
break;
}
@@ -1783,7 +1801,9 @@
case ISD::BITCAST:
// If this is an FP->Int bitcast and if the sign bit is the only
// thing demanded, turn this into a FGETSIGN.
- if (!Op.getOperand(0).getValueType().isVector() &&
+ if (!TLO.LegalOperations() &&
+ !Op.getValueType().isVector() &&
+ !Op.getOperand(0).getValueType().isVector() &&
NewMask =3D=3D APInt::getSignBit(Op.getValueType().getSizeInBits()=
) &&
Op.getOperand(0).getValueType().isFloatingPoint()) {
bool OpVTLegal =3D isOperationLegalOrCustom(ISD::FGETSIGN, Op.getVal=
ueType());
@@ -1824,7 +1844,7 @@
// FALL THROUGH
default:
// Just use ComputeMaskedBits to compute output bits.
- TLO.DAG.ComputeMaskedBits(Op, NewMask, KnownZero, KnownOne, Depth);
+ TLO.DAG.ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
break;
}
=20
@@ -1840,7 +1860,6 @@
/// in Mask are known to be either zero or one and return them in the
/// KnownZero/KnownOne bitsets.
void TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
- const APInt &Mask,
APInt &KnownZero,
APInt &KnownOne,
const SelectionDAG &DA=
G,
@@ -1851,7 +1870,7 @@
Op.getOpcode() =3D=3D ISD::INTRINSIC_VOID) &&
"Should use MaskedValueIsZero if you don't know whether Op"
" is a target node!");
- KnownZero =3D KnownOne =3D APInt(Mask.getBitWidth(), 0);
+ KnownZero =3D KnownOne =3D APInt(KnownOne.getBitWidth(), 0);
}
=20
/// ComputeNumSignBitsForTargetNode - This method can be implemented by
@@ -1895,9 +1914,8 @@
// Fall back to ComputeMaskedBits to catch other known cases.
EVT OpVT =3D Val.getValueType();
unsigned BitWidth =3D OpVT.getScalarType().getSizeInBits();
- APInt Mask =3D APInt::getAllOnesValue(BitWidth);
APInt KnownZero, KnownOne;
- DAG.ComputeMaskedBits(Val, Mask, KnownZero, KnownOne);
+ DAG.ComputeMaskedBits(Val, KnownZero, KnownOne);
return (KnownZero.countPopulation() =3D=3D BitWidth - 1) &&
(KnownOne.countPopulation() =3D=3D 1);
}
@@ -2060,7 +2078,7 @@
unsigned NewAlign =3D MinAlign(Lod->getAlignment(), bestOffset);
SDValue NewLoad =3D DAG.getLoad(newVT, dl, Lod->getChain(), Ptr,
Lod->getPointerInfo().getWithOffset(bestOf=
fset),
- false, false, NewAlign);
+ false, false, false, NewAlign);
return DAG.getSetCC(dl, VT,
DAG.getNode(ISD::AND, dl, newVT, NewLoad,
DAG.getConstant(bestMask.trunc(bestW=
idth),
@@ -2393,8 +2411,15 @@
=20
if (N0 =3D=3D N1) {
// We can always fold X =3D=3D X for integer setcc's.
- if (N0.getValueType().isInteger())
- return DAG.getConstant(ISD::isTrueWhenEqual(Cond), VT);
+ if (N0.getValueType().isInteger()) {
+ switch (getBooleanContents(N0.getValueType().isVector())) {
+ case UndefinedBooleanContent:=20
+ case ZeroOrOneBooleanContent:=20
+ return DAG.getConstant(ISD::isTrueWhenEqual(Cond), VT);
+ case ZeroOrNegativeOneBooleanContent:
+ return DAG.getConstant(ISD::isTrueWhenEqual(Cond) ? -1 : 0, VT);
+ }
+ }
unsigned UOF =3D ISD::getUnorderedFlavor(Cond);
if (UOF =3D=3D 2) // FP operators that are undefined on NaNs.
return DAG.getConstant(ISD::isTrueWhenEqual(Cond), VT);
@@ -2428,6 +2453,10 @@
}
}
=20
+ // If RHS is a legal immediate value for a compare instruction, we n=
eed
+ // to be careful about increasing register pressure needlessly.
+ bool LegalRHSImm =3D false;
+
if (ConstantSDNode *RHSC =3D dyn_cast<ConstantSDNode>(N1)) {
if (ConstantSDNode *LHSR =3D dyn_cast<ConstantSDNode>(N0.getOperan=
d(1))) {
// Turn (X+C1) =3D=3D C2 --> X =3D=3D C2-C1
@@ -2462,25 +2491,33 @@
Cond);
}
}
+
+ // Could RHSC fold directly into a compare?
+ if (RHSC->getValueType(0).getSizeInBits() <=3D 64)
+ LegalRHSImm =3D isLegalICmpImmediate(RHSC->getSExtValue());
}
=20
// Simplify (X+Z) =3D=3D X --> Z =3D=3D 0
- if (N0.getOperand(0) =3D=3D N1)
- return DAG.getSetCC(dl, VT, N0.getOperand(1),
- DAG.getConstant(0, N0.getValueType()), Cond);
- if (N0.getOperand(1) =3D=3D N1) {
- if (DAG.isCommutativeBinOp(N0.getOpcode()))
- return DAG.getSetCC(dl, VT, N0.getOperand(0),
- DAG.getConstant(0, N0.getValueType()), Cond);
- else if (N0.getNode()->hasOneUse()) {
- assert(N0.getOpcode() =3D=3D ISD::SUB && "Unexpected operation!"=
);
- // (Z-X) =3D=3D X --> Z =3D=3D X<<1
- SDValue SH =3D DAG.getNode(ISD::SHL, dl, N1.getValueType(),
- N1,
+ // Don't do this if X is an immediate that can fold into a cmp
+ // instruction and X+Z has other uses. It could be an induction vari=
able
+ // chain, and the transform would increase register pressure.
+ if (!LegalRHSImm || N0.getNode()->hasOneUse()) {
+ if (N0.getOperand(0) =3D=3D N1)
+ return DAG.getSetCC(dl, VT, N0.getOperand(1),
+ DAG.getConstant(0, N0.getValueType()), Cond);
+ if (N0.getOperand(1) =3D=3D N1) {
+ if (DAG.isCommutativeBinOp(N0.getOpcode()))
+ return DAG.getSetCC(dl, VT, N0.getOperand(0),
+ DAG.getConstant(0, N0.getValueType()), Con=
d);
+ else if (N0.getNode()->hasOneUse()) {
+ assert(N0.getOpcode() =3D=3D ISD::SUB && "Unexpected operation=
!");
+ // (Z-X) =3D=3D X --> Z =3D=3D X<<1
+ SDValue SH =3D DAG.getNode(ISD::SHL, dl, N1.getValueType(), N1,
DAG.getConstant(1, getShiftAmountTy(N1.getValueType=
())));
- if (!DCI.isCalledByLegalizer())
- DCI.AddToWorklist(SH.getNode());
- return DAG.getSetCC(dl, VT, N0.getOperand(0), SH, Cond);
+ if (!DCI.isCalledByLegalizer())
+ DCI.AddToWorklist(SH.getNode());
+ return DAG.getSetCC(dl, VT, N0.getOperand(0), SH, Cond);
+ }
}
}
}
@@ -2984,7 +3021,6 @@
/// is.
static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT)=
{
switch (CT) {
- default: llvm_unreachable("Unknown constraint type!");
case TargetLowering::C_Other:
case TargetLowering::C_Unknown:
return 0;
@@ -2995,6 +3031,7 @@
case TargetLowering::C_Memory:
return 3;
}
+ llvm_unreachable("Invalid constraint type");
}
=20
/// Examine constraint type and operand type and determine a weight value.
@@ -3242,8 +3279,9 @@
/// return a DAG expression to select that will generate the same value by
/// multiplying by a magic number. See:
/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
-SDValue TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG,
- std::vector<SDNode*>* Created) const {
+SDValue TargetLowering::
+BuildSDIV(SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization,
+ std::vector<SDNode*>* Created) const {
EVT VT =3D N->getValueType(0);
DebugLoc dl=3D N->getDebugLoc();
=20
@@ -3258,10 +3296,12 @@
// Multiply the numerator (operand 0) by the magic value
// FIXME: We should support doing a MUL in a wider type
SDValue Q;
- if (isOperationLegalOrCustom(ISD::MULHS, VT))
+ if (IsAfterLegalization ? isOperationLegal(ISD::MULHS, VT) :
+ isOperationLegalOrCustom(ISD::MULHS, VT))
Q =3D DAG.getNode(ISD::MULHS, dl, VT, N->getOperand(0),
DAG.getConstant(magics.m, VT));
- else if (isOperationLegalOrCustom(ISD::SMUL_LOHI, VT))
+ else if (IsAfterLegalization ? isOperationLegal(ISD::SMUL_LOHI, VT) :
+ isOperationLegalOrCustom(ISD::SMUL_LOHI, =
VT))
Q =3D SDValue(DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(VT, VT),
N->getOperand(0),
DAG.getConstant(magics.m, VT)).getNode(), 1);
@@ -3299,8 +3339,9 @@
/// return a DAG expression to select that will generate the same value by
/// multiplying by a magic number. See:
/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
-SDValue TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG,
- std::vector<SDNode*>* Created) const {
+SDValue TargetLowering::
+BuildUDIV(SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization,
+ std::vector<SDNode*>* Created) const {
EVT VT =3D N->getValueType(0);
DebugLoc dl =3D N->getDebugLoc();
=20
@@ -3332,9 +3373,11 @@
=20
// Multiply the numerator (operand 0) by the magic value
// FIXME: We should support doing a MUL in a wider type
- if (isOperationLegalOrCustom(ISD::MULHU, VT))
+ if (IsAfterLegalization ? isOperationLegal(ISD::MULHU, VT) :
+ isOperationLegalOrCustom(ISD::MULHU, VT))
Q =3D DAG.getNode(ISD::MULHU, dl, VT, Q, DAG.getConstant(magics.m, VT)=
);
- else if (isOperationLegalOrCustom(ISD::UMUL_LOHI, VT))
+ else if (IsAfterLegalization ? isOperationLegal(ISD::UMUL_LOHI, VT) :
+ isOperationLegalOrCustom(ISD::UMUL_LOHI, =
VT))
Q =3D SDValue(DAG.getNode(ISD::UMUL_LOHI, dl, DAG.getVTList(VT, VT), Q,
DAG.getConstant(magics.m, VT)).getNode(), 1);
else
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/ShadowSt=
ackGC.cpp
--- a/head/contrib/llvm/lib/CodeGen/ShadowStackGC.cpp Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/ShadowStackGC.cpp Tue Apr 17 11:51:51 2=
012 +0300
@@ -116,8 +116,7 @@
// Branches and invokes do not escape, only unwind, resume, and =
return
// do.
TerminatorInst *TI =3D CurBB->getTerminator();
- if (!isa<UnwindInst>(TI) && !isa<ReturnInst>(TI) &&
- !isa<ResumeInst>(TI))
+ if (!isa<ReturnInst>(TI) && !isa<ResumeInst>(TI))
continue;
=20
Builder.SetInsertPoint(TI->getParent(), TI);
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/ShrinkWr=
apping.cpp
--- a/head/contrib/llvm/lib/CodeGen/ShrinkWrapping.cpp Tue Apr 17 11:36:47 =
2012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/ShrinkWrapping.cpp Tue Apr 17 11:51:51 =
2012 +0300
@@ -93,6 +93,7 @@
}
AU.addPreserved<MachineLoopInfo>();
AU.addPreserved<MachineDominatorTree>();
+ AU.addRequired<TargetPassConfig>();
MachineFunctionPass::getAnalysisUsage(AU);
}
=20
@@ -124,7 +125,7 @@
}
=20
bool PEI::isReturnBlock(MachineBasicBlock* MBB) {
- return (MBB && !MBB->empty() && MBB->back().getDesc().isReturn());
+ return (MBB && !MBB->empty() && MBB->back().isReturn());
}
=20
// Initialize shrink wrapping DFA sets, called before iterations.
@@ -158,7 +159,7 @@
// via --shrink-wrap-func=3D<funcname>.
#ifndef NDEBUG
if (ShrinkWrapFunc !=3D "") {
- std::string MFName =3D MF->getFunction()->getNameStr();
+ std::string MFName =3D MF->getFunction()->getName().str();
ShrinkWrapThisFunction =3D (MFName =3D=3D ShrinkWrapFunc);
}
#endif
@@ -1045,7 +1046,7 @@
return "";
=20
if (MBB->getBasicBlock())
- return MBB->getBasicBlock()->getNameStr();
+ return MBB->getBasicBlock()->getName().str();
=20
std::ostringstream name;
name << "_MBB_" << MBB->getNumber();
diff -r 428842767fa6 -r f2935497fa04 head/contrib/llvm/lib/CodeGen/SjLjEHPr=
epare.cpp
--- a/head/contrib/llvm/lib/CodeGen/SjLjEHPrepare.cpp Tue Apr 17 11:36:47 2=
012 +0300
+++ b/head/contrib/llvm/lib/CodeGen/SjLjEHPrepare.cpp Tue Apr 17 11:51:51 2=
012 +0300
@@ -1,4 +1,4 @@
-//=3D=3D=3D- SjLjEHPass.cpp - Eliminate Invoke & Unwind instructions -----=
------=3D=3D=3D//
+//=3D=3D=3D- SjLjEHPrepare.cpp - Eliminate Invoke & Unwind instructions --=
-------=3D=3D=3D//
//
// The LLVM Compiler Infrastructure
//
@@ -29,21 +29,20 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/IRBuilder.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/SetVector.h"
+#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include <set>
using namespace llvm;
=20
-static cl::opt<bool> DisableOldSjLjEH("disable-old-sjlj-eh", cl::Hidden,
- cl::desc("Disable the old SjLj EH preparation pass"));
-
STATISTIC(NumInvokes, "Number of invokes replaced");
-STATISTIC(NumUnwinds, "Number of unwinds replaced");
STATISTIC(NumSpilled, "Number of registers live across unwind edges");
=20
namespace {
- class SjLjEHPass : public FunctionPass {
+ class SjLjEHPrepare : public FunctionPass {
const TargetLowering *TLI;
Type *FunctionContextTy;
Constant *RegisterFn;
@@ -54,16 +53,12 @@
Constant *StackRestoreFn;
Constant *LSDAAddrFn;
Value *PersonalityFn;
- Constant *SelectorFn;
- Constant *ExceptionFn;
Constant *CallSiteFn;
- Constant *DispatchSetupFn;
Constant *FuncCtxFn;
- Value *CallSite;
- DenseMap<InvokeInst*, BasicBlock*> LPadSuccMap;
+ AllocaInst *FuncCtx;
public:
static char ID; // Pass identification, replacement for typeid
- explicit SjLjEHPass(const TargetLowering *tli =3D NULL)
+ explicit SjLjEHPrepare(const TargetLowering *tli =3D NULL)
: FunctionPass(ID), TLI(tli) { }
bool doInitialization(Module &M);
bool runOnFunction(Function &F);
@@ -75,28 +70,24 @@
=20
private:
bool setupEntryBlockAndCallSites(Function &F);
+ void substituteLPadValues(LandingPadInst *LPI, Value *ExnVal,
+ Value *SelVal);
Value *setupFunctionContext(Function &F, ArrayRef<LandingPadInst*> LPa=
ds);
void lowerIncomingArguments(Function &F);
void lowerAcrossUnwindEdges(Function &F, ArrayRef<InvokeInst*> Invokes=
);
-
- void insertCallSiteStore(Instruction *I, int Number, Value *CallSite);
- void markInvokeCallSite(InvokeInst *II, int InvokeNo, Value *CallSite,
- SwitchInst *CatchSwitch);
- void splitLiveRangesAcrossInvokes(SmallVector<InvokeInst*,16> &Invokes=
);
- void splitLandingPad(InvokeInst *II);
- bool insertSjLjEHSupport(Function &F);
+ void insertCallSiteStore(Instruction *I, int Number);
};
} // end anonymous namespace
=20
-char SjLjEHPass::ID =3D 0;
+char SjLjEHPrepare::ID =3D 0;
=20
-// Public Interface To the SjLjEHPass pass.
-FunctionPass *llvm::createSjLjEHPass(const TargetLowering *TLI) {
- return new SjLjEHPass(TLI);
+// Public Interface To the SjLjEHPrepare pass.
+FunctionPass *llvm::createSjLjEHPreparePass(const TargetLowering *TLI) {
+ return new SjLjEHPrepare(TLI);
}
// doInitialization - Set up decalarations and types needed to process
// exceptions.
-bool SjLjEHPass::doInitialization(Module &M) {
+bool SjLjEHPrepare::doInitialization(Module &M) {
// Build the function context structure.
// builtin_setjmp uses a five word jbuf
Type *VoidPtrTy =3D Type::getInt8PtrTy(M.getContext());
@@ -123,11 +114,7 @@
StackRestoreFn =3D Intrinsic::getDeclaration(&M, Intrinsic::stackrestore=
);
BuiltinSetjmpFn =3D Intrinsic::getDeclaration(&M, Intrinsic::eh_sjlj_set=
jmp);
LSDAAddrFn =3D Intrinsic::getDeclaration(&M, Intrinsic::eh_sjlj_lsda);
- SelectorFn =3D Intrinsic::getDeclaration(&M, Intrinsic::eh_selector);
- ExceptionFn =3D Intrinsic::getDeclaration(&M, Intrinsic::eh_exception);
CallSiteFn =3D Intrinsic::getDeclaration(&M, Intrinsic::eh_sjlj_callsite=
);
- DispatchSetupFn
- =3D Intrinsic::getDeclaration(&M, Intrinsic::eh_sjlj_dispatch_setup);
FuncCtxFn =3D Intrinsic::getDeclaration(&M, Intrinsic::eh_sjlj_functionc=
ontext);
PersonalityFn =3D 0;
=20
@@ -136,583 +123,67 @@
=20
/// insertCallSiteStore - Insert a store of the call-site value to the
/// function context
-void SjLjEHPass::insertCallSiteStore(Instruction *I, int Number,
- Value *CallSite) {
+void SjLjEHPrepare::insertCallSiteStore(Instruction *I, int Number) {
+ IRBuilder<> Builder(I);
+
+ // Get a reference to the call_site field.
+ Type *Int32Ty =3D Type::getInt32Ty(I->getContext());
+ Value *Zero =3D ConstantInt::get(Int32Ty, 0);
+ Value *One =3D ConstantInt::get(Int32Ty, 1);
+ Value *Idxs[2] =3D { Zero, One };
+ Value *CallSite =3D Builder.CreateGEP(FuncCtx, Idxs, "call_site");
+
+ // Insert a store of the call-site number
ConstantInt *CallSiteNoC =3D ConstantInt::get(Type::getInt32Ty(I->getCon=
text()),
Number);
- // Insert a store of the call-site number
- new StoreInst(CallSiteNoC, CallSite, true, I); // volatile
-}
-
-/// splitLandingPad - Split a landing pad. This takes considerable care be=
cause
-/// of PHIs and other nasties. The problem is that the jump table needs to=
jump
-/// to the landing pad block. However, the landing pad block can be jumped=
to
-/// only by an invoke instruction. So we clone the landingpad instruction =
into
-/// its own basic block, have the invoke jump to there. The landingpad
-/// instruction's basic block's successor is now the target for the jump t=
able.
-///
-/// But because of PHI nodes, we need to create another basic block for th=
e jump
-/// table to jump to. This is definitely a hack, because the values for th=
e PHI
-/// nodes may not be defined on the edge from the jump table. But that's o=
kay,
-/// because the jump table is simply a construct to mimic what is happenin=
g in
-/// the CFG. So the values are mysteriously there, even though there is no=
value
-/// for the PHI from the jump table's edge (hence calling this a hack).
-void SjLjEHPass::splitLandingPad(InvokeInst *II) {
- SmallVector<BasicBlock*, 2> NewBBs;
- SplitLandingPadPredecessors(II->getUnwindDest(), II->getParent(),
- ".1", ".2", this, NewBBs);
-
- // Create an empty block so that the jump table has something to jump to
- // which doesn't have any PHI nodes.
- BasicBlock *LPad =3D NewBBs[0];
- BasicBlock *Succ =3D *succ_begin(LPad);
- BasicBlock *JumpTo =3D BasicBlock::Create(II->getContext(), "jt.land",
- LPad->getParent(), Succ);
- LPad->getTerminator()->eraseFromParent();
- BranchInst::Create(JumpTo, LPad);
- BranchInst::Create(Succ, JumpTo);
- LPadSuccMap[II] =3D JumpTo;
-
- for (BasicBlock::iterator I =3D Succ->begin(); isa<PHINode>(I); ++I) {
- PHINode *PN =3D cast<PHINode>(I);
- Value *Val =3D PN->removeIncomingValue(LPad, false);
- PN->addIncoming(Val, JumpTo);
- }
-}
-
-/// markInvokeCallSite - Insert code to mark the call_site for this invoke
-void SjLjEHPass::markInvokeCallSite(InvokeInst *II, int InvokeNo,
- Value *CallSite,
- SwitchInst *CatchSwitch) {
- ConstantInt *CallSiteNoC=3D ConstantInt::get(Type::getInt32Ty(II->getCon=
text()),
- InvokeNo);
- // The runtime comes back to the dispatcher with the call_site - 1 in
- // the context. Odd, but there it is.
- ConstantInt *SwitchValC =3D ConstantInt::get(Type::getInt32Ty(II->getCon=
text()),
- InvokeNo - 1);
-
- // If the unwind edge has phi nodes, split the edge.
- if (isa<PHINode>(II->getUnwindDest()->begin())) {
- // FIXME: New EH - This if-condition will be always true in the new sc=
heme.
- if (II->getUnwindDest()->isLandingPad())
- splitLandingPad(II);
- else
- SplitCriticalEdge(II, 1, this);
-
- // If there are any phi nodes left, they must have a single predecesso=
r.
- while (PHINode *PN =3D dyn_cast<PHINode>(II->getUnwindDest()->begin())=
) {
- PN->replaceAllUsesWith(PN->getIncomingValue(0));
- PN->eraseFromParent();
- }
- }
-
- // Insert the store of the call site value
- insertCallSiteStore(II, InvokeNo, CallSite);
-
- // Record the call site value for the back end so it stays associated wi=
th
- // the invoke.
- CallInst::Create(CallSiteFn, CallSiteNoC, "", II);
-
- // Add a switch case to our unwind block.
- if (BasicBlock *SuccBB =3D LPadSuccMap[II]) {
- CatchSwitch->addCase(SwitchValC, SuccBB);
- } else {
- CatchSwitch->addCase(SwitchValC, II->getUnwindDest());
- }
-
- // We still want this to look like an invoke so we emit the LSDA properl=
y,
- // so we don't transform the invoke into a call here.
+ Builder.CreateStore(CallSiteNoC, CallSite, true/*volatile*/);
}
=20
/// MarkBlocksLiveIn - Insert BB and all of its predescessors into LiveBBs=
until
/// we reach blocks we've already seen.
-static void MarkBlocksLiveIn(BasicBlock *BB, std::set<BasicBlock*> &LiveBB=
s) {
- if (!LiveBBs.insert(BB).second) return; // already been here.
+static void MarkBlocksLiveIn(BasicBlock *BB,
+ SmallPtrSet<BasicBlock*, 64> &LiveBBs) {
+ if (!LiveBBs.insert(BB)) return; // already been here.
=20
for (pred_iterator PI =3D pred_begin(BB), E =3D pred_end(BB); PI !=3D E;=
++PI)
MarkBlocksLiveIn(*PI, LiveBBs);
}
=20
-/// splitLiveRangesAcrossInvokes - Each value that is live across an unwin=
d edge
-/// we spill into a stack location, guaranteeing that there is nothing live
-/// across the unwind edge. This process also splits all critical edges
-/// coming out of invoke's.
-/// FIXME: Move this function to a common utility file (Local.cpp?) so
-/// both SjLj and LowerInvoke can use it.
-void SjLjEHPass::
-splitLiveRangesAcrossInvokes(SmallVector<InvokeInst*,16> &Invokes) {
- // First step, split all critical edges from invoke instructions.
- for (unsigned i =3D 0, e =3D Invokes.size(); i !=3D e; ++i) {
- InvokeInst *II =3D Invokes[i];
- SplitCriticalEdge(II, 0, this);
-
- // FIXME: New EH - This if-condition will be always true in the new sc=
heme.
- if (II->getUnwindDest()->isLandingPad())
- splitLandingPad(II);
- else
- SplitCriticalEdge(II, 1, this);
-
- assert(!isa<PHINode>(II->getNormalDest()) &&
- !isa<PHINode>(II->getUnwindDest()) &&
- "Critical edge splitting left single entry phi nodes?");
+/// substituteLPadValues - Substitute the values returned by the landingpad
+/// instruction with those returned by the personality function.
+void SjLjEHPrepare::substituteLPadValues(LandingPadInst *LPI, Value *ExnVa=
l,
+ Value *SelVal) {
+ SmallVector<Value*, 8> UseWorkList(LPI->use_begin(), LPI->use_end());
+ while (!UseWorkList.empty()) {
+ Value *Val =3D UseWorkList.pop_back_val();
+ ExtractValueInst *EVI =3D dyn_cast<ExtractValueInst>(Val);
+ if (!EVI) continue;
+ if (EVI->getNumIndices() !=3D 1) continue;
+ if (*EVI->idx_begin() =3D=3D 0)
+ EVI->replaceAllUsesWith(ExnVal);
+ else if (*EVI->idx_begin() =3D=3D 1)
+ EVI->replaceAllUsesWith(SelVal);
+ if (EVI->getNumUses() =3D=3D 0)
+ EVI->eraseFromParent();
}
=20
- Function *F =3D Invokes.back()->getParent()->getParent();
+ if (LPI->getNumUses() =3D=3D 0) return;
=20
- // To avoid having to handle incoming arguments specially, we lower each=
arg
- // to a copy instruction in the entry block. This ensures that the argu=
ment
- // value itself cannot be live across the entry block.
- BasicBlock::iterator AfterAllocaInsertPt =3D F->begin()->begin();
- while (isa<AllocaInst>(AfterAllocaInsertPt) &&
- isa<ConstantInt>(cast<AllocaInst>(AfterAllocaInsertPt)->getArraySi=
ze()))
- ++AfterAllocaInsertPt;
- for (Function::arg_iterator AI =3D F->arg_begin(), E =3D F->arg_end();
- AI !=3D E; ++AI) {
- Type *Ty =3D AI->getType();
- // Aggregate types can't be cast, but are legal argument types, so we =
have
- // to handle them differently. We use an extract/insert pair as a
- // lightweight method to achieve the same goal.
- if (isa<StructType>(Ty) || isa<ArrayType>(Ty) || isa<VectorType>(Ty)) {
- Instruction *EI =3D ExtractValueInst::Create(AI, 0, "",AfterAllocaIn=
sertPt);
- Instruction *NI =3D InsertValueInst::Create(AI, EI, 0);
- NI->insertAfter(EI);
- AI->replaceAllUsesWith(NI);
- // Set the operand of the instructions back to the AllocaInst.
- EI->setOperand(0, AI);
- NI->setOperand(0, AI);
- } else {
- // This is always a no-op cast because we're casting AI to AI->getTy=
pe()
- // so src and destination types are identical. BitCast is the only
- // possibility.
- CastInst *NC =3D new BitCastInst(
- AI, AI->getType(), AI->getName()+".tmp", AfterAllocaInsertPt);
- AI->replaceAllUsesWith(NC);
- // Set the operand of the cast instruction back to the AllocaInst.
- // Normally it's forbidden to replace a CastInst's operand because it
- // could cause the opcode to reflect an illegal conversion. However,
- // we're replacing it here with the same value it was constructed wi=
th.
- // We do this because the above replaceAllUsesWith() clobbered the
- // operand, but we want this one to remain.
- NC->setOperand(0, AI);
- }
- }
+ // There are still some uses of LPI. Construct an aggregate with the exc=
eption
+ // values and replace the LPI with that aggregate.
+ Type *LPadType =3D LPI->getType();
+ Value *LPadVal =3D UndefValue::get(LPadType);
+ IRBuilder<>
+ Builder(llvm::next(BasicBlock::iterator(cast<Instruction>(SelVal))));
+ LPadVal =3D Builder.CreateInsertValue(LPadVal, ExnVal, 0, "lpad.val");
+ LPadVal =3D Builder.CreateInsertValue(LPadVal, SelVal, 1, "lpad.val");
=20
- // Finally, scan the code looking for instructions with bad live ranges.
- for (Function::iterator BB =3D F->begin(), E =3D F->end(); BB !=3D E; ++=
BB)
- for (BasicBlock::iterator II =3D BB->begin(), E =3D BB->end(); II !=3D=
E; ++II) {
- // Ignore obvious cases we don't have to handle. In particular, most
- // instructions either have no uses or only have a single use inside=
the
- // current block. Ignore them quickly.
- Instruction *Inst =3D II;
- if (Inst->use_empty()) continue;
- if (Inst->hasOneUse() &&
- cast<Instruction>(Inst->use_back())->getParent() =3D=3D BB &&
- !isa<PHINode>(Inst->use_back())) continue;
-
- // If this is an alloca in the entry block, it's not a real register
- // value.
- if (AllocaInst *AI =3D dyn_cast<AllocaInst>(Inst))
- if (isa<ConstantInt>(AI->getArraySize()) && BB =3D=3D F->begin())
- continue;
-
- // Avoid iterator invalidation by copying users to a temporary vecto=
r.
- SmallVector<Instruction*,16> Users;
- for (Value::use_iterator UI =3D Inst->use_begin(), E =3D Inst->use_e=
nd();
- UI !=3D E; ++UI) {
- Instruction *User =3D cast<Instruction>(*UI);
- if (User->getParent() !=3D BB || isa<PHINode>(User))
- Users.push_back(User);
- }
-
- // Find all of the blocks that this value is live in.
- std::set<BasicBlock*> LiveBBs;
- LiveBBs.insert(Inst->getParent());
- while (!Users.empty()) {
- Instruction *U =3D Users.back();
- Users.pop_back();
-
- if (!isa<PHINode>(U)) {
- MarkBlocksLiveIn(U->getParent(), LiveBBs);
- } else {
- // Uses for a PHI node occur in their predecessor block.
- PHINode *PN =3D cast<PHINode>(U);
- for (unsigned i =3D 0, e =3D PN->getNumIncomingValues(); i !=3D =
e; ++i)
- if (PN->getIncomingValue(i) =3D=3D Inst)
- MarkBlocksLiveIn(PN->getIncomingBlock(i), LiveBBs);
- }
- }
-
- // Now that we know all of the blocks that this thing is live in, se=
e if
- // it includes any of the unwind locations.
- bool NeedsSpill =3D false;
- for (unsigned i =3D 0, e =3D Invokes.size(); i !=3D e; ++i) {
- BasicBlock *UnwindBlock =3D Invokes[i]->getUnwindDest();
- if (UnwindBlock !=3D BB && LiveBBs.count(UnwindBlock))
- NeedsSpill =3D true;
- }
-
- // If we decided we need a spill, do it.
- // FIXME: Spilling this way is overkill, as it forces all uses of
- // the value to be reloaded from the stack slot, even those that are=
n't
- // in the unwind blocks. We should be more selective.
- if (NeedsSpill) {
- ++NumSpilled;
- DemoteRegToStack(*Inst, true);
- }
- }
-}
-
-/// CreateLandingPadLoad - Load the exception handling values and insert t=
hem
-/// into a structure.
-static Instruction *CreateLandingPadLoad(Function &F, Value *ExnAddr,
- Value *SelAddr,
- BasicBlock::iterator InsertPt) {
- Value *Exn =3D new LoadInst(ExnAddr, "exn",