[Zrouter-src-freebsd] [rt2860-in-ral] 2 new revisions pushed by bschm... at techwires.net on 2012-03-13 21:01 GMT
rt2860-in-ral at googlecode.com
rt2860-in-ral at googlecode.com
Tue Mar 13 21:02:27 UTC 2012
2 new revisions:
Revision: 6500fa1945cc
Author: Bernhard Schmidt <bschmidt at techwires.net>
Date: Tue Mar 13 13:43:32 2012
Log: use firmware(9) to obtain microcode, while here rewrite...
http://code.google.com/p/rt2860-in-ral/source/detail?r=6500fa1945cc
Revision: 446cd4654cb3
Author: Bernhard Schmidt <bschmidt at techwires.net>
Date: Tue Mar 13 14:01:39 2012
Log: prefer macros over functions
http://code.google.com/p/rt2860-in-ral/source/detail?r=446cd4654cb3
==============================================================================
Revision: 6500fa1945cc
Author: Bernhard Schmidt <bschmidt at techwires.net>
Date: Tue Mar 13 13:43:32 2012
Log: use firmware(9) to obtain microcode, while here rewrite
rt2860_io_mcu_load_ucode().
http://code.google.com/p/rt2860-in-ral/source/detail?r=6500fa1945cc
Deleted:
/sys/dev/ral/rt2860ucode.h
Modified:
/sys/dev/ral/if_ral_nexus.c
/sys/dev/ral/rt2860.c
/sys/dev/ral/rt2860reg.h
=======================================
--- /sys/dev/ral/rt2860ucode.h Tue Mar 13 11:11:15 2012
+++ /dev/null
@@ -1,2104 +0,0 @@
-
-/*
- Copyright (c) 2007, Ralink Technology Corporation
- All rights reserved.
-
- Redistribution. Redistribution and use in binary form, without
- modification, are permitted provided that the following conditions are
- met:
-
- * Redistributions must reproduce the above copyright notice and the
- following disclaimer in the documentation and/or other materials
- provided with the distribution.
- * Neither the name of Ralink Technology Corporation nor the names of its
- suppliers may be used to endorse or promote products derived from this
- software without specific prior written permission.
- * No reverse engineering, decompilation, or disassembly of this software
- is permitted.
-
- Limited patent license. Ralink Technology Corporation grants a world-wide,
- royalty-free, non-exclusive license under patents it now or hereafter
- owns or controls to make, have made, use, import, offer to sell and
- sell ("Utilize") this software, but solely to the extent that any
- such patent is necessary to Utilize the software alone, or in
- combination with an operating system licensed under an approved Open
- Source license as listed by the Open Source Initiative at
- http://opensource.org/licenses. The patent license shall not apply to
- any other combinations which include this software. No hardware per
- se is licensed hereunder.
-
- DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
- CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING,
- BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
- FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
- DAMAGE.
-*/
-
-#ifndef _RT2860_UCODE_H_
-#define _RT2860_UCODE_H_
-
-/*
- * RT2860 microcode v26
- */
-static const uint8_t rt2860_ucode[] =
-{
- 0x02, 0x03, 0x5E, 0x02,
- 0x02, 0xB1, 0x22, 0x22,
- 0xFF, 0xFF, 0xFF, 0x02,
- 0x01, 0x82, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0x02,
- 0x00, 0x1E, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0x02,
- 0x01, 0x33, 0xC0, 0xE0,
- 0xC0, 0xF0, 0xC0, 0x83,
- 0xC0, 0x82, 0xC0, 0xD0,
- 0x75, 0xD0, 0x18, 0xC2,
- 0xAF, 0x30, 0x45, 0x03,
- 0x12, 0x10, 0x09, 0x90,
- 0x04, 0x16, 0xE0, 0x30,
- 0xE3, 0x03, 0x74, 0x08,
- 0xF0, 0x90, 0x04, 0x14,
- 0xE0, 0x20, 0xE7, 0x03,
- 0x02, 0x00, 0xCB, 0x74,
- 0x80, 0xF0, 0x90, 0x70,
- 0x12, 0xE0, 0xF5, 0x2F,
- 0x90, 0x04, 0x04, 0xE0,
- 0x24, 0xCF, 0x60, 0x30,
- 0x14, 0x60, 0x42, 0x24,
- 0xE2, 0x60, 0x47, 0x14,
- 0x60, 0x55, 0x24, 0x21,
- 0x70, 0x60, 0xE5, 0x55,
- 0x24, 0xFE, 0x60, 0x07,
- 0x14, 0x60, 0x08, 0x24,
- 0x02, 0x70, 0x08, 0x7D,
- 0x01, 0x80, 0x28, 0x7D,
- 0x02, 0x80, 0x24, 0x90,
- 0x70, 0x10, 0xE0, 0xF5,
- 0x50, 0x85, 0x2F, 0x40,
- 0xD2, 0x01, 0x80, 0x3E,
- 0xE5, 0x55, 0x64, 0x03,
- 0x60, 0x04, 0xE5, 0x55,
- 0x70, 0x04, 0x7D, 0x02,
- 0x80, 0x09, 0x85, 0x2F,
- 0x41, 0xD2, 0x02, 0x80,
- 0x29, 0xAD, 0x55, 0xAF,
- 0x2F, 0x12, 0x02, 0x8D,
- 0x80, 0x20, 0x90, 0x70,
- 0x10, 0xE0, 0xF5, 0x47,
- 0x90, 0x70, 0x11, 0xE0,
- 0xF5, 0x44, 0x12, 0x10,
- 0x25, 0x80, 0x06, 0x90,
- 0x70, 0x10, 0xE0, 0xF5,
- 0x45, 0xE4, 0xFD, 0xAF,
- 0x2F, 0x12, 0x02, 0x8D,
- 0xD2, 0x04, 0x90, 0x70,
- 0x13, 0xE4, 0xF0, 0xD2,
- 0xAF, 0xD0, 0xD0, 0xD0,
- 0x82, 0xD0, 0x83, 0xD0,
- 0xF0, 0xD0, 0xE0, 0x32,
- 0x90, 0x70, 0x2A, 0xE0,
- 0x30, 0xE1, 0x53, 0xC2,
- 0xAF, 0x90, 0x70, 0x28,
- 0xE0, 0x90, 0x10, 0x1C,
- 0xF0, 0x90, 0x70, 0x29,
- 0xE0, 0x90, 0x10, 0x1D,
- 0xF0, 0x90, 0x70, 0x2A,
- 0xE0, 0x90, 0x10, 0x1E,
- 0xF0, 0x90, 0x10, 0x1C,
- 0xE0, 0xF5, 0x30, 0x90,
- 0x10, 0x1E, 0xE0, 0x20,
- 0xE1, 0xF3, 0x90, 0x10,
- 0x1C, 0xE0, 0x90, 0x70,
- 0x28, 0xF0, 0x90, 0x10,
- 0x1D, 0xE0, 0x90, 0x70,
- 0x29, 0xF0, 0x90, 0x10,
- 0x1E, 0xE0, 0x90, 0x70,
- 0x2A, 0xF0, 0x30, 0x4A,
- 0x0D, 0x90, 0x70, 0x24,
- 0xE0, 0x44, 0x01, 0xF0,
- 0x90, 0x02, 0x2C, 0x74,
- 0xFF, 0xF0, 0xC2, 0x05,
- 0xD2, 0xAF, 0x22, 0xC0,
- 0xE0, 0xC0, 0xF0, 0xC0,
- 0x83, 0xC0, 0x82, 0xC0,
- 0xD0, 0xE8, 0xC0, 0xE0,
- 0xE9, 0xC0, 0xE0, 0xEA,
- 0xC0, 0xE0, 0xEB, 0xC0,
- 0xE0, 0xEC, 0xC0, 0xE0,
- 0xED, 0xC0, 0xE0, 0xEE,
- 0xC0, 0xE0, 0xEF, 0xC0,
- 0xE0, 0xC2, 0xAF, 0x30,
- 0x45, 0x03, 0x12, 0x10,
- 0x12, 0xD2, 0xAF, 0xD0,
- 0xE0, 0xFF, 0xD0, 0xE0,
- 0xFE, 0xD0, 0xE0, 0xFD,
- 0xD0, 0xE0, 0xFC, 0xD0,
- 0xE0, 0xFB, 0xD0, 0xE0,
- 0xFA, 0xD0, 0xE0, 0xF9,
- 0xD0, 0xE0, 0xF8, 0xD0,
- 0xD0, 0xD0, 0x82, 0xD0,
- 0x83, 0xD0, 0xF0, 0xD0,
- 0xE0, 0x32, 0xC0, 0xE0,
- 0xC0, 0xF0, 0xC0, 0x83,
- 0xC0, 0x82, 0xC0, 0xD0,
- 0x75, 0xD0, 0x10, 0xC2,
- 0xAF, 0x30, 0x45, 0x03,
- 0x12, 0x10, 0x0C, 0x30,
- 0x58, 0x0A, 0xE5, 0x54,
- 0x60, 0x04, 0x15, 0x54,
- 0x80, 0x02, 0xC2, 0x58,
- 0x30, 0x59, 0x0A, 0xE5,
- 0x50, 0x60, 0x04, 0x15,
- 0x50, 0x80, 0x02, 0xC2,
- 0x59, 0xD5, 0x53, 0x07,
- 0x30, 0x60, 0x04, 0x15,
- 0x46, 0xD2, 0x04, 0x30,
- 0x45, 0x03, 0x12, 0x10,
- 0x0F, 0xC2, 0x8D, 0xD2,
- 0xAF, 0xD0, 0xD0, 0xD0,
- 0x82, 0xD0, 0x83, 0xD0,
- 0xF0, 0xD0, 0xE0, 0x32,
- 0x12, 0x02, 0xD3, 0x30,
- 0x45, 0x03, 0x12, 0x10,
- 0x03, 0x30, 0x01, 0x06,
- 0x20, 0x09, 0x03, 0x12,
- 0x10, 0x1C, 0x30, 0x02,
- 0x06, 0x20, 0x0A, 0x03,
- 0x12, 0x10, 0x1F, 0x30,
- 0x03, 0x06, 0x20, 0x0B,
- 0x03, 0x12, 0x10, 0x1F,
- 0x30, 0x04, 0x06, 0x20,
- 0x0C, 0x03, 0x12, 0x10,
- 0x22, 0x20, 0x13, 0x09,
- 0x20, 0x11, 0x06, 0xE5,
- 0x2B, 0x45, 0x2C, 0x60,
- 0x03, 0xD3, 0x80, 0x01,
- 0xC3, 0x92, 0xA9, 0x12,
- 0x02, 0xEC, 0x80, 0xBF,
- 0xC2, 0x43, 0xD2, 0x45,
- 0xE4, 0xF5, 0x20, 0xF5,
- 0x21, 0xF5, 0x53, 0xF5,
- 0x46, 0xF5, 0x2B, 0xF5,
- 0x2C, 0xC2, 0x42, 0xF5,
- 0x51, 0xF5, 0x52, 0xF5,
- 0x55, 0x90, 0x04, 0x18,
- 0x74, 0x80, 0xF0, 0x90,
- 0x04, 0x1A, 0x74, 0x08,
- 0xF0, 0xC2, 0x19, 0xC2,
- 0x18, 0xC2, 0x1A, 0x22,
- 0xC8, 0xEF, 0xC8, 0xE6,
- 0xFA, 0x08, 0xE6, 0x4A,
- 0x60, 0x0C, 0xC8, 0xEF,
- 0xC8, 0x08, 0xE6, 0x16,
- 0x18, 0x70, 0x01, 0x16,
- 0xC3, 0x22, 0xED, 0x24,
- 0xFF, 0xFD, 0xEC, 0x34,
- 0xFF, 0xC8, 0xEF, 0xC8,
- 0xF6, 0x08, 0xC6, 0xED,
- 0xC6, 0xD3, 0x22, 0xD0,
- 0x83, 0xD0, 0x82, 0xF8,
- 0xE4, 0x93, 0x70, 0x12,
- 0x74, 0x01, 0x93, 0x70,
- 0x0D, 0xA3, 0xA3, 0x93,
- 0xF8, 0x74, 0x01, 0x93,
- 0xF5, 0x82, 0x88, 0x83,
- 0xE4, 0x73, 0x74, 0x02,
- 0x93, 0x68, 0x60, 0xEF,
- 0xA3, 0xA3, 0xA3, 0x80,
- 0xDF, 0xEF, 0xF4, 0x60,
- 0x1F, 0xE4, 0xFE, 0x12,
- 0x03, 0x6A, 0xE0, 0xB4,
- 0xFF, 0x12, 0x12, 0x03,
- 0x6A, 0xEF, 0xF0, 0x74,
- 0x1C, 0x2E, 0xF5, 0x82,
- 0xE4, 0x34, 0x70, 0xF5,
- 0x83, 0xED, 0xF0, 0x22,
- 0x0E, 0xBE, 0x04, 0xE3,
- 0x22, 0xC0, 0xE0, 0xC0,
- 0xF0, 0xC0, 0x83, 0xC0,
- 0x82, 0xC0, 0xD0, 0x75,
- 0xD0, 0x08, 0xC2, 0xAF,
- 0x30, 0x45, 0x03, 0x12,
- 0x10, 0x06, 0xD2, 0xAF,
- 0xD0, 0xD0, 0xD0, 0x82,
- 0xD0, 0x83, 0xD0, 0xF0,
- 0xD0, 0xE0, 0x32, 0xC2,
- 0xAF, 0x12, 0x00, 0x06,
- 0x12, 0x02, 0x14, 0x12,
- 0x03, 0x1C, 0xE4, 0xF5,
- 0x22, 0xF5, 0x47, 0x90,
- 0x04, 0x00, 0x74, 0x80,
- 0xF0, 0xD2, 0xAF, 0x22,
- 0x30, 0x45, 0x03, 0x12,
- 0x10, 0x15, 0xE5, 0x20,
- 0x70, 0x03, 0x20, 0x10,
- 0x03, 0x30, 0x11, 0x03,
- 0x43, 0x87, 0x01, 0x22,
- 0xC0, 0x2A, 0x74, 0x03,
- 0xC0, 0xE0, 0xC0, 0x82,
- 0xC0, 0x83, 0x75, 0x2A,
- 0x0A, 0x22, 0xC0, 0x2A,
- 0x74, 0x03, 0xC0, 0xE0,
- 0xC0, 0x82, 0xC0, 0x83,
- 0x75, 0x2A, 0x18, 0x22,
- 0x75, 0x89, 0x02, 0xE4,
- 0xF5, 0x8C, 0xF5, 0x8A,
- 0xF5, 0x88, 0xF5, 0xB8,
- 0xF5, 0xE8, 0x75, 0x90,
- 0x18, 0xD2, 0x8C, 0x75,
- 0xA8, 0x05, 0x22, 0xCE,
- 0xEF, 0xCE, 0xEE, 0x60,
- 0x08, 0x7F, 0xFF, 0x12,
- 0x03, 0x80, 0x1E, 0x80,
- 0xF5, 0x22, 0xC8, 0xEF,
- 0xC8, 0xE6, 0x60, 0x03,
- 0x16, 0xC3, 0x22, 0xED,
- 0x14, 0xF6, 0xD3, 0x22,
- 0xC8, 0xEF, 0xC8, 0xE6,
- 0x60, 0x06, 0x16, 0xE6,
- 0x24, 0xFF, 0xB3, 0x22,
- 0xC3, 0x22, 0x78, 0x7F,
- 0xE4, 0xF6, 0xD8, 0xFD,
- 0x75, 0x81, 0x5F, 0x02,
- 0x01, 0xD0, 0x74, 0x14,
- 0x2E, 0xF5, 0x82, 0xE4,
- 0x34, 0x70, 0xF5, 0x83,
- 0x22, 0xEF, 0x90, 0x03,
- 0x7E, 0x93, 0x90, 0x03,
- 0x00, 0x73, 0x0A, 0x18,
- 0xEF, 0x60, 0x03, 0x1F,
- 0x80, 0xFA, 0x22, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF,
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***The diff for this file has been truncated for email.***
=======================================
--- /sys/dev/ral/if_ral_nexus.c Tue Mar 13 11:11:15 2012
+++ /sys/dev/ral/if_ral_nexus.c Tue Mar 13 13:43:32 2012
@@ -19,7 +19,6 @@
#include <dev/ral/rt2860_softc.h>
#include <dev/ral/rt2860_reg.h>
#include <dev/ral/rt2860_eeprom.h>
-#include <dev/ral/rt2860_ucode.h>
#include <dev/ral/rt2860_txwi.h>
#include <dev/ral/rt2860_rxwi.h>
#include <dev/ral/rt2860_io.h>
=======================================
--- /sys/dev/ral/rt2860.c Tue Mar 13 11:11:15 2012
+++ /sys/dev/ral/rt2860.c Tue Mar 13 13:43:32 2012
@@ -15,9 +15,11 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
+#include <sys/param.h>
+#include <sys/firmware.h>
+
#include <dev/ral/rt2860var.h>
#include <dev/ral/rt2860reg.h>
-#include <dev/ral/rt2860ucode.h>
/*
* Defines and macros
@@ -559,8 +561,7 @@
void rt2860_io_mcu_cmd(struct rt2860_softc *sc, uint8_t cmd,
uint8_t token, uint16_t arg);
int rt2860_io_mcu_cmd_check(struct rt2860_softc *sc, uint8_t cid);
-int rt2860_io_mcu_load_ucode(struct rt2860_softc *sc,
- const uint8_t *ucode, size_t len);
+int rt2860_load_microcode(struct rt2860_softc *sc);
static int rt2860_beacon_alloc(struct rt2860_softc *sc,
struct ieee80211vap *vap);
static uint8_t rt2860_rxrate(struct rt2860_rxwi *rxwi);
@@ -1275,21 +1276,12 @@
if (sc->mac_rev != 0x28720200) {
if (!(sc->flags & RT2860_SOFTC_FLAGS_UCODE_LOADED)) {
- RT2860_DPRINTF(sc, RT2860_DEBUG_ANY,
- "%s: loading 8051 microcode\n",
- device_get_nameunit(sc->sc_dev));
-
- error = rt2860_io_mcu_load_ucode(sc, rt2860_ucode, sizeof(rt2860_ucode));
+ error = rt2860_load_microcode(sc);
if (error != 0) {
device_printf(sc->sc_dev,
"could not load 8051 microcode\n");
goto fail;
}
-
- RT2860_DPRINTF(sc, RT2860_DEBUG_ANY,
- "%s: 8051 microcode was successfully loaded\n",
- device_get_nameunit(sc->sc_dev));
-
sc->flags |= RT2860_SOFTC_FLAGS_UCODE_LOADED;
}
} else {
@@ -7201,8 +7193,6 @@
static uint16_t rt2860_io_eeprom_shiftin_bits(struct rt2860_softc *sc);
-static uint8_t rt2860_io_byte_rev(uint8_t byte);
-
/* #ifdef RT305X_SOC */
static const uint16_t rt3052_eeprom[] =
{
@@ -7811,67 +7801,51 @@
return result;
}
-/*
- * rt2860_io_mcu_load_ucode
- */
-int rt2860_io_mcu_load_ucode(struct rt2860_softc *sc,
- const uint8_t *ucode, size_t len)
-{
- int i, ntries;
- uint16_t crc;
-
- for (i = 0, crc = 0xffff; i < len - 2; i++)
- crc = RT2860_IO_BYTE_CRC16(rt2860_io_byte_rev(ucode[i]), crc);
-
- if (ucode[len - 2] != rt2860_io_byte_rev(crc >> 8) ||
- ucode[len - 1] != rt2860_io_byte_rev(crc)) {
- device_printf(sc->sc_dev, "wrong microcode crc\n");
+int
+rt2860_load_microcode(struct rt2860_softc *sc)
+{
+ struct ifnet *ifp = sc->sc_ifp;
+ const struct firmware *fp;
+ int ntries, error = 0;
+
+ RT2860_SOFTC_UNLOCK(sc);
+ fp = firmware_get("rt2860fw");
+ RT2860_SOFTC_LOCK(sc);
+ if (fp == NULL) {
+ if_printf(ifp,
+ "%s: unable to retrieve firmware image rt2860fw\n",
+ __func__);
return EINVAL;
}
+ /* set "host program ram write selection" bit */
rt2860_io_mac_write(sc, RT2860_REG_PBF_SYS_CTRL, RT2860_REG_HST_PM_SEL);
-
- for(i = 0; i < len; i += 4) {
- rt2860_io_mac_write(sc, RT2860_REG_MCU_UCODE_BASE + i,
- (ucode[i+3] << 24) | (ucode[i+2] << 16) |
- (ucode[i+1] << 8) | ucode[i]);
- }
-
- if (sc->mac_rev != 0x28720200)
- rt2860_io_mac_write_multi(sc, RT2860_REG_MCU_UCODE_BASE,
- ucode, len);
-
+ /* write microcode image */
+ rt2860_io_mac_write_multi(sc, RT2860_REG_MCU_UCODE_BASE, fp->data,
+ fp->datasize);
+ /* kick microcontroller unit */
rt2860_io_mac_write(sc, RT2860_REG_PBF_SYS_CTRL, 0);
-
- if (sc->mac_rev != 0x28720200)
- rt2860_io_mac_write(sc, RT2860_REG_PBF_SYS_CTRL,
- RT2860_REG_MCU_RESET);
-
- DELAY(10000);
-
- /* initialize BBP R/W access agent */
+ RAL_BARRIER_WRITE(sc);
+ rt2860_io_mac_write(sc, RT2860_REG_PBF_SYS_CTRL, RT2860_REG_MCU_RESET);
rt2860_io_mac_write(sc, RT2860_REG_H2M_MAILBOX_BBP_AGENT, 0);
rt2860_io_mac_write(sc, RT2860_REG_H2M_MAILBOX, 0);
- if (sc->mac_rev != 0x28720200) {
-
- for (ntries = 0; ntries < 1000; ntries++) {
- if (rt2860_io_mac_read(sc, RT2860_REG_PBF_SYS_CTRL) &
- RT2860_REG_MCU_READY)
- break;
-
- DELAY(1000);
- }
-
- if (ntries == 1000) {
- device_printf(sc->sc_dev,
- "timeout waiting for MCU to initialize\n");
- return ETIMEDOUT;
- }
- }
-
- return 0;
+ /* wait until microcontroller is ready */
+ RAL_BARRIER_READ_WRITE(sc);
+ for (ntries = 0; ntries < 1000; ntries++) {
+ if (rt2860_io_mac_read(sc, RT2860_REG_PBF_SYS_CTRL) &
+ RT2860_REG_MCU_READY)
+ break;
+ DELAY(1000);
+ }
+ if (ntries == 1000) {
+ device_printf(sc->sc_dev,
+ "timeout waiting for MCU to initialize\n");
+ error = ETIMEDOUT;
+ }
+ firmware_put(fp, FIRMWARE_UNLOAD);
+ return error;
}
/*
@@ -7938,28 +7912,6 @@
return val;
}
-
-/*
- * rt2860_io_byte_rev
- */
-static uint8_t rt2860_io_byte_rev(uint8_t byte)
-{
- int i;
- uint8_t tmp;
-
- for(i = 0, tmp = 0; ; i++) {
- if(byte & 0x80)
- tmp |= 0x80;
-
- if(i == 7)
- break;
-
- byte <<= 1;
- tmp >>= 1;
- }
-
- return tmp;
-}
/*
* rt2860_led_brightness
=======================================
--- /sys/dev/ral/rt2860reg.h Tue Mar 13 11:11:15 2012
+++ /sys/dev/ral/rt2860reg.h Tue Mar 13 13:43:32 2012
@@ -559,4 +559,12 @@
#define RT2860_REG_H2M_CID3_SHIFT 24
#define RT2860_REG_H2M_CID_MASK 0xff
+#define RAL_BARRIER_WRITE(sc) \
+ bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, 0x1800, \
+ BUS_SPACE_BARRIER_WRITE)
+
+#define RAL_BARRIER_READ_WRITE(sc) \
+ bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, 0x1800, \
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)
+
#endif /* #ifndef _RT2860_REG_H_ */
==============================================================================
Revision: 446cd4654cb3
Author: Bernhard Schmidt <bschmidt at techwires.net>
Date: Tue Mar 13 14:01:39 2012
Log: prefer macros over functions
http://code.google.com/p/rt2860-in-ral/source/detail?r=446cd4654cb3
Modified:
/sys/dev/ral/rt2860.c
/sys/dev/ral/rt2860reg.h
=======================================
--- /sys/dev/ral/rt2860.c Tue Mar 13 13:43:32 2012
+++ /sys/dev/ral/rt2860.c Tue Mar 13 14:01:39 2012
@@ -542,15 +542,6 @@
uint32_t rt2860_read_eeprom_txpow_rate_add_delta(uint32_t txpow_rate,
int8_t delta);
void rt2860_io_rf_load_defaults(struct rt2860_softc *sc);
-uint32_t rt2860_io_mac_read(struct rt2860_softc *sc, uint16_t reg);
-void rt2860_io_mac_read_multi(struct rt2860_softc *sc,
- uint16_t reg, void *buf, size_t len);
-void rt2860_io_mac_write(struct rt2860_softc *sc,
- uint16_t reg, uint32_t val);
-void rt2860_io_mac_write_multi(struct rt2860_softc *sc,
- uint16_t reg, const void *buf, size_t len);
-void rt2860_io_mac_set_region_4(struct rt2860_softc *sc,
- uint16_t reg, uint32_t val, size_t len);
uint16_t rt2860_io_eeprom_read(struct rt2860_softc *sc, uint16_t addr);
void rt2860_io_eeprom_read_multi(struct rt2860_softc *sc,
uint16_t addr, void *buf, size_t len);
@@ -664,7 +655,7 @@
/* wait for NIC to initialize */
for (ntries = 0; ntries < 100; ntries++) {
- sc->mac_rev = rt2860_io_mac_read(sc, RT2860_REG_MAC_CSR0);
+ sc->mac_rev = RAL_READ(sc, RT2860_REG_MAC_CSR0);
if (sc->mac_rev != 0x00000000 && sc->mac_rev != 0xffffffff)
break;
@@ -1262,7 +1253,10 @@
struct ifnet *ifp;
struct ieee80211com *ic;
int error, i, ntries;
- uint32_t tmp, stacnt[6];
+ uint32_t tmp;
+#if 0
+ uint32_t stacnt[6];
+#endif
sc = priv;
ifp = sc->sc_ifp;
@@ -1288,7 +1282,7 @@
sc->flags |= RT2860_SOFTC_FLAGS_UCODE_LOADED;
/* Blink every TX */
- rt2860_io_mac_write(sc, RT2860_REG_LED_CFG,
+ RAL_WRITE(sc, RT2860_REG_LED_CFG,
LED_CFG_LED_POLARITY |
LED_CFG_Y_LED_MODE_ONTX |
LED_CFG_G_LED_MODE_ONTX |
@@ -1298,28 +1292,28 @@
LED_CFG_LED_ON_TIME);
}
- rt2860_io_mac_write(sc, RT2860_REG_PWR_PIN_CFG, 0x2);
+ RAL_WRITE(sc, RT2860_REG_PWR_PIN_CFG, 0x2);
/* disable DMA engine */
- tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
tmp &= 0xff0;
tmp |= RT2860_REG_TX_WB_DDONE;
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
-
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_RST_IDX, 0xffffffff);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
+
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_WPDMA_RST_IDX, 0xffffffff);
/* PBF hardware reset */
- rt2860_io_mac_write(sc, RT2860_REG_PBF_SYS_CTRL, 0xe1f);
- rt2860_io_mac_write(sc, RT2860_REG_PBF_SYS_CTRL, 0xe00);
+ RAL_WRITE(sc, RT2860_REG_PBF_SYS_CTRL, 0xe1f);
+ RAL_WRITE(sc, RT2860_REG_PBF_SYS_CTRL, 0xe00);
/* wait while DMA engine is busy */
for (ntries = 0; ntries < 100; ntries++) {
- tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
if (!(tmp & (RT2860_REG_TX_DMA_BUSY | RT2860_REG_RX_DMA_BUSY)))
break;
@@ -1334,7 +1328,7 @@
tmp &= 0xff0;
tmp |= RT2860_REG_TX_WB_DDONE;
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
/* reset Rx and Tx rings */
@@ -1346,18 +1340,18 @@
RT2860_REG_RST_IDX_TX_AC1 |
RT2860_REG_RST_IDX_TX_AC0;
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_RST_IDX, tmp);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_WPDMA_RST_IDX, tmp);
/* PBF hardware reset */
- rt2860_io_mac_write(sc, RT2860_REG_PBF_SYS_CTRL, 0xe1f);
- rt2860_io_mac_write(sc, RT2860_REG_PBF_SYS_CTRL, 0xe00);
-
- rt2860_io_mac_write(sc, RT2860_REG_PWR_PIN_CFG, 0x3);
-
- rt2860_io_mac_write(sc, RT2860_REG_SYS_CTRL,
+ RAL_WRITE(sc, RT2860_REG_PBF_SYS_CTRL, 0xe1f);
+ RAL_WRITE(sc, RT2860_REG_PBF_SYS_CTRL, 0xe00);
+
+ RAL_WRITE(sc, RT2860_REG_PWR_PIN_CFG, 0x3);
+
+ RAL_WRITE(sc, RT2860_REG_SYS_CTRL,
RT2860_REG_MAC_SRST | RT2860_REG_BBP_HRST);
- rt2860_io_mac_write(sc, RT2860_REG_SYS_CTRL, 0);
+ RAL_WRITE(sc, RT2860_REG_SYS_CTRL, 0);
/* init Tx power per rate */
@@ -1365,18 +1359,18 @@
if (sc->txpow_rate_20mhz[i] == 0xffffffff)
continue;
- rt2860_io_mac_write(sc, RT2860_REG_TX_PWR_CFG(i),
+ RAL_WRITE(sc, RT2860_REG_TX_PWR_CFG(i),
sc->txpow_rate_20mhz[i]);
}
for (i = 0; i < RT2860_DEF_MAC_SIZE; i++)
- rt2860_io_mac_write(sc, rt2860_def_mac[i].reg,
+ RAL_WRITE(sc, rt2860_def_mac[i].reg,
rt2860_def_mac[i].val);
/* wait while MAC is busy */
for (ntries = 0; ntries < 100; ntries++) {
- if (!(rt2860_io_mac_read(sc, RT2860_REG_STATUS_CFG) &
+ if (!(RAL_READ(sc, RT2860_REG_STATUS_CFG) &
(RT2860_REG_STATUS_TX_BUSY | RT2860_REG_STATUS_RX_BUSY)))
break;
@@ -1390,8 +1384,8 @@
/* clear Host to MCU mailbox */
- rt2860_io_mac_write(sc, RT2860_REG_H2M_MAILBOX_BBP_AGENT, 0);
- rt2860_io_mac_write(sc, RT2860_REG_H2M_MAILBOX, 0);
+ RAL_WRITE(sc, RT2860_REG_H2M_MAILBOX_BBP_AGENT, 0);
+ RAL_WRITE(sc, RT2860_REG_H2M_MAILBOX, 0);
rt2860_io_mcu_cmd(sc, RT2860_IO_MCU_CMD_BOOT,
RT2860_REG_H2M_TOKEN_NO_INTR, 0);
@@ -1406,26 +1400,26 @@
tmp = (1 << 12) | RT2860_MAX_AGG_SIZE;
- rt2860_io_mac_write(sc, RT2860_REG_MAX_LEN_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_MAX_LEN_CFG, tmp);
if (sc->mac_rev == 0x28720200) {
/* set max. PSDU length from 16K to 32K bytes */
- tmp = rt2860_io_mac_read(sc, RT2860_REG_MAX_LEN_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_MAX_LEN_CFG);
tmp &= ~(3 << 12);
tmp |= (2 << 12);
- rt2860_io_mac_write(sc, RT2860_REG_MAX_LEN_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_MAX_LEN_CFG, tmp);
}
if (sc->mac_rev >= 0x28720200 && sc->mac_rev < 0x30700200) {
- tmp = rt2860_io_mac_read(sc, RT2860_REG_MAX_LEN_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_MAX_LEN_CFG);
tmp &= 0xfff;
tmp |= 0x2000;
- rt2860_io_mac_write(sc, RT2860_REG_MAX_LEN_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_MAX_LEN_CFG, tmp);
}
/* set mac address */
@@ -1433,9 +1427,10 @@
rt2860_asic_set_macaddr(sc, IF_LLADDR(ifp));
/* clear statistic registers */
-
+#if 0
rt2860_io_mac_read_multi(sc, RT2860_REG_RX_STA_CNT0,
stacnt, sizeof(stacnt));
+#endif
/* set RTS threshold */
@@ -1453,7 +1448,7 @@
/* clear beacon frame space (entries = 8, entry size = 512) */
- rt2860_io_mac_set_region_4(sc, RT2860_REG_BEACON_BASE(0), 0, 1024);
+ RAL_SET_REGION_4(sc, RT2860_REG_BEACON_BASE(0), 0, 1024);
taskqueue_unblock(sc->taskqueue);
@@ -1463,28 +1458,28 @@
rt2860_reset_tx_ring(sc, &sc->tx_ring[i]);
for (i = 0; i < RT2860_SOFTC_TX_RING_COUNT; i++) {
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_BASE_PTR(i),
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_TX_BASE_PTR(i),
sc->tx_ring[i].desc_phys_addr);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_MAX_CNT(i),
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_TX_MAX_CNT(i),
RT2860_SOFTC_TX_RING_DESC_COUNT);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(i), 0);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(i), 0);
}
/* init Rx ring */
rt2860_reset_rx_ring(sc, &sc->rx_ring);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_BASE_PTR,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_RX_BASE_PTR,
sc->rx_ring.desc_phys_addr);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_MAX_CNT,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_RX_MAX_CNT,
RT2860_SOFTC_RX_RING_DATA_COUNT);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_CALC_IDX,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_RX_CALC_IDX,
RT2860_SOFTC_RX_RING_DATA_COUNT - 1);
/* wait while DMA engine is busy */
for (ntries = 0; ntries < 100; ntries++) {
- tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
if (!(tmp & (RT2860_REG_TX_DMA_BUSY | RT2860_REG_RX_DMA_BUSY)))
break;
@@ -1499,11 +1494,11 @@
tmp &= 0xff0;
tmp |= RT2860_REG_TX_WB_DDONE;
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
/* disable interrupts mitigation */
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_DELAY_INT_CFG, 0);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_DELAY_INT_CFG, 0);
/* select Main antenna for 1T1R devices */
if (sc->rf_rev == RT2860_EEPROM_RF_2020 ||
@@ -1538,7 +1533,7 @@
if (sc->mac_rev != 0x28720200) {
/* 0x28720200 don`t have RT2860_REG_SCHDMA_GPIO_CTRL_CFG */
- tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_GPIO_CTRL_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_SCHDMA_GPIO_CTRL_CFG);
if (tmp & (1 << 2)) {
rt2860_io_mcu_cmd(sc, RT2860_IO_MCU_CMD_SLEEP,
RT2860_REG_H2M_TOKEN_RADIOOFF, 0x02ff);
@@ -1596,16 +1591,16 @@
/* set current channel */
rt2860_rf_set_chan(sc, ic->ic_curchan);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WMM_TXOP0_CFG, 0);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WMM_TXOP1_CFG,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_WMM_TXOP0_CFG, 0);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_WMM_TXOP1_CFG,
(48 << 16) | 96);
if ((sc->mac_rev & 0xffff) != 0x0101)
- rt2860_io_mac_write(sc, RT2860_REG_TX_TXOP_CTRL_CFG, 0x583f);
+ RAL_WRITE(sc, RT2860_REG_TX_TXOP_CTRL_CFG, 0x583f);
/* clear pending interrupts */
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_INT_STATUS, 0xffffffff);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_INT_STATUS, 0xffffffff);
/* enable interrupts */
@@ -1623,14 +1618,14 @@
sc->intr_enable_mask = tmp;
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_INT_MASK, tmp);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_INT_MASK, tmp);
if (rt2860_txrx_enable(sc) != 0)
goto fail;
/* clear garbage interrupts */
- tmp = rt2860_io_mac_read(sc, 0x1300);
+ tmp = RAL_READ(sc, 0x1300);
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
ifp->if_drv_flags |= IFF_DRV_RUNNING;
@@ -1744,21 +1739,21 @@
/* disable interrupts */
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_INT_MASK, 0);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_INT_MASK, 0);
/* disable Tx/Rx */
- tmp = rt2860_io_mac_read(sc, RT2860_REG_SYS_CTRL);
+ tmp = RAL_READ(sc, RT2860_REG_SYS_CTRL);
tmp &= ~(RT2860_REG_RX_ENABLE | RT2860_REG_TX_ENABLE);
- rt2860_io_mac_write(sc, RT2860_REG_SYS_CTRL, tmp);
+ RAL_WRITE(sc, RT2860_REG_SYS_CTRL, tmp);
/* reset adapter */
- rt2860_io_mac_write(sc, RT2860_REG_SYS_CTRL,
+ RAL_WRITE(sc, RT2860_REG_SYS_CTRL,
RT2860_REG_MAC_SRST | RT2860_REG_BBP_HRST);
- rt2860_io_mac_write(sc, RT2860_REG_SYS_CTRL, 0);
+ RAL_WRITE(sc, RT2860_REG_SYS_CTRL, 0);
}
/*
@@ -2386,25 +2381,25 @@
iv[0], iv[1], iv[2], iv[3], iv[4], iv[5], iv[6], iv[7]);
}
- rt2860_io_mac_write_multi(sc, RT2860_REG_IVEIV(wcid), iv, 8);
+ RAL_WRITE_REGION_1(sc, RT2860_REG_IVEIV(wcid), iv, 8);
if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP) {
- rt2860_io_mac_write_multi(sc, key_base, k->wk_key, 16);
+ RAL_WRITE_REGION_1(sc, key_base, k->wk_key, 16);
if (vap->iv_opmode != IEEE80211_M_HOSTAP) {
- rt2860_io_mac_write_multi(sc, key_base + 16, &k->wk_key[16], 8);
- rt2860_io_mac_write_multi(sc, key_base + 24, &k->wk_key[24], 8);
+ RAL_WRITE_REGION_1(sc, key_base + 16, &k->wk_key[16], 8);
+ RAL_WRITE_REGION_1(sc, key_base + 24, &k->wk_key[24], 8);
} else {
- rt2860_io_mac_write_multi(sc, key_base + 16, &k->wk_key[24], 8);
- rt2860_io_mac_write_multi(sc, key_base + 24, &k->wk_key[16], 8);
+ RAL_WRITE_REGION_1(sc, key_base + 16, &k->wk_key[24], 8);
+ RAL_WRITE_REGION_1(sc, key_base + 24, &k->wk_key[16], 8);
}
} else {
- rt2860_io_mac_write_multi(sc, key_base, k->wk_key, k->wk_keylen);
+ RAL_WRITE_REGION_1(sc, key_base, k->wk_key, k->wk_keylen);
}
tmp = ((vapid & RT2860_REG_VAP_MASK) << RT2860_REG_VAP_SHIFT) |
(mode << RT2860_REG_CIPHER_MODE_SHIFT) | RT2860_REG_PKEY_ENABLE;
- rt2860_io_mac_write(sc, RT2860_REG_WCID_ATTR(wcid), tmp);
+ RAL_WRITE(sc, RT2860_REG_WCID_ATTR(wcid), tmp);
}
if ((k->wk_flags & IEEE80211_KEY_GROUP) ||
@@ -2417,25 +2412,25 @@
keymode_base = RT2860_REG_SKEY_MODE(vapid);
if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP) {
- rt2860_io_mac_write_multi(sc, key_base, k->wk_key, 16);
+ RAL_WRITE_REGION_1(sc, key_base, k->wk_key, 16);
if (vap->iv_opmode != IEEE80211_M_HOSTAP) {
- rt2860_io_mac_write_multi(sc, key_base + 16, &k->wk_key[16], 8);
- rt2860_io_mac_write_multi(sc, key_base + 24, &k->wk_key[24], 8);
+ RAL_WRITE_REGION_1(sc, key_base + 16, &k->wk_key[16], 8);
+ RAL_WRITE_REGION_1(sc, key_base + 24, &k->wk_key[24], 8);
} else {
- rt2860_io_mac_write_multi(sc, key_base + 16, &k->wk_key[24], 8);
- rt2860_io_mac_write_multi(sc, key_base + 24, &k->wk_key[16], 8);
+ RAL_WRITE_REGION_1(sc, key_base + 16, &k->wk_key[24], 8);
+ RAL_WRITE_REGION_1(sc, key_base + 24, &k->wk_key[16], 8);
}
} else {
- rt2860_io_mac_write_multi(sc, key_base, k->wk_key, k->wk_keylen);
+ RAL_WRITE_REGION_1(sc, key_base, k->wk_key, k->wk_keylen);
}
- tmp = rt2860_io_mac_read(sc, keymode_base);
+ tmp = RAL_READ(sc, keymode_base);
tmp &= ~(0xf << (k->wk_keyix * 4 + 16 * (vapid % 2)));
tmp |= (mode << (k->wk_keyix * 4 + 16 * (vapid % 2)));
- rt2860_io_mac_write(sc, keymode_base, tmp);
+ RAL_WRITE(sc, keymode_base, tmp);
if (vap->iv_opmode == IEEE80211_M_HOSTAP) {
if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_WEP) {
@@ -2467,12 +2462,12 @@
iv[0], iv[1], iv[2], iv[3], iv[4], iv[5], iv[6], iv[7]);
}
- rt2860_io_mac_write_multi(sc, RT2860_REG_IVEIV(wcid), iv, 8);
+ RAL_WRITE_REGION_1(sc, RT2860_REG_IVEIV(wcid), iv, 8);
tmp = ((vapid & RT2860_REG_VAP_MASK) << RT2860_REG_VAP_SHIFT) |
(mode << RT2860_REG_CIPHER_MODE_SHIFT);
- rt2860_io_mac_write(sc, RT2860_REG_WCID_ATTR(wcid), tmp);
+ RAL_WRITE(sc, RT2860_REG_WCID_ATTR(wcid), tmp);
}
}
@@ -2506,18 +2501,18 @@
vapid = 0;
wcid = RT2860_WCID_MCAST;
- tmp = rt2860_io_mac_read(sc, RT2860_REG_SKEY_MODE(vapid));
+ tmp = RAL_READ(sc, RT2860_REG_SKEY_MODE(vapid));
tmp &= ~(0xf << (k->wk_keyix * 4 + 16 * (vapid % 2)));
tmp |= (RT2860_REG_CIPHER_MODE_NONE << (k->wk_keyix * 4 + 16 * (vapid %
2)));
- rt2860_io_mac_write(sc, RT2860_REG_SKEY_MODE(vapid), tmp);
+ RAL_WRITE(sc, RT2860_REG_SKEY_MODE(vapid), tmp);
if (vap->iv_opmode == IEEE80211_M_HOSTAP) {
tmp = ((vapid & RT2860_REG_VAP_MASK) << RT2860_REG_VAP_SHIFT) |
(RT2860_REG_CIPHER_MODE_NONE << RT2860_REG_CIPHER_MODE_SHIFT) |
RT2860_REG_PKEY_ENABLE;
- rt2860_io_mac_write(sc, RT2860_REG_WCID_ATTR(wcid), tmp);
+ RAL_WRITE(sc, RT2860_REG_WCID_ATTR(wcid), tmp);
}
}
@@ -2615,10 +2610,10 @@
tmp = ((vapid & RT2860_REG_VAP_MASK) << RT2860_REG_VAP_SHIFT) |
(RT2860_REG_CIPHER_MODE_NONE << RT2860_REG_CIPHER_MODE_SHIFT) |
RT2860_REG_PKEY_ENABLE;
- rt2860_io_mac_write(sc, RT2860_REG_WCID_ATTR(wcid), tmp);
-
- rt2860_io_mac_write(sc, RT2860_REG_WCID(wcid), 0x00000000);
- rt2860_io_mac_write(sc, RT2860_REG_WCID(wcid) + 4, 0x00000000);
+ RAL_WRITE(sc, RT2860_REG_WCID_ATTR(wcid), tmp);
+
+ RAL_WRITE(sc, RT2860_REG_WCID(wcid), 0x00000000);
+ RAL_WRITE(sc, RT2860_REG_WCID(wcid) + 4, 0x00000000);
rt2860_staid_delete(sc, rni->staid);
@@ -2772,12 +2767,12 @@
(ni->ni_macaddr[1] << 8) |
ni->ni_macaddr[0];
- rt2860_io_mac_write(sc, RT2860_REG_WCID(wcid), tmp);
+ RAL_WRITE(sc, RT2860_REG_WCID(wcid), tmp);
tmp = (ni->ni_macaddr[5] << 8) |
ni->ni_macaddr[4];
- rt2860_io_mac_write(sc, RT2860_REG_WCID(wcid) + 4, tmp);
+ RAL_WRITE(sc, RT2860_REG_WCID(wcid) + 4, tmp);
rt2860_amrr_node_init(&rvap->amrr, &sc->amrr_node[wcid], ni);
@@ -3444,11 +3439,11 @@
tmp = bssid[0] | (bssid[1]) << 8 | (bssid[2] << 16) | (bssid[3] << 24);
- rt2860_io_mac_write(sc, RT2860_REG_BSSID_DW0, tmp);
+ RAL_WRITE(sc, RT2860_REG_BSSID_DW0, tmp);
tmp = bssid[4] | (bssid[5] << 8);
- rt2860_io_mac_write(sc, RT2860_REG_BSSID_DW1, tmp);
+ RAL_WRITE(sc, RT2860_REG_BSSID_DW1, tmp);
}
/*
@@ -3461,11 +3456,11 @@
tmp = addr[0] | (addr[1] << 8) | (addr[2] << 16) | (addr[3] << 24);
- rt2860_io_mac_write(sc, RT2860_REG_ADDR_DW0, tmp);
+ RAL_WRITE(sc, RT2860_REG_ADDR_DW0, tmp);
tmp = addr[4] | (addr[5] << 8) | (0xff << 16);
- rt2860_io_mac_write(sc, RT2860_REG_ADDR_DW1, tmp);
+ RAL_WRITE(sc, RT2860_REG_ADDR_DW1, tmp);
}
/*
@@ -3486,7 +3481,7 @@
"%s: enabling TSF\n",
device_get_nameunit(sc->sc_dev));
- tmp = rt2860_io_mac_read(sc, RT2860_REG_BCN_TIME_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_BCN_TIME_CFG);
tmp &= ~0x1fffff;
tmp |= vap->iv_bss->ni_intval * 16;
@@ -3502,7 +3497,7 @@
tmp |= (RT2860_REG_TSF_SYNC_MODE_HOSTAP <<
RT2860_REG_TSF_SYNC_MODE_SHIFT);
}
- rt2860_io_mac_write(sc, RT2860_REG_BCN_TIME_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_BCN_TIME_CFG, tmp);
}
/*
@@ -3516,7 +3511,7 @@
"%s: disabling TSF\n",
device_get_nameunit(sc->sc_dev));
- tmp = rt2860_io_mac_read(sc, RT2860_REG_BCN_TIME_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_BCN_TIME_CFG);
tmp &= ~(RT2860_REG_BCN_TX_ENABLE |
RT2860_REG_TSF_TIMER_ENABLE |
@@ -3525,7 +3520,7 @@
tmp &= ~(RT2860_REG_TSF_SYNC_MODE_MASK << RT2860_REG_TSF_SYNC_MODE_SHIFT);
tmp |= (RT2860_REG_TSF_SYNC_MODE_DISABLE <<
RT2860_REG_TSF_SYNC_MODE_SHIFT);
- rt2860_io_mac_write(sc, RT2860_REG_BCN_TIME_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_BCN_TIME_CFG, tmp);
}
/*
@@ -3537,7 +3532,7 @@
#define OFDM(mcs) ((1 << 3) | (mcs))
#define HT(mcs) (mcs)
- rt2860_io_mac_write(sc, RT2860_REG_TX_LG_FBK_CFG0,
+ RAL_WRITE(sc, RT2860_REG_TX_LG_FBK_CFG0,
(OFDM(6) << 28) | /* 54 -> 48 */
(OFDM(5) << 24) | /* 48 -> 36 */
(OFDM(4) << 20) | /* 36 -> 24 */
@@ -3547,13 +3542,13 @@
(OFDM(0) << 4) | /* 9 -> 6 */
OFDM(0)); /* 6 -> 6 */
- rt2860_io_mac_write(sc, RT2860_REG_TX_LG_FBK_CFG1,
+ RAL_WRITE(sc, RT2860_REG_TX_LG_FBK_CFG1,
(CCK(2) << 12) | /* 11 -> 5.5 */
(CCK(1) << 8) | /* 5.5 -> 2 */
(CCK(0) << 4) | /* 2 -> 1 */
CCK(0)); /* 1 -> 1 */
- rt2860_io_mac_write(sc, RT2860_REG_TX_HT_FBK_CFG0,
+ RAL_WRITE(sc, RT2860_REG_TX_HT_FBK_CFG0,
(HT(6) << 28) |
(HT(5) << 24) |
(HT(4) << 20) |
@@ -3563,7 +3558,7 @@
(HT(0) << 4) |
HT(0));
- rt2860_io_mac_write(sc, RT2860_REG_TX_HT_FBK_CFG1,
+ RAL_WRITE(sc, RT2860_REG_TX_HT_FBK_CFG1,
(HT(14) << 28) |
(HT(13) << 24) |
(HT(12) << 20) |
@@ -3595,14 +3590,14 @@
device_get_nameunit(sc->sc_dev),
(ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "enabling" : "disabling");
- tmp = rt2860_io_mac_read(sc, RT2860_REG_AUTO_RSP_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_AUTO_RSP_CFG);
tmp &= ~RT2860_REG_CCK_SHORT_ENABLE;
if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
tmp |= RT2860_REG_CCK_SHORT_ENABLE;
- rt2860_io_mac_write(sc, RT2860_REG_AUTO_RSP_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_AUTO_RSP_CFG, tmp);
}
/*
@@ -3617,11 +3612,11 @@
ic = ifp->if_l2com;
if (ic->ic_curmode == IEEE80211_MODE_11B)
- rt2860_io_mac_write(sc, RT2860_REG_LEGACY_BASIC_RATE, 0xf);
+ RAL_WRITE(sc, RT2860_REG_LEGACY_BASIC_RATE, 0xf);
else if (ic->ic_curmode == IEEE80211_MODE_11A)
- rt2860_io_mac_write(sc, RT2860_REG_LEGACY_BASIC_RATE, 0x150);
+ RAL_WRITE(sc, RT2860_REG_LEGACY_BASIC_RATE, 0x150);
else
- rt2860_io_mac_write(sc, RT2860_REG_LEGACY_BASIC_RATE, 0x15f);
+ RAL_WRITE(sc, RT2860_REG_LEGACY_BASIC_RATE, 0x15f);
}
/*
@@ -3650,14 +3645,14 @@
"%s: updating RTS threshold: %d\n",
device_get_nameunit(sc->sc_dev), threshold);
- tmp = rt2860_io_mac_read(sc, RT2860_REG_TX_RTS_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_TX_RTS_CFG);
tmp &= ~(RT2860_REG_TX_RTS_THRESHOLD_MASK <<
RT2860_REG_TX_RTS_THRESHOLD_SHIFT);
tmp |= ((threshold & RT2860_REG_TX_RTS_THRESHOLD_MASK) <<
RT2860_REG_TX_RTS_THRESHOLD_SHIFT);
- rt2860_io_mac_write(sc, RT2860_REG_TX_RTS_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_TX_RTS_CFG, tmp);
}
/*
@@ -3715,7 +3710,7 @@
if (txpow_rate[i] == 0xffffffff)
continue;
tmp = rt2860_read_eeprom_txpow_rate_add_delta(txpow_rate[i], delta);
- rt2860_io_mac_write(sc, RT2860_REG_TX_PWR_CFG(i), tmp);
+ RAL_WRITE(sc, RT2860_REG_TX_PWR_CFG(i), tmp);
}
}
@@ -3732,14 +3727,14 @@
device_printf(sc->sc_dev, "%s promiscuous mode\n",
(ifp->if_flags & IFF_PROMISC) ? "entering" : "leaving");
- tmp = rt2860_io_mac_read(sc, RT2860_REG_RX_FILTER_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_RX_FILTER_CFG);
tmp &= ~RT2860_REG_RX_FILTER_DROP_UC_NOME;
if (!(ifp->if_flags & IFF_PROMISC))
tmp |= RT2860_REG_RX_FILTER_DROP_UC_NOME;
- rt2860_io_mac_write(sc, RT2860_REG_RX_FILTER_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_RX_FILTER_CFG, tmp);
}
/*
@@ -3772,7 +3767,7 @@
cck_prot |= ((RT2860_REG_PROT_PHYMODE_CCK <<
RT2860_REG_PROT_PHYMODE_SHIFT) |
(3 << RT2860_REG_PROT_MCS_SHIFT));
- rt2860_io_mac_write(sc, RT2860_REG_TX_CCK_PROT_CFG, cck_prot);
+ RAL_WRITE(sc, RT2860_REG_TX_CCK_PROT_CFG, cck_prot);
/* OFDM frame protection */
@@ -3800,7 +3795,7 @@
ofdm_prot |= RT2860_REG_PROT_CTRL_NONE;
}
- rt2860_io_mac_write(sc, RT2860_REG_TX_OFDM_PROT_CFG, ofdm_prot);
+ RAL_WRITE(sc, RT2860_REG_TX_OFDM_PROT_CFG, ofdm_prot);
/* HT frame protection */
@@ -3919,10 +3914,10 @@
break;
}
- rt2860_io_mac_write(sc, RT2860_REG_TX_MM20_PROT_CFG, mm20_prot);
- rt2860_io_mac_write(sc, RT2860_REG_TX_MM40_PROT_CFG, mm40_prot);
- rt2860_io_mac_write(sc, RT2860_REG_TX_GF20_PROT_CFG, gf20_prot);
- rt2860_io_mac_write(sc, RT2860_REG_TX_GF40_PROT_CFG, gf40_prot);
+ RAL_WRITE(sc, RT2860_REG_TX_MM20_PROT_CFG, mm20_prot);
+ RAL_WRITE(sc, RT2860_REG_TX_MM40_PROT_CFG, mm40_prot);
+ RAL_WRITE(sc, RT2860_REG_TX_GF20_PROT_CFG, gf20_prot);
+ RAL_WRITE(sc, RT2860_REG_TX_GF40_PROT_CFG, gf40_prot);
}
/*
@@ -3945,7 +3940,7 @@
((ic->ic_flags & IEEE80211_F_SHSLOT) ||
((vap != NULL) && (vap->iv_flags &
IEEE80211_F_BURST))) ? "enabling" : "disabling");
- tmp = rt2860_io_mac_read(sc, RT2860_REG_BKOFF_SLOT_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_BKOFF_SLOT_CFG);
tmp &= ~0xff;
@@ -3955,7 +3950,7 @@
else
tmp |= IEEE80211_DUR_SLOT;
- rt2860_io_mac_write(sc, RT2860_REG_BKOFF_SLOT_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_BKOFF_SLOT_CFG, tmp);
}
/*
@@ -3992,26 +3987,26 @@
wmep[WME_AC_BE].wmep_txopLimit);
for (i = 0; i < WME_NUM_AC; i++)
- rt2860_io_mac_write(sc, RT2860_REG_TX_EDCA_AC_CFG(i),
+ RAL_WRITE(sc, RT2860_REG_TX_EDCA_AC_CFG(i),
(wmep[i].wmep_logcwmax << 16) | (wmep[i].wmep_logcwmin << 12) |
(wmep[i].wmep_aifsn << 8) | wmep[i].wmep_txopLimit);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WMM_AIFSN_CFG,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_WMM_AIFSN_CFG,
(wmep[WME_AC_VO].wmep_aifsn << 12) | (wmep[WME_AC_VI].wmep_aifsn << 8) |
(wmep[WME_AC_BK].wmep_aifsn << 4) | wmep[WME_AC_BE].wmep_aifsn);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WMM_CWMIN_CFG,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_WMM_CWMIN_CFG,
(wmep[WME_AC_VO].wmep_logcwmin << 12) | (wmep[WME_AC_VI].wmep_logcwmin
<< 8) |
(wmep[WME_AC_BK].wmep_logcwmin << 4) | wmep[WME_AC_BE].wmep_logcwmin);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WMM_CWMAX_CFG,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_WMM_CWMAX_CFG,
(wmep[WME_AC_VO].wmep_logcwmax << 12) | (wmep[WME_AC_VI].wmep_logcwmax
<< 8) |
(wmep[WME_AC_BK].wmep_logcwmax << 4) | wmep[WME_AC_BE].wmep_logcwmax);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WMM_TXOP0_CFG,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_WMM_TXOP0_CFG,
(wmep[WME_AC_BK].wmep_txopLimit << 16) | wmep[WME_AC_BE].wmep_txopLimit);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WMM_TXOP1_CFG,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_WMM_TXOP1_CFG,
(wmep[WME_AC_VO].wmep_txopLimit << 16) | wmep[WME_AC_VI].wmep_txopLimit);
}
@@ -4033,31 +4028,31 @@
/* disable temporarily TSF sync */
- tmp = rt2860_io_mac_read(sc, RT2860_REG_BCN_TIME_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_BCN_TIME_CFG);
tmp &= ~(RT2860_REG_BCN_TX_ENABLE |
RT2860_REG_TSF_TIMER_ENABLE |
RT2860_REG_TBTT_TIMER_ENABLE);
- rt2860_io_mac_write(sc, RT2860_REG_BCN_TIME_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_BCN_TIME_CFG, tmp);
/* write Tx wireless info and beacon frame to on-chip memory */
- rt2860_io_mac_write_multi(sc, RT2860_REG_BEACON_BASE(0),
- txwi, sizeof(struct rt2860_txwi));
-
- rt2860_io_mac_write_multi(sc, RT2860_REG_BEACON_BASE(0) + sizeof(struct
rt2860_txwi),
+ RAL_WRITE_REGION_1(sc, RT2860_REG_BEACON_BASE(0),
+ (uint8_t *)txwi, sizeof(struct rt2860_txwi));
+
+ RAL_WRITE_REGION_1(sc, RT2860_REG_BEACON_BASE(0) + sizeof(struct
rt2860_txwi),
mtod(m, uint8_t *), m->m_pkthdr.len);
/* enable again TSF sync */
- tmp = rt2860_io_mac_read(sc, RT2860_REG_BCN_TIME_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_BCN_TIME_CFG);
tmp |= (RT2860_REG_BCN_TX_ENABLE |
RT2860_REG_TSF_TIMER_ENABLE |
RT2860_REG_TBTT_TIMER_ENABLE);
- rt2860_io_mac_write(sc, RT2860_REG_BCN_TIME_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_BCN_TIME_CFG, tmp);
}
/*
@@ -4070,29 +4065,29 @@
/* clear Rx WCID search table (entries = 256, entry size = 8) */
for (i = 0; i < 256; i++) {
- rt2860_io_mac_write(sc, RT2860_REG_WCID(i), 0xffffffff);
- rt2860_io_mac_write(sc, RT2860_REG_WCID(i) + 4, 0x0000ffff);
+ RAL_WRITE(sc, RT2860_REG_WCID(i), 0xffffffff);
+ RAL_WRITE(sc, RT2860_REG_WCID(i) + 4, 0x0000ffff);
}
/* clear WCID attribute table (entries = 256, entry size = 4) */
- rt2860_io_mac_set_region_4(sc, RT2860_REG_WCID_ATTR(0),
RT2860_REG_PKEY_ENABLE, 256);
+ RAL_SET_REGION_4(sc, RT2860_REG_WCID_ATTR(0), RT2860_REG_PKEY_ENABLE,
256);
/* clear IV/EIV table (entries = 256, entry size = 8) */
- rt2860_io_mac_set_region_4(sc, RT2860_REG_IVEIV(0), 0, 2 * 256);
+ RAL_SET_REGION_4(sc, RT2860_REG_IVEIV(0), 0, 2 * 256);
/* clear pairwise key table (entries = 64, entry size = 32) */
- rt2860_io_mac_set_region_4(sc, RT2860_REG_PKEY(0), 0, 8 * 64);
+ RAL_SET_REGION_4(sc, RT2860_REG_PKEY(0), 0, 8 * 64);
/* clear shared key table (entries = 32, entry size = 32) */
- rt2860_io_mac_set_region_4(sc, RT2860_REG_SKEY(0, 0), 0, 8 * 32);
+ RAL_SET_REGION_4(sc, RT2860_REG_SKEY(0, 0), 0, 8 * 32);
/* clear shared key mode (entries = 32, entry size = 2) */
- rt2860_io_mac_set_region_4(sc, RT2860_REG_SKEY_MODE(0), 0, 16);
+ RAL_SET_REGION_4(sc, RT2860_REG_SKEY_MODE(0), 0, 16);
}
/*
@@ -4107,11 +4102,11 @@
"%s: adding BA session: wcid=0x%02x, tid=%d\n",
device_get_nameunit(sc->sc_dev), wcid, tid);
- tmp = rt2860_io_mac_read(sc, RT2860_REG_WCID(wcid) + 4);
+ tmp = RAL_READ(sc, RT2860_REG_WCID(wcid) + 4);
tmp |= (0x10000 << tid);
- rt2860_io_mac_write(sc, RT2860_REG_WCID(wcid) + 4, tmp);
+ RAL_WRITE(sc, RT2860_REG_WCID(wcid) + 4, tmp);
}
/*
@@ -4126,11 +4121,11 @@
"%s: deleting BA session: wcid=0x%02x, tid=%d\n",
device_get_nameunit(sc->sc_dev), wcid, tid);
- tmp = rt2860_io_mac_read(sc, RT2860_REG_WCID(wcid) + 4);
+ tmp = RAL_READ(sc, RT2860_REG_WCID(wcid) + 4);
tmp &= ~(0x10000 << tid);
- rt2860_io_mac_write(sc, RT2860_REG_WCID(wcid) + 4, tmp);
+ RAL_WRITE(sc, RT2860_REG_WCID(wcid) + 4, tmp);
}
/*
@@ -4619,7 +4614,7 @@
/* kick Tx */
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(qid),
ring->desc_cur);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(qid), ring->desc_cur);
return 0;
}
@@ -5001,7 +4996,7 @@
/* kick Tx */
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(qid),
ring->desc_cur);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(qid), ring->desc_cur);
return 0;
}
@@ -5035,8 +5030,8 @@
/* acknowledge interrupts */
- status = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_INT_STATUS);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_INT_STATUS, status);
+ status = RAL_READ(sc, RT2860_REG_SCHDMA_INT_STATUS);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_INT_STATUS, status);
RT2860_DPRINTF(sc, RT2860_DEBUG_INTR,
"%s: interrupt: status = 0x%08x\n",
@@ -5101,13 +5096,13 @@
/* restart DMA engine */
- tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
tmp &= ~(RT2860_REG_TX_WB_DDONE |
RT2860_REG_RX_DMA_ENABLE |
RT2860_REG_TX_DMA_ENABLE);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
/* init Tx rings (4 EDCAs + HCCA + MGMT) */
@@ -5115,22 +5110,22 @@
rt2860_reset_tx_ring(sc, &sc->tx_ring[i]);
for (i = 0; i < RT2860_SOFTC_TX_RING_COUNT; i++) {
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_BASE_PTR(i),
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_TX_BASE_PTR(i),
sc->tx_ring[i].desc_phys_addr);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_MAX_CNT(i),
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_TX_MAX_CNT(i),
RT2860_SOFTC_TX_RING_DESC_COUNT);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(i), 0);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(i), 0);
}
/* init Rx ring */
rt2860_reset_rx_ring(sc, &sc->rx_ring);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_BASE_PTR,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_RX_BASE_PTR,
sc->rx_ring.desc_phys_addr);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_MAX_CNT,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_RX_MAX_CNT,
RT2860_SOFTC_RX_RING_DATA_COUNT);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_CALC_IDX,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_RX_CALC_IDX,
RT2860_SOFTC_RX_RING_DATA_COUNT - 1);
rt2860_txrx_enable(sc);
@@ -5152,13 +5147,13 @@
/* restart DMA engine */
- tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
tmp &= ~(RT2860_REG_TX_WB_DDONE |
RT2860_REG_RX_DMA_ENABLE |
RT2860_REG_TX_DMA_ENABLE);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
/* init Tx rings (4 EDCAs + HCCA + MGMT) */
@@ -5166,22 +5161,22 @@
rt2860_reset_tx_ring(sc, &sc->tx_ring[i]);
for (i = 0; i < RT2860_SOFTC_TX_RING_COUNT; i++) {
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_BASE_PTR(i),
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_TX_BASE_PTR(i),
sc->tx_ring[i].desc_phys_addr);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_MAX_CNT(i),
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_TX_MAX_CNT(i),
RT2860_SOFTC_TX_RING_DESC_COUNT);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(i), 0);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(i), 0);
}
/* init Rx ring */
rt2860_reset_rx_ring(sc, &sc->rx_ring);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_BASE_PTR,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_RX_BASE_PTR,
sc->rx_ring.desc_phys_addr);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_MAX_CNT,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_RX_MAX_CNT,
RT2860_SOFTC_RX_RING_DATA_COUNT);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_CALC_IDX,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_RX_CALC_IDX,
RT2860_SOFTC_RX_RING_DATA_COUNT - 1);
rt2860_txrx_enable(sc);
@@ -5203,13 +5198,13 @@
/* restart DMA engine */
- tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
+ tmp = RAL_READ(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
tmp &= ~(RT2860_REG_TX_WB_DDONE |
RT2860_REG_RX_DMA_ENABLE |
RT2860_REG_TX_DMA_ENABLE);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
/* init Tx rings (4 EDCAs + HCCA + MGMT) */
@@ -5217,22 +5212,22 @@
rt2860_reset_tx_ring(sc, &sc->tx_ring[i]);
for (i = 0; i < RT2860_SOFTC_TX_RING_COUNT; i++) {
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_BASE_PTR(i),
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_TX_BASE_PTR(i),
sc->tx_ring[i].desc_phys_addr);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_MAX_CNT(i),
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_TX_MAX_CNT(i),
RT2860_SOFTC_TX_RING_DESC_COUNT);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(i), 0);
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(i), 0);
}
/* init Rx ring */
rt2860_reset_rx_ring(sc, &sc->rx_ring);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_BASE_PTR,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_RX_BASE_PTR,
sc->rx_ring.desc_phys_addr);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_MAX_CNT,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_RX_MAX_CNT,
RT2860_SOFTC_RX_RING_DATA_COUNT);
- rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_CALC_IDX,
+ RAL_WRITE(sc, RT2860_REG_SCHDMA_RX_CALC_IDX,
RT2860_SOFTC_RX_RING_DATA_COUNT - 1);
rt2860_txrx_enable(sc);
@@ -5537,7 +5532,7 @@
nframes = 0;
while (limit != 0) {
- index = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_RX_DRX_IDX);
+ index = RAL_READ(sc, RT2860_REG_SCHDMA_RX_DRX_IDX);
if (ring->cur == index)
break;
***The diff for this file has been truncated for email.***
=======================================
--- /sys/dev/ral/rt2860reg.h Tue Mar 13 13:43:32 2012
+++ /sys/dev/ral/rt2860reg.h Tue Mar 13 14:01:39 2012
@@ -559,6 +559,15 @@
#define RT2860_REG_H2M_CID3_SHIFT 24
#define RT2860_REG_H2M_CID_MASK 0xff
+/*
+ * * Control and status registers access macros.
+ * */
+#define RAL_READ(sc, reg) \
+ bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
+
+#define RAL_WRITE(sc, reg, val) \
+ bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
+
#define RAL_BARRIER_WRITE(sc) \
bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, 0x1800, \
BUS_SPACE_BARRIER_WRITE)
@@ -567,4 +576,12 @@
bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, 0x1800, \
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)
+#define RAL_WRITE_REGION_1(sc, offset, datap, count) \
+ bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \
+ (datap), (count))
+
+#define RAL_SET_REGION_4(sc, offset, val, count) \
+ bus_space_set_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \
+ (val), (count))
+
#endif /* #ifndef _RT2860_REG_H_ */
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