[Zrouter-src-freebsd] ZRouter.org: push to FreeBSD HEAD tree

[zrouter-src-freebsd at zrouter.org]

details:   http://zrouter.org/hg/FreeBSD/head//rev/be4db0d3a57d
changeset: 463:be4db0d3a57d
user:      Aleksandr Rybalko <ray at ddteam.net>
date:      Mon Apr 23 12:15:23 2012 +0300
description:
read link status workaround

diffstat:

 head/sys/dev/switch/ar8x16_switch.c |  64 ++++++++++++++++++++++++++++++++----
 1 files changed, 57 insertions(+), 7 deletions(-)

diffs (96 lines):

diff -r 886d4c86bdfa -r be4db0d3a57d head/sys/dev/switch/ar8x16_switch.c
--- a/head/sys/dev/switch/ar8x16_switch.c	Mon Apr 23 12:14:26 2012 +0300
+++ b/head/sys/dev/switch/ar8x16_switch.c	Mon Apr 23 12:15:23 2012 +0300
@@ -44,6 +44,7 @@
 #include <dev/switch/switch_ioctl.h>
 #include <dev/switch/ar8x16_switchreg.h>
 #include <dev/switch/ar8x16_switchvar.h>
+#include <dev/mii/mii.h>
 
 #include "switch_if.h"
 #include "switchb_if.h"
@@ -128,6 +129,52 @@
 }
 
 static int
+get_link_status(device_t dev, int phy, int reg)
+{
+	struct ar8x16_switch_softc *sc;
+	uint16_t value = 0;
+	uint32_t status;
+
+	sc = device_get_softc(dev);
+
+	/*
+	 * XXX: Hope it is only AR7242 with MII in PHY mode do not show PHY
+	 * regs via MDIO interface
+	 */
+	if (sc->devid != 8216)
+		return (miibus_readreg(dev, phy, reg));
+
+	status = READ4(sc, AR8X16_REG_PORT_STS(phy));
+
+	switch (reg) {
+	case MII_BMCR:
+		value = (BMSR_100TXFDX | BMSR_100TXHDX | BMSR_10TFDX |
+		    BMSR_10THDX | BMSR_ANEG);
+		if (status & AR8X16_PORT_STS_LINK_UP)
+			value |= (BMSR_LINK | BMSR_ACOMP);
+		break;
+	case MII_BMSR:
+		switch (status & AR8X16_PORT_STS_SPEED_MASK) {
+		case AR8X16_PORT_STS_SPEED_10:
+			value = BMCR_S10;
+			break;
+		case AR8X16_PORT_STS_SPEED_100:
+			value = BMCR_S100;
+			break;
+		case AR8X16_PORT_STS_SPEED_1000:
+			value = BMCR_S1000;
+			break;
+		}
+		if (status & AR8X16_PORT_STS_DUPLEX)
+			value |= BMCR_FDX;
+		if (status & AR8X16_PORT_STS_LINK_AUTO)
+			value |= BMCR_AUTOEN;
+		break;
+	}
+	return (value);
+}
+
+static int
 get_reg(device_t dev, uint32_t reg, uint32_t *value)
 {
 	struct ar8x16_switch_softc *sc;
@@ -135,10 +182,10 @@
 	sc = device_get_softc(dev);
 	if (reg & SWITCH_REG_TYPE_RAW)
 		*value = READ4(sc, reg);
-	else if (reg & SWITCH_REG_TYPE_PHY)
-		*value = miibus_readreg(dev, ((reg >> 8) & 0xff),
+	else if (reg & SWITCH_REG_TYPE_PHY) {
+		*value = get_link_status(dev, ((reg >> 8) & 0xff),
 		    (reg & 0xff));
-	else
+	} else
 		*value = MII_SW_READ4(sc, reg);
 	return (0);
 }
@@ -154,10 +201,13 @@
 		old = READ4(sc, reg);
 		WRITE4(sc, reg, *value);
 	} else if (reg & SWITCH_REG_TYPE_PHY) {
-		old = miibus_readreg(dev, ((reg >> 8) & 0xff),
-		    (reg & 0xff));
-		*value = miibus_writereg(dev, ((reg >> 8) & 0xff),
-		    (reg & 0xff), *value);
+		/* XXX: look into get_link_status */
+		if (sc->devid != 8216) {
+			old = miibus_readreg(dev, ((reg >> 8) & 0xff),
+			    (reg & 0xff));
+			*value = miibus_writereg(dev, ((reg >> 8) & 0xff),
+			    (reg & 0xff), *value);
+		}
 	} else {
 		old = MII_SW_READ4(sc, reg);
 		MII_SW_WRITE4(sc, reg, *value);