[Zrouter-src-freebsd] ZRouter.org: push to FreeBSD HEAD tree
zrouter-src-freebsd at zrouter.org
zrouter-src-freebsd at zrouter.org
Tue Dec 6 22:37:45 UTC 2011
details: http://zrouter.org/hg/FreeBSD/head//rev/5aec9bcfd14f
changeset: 242:5aec9bcfd14f
user: ray at terran.dlink.ua
date: Wed Dec 07 00:37:42 2011 +0200
description:
Unbreak build.
diffstat:
head/sys/mips/atheros/ar724x_chip.c | 59 +------------------------------------
head/sys/mips/atheros/if_arge.c | 31 +++++++++++--------
2 files changed, 19 insertions(+), 71 deletions(-)
diffs (209 lines):
diff -r 3286aba03553 -r 5aec9bcfd14f head/sys/mips/atheros/ar724x_chip.c
--- a/head/sys/mips/atheros/ar724x_chip.c Wed Dec 07 00:27:18 2011 +0200
+++ b/head/sys/mips/atheros/ar724x_chip.c Wed Dec 07 00:37:42 2011 +0200
@@ -181,21 +181,9 @@
}
}
-
static void
-<<<<<<< .mine
-ar724x_chip_set_mii_mode(int unit, int mode, int speed)
-||||||| .r227904
-ar724x_chip_set_pll_ge1(int speed)
-=======
ar724x_chip_ddr_flush_ge(int unit)
->>>>>>> .r228310
{
-<<<<<<< .mine
- uint32_t pll;
-||||||| .r227904
-}
-=======
switch (unit) {
case 0:
ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0);
@@ -209,57 +197,13 @@
return;
}
}
->>>>>>> .r228310
-
-<<<<<<< .mine
- printf("%s(%d)\n", __func__, speed);
-
- if (ar71xx_soc == AR71XX_SOC_AR7242) {
- /* 7242 with RTL8309 */
- /* XXX: always 100M */
- ATH_WRITE_REG(AR7242_ETH_XMII_CONFIG, 0x0101);
-
- ATH_WRITE_REG(AR724X_ETH_CFG, AR724X_ETH_CFG_MII_GE0 | AR724X_ETH_CFG_MII_GE0_SLAVE);
- pll = ATH_READ_REG(AR71XX_MAC0_BASE + AR71XX_MAC_CFG2);
- pll |= ( MAC_CFG2_IFACE_MODE_10_100 | MAC_CFG2_FULL_DUPLEX);
- ATH_WRITE_REG(AR71XX_MAC0_BASE + AR71XX_MAC_CFG2, pll);
- return;
- /* 7242 */
- }
-
-}
static void
-ar724x_chip_ddr_flush_ge(int unit)
-{
- ar71xx_ddr_flush((unit == 0)?AR724X_DDR_REG_FLUSH_GE0:
- AR724X_DDR_REG_FLUSH_GE1);
-}
-
-static void
-||||||| .r227904
-static void
-ar724x_chip_ddr_flush_ge0(void)
-{
- ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0);
-}
-
-static void
-ar724x_chip_ddr_flush_ge1(void)
-{
- ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1);
-}
-
-static void
-=======
-static void
->>>>>>> .r228310
ar724x_chip_ddr_flush_ip2(void)
{
ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_PCIE);
}
-
static uint32_t
ar724x_chip_get_eth_pll(unsigned int mac, int speed)
{
@@ -320,6 +264,5 @@
&ar724x_chip_ddr_flush_ge,
&ar724x_chip_get_eth_pll,
&ar724x_chip_ddr_flush_ip2,
- &ar724x_chip_init_usb_peripheral,
- &ar724x_chip_set_mii_mode
+ &ar724x_chip_init_usb_peripheral
};
diff -r 3286aba03553 -r 5aec9bcfd14f head/sys/mips/atheros/if_arge.c
--- a/head/sys/mips/atheros/if_arge.c Wed Dec 07 00:27:18 2011 +0200
+++ b/head/sys/mips/atheros/if_arge.c Wed Dec 07 00:37:42 2011 +0200
@@ -109,7 +109,7 @@
static void arge_init(void *);
static void arge_init_locked(struct arge_softc *);
static void arge_link_task(void *, int);
-static void arge_set_pll(struct arge_softc *, int);
+static void arge_set_pll(struct arge_softc *, int, int);
static int arge_miibus_readreg(device_t, int, int);
static void arge_miibus_statchg(device_t);
static int arge_miibus_writereg(device_t, int, int, int);
@@ -525,7 +525,7 @@
#if 1
device_printf(dev, "Set PLL\n");
- arge_set_pll(sc, sc->arge_media_type|sc->arge_media_duplex);
+ arge_set_pll(sc, sc->arge_media_type, sc->arge_media_duplex);
/* Reset MII bus */
// ARGE_WRITE(sc, AR71XX_MAC_MII_CFG, MAC_MII_CFG_RESET | MAC_MII_CFG_CLOCK_DIV_10);
ARGE_WRITE(sc, AR71XX_MAC_MII_CFG, MAC_MII_CFG_RESET | MAC_MII_CFG_CLOCK_DIV_20);
@@ -600,7 +600,7 @@
device_printf(dev, "Set PLL 0x%08x\n", sc->arge_media_type|sc->arge_media_duplex);
- arge_set_pll(sc, sc->arge_media_type|sc->arge_media_duplex);
+ arge_set_pll(sc, sc->arge_media_type, sc->arge_media_duplex);
#else
if (phys_total == 1) {
/* Do MII setup. */
@@ -620,7 +620,7 @@
IFM_ETHER | sc->arge_media_type|sc->arge_media_duplex, 0, NULL);
ifmedia_set(&sc->arge_ifmedia,
IFM_ETHER | sc->arge_media_type|sc->arge_media_duplex);
- arge_set_pll(sc, sc->arge_media_type|sc->arge_media_duplex);
+ arge_set_pll(sc, sc->arge_media_type, sc->arge_media_duplex);
}
#endif
device_printf(dev, "Call MI attach\n");
@@ -843,7 +843,7 @@
else
sc->arge_media_type = IFM_100_TX;
- arge_set_pll(sc, sc->arge_media_type|sc->arge_media_duplex);
+ arge_set_pll(sc, sc->arge_media_type, sc->arge_media_duplex);
ARGE_UNLOCK(sc);
return;
}
@@ -851,7 +851,7 @@
if (mii->mii_media_status & IFM_ACTIVE) {
if (IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
sc->arge_link_status = 1;
- arge_set_pll(sc, mii->mii_media_active);
+ arge_set_pll(sc, mii->mii_media_active, 1);
}
} else
sc->arge_link_status = 0;
@@ -860,17 +860,18 @@
}
static void
-arge_set_pll(struct arge_softc *sc, int media)
+arge_set_pll(struct arge_softc *sc, int media, int duplex)
{
uint32_t cfg, ifcontrol, rx_filtmask;
uint32_t fifo_tx;
+ int if_speed;
cfg = ARGE_READ(sc, AR71XX_MAC_CFG2);
cfg &= ~(MAC_CFG2_IFACE_MODE_1000
| MAC_CFG2_IFACE_MODE_10_100
| MAC_CFG2_FULL_DUPLEX);
- if (media & IFM_FDX)
+ if (duplex == IFM_FDX)
cfg |= MAC_CFG2_FULL_DUPLEX;
ifcontrol = ARGE_READ(sc, AR71XX_MAC_IFCONTROL);
@@ -879,22 +880,26 @@
ARGE_READ(sc, AR71XX_MAC_FIFO_RX_FILTMASK);
rx_filtmask &= ~FIFO_RX_MASK_BYTE_MODE;
- switch(IFM_SUBTYPE(media)) {
+ switch(media) {
case IFM_10_T:
cfg |= MAC_CFG2_IFACE_MODE_10_100;
+ if_speed = 10;
break;
case IFM_100_TX:
cfg |= MAC_CFG2_IFACE_MODE_10_100;
ifcontrol |= MAC_IFCONTROL_SPEED;
+ if_speed = 100;
break;
case IFM_1000_T:
+ case IFM_1000_SX:
cfg |= MAC_CFG2_IFACE_MODE_1000;
rx_filtmask |= FIFO_RX_MASK_BYTE_MODE;
+ if_speed = 1000;
break;
default:
- device_printf(sc->arge_dev,
- "Unknown media 0x%08x\n", media);
- return;
+ if_speed = 100;
+ device_printf(sc->arge_dev,
+ "Unknown media %d\n", media);
}
switch (ar71xx_soc) {
@@ -1174,7 +1179,7 @@
return;
}
- ar71xx_device_flush_ddr_ge(sc->arge_mac_unit);
+ arge_flush_ddr(sc);
for (enq = 0; !IFQ_DRV_IS_EMPTY(&ifp->if_snd) &&
sc->arge_cdata.arge_tx_cnt < ARGE_TX_RING_COUNT - 2; ) {
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